Re: [PATCH 3/5] serial: omap: Switch wake-up interrupt to generic wakeirq
On Thu, May 28, 2015 at 07:56:16AM -0700, Tony Lindgren wrote:
> Hi Greg,
>
> * Tony Lindgren [150513 16:38]:
> > We can now use generic wakeirq handling and remove the custom handling
> > for the wake-up interrupts.
>
> How do you prefer to handle the two omap specific serial driver
> changes in this series?
>
> There's a dependency to Rafael's pm-wakeirq branch that contains:
>
> 4990d4fe327b ("PM / Wakeirq: Add automated device wake IRQ handling")
> 56f487c78015 ("PM / Runtime: Update last_busy in rpm_resume")
> f6a2fbb903d5 ("PM / runtime: add note about re-calling in during
> device probe()")
>
> The 8250_omap.c driver change also needs to be merged with:
>
> 9e91597f2423 ("serial: 8250_omap: provide complete custom startup &
> shutdown callbacks")
>
> Not sure if 9e91597f2423 is immutable, but if so then I could:
>
> a) Send you a pull request for the two serial driver patches
>based on Rafael's pm-wakeirq branch merged with 9e91597f2423 to
>avoid the merge conflict.
>
> b) Apply both serial driver patches into omap-for-v4.2/wakeirq
>based on Rafael's pm-wakeirq branch merged with 9e91597f2423.
That one sounds good to me, feel free to do so and add:
Acked-by: Greg Kroah-Hartman
It's the easiest for everyone involved, right?
thanks,
greg k-h
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Re: [PATCH] serial: 8250_omap: provide complete custom startup & shutdown callbacks
On Tue, May 26, 2015 at 09:09:26AM -0700, Tony Lindgren wrote:
> * Peter Hurley [150526 07:14]:
> > On 05/20/2015 04:07 PM, Sebastian Andrzej Siewior wrote:
> > > The currently in-use port->startup and port->shutdown are "okay". The
> > > startup part for instance does the tiny omap extra part and invokes
> > > serial8250_do_startup() for the remaining pieces. The workflow in
> > > serial8250_do_startup() is okay except for the part where UART_RX is
> > > read without a check if there is something to read. I tried to
> > > workaround it in commit 0aa525d11859 ("tty: serial: 8250_core: read only
> > > RX if there is something in the FIFO") but then reverted it later in
> > > commit ca8bb4aefb9 ("serial: 8250: Revert "tty: serial: 8250_core: read
> > > only RX if there is something in the FIFO"").
> > >
> > > This is the second attempt to get it to work on older OMAPs without
> > > breaking other chips this time
> > > Peter Hurley suggested to pull in the few needed lines from
> > > serial8250_do_startup() and drop everything else that is not required
> > > including making it simpler like using just request_irq() instead the
> > > chain handler like it is doing now.
> > > So lets try that.
> >
> > Thanks, Sebastian.
> >
> > Reviewed-by: Peter Hurley
>
> Can we please get this into the v4.1-rc series?
>
> It fixes the following:
>
> Unhandled fault: external abort on non-linefetch (0x1028) at 0xfa06a000
>
> ...
>
> [] (mem_serial_in) from []
> (serial8250_do_startup+0xe4/0x694)
> [] (serial8250_do_startup) from []
> (omap_8250_startup+0x70/0x144)
> [] (omap_8250_startup) from []
> (serial8250_startup+0x24/0x30)
> [] (serial8250_startup) from []
> (uart_startup.part.14+0x8c/0x1a0)
> [] (uart_startup.part.14) from [] (uart_open+0xd8/0x134)
> [] (uart_open) from [] (tty_open+0xdc/0x5e0)
> [] (tty_open) from [] (chrdev_open+0xac/0x188)
This is a "big" patch to come so late in the -rc cycle. It's been
broken since 4.0, so it can't be _that_ important of a thing if no one
has been screaming about it :)
Are you willing to justify this to Linus as to why it should go in now?
thanks,
greg k-h
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Re: [PATCH] serial: 8250_omap: provide complete custom startup & shutdown callbacks
On Tue, May 26, 2015 at 09:09:26AM -0700, Tony Lindgren wrote:
> * Peter Hurley [150526 07:14]:
> > On 05/20/2015 04:07 PM, Sebastian Andrzej Siewior wrote:
> > > The currently in-use port->startup and port->shutdown are "okay". The
> > > startup part for instance does the tiny omap extra part and invokes
> > > serial8250_do_startup() for the remaining pieces. The workflow in
> > > serial8250_do_startup() is okay except for the part where UART_RX is
> > > read without a check if there is something to read. I tried to
> > > workaround it in commit 0aa525d11859 ("tty: serial: 8250_core: read only
> > > RX if there is something in the FIFO") but then reverted it later in
> > > commit ca8bb4aefb9 ("serial: 8250: Revert "tty: serial: 8250_core: read
> > > only RX if there is something in the FIFO"").
> > >
> > > This is the second attempt to get it to work on older OMAPs without
> > > breaking other chips this time
> > > Peter Hurley suggested to pull in the few needed lines from
> > > serial8250_do_startup() and drop everything else that is not required
> > > including making it simpler like using just request_irq() instead the
> > > chain handler like it is doing now.
> > > So lets try that.
> >
> > Thanks, Sebastian.
> >
> > Reviewed-by: Peter Hurley
>
> Can we please get this into the v4.1-rc series?
>
> It fixes the following:
>
> Unhandled fault: external abort on non-linefetch (0x1028) at 0xfa06a000
>
> ...
>
> [] (mem_serial_in) from []
> (serial8250_do_startup+0xe4/0x694)
> [] (serial8250_do_startup) from []
> (omap_8250_startup+0x70/0x144)
> [] (omap_8250_startup) from []
> (serial8250_startup+0x24/0x30)
> [] (serial8250_startup) from []
> (uart_startup.part.14+0x8c/0x1a0)
> [] (uart_startup.part.14) from [] (uart_open+0xd8/0x134)
> [] (uart_open) from [] (tty_open+0xdc/0x5e0)
> [] (tty_open) from [] (chrdev_open+0xac/0x188)
In looking at it closer, this is fine, I'll queue it up for 4.1-final
now.
greg k-h
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Re: OMAP baseline test results for v4.1-rc5
Hi, On 30-05-15 17:56, Jeroen Hofstee wrote: Hello Paul, On 30-05-15 17:50, Paul Walmsley wrote: Here are some basic OMAP test results for Linux v4.1-rc5. Logs and other details at: http://www.pwsan.com/omap/testlogs/test_v4.1-rc5/20150529162206/ The cmt3517 seems to have these some In-Band errors. Do you happen to know where these are coming from? git bisect + some workarounds seem to indicate: d744ce37b721d6678f420ba0fb058f615eb015b6 is the first bad commit commit d744ce37b721d6678f420ba0fb058f615eb015b6 Author: Tero Kristo Date: Tue Feb 24 16:22:45 2015 +0200 ARM: dts: omap3: add minimal l4 bus layout with control module support This patch creates an l4_core interconnect for OMAP3, and moves some of the generic peripherals under it. System control module nodes are moved under this new interconnect also, and the SCM clock layout is changed to use the renamed SCM node as the clock provider. Signed-off-by: Tero Kristo Reported-by: Tony Lindgren I haven't looked further into it yet, Regards, Jeroen -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] ARM: dts: am335x-boneblack: disable RTC-only sleep
Sorry for the late response, I only just noticed this since I wasn't CC'd.
This "fix" was not ever Reported-By or Tested-By me as it claims. It
is in fact wrong: &rtc { system-power-controller; } needs to be
present for every variety of beaglebone (more generally every design
with a TPS65217 whose PWR_EN is connected to the PMIC_POWER_EN pin of
an AM335x).
Without a system-power-controller, the kernel has no way of turning
off the system and shutdown will leave the system halted instead.
The previously posted fix, which added &tps {
ti,pmic-shutdown-controller; } was correct, and ensures that a
poweroff makes the pmic enter "OFF-state" rather than "SLEEP-state"
(aka RTC-only sleep).
Matthijs
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Re: [PATCH] ARM: dts: am335x-boneblack: disable RTC-only sleep
On Sun, May 31, 2015 at 7:20 PM, Matthijs van Duin
wrote:
> Sorry for the late response, I only just noticed this since I wasn't CC'd.
>
> This "fix" was not ever Reported-By or Tested-By me as it claims. It
> is in fact wrong: &rtc { system-power-controller; } needs to be
> present for every variety of beaglebone (more generally every design
> with a TPS65217 whose PWR_EN is connected to the PMIC_POWER_EN pin of
> an AM335x).
>
> Without a system-power-controller, the kernel has no way of turning
> off the system and shutdown will leave the system halted instead.
>
> The previously posted fix, which added &tps {
> ti,pmic-shutdown-controller; } was correct, and ensures that a
> poweroff makes the pmic enter "OFF-state" rather than "SLEEP-state"
> (aka RTC-only sleep).
Sorry Matthijs, (and everyone else)
That's my fault for completely screwing up this patch..
Revert:
https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=3d76be5b933e2a66d85a2f7444e68e99e8a48ad4
Then use:
http://www.spinics.net/lists/linux-omap/msg118512.html
With the update commit message:
Fixes: http://bugs.elinux.org/issues/143
Entering RTC-only sleep is only properly supported on early prototypes
series (pre-A6) of the BeagleBone Black. Since rev (A6A), which
include all production versions, it is not support at due to.
(rev A6) enable of the 3v3b regulator moved from LDO2 to LDO4 (3v3a)
side-effect: 3v3b rail remains on in sleep-mode (also in off-mode when
battery-powered)
(rev A6A) am335x vdds supply moved from LDO3 to LDO1 side-effect: vdds
remains supplied in sleep-mode
Regards,
--
Robert Nelson
https://rcn-ee.com/
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Re: [PATCH] ARM: dts: am335x-boneblack: disable RTC-only sleep
Here's a version that attempts to address Tony's earlier request to
include some comments in the patch itself. Since I saw no way to
concisely summarize the issues, I included links to relevant messages
(and enough info to locate the thread again in case of link rot).
Since the patch itself contains more explanation, I made the commit
message more concise.
Apologies for the attachment (inline text would get fucked up by gmail)
From 4278ecc32e886d2e83bc486e6409d8f6df82a0d1 Mon Sep 17 00:00:00 2001
From: Matthijs van Duin
Date: Mon, 1 Jun 2015 06:56:24 +0200
Subject: [PATCH] ARM: dts: am335x-bone* enable pmic-shutdown-controller
Fixes: http://bugs.elinux.org/issues/143
Avoid entering "RTC-only mode" at poweroff. It is unsupported by most
versions of BeagleBone, and risks hardware damage.
Reported-by: Matthijs van Duin
Tested-by: Matthijs van Duin
Signed-off-by: Robert Nelson
Cc: Tony Lindgren
Cc: Felipe Balbi
Cc: Johan Hovold
[Matthijs van Duin: added explanatory comments]
Signed-off-by: Matthijs van Duin
---
arch/arm/boot/dts/am335x-bone-common.dtsi | 18 ++
1 file changed, 18 insertions(+)
diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi
index c3255e0..90fbbb1 100644
--- a/arch/arm/boot/dts/am335x-bone-common.dtsi
+++ b/arch/arm/boot/dts/am335x-bone-common.dtsi
@@ -223,6 +223,24 @@
/include/ "tps65217.dtsi"
&tps {
+ // Configure pmic to enter OFF-state instead of SLEEP-state ("RTC-only
+ // mode") at poweroff. Most BeagleBone versions do not support RTC-only
+ // mode and risk hardware damage if this mode is entered.
+ //
+ // For details, see linux-omap mailing list May 2015 thread
+ // [PATCH] ARM: dts: am335x-bone* enable pmic-shutdown-controller
+ // In particular, messages:
+ // http://www.spinics.net/lists/linux-omap/msg118585.html
+ // http://www.spinics.net/lists/linux-omap/msg118615.html
+ //
+ ti,pmic-shutdown-controller;
+ //
+ // You can override this later with
+ // &tps { /delete-property/ ti,pmic-shutdown-controller; }
+ // if you want to use RTC-only mode and made sure you are not affected
+ // by the hardware problems. (Tip: double-check by performing a current
+ // measurement after shutdown: it should be less than 1 mA.)
+
regulators {
dcdc1_reg: regulator@0 {
regulator-name = "vdds_dpr";
--
2.1.4
Re: [PATCHv3 00/10] ARM: DRA7: add display support
Hi Tomi On Wed, 6 May 2015, Tomi Valkeinen wrote: > This series adds the arch/arm/ side of the display support for DRA7 (DRA72x, > DRA74x, AM54xx) SoCs. Also support for HDMI output on x15 and DRA72 EVM boards > is added. > > This series is v3, and is based on v4.1-rc2. There are no differences to v2, > except rebased and tested. Are you still planning to move the DESHDCP clock enable to the beginning of the series to avoid the warnings, per: http://www.spinics.net/lists/arm-kernel/msg410968.html ? Also, not sure if you can arrange for someone at TI to send over a DRA7xx board for the testbed, but it would be nice to have a board to test these patches with, to avoid issues like the one mentioned in your E-mails... - Paul -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: OMAP baseline test results for v4.1-rc5
+ Tero Hello Jeroen, On Mon, 1 Jun 2015, Jeroen Hofstee wrote: > On 30-05-15 17:56, Jeroen Hofstee wrote: > > Hello Paul, > > > > On 30-05-15 17:50, Paul Walmsley wrote: > > > Here are some basic OMAP test results for Linux v4.1-rc5. > > > Logs and other details at: > > > > > > http://www.pwsan.com/omap/testlogs/test_v4.1-rc5/20150529162206/ > > > > > > > The cmt3517 seems to have these some In-Band errors. > > Do you happen to know where these are coming from? > > > > git bisect + some workarounds seem to indicate: > > d744ce37b721d6678f420ba0fb058f615eb015b6 is the first bad commit > commit d744ce37b721d6678f420ba0fb058f615eb015b6 > Author: Tero Kristo > Date: Tue Feb 24 16:22:45 2015 +0200 > > ARM: dts: omap3: add minimal l4 bus layout with control module support > > This patch creates an l4_core interconnect for OMAP3, and moves some > of the generic peripherals under it. System control module nodes are > moved under this new interconnect also, and the SCM clock layout > is changed to use the renamed SCM node as the clock provider. > > Signed-off-by: Tero Kristo > Reported-by: Tony Lindgren > > I haven't looked further into it yet, Interesting; thanks for the bisect. In the mainline kernel, this appears to be commit b8845074cfbbd1d1b46720a1b563d7b4240dac21. I took a quick look at the control module offsets in that patch, and they appear to match what's in the SPRUGR0B PDF. Will try a few test boots here to confirm your findings. Tero, care to take a look? - Paul -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv3 00/10] ARM: DRA7: add display support
On 01/06/15 08:46, Paul Walmsley wrote: > Hi Tomi > > On Wed, 6 May 2015, Tomi Valkeinen wrote: > >> This series adds the arch/arm/ side of the display support for DRA7 (DRA72x, >> DRA74x, AM54xx) SoCs. Also support for HDMI output on x15 and DRA72 EVM >> boards >> is added. >> >> This series is v3, and is based on v4.1-rc2. There are no differences to v2, >> except rebased and tested. > > Are you still planning to move the DESHDCP clock enable to the beginning > of the series to avoid the warnings, per: > > http://www.spinics.net/lists/arm-kernel/msg410968.html Sorry, I totally forgot that. I will do that and send a v4. > Also, not sure if you can arrange for someone at TI to send over a DRA7xx > board for the testbed, but it would be nice to have a board to test these > patches with, to avoid issues like the one mentioned in your E-mails... I'll forward the request. Tomi signature.asc Description: OpenPGP digital signature
[PATCHv4 03/10] arm/dts: dra7xx: add 'ti,set-rate-parent' for dss_dss_clk
We need set-rate-parent flags for the display's clock path so that the
DSS driver can change the clock rate of the PLL.
This patchs adds the ti,set-rate-parent flag to 'dss_dss_clk' clock
node, which is only a gate clock, allowing the setting of the clock rate
to propagate to the PLL.
Signed-off-by: Tomi Valkeinen
Cc: devicet...@vger.kernel.org
---
arch/arm/boot/dts/dra7xx-clocks.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/dra7xx-clocks.dtsi
b/arch/arm/boot/dts/dra7xx-clocks.dtsi
index 470f39c4e326..357bedeebfac 100644
--- a/arch/arm/boot/dts/dra7xx-clocks.dtsi
+++ b/arch/arm/boot/dts/dra7xx-clocks.dtsi
@@ -1531,6 +1531,7 @@
clocks = <&dpll_per_h12x2_ck>;
ti,bit-shift = <8>;
reg = <0x1120>;
+ ti,set-rate-parent;
};
dss_hdmi_clk: dss_hdmi_clk {
--
2.1.4
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[PATCHv4 00/10] ARM: DRA7: add display support
Hi, This series adds the arch/arm/ side of the display support for DRA7 (DRA72x, DRA74x, AM54xx) SoCs. Also support for HDMI output on x15 and DRA72 EVM boards is added. The difference to v4 is that the DESHDCP patches were moved to the beginning of the series to fix boot issues if bisecting. Tomi Tomi Valkeinen (10): arm: dra7: add DESHDCP clock CLK: TI: always enable DESHDCP clock arm/dts: dra7xx: add 'ti,set-rate-parent' for dss_dss_clk ARM: DRA7: hwmod: add DMM hwmod description ARM: DRA7: hwmod: set DSS submodule parent hwmods ARM: OMAP: display: change compat names to array ARM: OMAP2+: display: detect DRA7 DSS arm/dts: dra7.dtsi: add DSS support arm/dts: dra72-evm.dts: add HDMI arm/dts: am57xx-beagle-x15.dts: add HDMI arch/arm/boot/dts/am57xx-beagle-x15.dts | 81 ++ arch/arm/boot/dts/dra7.dtsi | 43 arch/arm/boot/dts/dra72-evm.dts | 110 ++ arch/arm/boot/dts/dra72x.dtsi | 11 +++ arch/arm/boot/dts/dra74x.dtsi | 15 arch/arm/boot/dts/dra7xx-clocks.dtsi | 11 +++ arch/arm/mach-omap2/display.c | 32 + arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 33 + drivers/clk/ti/clk-7xx.c | 8 ++- 9 files changed, 328 insertions(+), 16 deletions(-) -- 2.1.4 -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCHv4 02/10] CLK: TI: always enable DESHDCP clock
DESHDCP clock is needed on DRA7 based SoCs to enable the DSS IP. That
clock is an odd one, as it is not supposed to be any kind of core clock
for DSS, and we don't even support HDCP, but the clock is still needed
even for the HWMOD framework to be able to reset the DSS IP.
As there's no support for multiple core clocks in the HWMOD framework,
we don't have any obvious place to enable this clock when DSS IP is
being enabled.
Furthermore, the HDMI on OMAP5 DSS is the same as on DRA7, and OMAP5
does not have any such clock configuration bit. This suggests that on
OMAP5 the DESHDCP clock is always enabled, and for DRA7 we have the
possibility to gate it.
So, as we don't have any clean way to enable and disable the clock
based on the need, this patch enables the clock at boot time, making it
work similarly to OMAP5.
Signed-off-by: Tomi Valkeinen
---
drivers/clk/ti/clk-7xx.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/ti/clk-7xx.c b/drivers/clk/ti/clk-7xx.c
index 2dd956b9affa..63b8323df918 100644
--- a/drivers/clk/ti/clk-7xx.c
+++ b/drivers/clk/ti/clk-7xx.c
@@ -312,7 +312,7 @@ static struct ti_dt_clk dra7xx_clks[] = {
int __init dra7xx_dt_clk_init(void)
{
int rc;
- struct clk *abe_dpll_mux, *sys_clkin2, *dpll_ck;
+ struct clk *abe_dpll_mux, *sys_clkin2, *dpll_ck, *hdcp_ck;
ti_dt_clocks_register(dra7xx_clks);
@@ -348,5 +348,10 @@ int __init dra7xx_dt_clk_init(void)
if (rc)
pr_err("%s: failed to set USB_DPLL M2 OUT\n", __func__);
+ hdcp_ck = clk_get_sys(NULL, "dss_deshdcp_clk");
+ rc = clk_prepare_enable(hdcp_ck);
+ if (rc)
+ pr_err("%s: failed to set dss_deshdcp_clk\n", __func__);
+
return rc;
}
--
2.1.4
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[PATCHv4 01/10] arm: dra7: add DESHDCP clock
Add a new Linux clock for DRA7 based SoCs to control DESHDCP clock.
Signed-off-by: Tomi Valkeinen
---
arch/arm/boot/dts/dra7.dtsi | 5 +
arch/arm/boot/dts/dra7xx-clocks.dtsi | 10 ++
arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 1 +
drivers/clk/ti/clk-7xx.c | 1 +
4 files changed, 17 insertions(+)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 5332b57b4950..db0890a36e96 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -131,6 +131,11 @@
regulator-max-microvolt
= <300>;
};
};
+
+ scm_conf_clocks: clocks {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
};
dra7_pmx_core: pinmux@1400 {
diff --git a/arch/arm/boot/dts/dra7xx-clocks.dtsi
b/arch/arm/boot/dts/dra7xx-clocks.dtsi
index 3b933f74d000..470f39c4e326 100644
--- a/arch/arm/boot/dts/dra7xx-clocks.dtsi
+++ b/arch/arm/boot/dts/dra7xx-clocks.dtsi
@@ -2136,3 +2136,13 @@
clocks = <&dpll_usb_ck>;
};
};
+
+&scm_conf_clocks {
+ dss_deshdcp_clk: dss_deshdcp_clk {
+ #clock-cells = <0>;
+ compatible = "ti,gate-clock";
+ clocks = <&l3_iclk_div>;
+ ti,bit-shift = <0>;
+ reg = <0x558>;
+ };
+};
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index 0e64c2fac0b5..817dbd87ce67 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -438,6 +438,7 @@ static struct omap_hwmod_opt_clk dss_opt_clks[] = {
{ .role = "video2_clk", .clk = "dss_video2_clk" },
{ .role = "video1_clk", .clk = "dss_video1_clk" },
{ .role = "hdmi_clk", .clk = "dss_hdmi_clk" },
+ { .role = "hdcp_clk", .clk = "dss_deshdcp_clk" },
};
static struct omap_hwmod dra7xx_dss_hwmod = {
diff --git a/drivers/clk/ti/clk-7xx.c b/drivers/clk/ti/clk-7xx.c
index 5d2217ae4478..2dd956b9affa 100644
--- a/drivers/clk/ti/clk-7xx.c
+++ b/drivers/clk/ti/clk-7xx.c
@@ -305,6 +305,7 @@ static struct ti_dt_clk dra7xx_clks[] = {
DT_CLK("4882c000.timer", "timer_sys_ck", "timer_sys_clk_div"),
DT_CLK("4882e000.timer", "timer_sys_ck", "timer_sys_clk_div"),
DT_CLK(NULL, "sys_clkin", "sys_clkin1"),
+ DT_CLK(NULL, "dss_deshdcp_clk", "dss_deshdcp_clk"),
{ .node_name = NULL },
};
--
2.1.4
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[PATCHv4 09/10] arm/dts: dra72-evm.dts: add HDMI
DRA72 EVM has a HDMI output. This patch adds the device tree nodes
required for HDMI.
Signed-off-by: Tomi Valkeinen
Cc: devicet...@vger.kernel.org
---
arch/arm/boot/dts/dra72-evm.dts | 110
1 file changed, 110 insertions(+)
diff --git a/arch/arm/boot/dts/dra72-evm.dts b/arch/arm/boot/dts/dra72-evm.dts
index ce0390f081d9..4e1b60581782 100644
--- a/arch/arm/boot/dts/dra72-evm.dts
+++ b/arch/arm/boot/dts/dra72-evm.dts
@@ -19,6 +19,10 @@
reg = <0x8000 0x4000>; /* 1024 MB */
};
+ aliases {
+ display0 = &hdmi0;
+ };
+
evm_3v3: fixedregulator-evm_3v3 {
compatible = "regulator-fixed";
regulator-name = "evm_3v3";
@@ -35,6 +39,51 @@
compatible = "linux,extcon-usb-gpio";
id-gpio = <&pcf_gpio_21 2 GPIO_ACTIVE_HIGH>;
};
+
+ hdmi0: connector {
+ compatible = "hdmi-connector";
+ label = "hdmi";
+
+ type = "a";
+
+ port {
+ hdmi_connector_in: endpoint {
+ remote-endpoint = <&tpd12s015_out>;
+ };
+ };
+ };
+
+ tpd12s015: encoder {
+ compatible = "ti,tpd12s015";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&tpd12s015_pins>;
+
+ gpios = <&pcf_hdmi 4 GPIO_ACTIVE_HIGH>, /* P4, CT CP HPD */
+ <&pcf_hdmi 5 GPIO_ACTIVE_HIGH>, /* P5, LS OE */
+ <&gpio7 12 GPIO_ACTIVE_HIGH>; /* gpio7_12/sp1_cs2,
HPD */
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ tpd12s015_in: endpoint {
+ remote-endpoint = <&hdmi_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ tpd12s015_out: endpoint {
+ remote-endpoint = <&hdmi_connector_in>;
+ };
+ };
+ };
+ };
};
&dra7_pmx_core {
@@ -45,6 +94,13 @@
>;
};
+ i2c5_pins: pinmux_i2c5_pins {
+ pinctrl-single,pins = <
+ 0x2b4 (PIN_INPUT | MUX_MODE10) /* mcasp1_axr0.i2c5_sda
*/
+ 0x2b8 (PIN_INPUT | MUX_MODE10) /* mcasp1_axr1.i2c5_scl
*/
+ >;
+ };
+
nand_default: nand_default {
pinctrl-single,pins = <
0x0 (PIN_INPUT | MUX_MODE0) /* gpmc_ad0 */
@@ -142,6 +198,19 @@
0xb8 (PIN_OUTPUT | MUX_MODE1) /* gpmc_cs2.qspi1_cs0 */
>;
};
+
+ hdmi_pins: pinmux_hdmi_pins {
+ pinctrl-single,pins = <
+ 0x408 (PIN_INPUT | MUX_MODE1) /* i2c2_sda.hdmi1_ddc_scl
*/
+ 0x40c (PIN_INPUT | MUX_MODE1) /* i2c2_scl.hdmi1_ddc_sda
*/
+ >;
+ };
+
+ tpd12s015_pins: pinmux_tpd12s015_pins {
+ pinctrl-single,pins = <
+ 0x3b8 (PIN_INPUT_PULLDOWN | MUX_MODE14) /* gpio7_12 HPD
*/
+ >;
+ };
};
&i2c1 {
@@ -277,6 +346,27 @@
};
};
+&i2c5 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c5_pins>;
+ clock-frequency = <40>;
+
+ pcf_hdmi: pcf8575@26 {
+ compatible = "nxp,pcf8575";
+ reg = <0x26>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ /*
+* initial state is used here to keep the mdio interface
+* selected on RU89 through SEL_VIN4_MUX_S0, VIN2_S1 and
+* VIN2_S0 driven high otherwise Ethernet stops working
+* VIN6_SEL_S0 is low, thus selecting McASP3 over VIN6
+*/
+ lines-initial-states = <0x0f2b>;
+ };
+};
+
&uart1 {
status = "okay";
};
@@ -566,3 +656,23 @@
};
};
};
+
+&dss {
+ status = "ok";
+
+ vdda_video-supply = <&ldo5_reg>;
+};
+
+&hdmi {
+ status = "ok";
+ vdda-supply = <&ldo3_reg>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&hdmi_pins>;
+
+ port {
+ hdmi_out: endpoint {
+ remote-endpoint = <&tpd12s015_in>;
+ };
+ };
+};
--
2.1.4
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[PATCHv4 08/10] arm/dts: dra7.dtsi: add DSS support
DRA7xxx contains a very similar DSS to OMAP5. The main differences are:
* no DSI or RFBI support.
* 1 or 2 dedicated video PLLs.
* need to do additional configuration to the DRA7 CONTROL module.
DRA72xx has only one video PLL, and DRA74xx has two.
Signed-off-by: Tomi Valkeinen
Cc: devicet...@vger.kernel.org
---
arch/arm/boot/dts/dra7.dtsi | 38 ++
arch/arm/boot/dts/dra72x.dtsi | 11 +++
arch/arm/boot/dts/dra74x.dtsi | 15 +++
3 files changed, 64 insertions(+)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index db0890a36e96..f3a8237cea39 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -1474,6 +1474,44 @@
clocks = <&sys_clkin1>;
status = "disabled";
};
+
+ dss: dss@5800 {
+ compatible = "ti,dra7-dss";
+ /* 'reg' defined in dra72x.dtsi and dra74x.dtsi */
+ /* 'clocks' defined in dra72x.dtsi and dra74x.dtsi */
+ status = "disabled";
+ ti,hwmods = "dss_core";
+ /* CTRL_CORE_DSS_PLL_CONTROL */
+ syscon-pll-ctrl = <&scm_conf 0x538>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ dispc@58001000 {
+ compatible = "ti,dra7-dispc";
+ reg = <0x58001000 0x1000>;
+ interrupts = ;
+ ti,hwmods = "dss_dispc";
+ clocks = <&dss_dss_clk>;
+ clock-names = "fck";
+ /* CTRL_CORE_SMA_SW_1 */
+ syscon-pol = <&scm_conf 0x534>;
+ };
+
+ hdmi: encoder@5806 {
+ compatible = "ti,dra7-hdmi";
+ reg = <0x5804 0x200>,
+ <0x58040200 0x80>,
+ <0x58040300 0x80>,
+ <0x5806 0x19000>;
+ reg-names = "wp", "pll", "phy", "core";
+ interrupts = ;
+ status = "disabled";
+ ti,hwmods = "dss_hdmi";
+ clocks = <&dss_48mhz_clk>, <&dss_hdmi_clk>;
+ clock-names = "fck", "sys_clk";
+ };
+ };
};
thermal_zones: thermal-zones {
diff --git a/arch/arm/boot/dts/dra72x.dtsi b/arch/arm/boot/dts/dra72x.dtsi
index 03d742f8d572..eaca143faa77 100644
--- a/arch/arm/boot/dts/dra72x.dtsi
+++ b/arch/arm/boot/dts/dra72x.dtsi
@@ -34,3 +34,14 @@
interrupts = ;
};
};
+
+&dss {
+ reg = <0x5800 0x80>,
+ <0x58004054 0x4>,
+ <0x58004300 0x20>;
+ reg-names = "dss", "pll1_clkctrl", "pll1";
+
+ clocks = <&dss_dss_clk>,
+<&dss_video1_clk>;
+ clock-names = "fck", "video1_clk";
+};
diff --git a/arch/arm/boot/dts/dra74x.dtsi b/arch/arm/boot/dts/dra74x.dtsi
index cc560a70926f..fa995d0ca1f2 100644
--- a/arch/arm/boot/dts/dra74x.dtsi
+++ b/arch/arm/boot/dts/dra74x.dtsi
@@ -73,3 +73,18 @@
};
};
};
+
+&dss {
+ reg = <0x5800 0x80>,
+ <0x58004054 0x4>,
+ <0x58004300 0x20>,
+ <0x58005054 0x4>,
+ <0x58005300 0x20>;
+ reg-names = "dss", "pll1_clkctrl", "pll1",
+ "pll2_clkctrl", "pll2";
+
+ clocks = <&dss_dss_clk>,
+<&dss_video1_clk>,
+<&dss_video2_clk>;
+ clock-names = "fck", "video1_clk", "video2_clk";
+};
--
2.1.4
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[PATCHv4 07/10] ARM: OMAP2+: display: detect DRA7 DSS
Add platform code to detect DRA7 DSS.
Signed-off-by: Tomi Valkeinen
---
arch/arm/mach-omap2/display.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c
index 9868d0bc7805..6ab13d18c636 100644
--- a/arch/arm/mach-omap2/display.c
+++ b/arch/arm/mach-omap2/display.c
@@ -287,6 +287,8 @@ static enum omapdss_version __init
omap_display_get_version(void)
return OMAPDSS_VER_OMAP5;
else if (soc_is_am43xx())
return OMAPDSS_VER_AM43xx;
+ else if (soc_is_dra7xx())
+ return OMAPDSS_VER_DRA7xx;
else
return OMAPDSS_VER_UNKNOWN;
}
@@ -573,6 +575,7 @@ static const char * const omapdss_compat_names[]
__initconst = {
"ti,omap3-dss",
"ti,omap4-dss",
"ti,omap5-dss",
+ "ti,dra7-dss",
};
struct device_node * __init omapdss_find_dss_of_node(void)
--
2.1.4
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[PATCHv4 05/10] ARM: DRA7: hwmod: set DSS submodule parent hwmods
Set DSS core hwmod as the parent for all the DSS submodules.
Signed-off-by: Tomi Valkeinen
---
arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index f6b94854fafc..9961f95f52ae 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -522,6 +522,7 @@ static struct omap_hwmod dra7xx_dss_dispc_hwmod = {
},
},
.dev_attr = &dss_dispc_dev_attr,
+ .parent_hwmod = &dra7xx_dss_hwmod,
};
/*
@@ -563,6 +564,7 @@ static struct omap_hwmod dra7xx_dss_hdmi_hwmod = {
},
.opt_clks = dss_hdmi_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(dss_hdmi_opt_clks),
+ .parent_hwmod = &dra7xx_dss_hwmod,
};
/*
--
2.1.4
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[PATCHv4 06/10] ARM: OMAP: display: change compat names to array
Simplify the DSS detection logic by creating a list of the omapdss
compat strings, instead of checking each separately with an 'if'.
Signed-off-by: Tomi Valkeinen
---
arch/arm/mach-omap2/display.c | 29 ++---
1 file changed, 14 insertions(+), 15 deletions(-)
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c
index f492ae147c6a..9868d0bc7805 100644
--- a/arch/arm/mach-omap2/display.c
+++ b/arch/arm/mach-omap2/display.c
@@ -568,25 +568,24 @@ void __init omapdss_early_init_of(void)
}
+static const char * const omapdss_compat_names[] __initconst = {
+ "ti,omap2-dss",
+ "ti,omap3-dss",
+ "ti,omap4-dss",
+ "ti,omap5-dss",
+};
+
struct device_node * __init omapdss_find_dss_of_node(void)
{
struct device_node *node;
+ int i;
- node = of_find_compatible_node(NULL, NULL, "ti,omap2-dss");
- if (node)
- return node;
-
- node = of_find_compatible_node(NULL, NULL, "ti,omap3-dss");
- if (node)
- return node;
-
- node = of_find_compatible_node(NULL, NULL, "ti,omap4-dss");
- if (node)
- return node;
-
- node = of_find_compatible_node(NULL, NULL, "ti,omap5-dss");
- if (node)
- return node;
+ for (i = 0; i < ARRAY_SIZE(omapdss_compat_names); ++i) {
+ node = of_find_compatible_node(NULL, NULL,
+ omapdss_compat_names[i]);
+ if (node)
+ return node;
+ }
return NULL;
}
--
2.1.4
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[PATCHv4 04/10] ARM: DRA7: hwmod: add DMM hwmod description
Add DMM hwmod entries for DRA7. This is identical to DMM on OMAP5.
Signed-off-by: Tomi Valkeinen
---
arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 30 ++
1 file changed, 30 insertions(+)
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index 817dbd87ce67..f6b94854fafc 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -49,6 +49,27 @@
*/
/*
+ * 'dmm' class
+ * instance(s): dmm
+ */
+static struct omap_hwmod_class dra7xx_dmm_hwmod_class = {
+ .name = "dmm",
+};
+
+/* dmm */
+static struct omap_hwmod dra7xx_dmm_hwmod = {
+ .name = "dmm",
+ .class = &dra7xx_dmm_hwmod_class,
+ .clkdm_name = "emif_clkdm",
+ .prcm = {
+ .omap4 = {
+ .clkctrl_offs = DRA7XX_CM_EMIF_DMM_CLKCTRL_OFFSET,
+ .context_offs = DRA7XX_RM_EMIF_DMM_CONTEXT_OFFSET,
+ },
+ },
+};
+
+/*
* 'l3' class
* instance(s): l3_instr, l3_main_1, l3_main_2
*/
@@ -2322,6 +2343,14 @@ static struct omap_hwmod dra7xx_wd_timer2_hwmod = {
* Interfaces
*/
+/* l3_main_1 -> dmm */
+static struct omap_hwmod_ocp_if dra7xx_l3_main_1__dmm = {
+ .master = &dra7xx_l3_main_1_hwmod,
+ .slave = &dra7xx_dmm_hwmod,
+ .clk= "l3_iclk_div",
+ .user = OCP_USER_SDMA,
+};
+
/* l3_main_2 -> l3_instr */
static struct omap_hwmod_ocp_if dra7xx_l3_main_2__l3_instr = {
.master = &dra7xx_l3_main_2_hwmod,
@@ -3290,6 +3319,7 @@ static struct omap_hwmod_ocp_if dra7xx_l4_wkup__wd_timer2
= {
};
static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
+ &dra7xx_l3_main_1__dmm,
&dra7xx_l3_main_2__l3_instr,
&dra7xx_l4_cfg__l3_main_1,
&dra7xx_mpu__l3_main_1,
--
2.1.4
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[PATCHv4 10/10] arm/dts: am57xx-beagle-x15.dts: add HDMI
AM57xx Beagle X15 has a HDMI output. This patch adds the device tree
nodes required for HDMI.
Signed-off-by: Tomi Valkeinen
Cc: devicet...@vger.kernel.org
---
arch/arm/boot/dts/am57xx-beagle-x15.dts | 81 +
1 file changed, 81 insertions(+)
diff --git a/arch/arm/boot/dts/am57xx-beagle-x15.dts
b/arch/arm/boot/dts/am57xx-beagle-x15.dts
index 15f198e4864d..f1e430507e4f 100644
--- a/arch/arm/boot/dts/am57xx-beagle-x15.dts
+++ b/arch/arm/boot/dts/am57xx-beagle-x15.dts
@@ -18,6 +18,7 @@
aliases {
rtc0 = &mcp_rtc;
rtc1 = &tps659038_rtc;
+ display0 = &hdmi0;
};
memory {
@@ -102,6 +103,51 @@
pinctrl-names = "default";
pinctrl-0 = <&extcon_usb2_pins>;
};
+
+ hdmi0: connector {
+ compatible = "hdmi-connector";
+ label = "hdmi";
+
+ type = "a";
+
+ port {
+ hdmi_connector_in: endpoint {
+ remote-endpoint = <&tpd12s015_out>;
+ };
+ };
+ };
+
+ tpd12s015: encoder {
+ compatible = "ti,tpd12s015";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&tpd12s015_pins>;
+
+ gpios = <&gpio7 10 GPIO_ACTIVE_HIGH>, /* gpio7_10, CT CP HPD
*/
+ <&gpio6 28 GPIO_ACTIVE_HIGH>, /* gpio6_28, LS OE */
+ <&gpio7 12 GPIO_ACTIVE_HIGH>; /* gpio7_12/sp1_cs2,
HPD */
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ tpd12s015_in: endpoint {
+ remote-endpoint = <&hdmi_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ tpd12s015_out: endpoint {
+ remote-endpoint = <&hdmi_connector_in>;
+ };
+ };
+ };
+ };
};
&dra7_pmx_core {
@@ -121,6 +167,13 @@
>;
};
+ hdmi_pins: pinmux_hdmi_pins {
+ pinctrl-single,pins = <
+ 0x408 (PIN_INPUT | MUX_MODE1) /*
i2c2_sda.hdmi1_ddc_scl */
+ 0x40c (PIN_INPUT | MUX_MODE1) /*
i2c2_scl.hdmi1_ddc_sda */
+ >;
+ };
+
i2c3_pins_default: i2c3_pins_default {
pinctrl-single,pins = <
0x2a4 (PIN_INPUT| MUX_MODE10) /*
mcasp1_aclkx.i2c3_sda */
@@ -277,6 +330,14 @@
0x3e8 (PIN_INPUT_PULLUP | MUX_MODE14) /*
uart1_ctsn.gpio7_24 */
>;
};
+
+ tpd12s015_pins: pinmux_tpd12s015_pins {
+ pinctrl-single,pins = <
+ 0x3b0 (PIN_OUTPUT | MUX_MODE14) /* gpio7_10
CT_CP_HPD */
+ 0x3b8 (PIN_INPUT_PULLDOWN | MUX_MODE14) /* gpio7_12 HPD
*/
+ 0x370 (PIN_OUTPUT | MUX_MODE14) /* gpio6_28
LS_OE */
+ >;
+ };
};
&i2c1 {
@@ -607,3 +668,23 @@
};
};
};
+
+&dss {
+ status = "ok";
+
+ vdda_video-supply = <&ldoln_reg>;
+};
+
+&hdmi {
+ status = "ok";
+ vdda-supply = <&ldo3_reg>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&hdmi_pins>;
+
+ port {
+ hdmi_out: endpoint {
+ remote-endpoint = <&tpd12s015_in>;
+ };
+ };
+};
--
2.1.4
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