RE: [PATCH v2 1/4] dwc3: exynos: Add support for SCLK present on Exynos7

2014-10-13 Thread Anton Tikhomirov
Hello,

 Hi Anton,
 
 On 13.10.2014 06:54, Anton Tikhomirov wrote:
  Hi Vivek,
 
  Exynos7 also has a separate special gate clock going to the IP
  apart from the usual AHB clock. So add support for the same.
 
  As we discussed before, Exynos7 SoCs have 7 clocks to be controlled
  by the driver. Adding only sclk is not enough.
 
 
 I'm quite interested in this discussion. Has it happened on mailing
 lists?

No, we used company messenger for the discussion.

 
 In general, previous SoCs also gave the possibility of controlling all
 the bus clocks separately, in addition to bulk gates, but there was no

correct

 real advantage in using those, while burdening the clock tree with
 numerous clocks. Isn't Exynos7 similar in this aspect?

Exynos7 doesn't have Gating all clocks for USBDRD30 bit. The clocks
should be controlled separately.

 
 Best regards,
 Tomasz
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RE: [PATCH v2 1/4] dwc3: exynos: Add support for SCLK present on Exynos7

2014-10-12 Thread Anton Tikhomirov
Hi Vivek,

 Exynos7 also has a separate special gate clock going to the IP
 apart from the usual AHB clock. So add support for the same.

As we discussed before, Exynos7 SoCs have 7 clocks to be controlled
by the driver. Adding only sclk is not enough. 

 
 Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
 ---
  drivers/usb/dwc3/dwc3-exynos.c |   16 
  1 file changed, 16 insertions(+)
 
 diff --git a/drivers/usb/dwc3/dwc3-exynos.c b/drivers/usb/dwc3/dwc3-
 exynos.c
 index 3951a65..7dc6a98 100644
 --- a/drivers/usb/dwc3/dwc3-exynos.c
 +++ b/drivers/usb/dwc3/dwc3-exynos.c
 @@ -35,6 +35,7 @@ struct dwc3_exynos {
   struct device   *dev;
 
   struct clk  *clk;

The clock clk in Exynos5 just gated all that above 7 clocks, which
we should control separately now in Exynos7.

 + struct clk  *sclk;
   struct regulator*vdd33;
   struct regulator*vdd10;
  };
 @@ -139,10 +140,21 @@ static int dwc3_exynos_probe(struct
 platform_device *pdev)
   return -EINVAL;
   }
 
 + /*
 +  * Exynos7 has a special gate clock going to this IP,
 +  * which in earlier SoCs was probably concealed.
 +  */
 + exynos-sclk = devm_clk_get(dev, usbdrd30_sclk);
 + if (IS_ERR(exynos-sclk)) {
 + dev_info(dev, no sclk specified\n);
 + exynos-sclk = NULL;
 + }
 +
   exynos-dev = dev;
   exynos-clk = clk;
 
   clk_prepare_enable(exynos-clk);
 + clk_prepare_enable(exynos-sclk);
 
   exynos-vdd33 = devm_regulator_get(dev, vdd33);
   if (IS_ERR(exynos-vdd33)) {
 @@ -185,6 +197,7 @@ err4:
  err3:
   regulator_disable(exynos-vdd33);
  err2:
 + clk_disable_unprepare(exynos-sclk);
   clk_disable_unprepare(clk);
   return ret;
  }
 @@ -197,6 +210,7 @@ static int dwc3_exynos_remove(struct
 platform_device *pdev)
   platform_device_unregister(exynos-usb2_phy);
   platform_device_unregister(exynos-usb3_phy);
 
 + clk_disable_unprepare(exynos-sclk);
   clk_disable_unprepare(exynos-clk);
 
   regulator_disable(exynos-vdd33);
 @@ -218,6 +232,7 @@ static int dwc3_exynos_suspend(struct device *dev)
  {
   struct dwc3_exynos *exynos = dev_get_drvdata(dev);
 
 + clk_disable(exynos-sclk);
   clk_disable(exynos-clk);
 
   regulator_disable(exynos-vdd33);
 @@ -243,6 +258,7 @@ static int dwc3_exynos_resume(struct device *dev)
   }
 
   clk_enable(exynos-clk);
 + clk_enable(exynos-sclk);
 
   /* runtime set active to reflect active state. */
   pm_runtime_disable(dev);
 --
 1.7.10.4
 
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RE: [PATCH v2 2/4] phy: exynos5-usbdrd: Add pipe-clk and utmi-clk support

2014-10-12 Thread Anton Tikhomirov
Hi Vivek,

 Exynos7 SoC has now separate gate control for 125MHz pipe3 phy
 clock, as well as 60MHz utmi phy clock.
 So get the same and control in the phy-exynos5-usbdrd driver.

In case of the PHY the situation is pretty much the same as with
DWC3 core. Here we should control 6 clocks to make Exynos7 USB DRD
PHY working.

By the way, the driver name phy-exynos5-usbdrd.c doesn't imply it
supports Exynos7 :)

 
 Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
 ---
  .../devicetree/bindings/phy/samsung-phy.txt|4 
  drivers/phy/phy-exynos5-usbdrd.c   |   22
 
  2 files changed, 26 insertions(+)
 
 diff --git a/Documentation/devicetree/bindings/phy/samsung-phy.txt
 b/Documentation/devicetree/bindings/phy/samsung-phy.txt
 index 15e0f2c..c2bc9dc 100644
 --- a/Documentation/devicetree/bindings/phy/samsung-phy.txt
 +++ b/Documentation/devicetree/bindings/phy/samsung-phy.txt
 @@ -138,6 +138,10 @@ Required properties:
  PHY operations, associated by phy name. It is used to
  determine bit values for clock settings register.
  For Exynos5420 this is given as 'sclk_usbphy30' in CMU.
 + - optional clocks: Exynos7 SoC has now following additional
 +gate clocks available:
 +- phy_pipe: for PIPE3 phy
 +- phy_utmi: for UTMI+ phy
  - samsung,pmu-syscon: phandle for PMU system controller interface,
 used to
 control pmu registers for power isolation.
  - #phy-cells : from the generic PHY bindings, must be 1;
 diff --git a/drivers/phy/phy-exynos5-usbdrd.c b/drivers/phy/phy-
 exynos5-usbdrd.c
 index f756aca..013ee84 100644
 --- a/drivers/phy/phy-exynos5-usbdrd.c
 +++ b/drivers/phy/phy-exynos5-usbdrd.c
 @@ -148,6 +148,8 @@ struct exynos5_usbdrd_phy_drvdata {
   * @dev: pointer to device instance of this platform device
   * @reg_phy: usb phy controller register memory base
   * @clk: phy clock for register access
 + * @pipeclk: clock for pipe3 phy
 + * @utmiclk: clock for utmi+ phy
   * @drv_data: pointer to SoC level driver data structure
   * @phys[]: array for 'EXYNOS5_DRDPHYS_NUM' number of PHY
   *   instances each with its 'phy' and 'phy_cfg'.
 @@ -161,6 +163,8 @@ struct exynos5_usbdrd_phy {
   struct device *dev;
   void __iomem *reg_phy;
   struct clk *clk;
 + struct clk *pipeclk;
 + struct clk *utmiclk;
   const struct exynos5_usbdrd_phy_drvdata *drv_data;
   struct phy_usb_instance {
   struct phy *phy;
 @@ -446,6 +450,8 @@ static int exynos5_usbdrd_phy_power_on(struct phy
 *phy)
 
   dev_dbg(phy_drd-dev, Request to power_on usbdrd_phy phy\n);
 
 + clk_prepare_enable(phy_drd-utmiclk);
 + clk_prepare_enable(phy_drd-pipeclk);
   clk_prepare_enable(phy_drd-ref_clk);
 
   /* Enable VBUS supply */
 @@ -464,6 +470,8 @@ static int exynos5_usbdrd_phy_power_on(struct phy
 *phy)
 
  fail_vbus:
   clk_disable_unprepare(phy_drd-ref_clk);
 + clk_disable_unprepare(phy_drd-pipeclk);
 + clk_disable_unprepare(phy_drd-utmiclk);
 
   return ret;
  }
 @@ -483,6 +491,8 @@ static int exynos5_usbdrd_phy_power_off(struct phy
 *phy)
   regulator_disable(phy_drd-vbus);
 
   clk_disable_unprepare(phy_drd-ref_clk);
 + clk_disable_unprepare(phy_drd-pipeclk);
 + clk_disable_unprepare(phy_drd-utmiclk);
 
   return 0;
  }
 @@ -582,6 +592,18 @@ static int exynos5_usbdrd_phy_probe(struct
 platform_device *pdev)
   return PTR_ERR(phy_drd-clk);
   }
 
 + phy_drd-pipeclk = devm_clk_get(dev, phy_pipe);
 + if (IS_ERR(phy_drd-pipeclk)) {
 + dev_info(dev, PIPE3 phy operational clock not
 specified\n);
 + phy_drd-pipeclk = NULL;
 + }
 +
 + phy_drd-utmiclk = devm_clk_get(dev, phy_utmi);
 + if (IS_ERR(phy_drd-utmiclk)) {
 + dev_info(dev, UTMI phy operational clock not specified\n);
 + phy_drd-utmiclk = NULL;
 + }
 +
   phy_drd-ref_clk = devm_clk_get(dev, ref);
   if (IS_ERR(phy_drd-ref_clk)) {
   dev_err(dev, Failed to get reference clock of usbdrd
 phy\n);
 --
 1.7.10.4
 
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RE: [PATCH v2 3/4] phy: exynos5-usbdrd: Add facility for VBUS-BOOST-5V supply

2014-10-12 Thread Anton Tikhomirov
Hi Vivek,

 Some Exynos SoCs have a separate regulator controlling a

I guess you meant the Exynos based *boards* instead of SoCs,
since Exynos SoCs don't have any boost regulators.

 Boost 5V supply which goes as input for VBUS regulator.
 So adding a control for the same in driver, to enable
 vbus supply on the port.
 
 Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
 ---
  drivers/phy/phy-exynos5-usbdrd.c |   30 --
  1 file changed, 28 insertions(+), 2 deletions(-)
 
 diff --git a/drivers/phy/phy-exynos5-usbdrd.c b/drivers/phy/phy-
 exynos5-usbdrd.c
 index 013ee84..57e8a0a 100644
 --- a/drivers/phy/phy-exynos5-usbdrd.c
 +++ b/drivers/phy/phy-exynos5-usbdrd.c
 @@ -176,6 +176,7 @@ struct exynos5_usbdrd_phy {
   u32 extrefclk;
   struct clk *ref_clk;
   struct regulator *vbus;
 + struct regulator *vbus_boost;
  };
 
  static inline
 @@ -455,11 +456,20 @@ static int exynos5_usbdrd_phy_power_on(struct phy
 *phy)
   clk_prepare_enable(phy_drd-ref_clk);
 
   /* Enable VBUS supply */
 + if (phy_drd-vbus_boost) {
 + ret = regulator_enable(phy_drd-vbus_boost);
 + if (ret) {
 + dev_err(phy_drd-dev,
 + Failed to enable VBUS boost supply\n);
 + goto fail_vbus;
 + }
 + }
 +
   if (phy_drd-vbus) {
   ret = regulator_enable(phy_drd-vbus);
   if (ret) {
   dev_err(phy_drd-dev, Failed to enable VBUS
 supply\n);
 - goto fail_vbus;
 + goto fail_vbus_boost;
   }
   }
 
 @@ -468,6 +478,10 @@ static int exynos5_usbdrd_phy_power_on(struct phy
 *phy)
 
   return 0;
 
 +fail_vbus_boost:
 + if (phy_drd-vbus_boost)
 + regulator_disable(phy_drd-vbus_boost);
 +
  fail_vbus:
   clk_disable_unprepare(phy_drd-ref_clk);
   clk_disable_unprepare(phy_drd-pipeclk);
 @@ -489,6 +503,8 @@ static int exynos5_usbdrd_phy_power_off(struct phy
 *phy)
   /* Disable VBUS supply */
   if (phy_drd-vbus)
   regulator_disable(phy_drd-vbus);
 + if (phy_drd-vbus_boost)
 + regulator_disable(phy_drd-vbus_boost);
 
   clk_disable_unprepare(phy_drd-ref_clk);
   clk_disable_unprepare(phy_drd-pipeclk);
 @@ -644,7 +660,7 @@ static int exynos5_usbdrd_phy_probe(struct
 platform_device *pdev)
   break;
   }
 
 - /* Get Vbus regulator */
 + /* Get Vbus regulators */
   phy_drd-vbus = devm_regulator_get(dev, vbus);
   if (IS_ERR(phy_drd-vbus)) {
   ret = PTR_ERR(phy_drd-vbus);
 @@ -655,6 +671,16 @@ static int exynos5_usbdrd_phy_probe(struct
 platform_device *pdev)
   phy_drd-vbus = NULL;
   }
 
 + phy_drd-vbus_boost = devm_regulator_get(dev, vbus-boost);
 + if (IS_ERR(phy_drd-vbus_boost)) {
 + ret = PTR_ERR(phy_drd-vbus_boost);
 + if (ret == -EPROBE_DEFER)
 + return ret;
 +
 + dev_warn(dev, Failed to get VBUS boost supply
 regulator\n);
 + phy_drd-vbus_boost = NULL;
 + }
 +
   dev_vdbg(dev, Creating usbdrd_phy phy\n);
 
   for (i = 0; i  EXYNOS5_DRDPHYS_NUM; i++) {
 --
 1.7.10.4
 
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RE: [PATCH 3/3] usb: dwc3-exynos: Make provision for vdd regulators

2014-04-23 Thread Anton Tikhomirov
Hello,

 -Original Message-
 From: Vivek Gautam [mailto:gautamvivek1...@gmail.com] On Behalf Of
 Vivek Gautam
 Sent: Monday, April 21, 2014 9:17 PM
 To: linux-...@vger.kernel.org; linux-samsung-...@vger.kernel.org
 Cc: linux-ker...@vger.kernel.org; linux-omap@vger.kernel.org; linux-
 arm-ker...@lists.infradead.org; gre...@linuxfoundation.org;
 st...@rowland.harvard.edu; ba...@ti.com; kgene@samsung.com; Vivek
 Gautam; Anton Tikhomirov
 Subject: [PATCH 3/3] usb: dwc3-exynos: Make provision for vdd
 regulators
 
 Facilitate getting required 3.3V and 1.0V VDD supply for
 DWC3 controller on Exynos.
 
 With patches for regulators' nodes merged in 3.15:
 c8c253f ARM: dts: Add regulator entries to smdk5420
 275dcd2 ARM: dts: add max77686 pmic node for smdk5250,
 
 certain perripherals will now need to ensure that,
 they request VDD regulators in their drivers, and enable
 them so as to make them working.
 
 Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
 Cc: Anton Tikhomirov av.tikhomi...@samsung.com
 ---
 
 Based on 'usb-next' branch of Greg's USB tree.
 Also cleanly applies on 'next' branch of Balbi's USB tree.
 
  drivers/usb/dwc3/dwc3-exynos.c |   51
 ++--
  1 file changed, 49 insertions(+), 2 deletions(-)
 
 diff --git a/drivers/usb/dwc3/dwc3-exynos.c b/drivers/usb/dwc3/dwc3-
 exynos.c
 index 28c8ad7..c9d9102 100644
 --- a/drivers/usb/dwc3/dwc3-exynos.c
 +++ b/drivers/usb/dwc3/dwc3-exynos.c
 @@ -27,6 +27,7 @@
  #include linux/usb/usb_phy_gen_xceiv.h
  #include linux/of.h
  #include linux/of_platform.h
 +#include linux/regulator/consumer.h
 
  struct dwc3_exynos {
   struct platform_device  *usb2_phy;
 @@ -34,6 +35,8 @@ struct dwc3_exynos {
   struct device   *dev;
 
   struct clk  *clk;
 + struct regulator*vdd33;
 + struct regulator*vdd10;
  };
 
  static int dwc3_exynos_register_phys(struct dwc3_exynos *exynos)
 @@ -144,20 +147,46 @@ static int dwc3_exynos_probe(struct
 platform_device *pdev)
 
   clk_prepare_enable(exynos-clk);
 
 + exynos-vdd33 = devm_regulator_get(dev, vdd33);
 + if (IS_ERR(exynos-vdd33)) {
 + ret = PTR_ERR(exynos-vdd33);
 + goto err2;

Is regulator property mandatory for dwc3-exynos? If it is not
and device tree doesn't provide it, dwc3-exynos driver probe shouldn't
fail here.

 + }
 + ret = regulator_enable(exynos-vdd33);
 + if (ret) {
 + dev_err(dev, Failed to enable VDD33 supply\n);
 + goto err2;
 + }
 +

Thanks

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RE: [PATCH 3/3] usb: dwc3-exynos: Make provision for vdd regulators

2014-04-23 Thread Anton Tikhomirov
Hi,

 Hi Anton,
 
 
 On Wed, Apr 23, 2014 at 2:56 PM, Anton Tikhomirov
 av.tikhomi...@samsung.com wrote:
  Hello,
 
  -Original Message-
  From: Vivek Gautam [mailto:gautamvivek1...@gmail.com] On Behalf Of
  Vivek Gautam
  Sent: Monday, April 21, 2014 9:17 PM
  To: linux-...@vger.kernel.org; linux-samsung-...@vger.kernel.org
  Cc: linux-ker...@vger.kernel.org; linux-omap@vger.kernel.org; linux-
  arm-ker...@lists.infradead.org; gre...@linuxfoundation.org;
  st...@rowland.harvard.edu; ba...@ti.com; kgene@samsung.com;
 Vivek
  Gautam; Anton Tikhomirov
  Subject: [PATCH 3/3] usb: dwc3-exynos: Make provision for vdd
  regulators
 
  Facilitate getting required 3.3V and 1.0V VDD supply for
  DWC3 controller on Exynos.
 
  With patches for regulators' nodes merged in 3.15:
  c8c253f ARM: dts: Add regulator entries to smdk5420
  275dcd2 ARM: dts: add max77686 pmic node for smdk5250,
 
  certain perripherals will now need to ensure that,
  they request VDD regulators in their drivers, and enable
  them so as to make them working.
 
  Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
  Cc: Anton Tikhomirov av.tikhomi...@samsung.com
  ---
 
  Based on 'usb-next' branch of Greg's USB tree.
  Also cleanly applies on 'next' branch of Balbi's USB tree.
 
   drivers/usb/dwc3/dwc3-exynos.c |   51
  ++--
   1 file changed, 49 insertions(+), 2 deletions(-)
 
  diff --git a/drivers/usb/dwc3/dwc3-exynos.c b/drivers/usb/dwc3/dwc3-
  exynos.c
  index 28c8ad7..c9d9102 100644
  --- a/drivers/usb/dwc3/dwc3-exynos.c
  +++ b/drivers/usb/dwc3/dwc3-exynos.c
  @@ -27,6 +27,7 @@
   #include linux/usb/usb_phy_gen_xceiv.h
   #include linux/of.h
   #include linux/of_platform.h
  +#include linux/regulator/consumer.h
 
   struct dwc3_exynos {
struct platform_device  *usb2_phy;
  @@ -34,6 +35,8 @@ struct dwc3_exynos {
struct device   *dev;
 
struct clk  *clk;
  + struct regulator*vdd33;
  + struct regulator*vdd10;
   };
 
   static int dwc3_exynos_register_phys(struct dwc3_exynos *exynos)
  @@ -144,20 +147,46 @@ static int dwc3_exynos_probe(struct
  platform_device *pdev)
 
clk_prepare_enable(exynos-clk);
 
  + exynos-vdd33 = devm_regulator_get(dev, vdd33);
  + if (IS_ERR(exynos-vdd33)) {
  + ret = PTR_ERR(exynos-vdd33);
  + goto err2;
 
  Is regulator property mandatory for dwc3-exynos? If it is not
  and device tree doesn't provide it, dwc3-exynos driver probe
 shouldn't
  fail here.
 
 These are the VDD regulators (from PMIC ldo supplies), in absence of
 which the controller will not be powered up.
 So doesn't it make sense to stop the probe when these are not supplied
 by device tree ?

Agree. Just curious, is there special reason for this change except making
things right?


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RE: [PATCH 1/3] usb: ohci-exynos: Make provision for vdd regulators

2014-04-23 Thread Anton Tikhomirov
Hi,

 -Original Message-
 From: linux-usb-ow...@vger.kernel.org [mailto:linux-usb-
 ow...@vger.kernel.org] On Behalf Of Vivek Gautam
 Sent: Monday, April 21, 2014 9:17 PM
 
 Facilitate getting required 3.3V and 1.0V VDD supply for
 OHCI controller on Exynos.
 
 With patches for regulators' nodes merged in 3.15:
 c8c253f ARM: dts: Add regulator entries to smdk5420
 275dcd2 ARM: dts: add max77686 pmic node for smdk5250,
 
 certain perripherals will now need to ensure that,
 they request VDD regulators in their drivers, and enable
 them so as to make them working.
 
 Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
 Cc: Jingoo Han jg1@samsung.com
 ---
 
 Based on 'usb-next' branch of Greg's usb tree.
 
  drivers/usb/host/ohci-exynos.c |   47
 
  1 file changed, 47 insertions(+)
 
 diff --git a/drivers/usb/host/ohci-exynos.c b/drivers/usb/host/ohci-
 exynos.c
 index 68588d8..e2e72a8 100644
 --- a/drivers/usb/host/ohci-exynos.c
 +++ b/drivers/usb/host/ohci-exynos.c
 @@ -18,6 +18,7 @@
  #include linux/module.h
  #include linux/of.h
  #include linux/platform_device.h
 +#include linux/regulator/consumer.h
  #include linux/usb/phy.h
  #include linux/usb/samsung_usb_phy.h
  #include linux/usb.h
 @@ -37,6 +38,8 @@ struct exynos_ohci_hcd {
   struct clk *clk;
   struct usb_phy *phy;
   struct usb_otg *otg;
 + struct regulator *vdd33;
 + struct regulator *vdd10;
  };
 
  static void exynos_ohci_phy_enable(struct platform_device *pdev)
 @@ -98,6 +101,28 @@ static int exynos_ohci_probe(struct platform_device
 *pdev)
   exynos_ohci-otg = phy-otg;
   }
 
 + exynos_ohci-vdd33 = devm_regulator_get(pdev-dev, vdd33);
 + if (IS_ERR(exynos_ohci-vdd33)) {
 + err = PTR_ERR(exynos_ohci-vdd33);
 + goto fail_regulator1;
 + }
 + err = regulator_enable(exynos_ohci-vdd33);
 + if (err) {
 + dev_err(pdev-dev, Failed to enable VDD33 supply\n);
 + goto fail_regulator1;
 + }
 +
 + exynos_ohci-vdd10 = devm_regulator_get(pdev-dev, vdd10);
 + if (IS_ERR(exynos_ohci-vdd10)) {
 + err = PTR_ERR(exynos_ohci-vdd10);
 + goto fail_regulator2;
 + }
 + err = regulator_enable(exynos_ohci-vdd10);
 + if (err) {
 + dev_err(pdev-dev, Failed to enable VDD10 supply\n);
 + goto fail_regulator2;
 + }
 +

Do we need to skip regulator settings together with PHY configuration
in case of exynos5440?

  skip_phy:
   exynos_ohci-clk = devm_clk_get(pdev-dev, usbhost);
 
 @@ -154,6 +179,10 @@ fail_add_hcd:
  fail_io:
   clk_disable_unprepare(exynos_ohci-clk);
  fail_clk:
 + regulator_disable(exynos_ohci-vdd10);
 +fail_regulator2:
 + regulator_disable(exynos_ohci-vdd33);
 +fail_regulator1:
   usb_put_hcd(hcd);
   return err;
  }
 @@ -172,6 +201,9 @@ static int exynos_ohci_remove(struct
 platform_device *pdev)
 
   clk_disable_unprepare(exynos_ohci-clk);
 
 + regulator_disable(exynos_ohci-vdd10);
 + regulator_disable(exynos_ohci-vdd33);
 +
   usb_put_hcd(hcd);
 
   return 0;
 @@ -208,6 +240,9 @@ static int exynos_ohci_suspend(struct device *dev)
 
   clk_disable_unprepare(exynos_ohci-clk);
 
 + regulator_disable(exynos_ohci-vdd10);
 + regulator_disable(exynos_ohci-vdd33);
 +
   spin_unlock_irqrestore(ohci-lock, flags);
 
   return 0;
 @@ -218,6 +253,18 @@ static int exynos_ohci_resume(struct device *dev)
   struct usb_hcd *hcd = dev_get_drvdata(dev);
   struct exynos_ohci_hcd *exynos_ohci = to_exynos_ohci(hcd);
   struct platform_device *pdev= to_platform_device(dev);
 + int ret;
 +
 + ret = regulator_enable(exynos_ohci-vdd33);
 + if (ret) {
 + dev_err(dev, Failed to enable VDD33 supply\n);
 + return ret;

Not sure, but shall we continue resuming and do everything
we can in case of error? At least it will avoid
WARN_ON(clk-enable_count == 0) on next system suspend.

 + }
 + ret = regulator_enable(exynos_ohci-vdd10);
 + if (ret) {
 + dev_err(dev, Failed to enable VDD10 supply\n);
 + return ret;
 + }
 
   clk_prepare_enable(exynos_ohci-clk);
 
 --

Thanks

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RE: [PATCH 1/3] usb: ohci-exynos: Make provision for vdd regulators

2014-04-23 Thread Anton Tikhomirov
Hi,

 Hi,
 
  -Original Message-
  From: linux-usb-ow...@vger.kernel.org [mailto:linux-usb-
  ow...@vger.kernel.org] On Behalf Of Vivek Gautam
  Sent: Monday, April 21, 2014 9:17 PM
 
  Facilitate getting required 3.3V and 1.0V VDD supply for
  OHCI controller on Exynos.
 
  With patches for regulators' nodes merged in 3.15:
  c8c253f ARM: dts: Add regulator entries to smdk5420
  275dcd2 ARM: dts: add max77686 pmic node for smdk5250,
 
  certain perripherals will now need to ensure that,
  they request VDD regulators in their drivers, and enable
  them so as to make them working.
 
  Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
  Cc: Jingoo Han jg1@samsung.com
  ---
 
  Based on 'usb-next' branch of Greg's usb tree.
 
   drivers/usb/host/ohci-exynos.c |   47
  
   1 file changed, 47 insertions(+)
 
  diff --git a/drivers/usb/host/ohci-exynos.c b/drivers/usb/host/ohci-
  exynos.c
  index 68588d8..e2e72a8 100644
  --- a/drivers/usb/host/ohci-exynos.c
  +++ b/drivers/usb/host/ohci-exynos.c
  @@ -18,6 +18,7 @@
   #include linux/module.h
   #include linux/of.h
   #include linux/platform_device.h
  +#include linux/regulator/consumer.h
   #include linux/usb/phy.h
   #include linux/usb/samsung_usb_phy.h
   #include linux/usb.h
  @@ -37,6 +38,8 @@ struct exynos_ohci_hcd {
  struct clk *clk;
  struct usb_phy *phy;
  struct usb_otg *otg;
  +   struct regulator *vdd33;
  +   struct regulator *vdd10;
   };
 
   static void exynos_ohci_phy_enable(struct platform_device *pdev)
  @@ -98,6 +101,28 @@ static int exynos_ohci_probe(struct
 platform_device
  *pdev)
  exynos_ohci-otg = phy-otg;
  }
 
  +   exynos_ohci-vdd33 = devm_regulator_get(pdev-dev, vdd33);
  +   if (IS_ERR(exynos_ohci-vdd33)) {
  +   err = PTR_ERR(exynos_ohci-vdd33);
  +   goto fail_regulator1;
  +   }
  +   err = regulator_enable(exynos_ohci-vdd33);
  +   if (err) {
  +   dev_err(pdev-dev, Failed to enable VDD33 supply\n);
  +   goto fail_regulator1;
  +   }
  +
  +   exynos_ohci-vdd10 = devm_regulator_get(pdev-dev, vdd10);
  +   if (IS_ERR(exynos_ohci-vdd10)) {
  +   err = PTR_ERR(exynos_ohci-vdd10);
  +   goto fail_regulator2;
  +   }
  +   err = regulator_enable(exynos_ohci-vdd10);
  +   if (err) {
  +   dev_err(pdev-dev, Failed to enable VDD10 supply\n);
  +   goto fail_regulator2;
  +   }
  +
 
 Do we need to skip regulator settings together with PHY configuration
 in case of exynos5440?
 
   skip_phy:
  exynos_ohci-clk = devm_clk_get(pdev-dev, usbhost);
 
  @@ -154,6 +179,10 @@ fail_add_hcd:
   fail_io:
  clk_disable_unprepare(exynos_ohci-clk);
   fail_clk:
  +   regulator_disable(exynos_ohci-vdd10);
  +fail_regulator2:
  +   regulator_disable(exynos_ohci-vdd33);
  +fail_regulator1:
  usb_put_hcd(hcd);
  return err;
   }
  @@ -172,6 +201,9 @@ static int exynos_ohci_remove(struct
  platform_device *pdev)
 
  clk_disable_unprepare(exynos_ohci-clk);
 
  +   regulator_disable(exynos_ohci-vdd10);
  +   regulator_disable(exynos_ohci-vdd33);
  +
  usb_put_hcd(hcd);
 
  return 0;
  @@ -208,6 +240,9 @@ static int exynos_ohci_suspend(struct device *dev)
 
  clk_disable_unprepare(exynos_ohci-clk);
 
  +   regulator_disable(exynos_ohci-vdd10);
  +   regulator_disable(exynos_ohci-vdd33);
  +
  spin_unlock_irqrestore(ohci-lock, flags);
 
  return 0;
  @@ -218,6 +253,18 @@ static int exynos_ohci_resume(struct device *dev)
  struct usb_hcd *hcd = dev_get_drvdata(dev);
  struct exynos_ohci_hcd *exynos_ohci = to_exynos_ohci(hcd);
  struct platform_device *pdev= to_platform_device(dev);
  +   int ret;
  +
  +   ret = regulator_enable(exynos_ohci-vdd33);
  +   if (ret) {
  +   dev_err(dev, Failed to enable VDD33 supply\n);
  +   return ret;
 
 Not sure, but shall we continue resuming and do everything
 we can in case of error? At least it will avoid
 WARN_ON(clk-enable_count == 0) on next system suspend.

On the other hand, if power is not applied to the controller,
register access in ohci_resume() may lead to undefined behavior.
What's your opinion?

 
  +   }
  +   ret = regulator_enable(exynos_ohci-vdd10);
  +   if (ret) {
  +   dev_err(dev, Failed to enable VDD10 supply\n);
  +   return ret;
  +   }
 
  clk_prepare_enable(exynos_ohci-clk);
 
  --
 
 Thanks

Thanks

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RE: [PATCH 7/7] usb: dwc3: exynos: add pm_runtime support

2013-12-15 Thread Anton Tikhomirov
Hi Felipe,

 On Fri, Dec 13, 2013 at 02:01:32PM +0900, Anton Tikhomirov wrote:
  Hi Felipe,
 
   -static int dwc3_exynos_suspend(struct device *dev)
   +static int __dwc3_exynos_suspend(struct dwc3_exynos *exynos)
{
   - struct dwc3_exynos *exynos = dev_get_drvdata(dev);
   -
 clk_disable(exynos-clk);
  
 return 0;
}
  
   +static int __dwc3_exynos_resume(struct dwc3_exynos *exynos)
   +{
   + return clk_enable(exynos-clk);
   +}
   +
   +static int dwc3_exynos_suspend(struct device *dev)
   +{
   + struct dwc3_exynos *exynos = dev_get_drvdata(dev);
   +
   + return __dwc3_exynos_suspend(exynos);
 
  If dwc3-exynos is runtime suspended, the clock will be disabled
  second time here (unbalanced clk_enable/clk_disable).
 
 I don't get what you mean but there is something that probably needs
 fixing, I guess below makes it better:
 
 diff --git a/drivers/usb/dwc3/dwc3-exynos.c b/drivers/usb/dwc3/dwc3-
 exynos.c
 index c93919a..1e5720a 100644
 --- a/drivers/usb/dwc3/dwc3-exynos.c
 +++ b/drivers/usb/dwc3/dwc3-exynos.c
 @@ -218,6 +218,9 @@ static int dwc3_exynos_suspend(struct device *dev)
  {
   struct dwc3_exynos *exynos = dev_get_drvdata(dev);
 
 + if (pm_runtime_suspended(dev))
 + return 0;
 +
   return __dwc3_exynos_suspend(exynos);
  }
 
 
 Is that what you meant ?

Yes, this is exactly what I meant.

Thanks.

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RE: [PATCH 7/7] usb: dwc3: exynos: add pm_runtime support

2013-12-15 Thread Anton Tikhomirov
Hi Felipe,

 On Fri, Dec 13, 2013 at 01:56:18PM -0600, Felipe Balbi wrote:
  On Fri, Dec 13, 2013 at 02:01:32PM +0900, Anton Tikhomirov wrote:
   Hi Felipe,
  
-static int dwc3_exynos_suspend(struct device *dev)
+static int __dwc3_exynos_suspend(struct dwc3_exynos *exynos)
 {
-   struct dwc3_exynos *exynos = dev_get_drvdata(dev);
-
clk_disable(exynos-clk);
   
return 0;
 }
   
+static int __dwc3_exynos_resume(struct dwc3_exynos *exynos)
+{
+   return clk_enable(exynos-clk);
+}
+
+static int dwc3_exynos_suspend(struct device *dev)
+{
+   struct dwc3_exynos *exynos = dev_get_drvdata(dev);
+
+   return __dwc3_exynos_suspend(exynos);
  
   If dwc3-exynos is runtime suspended, the clock will be disabled
   second time here (unbalanced clk_enable/clk_disable).
 
  I don't get what you mean but there is something that probably needs
  fixing, I guess below makes it better:
 
  diff --git a/drivers/usb/dwc3/dwc3-exynos.c b/drivers/usb/dwc3/dwc3-
 exynos.c
  index c93919a..1e5720a 100644
  --- a/drivers/usb/dwc3/dwc3-exynos.c
  +++ b/drivers/usb/dwc3/dwc3-exynos.c
  @@ -218,6 +218,9 @@ static int dwc3_exynos_suspend(struct device *dev)
   {
  struct dwc3_exynos *exynos = dev_get_drvdata(dev);
 
  +   if (pm_runtime_suspended(dev))
  +   return 0;
  +
  return __dwc3_exynos_suspend(exynos);
   }
 
 
  Is that what you meant ?
 
 note, however, that this is *not* a case where we would fall today. See
 that we pm_runtime_get() in probe and only pm_runtime_put() during
 remove. So there would never be a case where we would try system
 suspend 
 while device was already runtime suspended.

You are right, while runtime PM is blocked by get_sync() in probe, this
check
doesn't matter.

 
 I have fixed all patches in my testing/next branch anyway, just to make
 sure we're idiot-proof when it comes to implementing real runtime pm
 later on :-)
 
 cheers
 
 --
 balbi

Thank you

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RE: [PATCH 7/7] usb: dwc3: exynos: add pm_runtime support

2013-12-12 Thread Anton Tikhomirov
Hi Felipe,

 -static int dwc3_exynos_suspend(struct device *dev)
 +static int __dwc3_exynos_suspend(struct dwc3_exynos *exynos)
  {
 - struct dwc3_exynos *exynos = dev_get_drvdata(dev);
 -
   clk_disable(exynos-clk);
 
   return 0;
  }
 
 +static int __dwc3_exynos_resume(struct dwc3_exynos *exynos)
 +{
 + return clk_enable(exynos-clk);
 +}
 +
 +static int dwc3_exynos_suspend(struct device *dev)
 +{
 + struct dwc3_exynos *exynos = dev_get_drvdata(dev);
 +
 + return __dwc3_exynos_suspend(exynos);

If dwc3-exynos is runtime suspended, the clock will be disabled
second time here (unbalanced clk_enable/clk_disable).

 +}
 +
  static int dwc3_exynos_resume(struct device *dev)
  {
   struct dwc3_exynos *exynos = dev_get_drvdata(dev);
 + int ret;
 
 - clk_enable(exynos-clk);
 + ret = __dwc3_exynos_resume(exynos);
 + if (ret)
 + return ret;
 
   /* runtime set active to reflect active state. */
   pm_runtime_disable(dev);
 @@ -207,8 +238,24 @@ static int dwc3_exynos_resume(struct device *dev)
   return 0;
  }
 
 +static int dwc3_exynos_runtime_suspend(struct device *dev)
 +{
 + struct dwc3_exynos *exynos = dev_get_drvdata(dev);
 +
 + return __dwc3_exynos_suspend(exynos);
 +}
 +
 +static int dwc3_exynos_runtime_resume(struct device *dev)
 +{
 + struct dwc3_exynos *exynos = dev_get_drvdata(dev);
 +
 + return __dwc3_exynos_resume(exynos);
 +}

Thanks

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