Re: [PATCH] DMAEngine: Define generic transfer request api

2011-09-15 Thread Barry Song
2011/9/13 Barry Song 21cn...@gmail.com:
 2011/9/13 Jassi Brar jaswinder.si...@linaro.org:
 On 13 September 2011 13:16, Barry Song 21cn...@gmail.com wrote:
 if test pass, to the patch, and even for the moment, to the API's idea
 Acked-by: Barry Song baohua.s...@csr.com

 one issue i noticed is with a device_prep_dma_genxfer, i don't need
 device_prep_slave_sg any more,
 Yeah, the damengine would need to adapt to the fact that these
 interleaved tranfers could be Mem-Mem as well as Mem-Dev
 (even though yours could be only one type, but some dmacs could
 do both).

 How about:

       BUG_ON(dma_has_cap(DMA_MEMCPY, device-cap_mask) 
 -               !device-device_prep_dma_memcpy);
 +               !device-device_prep_dma_memcpy 
 +               !device-device_prep_dma_genxfer);

        BUG_ON(dma_has_cap(DMA_SLAVE, device-cap_mask) 
  -               !device-device_prep_slave_sg);
 +               !device-device_prep_slave_sg 
 +               !device-device_prep_dma_genxfer);

 Seems ok, but please modify in a way you think is best and submit a patch
 on top of this new api. Then it'll be easier to evaluate everything.

 i think it should be handled by this patch but not a new one.

and i also think xfer_template is a bad name for a structure which is
an API. i'd like to add namespace for it and rename it to dma_genxfer.
or have any good suggestion?

i'd like to send this together with BUG_ON(dma_has_cap(DMA_SLAVE,
device-cap_mask) !device-device_prep_dma_genxfer) as v2.

-barry
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Re: [PATCH] DMAEngine: Define generic transfer request api

2011-09-15 Thread Jassi Brar
On 15 September 2011 12:01, Barry Song 21cn...@gmail.com wrote:
 2011/9/13 Barry Song 21cn...@gmail.com:
 2011/9/13 Jassi Brar jaswinder.si...@linaro.org:
 On 13 September 2011 13:16, Barry Song 21cn...@gmail.com wrote:
 if test pass, to the patch, and even for the moment, to the API's idea
 Acked-by: Barry Song baohua.s...@csr.com

 one issue i noticed is with a device_prep_dma_genxfer, i don't need
 device_prep_slave_sg any more,
 Yeah, the damengine would need to adapt to the fact that these
 interleaved tranfers could be Mem-Mem as well as Mem-Dev
 (even though yours could be only one type, but some dmacs could
 do both).

 How about:

       BUG_ON(dma_has_cap(DMA_MEMCPY, device-cap_mask) 
 -               !device-device_prep_dma_memcpy);
 +               !device-device_prep_dma_memcpy 
 +               !device-device_prep_dma_genxfer);

        BUG_ON(dma_has_cap(DMA_SLAVE, device-cap_mask) 
  -               !device-device_prep_slave_sg);
 +               !device-device_prep_slave_sg 
 +               !device-device_prep_dma_genxfer);

 Seems ok, but please modify in a way you think is best and submit a patch
 on top of this new api. Then it'll be easier to evaluate everything.

 i think it should be handled by this patch but not a new one.

 and i also think xfer_template is a bad name for a structure which is
 an API. i'd like to add namespace for it and rename it to dma_genxfer.
 or have any good suggestion?
I think xfer_template is better - which stresses the usage as having prepared
templates of transfers and only change src/dst address before submitting.
'device_prep_dma_genxfer' is the API which is already named so.

 i'd like to send this together with BUG_ON(dma_has_cap(DMA_SLAVE,
 device-cap_mask) !device-device_prep_dma_genxfer) as v2.
Is there no change other than skipping check for SLAVE when using this api ?
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Re: [PATCH] DMAEngine: Define generic transfer request api

2011-09-15 Thread Barry Song
2011/9/15 Jassi Brar jaswinder.si...@linaro.org:
 On 15 September 2011 12:01, Barry Song 21cn...@gmail.com wrote:
 2011/9/13 Barry Song 21cn...@gmail.com:
 2011/9/13 Jassi Brar jaswinder.si...@linaro.org:
 On 13 September 2011 13:16, Barry Song 21cn...@gmail.com wrote:
 if test pass, to the patch, and even for the moment, to the API's idea
 Acked-by: Barry Song baohua.s...@csr.com

 one issue i noticed is with a device_prep_dma_genxfer, i don't need
 device_prep_slave_sg any more,
 Yeah, the damengine would need to adapt to the fact that these
 interleaved tranfers could be Mem-Mem as well as Mem-Dev
 (even though yours could be only one type, but some dmacs could
 do both).

 How about:

       BUG_ON(dma_has_cap(DMA_MEMCPY, device-cap_mask) 
 -               !device-device_prep_dma_memcpy);
 +               !device-device_prep_dma_memcpy 
 +               !device-device_prep_dma_genxfer);

        BUG_ON(dma_has_cap(DMA_SLAVE, device-cap_mask) 
  -               !device-device_prep_slave_sg);
 +               !device-device_prep_slave_sg 
 +               !device-device_prep_dma_genxfer);

 Seems ok, but please modify in a way you think is best and submit a patch
 on top of this new api. Then it'll be easier to evaluate everything.

 i think it should be handled by this patch but not a new one.

 and i also think xfer_template is a bad name for a structure which is
 an API. i'd like to add namespace for it and rename it to dma_genxfer.
 or have any good suggestion?
 I think xfer_template is better - which stresses the usage as having prepared
 templates of transfers and only change src/dst address before submitting.
 'device_prep_dma_genxfer' is the API which is already named so.

sorry i can't agree that.
device_prep_dma_genxfer is an API, xfer_template is a data structure
which will be seen by users, client drivers. it at least needs a
namespace. Otherwise, people someday maybe add another xfer.


 i'd like to send this together with BUG_ON(dma_has_cap(DMA_SLAVE,
 device-cap_mask) !device-device_prep_dma_genxfer) as v2.
 Is there no change other than skipping check for SLAVE when using this api ?

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Re: [PATCH] DMAEngine: Define generic transfer request api

2011-09-15 Thread Barry Song
2011/9/15 Jassi Brar jaswinder.si...@linaro.org:
 On 15 September 2011 12:01, Barry Song 21cn...@gmail.com wrote:
 2011/9/13 Barry Song 21cn...@gmail.com:
 2011/9/13 Jassi Brar jaswinder.si...@linaro.org:
 On 13 September 2011 13:16, Barry Song 21cn...@gmail.com wrote:
 if test pass, to the patch, and even for the moment, to the API's idea
 Acked-by: Barry Song baohua.s...@csr.com

 one issue i noticed is with a device_prep_dma_genxfer, i don't need
 device_prep_slave_sg any more,
 Yeah, the damengine would need to adapt to the fact that these
 interleaved tranfers could be Mem-Mem as well as Mem-Dev
 (even though yours could be only one type, but some dmacs could
 do both).

 How about:

       BUG_ON(dma_has_cap(DMA_MEMCPY, device-cap_mask) 
 -               !device-device_prep_dma_memcpy);
 +               !device-device_prep_dma_memcpy 
 +               !device-device_prep_dma_genxfer);

        BUG_ON(dma_has_cap(DMA_SLAVE, device-cap_mask) 
  -               !device-device_prep_slave_sg);
 +               !device-device_prep_slave_sg 
 +               !device-device_prep_dma_genxfer);

 Seems ok, but please modify in a way you think is best and submit a patch
 on top of this new api. Then it'll be easier to evaluate everything.

 i think it should be handled by this patch but not a new one.

 and i also think xfer_template is a bad name for a structure which is
 an API. i'd like to add namespace for it and rename it to dma_genxfer.
 or have any good suggestion?
 I think xfer_template is better - which stresses the usage as having prepared
 templates of transfers and only change src/dst address before submitting.
 'device_prep_dma_genxfer' is the API which is already named so.

 i'd like to send this together with BUG_ON(dma_has_cap(DMA_SLAVE,
 device-cap_mask) !device-device_prep_dma_genxfer) as v2.
 Is there no change other than skipping check for SLAVE when using this api ?

another change i want to do is a simple xfer alloc helper so that
every driver doesn't need a long line to alloc this struct with a zero
length array:

struct xfer_template  *alloc_xfer_template(size_t frame_size)
{
kzalloc(sizeof(struct xfer_template) +
sizeof(struct data_chunk) * frame_size);
}

Then client can fill
xt.sgl[0].size
xt.sgl[0].icg
xt.sgl[1].size
xt.sgl[1].icg
...
xt.sgl[x].size
xt.sgl[x].icg

but xfer_template and data_chunk will have namespace.


-barry
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Re: [PATCH] DMAEngine: Define generic transfer request api

2011-09-13 Thread Barry Song
2011/9/13 Barry Song 21cn...@gmail.com:
 2011/9/13 Jassi Brar jaswinder.si...@linaro.org:
 On 12 September 2011 21:56, Barry Song 21cn...@gmail.com wrote:
 Define a new api that could be used for doing fancy data transfers
 like interleaved to contiguous copy and vice-versa.
 Traditional SG_list based transfers tend to be very inefficient in
 such cases as where the interleave and chunk are only a few bytes,
 which call for a very condensed api to convey pattern of the transfer.

 This api supports all 4 variants of scatter-gather and contiguous transfer.
 Besides, it could also represent common operations like
        device_prep_dma_{cyclic, memset, memcpy}
 and maybe some more that I am not sure of.

 Of course, neither can this api help transfers that don't lend to DMA by
 nature, i.e, scattered tiny read/writes with no periodic pattern.

 Signed-off-by: Jassi Brar jaswinder.si...@linaro.org

 anyway, this API needs a real user to prove why it needs to exist.

 prima2 can be the 1st(?, 2nd if TI uses) user of this API. let's try
 to see what the driver will be with this api. Then we might figure out
 more about what it should be.

 Did you discover any issue with the api?

 no until now, but i need to test as i said since there is nobody else
 has used it before. so i just hold the formal ACK for a moment.

 Because only three days ago you said
 {
 Jassi, you might think my reply as an ACK to [PATCH] DMAEngine:
 Define generic transfer request api.
 }

 if test pass, to the patch, and even for the moment, to the API's idea
 Acked-by: Barry Song baohua.s...@csr.com

one issue i noticed is with a device_prep_dma_genxfer, i don't need
device_prep_slave_sg any more, then the validation check in
dma_async_device_register():

BUG_ON(dma_has_cap(DMA_SLAVE, device-cap_mask) 
!device-device_prep_slave_sg);

is wrong to me.

How about:

   BUG_ON(dma_has_cap(DMA_MEMCPY, device-cap_mask) 
-   !device-device_prep_dma_memcpy);
+   !device-device_prep_dma_memcpy 
+   !device-device_prep_dma_genxfer);

BUG_ON(dma_has_cap(DMA_SLAVE, device-cap_mask) 
 -   !device-device_prep_slave_sg);
+   !device-device_prep_slave_sg 
+   !device-device_prep_dma_genxfer);



 The api met your requirements easily not because I know them already,
 but because I designed the api to be as generic as practically possible.

-barry
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Re: [PATCH] DMAEngine: Define generic transfer request api

2011-09-13 Thread Jassi Brar
On 13 September 2011 13:16, Barry Song 21cn...@gmail.com wrote:
 if test pass, to the patch, and even for the moment, to the API's idea
 Acked-by: Barry Song baohua.s...@csr.com

 one issue i noticed is with a device_prep_dma_genxfer, i don't need
 device_prep_slave_sg any more,
Yeah, the damengine would need to adapt to the fact that these
interleaved tranfers could be Mem-Mem as well as Mem-Dev
(even though yours could be only one type, but some dmacs could
do both).

 How about:

       BUG_ON(dma_has_cap(DMA_MEMCPY, device-cap_mask) 
 -               !device-device_prep_dma_memcpy);
 +               !device-device_prep_dma_memcpy 
 +               !device-device_prep_dma_genxfer);

        BUG_ON(dma_has_cap(DMA_SLAVE, device-cap_mask) 
  -               !device-device_prep_slave_sg);
 +               !device-device_prep_slave_sg 
 +               !device-device_prep_dma_genxfer);

Seems ok, but please modify in a way you think is best and submit a patch
on top of this new api. Then it'll be easier to evaluate everything.

thanks.
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Re: [PATCH] DMAEngine: Define generic transfer request api

2011-09-13 Thread Barry Song
2011/9/13 Jassi Brar jaswinder.si...@linaro.org:
 On 13 September 2011 13:16, Barry Song 21cn...@gmail.com wrote:
 if test pass, to the patch, and even for the moment, to the API's idea
 Acked-by: Barry Song baohua.s...@csr.com

 one issue i noticed is with a device_prep_dma_genxfer, i don't need
 device_prep_slave_sg any more,
 Yeah, the damengine would need to adapt to the fact that these
 interleaved tranfers could be Mem-Mem as well as Mem-Dev
 (even though yours could be only one type, but some dmacs could
 do both).

 How about:

       BUG_ON(dma_has_cap(DMA_MEMCPY, device-cap_mask) 
 -               !device-device_prep_dma_memcpy);
 +               !device-device_prep_dma_memcpy 
 +               !device-device_prep_dma_genxfer);

        BUG_ON(dma_has_cap(DMA_SLAVE, device-cap_mask) 
  -               !device-device_prep_slave_sg);
 +               !device-device_prep_slave_sg 
 +               !device-device_prep_dma_genxfer);

 Seems ok, but please modify in a way you think is best and submit a patch
 on top of this new api. Then it'll be easier to evaluate everything.

i think it should be handled by this patch but not a new one.


 thanks.


-barry
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Re: [PATCH] DMAEngine: Define generic transfer request api

2011-09-12 Thread Barry Song
 Define a new api that could be used for doing fancy data transfers
 like interleaved to contiguous copy and vice-versa.
 Traditional SG_list based transfers tend to be very inefficient in
 such cases as where the interleave and chunk are only a few bytes,
 which call for a very condensed api to convey pattern of the transfer.

 This api supports all 4 variants of scatter-gather and contiguous transfer.
 Besides, it could also represent common operations like
        device_prep_dma_{cyclic, memset, memcpy}
 and maybe some more that I am not sure of.

 Of course, neither can this api help transfers that don't lend to DMA by
 nature, i.e, scattered tiny read/writes with no periodic pattern.

 Signed-off-by: Jassi Brar jaswinder.si...@linaro.org

anyway, this API needs a real user to prove why it needs to exist.

prima2 can be the 1st(?, 2nd if TI uses) user of this API. let's try
to see what the driver will be with this api. Then we might figure out
more about what it should be.

 ---
  include/linux/dmaengine.h |   73 
 +
  1 files changed, 73 insertions(+), 0 deletions(-)

 diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h
 index 8fbf40e..74f3ae0 100644
 --- a/include/linux/dmaengine.h
 +++ b/include/linux/dmaengine.h
 @@ -76,6 +76,76 @@ enum dma_transaction_type {
  /* last transaction type for creation of the capabilities mask */
  #define DMA_TX_TYPE_END (DMA_CYCLIC + 1)

 +/**
 + * Generic Transfer Request
 + * 
 + * A chunk is collection of contiguous bytes to be transfered.
 + * The gap(in bytes) between two chunks is called inter-chunk-gap(ICG).
 + * ICGs may or maynot change between chunks.
 + * A FRAME is the smallest series of contiguous {chunk,icg} pairs,
 + *  that when repeated an integral number of times, specifies the transfer.
 + * A transfer template is specification of a Frame, the number of times
 + *  it is to be repeated and other per-transfer attributes.
 + *
 + * Practically, a client driver would have ready a template for each
 + *  type of transfer it is going to need during its lifetime and
 + *  set only 'src_start' and 'dst_start' before submitting the requests.
 + *
 + *
 + *  |      Frame-1        |       Frame-2       | ~ |       Frame-'numf'  |
 + *  |==.===...=...|==.===...=...| ~ |==.===...=...|
 + *
 + *    ==  Chunk size
 + *    ... ICG
 + */
 +
 +/**
 + * struct data_chunk - Element of scatter-gather list that makes a frame.
 + * @size: Number of bytes to read from source.
 + *       size_dst := fn(op, size_src), so doesn't mean much for destination.
 + * @icg: Number of bytes to jump after last src/dst address of this
 + *      chunk and before first src/dst address for next chunk.
 + *      Ignored for dst(assumed 0), if dst_inc is true and dst_sgl is false.
 + *      Ignored for src(assumed 0), if src_inc is true and src_sgl is false.
 + */
 +struct data_chunk {
 +       size_t size;
 +       size_t icg;
 +};
 +
 +/**
 + * struct xfer_template - Template to convey DMAC the transfer pattern
 + *      and attributes.
 + * @op: The operation to perform on source data before writing it on
 + *      to destination address.
 + * @src_start: Bus address of source for the first chunk.
 + * @dst_start: Bus address of destination for the first chunk.
 + * @src_inc: If the source address increments after reading from it.
 + * @dst_inc: If the destination address increments after writing to it.
 + * @src_sgl: If the 'icg' of sgl[] applies to Source (scattered read).
 + *             Otherwise, source is read contiguously (icg ignored).
 + *             Ignored if src_inc is false.
 + * @dst_sgl: If the 'icg' of sgl[] applies to Destination (scattered write).
 + *             Otherwise, destination is filled contiguously (icg ignored).
 + *             Ignored if dst_inc is false.
 + * @frm_irq: If the client expects DMAC driver to do callback after each 
 frame.
 + * @numf: Number of frames in this template.
 + * @frame_size: Number of chunks in a frame i.e, size of sgl[].
 + * @sgl: Array of {chunk,icg} pairs that make up a frame.
 + */
 +struct xfer_template {
 +       enum dma_transaction_type op;
 +       dma_addr_t src_start;
 +       dma_addr_t dst_start;
 +       bool src_inc;
 +       bool dst_inc;
 +       bool src_sgl;
 +       bool dst_sgl;
 +       bool frm_irq;
 +       size_t numf;
 +       size_t frame_size;
 +       struct data_chunk sgl[0];
 +};

  /**
  * enum dma_ctrl_flags - DMA flags to augment operation preparation,
 @@ -432,6 +502,7 @@ struct dma_tx_state {
  * @device_prep_dma_cyclic: prepare a cyclic dma operation suitable for audio.
  *     The function takes a buffer of size buf_len. The callback function will
  *     be called after period_len bytes have been transferred.
 + * @device_prep_dma_genxfer: Transfer expression in a generic way.
  * @device_control: manipulate all pending operations on a channel, returns
  *     zero or error code
 

Re: [PATCH] DMAEngine: Define generic transfer request api

2011-09-12 Thread Jassi Brar
On 12 September 2011 21:56, Barry Song 21cn...@gmail.com wrote:
 Define a new api that could be used for doing fancy data transfers
 like interleaved to contiguous copy and vice-versa.
 Traditional SG_list based transfers tend to be very inefficient in
 such cases as where the interleave and chunk are only a few bytes,
 which call for a very condensed api to convey pattern of the transfer.

 This api supports all 4 variants of scatter-gather and contiguous transfer.
 Besides, it could also represent common operations like
        device_prep_dma_{cyclic, memset, memcpy}
 and maybe some more that I am not sure of.

 Of course, neither can this api help transfers that don't lend to DMA by
 nature, i.e, scattered tiny read/writes with no periodic pattern.

 Signed-off-by: Jassi Brar jaswinder.si...@linaro.org

 anyway, this API needs a real user to prove why it needs to exist.

 prima2 can be the 1st(?, 2nd if TI uses) user of this API. let's try
 to see what the driver will be with this api. Then we might figure out
 more about what it should be.

Did you discover any issue with the api?
Because only three days ago you said
{
Jassi, you might think my reply as an ACK to [PATCH] DMAEngine:
Define generic transfer request api.
}

The api met your requirements easily not because I know them already,
but because I designed the api to be as generic as practically possible.
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Re: [PATCH] DMAEngine: Define generic transfer request api

2011-09-12 Thread Barry Song
2011/9/13 Jassi Brar jaswinder.si...@linaro.org:
 On 12 September 2011 21:56, Barry Song 21cn...@gmail.com wrote:
 Define a new api that could be used for doing fancy data transfers
 like interleaved to contiguous copy and vice-versa.
 Traditional SG_list based transfers tend to be very inefficient in
 such cases as where the interleave and chunk are only a few bytes,
 which call for a very condensed api to convey pattern of the transfer.

 This api supports all 4 variants of scatter-gather and contiguous transfer.
 Besides, it could also represent common operations like
        device_prep_dma_{cyclic, memset, memcpy}
 and maybe some more that I am not sure of.

 Of course, neither can this api help transfers that don't lend to DMA by
 nature, i.e, scattered tiny read/writes with no periodic pattern.

 Signed-off-by: Jassi Brar jaswinder.si...@linaro.org

 anyway, this API needs a real user to prove why it needs to exist.

 prima2 can be the 1st(?, 2nd if TI uses) user of this API. let's try
 to see what the driver will be with this api. Then we might figure out
 more about what it should be.

 Did you discover any issue with the api?

no until now, but i need to test as i said since there is nobody else
has used it before. so i just hold the formal ACK for a moment.

 Because only three days ago you said
 {
 Jassi, you might think my reply as an ACK to [PATCH] DMAEngine:
 Define generic transfer request api.
 }

if test pass, to the patch, and even for the moment, to the API's idea
Acked-by: Barry Song baohua.s...@csr.com


 The api met your requirements easily not because I know them already,
 but because I designed the api to be as generic as practically possible.


-barry
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Re: [PATCH] DMAEngine: Define generic transfer request api

2011-08-23 Thread Matt Porter
On Aug 19, 2011, at 9:43 AM, Koul, Vinod wrote:

 On Tue, 2011-08-16 at 15:06 +0200, Linus Walleij wrote:
 On Tue, Aug 16, 2011 at 2:56 PM, Koul, Vinod vinod.k...@intel.com wrote:
 
 Currently we have two approaches to solve this problem first being the
 DMA_STRIDE_CONFIG proposed by Linus W, I feel this one is better
 approach as this can give client ability to configure each transfer
 rather than set for the channel. Linus W, do you agree?
 
 I think Sundaram is in the position of doing some heavy work on
 using one or the other of the API:s, and I think he is better
 suited than anyone else of us to select what scheme to use,
 in the end he's going to write the first code using the API.
 And Unfortunately TI folks don't seem to care about this discussion :(
 Haven't seen anything on this from them, or on previous RFC by Jassi

IIRC, Sundaram went on holiday. I suspect he cares a lot about this
discussion as he has a session on the topic at LPC.

-Matt
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Re: [PATCH] DMAEngine: Define generic transfer request api

2011-08-19 Thread Koul, Vinod
On Tue, 2011-08-16 at 15:06 +0200, Linus Walleij wrote:
 On Tue, Aug 16, 2011 at 2:56 PM, Koul, Vinod vinod.k...@intel.com wrote:
 
  Currently we have two approaches to solve this problem first being the
  DMA_STRIDE_CONFIG proposed by Linus W, I feel this one is better
  approach as this can give client ability to configure each transfer
  rather than set for the channel. Linus W, do you agree?
 
 I think Sundaram is in the position of doing some heavy work on
 using one or the other of the API:s, and I think he is better
 suited than anyone else of us to select what scheme to use,
 in the end he's going to write the first code using the API.
And Unfortunately TI folks don't seem to care about this discussion :(
Haven't seen anything on this from them, or on previous RFC by Jassi

-- 
~Vinod

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Re: [PATCH] DMAEngine: Define generic transfer request api

2011-08-19 Thread Linus Walleij
2011/8/19 Koul, Vinod vinod.k...@intel.com:
 On Tue, 2011-08-16 at 15:06 +0200, Linus Walleij wrote:
 On Tue, Aug 16, 2011 at 2:56 PM, Koul, Vinod vinod.k...@intel.com wrote:

 I think Sundaram is in the position of doing some heavy work on
 using one or the other of the API:s, and I think he is better
 suited than anyone else of us to select what scheme to use,
 in the end he's going to write the first code using the API.

 And Unfortunately TI folks don't seem to care about this discussion :(
 Haven't seen anything on this from them, or on previous RFC by Jassi

Well if there is no code usig the API then there is no rush
in merging it either I guess. Whenever someone (TI or
Samsung) cook some driver patches they can choose their
approach.

Thanks,
Linus Walleij
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Re: [PATCH] DMAEngine: Define generic transfer request api

2011-08-19 Thread Jassi Brar
On 19 August 2011 22:58, Koul, Vinod vinod.k...@intel.com wrote:
 On Fri, 2011-08-19 at 21:16 +0530, Jassi Brar wrote:
 On 19 August 2011 19:49, Linus Walleij linus.ml.wall...@gmail.com wrote:
  2011/8/19 Koul, Vinod vinod.k...@intel.com:
  On Tue, 2011-08-16 at 15:06 +0200, Linus Walleij wrote:
  On Tue, Aug 16, 2011 at 2:56 PM, Koul, Vinod vinod.k...@intel.com 
  wrote:
 
  I think Sundaram is in the position of doing some heavy work on
  using one or the other of the API:s, and I think he is better
  suited than anyone else of us to select what scheme to use,
  in the end he's going to write the first code using the API.
 
  And Unfortunately TI folks don't seem to care about this discussion :(
  Haven't seen anything on this from them, or on previous RFC by Jassi
 
  Well if there is no code usig the API then there is no rush
  in merging it either I guess. Whenever someone (TI or
  Samsung) cook some driver patches they can choose their
  approach.
 
 No, it's not a matter of choice.
 If that were the case, Sundaram already proposed a TI specific
 flag. Why wait for him to tell his choice again?

 You might, but I can't molest my sensibility to believe that a Vendor
 specific flag could be better than a generic solution.
 Not here at least, where the overhead due to generality is not much.
 (though I can trim some 'futuristic' members from the 'struct xfer_template')
 Who said anything about adding a vendor flag solution,
Not you, but to whom I replied - LinusW   See https://lkml.org/lkml/2011/7/11/74

 since TI are potential users of the API it would good to know i this fits 
 there needs
 are not.
I am super-interested to hear from TI guys.
The generic api here rather supports the case Sundaram projected as
'most' general case. Look at the figure at end of
https://lkml.org/lkml/2011/6/9/343

 Maintainers might wait as long as they want, but there should never
 be an option to have vendor specific hacks.
 to me API looks decent after reading some specs of DMACs which support
 this mode. Pls send updated patch along with one driver which uses it.
 Should be good to go...
That has been one problem with DMAEngine. People patch the API as they need
stuff, rather than having had solid thought-out API that could be
extended consistently.
For ex, we ended up having _ten_ device_prep_dma_* callbacks, where as
we could have done having had originally 1 (or maybe 2)  'generic'
prepare callback with a 'enum dma_transaction_type op' argument.
IMO it's rather good that I designed this API for a theoretical
highly-capable DMAC,
and not just the DMAC I've worked on - which would have constrained
the api in future
for other DMACs.
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Re: [PATCH] DMAEngine: Define generic transfer request api

2011-08-16 Thread Koul, Vinod
On Fri, 2011-08-12 at 16:44 +0530, Jassi Brar wrote:
 Define a new api that could be used for doing fancy data transfers
 like interleaved to contiguous copy and vice-versa.
 Traditional SG_list based transfers tend to be very inefficient in
 such cases as where the interleave and chunk are only a few bytes,
 which call for a very condensed api to convey pattern of the transfer.
 
 This api supports all 4 variants of scatter-gather and contiguous transfer.
 Besides, it could also represent common operations like
 device_prep_dma_{cyclic, memset, memcpy}
 and maybe some more that I am not sure of.
 
 Of course, neither can this api help transfers that don't lend to DMA by
 nature, i.e, scattered tiny read/writes with no periodic pattern.
 
 Signed-off-by: Jassi Brar jaswinder.si...@linaro.org
 ---
  include/linux/dmaengine.h |   73 
 +
  1 files changed, 73 insertions(+), 0 deletions(-)
 
 diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h
 index 8fbf40e..74f3ae0 100644
 --- a/include/linux/dmaengine.h
 +++ b/include/linux/dmaengine.h
 @@ -76,6 +76,76 @@ enum dma_transaction_type {
  /* last transaction type for creation of the capabilities mask */
  #define DMA_TX_TYPE_END (DMA_CYCLIC + 1)
  
 +/**
 + * Generic Transfer Request
 + * 
 + * A chunk is collection of contiguous bytes to be transfered.
 + * The gap(in bytes) between two chunks is called inter-chunk-gap(ICG).
 + * ICGs may or maynot change between chunks.
 + * A FRAME is the smallest series of contiguous {chunk,icg} pairs,
 + *  that when repeated an integral number of times, specifies the transfer.
 + * A transfer template is specification of a Frame, the number of times
 + *  it is to be repeated and other per-transfer attributes.
 + *
 + * Practically, a client driver would have ready a template for each
 + *  type of transfer it is going to need during its lifetime and
 + *  set only 'src_start' and 'dst_start' before submitting the requests.
 + *
 + *
 + *  |  Frame-1|   Frame-2   | ~ |   Frame-'numf'  |
 + *  |==.===...=...|==.===...=...| ~ |==.===...=...|
 + *
 + *==  Chunk size
 + *... ICG
 + */
 +
 +/**
 + * struct data_chunk - Element of scatter-gather list that makes a frame.
 + * @size: Number of bytes to read from source.
 + * size_dst := fn(op, size_src), so doesn't mean much for destination.
 + * @icg: Number of bytes to jump after last src/dst address of this
 + *chunk and before first src/dst address for next chunk.
 + *Ignored for dst(assumed 0), if dst_inc is true and dst_sgl is false.
 + *Ignored for src(assumed 0), if src_inc is true and src_sgl is false.
 + */
 +struct data_chunk {
 + size_t size;
 + size_t icg;
 +};
 +
 +/**
 + * struct xfer_template - Template to convey DMAC the transfer pattern
 + *and attributes.
 + * @op: The operation to perform on source data before writing it on
 + *to destination address.
 + * @src_start: Bus address of source for the first chunk.
 + * @dst_start: Bus address of destination for the first chunk.
 + * @src_inc: If the source address increments after reading from it.
 + * @dst_inc: If the destination address increments after writing to it.
 + * @src_sgl: If the 'icg' of sgl[] applies to Source (scattered read).
 + *   Otherwise, source is read contiguously (icg ignored).
 + *   Ignored if src_inc is false.
 + * @dst_sgl: If the 'icg' of sgl[] applies to Destination (scattered write).
 + *   Otherwise, destination is filled contiguously (icg ignored).
 + *   Ignored if dst_inc is false.
 + * @frm_irq: If the client expects DMAC driver to do callback after each 
 frame.
 + * @numf: Number of frames in this template.
 + * @frame_size: Number of chunks in a frame i.e, size of sgl[].
 + * @sgl: Array of {chunk,icg} pairs that make up a frame.
 + */
 +struct xfer_template {
 + enum dma_transaction_type op;
 + dma_addr_t src_start;
 + dma_addr_t dst_start;
 + bool src_inc;
 + bool dst_inc;
 + bool src_sgl;
 + bool dst_sgl;
 + bool frm_irq;
 + size_t numf;
 + size_t frame_size;
 + struct data_chunk sgl[0];
 +};
  
  /**
   * enum dma_ctrl_flags - DMA flags to augment operation preparation,
 @@ -432,6 +502,7 @@ struct dma_tx_state {
   * @device_prep_dma_cyclic: prepare a cyclic dma operation suitable for 
 audio.
   *   The function takes a buffer of size buf_len. The callback function will
   *   be called after period_len bytes have been transferred.
 + * @device_prep_dma_genxfer: Transfer expression in a generic way.
   * @device_control: manipulate all pending operations on a channel, returns
   *   zero or error code
   * @device_tx_status: poll for transaction completion, the optional
 @@ -496,6 +567,8 @@ struct dma_device {
   struct dma_async_tx_descriptor *(*device_prep_dma_cyclic)(
   struct dma_chan *chan, 

Re: [PATCH] DMAEngine: Define generic transfer request api

2011-08-16 Thread Linus Walleij
On Tue, Aug 16, 2011 at 2:56 PM, Koul, Vinod vinod.k...@intel.com wrote:

 Currently we have two approaches to solve this problem first being the
 DMA_STRIDE_CONFIG proposed by Linus W, I feel this one is better
 approach as this can give client ability to configure each transfer
 rather than set for the channel. Linus W, do you agree?

I think Sundaram is in the position of doing some heavy work on
using one or the other of the API:s, and I think he is better
suited than anyone else of us to select what scheme to use,
in the end he's going to write the first code using the API.

Yours,
Linus Walleij
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[PATCH] DMAEngine: Define generic transfer request api

2011-08-12 Thread Jassi Brar
Define a new api that could be used for doing fancy data transfers
like interleaved to contiguous copy and vice-versa.
Traditional SG_list based transfers tend to be very inefficient in
such cases as where the interleave and chunk are only a few bytes,
which call for a very condensed api to convey pattern of the transfer.

This api supports all 4 variants of scatter-gather and contiguous transfer.
Besides, it could also represent common operations like
device_prep_dma_{cyclic, memset, memcpy}
and maybe some more that I am not sure of.

Of course, neither can this api help transfers that don't lend to DMA by
nature, i.e, scattered tiny read/writes with no periodic pattern.

Signed-off-by: Jassi Brar jaswinder.si...@linaro.org
---
 include/linux/dmaengine.h |   73 +
 1 files changed, 73 insertions(+), 0 deletions(-)

diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h
index 8fbf40e..74f3ae0 100644
--- a/include/linux/dmaengine.h
+++ b/include/linux/dmaengine.h
@@ -76,6 +76,76 @@ enum dma_transaction_type {
 /* last transaction type for creation of the capabilities mask */
 #define DMA_TX_TYPE_END (DMA_CYCLIC + 1)
 
+/**
+ * Generic Transfer Request
+ * 
+ * A chunk is collection of contiguous bytes to be transfered.
+ * The gap(in bytes) between two chunks is called inter-chunk-gap(ICG).
+ * ICGs may or maynot change between chunks.
+ * A FRAME is the smallest series of contiguous {chunk,icg} pairs,
+ *  that when repeated an integral number of times, specifies the transfer.
+ * A transfer template is specification of a Frame, the number of times
+ *  it is to be repeated and other per-transfer attributes.
+ *
+ * Practically, a client driver would have ready a template for each
+ *  type of transfer it is going to need during its lifetime and
+ *  set only 'src_start' and 'dst_start' before submitting the requests.
+ *
+ *
+ *  |  Frame-1|   Frame-2   | ~ |   Frame-'numf'  |
+ *  |==.===...=...|==.===...=...| ~ |==.===...=...|
+ *
+ *==  Chunk size
+ *... ICG
+ */
+
+/**
+ * struct data_chunk - Element of scatter-gather list that makes a frame.
+ * @size: Number of bytes to read from source.
+ *   size_dst := fn(op, size_src), so doesn't mean much for destination.
+ * @icg: Number of bytes to jump after last src/dst address of this
+ *  chunk and before first src/dst address for next chunk.
+ *  Ignored for dst(assumed 0), if dst_inc is true and dst_sgl is false.
+ *  Ignored for src(assumed 0), if src_inc is true and src_sgl is false.
+ */
+struct data_chunk {
+   size_t size;
+   size_t icg;
+};
+
+/**
+ * struct xfer_template - Template to convey DMAC the transfer pattern
+ *  and attributes.
+ * @op: The operation to perform on source data before writing it on
+ *  to destination address.
+ * @src_start: Bus address of source for the first chunk.
+ * @dst_start: Bus address of destination for the first chunk.
+ * @src_inc: If the source address increments after reading from it.
+ * @dst_inc: If the destination address increments after writing to it.
+ * @src_sgl: If the 'icg' of sgl[] applies to Source (scattered read).
+ * Otherwise, source is read contiguously (icg ignored).
+ * Ignored if src_inc is false.
+ * @dst_sgl: If the 'icg' of sgl[] applies to Destination (scattered write).
+ * Otherwise, destination is filled contiguously (icg ignored).
+ * Ignored if dst_inc is false.
+ * @frm_irq: If the client expects DMAC driver to do callback after each frame.
+ * @numf: Number of frames in this template.
+ * @frame_size: Number of chunks in a frame i.e, size of sgl[].
+ * @sgl: Array of {chunk,icg} pairs that make up a frame.
+ */
+struct xfer_template {
+   enum dma_transaction_type op;
+   dma_addr_t src_start;
+   dma_addr_t dst_start;
+   bool src_inc;
+   bool dst_inc;
+   bool src_sgl;
+   bool dst_sgl;
+   bool frm_irq;
+   size_t numf;
+   size_t frame_size;
+   struct data_chunk sgl[0];
+};
 
 /**
  * enum dma_ctrl_flags - DMA flags to augment operation preparation,
@@ -432,6 +502,7 @@ struct dma_tx_state {
  * @device_prep_dma_cyclic: prepare a cyclic dma operation suitable for audio.
  * The function takes a buffer of size buf_len. The callback function will
  * be called after period_len bytes have been transferred.
+ * @device_prep_dma_genxfer: Transfer expression in a generic way.
  * @device_control: manipulate all pending operations on a channel, returns
  * zero or error code
  * @device_tx_status: poll for transaction completion, the optional
@@ -496,6 +567,8 @@ struct dma_device {
struct dma_async_tx_descriptor *(*device_prep_dma_cyclic)(
struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len,
size_t period_len, enum dma_data_direction direction);
+