Re: [PATCH] OMAP: Fix configuration of J-Type DPLLs to work for OMAP3 and OMAP4
Hi Jon,
thanks for the extra info, the patch looks good to me (modulo the changes
mentioned) and looks safe for 2.6.38.
The queued patch -- slightly modified -- is included below. It has been
added to the 'clk_b_2.6.38' branch on git://git.pwsan.com/linux-2.6, and
has been added to the integration tree at tag
'integration-2.6.38-20101221-005' on git://git.pwsan.com/linux-integration
- Paul
From: Jon Hunter jon-hun...@ti.com
Date: Fri, 17 Dec 2010 14:31:15 -0600
Subject: [PATCH] OMAP: Fix configuration of J-Type DPLLs to work for OMAP3 and
OMAP4
J-Type DPLLs have additional configuration parameters that need to
be programmed when setting the multipler and divider for the DPLL.
These parameters being the sigma delta divider (SD_DIV) for the DPLL
and the digital controlled oscillator (DCO) to be used by the DPLL.
The current code is implemented specifically to configure the
OMAP3630 PER J-Type DPLL. The OMAP4430 USB DPLL is also a J-Type DPLL
and so this code needs to be updated to work for both OMAP3 and OMAP4
devices and any other future devices that have J-TYPE DPLLs.
For the OMAP3630 PER DPLL both the SD_DIV and DCO paramenters are
used but for the OMAP4430 USB DPLL only the SD_DIV field is used.
The current implementation will only program the SD_DIV and DCO
fields if the DPLL has both and hence this does not work for
OMAP4430.
In order to make the code more generic add two new fields to the
dpll_data structure for the SD_DIV field and DCO field bit-masks
and only program these fields if the masks are defined for a specific
DPLL. This simplifies the code and allows us to remove the flag
DPLL_NO_DCO_SEL.
Signed-off-by: Jon Hunter jon-hun...@ti.com
[p...@pwsan.com: removed explicit inlining and added '_' prefix on lookup_*()
functions; added testing info to commit message; added 35xx comments back in]
Signed-off-by: Paul Walmsley p...@pwsan.com
---
arch/arm/mach-omap2/clock.h |1 -
arch/arm/mach-omap2/clock3xxx_data.c|2 +
arch/arm/mach-omap2/clock44xx_data.c|3 +-
arch/arm/mach-omap2/dpll3xxx.c | 53 +++---
arch/arm/plat-omap/include/plat/clock.h |5 ++-
5 files changed, 40 insertions(+), 24 deletions(-)
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index a535c7a..896584e 100644
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -49,7 +49,6 @@
/* DPLL Type and DCO Selection Flags */
#define DPLL_J_TYPE0x1
-#define DPLL_NO_DCO_SEL0x2
int omap2_clk_enable(struct clk *clk);
void omap2_clk_disable(struct clk *clk);
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c
b/arch/arm/mach-omap2/clock3xxx_data.c
index e7a41bc..9ab817e 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -602,6 +602,8 @@ static struct dpll_data dpll4_dd_3630 __initdata = {
.autoidle_mask = OMAP3430_AUTO_PERIPH_DPLL_MASK,
.idlest_reg = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST),
.idlest_mask= OMAP3430_ST_PERIPH_CLK_MASK,
+ .dco_mask = OMAP3630_PERIPH_DPLL_DCO_SEL_MASK,
+ .sddiv_mask = OMAP3630_PERIPH_DPLL_SD_DIV_MASK,
.max_multiplier = OMAP3630_MAX_JTYPE_DPLL_MULT,
.min_divider= 1,
.max_divider= OMAP3_MAX_DPLL_DIV,
diff --git a/arch/arm/mach-omap2/clock44xx_data.c
b/arch/arm/mach-omap2/clock44xx_data.c
index 39c0f24..dad0564 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -947,6 +947,7 @@ static struct dpll_data dpll_unipro_dd = {
.enable_mask= OMAP4430_DPLL_EN_MASK,
.autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK,
.idlest_mask= OMAP4430_ST_DPLL_CLK_MASK,
+ .sddiv_mask = OMAP4430_DPLL_SD_DIV_MASK,
.max_multiplier = OMAP4430_MAX_DPLL_MULT,
.max_divider= OMAP4430_MAX_DPLL_DIV,
.min_divider= 1,
@@ -999,7 +1000,7 @@ static struct clk usb_hs_clk_div_ck = {
static struct dpll_data dpll_usb_dd = {
.mult_div1_reg = OMAP4430_CM_CLKSEL_DPLL_USB,
.clk_bypass = usb_hs_clk_div_ck,
- .flags = DPLL_J_TYPE | DPLL_NO_DCO_SEL,
+ .flags = DPLL_J_TYPE,
.clk_ref= sys_clkin_ck,
.control_reg= OMAP4430_CM_CLKMODE_DPLL_USB,
.modes = (1 DPLL_LOW_POWER_BYPASS) | (1 DPLL_LOCKED),
diff --git a/arch/arm/mach-omap2/dpll3xxx.c b/arch/arm/mach-omap2/dpll3xxx.c
index cb535ee..5e7892f 100644
--- a/arch/arm/mach-omap2/dpll3xxx.c
+++ b/arch/arm/mach-omap2/dpll3xxx.c
@@ -223,23 +223,18 @@ static int _omap3_noncore_dpll_stop(struct clk *clk)
}
/**
- * lookup_dco_sddiv - Set j-type DPLL4 compensation variables
+ * _lookup_dco - Lookup DCO used by j-type DPLL
* @clk: pointer to a DPLL struct clk
* @dco: digital control oscillator selector
- * @sd_div: target sigma-delta divider
* @m: DPLL multiplier to set
* @n: DPLL divider to set
*
* See 36xx TRM
Re: [PATCH] OMAP: Fix configuration of J-Type DPLLs to work for OMAP3 and OMAP4
On Tue, 21 Dec 2010, Paul Walmsley wrote:
The queued patch -- slightly modified -- is included below.
Well, what got posted was a slightly older version. Here's the correct
one. The integration tag that includes this one is
'integration-2.6.38-20101221-006'
I've also added linux-arm-ker...@vger.kernel.org to the Cc:. You might
want to do that when posting future OMAP patches, that saves a little
extra work...
- Paul
From: Jon Hunter jon-hun...@ti.com
Date: Fri, 17 Dec 2010 14:31:15 -0600
Subject: [PATCH] OMAP: Fix configuration of J-Type DPLLs to work for OMAP3 and
OMAP4
J-Type DPLLs have additional configuration parameters that need to
be programmed when setting the multipler and divider for the DPLL.
These parameters being the sigma delta divider (SD_DIV) for the DPLL
and the digital controlled oscillator (DCO) to be used by the DPLL.
The current code is implemented specifically to configure the
OMAP3630 PER J-Type DPLL. The OMAP4430 USB DPLL is also a J-Type DPLL
and so this code needs to be updated to work for both OMAP3 and OMAP4
devices and any other future devices that have J-TYPE DPLLs.
For the OMAP3630 PER DPLL both the SD_DIV and DCO paramenters are
used but for the OMAP4430 USB DPLL only the SD_DIV field is used.
The current implementation will only program the SD_DIV and DCO
fields if the DPLL has both and hence this does not work for
OMAP4430.
In order to make the code more generic add two new fields to the
dpll_data structure for the SD_DIV field and DCO field bit-masks
and only program these fields if the masks are defined for a specific
DPLL. This simplifies the code and allows us to remove the flag
DPLL_NO_DCO_SEL.
Tested on OMAP36xx Zoom3 and OMAP4 Blaze.
Signed-off-by: Jon Hunter jon-hun...@ti.com
[p...@pwsan.com: removed explicit inlining and added '_' prefix on lookup_*()
functions; added testing info to commit message; added 35xx comments back in]
Signed-off-by: Paul Walmsley p...@pwsan.com
---
arch/arm/mach-omap2/clock.h |1 -
arch/arm/mach-omap2/clock3xxx_data.c|2 +
arch/arm/mach-omap2/clock44xx_data.c|3 +-
arch/arm/mach-omap2/dpll3xxx.c | 53 --
arch/arm/plat-omap/include/plat/clock.h |5 ++-
5 files changed, 42 insertions(+), 22 deletions(-)
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index a535c7a..896584e 100644
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -49,7 +49,6 @@
/* DPLL Type and DCO Selection Flags */
#define DPLL_J_TYPE0x1
-#define DPLL_NO_DCO_SEL0x2
int omap2_clk_enable(struct clk *clk);
void omap2_clk_disable(struct clk *clk);
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c
b/arch/arm/mach-omap2/clock3xxx_data.c
index e7a41bc..9ab817e 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -602,6 +602,8 @@ static struct dpll_data dpll4_dd_3630 __initdata = {
.autoidle_mask = OMAP3430_AUTO_PERIPH_DPLL_MASK,
.idlest_reg = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST),
.idlest_mask= OMAP3430_ST_PERIPH_CLK_MASK,
+ .dco_mask = OMAP3630_PERIPH_DPLL_DCO_SEL_MASK,
+ .sddiv_mask = OMAP3630_PERIPH_DPLL_SD_DIV_MASK,
.max_multiplier = OMAP3630_MAX_JTYPE_DPLL_MULT,
.min_divider= 1,
.max_divider= OMAP3_MAX_DPLL_DIV,
diff --git a/arch/arm/mach-omap2/clock44xx_data.c
b/arch/arm/mach-omap2/clock44xx_data.c
index 39c0f24..dad0564 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -947,6 +947,7 @@ static struct dpll_data dpll_unipro_dd = {
.enable_mask= OMAP4430_DPLL_EN_MASK,
.autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK,
.idlest_mask= OMAP4430_ST_DPLL_CLK_MASK,
+ .sddiv_mask = OMAP4430_DPLL_SD_DIV_MASK,
.max_multiplier = OMAP4430_MAX_DPLL_MULT,
.max_divider= OMAP4430_MAX_DPLL_DIV,
.min_divider= 1,
@@ -999,7 +1000,7 @@ static struct clk usb_hs_clk_div_ck = {
static struct dpll_data dpll_usb_dd = {
.mult_div1_reg = OMAP4430_CM_CLKSEL_DPLL_USB,
.clk_bypass = usb_hs_clk_div_ck,
- .flags = DPLL_J_TYPE | DPLL_NO_DCO_SEL,
+ .flags = DPLL_J_TYPE,
.clk_ref= sys_clkin_ck,
.control_reg= OMAP4430_CM_CLKMODE_DPLL_USB,
.modes = (1 DPLL_LOW_POWER_BYPASS) | (1 DPLL_LOCKED),
diff --git a/arch/arm/mach-omap2/dpll3xxx.c b/arch/arm/mach-omap2/dpll3xxx.c
index cb535ee..5df9f53 100644
--- a/arch/arm/mach-omap2/dpll3xxx.c
+++ b/arch/arm/mach-omap2/dpll3xxx.c
@@ -223,10 +223,9 @@ static int _omap3_noncore_dpll_stop(struct clk *clk)
}
/**
- * lookup_dco_sddiv - Set j-type DPLL4 compensation variables
+ * _lookup_dco - Lookup DCO used by j-type DPLL
* @clk: pointer to a DPLL struct clk
* @dco: digital control oscillator selector
- * @sd_div: target sigma-delta divider
* @m: DPLL
Re: [PATCH] OMAP: Fix configuration of J-Type DPLLs to work for OMAP3 and OMAP4
On Tue, 21 Dec 2010, Paul Walmsley wrote: On Tue, 21 Dec 2010, Paul Walmsley wrote: The queued patch -- slightly modified -- is included below. Well, what got posted was a slightly older version. Here's the correct one. The integration tag that includes this one is 'integration-2.6.38-20101221-006' I've also added linux-arm-ker...@vger.kernel.org to the Cc:. You might want to do that when posting future OMAP patches, that saves a little extra work... Well actually it's linux-arm-ker...@lists.infradead.org. Will send them a clean copy without all this noise... - Paul -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] OMAP: Fix configuration of J-Type DPLLs to work for OMAP3 and OMAP4
On 12/18/2010 4:08 AM, Paul Walmsley wrote:
Hello Jon
On Fri, 17 Dec 2010, Jon Hunter wrote:
From: Jon Hunterjon-hun...@ti.com
J-Type DPLLs have additional configuration parameters that need to
be programmed when setting the multipler and divider for the DPLL.
These parameters being the sigma delta divider (SD_DIV) for the DPLL
and the digital controlled oscillator (DCO) to be used by the DPLL.
The current code is implemented specifically to configure the
OMAP3630 PER J-Type DPLL. The OMAP4430 USB DPLL is also a J-Type DPLL
and so this code needs to be updated to work for both OMAP3 and OMAP4
devices and any other future devices that have J-TYPE DPLLs.
For the OMAP3630 PER DPLL both the SD_DIV and DCO paramenters are
used but for the OMAP4430 USB DPLL only the SD_DIV field is used.
The current implementation will only program the SD_DIV and DCO
fields if the DPLL has both and hence this does not work for
OMAP4430.
In order to make the code more generic add two new fields to the
dpll_data structure for the SD_DIV field and DCO field bit-masks
and only program these fields if the masks are defined for a specific
DPLL. This simplifies the code and allows us to remove the flag
DPLL_NO_DCO_SEL.
Has this patch been tested on both OMAP36xx and OMAP4 ?
Yes, I performed a quick validation on both OMAP36xx Zoom3 and OMAP4
Blaze to make sure the values are calculated correctly and I see the
expected result in the register.
Signed-off-by: Jon Hunterjon-hun...@ti.com
---
arch/arm/mach-omap2/clock.h |1 -
arch/arm/mach-omap2/clock3xxx_data.c|2 +
arch/arm/mach-omap2/clock44xx_data.c|3 +-
arch/arm/mach-omap2/dpll3xxx.c | 53 +++---
arch/arm/plat-omap/include/plat/clock.h |5 ++-
5 files changed, 40 insertions(+), 24 deletions(-)
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index a535c7a..896584e 100644
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -49,7 +49,6 @@
/* DPLL Type and DCO Selection Flags */
#define DPLL_J_TYPE 0x1
-#define DPLL_NO_DCO_SEL0x2
int omap2_clk_enable(struct clk *clk);
void omap2_clk_disable(struct clk *clk);
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c
b/arch/arm/mach-omap2/clock3xxx_data.c
index 0579604..461b1ca 100644
Any reason why you're removing this comment?
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -602,6 +602,8 @@ static struct dpll_data dpll4_dd_3630 __initdata = {
.autoidle_mask = OMAP3430_AUTO_PERIPH_DPLL_MASK,
.idlest_reg = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST),
.idlest_mask= OMAP3430_ST_PERIPH_CLK_MASK,
+ .dco_mask = OMAP3630_PERIPH_DPLL_DCO_SEL_MASK,
+ .sddiv_mask = OMAP3630_PERIPH_DPLL_SD_DIV_MASK,
.max_multiplier = OMAP3630_MAX_JTYPE_DPLL_MULT,
.min_divider= 1,
.max_divider= OMAP3_MAX_DPLL_DIV,
diff --git a/arch/arm/mach-omap2/clock44xx_data.c
b/arch/arm/mach-omap2/clock44xx_data.c
index bfcd19f..cef179e 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -913,7 +913,7 @@ static struct clk usb_hs_clk_div_ck = {
static struct dpll_data dpll_usb_dd = {
.mult_div1_reg = OMAP4430_CM_CLKSEL_DPLL_USB,
.clk_bypass =usb_hs_clk_div_ck,
- .flags = DPLL_J_TYPE | DPLL_NO_DCO_SEL,
+ .flags = DPLL_J_TYPE,
.clk_ref=sys_clkin_ck,
.control_reg= OMAP4430_CM_CLKMODE_DPLL_USB,
.modes = (1 DPLL_LOW_POWER_BYPASS) | (1 DPLL_LOCKED),
@@ -924,6 +924,7 @@ static struct dpll_data dpll_usb_dd = {
.enable_mask= OMAP4430_DPLL_EN_MASK,
.autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK,
.idlest_mask= OMAP4430_ST_DPLL_CLK_MASK,
+ .sddiv_mask = OMAP4430_DPLL_SD_DIV_MASK,
.max_multiplier = OMAP4430_MAX_DPLL_MULT,
.max_divider= OMAP4430_MAX_DPLL_DIV,
.min_divider= 1,
diff --git a/arch/arm/mach-omap2/dpll3xxx.c b/arch/arm/mach-omap2/dpll3xxx.c
index ed8d330..48df8e4 100644
--- a/arch/arm/mach-omap2/dpll3xxx.c
+++ b/arch/arm/mach-omap2/dpll3xxx.c
@@ -225,23 +225,18 @@ static int _omap3_noncore_dpll_stop(struct clk *clk)
}
/**
- * lookup_dco_sddiv - Set j-type DPLL4 compensation variables
+ * lookup_dco - Lookup DCO used by j-type DPLL
* @clk: pointer to a DPLL struct clk
* @dco: digital control oscillator selector
- * @sd_div: target sigma-delta divider
* @m: DPLL multiplier to set
* @n: DPLL divider to set
*
* See 36xx TRM section 3.5.3.3.3.2 Type B DPLL (Low-Jitter)
*
- * XXX This code is not needed for 3430/AM35xx; can it be optimized
- * out in non-multi-OMAP builds for those chips?
Any reason why you're removing this comment?
My thought here was that with this change the code will only be called
for DPLLs that have the sddiv_offset and dco_offset
Re: [PATCH] OMAP: Fix configuration of J-Type DPLLs to work for OMAP3 and OMAP4
Hello Jon
On Fri, 17 Dec 2010, Jon Hunter wrote:
From: Jon Hunter jon-hun...@ti.com
J-Type DPLLs have additional configuration parameters that need to
be programmed when setting the multipler and divider for the DPLL.
These parameters being the sigma delta divider (SD_DIV) for the DPLL
and the digital controlled oscillator (DCO) to be used by the DPLL.
The current code is implemented specifically to configure the
OMAP3630 PER J-Type DPLL. The OMAP4430 USB DPLL is also a J-Type DPLL
and so this code needs to be updated to work for both OMAP3 and OMAP4
devices and any other future devices that have J-TYPE DPLLs.
For the OMAP3630 PER DPLL both the SD_DIV and DCO paramenters are
used but for the OMAP4430 USB DPLL only the SD_DIV field is used.
The current implementation will only program the SD_DIV and DCO
fields if the DPLL has both and hence this does not work for
OMAP4430.
In order to make the code more generic add two new fields to the
dpll_data structure for the SD_DIV field and DCO field bit-masks
and only program these fields if the masks are defined for a specific
DPLL. This simplifies the code and allows us to remove the flag
DPLL_NO_DCO_SEL.
Has this patch been tested on both OMAP36xx and OMAP4 ?
Signed-off-by: Jon Hunter jon-hun...@ti.com
---
arch/arm/mach-omap2/clock.h |1 -
arch/arm/mach-omap2/clock3xxx_data.c|2 +
arch/arm/mach-omap2/clock44xx_data.c|3 +-
arch/arm/mach-omap2/dpll3xxx.c | 53 +++---
arch/arm/plat-omap/include/plat/clock.h |5 ++-
5 files changed, 40 insertions(+), 24 deletions(-)
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index a535c7a..896584e 100644
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -49,7 +49,6 @@
/* DPLL Type and DCO Selection Flags */
#define DPLL_J_TYPE 0x1
-#define DPLL_NO_DCO_SEL 0x2
int omap2_clk_enable(struct clk *clk);
void omap2_clk_disable(struct clk *clk);
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c
b/arch/arm/mach-omap2/clock3xxx_data.c
index 0579604..461b1ca 100644
Any reason why you're removing this comment?
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -602,6 +602,8 @@ static struct dpll_data dpll4_dd_3630 __initdata = {
.autoidle_mask = OMAP3430_AUTO_PERIPH_DPLL_MASK,
.idlest_reg = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST),
.idlest_mask= OMAP3430_ST_PERIPH_CLK_MASK,
+ .dco_mask = OMAP3630_PERIPH_DPLL_DCO_SEL_MASK,
+ .sddiv_mask = OMAP3630_PERIPH_DPLL_SD_DIV_MASK,
.max_multiplier = OMAP3630_MAX_JTYPE_DPLL_MULT,
.min_divider= 1,
.max_divider= OMAP3_MAX_DPLL_DIV,
diff --git a/arch/arm/mach-omap2/clock44xx_data.c
b/arch/arm/mach-omap2/clock44xx_data.c
index bfcd19f..cef179e 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -913,7 +913,7 @@ static struct clk usb_hs_clk_div_ck = {
static struct dpll_data dpll_usb_dd = {
.mult_div1_reg = OMAP4430_CM_CLKSEL_DPLL_USB,
.clk_bypass = usb_hs_clk_div_ck,
- .flags = DPLL_J_TYPE | DPLL_NO_DCO_SEL,
+ .flags = DPLL_J_TYPE,
.clk_ref= sys_clkin_ck,
.control_reg= OMAP4430_CM_CLKMODE_DPLL_USB,
.modes = (1 DPLL_LOW_POWER_BYPASS) | (1 DPLL_LOCKED),
@@ -924,6 +924,7 @@ static struct dpll_data dpll_usb_dd = {
.enable_mask= OMAP4430_DPLL_EN_MASK,
.autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK,
.idlest_mask= OMAP4430_ST_DPLL_CLK_MASK,
+ .sddiv_mask = OMAP4430_DPLL_SD_DIV_MASK,
.max_multiplier = OMAP4430_MAX_DPLL_MULT,
.max_divider= OMAP4430_MAX_DPLL_DIV,
.min_divider= 1,
diff --git a/arch/arm/mach-omap2/dpll3xxx.c b/arch/arm/mach-omap2/dpll3xxx.c
index ed8d330..48df8e4 100644
--- a/arch/arm/mach-omap2/dpll3xxx.c
+++ b/arch/arm/mach-omap2/dpll3xxx.c
@@ -225,23 +225,18 @@ static int _omap3_noncore_dpll_stop(struct clk *clk)
}
/**
- * lookup_dco_sddiv - Set j-type DPLL4 compensation variables
+ * lookup_dco - Lookup DCO used by j-type DPLL
* @clk: pointer to a DPLL struct clk
* @dco: digital control oscillator selector
- * @sd_div: target sigma-delta divider
* @m: DPLL multiplier to set
* @n: DPLL divider to set
*
* See 36xx TRM section 3.5.3.3.3.2 Type B DPLL (Low-Jitter)
*
- * XXX This code is not needed for 3430/AM35xx; can it be optimized
- * out in non-multi-OMAP builds for those chips?
Any reason why you're removing this comment?
*/
-static void lookup_dco_sddiv(struct clk *clk, u8 *dco, u8 *sd_div, u16 m,
- u8 n)
+static inline void lookup_dco(struct clk *clk, u8 *dco, u16 m, u8 n)
{
- unsigned long fint, clkinp, sd; /* watch out for overflow */
- int mod1, mod2;
+ unsigned long fint, clkinp;
[PATCH] OMAP: Fix configuration of J-Type DPLLs to work for OMAP3 and OMAP4
From: Jon Hunter jon-hun...@ti.com
J-Type DPLLs have additional configuration parameters that need to
be programmed when setting the multipler and divider for the DPLL.
These parameters being the sigma delta divider (SD_DIV) for the DPLL
and the digital controlled oscillator (DCO) to be used by the DPLL.
The current code is implemented specifically to configure the
OMAP3630 PER J-Type DPLL. The OMAP4430 USB DPLL is also a J-Type DPLL
and so this code needs to be updated to work for both OMAP3 and OMAP4
devices and any other future devices that have J-TYPE DPLLs.
For the OMAP3630 PER DPLL both the SD_DIV and DCO paramenters are
used but for the OMAP4430 USB DPLL only the SD_DIV field is used.
The current implementation will only program the SD_DIV and DCO
fields if the DPLL has both and hence this does not work for
OMAP4430.
In order to make the code more generic add two new fields to the
dpll_data structure for the SD_DIV field and DCO field bit-masks
and only program these fields if the masks are defined for a specific
DPLL. This simplifies the code and allows us to remove the flag
DPLL_NO_DCO_SEL.
Signed-off-by: Jon Hunter jon-hun...@ti.com
---
arch/arm/mach-omap2/clock.h |1 -
arch/arm/mach-omap2/clock3xxx_data.c|2 +
arch/arm/mach-omap2/clock44xx_data.c|3 +-
arch/arm/mach-omap2/dpll3xxx.c | 53 +++---
arch/arm/plat-omap/include/plat/clock.h |5 ++-
5 files changed, 40 insertions(+), 24 deletions(-)
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index a535c7a..896584e 100644
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -49,7 +49,6 @@
/* DPLL Type and DCO Selection Flags */
#define DPLL_J_TYPE0x1
-#define DPLL_NO_DCO_SEL0x2
int omap2_clk_enable(struct clk *clk);
void omap2_clk_disable(struct clk *clk);
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c
b/arch/arm/mach-omap2/clock3xxx_data.c
index 0579604..461b1ca 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -602,6 +602,8 @@ static struct dpll_data dpll4_dd_3630 __initdata = {
.autoidle_mask = OMAP3430_AUTO_PERIPH_DPLL_MASK,
.idlest_reg = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST),
.idlest_mask= OMAP3430_ST_PERIPH_CLK_MASK,
+ .dco_mask = OMAP3630_PERIPH_DPLL_DCO_SEL_MASK,
+ .sddiv_mask = OMAP3630_PERIPH_DPLL_SD_DIV_MASK,
.max_multiplier = OMAP3630_MAX_JTYPE_DPLL_MULT,
.min_divider= 1,
.max_divider= OMAP3_MAX_DPLL_DIV,
diff --git a/arch/arm/mach-omap2/clock44xx_data.c
b/arch/arm/mach-omap2/clock44xx_data.c
index bfcd19f..cef179e 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -913,7 +913,7 @@ static struct clk usb_hs_clk_div_ck = {
static struct dpll_data dpll_usb_dd = {
.mult_div1_reg = OMAP4430_CM_CLKSEL_DPLL_USB,
.clk_bypass = usb_hs_clk_div_ck,
- .flags = DPLL_J_TYPE | DPLL_NO_DCO_SEL,
+ .flags = DPLL_J_TYPE,
.clk_ref= sys_clkin_ck,
.control_reg= OMAP4430_CM_CLKMODE_DPLL_USB,
.modes = (1 DPLL_LOW_POWER_BYPASS) | (1 DPLL_LOCKED),
@@ -924,6 +924,7 @@ static struct dpll_data dpll_usb_dd = {
.enable_mask= OMAP4430_DPLL_EN_MASK,
.autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK,
.idlest_mask= OMAP4430_ST_DPLL_CLK_MASK,
+ .sddiv_mask = OMAP4430_DPLL_SD_DIV_MASK,
.max_multiplier = OMAP4430_MAX_DPLL_MULT,
.max_divider= OMAP4430_MAX_DPLL_DIV,
.min_divider= 1,
diff --git a/arch/arm/mach-omap2/dpll3xxx.c b/arch/arm/mach-omap2/dpll3xxx.c
index ed8d330..48df8e4 100644
--- a/arch/arm/mach-omap2/dpll3xxx.c
+++ b/arch/arm/mach-omap2/dpll3xxx.c
@@ -225,23 +225,18 @@ static int _omap3_noncore_dpll_stop(struct clk *clk)
}
/**
- * lookup_dco_sddiv - Set j-type DPLL4 compensation variables
+ * lookup_dco - Lookup DCO used by j-type DPLL
* @clk: pointer to a DPLL struct clk
* @dco: digital control oscillator selector
- * @sd_div: target sigma-delta divider
* @m: DPLL multiplier to set
* @n: DPLL divider to set
*
* See 36xx TRM section 3.5.3.3.3.2 Type B DPLL (Low-Jitter)
*
- * XXX This code is not needed for 3430/AM35xx; can it be optimized
- * out in non-multi-OMAP builds for those chips?
*/
-static void lookup_dco_sddiv(struct clk *clk, u8 *dco, u8 *sd_div, u16 m,
-u8 n)
+static inline void lookup_dco(struct clk *clk, u8 *dco, u16 m, u8 n)
{
- unsigned long fint, clkinp, sd; /* watch out for overflow */
- int mod1, mod2;
+ unsigned long fint, clkinp; /* watch out for overflow */
clkinp = clk-parent-rate;
fint = (clkinp / n) * m;
@@ -250,6 +245,25 @@ static void lookup_dco_sddiv(struct clk *clk, u8 *dco, u8
*sd_div, u16 m,
*dco = 2;
else
*dco
