The current iommu module doesn't provide the mechanism to get MMU fault on TLB miss when working with locked TLB entries and TWL disabled. To get the TLB miss interrupt, the TWL should be disabled. This patch set provides the option to enable/disable TWL and to enable TLB miss interrupt.
Based on Hiroshi, the initial patch set was revised to add more flexibility to enable TWL. Hari Kanigeri (2): omap: iommu-update irq mask to be specific about twl and tlb omap: iommu-add functionality to get TLB miss interrupt arch/arm/mach-omap2/iommu2.c | 36 ++++++++++++++++++++++++------- arch/arm/plat-omap/include/plat/iommu.h | 2 + arch/arm/plat-omap/iommu.c | 17 ++++++++++++++ 3 files changed, 47 insertions(+), 8 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
