+Cris
+Stanley
Loop in DSP guys in case they would have something to add.
> -Original Message-
> From: Felipe Contreras [mailto:felipe.contre...@gmail.com]
> Sent: Sunday, May 16, 2010 10:46 AM
> To: linux-omap
> Cc: Ramirez Luna, Omar; Guzman Lugo, Fernando; Felipe Contreras
> Subject: [PATCH 06/14] dspbridge: mmu: add hw_mmu_tlb_flush_all()
>
> So that it can be used in more than one place.
>
> Signed-off-by: Felipe Contreras
> ---
> drivers/dsp/bridge/core/tiomap3430.c |9 +
> drivers/dsp/bridge/hw/hw_mmu.c |6 ++
> drivers/dsp/bridge/hw/hw_mmu.h |2 ++
> 3 files changed, 9 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/dsp/bridge/core/tiomap3430.c
> b/drivers/dsp/bridge/core/tiomap3430.c
> index 8a3eff9..d00eaaa 100644
> --- a/drivers/dsp/bridge/core/tiomap3430.c
> +++ b/drivers/dsp/bridge/core/tiomap3430.c
> @@ -74,8 +74,6 @@
> #define PAGES_II_LVL_TABLE 512
> #define PHYS_TO_PAGE(phys) pfn_to_page((phys) >> PAGE_SHIFT)
>
> -#define MMU_GFLUSH 0x60
> -
> /* Forward Declarations: */
> static dsp_status bridge_brd_monitor(struct bridge_dev_context
> *dev_context);
> static dsp_status bridge_brd_read(struct bridge_dev_context *dev_context,
> @@ -216,18 +214,13 @@ static struct bridge_drv_interface
> drv_interface_fxns = {
> bridge_msg_set_queue_id,
> };
>
> -static inline void tlb_flush_all(const void __iomem *base)
> -{
> - __raw_writeb(__raw_readb(base + MMU_GFLUSH) | 1, base + MMU_GFLUSH);
> -}
> -
> static inline void flush_all(struct bridge_dev_context *dev_context)
> {
> if (dev_context->dw_brd_state == BRD_DSP_HIBERNATION ||
> dev_context->dw_brd_state == BRD_HIBERNATION)
> wake_dsp(dev_context, NULL);
>
> - tlb_flush_all(dev_context->dw_dsp_mmu_base);
> + hw_mmu_tlb_flush_all(dev_context->dw_dsp_mmu_base);
> }
>
> static void bad_page_dump(u32 pa, struct page *pg)
> diff --git a/drivers/dsp/bridge/hw/hw_mmu.c
> b/drivers/dsp/bridge/hw/hw_mmu.c
> index 965b659..e593358 100644
> --- a/drivers/dsp/bridge/hw/hw_mmu.c
> +++ b/drivers/dsp/bridge/hw/hw_mmu.c
> @@ -35,6 +35,7 @@
> #define MMU_SMALL_PAGE_MASK 0xF000
>
> #define MMU_LOAD_TLB 0x0001
> +#define MMU_GFLUSH 0x60
>
> /*
> * hw_mmu_page_size_t: Enumerated Type used to specify the MMU Page
> Size(SLSS)
> @@ -585,3 +586,8 @@ static hw_status mmu_set_ram_entry(const void __iomem
> *baseAddress,
> return status;
>
> }
> +
> +void hw_mmu_tlb_flush_all(const void __iomem *base)
> +{
> + __raw_writeb(1, base + MMU_GFLUSH);
> +}
> diff --git a/drivers/dsp/bridge/hw/hw_mmu.h
> b/drivers/dsp/bridge/hw/hw_mmu.h
> index 9b13468..0436974 100644
> --- a/drivers/dsp/bridge/hw/hw_mmu.h
> +++ b/drivers/dsp/bridge/hw/hw_mmu.h
> @@ -97,6 +97,8 @@ extern hw_status hw_mmu_pte_set(const u32 pg_tbl_va,
> extern hw_status hw_mmu_pte_clear(const u32 pg_tbl_va,
> u32 page_size, u32 virtualAddr);
>
> +void hw_mmu_tlb_flush_all(const void __iomem *base);
> +
> static inline u32 hw_mmu_pte_addr_l1(u32 L1_base, u32 va)
> {
> u32 pte_addr;
> --
> 1.7.1
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