This file will get split between sram242x.S and sram243x.S
in following patch.
Signed-off-by: Tony Lindgren [EMAIL PROTECTED]
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 2feb687..6c59b26 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -3,7 +3,7 @@
#
# Common support
-obj-y := irq.o id.o io.o sram-fn.o memory.o control.o prcm.o clock.o mux.o \
+obj-y := irq.o id.o io.o sram242x.o memory.o control.o prcm.o clock.o mux.o \
devices.o serial.o gpmc.o timer-gp.o
# Power Management
diff --git a/arch/arm/mach-omap2/sram-fn.S b/arch/arm/mach-omap2/sram-fn.S
deleted file mode 100644
index 4a9e491..000
--- a/arch/arm/mach-omap2/sram-fn.S
+++ /dev/null
@@ -1,324 +0,0 @@
-/*
- * linux/arch/arm/mach-omap2/sram-fn.S
- *
- * Omap2 specific functions that need to be run in internal SRAM
- *
- * (C) Copyright 2004
- * Texas Instruments, www.ti.com
- * Richard Woodruff [EMAIL PROTECTED]
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-#include linux/linkage.h
-#include asm/assembler.h
-#include asm/arch/io.h
-#include asm/hardware.h
-
-#include sdrc.h
-#include prm.h
-#include cm.h
-
-#define TIMER_32KSYNCT_CR_VIO_ADDRESS(OMAP2420_32KSYNCT_BASE + 0x010)
-
- .text
-
-ENTRY(sram_ddr_init)
- stmfd sp!, {r0 - r12, lr} @ save registers on stack
-
- mov r12, r2 @ capture CS1 vs CS0
- mov r8, r3 @ capture force parameter
-
- /* frequency shift down */
- ldr r2, cm_clksel2_pll @ get address of dpllout reg
- mov r3, #0x1@ value for 1x operation
- str r3, [r2]@ go to L1-freq operation
-
- /* voltage shift down */
- mov r9, #0x1@ set up for L1 voltage call
- bl voltage_shift@ go drop voltage
-
- /* dll lock mode */
- ldr r11, sdrc_dlla_ctrl @ addr of dlla ctrl
- ldr r10, [r11] @ get current val
- cmp r12, #0x1 @ cs1 base (2422 es2.05/1)
- addeq r11, r11, #0x8 @ if cs1 base, move to DLLB
- mvn r9, #0x4@ mask to get clear bit2
- and r10, r10, r9@ clear bit2 for lock mode.
- orr r10, r10, #0x8 @ make sure DLL on (es2 bit pos)
- orr r10, r10, #0x2 @ 90 degree phase for all below 133Mhz
- str r10, [r11] @ commit to DLLA_CTRL
- bl i_dll_wait @ wait for dll to lock
-
- /* get dll value */
- add r11, r11, #0x4 @ get addr of status reg
- ldr r10, [r11] @ get locked value
-
- /* voltage shift up */
- mov r9, #0x0@ shift back to L0-voltage
- bl voltage_shift@ go raise voltage
-
- /* frequency shift up */
- mov r3, #0x2@ value for 2x operation
- str r3, [r2]@ go to L0-freq operation
-
- /* reset entry mode for dllctrl */
- sub r11, r11, #0x4 @ move from status to ctrl
- cmp r12, #0x1 @ normalize if cs1 based
- subeq r11, r11, #0x8 @ possibly back to DLLA
- cmp r8, #0x1@ if forced unlock exit
- orreq r1, r1, #0x4@ make sure exit with unlocked value
- str r1, [r11] @ restore DLLA_CTRL high value
- add r11, r11, #0x8 @ move to DLLB_CTRL addr
- str r1, [r11] @ set value DLLB_CTRL
- bl i_dll_wait @ wait for possible lock
-
- /* set up for return, DDR should be good */
- str r10, [r0] @ write dll_status and return counter
- ldmfd sp!, {r0 - r12, pc} @ restore regs and return
-
- /* ensure the DLL has relocked */
-i_dll_wait:
- mov r4, #0x800 @ delay DLL relock, min 0x400 L3 clocks
-i_dll_delay:
- subsr4, r4, #0x1
- bne i_dll_delay
- mov pc, lr
-
- /*
-* shift up or down voltage, use R9 as input to tell level.
-* wait for it to finish, use 32k sync counter, 1tick=31uS.
-*/
-voltage_shift:
