[PATCH v3 1/3] usb: dwc3: add ST dwc3 glue layer to manage dwc3 HC
This patch adds the ST glue logic to manage the DWC3 HC
on STiH407 SoC family. It manages the powerdown signal,
and configures the internal glue logic and syscfg registers.
Signed-off-by: Giuseppe Cavallaro peppe.cavall...@st.com
Signed-off-by: Peter Griffin peter.grif...@linaro.org
---
drivers/usb/dwc3/Kconfig | 9 ++
drivers/usb/dwc3/Makefile | 1 +
drivers/usb/dwc3/dwc3-st.c | 338 +
3 files changed, 348 insertions(+)
create mode 100644 drivers/usb/dwc3/dwc3-st.c
diff --git a/drivers/usb/dwc3/Kconfig b/drivers/usb/dwc3/Kconfig
index 8eb996e..6c85c43 100644
--- a/drivers/usb/dwc3/Kconfig
+++ b/drivers/usb/dwc3/Kconfig
@@ -79,6 +79,15 @@ config USB_DWC3_KEYSTONE
Support of USB2/3 functionality in TI Keystone2 platforms.
Say 'Y' or 'M' here if you have one such device
+config USB_DWC3_ST
+ tristate STMicroelectronics Platforms
+ depends on ARCH_STI OF
+ default USB_DWC3_HOST
+ help
+ STMicroelectronics SoCs with one DesignWare Core USB3 IP
+ inside (i.e. STiH407).
+ Say 'Y' or 'M' if you have one such device.
+
comment Debugging features
config USB_DWC3_DEBUG
diff --git a/drivers/usb/dwc3/Makefile b/drivers/usb/dwc3/Makefile
index 10ac3e7..11c9f54 100644
--- a/drivers/usb/dwc3/Makefile
+++ b/drivers/usb/dwc3/Makefile
@@ -33,3 +33,4 @@ obj-$(CONFIG_USB_DWC3_OMAP) += dwc3-omap.o
obj-$(CONFIG_USB_DWC3_EXYNOS) += dwc3-exynos.o
obj-$(CONFIG_USB_DWC3_PCI) += dwc3-pci.o
obj-$(CONFIG_USB_DWC3_KEYSTONE)+= dwc3-keystone.o
+obj-$(CONFIG_USB_DWC3_ST) += dwc3-st.o
diff --git a/drivers/usb/dwc3/dwc3-st.c b/drivers/usb/dwc3/dwc3-st.c
new file mode 100644
index 000..a93ea19
--- /dev/null
+++ b/drivers/usb/dwc3/dwc3-st.c
@@ -0,0 +1,338 @@
+/**
+ * dwc3-st.c Support for dwc3 platform devices on ST Microelectronics platforms
+ *
+ * This is a small driver for the dwc3 to provide the glue logic
+ * to configure the controller. Tested on STi platforms.
+ *
+ * Copyright (C) 2014 Stmicroelectronics
+ *
+ * Author: Giuseppe Cavallaro peppe.cavall...@st.com
+ * Contributors: Aymen Bouattay aymen.bouat...@st.com
+ * Peter Griffin peter.grif...@linaro.org
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * Inspired by dwc3-omap.c and dwc3-exynos.c.
+ */
+
+#include linux/delay.h
+#include linux/interrupt.h
+#include linux/io.h
+#include linux/ioport.h
+#include linux/kernel.h
+#include linux/mfd/syscon.h
+#include linux/module.h
+#include linux/of.h
+#include linux/of_platform.h
+#include linux/platform_device.h
+#include linux/slab.h
+#include linux/regmap.h
+#include linux/reset.h
+#include linux/usb/of.h
+
+#include core.h
+#include io.h
+
+/* glue registers */
+#define CLKRST_CTRL0x00
+#define AUX_CLK_EN BIT(0)
+#define SW_PIPEW_RESET_N BIT(4)
+#define EXT_CFG_RESET_NBIT(8)
+/*
+ * 1'b0 : The host controller complies with the xHCI revision 0.96
+ * 1'b1 : The host controller complies with the xHCI revision 1.0
+ */
+#define XHCI_REVISION BIT(12)
+
+#define USB2_VBUS_MNGMNT_SEL1 0x2C
+/*
+ * For all fields in USB2_VBUS_MNGMNT_SEL1
+ * 2’b00 : Override value from Reg 0x30 is selected
+ * 2’b01 : utmiotg_signal_name from usb3_top is selected
+ * 2’b10 : pipew_signal_name from PIPEW instance is selected
+ * 2’b11 : value is 1'b0
+ */
+#define REG30 0x0
+#define UTMIOTG0x1
+#define PIPEW 0x2
+#define ZERO 0x3
+
+#define SEL_OVERRIDE_VBUSVALID(n) (n 0)
+#define SEL_OVERRIDE_POWERPRESENT(n) (n 4)
+#define SEL_OVERRIDE_BVALID(n) (n 8)
+
+/* Static DRD configuration */
+#define USB_HOST_DEFAULT_MASK 0xffe
+#define USB_SET_PORT_DEVICE0x1
+
+/**
+ * struct st_dwc3 - st-dwc3 driver private structure
+ * @dwc3: platform device pointer
+ * @dev: device pointer
+ * @glue_base ioaddr for the glue registers
+ * @regmap regmap pointer for getting syscfg
+ * @syscfg_reg_off usb syscfg control offset
+ * @dr_modedrd static host/device config
+ * @rstc_pwrdn rest controller for powerdown signal
+ * @rstc_rst reset controller for softreset signal
+ *
+ */
+
+struct st_dwc3 {
+ struct device *dev;
+ void __iomem *glue_base;
+ struct regmap *regmap;
+ int syscfg_reg_off;
+ enum usb_dr_mode dr_mode;
+ struct reset_control *rstc_pwrdn;
+ struct reset_control *rstc_rst;
+};
+
+static inline u32 st_dwc3_readl(void __iomem *base, u32 offset)
+{
+ return readl_relaxed(base + offset);
+}
+
+static inline void st_dwc3_writel(void __iomem *base, u32 offset, u32 value)
+{
+ writel_relaxed(value, base + offset);
+}
+
Re: [PATCH v3 1/3] usb: dwc3: add ST dwc3 glue layer to manage dwc3 HC
On Wed, 23 Jul 2014, Peter Griffin wrote:
This patch adds the ST glue logic to manage the DWC3 HC
on STiH407 SoC family. It manages the powerdown signal,
and configures the internal glue logic and syscfg registers.
Signed-off-by: Giuseppe Cavallaro peppe.cavall...@st.com
Signed-off-by: Peter Griffin peter.grif...@linaro.org
---
drivers/usb/dwc3/Kconfig | 9 ++
drivers/usb/dwc3/Makefile | 1 +
drivers/usb/dwc3/dwc3-st.c | 338
+
3 files changed, 348 insertions(+)
create mode 100644 drivers/usb/dwc3/dwc3-st.c
[...]
+/*
+ * For all fields in USB2_VBUS_MNGMNT_SEL1
+ * 2’b00 : Override value from Reg 0x30 is selected
+ * 2’b01 : utmiotg_signal_name from usb3_top is selected
+ * 2’b10 : pipew_signal_name from PIPEW instance is selected
+ * 2’b11 : value is 1'b0
+ */
+#define REG300x0
+#define UTMIOTG 0x1
+#define PIPEW0x2
+#define ZERO 0x3
Possible register values are usually prefixed with something
descriptive which identifies them.
USB2_VBUS_ looks appropriate here.
[...]
+/**
+ * struct st_dwc3 - st-dwc3 driver private structure
+ * @dwc3:platform device pointer
+ * @dev: device pointer
+ * @glue_baseioaddr for the glue registers
+ * @regmap regmap pointer for getting syscfg
+ * @syscfg_reg_off usb syscfg control offset
+ * @dr_mode drd static host/device config
+ * @rstc_pwrdn rest controller for powerdown signal
+ * @rstc_rst reset controller for softreset signal
Some of these have ':', some of them don't. I suggest you standardise
to 'all do'.
+ *
Superflous line in comment.
+ */
+
Superflous '\n'.
Take a look how you did the function headers below.
[...]
+static int st_dwc3_drd_init(struct st_dwc3 *dwc3_data)
+{
+ u32 val;
+ int err;
+
+ err = regmap_read(dwc3_data-regmap, dwc3_data-syscfg_reg_off, val);
+ if (err)
+ return err;
+
+ switch (dwc3_data-dr_mode) {
+ case USB_DR_MODE_PERIPHERAL:
+ val |= USB_SET_PORT_DEVICE;
+ dev_dbg(dwc3_data-dev, Configuring as Device\n);
+ break;
+
+ case USB_DR_MODE_HOST:
+ val = USB_HOST_DEFAULT_MASK;
+ dev_dbg(dwc3_data-dev, Configuring as Host\n);
+ break;
+
+ default:
+ dev_err(dwc3_data-dev, Unsupported mode of operation %d\n
+ , dwc3_data-dr_mode);
',' should be on the line above.
+ return -EINVAL;
+ }
+
+ return regmap_write(dwc3_data-regmap, dwc3_data-syscfg_reg_off, val);
+}
All of this stuff is pretty minor.
Once fixed apply my Ack on the next revision:
Acked-by: Lee Jones lee.jo...@linaro.org
--
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
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