The HS USB 2 PHY gets its clock from AUXCLK1. Provide this
information.

Signed-off-by: Roger Quadros <rog...@ti.com>
---
 arch/arm/boot/dts/omap5-uevm.dts | 8 ++------
 1 file changed, 2 insertions(+), 6 deletions(-)

diff --git a/arch/arm/boot/dts/omap5-uevm.dts b/arch/arm/boot/dts/omap5-uevm.dts
index 002fa70..3b99ec2 100644
--- a/arch/arm/boot/dts/omap5-uevm.dts
+++ b/arch/arm/boot/dts/omap5-uevm.dts
@@ -31,12 +31,8 @@
        hsusb2_phy: hsusb2_phy {
                compatible = "usb-nop-xceiv";
                reset-gpios = <&gpio3 16 GPIO_ACTIVE_LOW>; /* gpio3_80 
HUB_NRESET */
-       /**
-         * FIXME
-         * Put the right clock phandle here when available
-         *     clocks = <&auxclk1>;
-         *     clock-names = "main_clk";
-         */
+               clocks = <&auxclk1_ck>;
+               clock-names = "main_clk";
                clock-frequency = <19200000>;
        };
 
-- 
1.8.3.2

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