Re: [PATCHv5 26/35] ARM: dts: omap3: add minimal l4 bus layout with control module support

2015-03-31 Thread Tero Kristo 

On 03/31/2015 01:56 AM, Tony Lindgren wrote:

Hi,

* Tero Kristo t-kri...@ti.com [150320 11:46]:

--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -87,6 +87,60 @@
ranges;
ti,hwmods = l3_main;

+   l4_core: l4@4800 {
+   compatible = ti,omap3-l4-core, simple-bus;
+   #address-cells = 1;
+   #size-cells = 1;
+   ranges = 0 0x4800 0x100;
+
+   scm: scm@2000 {
+   compatible = ti,omap3-scm, simple-bus;
+   reg = 0x2000 0x2000;
+   #address-cells = 1;
+   #size-cells = 1;
+   ranges = 0 0x2000 0x2000;
+
+   omap3_pmx_core: pinmux@30 {
+   compatible = ti,omap3-padconf,
+pinctrl-single;
+   reg = 0x30 0x230;
+   #address-cells = 1;
+   #size-cells = 0;
+   #interrupt-cells = 1;
+   interrupt-controller;
+   pinctrl-single,register-width = 16;
+   pinctrl-single,function-mask = 0xff1f;
+   };


Just noticed we may be now missing few pins as diffing the dmesg before
and after this series produces this on omap3:

-pinctrl-single 48002030.pinmux: 284 pins at pa fa002030 size 568
+pinctrl-single 48002030.pinmux: 280 pins at pa fa002030 size 560

Care to check that?


True, there is a typo in the omap3.dtsi file. Will fix this and repost.

-Tero
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Re: [PATCHv5 26/35] ARM: dts: omap3: add minimal l4 bus layout with control module support

2015-03-30 Thread Tony Lindgren 
Hi,

* Tero Kristo t-kri...@ti.com [150320 11:46]:
 --- a/arch/arm/boot/dts/omap3.dtsi
 +++ b/arch/arm/boot/dts/omap3.dtsi
 @@ -87,6 +87,60 @@
   ranges;
   ti,hwmods = l3_main;
  
 + l4_core: l4@4800 {
 + compatible = ti,omap3-l4-core, simple-bus;
 + #address-cells = 1;
 + #size-cells = 1;
 + ranges = 0 0x4800 0x100;
 +
 + scm: scm@2000 {
 + compatible = ti,omap3-scm, simple-bus;
 + reg = 0x2000 0x2000;
 + #address-cells = 1;
 + #size-cells = 1;
 + ranges = 0 0x2000 0x2000;
 +
 + omap3_pmx_core: pinmux@30 {
 + compatible = ti,omap3-padconf,
 +  pinctrl-single;
 + reg = 0x30 0x230;
 + #address-cells = 1;
 + #size-cells = 0;
 + #interrupt-cells = 1;
 + interrupt-controller;
 + pinctrl-single,register-width = 16;
 + pinctrl-single,function-mask = 0xff1f;
 + };

Just noticed we may be now missing few pins as diffing the dmesg before
and after this series produces this on omap3:

-pinctrl-single 48002030.pinmux: 284 pins at pa fa002030 size 568
+pinctrl-single 48002030.pinmux: 280 pins at pa fa002030 size 560

Care to check that?

Regards,

Tony
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[PATCHv5 26/35] ARM: dts: omap3: add minimal l4 bus layout with control module support

2015-03-20 Thread Tero Kristo 
This patch creates an l4_core interconnect for OMAP3, and moves some
of the generic peripherals under it. System control module nodes are
moved under this new interconnect also, and the SCM clock layout
is changed to use the renamed SCM node as the clock provider.

Signed-off-by: Tero Kristo t-kri...@ti.com
Reported-by: Tony Lindgren t...@atomide.com
---
 Documentation/devicetree/bindings/arm/omap/l4.txt  |1 +
 .../devicetree/bindings/arm/omap/prcm.txt  |2 +-
 arch/arm/boot/dts/am3517.dtsi  |2 +-
 arch/arm/boot/dts/am35xx-clocks.dtsi   |2 +-
 arch/arm/boot/dts/omap3.dtsi   |   96 +++-
 arch/arm/boot/dts/omap3xxx-clocks.dtsi |   13 +--
 arch/arm/mach-omap2/control.c  |2 +-
 7 files changed, 67 insertions(+), 51 deletions(-)

diff --git a/Documentation/devicetree/bindings/arm/omap/l4.txt 
b/Documentation/devicetree/bindings/arm/omap/l4.txt
index 57569cc8..6402022 100644
--- a/Documentation/devicetree/bindings/arm/omap/l4.txt
+++ b/Documentation/devicetree/bindings/arm/omap/l4.txt
@@ -5,6 +5,7 @@ These bindings describe the OMAP SoCs L4 interconnect bus.
 Required properties:
 - compatible : Should be ti,omap2-l4 for OMAP2 family l4 core bus
   Should be ti,omap2-l4-wkup for OMAP2 family l4 wkup bus
+  Should be ti,omap3-l4-core for OMAP3 family l4 core bus
 - ranges : contains the IO map range for the bus
 
 Examples:
diff --git a/Documentation/devicetree/bindings/arm/omap/prcm.txt 
b/Documentation/devicetree/bindings/arm/omap/prcm.txt
index cce8365..ef5a74b 100644
--- a/Documentation/devicetree/bindings/arm/omap/prcm.txt
+++ b/Documentation/devicetree/bindings/arm/omap/prcm.txt
@@ -17,7 +17,7 @@ Required properties:
ti,omap2-scm
ti,omap3-prm
ti,omap3-cm
-   ti,omap3-scrm
+   ti,omap3-scm
ti,omap4-cm1
ti,omap4-prm
ti,omap4-cm2
diff --git a/arch/arm/boot/dts/am3517.dtsi b/arch/arm/boot/dts/am3517.dtsi
index c90724b..f164dce 100644
--- a/arch/arm/boot/dts/am3517.dtsi
+++ b/arch/arm/boot/dts/am3517.dtsi
@@ -31,7 +31,7 @@
status = disabled;
reg = 0x5c00 0x3;
interrupts = 67 68 69 70;
-   syscon = omap3_scm_general;
+   syscon = scm_conf;
ti,davinci-ctrl-reg-offset = 0x1;
ti,davinci-ctrl-mod-reg-offset = 0;
ti,davinci-ctrl-ram-offset = 0x2;
diff --git a/arch/arm/boot/dts/am35xx-clocks.dtsi 
b/arch/arm/boot/dts/am35xx-clocks.dtsi
index df489d3..518b8fd 100644
--- a/arch/arm/boot/dts/am35xx-clocks.dtsi
+++ b/arch/arm/boot/dts/am35xx-clocks.dtsi
@@ -7,7 +7,7 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
-scrm_clocks {
+scm_clocks {
emac_ick: emac_ick {
#clock-cells = 0;
compatible = ti,am35xx-gate-clock;
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index 01b7111..0020a7a8 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -87,6 +87,60 @@
ranges;
ti,hwmods = l3_main;
 
+   l4_core: l4@4800 {
+   compatible = ti,omap3-l4-core, simple-bus;
+   #address-cells = 1;
+   #size-cells = 1;
+   ranges = 0 0x4800 0x100;
+
+   scm: scm@2000 {
+   compatible = ti,omap3-scm, simple-bus;
+   reg = 0x2000 0x2000;
+   #address-cells = 1;
+   #size-cells = 1;
+   ranges = 0 0x2000 0x2000;
+
+   omap3_pmx_core: pinmux@30 {
+   compatible = ti,omap3-padconf,
+pinctrl-single;
+   reg = 0x30 0x230;
+   #address-cells = 1;
+   #size-cells = 0;
+   #interrupt-cells = 1;
+   interrupt-controller;
+   pinctrl-single,register-width = 16;
+   pinctrl-single,function-mask = 0xff1f;
+   };
+
+   scm_conf: scm_conf@270 {
+   compatible = syscon;
+   reg = 0x270 0x330;
+   #address-cells = 1;
+   #size-cells = 1;
+
+