RE: [PATCH V2 1/7] DRIVERS: IRQCHIP: IRQ-GIC: Add support for routable irqs

2013-10-31 Thread R, Sricharan
Hi Thomas,
  Sorry for top posting. My mailer is not allowing me any formatting.

  I agree with both of your comments below.
  I will post V3 for this.

Regards,
 Sricharan


From: Thomas Gleixner [t...@linutronix.de]
Sent: Wednesday, October 30, 2013 8:45 PM
To: R, Sricharan
Cc: linux-ker...@vger.kernel.org; devicet...@vger.kernel.org; 
linux-...@vger.kernel.org; linux-arm-ker...@lists.infradead.org; 
linux-omap@vger.kernel.org; linus.wall...@linaro.org; li...@arm.linux.org.uk; 
t...@atomide.com; Nayak, Rajendra; marc.zyng...@arm.com; 
grant.lik...@linaro.org; mark.rutl...@arm.com; robherri...@gmail.com; 
Shilimkar, Santosh; Rob Herring
Subject: Re: [PATCH V2 1/7] DRIVERS: IRQCHIP: IRQ-GIC: Add support for routable 
irqs

On Wed, 30 Oct 2013, Sricharan R wrote:
 @@ -700,11 +709,22 @@ static int gic_irq_domain_xlate(struct irq_domain *d,
   *out_hwirq = intspec[1] + 16;

   /* For SPIs, we need to add 16 more to get the GIC irq ID number */
 - if (!intspec[0])
 + if (!intspec[0]) {
   *out_hwirq += 16;

Minor nit. This should be in the default implementation. The crossbar
implementation will fill out_hwirq in its own way and is not
interested in the +16 operation at all.

 + ret = gic_routable_irq_domain_ops-xlate(d, controller,
 +  intspec,
 +  intsize,
 +  out_hwirq,
 +  out_type);
 +

 + gic-domain = irq_domain_add_legacy(node, gic_irqs, irq_base,
 + hwirq_base, gic_irq_domain_ops, gic);
 + } else {
 + if (WARN_ON(!gic_routable_irq_domain_ops))
 + return;

This warning is pointless, because you have default ops now.

 +
 + gic-domain = irq_domain_add_linear(node, nr_routable_irqs,
 + gic_irq_domain_ops,
 + gic);
   }

Thanks,

tglx--
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Re: [PATCH V2 1/7] DRIVERS: IRQCHIP: IRQ-GIC: Add support for routable irqs

2013-10-31 Thread Kumar Gala

On Oct 30, 2013, at 9:57 AM, Sricharan R wrote:

 In some socs the gic can be preceded by a crossbar IP which
 routes the peripheral interrupts to the gic inputs. The peripheral
 interrupts are associated with a fixed crossbar input line and the
 crossbar routes that to one of the free gic input line.
 
 The DT entries for peripherals provides the fixed crossbar input line
 as its interrupt number and the mapping code should associate this with
 a free gic input line. This patch adds the support inside the gic irqchip
 to handle such routable irqs. The routable irqs are registered in a linear
 domain. The registered routable domain's callback should be implemented
 to get a free irq and to configure the IP to route it.
 
 Cc: Thomas Gleixner t...@linutronix.de
 Cc: Linus Walleij linus.wall...@linaro.org
 Cc: Santosh Shilimkar santosh.shilim...@ti.com
 Cc: Russell King li...@arm.linux.org.uk
 Cc: Tony Lindgren t...@atomide.com
 Cc: Rajendra Nayak rna...@ti.com
 Cc: Marc Zyngier marc.zyng...@arm.com
 Cc: Grant Likely grant.lik...@linaro.org
 Cc: Rob Herring rob.herr...@calxeda.com
 Signed-off-by: Sricharan R r.sricha...@ti.com
 ---
 [V2] Added default routable-irqs functions to avoid
  unnessecary if checks as per Thomas Gleixner comments
  and renamed routable-irq binding as per
  Kumar Gala ga...@codeaurora.org comments.
 
 Documentation/devicetree/bindings/arm/gic.txt |6 ++
 drivers/irqchip/irq-gic.c |   83 ++---
 include/linux/irqchip/arm-gic.h   |8 ++-
 3 files changed, 87 insertions(+), 10 deletions(-)
 
 diff --git a/Documentation/devicetree/bindings/arm/gic.txt 
 b/Documentation/devicetree/bindings/arm/gic.txt
 index 3dfb0c0..5357745 100644
 --- a/Documentation/devicetree/bindings/arm/gic.txt
 +++ b/Documentation/devicetree/bindings/arm/gic.txt
 @@ -49,6 +49,11 @@ Optional
   regions, used when the GIC doesn't have banked registers. The offset is
   cpu-offset * cpu-nr.
 
 +- arm,routable-irqs : Total number of gic irq inputs which are not directly
 +   connected from the peripherals, but are routed dynamically
 +   by a crossbar/multiplexer preceding the GIC. The GIC irq
 +   input line is assigned dynamically when the corresponding
 +   peripheral's crossbar line is mapped.
 Example:
 
   intc: interrupt-controller@fff11000 {
 @@ -56,6 +61,7 @@ Example:
   #interrupt-cells = 3;
   #address-cells = 1;
   interrupt-controller;
 + arm,routable-irqs = 160;
   reg = 0xfff11000 0x1000,
 0xfff10100 0x100;
   };

DT Binding portion:

Acked-by: Kumar Gala ga...@codeaurora.org

- k

-- 
Employee of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by 
The Linux Foundation

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Re: [PATCH V2 1/7] DRIVERS: IRQCHIP: IRQ-GIC: Add support for routable irqs

2013-10-30 Thread Thomas Gleixner
On Wed, 30 Oct 2013, Sricharan R wrote:
 @@ -700,11 +709,22 @@ static int gic_irq_domain_xlate(struct irq_domain *d,
   *out_hwirq = intspec[1] + 16;
  
   /* For SPIs, we need to add 16 more to get the GIC irq ID number */
 - if (!intspec[0])
 + if (!intspec[0]) {
   *out_hwirq += 16;

Minor nit. This should be in the default implementation. The crossbar
implementation will fill out_hwirq in its own way and is not
interested in the +16 operation at all.

 + ret = gic_routable_irq_domain_ops-xlate(d, controller,
 +  intspec,
 +  intsize,
 +  out_hwirq,
 +  out_type);
 +

 + gic-domain = irq_domain_add_legacy(node, gic_irqs, irq_base,
 + hwirq_base, gic_irq_domain_ops, gic);
 + } else {
 + if (WARN_ON(!gic_routable_irq_domain_ops))
 + return;

This warning is pointless, because you have default ops now.

 +
 + gic-domain = irq_domain_add_linear(node, nr_routable_irqs,
 + gic_irq_domain_ops,
 + gic);
   }

Thanks,

tglx
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