Re: [PATCH 10/12] mfd: TWL4030: changes for TRITON Errata 27 workaround
Hi David,
On Sun, Feb 20, 2011 at 3:32 AM, David Cohen wrote:
> On Sat, Feb 19, 2011 at 2:44 AM, David Cohen wrote:
>> On Sat, Feb 19, 2011 at 1:33 AM, David Cohen wrote:
>>> Hi,
>>>
>>> On Fri, Feb 18, 2011 at 7:08 PM, Lesly A M wrote:
Workaround for TWL5030 Silicon Errata 27 & 28:
27 - VDD1, VDD2, may have glitches when their output value is
updated.
28 - VDD1 and / or VDD2 DCDC clock may stop working when internal
clock
is switched from internal to external.
Errata 27:
If the DCDC regulators is running on their internal oscillator,
negative glitches may occur on VDD1, VDD2 output when voltage is
changed.
The OMAP device may reboot if the VDD1 or VDD2 go below the
core minimum operating voltage.
WORKAROUND
Set up the TWL5030 DC-DC power supplies to use the HFCLKIN instead
of
the internal oscillator.
Errata 28:
VDD1/VDD2 clock system may hang during switching the clock source
from
internal oscillator to external. VDD1/VDD2 output voltages may
collapse
if clock stops.
WORKAROUND
If HFCLK is disabled in OFFMODE, modify the sleep/wakeup sequence
and
setuptimes to make sure the switching will happen only when HFCLKIN
is stable.
Also use the TWL5030 watchdog to safeguard the first switching from
internal oscillator to HFCLKIN during the TWL5030 init.
IMPACT
setup time and the power sequence is changed.
sleep/wakeup time values will be changed.
The workaround changes are called from twl4030_power_init(), since we have
to
make some i2c_read calls to check the TRITON version & the i2c will not be
initialized in the early stage.
This workaround is required for TWL5030 Silicon version less than ES1.2
The power script & setup time changes are recommended by TI HW team.
http://omapedia.org/wiki/TWL4030_power_scripts
Changes taken from TRITON Errata27 workaround patch by Nishanth Menon.
Signed-off-by: Lesly A M
Cc: Nishanth Menon
Cc: David Derrick
Cc: Samuel Ortiz
---
arch/arm/mach-omap2/omap_twl.c | 35 +
arch/arm/mach-omap2/twl4030.c | 115
+
arch/arm/plat-omap/include/plat/voltage.h | 2 +
drivers/mfd/twl4030-power.c | 74 ++
include/linux/i2c/twl.h | 2 +
5 files changed, 228 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_twl.c
b/arch/arm/mach-omap2/omap_twl.c
index f0feab9..d6984b8 100644
--- a/arch/arm/mach-omap2/omap_twl.c
+++ b/arch/arm/mach-omap2/omap_twl.c
@@ -176,6 +176,14 @@
#define OMAP3_CLKSETUP_RET 31 /* 30.5 uS */
#define OMAP3_CLKSETUP_OFF 1 /* 10 mS */
+/*
+ * The clk/volt setuptime is adjusted to do the VDD1/VDD2 voltage rampup
+ * only after HFCLKIN is stabilized and the HFCLKOUT is enabled
+ */
+#define CLKSETUP_TWL5030_ERRATA27 11567 /* 11.567 mS */
+#define VOLTOFFSET_TWL5030_ERRATA27 516 /* 516 uS */
+#define VOLTSETUP2_TWL5030_ERRATA27 11079 /* 11.079 mS */
+
static bool is_offset_valid;
static u8 smps_offset;
@@ -482,6 +490,33 @@ static struct omap_volt_pmic_info
omap4_core_volt_info = {
.uv_to_vsel = twl6030_uv_to_vsel,
};
+/**
+ * omap3_twl5030_errata27() - update the clk & volt setup time.
+ *
+ * Api to update the clk & volt setup time for TWL5030 errata 27.
+ */
+void omap3_twl5030_errata27(void)
+{
+ if (!cpu_is_omap34xx())
+ return;
+
+ if (cpu_is_omap3630()) {
+ omap3630_mpu_volt_info.voltsetup_off.voltsetup2 =
+ VOLTSETUP2_TWL5030_ERRATA27;
+ omap3630_mpu_volt_info.voltsetup_off.voltoffset =
+ VOLTOFFSET_TWL5030_ERRATA27;
+ omap3630_mpu_volt_info.clksetup_off.clksetup =
+ CLKSETUP_TWL5030_ERRATA27;
+ } else {
+ omap3430_mpu_volt_info.voltsetup_off.voltsetup2 =
+ VOLTSETUP2_TWL5030_ERRATA27;
+ omap3430_mpu_volt_info.voltsetup_off.voltoffset =
+ VOLTOFFSET_TWL5030_ERRATA27;
+ omap3430_mpu_volt_info.clksetup_off.clksetup =
+ CLKSETUP_TWL5030_ERRATA27;
+ }
+}
+
int __init omap4_twl_init(v
Re: [PATCH 10/12] mfd: TWL4030: changes for TRITON Errata 27 workaround
On Sat, Feb 19, 2011 at 5:03 AM, David Cohen wrote:
> Hi,
>
> On Fri, Feb 18, 2011 at 7:08 PM, Lesly A M wrote:
>> Workaround for TWL5030 Silicon Errata 27 & 28:
>> 27 - VDD1, VDD2, may have glitches when their output value is updated.
>> 28 - VDD1 and / or VDD2 DCDC clock may stop working when internal
>> clock
>> is switched from internal to external.
>>
>> Errata 27:
>> If the DCDC regulators is running on their internal oscillator,
>> negative glitches may occur on VDD1, VDD2 output when voltage is
>> changed.
>> The OMAP device may reboot if the VDD1 or VDD2 go below the
>> core minimum operating voltage.
>>
>> WORKAROUND
>> Set up the TWL5030 DC-DC power supplies to use the HFCLKIN instead of
>> the internal oscillator.
>>
>> Errata 28:
>> VDD1/VDD2 clock system may hang during switching the clock source from
>> internal oscillator to external. VDD1/VDD2 output voltages may
>> collapse
>> if clock stops.
>>
>> WORKAROUND
>> If HFCLK is disabled in OFFMODE, modify the sleep/wakeup sequence and
>> setuptimes to make sure the switching will happen only when HFCLKIN
>> is stable.
>> Also use the TWL5030 watchdog to safeguard the first switching from
>> internal oscillator to HFCLKIN during the TWL5030 init.
>>
>> IMPACT
>> setup time and the power sequence is changed.
>> sleep/wakeup time values will be changed.
>>
>> The workaround changes are called from twl4030_power_init(), since we have to
>> make some i2c_read calls to check the TRITON version & the i2c will not be
>> initialized in the early stage.
>>
>> This workaround is required for TWL5030 Silicon version less than ES1.2
>> The power script & setup time changes are recommended by TI HW team.
>>
>> http://omapedia.org/wiki/TWL4030_power_scripts
>>
>> Changes taken from TRITON Errata27 workaround patch by Nishanth Menon.
>>
>> Signed-off-by: Lesly A M
>> Cc: Nishanth Menon
>> Cc: David Derrick
>> Cc: Samuel Ortiz
>> ---
>> arch/arm/mach-omap2/omap_twl.c | 35 +
>> arch/arm/mach-omap2/twl4030.c | 115
>> +
>> arch/arm/plat-omap/include/plat/voltage.h | 2 +
>> drivers/mfd/twl4030-power.c | 74 ++
>> include/linux/i2c/twl.h | 2 +
>> 5 files changed, 228 insertions(+), 0 deletions(-)
>>
>> diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c
>> index f0feab9..d6984b8 100644
>> --- a/arch/arm/mach-omap2/omap_twl.c
>> +++ b/arch/arm/mach-omap2/omap_twl.c
>> @@ -176,6 +176,14 @@
>> #define OMAP3_CLKSETUP_RET 31 /* 30.5 uS */
>> #define OMAP3_CLKSETUP_OFF 1 /* 10 mS */
>>
>> +/*
>> + * The clk/volt setuptime is adjusted to do the VDD1/VDD2 voltage rampup
>> + * only after HFCLKIN is stabilized and the HFCLKOUT is enabled
>> + */
>> +#define CLKSETUP_TWL5030_ERRATA27 11567 /* 11.567 mS */
>> +#define VOLTOFFSET_TWL5030_ERRATA27 516 /* 516 uS */
>> +#define VOLTSETUP2_TWL5030_ERRATA27 11079 /* 11.079 mS */
>> +
>> static bool is_offset_valid;
>> static u8 smps_offset;
>>
>> @@ -482,6 +490,33 @@ static struct omap_volt_pmic_info omap4_core_volt_info
>> = {
>> .uv_to_vsel = twl6030_uv_to_vsel,
>> };
>>
>> +/**
>> + * omap3_twl5030_errata27() - update the clk & volt setup time.
>> + *
>> + * Api to update the clk & volt setup time for TWL5030 errata 27.
>> + */
>> +void omap3_twl5030_errata27(void)
>> +{
>> + if (!cpu_is_omap34xx())
>> + return;
>> +
>> + if (cpu_is_omap3630()) {
>> + omap3630_mpu_volt_info.voltsetup_off.voltsetup2 =
>> + VOLTSETUP2_TWL5030_ERRATA27;
>> + omap3630_mpu_volt_info.voltsetup_off.voltoffset =
>> + VOLTOFFSET_TWL5030_ERRATA27;
>> + omap3630_mpu_volt_info.clksetup_off.clksetup =
>> + CLKSETUP_TWL5030_ERRATA27;
>> + } else {
>> + omap3430_mpu_volt_info.voltsetup_off.voltsetup2 =
>> + VOLTSETUP2_TWL5030_ERRATA27;
>> + omap3430_mpu_volt_info.voltsetup_off.voltoffset =
>> + VOLTOFFSET_TWL5030_ERRATA27;
>> + omap3430_mpu_volt_info.clksetup_off.clksetup =
>> + CLKSETUP_TWL5030_ERRATA27;
>> + }
>> +}
>> +
>> int __init omap4_twl_init(void)
>> {
>> struct voltagedomain *voltdm;
>> diff --git a/arch/arm/mach-omap2/twl4030.c b/arch/arm/mach-omap2/twl4030.c
>> index f3d05e5..b5fb496 100644
>> --- a/arch/arm/mach-omap2/twl4030.c
>> +++ b/arch/arm/mach-omap2/twl4030.c
>> @@ -137,10 +137,125 @@ static struct twl4030_resconfig twl4030_rconfig[] = {
>> { 0, 0},
>> };
>>
>> +/*
>> + * Active to Sleep seque
Re: [PATCH 10/12] mfd: TWL4030: changes for TRITON Errata 27 workaround
On Sat, Feb 19, 2011 at 2:44 AM, David Cohen wrote:
> On Sat, Feb 19, 2011 at 1:33 AM, David Cohen wrote:
>> Hi,
>>
>> On Fri, Feb 18, 2011 at 7:08 PM, Lesly A M wrote:
>>> Workaround for TWL5030 Silicon Errata 27 & 28:
>>> 27 - VDD1, VDD2, may have glitches when their output value is
>>> updated.
>>> 28 - VDD1 and / or VDD2 DCDC clock may stop working when internal
>>> clock
>>> is switched from internal to external.
>>>
>>> Errata 27:
>>> If the DCDC regulators is running on their internal oscillator,
>>> negative glitches may occur on VDD1, VDD2 output when voltage is
>>> changed.
>>> The OMAP device may reboot if the VDD1 or VDD2 go below the
>>> core minimum operating voltage.
>>>
>>> WORKAROUND
>>> Set up the TWL5030 DC-DC power supplies to use the HFCLKIN instead of
>>> the internal oscillator.
>>>
>>> Errata 28:
>>> VDD1/VDD2 clock system may hang during switching the clock source
>>> from
>>> internal oscillator to external. VDD1/VDD2 output voltages may
>>> collapse
>>> if clock stops.
>>>
>>> WORKAROUND
>>> If HFCLK is disabled in OFFMODE, modify the sleep/wakeup sequence and
>>> setuptimes to make sure the switching will happen only when HFCLKIN
>>> is stable.
>>> Also use the TWL5030 watchdog to safeguard the first switching from
>>> internal oscillator to HFCLKIN during the TWL5030 init.
>>>
>>> IMPACT
>>> setup time and the power sequence is changed.
>>> sleep/wakeup time values will be changed.
>>>
>>> The workaround changes are called from twl4030_power_init(), since we have
>>> to
>>> make some i2c_read calls to check the TRITON version & the i2c will not be
>>> initialized in the early stage.
>>>
>>> This workaround is required for TWL5030 Silicon version less than ES1.2
>>> The power script & setup time changes are recommended by TI HW team.
>>>
>>> http://omapedia.org/wiki/TWL4030_power_scripts
>>>
>>> Changes taken from TRITON Errata27 workaround patch by Nishanth Menon.
>>>
>>> Signed-off-by: Lesly A M
>>> Cc: Nishanth Menon
>>> Cc: David Derrick
>>> Cc: Samuel Ortiz
>>> ---
>>> arch/arm/mach-omap2/omap_twl.c | 35 +
>>> arch/arm/mach-omap2/twl4030.c | 115
>>> +
>>> arch/arm/plat-omap/include/plat/voltage.h | 2 +
>>> drivers/mfd/twl4030-power.c | 74 ++
>>> include/linux/i2c/twl.h | 2 +
>>> 5 files changed, 228 insertions(+), 0 deletions(-)
>>>
>>> diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c
>>> index f0feab9..d6984b8 100644
>>> --- a/arch/arm/mach-omap2/omap_twl.c
>>> +++ b/arch/arm/mach-omap2/omap_twl.c
>>> @@ -176,6 +176,14 @@
>>> #define OMAP3_CLKSETUP_RET 31 /* 30.5 uS */
>>> #define OMAP3_CLKSETUP_OFF 1 /* 10 mS */
>>>
>>> +/*
>>> + * The clk/volt setuptime is adjusted to do the VDD1/VDD2 voltage rampup
>>> + * only after HFCLKIN is stabilized and the HFCLKOUT is enabled
>>> + */
>>> +#define CLKSETUP_TWL5030_ERRATA27 11567 /* 11.567 mS */
>>> +#define VOLTOFFSET_TWL5030_ERRATA27 516 /* 516 uS */
>>> +#define VOLTSETUP2_TWL5030_ERRATA27 11079 /* 11.079 mS */
>>> +
>>> static bool is_offset_valid;
>>> static u8 smps_offset;
>>>
>>> @@ -482,6 +490,33 @@ static struct omap_volt_pmic_info omap4_core_volt_info
>>> = {
>>> .uv_to_vsel = twl6030_uv_to_vsel,
>>> };
>>>
>>> +/**
>>> + * omap3_twl5030_errata27() - update the clk & volt setup time.
>>> + *
>>> + * Api to update the clk & volt setup time for TWL5030 errata 27.
>>> + */
>>> +void omap3_twl5030_errata27(void)
>>> +{
>>> + if (!cpu_is_omap34xx())
>>> + return;
>>> +
>>> + if (cpu_is_omap3630()) {
>>> + omap3630_mpu_volt_info.voltsetup_off.voltsetup2 =
>>> + VOLTSETUP2_TWL5030_ERRATA27;
>>> + omap3630_mpu_volt_info.voltsetup_off.voltoffset =
>>> + VOLTOFFSET_TWL5030_ERRATA27;
>>> + omap3630_mpu_volt_info.clksetup_off.clksetup =
>>> + CLKSETUP_TWL5030_ERRATA27;
>>> + } else {
>>> + omap3430_mpu_volt_info.voltsetup_off.voltsetup2 =
>>> + VOLTSETUP2_TWL5030_ERRATA27;
>>> + omap3430_mpu_volt_info.voltsetup_off.voltoffset =
>>> + VOLTOFFSET_TWL5030_ERRATA27;
>>> + omap3430_mpu_volt_info.clksetup_off.clksetup =
>>> + CLKSETUP_TWL5030_ERRATA27;
>>> + }
>>> +}
>>> +
>>> int __init omap4_twl_init(void)
>>> {
>>> struct voltagedomain *voltdm;
>>> diff --git a/arch/arm/mach-omap2/twl4030.c b/arch/arm/mach-omap2/twl4030.c
>>> index f3d05e5..b5fb496 100644
>>> --- a/arch/arm/mach-omap2/twl40
Re: [PATCH 10/12] mfd: TWL4030: changes for TRITON Errata 27 workaround
On Sat, Feb 19, 2011 at 1:33 AM, David Cohen wrote:
> Hi,
>
> On Fri, Feb 18, 2011 at 7:08 PM, Lesly A M wrote:
>> Workaround for TWL5030 Silicon Errata 27 & 28:
>> 27 - VDD1, VDD2, may have glitches when their output value is updated.
>> 28 - VDD1 and / or VDD2 DCDC clock may stop working when internal
>> clock
>> is switched from internal to external.
>>
>> Errata 27:
>> If the DCDC regulators is running on their internal oscillator,
>> negative glitches may occur on VDD1, VDD2 output when voltage is
>> changed.
>> The OMAP device may reboot if the VDD1 or VDD2 go below the
>> core minimum operating voltage.
>>
>> WORKAROUND
>> Set up the TWL5030 DC-DC power supplies to use the HFCLKIN instead of
>> the internal oscillator.
>>
>> Errata 28:
>> VDD1/VDD2 clock system may hang during switching the clock source from
>> internal oscillator to external. VDD1/VDD2 output voltages may
>> collapse
>> if clock stops.
>>
>> WORKAROUND
>> If HFCLK is disabled in OFFMODE, modify the sleep/wakeup sequence and
>> setuptimes to make sure the switching will happen only when HFCLKIN
>> is stable.
>> Also use the TWL5030 watchdog to safeguard the first switching from
>> internal oscillator to HFCLKIN during the TWL5030 init.
>>
>> IMPACT
>> setup time and the power sequence is changed.
>> sleep/wakeup time values will be changed.
>>
>> The workaround changes are called from twl4030_power_init(), since we have to
>> make some i2c_read calls to check the TRITON version & the i2c will not be
>> initialized in the early stage.
>>
>> This workaround is required for TWL5030 Silicon version less than ES1.2
>> The power script & setup time changes are recommended by TI HW team.
>>
>> http://omapedia.org/wiki/TWL4030_power_scripts
>>
>> Changes taken from TRITON Errata27 workaround patch by Nishanth Menon.
>>
>> Signed-off-by: Lesly A M
>> Cc: Nishanth Menon
>> Cc: David Derrick
>> Cc: Samuel Ortiz
>> ---
>> arch/arm/mach-omap2/omap_twl.c | 35 +
>> arch/arm/mach-omap2/twl4030.c | 115
>> +
>> arch/arm/plat-omap/include/plat/voltage.h | 2 +
>> drivers/mfd/twl4030-power.c | 74 ++
>> include/linux/i2c/twl.h | 2 +
>> 5 files changed, 228 insertions(+), 0 deletions(-)
>>
>> diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c
>> index f0feab9..d6984b8 100644
>> --- a/arch/arm/mach-omap2/omap_twl.c
>> +++ b/arch/arm/mach-omap2/omap_twl.c
>> @@ -176,6 +176,14 @@
>> #define OMAP3_CLKSETUP_RET 31 /* 30.5 uS */
>> #define OMAP3_CLKSETUP_OFF 1 /* 10 mS */
>>
>> +/*
>> + * The clk/volt setuptime is adjusted to do the VDD1/VDD2 voltage rampup
>> + * only after HFCLKIN is stabilized and the HFCLKOUT is enabled
>> + */
>> +#define CLKSETUP_TWL5030_ERRATA27 11567 /* 11.567 mS */
>> +#define VOLTOFFSET_TWL5030_ERRATA27 516 /* 516 uS */
>> +#define VOLTSETUP2_TWL5030_ERRATA27 11079 /* 11.079 mS */
>> +
>> static bool is_offset_valid;
>> static u8 smps_offset;
>>
>> @@ -482,6 +490,33 @@ static struct omap_volt_pmic_info omap4_core_volt_info
>> = {
>> .uv_to_vsel = twl6030_uv_to_vsel,
>> };
>>
>> +/**
>> + * omap3_twl5030_errata27() - update the clk & volt setup time.
>> + *
>> + * Api to update the clk & volt setup time for TWL5030 errata 27.
>> + */
>> +void omap3_twl5030_errata27(void)
>> +{
>> + if (!cpu_is_omap34xx())
>> + return;
>> +
>> + if (cpu_is_omap3630()) {
>> + omap3630_mpu_volt_info.voltsetup_off.voltsetup2 =
>> + VOLTSETUP2_TWL5030_ERRATA27;
>> + omap3630_mpu_volt_info.voltsetup_off.voltoffset =
>> + VOLTOFFSET_TWL5030_ERRATA27;
>> + omap3630_mpu_volt_info.clksetup_off.clksetup =
>> + CLKSETUP_TWL5030_ERRATA27;
>> + } else {
>> + omap3430_mpu_volt_info.voltsetup_off.voltsetup2 =
>> + VOLTSETUP2_TWL5030_ERRATA27;
>> + omap3430_mpu_volt_info.voltsetup_off.voltoffset =
>> + VOLTOFFSET_TWL5030_ERRATA27;
>> + omap3430_mpu_volt_info.clksetup_off.clksetup =
>> + CLKSETUP_TWL5030_ERRATA27;
>> + }
>> +}
>> +
>> int __init omap4_twl_init(void)
>> {
>> struct voltagedomain *voltdm;
>> diff --git a/arch/arm/mach-omap2/twl4030.c b/arch/arm/mach-omap2/twl4030.c
>> index f3d05e5..b5fb496 100644
>> --- a/arch/arm/mach-omap2/twl4030.c
>> +++ b/arch/arm/mach-omap2/twl4030.c
>> @@ -137,10 +137,125 @@ static struct twl4030_resconfig twl4030_rconfig[] = {
>> { 0, 0},
>> };
>>
>> +/*
>> + * Active to Sleep seque
Re: [PATCH 10/12] mfd: TWL4030: changes for TRITON Errata 27 workaround
Hi,
On Fri, Feb 18, 2011 at 7:08 PM, Lesly A M wrote:
> Workaround for TWL5030 Silicon Errata 27 & 28:
> 27 - VDD1, VDD2, may have glitches when their output value is updated.
> 28 - VDD1 and / or VDD2 DCDC clock may stop working when internal clock
> is switched from internal to external.
>
> Errata 27:
> If the DCDC regulators is running on their internal oscillator,
> negative glitches may occur on VDD1, VDD2 output when voltage is
> changed.
> The OMAP device may reboot if the VDD1 or VDD2 go below the
> core minimum operating voltage.
>
> WORKAROUND
> Set up the TWL5030 DC-DC power supplies to use the HFCLKIN instead of
> the internal oscillator.
>
> Errata 28:
> VDD1/VDD2 clock system may hang during switching the clock source from
> internal oscillator to external. VDD1/VDD2 output voltages may collapse
> if clock stops.
>
> WORKAROUND
> If HFCLK is disabled in OFFMODE, modify the sleep/wakeup sequence and
> setuptimes to make sure the switching will happen only when HFCLKIN is
> stable.
> Also use the TWL5030 watchdog to safeguard the first switching from
> internal oscillator to HFCLKIN during the TWL5030 init.
>
> IMPACT
> setup time and the power sequence is changed.
> sleep/wakeup time values will be changed.
>
> The workaround changes are called from twl4030_power_init(), since we have to
> make some i2c_read calls to check the TRITON version & the i2c will not be
> initialized in the early stage.
>
> This workaround is required for TWL5030 Silicon version less than ES1.2
> The power script & setup time changes are recommended by TI HW team.
>
> http://omapedia.org/wiki/TWL4030_power_scripts
>
> Changes taken from TRITON Errata27 workaround patch by Nishanth Menon.
>
> Signed-off-by: Lesly A M
> Cc: Nishanth Menon
> Cc: David Derrick
> Cc: Samuel Ortiz
> ---
> arch/arm/mach-omap2/omap_twl.c | 35 +
> arch/arm/mach-omap2/twl4030.c | 115
> +
> arch/arm/plat-omap/include/plat/voltage.h | 2 +
> drivers/mfd/twl4030-power.c | 74 ++
> include/linux/i2c/twl.h | 2 +
> 5 files changed, 228 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c
> index f0feab9..d6984b8 100644
> --- a/arch/arm/mach-omap2/omap_twl.c
> +++ b/arch/arm/mach-omap2/omap_twl.c
> @@ -176,6 +176,14 @@
> #define OMAP3_CLKSETUP_RET 31 /* 30.5 uS */
> #define OMAP3_CLKSETUP_OFF 1 /* 10 mS */
>
> +/*
> + * The clk/volt setuptime is adjusted to do the VDD1/VDD2 voltage rampup
> + * only after HFCLKIN is stabilized and the HFCLKOUT is enabled
> + */
> +#define CLKSETUP_TWL5030_ERRATA27 11567 /* 11.567 mS */
> +#define VOLTOFFSET_TWL5030_ERRATA27 516 /* 516 uS */
> +#define VOLTSETUP2_TWL5030_ERRATA27 11079 /* 11.079 mS */
> +
> static bool is_offset_valid;
> static u8 smps_offset;
>
> @@ -482,6 +490,33 @@ static struct omap_volt_pmic_info omap4_core_volt_info =
> {
> .uv_to_vsel = twl6030_uv_to_vsel,
> };
>
> +/**
> + * omap3_twl5030_errata27() - update the clk & volt setup time.
> + *
> + * Api to update the clk & volt setup time for TWL5030 errata 27.
> + */
> +void omap3_twl5030_errata27(void)
> +{
> + if (!cpu_is_omap34xx())
> + return;
> +
> + if (cpu_is_omap3630()) {
> + omap3630_mpu_volt_info.voltsetup_off.voltsetup2 =
> + VOLTSETUP2_TWL5030_ERRATA27;
> + omap3630_mpu_volt_info.voltsetup_off.voltoffset =
> + VOLTOFFSET_TWL5030_ERRATA27;
> + omap3630_mpu_volt_info.clksetup_off.clksetup =
> + CLKSETUP_TWL5030_ERRATA27;
> + } else {
> + omap3430_mpu_volt_info.voltsetup_off.voltsetup2 =
> + VOLTSETUP2_TWL5030_ERRATA27;
> + omap3430_mpu_volt_info.voltsetup_off.voltoffset =
> + VOLTOFFSET_TWL5030_ERRATA27;
> + omap3430_mpu_volt_info.clksetup_off.clksetup =
> + CLKSETUP_TWL5030_ERRATA27;
> + }
> +}
> +
> int __init omap4_twl_init(void)
> {
> struct voltagedomain *voltdm;
> diff --git a/arch/arm/mach-omap2/twl4030.c b/arch/arm/mach-omap2/twl4030.c
> index f3d05e5..b5fb496 100644
> --- a/arch/arm/mach-omap2/twl4030.c
> +++ b/arch/arm/mach-omap2/twl4030.c
> @@ -137,10 +137,125 @@ static struct twl4030_resconfig twl4030_rconfig[] = {
> { 0, 0},
> };
>
> +/*
> + * Active to Sleep sequence, which is executed upon P1/P2/P3
> + * transition for sleep.
> + *
> + * The sleep sequence is adjusted to do the switching of VDD1/VDD2/VIO OSC
> from
> + * HFCLKIN to internal osc
