[PATCH v2 06/12] video: da8xx-fb: reorganize panel detection
Move panel detection to a separate function, this helps in readability
as well as makes DT support cleaner.
Signed-off-by: Afzal Mohammed af...@ti.com
---
drivers/video/da8xx-fb.c | 42 ++
1 file changed, 26 insertions(+), 16 deletions(-)
diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c
index 3b146bc..b6ea5e9 100644
--- a/drivers/video/da8xx-fb.c
+++ b/drivers/video/da8xx-fb.c
@@ -1253,6 +1253,27 @@ static struct fb_ops da8xx_fb_ops = {
.fb_blank = cfb_blank,
};
+static struct fb_videomode *da8xx_fb_get_videomode(struct platform_device *dev)
+{
+ struct da8xx_lcdc_platform_data *fb_pdata = dev-dev.platform_data;
+ struct fb_videomode *lcdc_info;
+ int i;
+
+ for (i = 0, lcdc_info = known_lcd_panels;
+ i ARRAY_SIZE(known_lcd_panels); i++, lcdc_info++) {
+ if (strcmp(fb_pdata-type, lcdc_info-name) == 0)
+ break;
+ }
+
+ if (i == ARRAY_SIZE(known_lcd_panels)) {
+ dev_err(dev-dev, no panel found\n);
+ return NULL;
+ }
+ dev_info(dev-dev, found %s panel\n, lcdc_info-name);
+
+ return lcdc_info;
+}
+
static int fb_probe(struct platform_device *device)
{
struct da8xx_lcdc_platform_data *fb_pdata =
@@ -1262,7 +1283,7 @@ static int fb_probe(struct platform_device *device)
struct fb_info *da8xx_fb_info;
struct clk *fb_clk = NULL;
struct da8xx_fb_par *par;
- int ret, i;
+ int ret;
unsigned long ulcm;
if (fb_pdata == NULL) {
@@ -1270,6 +1291,10 @@ static int fb_probe(struct platform_device *device)
return -ENOENT;
}
+ lcdc_info = da8xx_fb_get_videomode(device);
+ if (lcdc_info == NULL)
+ return -ENODEV;
+
lcdc_regs = platform_get_resource(device, IORESOURCE_MEM, 0);
da8xx_fb_reg_base = devm_request_and_ioremap(device-dev, lcdc_regs);
if (!da8xx_fb_reg_base) {
@@ -1303,21 +1328,6 @@ static int fb_probe(struct platform_device *device)
break;
}
- for (i = 0, lcdc_info = known_lcd_panels;
- i ARRAY_SIZE(known_lcd_panels);
- i++, lcdc_info++) {
- if (strcmp(fb_pdata-type, lcdc_info-name) == 0)
- break;
- }
-
- if (i == ARRAY_SIZE(known_lcd_panels)) {
- dev_err(device-dev, GLCD: No valid panel found\n);
- ret = -ENODEV;
- goto err_pm_runtime_disable;
- } else
- dev_info(device-dev, GLCD: Found %s panel\n,
- fb_pdata-type);
-
lcd_cfg = (struct lcd_ctrl_config *)fb_pdata-controller_data;
if (!lcd_cfg) {
--
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[PATCH v2 04/12] video: da8xx-fb: use devres
Replace existing resource handling in the driver with managed device
resource.
Signed-off-by: Afzal Mohammed af...@ti.com
---
drivers/video/da8xx-fb.c | 35 ++-
1 file changed, 6 insertions(+), 29 deletions(-)
diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c
index ca69e01..7a32e83 100644
--- a/drivers/video/da8xx-fb.c
+++ b/drivers/video/da8xx-fb.c
@@ -1036,12 +1036,9 @@ static int fb_remove(struct platform_device *dev)
par-p_palette_base);
dma_free_coherent(NULL, par-vram_size, par-vram_virt,
par-vram_phys);
- free_irq(par-irq, par);
pm_runtime_put_sync(dev-dev);
pm_runtime_disable(dev-dev);
framebuffer_release(info);
- iounmap(da8xx_fb_reg_base);
- release_mem_region(lcdc_regs-start, resource_size(lcdc_regs));
}
return 0;
@@ -1265,7 +1262,6 @@ static int fb_probe(struct platform_device *device)
struct fb_info *da8xx_fb_info;
struct clk *fb_clk = NULL;
struct da8xx_fb_par *par;
- resource_size_t len;
int ret, i;
unsigned long ulcm;
@@ -1275,29 +1271,16 @@ static int fb_probe(struct platform_device *device)
}
lcdc_regs = platform_get_resource(device, IORESOURCE_MEM, 0);
- if (!lcdc_regs) {
- dev_err(device-dev,
- Can not get memory resource for LCD controller\n);
- return -ENOENT;
- }
-
- len = resource_size(lcdc_regs);
-
- lcdc_regs = request_mem_region(lcdc_regs-start, len, lcdc_regs-name);
- if (!lcdc_regs)
- return -EBUSY;
-
- da8xx_fb_reg_base = ioremap(lcdc_regs-start, len);
+ da8xx_fb_reg_base = devm_request_and_ioremap(device-dev, lcdc_regs);
if (!da8xx_fb_reg_base) {
- ret = -EBUSY;
- goto err_request_mem;
+ dev_err(device-dev, memory resource setup failed\n);
+ return -EADDRNOTAVAIL;
}
- fb_clk = clk_get(device-dev, fck);
+ fb_clk = devm_clk_get(device-dev, fck);
if (IS_ERR(fb_clk)) {
dev_err(device-dev, Can not get device clock\n);
- ret = -ENODEV;
- goto err_ioremap;
+ return -ENODEV;
}
pm_runtime_enable(device-dev);
@@ -1458,7 +1441,7 @@ static int fb_probe(struct platform_device *device)
lcdc_irq_handler = lcdc_irq_handler_rev02;
}
- ret = request_irq(par-irq, lcdc_irq_handler, 0,
+ ret = devm_request_irq(device-dev, par-irq, lcdc_irq_handler, 0,
DRIVER_NAME, par);
if (ret)
goto irq_freq;
@@ -1488,12 +1471,6 @@ err_pm_runtime_disable:
pm_runtime_put_sync(device-dev);
pm_runtime_disable(device-dev);
-err_ioremap:
- iounmap(da8xx_fb_reg_base);
-
-err_request_mem:
- release_mem_region(lcdc_regs-start, len);
-
return ret;
}
--
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[PATCH v2 12/12] video: da8xx-fb: set upstream clock rate (if reqd)
LCDC IP has a clock divider to adjust pixel clock, this limits pixel
clock range to fck/255 - fck/2(fck - rate of input clock to LCDC IP).
In the case of AM335x, where this IP is present, default fck is not
sufficient to provide normal pixel clock rates, hence rendering this
driver unusable on AM335x.
If input clock too is configurable, allowable range of pixel clock
would increase. Here initially it is checked whether with present fck,
divider in IP could be configured to obtain required rate, if not,
fck is adjusted. This makes it usable on AM335x.
Note:
A better (if allowable) solution may be to represent clock divider in
LCDC IP as a basic divider clock - the one defined in common clock
framework. But for this to happen, all the platform's using this driver
should be using common clock framework (DaVinci is yet to be converted
to use common clock framework). And it has to be determined whether
common clock framework allows this kind of a clock modelling inside a
driver and for this to be part of clock tree. Advantage of doing so
would be better resolution for pixel clock, even though without this
existing use cases are working properly. Or another extreme alternative
would be to replicate clk-divider of common clock framework inside the
driver, but that probably is not preferred and not worth as it would be
duplication and without much advantage to existing users.
Signed-off-by: Afzal Mohammed af...@ti.com
---
v2: new patch
drivers/video/da8xx-fb.c | 76 +++---
1 file changed, 58 insertions(+), 18 deletions(-)
diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c
index 5455682..09dfa12 100644
--- a/drivers/video/da8xx-fb.c
+++ b/drivers/video/da8xx-fb.c
@@ -133,6 +133,9 @@
#define WSI_TIMEOUT50
#define PALETTE_SIZE 256
+#defineCLK_MIN_DIV 2
+#defineCLK_MAX_DIV 255
+
static void __iomem *da8xx_fb_reg_base;
static struct resource *lcdc_regs;
static unsigned int lcd_revision;
@@ -683,23 +686,21 @@ static void da8xx_fb_lcd_reset(void)
}
}
-static inline unsigned da8xx_fb_calc_clk_divider(struct da8xx_fb_par *par,
-unsigned pixclock)
-{
- return par-lcd_fck_rate / (PICOS2KHZ(pixclock) * 1000);
-}
-
-static inline unsigned da8xx_fb_round_clk(struct da8xx_fb_par *par,
- unsigned pixclock)
+static int da8xx_fb_config_clk_divider(struct da8xx_fb_par *par,
+ unsigned div, unsigned rate)
{
- unsigned div;
+ int ret;
- div = da8xx_fb_calc_clk_divider(par, pixclock);
- return KHZ2PICOS(par-lcd_fck_rate / (1000 * div));
-}
+ if (par-lcd_fck_rate != rate) {
+ ret = clk_set_rate(par-lcdc_clk, rate);
+ if (IS_ERR_VALUE(ret)) {
+ dev_err(par-dev,
+ unable to set clock rate at %u\n, rate);
+ return ret;
+ }
+ par-lcd_fck_rate = clk_get_rate(par-lcdc_clk);
+ }
-static inline void da8xx_fb_config_clk_divider(unsigned div)
-{
/* Configure the LCD clock divisor. */
lcdc_write(LCD_CLK_DIVISOR(div) |
(LCD_RASTER_MODE 0x1), LCD_CTRL_REG);
@@ -707,14 +708,49 @@ static inline void da8xx_fb_config_clk_divider(unsigned
div)
if (lcd_revision == LCD_VERSION_2)
lcdc_write(LCD_V2_DMA_CLK_EN | LCD_V2_LIDD_CLK_EN |
LCD_V2_CORE_CLK_EN, LCD_CLK_ENABLE_REG);
+
+ return 0;
+}
+
+static unsigned int da8xx_fb_calc_clk_divider(struct da8xx_fb_par *par,
+ unsigned pixclock,
+ unsigned *rate)
+{
+ unsigned div;
+
+ pixclock = PICOS2KHZ(pixclock) * 1000;
+
+ *rate = par-lcd_fck_rate;
+
+ if (pixclock (*rate / CLK_MAX_DIV)) {
+ *rate = clk_round_rate(par-lcdc_clk, pixclock * CLK_MAX_DIV);
+ div = CLK_MAX_DIV;
+ } else if (pixclock (*rate / CLK_MIN_DIV)) {
+ *rate = clk_round_rate(par-lcdc_clk, pixclock * CLK_MIN_DIV);
+ div = CLK_MIN_DIV;
+ } else {
+ div = *rate / pixclock;
+ }
+
+ return div;
}
-static inline void da8xx_fb_calc_config_clk_divider(struct da8xx_fb_par *par,
+static inline int da8xx_fb_calc_config_clk_divider(struct da8xx_fb_par *par,
struct fb_videomode *mode)
{
- unsigned div = da8xx_fb_calc_clk_divider(par, mode-pixclock);
+ unsigned rate;
+ unsigned div = da8xx_fb_calc_clk_divider(par, mode-pixclock, rate);
- da8xx_fb_config_clk_divider(div);
+ return da8xx_fb_config_clk_divider(par, div, rate);
+}
+
+static inline unsigned da8xx_fb_round_clk(struct da8xx_fb_par *par,
+ unsigned pixclock
[PATCH v2 4/5] ARM: dts: AM33XX: Add am335x-evmsk lcdc panel timings
Update lcdc node with panel timings (typical) for AM335X-EVMSK.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/boot/dts/am335x-evmsk.dts | 20
1 file changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/am335x-evmsk.dts
b/arch/arm/boot/dts/am335x-evmsk.dts
index f5a6162..a7e017b 100644
--- a/arch/arm/boot/dts/am335x-evmsk.dts
+++ b/arch/arm/boot/dts/am335x-evmsk.dts
@@ -248,3 +248,23 @@
};
};
};
+
+lcdc {
+ status = okay;
+
+ display-timings {
+ 480x272p57 {
+ clock-frequency = 900;
+ hactive = 480;
+ vactive = 272;
+ hfront-porch = 8;
+ hback-porch = 43;
+ hsync-len = 4;
+ vback-porch = 12;
+ vfront-porch = 4;
+ vsync-len = 10;
+ hsync-active = 1;
+ vsync-active = 1;
+ };
+ };
+};
--
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[PATCH v2 5/5] ARM: dts: AM33XX: Add am335x-evmsk lcdc pincontrol info
Update pin mux information for lcd panel on AM335X-EVMSK.
Signed-off-by: Afzal Mohammed af...@ti.com
---
v2: add comment on pinmux entries
arch/arm/boot/dts/am335x-evmsk.dts | 35 ++-
1 file changed, 34 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/am335x-evmsk.dts
b/arch/arm/boot/dts/am335x-evmsk.dts
index a7e017b..24dde1d 100644
--- a/arch/arm/boot/dts/am335x-evmsk.dts
+++ b/arch/arm/boot/dts/am335x-evmsk.dts
@@ -32,7 +32,7 @@
am33xx_pinmux: pinmux@44e10800 {
pinctrl-names = default;
- pinctrl-0 = user_leds_s0 gpio_keys_s0;
+ pinctrl-0 = user_leds_s0 gpio_keys_s0 lcd_pins_s0;
user_leds_s0: user_leds_s0 {
pinctrl-single,pins =
@@ -51,6 +51,39 @@
0x9c 0x27 /* gpmc_ben0_cle.gpio2_5, INPUT
| MODE7 */
;
};
+
+ lcd_pins_s0: lcd_pins_s0 {
+ pinctrl-single,pins =
+ 0x20 0x01 /* gpmc_ad8.lcd_data16, OUTPUT
| MODE1 */
+ 0x24 0x01 /* gpmc_ad9.lcd_data17, OUTPUT
| MODE1 */
+ 0x28 0x01 /* gpmc_ad10.lcd_data18, OUTPUT
| MODE1 */
+ 0x2c 0x01 /* gpmc_ad11.lcd_data19, OUTPUT
| MODE1 */
+ 0x30 0x01 /* gpmc_ad12.lcd_data20, OUTPUT
| MODE1 */
+ 0x34 0x01 /* gpmc_ad13.lcd_data21, OUTPUT
| MODE1 */
+ 0x38 0x01 /* gpmc_ad14.lcd_data22, OUTPUT
| MODE1 */
+ 0x3c 0x01 /* gpmc_ad15.lcd_data23, OUTPUT
| MODE1 */
+ 0xa0 0x00 /* lcd_data0.lcd_data0, OUTPUT
| MODE0 */
+ 0xa4 0x00 /* lcd_data1.lcd_data1, OUTPUT
| MODE0 */
+ 0xa8 0x00 /* lcd_data2.lcd_data2, OUTPUT
| MODE0 */
+ 0xac 0x00 /* lcd_data3.lcd_data3, OUTPUT
| MODE0 */
+ 0xb0 0x00 /* lcd_data4.lcd_data4, OUTPUT
| MODE0 */
+ 0xb4 0x00 /* lcd_data5.lcd_data5, OUTPUT
| MODE0 */
+ 0xb8 0x00 /* lcd_data6.lcd_data6, OUTPUT
| MODE0 */
+ 0xbc 0x00 /* lcd_data7.lcd_data7, OUTPUT
| MODE0 */
+ 0xc0 0x00 /* lcd_data8.lcd_data8, OUTPUT
| MODE0 */
+ 0xc4 0x00 /* lcd_data9.lcd_data9, OUTPUT
| MODE0 */
+ 0xc8 0x00 /* lcd_data10.lcd_data10,
OUTPUT | MODE0 */
+ 0xcc 0x00 /* lcd_data11.lcd_data11,
OUTPUT | MODE0 */
+ 0xd0 0x00 /* lcd_data12.lcd_data12,
OUTPUT | MODE0 */
+ 0xd4 0x00 /* lcd_data13.lcd_data13,
OUTPUT | MODE0 */
+ 0xd8 0x00 /* lcd_data14.lcd_data14,
OUTPUT | MODE0 */
+ 0xdc 0x00 /* lcd_data15.lcd_data15,
OUTPUT | MODE0 */
+ 0xe0 0x00 /* lcd_vsync.lcd_vsync, OUTPUT
| MODE0 */
+ 0xe4 0x00 /* lcd_hsync.lcd_hsync, OUTPUT
| MODE0 */
+ 0xe8 0x00 /* lcd_pclk.lcd_pclk, OUTPUT |
MODE0 */
+ 0xec 0x00 /*
lcd_ac_bias_en.lcd_ac_bias_en, OUTPUT | MODE0 */
+ ;
+ };
};
ocp {
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[PATCH v2 3/5] ARM: dts: AM33XX: Add am335x-evm lcdc pincontrol info
From: Manjunathappa, Prakash prakash...@ti.com
Update pin mux information for lcd panel on AM335X-EVM
[af...@ti.com: comment specifying user understandable pinmux details]
Signed-off-by: Manjunathappa, Prakash prakash...@ti.com
Signed-off-by: Afzal Mohammed af...@ti.com
---
v2: correct authorship, add comment on pinmux
arch/arm/boot/dts/am335x-evm.dts | 35 ++-
1 file changed, 34 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts
index a4229aa..0527885 100644
--- a/arch/arm/boot/dts/am335x-evm.dts
+++ b/arch/arm/boot/dts/am335x-evm.dts
@@ -26,7 +26,7 @@
am33xx_pinmux: pinmux@44e10800 {
pinctrl-names = default;
- pinctrl-0 = matrix_keypad_s0 volume_keys_s0;
+ pinctrl-0 = matrix_keypad_s0 volume_keys_s0 lcd_pins_s0;
matrix_keypad_s0: matrix_keypad_s0 {
pinctrl-single,pins =
@@ -44,6 +44,39 @@
0x154 0x27 /* spi0_d0.gpio0_3, INPUT |
MODE7 */
;
};
+
+ lcd_pins_s0: lcd_pins_s0 {
+ pinctrl-single,pins =
+ 0x20 0x01 /* gpmc_ad8.lcd_data16, OUTPUT
| MODE1 */
+ 0x24 0x01 /* gpmc_ad9.lcd_data17, OUTPUT
| MODE1 */
+ 0x28 0x01 /* gpmc_ad10.lcd_data18, OUTPUT
| MODE1 */
+ 0x2c 0x01 /* gpmc_ad11.lcd_data19, OUTPUT
| MODE1 */
+ 0x30 0x01 /* gpmc_ad12.lcd_data20, OUTPUT
| MODE1 */
+ 0x34 0x01 /* gpmc_ad13.lcd_data21, OUTPUT
| MODE1 */
+ 0x38 0x01 /* gpmc_ad14.lcd_data22, OUTPUT
| MODE1 */
+ 0x3c 0x01 /* gpmc_ad15.lcd_data23, OUTPUT
| MODE1 */
+ 0xa0 0x00 /* lcd_data0.lcd_data0, OUTPUT
| MODE0 */
+ 0xa4 0x00 /* lcd_data1.lcd_data1, OUTPUT
| MODE0 */
+ 0xa8 0x00 /* lcd_data2.lcd_data2, OUTPUT
| MODE0 */
+ 0xac 0x00 /* lcd_data3.lcd_data3, OUTPUT
| MODE0 */
+ 0xb0 0x00 /* lcd_data4.lcd_data4, OUTPUT
| MODE0 */
+ 0xb4 0x00 /* lcd_data5.lcd_data5, OUTPUT
| MODE0 */
+ 0xb8 0x00 /* lcd_data6.lcd_data6, OUTPUT
| MODE0 */
+ 0xbc 0x00 /* lcd_data7.lcd_data7, OUTPUT
| MODE0 */
+ 0xc0 0x00 /* lcd_data8.lcd_data8, OUTPUT
| MODE0 */
+ 0xc4 0x00 /* lcd_data9.lcd_data9, OUTPUT
| MODE0 */
+ 0xc8 0x00 /* lcd_data10.lcd_data10,
OUTPUT | MODE0 */
+ 0xcc 0x00 /* lcd_data11.lcd_data11,
OUTPUT | MODE0 */
+ 0xd0 0x00 /* lcd_data12.lcd_data12,
OUTPUT | MODE0 */
+ 0xd4 0x00 /* lcd_data13.lcd_data13,
OUTPUT | MODE0 */
+ 0xd8 0x00 /* lcd_data14.lcd_data14,
OUTPUT | MODE0 */
+ 0xdc 0x00 /* lcd_data15.lcd_data15,
OUTPUT | MODE0 */
+ 0xe0 0x00 /* lcd_vsync.lcd_vsync, OUTPUT
| MODE0 */
+ 0xe4 0x00 /* lcd_hsync.lcd_hsync, OUTPUT
| MODE0 */
+ 0xe8 0x00 /* lcd_pclk.lcd_pclk, OUTPUT |
MODE0 */
+ 0xec 0x00 /*
lcd_ac_bias_en.lcd_ac_bias_en, OUTPUT | MODE0 */
+ ;
+ };
};
ocp {
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[PATCH v2 0/5] ARM: dts: AM33XX: lcdc support
Hi, This series add DT sources for AM335x SoC as well as AM335x based boards. As compared to previous version, in this version, comment has been added in dt source file about pinmux details so that user can easily correlate to that mentioned in TRM. Also author of one of the patch was actually Manjunathappa, Prakash, here in this series, authorship has been made proper. As pinmux is an SoC specific detail rather than IP specific one, addition of pin control has been done in a separate patch from the one in which display timings are added. Also it may aid in debugging in case of any issues. This has been tested on AM335x based boards like AM335x EVM and AM335x EVM-SK. This series is based on v3.8-rc3. This series has a dependency on, 1. Series v16 of: add display helper by, Steffen Trumtrar s.trumt...@pengutronix.de 2. Series v3 video: da8xx-fb: runtime timing configuration by, me (Afzal Mohammed af...@ti.com) 3. Series v2 video: da8xx-fb: DT support by, me (Afzal Mohammed af...@ti.com) To test on AM335x, in addition to the above, following changes, 1. Patch ARM: AM33XX: clock: SET_RATE_PARENT in lcd path by, me (Afzal Mohammed af...@ti.com) 2. Patch da8xx: Allow use by am33xx based devices by, Pantelis Antoniou pa...@antoniou-consulting.com 3. Series HWMOD fixes for AM33xx PWM submodules and device tree nodes by, Philip, Avinash avinashphi...@ti.com would be required All above dependencies along with those required for testing is available @git://gitorious.org/x0148406-public/linux-kernel.git tags/da8xx-fb-dt-v3.8-rc3 Regards Afzal v2: add pinmux comment in dtsi files, correct authorship of one of the patch. Afzal Mohammed (4): ARM: dts: AM33XX: Add lcdc node ARM: dts: AM33XX: Add am335x-evm lcdc panel timings ARM: dts: AM33XX: Add am335x-evmsk lcdc panel timings ARM: dts: AM33XX: Add am335x-evmsk lcdc pincontrol info Manjunathappa, Prakash (1): ARM: dts: AM33XX: Add am335x-evm lcdc pincontrol info arch/arm/boot/dts/am335x-evm.dts | 55 +++- arch/arm/boot/dts/am335x-evmsk.dts | 55 +++- arch/arm/boot/dts/am33xx.dtsi |8 ++ 3 files changed, 116 insertions(+), 2 deletions(-) -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 1/5] ARM: dts: AM33XX: Add lcdc node
Add lcdc node.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/boot/dts/am33xx.dtsi |8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index c2f14e8..432d4bb8 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -385,5 +385,13 @@
mac-address = [ 00 00 00 00 00 00 ];
};
};
+
+ lcdc: lcdc@4830e000 {
+ compatible = ti,am3352-lcdc, ti,da830-lcdc;
+ reg = 0x4830e000 0x1000;
+ interrupts = 36;
+ status = disabled;
+ ti,hwmods = lcdc;
+ };
};
};
--
1.7.9.5
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[PATCH v2 2/5] ARM: dts: AM33XX: Add am335x-evm lcdc panel timings
Update lcdc node with panel timings (typical) for AM335X-EVM.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/boot/dts/am335x-evm.dts | 20
1 file changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts
index d649644..a4229aa 100644
--- a/arch/arm/boot/dts/am335x-evm.dts
+++ b/arch/arm/boot/dts/am335x-evm.dts
@@ -244,3 +244,23 @@
cpsw_emac1 {
phy_id = davinci_mdio, 1;
};
+
+lcdc {
+ status = okay;
+
+ display-timings {
+ 800x480p62 {
+ clock-frequency = 3000;
+ hactive = 800;
+ vactive = 480;
+ hfront-porch = 39;
+ hback-porch = 39;
+ hsync-len = 47;
+ vback-porch = 29;
+ vfront-porch = 13;
+ vsync-len = 2;
+ hsync-active = 1;
+ vsync-active = 1;
+ };
+ };
+};
--
1.7.9.5
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[PATCH 1/2] clk: divider: prepare for minimum divider
Some of clocks can have a limit on minimum divider value that can be
programmed, prepare for such a support.
Add a new field min_div for the basic divider clock. Enhance runtime
registration and static definition helper of basic clock divider so
that minimum divider value can be specified and modify all call sites.
Signed-off-by: Afzal Mohammed af...@ti.com
Cc: Shawn Guo shawn@linaro.org
Cc: Sascha Hauer ker...@pengutronix.de
Cc: Russell King li...@arm.linux.org.uk
Cc: Paul Walmsley p...@pwsan.com
Cc: Tony Lindgren t...@atomide.com
Cc: Mike Turquette mturque...@linaro.org
Cc: Viresh Kumar viresh.li...@gmail.com
Cc: Haojian Zhuang haojian.zhu...@gmail.com
Cc: Chao Xie xiechao.m...@gmail.com
Cc: Arnd Bergmann a...@arndb.de
---
Based on v3.8-rc3, tested on am335x evm.
arch/arm/mach-imx/clk-imx6q.c | 4 +-
arch/arm/mach-imx/clk.h | 4 +-
arch/arm/mach-omap2/cclock2420_data.c | 12 +++---
arch/arm/mach-omap2/cclock2430_data.c | 9 ++--
arch/arm/mach-omap2/cclock33xx_data.c | 25 ++-
arch/arm/mach-omap2/cclock3xxx_data.c | 49 +++--
arch/arm/mach-omap2/cclock44xx_data.c | 81 +--
drivers/clk/clk-divider.c | 13 +++---
drivers/clk/clk-ls1x.c| 9 ++--
drivers/clk/mmp/clk-mmp2.c| 24 +++
drivers/clk/mmp/clk-pxa168.c | 3 +-
drivers/clk/mmp/clk-pxa910.c | 3 +-
drivers/clk/spear/spear3xx_clock.c| 6 ++-
include/linux/clk-private.h | 16 ---
include/linux/clk-provider.h | 7 ++-
15 files changed, 159 insertions(+), 106 deletions(-)
diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
index 7f2c10c..aa901b2 100644
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -218,8 +218,8 @@ int __init mx6q_clocks_init(void)
clk[pcie_ref_125m] = imx_clk_gate(pcie_ref_125m, pcie_ref, base +
0xe0, 19);
clk[enet_ref] = clk_register_divider_table(NULL, enet_ref,
pll6_enet, 0,
- base + 0xe0, 0, 2, 0, clk_enet_ref_table,
- imx_ccm_lock);
+ base + 0xe0, 0, 2, CLK_DIVIDER_MIN_DIV_DEFAULT, 0,
+ clk_enet_ref_table, imx_ccm_lock);
/*name parent_name
reg idx */
clk[pll2_pfd0_352m] = imx_clk_pfd(pll2_pfd0_352m, pll2_bus,
base + 0x100, 0);
diff --git a/arch/arm/mach-imx/clk.h b/arch/arm/mach-imx/clk.h
index 9d1f3b9..d09e821 100644
--- a/arch/arm/mach-imx/clk.h
+++ b/arch/arm/mach-imx/clk.h
@@ -56,7 +56,9 @@ static inline struct clk *imx_clk_divider(const char *name,
const char *parent,
void __iomem *reg, u8 shift, u8 width)
{
return clk_register_divider(NULL, name, parent, CLK_SET_RATE_PARENT,
- reg, shift, width, 0, imx_ccm_lock);
+ reg, shift, width,
+ CLK_DIVIDER_MIN_DIV_DEFAULT, 0,
+ imx_ccm_lock);
}
static inline struct clk *imx_clk_gate(const char *name, const char *parent,
diff --git a/arch/arm/mach-omap2/cclock2420_data.c
b/arch/arm/mach-omap2/cclock2420_data.c
index 7e5febe..2a3d030 100644
--- a/arch/arm/mach-omap2/cclock2420_data.c
+++ b/arch/arm/mach-omap2/cclock2420_data.c
@@ -146,12 +146,12 @@ DEFINE_STRUCT_CLK(core_ck, core_ck_parent_names,
core_ck_ops);
DEFINE_CLK_DIVIDER(core_l3_ck, core_ck, core_ck, 0x0,
OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL1),
OMAP24XX_CLKSEL_L3_SHIFT, OMAP24XX_CLKSEL_L3_WIDTH,
- CLK_DIVIDER_ONE_BASED, NULL);
+ CLK_DIVIDER_MIN_DIV_DEFAULT, CLK_DIVIDER_ONE_BASED, NULL);
DEFINE_CLK_DIVIDER(l4_ck, core_l3_ck, core_l3_ck, 0x0,
OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL1),
OMAP24XX_CLKSEL_L4_SHIFT, OMAP24XX_CLKSEL_L4_WIDTH,
- CLK_DIVIDER_ONE_BASED, NULL);
+ CLK_DIVIDER_MIN_DIV_DEFAULT, CLK_DIVIDER_ONE_BASED, NULL);
static struct clk aes_ick;
@@ -1226,7 +1226,7 @@ DEFINE_STRUCT_CLK(mmc_ick, aes_ick_parent_names,
aes_ick_ops);
DEFINE_CLK_DIVIDER(mpu_ck, core_ck, core_ck, 0x0,
OMAP_CM_REGADDR(MPU_MOD, CM_CLKSEL),
OMAP24XX_CLKSEL_MPU_SHIFT, OMAP24XX_CLKSEL_MPU_WIDTH,
- CLK_DIVIDER_ONE_BASED, NULL);
+ CLK_DIVIDER_MIN_DIV_DEFAULT, CLK_DIVIDER_ONE_BASED, NULL);
static struct clk mpu_wdt_fck;
@@ -1470,7 +1470,8 @@ DEFINE_CLK_OMAP_MUX_GATE(sys_clkout_src, wkup_clkdm,
common_clkout_src_clksel,
DEFINE_CLK_DIVIDER(sys_clkout, sys_clkout_src, sys_clkout_src, 0x0,
OMAP2420_PRCM_CLKOUT_CTRL, OMAP24XX_CLKOUT_DIV_SHIFT,
- OMAP24XX_CLKOUT_DIV_WIDTH, CLK_DIVIDER_POWER_OF_TWO, NULL);
+ OMAP24XX_CLKOUT_DIV_WIDTH, CLK_DIVIDER_MIN_DIV_DEFAULT,
+ CLK_DIVIDER_POWER_OF_TWO
[PATCH 2/2] clk: divider: handle minimum divider
Some of clocks can have a limit on minimum divider value that can be
programmed. Modify basic clock divider to take care of this aspect.
Signed-off-by: Afzal Mohammed af...@ti.com
---
drivers/clk/clk-divider.c | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c
index 0b34992..2de9ff5 100644
--- a/drivers/clk/clk-divider.c
+++ b/drivers/clk/clk-divider.c
@@ -32,6 +32,11 @@
#define div_mask(d)((1 (d-width)) - 1)
#define is_power_of_two(i) !(i ~i)
+static unsigned int _get_mindiv(struct clk_divider *divider)
+{
+ return divider-min_div;
+}
+
static unsigned int _get_table_maxdiv(const struct clk_div_table *table)
{
unsigned int maxdiv = 0;
@@ -148,17 +153,18 @@ static int clk_divider_bestdiv(struct clk_hw *hw,
unsigned long rate,
{
struct clk_divider *divider = to_clk_divider(hw);
int i, bestdiv = 0;
- unsigned long parent_rate, best = 0, now, maxdiv;
+ unsigned long parent_rate, best = 0, now, maxdiv, mindiv;
if (!rate)
rate = 1;
maxdiv = _get_maxdiv(divider);
+ mindiv = _get_mindiv(divider);
if (!(__clk_get_flags(hw-clk) CLK_SET_RATE_PARENT)) {
parent_rate = *best_parent_rate;
bestdiv = DIV_ROUND_UP(parent_rate, rate);
- bestdiv = bestdiv == 0 ? 1 : bestdiv;
+ bestdiv = bestdiv == 0 ? mindiv : bestdiv;
bestdiv = bestdiv maxdiv ? maxdiv : bestdiv;
return bestdiv;
}
@@ -169,7 +175,7 @@ static int clk_divider_bestdiv(struct clk_hw *hw, unsigned
long rate,
*/
maxdiv = min(ULONG_MAX / rate, maxdiv);
- for (i = 1; i = maxdiv; i++) {
+ for (i = mindiv; i = maxdiv; i++) {
if (!_is_valid_div(divider, i))
continue;
parent_rate = __clk_round_rate(__clk_get_parent(hw-clk),
--
1.7.12
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[PATCH 0/4] ARM: AM335x: LCDC platform support
Hi, This series make am335x lcdc capable of providing display. Certain changes were required in generic OMAP clock handling to attain it. Clock nodes in LCDC path is marked such that rate can get propogated to upstream clocks till display PLL. Based on 3.8-rc3. Tested on AM335x EVM. To test on AM335x based boards, tree @ git://gitorious.org/x0148406-public/linux-kernel.git tags/da8xx-fb-dt-v3 Regards Afzal Afzal Mohammed (4): ARM: OMAP2+: dpll: round rate to closest value ARM: OMAP2+: dpll: am335x - avoid freqsel ARM: OMAP2+: clock: DEFINE_STRUCT_CLK_FLAGS helper ARM: AM33XX: clock: SET_RATE_PARENT in lcd path arch/arm/mach-omap2/cclock33xx_data.c | 11 ++- arch/arm/mach-omap2/clkt_dpll.c | 12 +++- arch/arm/mach-omap2/clock.h | 11 +++ arch/arm/mach-omap2/dpll3xxx.c| 5 +++-- 4 files changed, 27 insertions(+), 12 deletions(-) -- 1.7.12 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 2/4] ARM: OMAP2+: dpll: am335x - avoid freqsel
am335x does not have freqsel, avoid it.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/dpll3xxx.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/dpll3xxx.c b/arch/arm/mach-omap2/dpll3xxx.c
index 0a02aab5..3aed4b0 100644
--- a/arch/arm/mach-omap2/dpll3xxx.c
+++ b/arch/arm/mach-omap2/dpll3xxx.c
@@ -500,8 +500,9 @@ int omap3_noncore_dpll_set_rate(struct clk_hw *hw, unsigned
long rate,
if (dd-last_rounded_rate == 0)
return -EINVAL;
- /* No freqsel on OMAP4 and OMAP3630 */
- if (!cpu_is_omap44xx() !cpu_is_omap3630()) {
+ /* No freqsel on AM335x, OMAP4 and OMAP3630 */
+ if (!soc_is_am33xx() !cpu_is_omap44xx()
+ !cpu_is_omap3630()) {
freqsel = _omap3_dpll_compute_freqsel(clk,
dd-last_rounded_n);
WARN_ON(!freqsel);
--
1.7.12
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[PATCH 4/4] ARM: AM33XX: clock: SET_RATE_PARENT in lcd path
LCDC clock node is a one that does not have set rate capability. It
just passes on the rate that is sent downstream by it's parent. While
lcdc clock parent and it's grand parent - dpll_disp_m2_ck and
dpll_disp_ck has the capability to configure rate.
And the default rates provided by LCDC clock's ancestors are not
sufficient to obtain pixel clock for current LCDC use cases, hence
currently display would not work on AM335x SoC's (with driver
modifications in platfrom independent way).
Hence inform clock framework to propogate set rate for LCDC clock as
well as it's parent - dpll_disp_m2_ck. With this change, set rate on
LCDC clock would get propogated till dpll_disp_ck via dpll_disp_m2_ck,
hence allowing the driver (same driver is used in DaVinci too) to set
rates using LCDC clock without worrying about platform dependent clock
details.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/cclock33xx_data.c | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-omap2/cclock33xx_data.c
b/arch/arm/mach-omap2/cclock33xx_data.c
index 8f7c60d..0519e91 100644
--- a/arch/arm/mach-omap2/cclock33xx_data.c
+++ b/arch/arm/mach-omap2/cclock33xx_data.c
@@ -286,10 +286,10 @@ DEFINE_STRUCT_CLK(dpll_disp_ck, dpll_core_ck_parents,
dpll_ddr_ck_ops);
* TODO: Add clksel here (sys_clkin, CORE_CLKOUTM6, PER_CLKOUTM2
* and ALT_CLK1/2)
*/
-DEFINE_CLK_DIVIDER(dpll_disp_m2_ck, dpll_disp_ck, dpll_disp_ck, 0x0,
- AM33XX_CM_DIV_M2_DPLL_DISP, AM33XX_DPLL_CLKOUT_DIV_SHIFT,
- AM33XX_DPLL_CLKOUT_DIV_WIDTH, CLK_DIVIDER_MIN_DIV_DEFAULT,
- CLK_DIVIDER_ONE_BASED, NULL);
+DEFINE_CLK_DIVIDER(dpll_disp_m2_ck, dpll_disp_ck, dpll_disp_ck,
+ CLK_SET_RATE_PARENT, AM33XX_CM_DIV_M2_DPLL_DISP,
+ AM33XX_DPLL_CLKOUT_DIV_SHIFT, AM33XX_DPLL_CLKOUT_DIV_WIDTH,
+ CLK_DIVIDER_MIN_DIV_DEFAULT, CLK_DIVIDER_ONE_BASED, NULL);
/* DPLL_PER */
static struct dpll_data dpll_per_dd = {
@@ -726,7 +726,8 @@ static struct clk_hw_omap lcd_gclk_hw = {
.clksel_mask= AM33XX_CLKSEL_0_1_MASK,
};
-DEFINE_STRUCT_CLK(lcd_gclk, lcd_ck_parents, gpio_fck_ops);
+DEFINE_STRUCT_CLK_FLAGS(lcd_gclk, lcd_ck_parents,
+ gpio_fck_ops, CLK_SET_RATE_PARENT);
DEFINE_CLK_FIXED_FACTOR(mmc_clk, dpll_per_m2_ck, dpll_per_m2_ck, 0x0, 1, 2);
--
1.7.12
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[PATCH 1/4] ARM: OMAP2+: dpll: round rate to closest value
Currently round rate function would return proper rate iff requested
rate exactly matches the PLL lockable rate. This causes set_rate to
fail if exact rate could not be set. Instead round rate may return
closest rate possible (less than the requested). And if any user is
badly in need of exact rate, then return value of round rate could
be used to decide whether to invoke set rate or not.
Modify round rate so that it return closest possible rate.
This was required to get display working on am335x. Without this
display rate could not be set (taking help of SET_RATE_PARENT). Couple
of the downstream clocks of display PLL are basic clock dividers and
they do MULT_ROUND_UP before requesting rate on PLL causing values
that mostly could not be locked by PLL. And even otherwise, if
requested rate for a particular pixel clock could not be satisfied by
PLL, display would not work. This change will resolve the issue.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/clkt_dpll.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-omap2/clkt_dpll.c b/arch/arm/mach-omap2/clkt_dpll.c
index 924c230..15e6d41 100644
--- a/arch/arm/mach-omap2/clkt_dpll.c
+++ b/arch/arm/mach-omap2/clkt_dpll.c
@@ -345,20 +345,22 @@ long omap2_dpll_round_rate(struct clk_hw *hw, unsigned
long target_rate,
pr_debug(clock: %s: m = %d: n = %d: new_rate = %ld\n,
clk_name, m, n, new_rate);
- if (target_rate == new_rate) {
+ if ((new_rate = target_rate)
+ (new_rate dd-last_rounded_rate)) {
dd-last_rounded_m = m;
dd-last_rounded_n = n;
- dd-last_rounded_rate = target_rate;
- break;
+ dd-last_rounded_rate = new_rate;
+ if (new_rate == target_rate)
+ break;
}
}
- if (target_rate != new_rate) {
+ if (!dd-last_rounded_rate) {
pr_debug(clock: %s: cannot round to rate %ld\n,
clk_name, target_rate);
return ~0;
}
- return target_rate;
+ return dd-last_rounded_rate;
}
--
1.7.12
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[PATCH 3/4] ARM: OMAP2+: clock: DEFINE_STRUCT_CLK_FLAGS helper
DEFINE_STRUCT_CLK does not have the capability to set flags, define
DEFINE_STRUCT_CLK_FLAGS to handle flags. This is needed to add
SET_RATE_PARENT flag in statically defined lcd clock in am335x.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/clock.h | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index b402048..60ddd86 100644
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -65,6 +65,17 @@ struct clockdomain;
.ops = _clkops_name, \
};
+#define DEFINE_STRUCT_CLK_FLAGS(_name, _parent_array_name, \
+ _clkops_name, _flags) \
+ static struct clk _name = { \
+ .name = #_name, \
+ .hw = _name##_hw.hw, \
+ .parent_names = _parent_array_name, \
+ .num_parents = ARRAY_SIZE(_parent_array_name), \
+ .ops = _clkops_name, \
+ .flags = _flags,\
+ };
+
#define DEFINE_STRUCT_CLK_HW_OMAP(_name, _clkdm_name) \
static struct clk_hw_omap _name##_hw = {\
.hw = { \
--
1.7.12
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[PATCH v3 00/12] video: da8xx-fb: am335x DT support
Hi, This series adds DT support to da8xx-fb driver (device found on DaVinci and AM335x SoC's). It does certain cleanup's in the process. This series as compared to previous version handles configuration of the LCDC clock rate by modelling as a clock divider of CCF. This would take effect only if CCF is selected, if not, no change to existing method. This makes use of Steffen Trumtrar's v16 of display timing DT support. Testing has been done on AM335x SoC based boards like AM335x EVM. It has also been verified that display on DA850 EVM (non-DT boot) works as earlier. This series is based on v3.8-rc3, and is dependent on, 1. Series v16 of: add display helper by, Steffen Trumtrar s.trumt...@pengutronix.de 2. Patch da8xx: Allow use by am33xx based devices by, Pantelis Antoniou pa...@antoniou-consulting.com 3. Series v3 video: da8xx-fb: runtime timing configuration by, me (Afzal Mohammed af...@ti.com) To test this series on AM335x based boards, 1. Series v2 ARM: dts: AM33XX: lcdc support by, me (Afzal Mohammed af...@ti.com), 2. Series HWMOD fixes for AM33xx PWM submodules and device tree nodes by, Philip, Avinash avinashphi...@ti.com 3. Series clk: divider: prepare for minimum divider by, me (Afzal Mohammed af...@ti.com), 4. Series ARM: AM335x: LCDC platform support by, me (Afzal Mohammed af...@ti.com), would be needed. All above dependencies along with those required for testing is available @ git://gitorious.org/x0148406-public/linux-kernel.git tags/da8xx-fb-dt-v3 Regards Afzal v3: model CCF clock divider with parent propogation if CCF selected v2: 2 new patches - one to configure clock rate properly (12/12)and other to make io operations safe (1/12) Afzal Mohammed (11): video: da8xx-fb: make io operations safe video: da8xx-fb: enable sync lost intr for v2 ip video: da8xx-fb: use devres video: da8xx-fb: ensure non-null cfg in pdata video: da8xx-fb: reorganize panel detection video: da8xx-fb: minimal dt support video: da8xx-fb: invoke platform callback safely video: da8xx-fb: obtain fb_videomode info from dt video: da8xx-fb: ensure pdata only for non-dt video: da8xx-fb: setup struct lcd_ctrl_config for dt video: da8xx-fb: CCF clock divider handling Manjunathappa, Prakash (1): video: da8xx-fb: fix 24bpp raster configuration .../devicetree/bindings/video/fb-da8xx.txt | 37 drivers/video/da8xx-fb.c | 217 - 2 files changed, 201 insertions(+), 53 deletions(-) create mode 100644 Documentation/devicetree/bindings/video/fb-da8xx.txt -- 1.7.12 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v3 06/12] video: da8xx-fb: reorganize panel detection
Move panel detection to a separate function, this helps in readability
as well as makes DT support cleaner.
Signed-off-by: Afzal Mohammed af...@ti.com
---
drivers/video/da8xx-fb.c | 42 ++
1 file changed, 26 insertions(+), 16 deletions(-)
diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c
index 3b146bc..b6ea5e9 100644
--- a/drivers/video/da8xx-fb.c
+++ b/drivers/video/da8xx-fb.c
@@ -1253,6 +1253,27 @@ static struct fb_ops da8xx_fb_ops = {
.fb_blank = cfb_blank,
};
+static struct fb_videomode *da8xx_fb_get_videomode(struct platform_device *dev)
+{
+ struct da8xx_lcdc_platform_data *fb_pdata = dev-dev.platform_data;
+ struct fb_videomode *lcdc_info;
+ int i;
+
+ for (i = 0, lcdc_info = known_lcd_panels;
+ i ARRAY_SIZE(known_lcd_panels); i++, lcdc_info++) {
+ if (strcmp(fb_pdata-type, lcdc_info-name) == 0)
+ break;
+ }
+
+ if (i == ARRAY_SIZE(known_lcd_panels)) {
+ dev_err(dev-dev, no panel found\n);
+ return NULL;
+ }
+ dev_info(dev-dev, found %s panel\n, lcdc_info-name);
+
+ return lcdc_info;
+}
+
static int fb_probe(struct platform_device *device)
{
struct da8xx_lcdc_platform_data *fb_pdata =
@@ -1262,7 +1283,7 @@ static int fb_probe(struct platform_device *device)
struct fb_info *da8xx_fb_info;
struct clk *fb_clk = NULL;
struct da8xx_fb_par *par;
- int ret, i;
+ int ret;
unsigned long ulcm;
if (fb_pdata == NULL) {
@@ -1270,6 +1291,10 @@ static int fb_probe(struct platform_device *device)
return -ENOENT;
}
+ lcdc_info = da8xx_fb_get_videomode(device);
+ if (lcdc_info == NULL)
+ return -ENODEV;
+
lcdc_regs = platform_get_resource(device, IORESOURCE_MEM, 0);
da8xx_fb_reg_base = devm_request_and_ioremap(device-dev, lcdc_regs);
if (!da8xx_fb_reg_base) {
@@ -1303,21 +1328,6 @@ static int fb_probe(struct platform_device *device)
break;
}
- for (i = 0, lcdc_info = known_lcd_panels;
- i ARRAY_SIZE(known_lcd_panels);
- i++, lcdc_info++) {
- if (strcmp(fb_pdata-type, lcdc_info-name) == 0)
- break;
- }
-
- if (i == ARRAY_SIZE(known_lcd_panels)) {
- dev_err(device-dev, GLCD: No valid panel found\n);
- ret = -ENODEV;
- goto err_pm_runtime_disable;
- } else
- dev_info(device-dev, GLCD: Found %s panel\n,
- fb_pdata-type);
-
lcd_cfg = (struct lcd_ctrl_config *)fb_pdata-controller_data;
if (!lcd_cfg) {
--
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[PATCH v3 08/12] video: da8xx-fb: invoke platform callback safely
Ensure that platform data is present before checking whether platform
callback is present (the one used to control backlight). So far this
was not an issue as driver was purely non-DT triggered, but now DT
support has been added.
Signed-off-by: Afzal Mohammed af...@ti.com
---
drivers/video/da8xx-fb.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c
index 08ee8eb..0beed20 100644
--- a/drivers/video/da8xx-fb.c
+++ b/drivers/video/da8xx-fb.c
@@ -1347,7 +1347,7 @@ static int fb_probe(struct platform_device *device)
par-dev = device-dev;
par-lcdc_clk = fb_clk;
par-lcd_fck_rate = clk_get_rate(fb_clk);
- if (fb_pdata-panel_power_ctrl) {
+ if (fb_pdata fb_pdata-panel_power_ctrl) {
par-panel_power_ctrl = fb_pdata-panel_power_ctrl;
par-panel_power_ctrl(1);
}
--
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[PATCH v3 12/12] video: da8xx-fb: CCF clock divider handling
Common clock framework provides a basic clock divider. Make use of it
to handle clock configuration in the LCDC IP, wherever applicable;
out of two platforms having this IP, only am335x is converted to use
CCF, DaVinci is not yet converted. Hence wrap the modification such
that it will come into effect only if CCF is selected, otherwise,
prgram dividers as earlier. Once DaVinci is converted to use CCF,
this ifdef'ery can be removed.
Divider clock instantiated is made as a one that allows the rate
propogation to it's parent, that provides more options w.r.t pixel
clock rates that could be configured.
Signed-off-by: Afzal Mohammed af...@ti.com
---
v3: model CCF clock divider with parent propogation if CCF selected
v2: new patch
drivers/video/da8xx-fb.c | 67 ++--
1 file changed, 65 insertions(+), 2 deletions(-)
diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c
index 5455682..3c9db1d 100644
--- a/drivers/video/da8xx-fb.c
+++ b/drivers/video/da8xx-fb.c
@@ -36,6 +36,7 @@
#include linux/slab.h
#include linux/delay.h
#include linux/lcm.h
+#include linux/clk-provider.h
#include video/of_display_timing.h
#include video/da8xx-fb.h
#include asm/div64.h
@@ -133,6 +134,10 @@
#define WSI_TIMEOUT50
#define PALETTE_SIZE 256
+#defineLCD_CLK_SHIFT 8
+#defineLCD_CLK_WIDTH 8
+#defineLCD_CLK_MIN_DIV 2
+
static void __iomem *da8xx_fb_reg_base;
static struct resource *lcdc_regs;
static unsigned int lcd_revision;
@@ -181,6 +186,9 @@ struct da8xx_fb_par {
u32 pseudo_palette[16];
struct fb_videomode mode;
struct lcd_ctrl_config cfg;
+#ifdef CONFIG_COMMON_CLK
+ struct clk *child_clk;
+#endif
};
static struct fb_var_screeninfo da8xx_fb_var;
@@ -689,6 +697,19 @@ static inline unsigned da8xx_fb_calc_clk_divider(struct
da8xx_fb_par *par,
return par-lcd_fck_rate / (PICOS2KHZ(pixclock) * 1000);
}
+#ifdef CONFIG_COMMON_CLK
+static inline unsigned da8xx_fb_round_clk(struct da8xx_fb_par *par,
+ unsigned pixclock)
+{
+ unsigned long rate;
+
+ rate = PICOS2KHZ(pixclock) * 1000;
+ rate = clk_round_rate(par-child_clk, rate);
+ rate = KHZ2PICOS(rate / 1000);
+
+ return rate;
+}
+#else
static inline unsigned da8xx_fb_round_clk(struct da8xx_fb_par *par,
unsigned pixclock)
{
@@ -697,25 +718,49 @@ static inline unsigned da8xx_fb_round_clk(struct
da8xx_fb_par *par,
div = da8xx_fb_calc_clk_divider(par, pixclock);
return KHZ2PICOS(par-lcd_fck_rate / (1000 * div));
}
+#endif
static inline void da8xx_fb_config_clk_divider(unsigned div)
{
/* Configure the LCD clock divisor. */
lcdc_write(LCD_CLK_DIVISOR(div) |
(LCD_RASTER_MODE 0x1), LCD_CTRL_REG);
+}
+static inline void da8xx_fb_clkc_enable(void)
+{
if (lcd_revision == LCD_VERSION_2)
lcdc_write(LCD_V2_DMA_CLK_EN | LCD_V2_LIDD_CLK_EN |
LCD_V2_CORE_CLK_EN, LCD_CLK_ENABLE_REG);
}
-static inline void da8xx_fb_calc_config_clk_divider(struct da8xx_fb_par *par,
+#ifdef CONFIG_COMMON_CLK
+static inline int da8xx_fb_calc_config_clk_divider(struct da8xx_fb_par *par,
+ struct fb_videomode *mode)
+{
+ int ret;
+
+ ret = clk_set_rate(par-child_clk, PICOS2KHZ(mode-pixclock) * 1000);
+ if (IS_ERR_VALUE(ret)) {
+ dev_err(par-dev, unable to setup pixel clock of %u ps,
+ mode-pixclock);
+ return ret;
+ }
+ da8xx_fb_clkc_enable();
+ return 0;
+}
+#else
+static inline int da8xx_fb_calc_config_clk_divider(struct da8xx_fb_par *par,
struct fb_videomode *mode)
{
unsigned div = da8xx_fb_calc_clk_divider(par, mode-pixclock);
da8xx_fb_config_clk_divider(div);
+ da8xx_fb_clkc_enable();
+
+ return 0;
}
+#endif
static int lcd_init(struct da8xx_fb_par *par, const struct lcd_ctrl_config
*cfg,
struct fb_videomode *panel)
@@ -723,7 +768,9 @@ static int lcd_init(struct da8xx_fb_par *par, const struct
lcd_ctrl_config *cfg,
u32 bpp;
int ret = 0;
- da8xx_fb_calc_config_clk_divider(par, panel);
+ ret = da8xx_fb_calc_config_clk_divider(par, panel);
+ if (IS_ERR_VALUE(ret))
+ return ret;
if (panel-sync FB_SYNC_CLK_INVERT)
lcdc_write((lcdc_read(LCD_RASTER_TIMING_2_REG) |
@@ -1406,6 +1453,22 @@ static int fb_probe(struct platform_device *device)
da8xx_fb_lcd_reset();
+#ifdef CONFIG_COMMON_CLK
+ lcdc_write(LCD_RASTER_MODE | LCD_CLK_DIVISOR(0x2), LCD_CTRL_REG);
+ par-child_clk = clk_register_divider(NULL, da8xx_fb_clk,
+ __clk_get_name(fb_clk
[PATCH v3 11/12] video: da8xx-fb: setup struct lcd_ctrl_config for dt
strcut lcd_ctrl_config information required for driver is currently
obtained via platform data. To handle DT probing, create
lcd_ctrl_config and populate it with default values, these values are
sufficient for the panels so far used with this controller to work.
Signed-off-by: Afzal Mohammed af...@ti.com
---
drivers/video/da8xx-fb.c | 34 +-
1 file changed, 33 insertions(+), 1 deletion(-)
diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c
index 1c1a616..5455682 100644
--- a/drivers/video/da8xx-fb.c
+++ b/drivers/video/da8xx-fb.c
@@ -1254,6 +1254,35 @@ static struct fb_ops da8xx_fb_ops = {
.fb_blank = cfb_blank,
};
+static struct lcd_ctrl_config *da8xx_fb_create_cfg(struct platform_device *dev)
+{
+ struct lcd_ctrl_config *cfg;
+
+ cfg = devm_kzalloc(dev-dev, sizeof(struct fb_videomode), GFP_KERNEL);
+ if (!cfg) {
+ dev_err(dev-dev, memory allocation failed\n);
+ return NULL;
+ }
+
+ /* default values */
+
+ if (lcd_revision == LCD_VERSION_1)
+ cfg-bpp = 16;
+ else
+ cfg-bpp = 32;
+
+ /*
+* For panels so far used with this LCDC, below statement is sufficient.
+* For new panels, if required, struct lcd_ctrl_cfg fields to be updated
+* with additional/modified values. Those values would have to be then
+* obtained from dt(requiring new dt bindings).
+*/
+
+ cfg-panel_shade = COLOR_ACTIVE;
+
+ return cfg;
+}
+
static struct fb_videomode *da8xx_fb_get_videomode(struct platform_device *dev)
{
struct da8xx_lcdc_platform_data *fb_pdata = dev-dev.platform_data;
@@ -1345,7 +1374,10 @@ static int fb_probe(struct platform_device *device)
break;
}
- lcd_cfg = (struct lcd_ctrl_config *)fb_pdata-controller_data;
+ if (device-dev.of_node)
+ lcd_cfg = da8xx_fb_create_cfg(device);
+ else
+ lcd_cfg = (struct lcd_ctrl_config *)fb_pdata-controller_data;
if (!lcd_cfg) {
ret = -EINVAL;
--
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[PATCH v3 10/12] video: da8xx-fb: ensure pdata only for non-dt
This driver is DT probe-able, hence ensure presence of platform data
only for non-DT boot.
Signed-off-by: Afzal Mohammed af...@ti.com
---
drivers/video/da8xx-fb.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c
index 0c68712..1c1a616 100644
--- a/drivers/video/da8xx-fb.c
+++ b/drivers/video/da8xx-fb.c
@@ -1303,7 +1303,7 @@ static int fb_probe(struct platform_device *device)
int ret;
unsigned long ulcm;
- if (fb_pdata == NULL) {
+ if (fb_pdata == NULL !device-dev.of_node) {
dev_err(device-dev, Can not get platform data\n);
return -ENOENT;
}
--
1.7.12
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[PATCH v3 09/12] video: da8xx-fb: obtain fb_videomode info from dt
Obtain fb_videomode details for the connected lcd panel using the
display timing details present in DT.
Signed-off-by: Afzal Mohammed af...@ti.com
---
.../devicetree/bindings/video/fb-da8xx.txt | 21 +
drivers/video/da8xx-fb.c| 17 +
2 files changed, 38 insertions(+)
diff --git a/Documentation/devicetree/bindings/video/fb-da8xx.txt
b/Documentation/devicetree/bindings/video/fb-da8xx.txt
index 581e014..0741f78 100644
--- a/Documentation/devicetree/bindings/video/fb-da8xx.txt
+++ b/Documentation/devicetree/bindings/video/fb-da8xx.txt
@@ -6,6 +6,12 @@ Required properties:
AM335x SoC's - ti,am3352-lcdc, ti,da830-lcdc
- reg: Address range of lcdc register set
- interrupts: lcdc interrupt
+- display-timings: typical videomode of lcd panel, represented as child.
+ Refer Documentation/devicetree/bindings/video/display-timing.txt for
+ display timing binding details. If multiple videomodes are mentioned
+ in display timings node, typical videomode has to be mentioned as the
+ native mode or it has to be first child (driver cares only for native
+ videomode).
Example:
@@ -13,4 +19,19 @@ lcdc@4830e000 {
compatible = ti,am3352-lcdc, ti,da830-lcdc;
reg = 0x4830e000 0x1000;
interrupts = 36;
+ display-timings {
+ 800x480p62 {
+ clock-frequency = 3000;
+ hactive = 800;
+ vactive = 480;
+ hfront-porch = 39;
+ hback-porch = 39;
+ hsync-len = 47;
+ vback-porch = 29;
+ vfront-porch = 13;
+ vsync-len = 2;
+ hsync-active = 1;
+ vsync-active = 1;
+ };
+ };
};
diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c
index 0beed20..0c68712 100644
--- a/drivers/video/da8xx-fb.c
+++ b/drivers/video/da8xx-fb.c
@@ -36,6 +36,7 @@
#include linux/slab.h
#include linux/delay.h
#include linux/lcm.h
+#include video/of_display_timing.h
#include video/da8xx-fb.h
#include asm/div64.h
@@ -1257,8 +1258,24 @@ static struct fb_videomode
*da8xx_fb_get_videomode(struct platform_device *dev)
{
struct da8xx_lcdc_platform_data *fb_pdata = dev-dev.platform_data;
struct fb_videomode *lcdc_info;
+ struct device_node *np = dev-dev.of_node;
int i;
+ if (np) {
+ lcdc_info = devm_kzalloc(dev-dev,
+sizeof(struct fb_videomode),
+GFP_KERNEL);
+ if (!lcdc_info) {
+ dev_err(dev-dev, memory allocation failed\n);
+ return NULL;
+ }
+ if (of_get_fb_videomode(np, lcdc_info, OF_USE_NATIVE_MODE)) {
+ dev_err(dev-dev, timings not available in DT\n);
+ return NULL;
+ }
+ return lcdc_info;
+ }
+
for (i = 0, lcdc_info = known_lcd_panels;
i ARRAY_SIZE(known_lcd_panels); i++, lcdc_info++) {
if (strcmp(fb_pdata-type, lcdc_info-name) == 0)
--
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[PATCH v3 02/12] video: da8xx-fb: fix 24bpp raster configuration
From: Manjunathappa, Prakash prakash...@ti.com Set only LCD_V2_TFT_24BPP_MODE bit for 24bpp and LCD_V2_TFT_24BPP_UNPACK bit along with LCD_V2_TFT_24BPP_MODE for 32bpp configuration. Patch is tested on am335x-evm for 24bpp and da850-evm for 16bpp configurations. Signed-off-by: Manjunathappa, Prakash prakash...@ti.com Signed-off-by: Afzal Mohammed af...@ti.com --- drivers/video/da8xx-fb.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c index 35a33ca..7f92f37 100644 --- a/drivers/video/da8xx-fb.c +++ b/drivers/video/da8xx-fb.c @@ -550,10 +550,10 @@ static int lcd_cfg_frame_buffer(struct da8xx_fb_par *par, u32 width, u32 height, case 4: case 16: break; - case 24: - reg |= LCD_V2_TFT_24BPP_MODE; case 32: reg |= LCD_V2_TFT_24BPP_UNPACK; + case 24: + reg |= LCD_V2_TFT_24BPP_MODE; break; case 8: -- 1.7.12 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v3 01/12] video: da8xx-fb: make io operations safe
Replace __raw_readl/__raw_writel with readl/writel; this driver is
reused on ARMv7 (AM335x SoC).
Signed-off-by: Afzal Mohammed af...@ti.com
---
v2: new patch
drivers/video/da8xx-fb.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c
index 720604c..35a33ca 100644
--- a/drivers/video/da8xx-fb.c
+++ b/drivers/video/da8xx-fb.c
@@ -141,12 +141,12 @@ static int frame_done_flag;
static inline unsigned int lcdc_read(unsigned int addr)
{
- return (unsigned int)__raw_readl(da8xx_fb_reg_base + (addr));
+ return (unsigned int)readl(da8xx_fb_reg_base + (addr));
}
static inline void lcdc_write(unsigned int val, unsigned int addr)
{
- __raw_writel(val, da8xx_fb_reg_base + (addr));
+ writel(val, da8xx_fb_reg_base + (addr));
}
struct da8xx_fb_par {
--
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[PATCH v3 04/12] video: da8xx-fb: use devres
Replace existing resource handling in the driver with managed device
resource.
Signed-off-by: Afzal Mohammed af...@ti.com
---
drivers/video/da8xx-fb.c | 35 ++-
1 file changed, 6 insertions(+), 29 deletions(-)
diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c
index ca69e01..7a32e83 100644
--- a/drivers/video/da8xx-fb.c
+++ b/drivers/video/da8xx-fb.c
@@ -1036,12 +1036,9 @@ static int fb_remove(struct platform_device *dev)
par-p_palette_base);
dma_free_coherent(NULL, par-vram_size, par-vram_virt,
par-vram_phys);
- free_irq(par-irq, par);
pm_runtime_put_sync(dev-dev);
pm_runtime_disable(dev-dev);
framebuffer_release(info);
- iounmap(da8xx_fb_reg_base);
- release_mem_region(lcdc_regs-start, resource_size(lcdc_regs));
}
return 0;
@@ -1265,7 +1262,6 @@ static int fb_probe(struct platform_device *device)
struct fb_info *da8xx_fb_info;
struct clk *fb_clk = NULL;
struct da8xx_fb_par *par;
- resource_size_t len;
int ret, i;
unsigned long ulcm;
@@ -1275,29 +1271,16 @@ static int fb_probe(struct platform_device *device)
}
lcdc_regs = platform_get_resource(device, IORESOURCE_MEM, 0);
- if (!lcdc_regs) {
- dev_err(device-dev,
- Can not get memory resource for LCD controller\n);
- return -ENOENT;
- }
-
- len = resource_size(lcdc_regs);
-
- lcdc_regs = request_mem_region(lcdc_regs-start, len, lcdc_regs-name);
- if (!lcdc_regs)
- return -EBUSY;
-
- da8xx_fb_reg_base = ioremap(lcdc_regs-start, len);
+ da8xx_fb_reg_base = devm_request_and_ioremap(device-dev, lcdc_regs);
if (!da8xx_fb_reg_base) {
- ret = -EBUSY;
- goto err_request_mem;
+ dev_err(device-dev, memory resource setup failed\n);
+ return -EADDRNOTAVAIL;
}
- fb_clk = clk_get(device-dev, fck);
+ fb_clk = devm_clk_get(device-dev, fck);
if (IS_ERR(fb_clk)) {
dev_err(device-dev, Can not get device clock\n);
- ret = -ENODEV;
- goto err_ioremap;
+ return -ENODEV;
}
pm_runtime_enable(device-dev);
@@ -1458,7 +1441,7 @@ static int fb_probe(struct platform_device *device)
lcdc_irq_handler = lcdc_irq_handler_rev02;
}
- ret = request_irq(par-irq, lcdc_irq_handler, 0,
+ ret = devm_request_irq(device-dev, par-irq, lcdc_irq_handler, 0,
DRIVER_NAME, par);
if (ret)
goto irq_freq;
@@ -1488,12 +1471,6 @@ err_pm_runtime_disable:
pm_runtime_put_sync(device-dev);
pm_runtime_disable(device-dev);
-err_ioremap:
- iounmap(da8xx_fb_reg_base);
-
-err_request_mem:
- release_mem_region(lcdc_regs-start, len);
-
return ret;
}
--
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[PATCH v3 07/12] video: da8xx-fb: minimal dt support
Driver is provided a means to have the probe triggered by DT.
Signed-off-by: Afzal Mohammed af...@ti.com
---
Documentation/devicetree/bindings/video/fb-da8xx.txt | 16
drivers/video/da8xx-fb.c | 7 +++
2 files changed, 23 insertions(+)
create mode 100644 Documentation/devicetree/bindings/video/fb-da8xx.txt
diff --git a/Documentation/devicetree/bindings/video/fb-da8xx.txt
b/Documentation/devicetree/bindings/video/fb-da8xx.txt
new file mode 100644
index 000..581e014
--- /dev/null
+++ b/Documentation/devicetree/bindings/video/fb-da8xx.txt
@@ -0,0 +1,16 @@
+TI LCD Controller on DA830/DA850/AM335x SoC's
+
+Required properties:
+- compatible:
+ DA830 - ti,da830-lcdc
+ AM335x SoC's - ti,am3352-lcdc, ti,da830-lcdc
+- reg: Address range of lcdc register set
+- interrupts: lcdc interrupt
+
+Example:
+
+lcdc@4830e000 {
+ compatible = ti,am3352-lcdc, ti,da830-lcdc;
+ reg = 0x4830e000 0x1000;
+ interrupts = 36;
+};
diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c
index b6ea5e9..08ee8eb 100644
--- a/drivers/video/da8xx-fb.c
+++ b/drivers/video/da8xx-fb.c
@@ -1595,6 +1595,12 @@ static int fb_resume(struct platform_device *dev)
#define fb_resume NULL
#endif
+static const struct of_device_id da8xx_fb_of_match[] = {
+ {.compatible = ti,da830-lcdc, },
+ {},
+};
+MODULE_DEVICE_TABLE(of, da8xx_fb_of_match);
+
static struct platform_driver da8xx_fb_driver = {
.probe = fb_probe,
.remove = fb_remove,
@@ -1603,6 +1609,7 @@ static struct platform_driver da8xx_fb_driver = {
.driver = {
.name = DRIVER_NAME,
.owner = THIS_MODULE,
+ .of_match_table = of_match_ptr(da8xx_fb_of_match),
},
};
--
1.7.12
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[PATCH v3 05/12] video: da8xx-fb: ensure non-null cfg in pdata
Ensure that platform data contains pointer for lcd_ctrl_config.
Signed-off-by: Afzal Mohammed af...@ti.com
---
drivers/video/da8xx-fb.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c
index 7a32e83..3b146bc 100644
--- a/drivers/video/da8xx-fb.c
+++ b/drivers/video/da8xx-fb.c
@@ -1320,6 +1320,11 @@ static int fb_probe(struct platform_device *device)
lcd_cfg = (struct lcd_ctrl_config *)fb_pdata-controller_data;
+ if (!lcd_cfg) {
+ ret = -EINVAL;
+ goto err_pm_runtime_disable;
+ }
+
da8xx_fb_info = framebuffer_alloc(sizeof(struct da8xx_fb_par),
device-dev);
if (!da8xx_fb_info) {
--
1.7.12
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[PATCH v3 03/12] video: da8xx-fb: enable sync lost intr for v2 ip
interrupt handler is checking for sync lost interrupt, but it was not enabled, enable it. Signed-off-by: Afzal Mohammed af...@ti.com --- drivers/video/da8xx-fb.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c index 7f92f37..ca69e01 100644 --- a/drivers/video/da8xx-fb.c +++ b/drivers/video/da8xx-fb.c @@ -318,7 +318,7 @@ static void lcd_blit(int load_mode, struct da8xx_fb_par *par) reg_int = lcdc_read(LCD_INT_ENABLE_SET_REG) | LCD_V2_END_OF_FRAME0_INT_ENA | LCD_V2_END_OF_FRAME1_INT_ENA | - LCD_FRAME_DONE; + LCD_FRAME_DONE | LCD_SYNC_LOST; lcdc_write(reg_int, LCD_INT_ENABLE_SET_REG); } reg_dma |= LCD_DUAL_FRAME_BUFFER_ENABLE; -- 1.7.12 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 1/2] clk: divider: prepare for minimum divider
Some of clocks can have a limit on minimum divider value that can be
programmed, prepare for such a support.
Add a new field min_div for the basic divider clock and a new dynamic
clock divider registration function where minimum divider value can
be specified. Keep behaviour of existing divider clock registration
functions, static initialization helpers as was earlier.
Signed-off-by: Afzal Mohammed af...@ti.com
---
v2: create a new registration function for those that needs to
constrain minimum divider value instead of modifying existing
registration functions and hence remove modification in other
clock files.
drivers/clk/clk-divider.c| 37 ++---
include/linux/clk-private.h | 6 +-
include/linux/clk-provider.h | 7 +++
3 files changed, 46 insertions(+), 4 deletions(-)
diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c
index a9204c6..4025c5a 100644
--- a/drivers/clk/clk-divider.c
+++ b/drivers/clk/clk-divider.c
@@ -236,7 +236,7 @@ EXPORT_SYMBOL_GPL(clk_divider_ops);
static struct clk *_register_divider(struct device *dev, const char *name,
const char *parent_name, unsigned long flags,
- void __iomem *reg, u8 shift, u8 width,
+ void __iomem *reg, u8 shift, u8 width, u8 min_div,
u8 clk_divider_flags, const struct clk_div_table *table,
spinlock_t *lock)
{
@@ -244,6 +244,11 @@ static struct clk *_register_divider(struct device *dev,
const char *name,
struct clk *clk;
struct clk_init_data init;
+ if (!min_div) {
+ pr_err(%s: minimum divider cannot be zero\n, __func__);
+ return ERR_PTR(-EINVAL);
+ }
+
/* allocate the divider */
div = kzalloc(sizeof(struct clk_divider), GFP_KERNEL);
if (!div) {
@@ -261,6 +266,7 @@ static struct clk *_register_divider(struct device *dev,
const char *name,
div-reg = reg;
div-shift = shift;
div-width = width;
+ div-min_div = min_div;
div-flags = clk_divider_flags;
div-lock = lock;
div-hw.init = init;
@@ -276,6 +282,29 @@ static struct clk *_register_divider(struct device *dev,
const char *name,
}
/**
+ * clk_register_min_divider - register a divider clock having minimum divider
+ * constraints with clock framework
+ * @dev: device registering this clock
+ * @name: name of this clock
+ * @parent_name: name of clock's parent
+ * @flags: framework-specific flags
+ * @reg: register address to adjust divider
+ * @shift: number of bits to shift the bitfield
+ * @width: width of the bitfield
+ * @min_div: minimum allowable divider
+ * @clk_divider_flags: divider-specific flags for this clock
+ * @lock: shared register lock for this clock
+ */
+struct clk *clk_register_min_divider(struct device *dev, const char *name,
+ const char *parent_name, unsigned long flags,
+ void __iomem *reg, u8 shift, u8 width, u8 min_div,
+ u8 clk_divider_flags, spinlock_t *lock)
+{
+ return _register_divider(dev, name, parent_name, flags, reg, shift,
+ width, min_div, clk_divider_flags, NULL, lock);
+}
+
+/**
* clk_register_divider - register a divider clock with the clock framework
* @dev: device registering this clock
* @name: name of this clock
@@ -293,7 +322,8 @@ struct clk *clk_register_divider(struct device *dev, const
char *name,
u8 clk_divider_flags, spinlock_t *lock)
{
return _register_divider(dev, name, parent_name, flags, reg, shift,
- width, clk_divider_flags, NULL, lock);
+ width, CLK_DIVIDER_MIN_DIV_DEFAULT, clk_divider_flags,
+ NULL, lock);
}
/**
@@ -317,5 +347,6 @@ struct clk *clk_register_divider_table(struct device *dev,
const char *name,
spinlock_t *lock)
{
return _register_divider(dev, name, parent_name, flags, reg, shift,
- width, clk_divider_flags, table, lock);
+ width, CLK_DIVIDER_MIN_DIV_DEFAULT, clk_divider_flags,
+ table, lock);
}
diff --git a/include/linux/clk-private.h b/include/linux/clk-private.h
index 9c7f580..942a1be 100644
--- a/include/linux/clk-private.h
+++ b/include/linux/clk-private.h
@@ -105,7 +105,8 @@ struct clk {
#define _DEFINE_CLK_DIVIDER(_name, _parent_name, _parent_ptr, \
_flags, _reg, _shift, _width, \
- _divider_flags, _table, _lock) \
+ _min_div, _divider_flags, \
+ _table, _lock) \
static struct clk _name;\
static const char *_name##_parent_names[] = { \
_parent_name, \
@@ -120,6 +121,7 @@ struct clk {
.reg = _reg
[PATCH v2 2/2] clk: divider: handle minimum divider
Some of clocks can have a limit on minimum divider value that can be
programmed. Modify basic clock divider to take care of this aspect.
Signed-off-by: Afzal Mohammed af...@ti.com
---
drivers/clk/clk-divider.c | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c
index 4025c5a..ee648dc 100644
--- a/drivers/clk/clk-divider.c
+++ b/drivers/clk/clk-divider.c
@@ -32,6 +32,11 @@
#define div_mask(d)((1 (d-width)) - 1)
#define is_power_of_two(i) !(i ~i)
+static unsigned int _get_mindiv(struct clk_divider *divider)
+{
+ return divider-min_div;
+}
+
static unsigned int _get_table_maxdiv(const struct clk_div_table *table)
{
unsigned int maxdiv = 0;
@@ -148,17 +153,18 @@ static int clk_divider_bestdiv(struct clk_hw *hw,
unsigned long rate,
{
struct clk_divider *divider = to_clk_divider(hw);
int i, bestdiv = 0;
- unsigned long parent_rate, best = 0, now, maxdiv;
+ unsigned long parent_rate, best = 0, now, maxdiv, mindiv;
if (!rate)
rate = 1;
maxdiv = _get_maxdiv(divider);
+ mindiv = _get_mindiv(divider);
if (!(__clk_get_flags(hw-clk) CLK_SET_RATE_PARENT)) {
parent_rate = *best_parent_rate;
bestdiv = DIV_ROUND_UP(parent_rate, rate);
- bestdiv = bestdiv == 0 ? 1 : bestdiv;
+ bestdiv = bestdiv == 0 ? mindiv : bestdiv;
bestdiv = bestdiv maxdiv ? maxdiv : bestdiv;
return bestdiv;
}
@@ -169,7 +175,7 @@ static int clk_divider_bestdiv(struct clk_hw *hw, unsigned
long rate,
*/
maxdiv = min(ULONG_MAX / rate, maxdiv);
- for (i = 1; i = maxdiv; i++) {
+ for (i = mindiv; i = maxdiv; i++) {
if (!_is_valid_div(divider, i))
continue;
parent_rate = __clk_round_rate(__clk_get_parent(hw-clk),
--
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[PATCH v2 0/4] ARM: AM335x: LCDC platform support
Hi, This series make am335x lcdc capable of providing display. Certain changes were required in generic OMAP clock handling to attain it. Clock nodes in LCDC path is marked such that rate can get propogated to upstream clocks till display PLL. Based on 3.8-rc3. Tested on AM335x EVM. To test on AM335x based boards, tree @ git://gitorious.org/x0148406-public/linux-kernel.git tags/da8xx-fb-dt-v4 Regards Afzal v2: As DEFINE_CLK_DIVIDER args has no change, make it's usage as reqd. Afzal Mohammed (4): ARM: OMAP2+: dpll: round rate to closest value ARM: OMAP2+: dpll: am335x - avoid freqsel ARM: OMAP2+: clock: DEFINE_STRUCT_CLK_FLAGS helper ARM: AM33XX: clock: SET_RATE_PARENT in lcd path arch/arm/mach-omap2/cclock33xx_data.c | 10 ++ arch/arm/mach-omap2/clkt_dpll.c | 12 +++- arch/arm/mach-omap2/clock.h | 11 +++ arch/arm/mach-omap2/dpll3xxx.c| 5 +++-- 4 files changed, 27 insertions(+), 11 deletions(-) -- 1.7.12 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 1/4] ARM: OMAP2+: dpll: round rate to closest value
Currently round rate function would return proper rate iff requested
rate exactly matches the PLL lockable rate. This causes set_rate to
fail if exact rate could not be set. Instead round rate may return
closest rate possible (less than the requested). And if any user is
badly in need of exact rate, then return value of round rate could
be used to decide whether to invoke set rate or not.
Modify round rate so that it return closest possible rate.
This was required to get display working on am335x. Without this
display rate could not be set (taking help of SET_RATE_PARENT). Couple
of the downstream clocks of display PLL are basic clock dividers and
they do MULT_ROUND_UP before requesting rate on PLL causing values
that mostly could not be locked by PLL. And even otherwise, if
requested rate for a particular pixel clock could not be satisfied by
PLL, display would not work. This change will resolve the issue.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/clkt_dpll.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-omap2/clkt_dpll.c b/arch/arm/mach-omap2/clkt_dpll.c
index 924c230..15e6d41 100644
--- a/arch/arm/mach-omap2/clkt_dpll.c
+++ b/arch/arm/mach-omap2/clkt_dpll.c
@@ -345,20 +345,22 @@ long omap2_dpll_round_rate(struct clk_hw *hw, unsigned
long target_rate,
pr_debug(clock: %s: m = %d: n = %d: new_rate = %ld\n,
clk_name, m, n, new_rate);
- if (target_rate == new_rate) {
+ if ((new_rate = target_rate)
+ (new_rate dd-last_rounded_rate)) {
dd-last_rounded_m = m;
dd-last_rounded_n = n;
- dd-last_rounded_rate = target_rate;
- break;
+ dd-last_rounded_rate = new_rate;
+ if (new_rate == target_rate)
+ break;
}
}
- if (target_rate != new_rate) {
+ if (!dd-last_rounded_rate) {
pr_debug(clock: %s: cannot round to rate %ld\n,
clk_name, target_rate);
return ~0;
}
- return target_rate;
+ return dd-last_rounded_rate;
}
--
1.7.12
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[PATCH v2 4/4] ARM: AM33XX: clock: SET_RATE_PARENT in lcd path
LCDC clock node is a one that does not have set rate capability. It
just passes on the rate that is sent downstream by it's parent. While
lcdc clock parent and it's grand parent - dpll_disp_m2_ck and
dpll_disp_ck has the capability to configure rate.
And the default rates provided by LCDC clock's ancestors are not
sufficient to obtain pixel clock for current LCDC use cases, hence
currently display would not work on AM335x SoC's (with driver
modifications in platfrom independent way).
Hence inform clock framework to propogate set rate for LCDC clock as
well as it's parent - dpll_disp_m2_ck. With this change, set rate on
LCDC clock would get propogated till dpll_disp_ck via dpll_disp_m2_ck,
hence allowing the driver (same driver is used in DaVinci too) to set
rates using LCDC clock without worrying about platform dependent clock
details.
Signed-off-by: Afzal Mohammed af...@ti.com
---
v2: As DEFINE_CLK_DIVIDER args has no change, make it's usage as reqd.
arch/arm/mach-omap2/cclock33xx_data.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-omap2/cclock33xx_data.c
b/arch/arm/mach-omap2/cclock33xx_data.c
index ea64ad6..476b820 100644
--- a/arch/arm/mach-omap2/cclock33xx_data.c
+++ b/arch/arm/mach-omap2/cclock33xx_data.c
@@ -284,9 +284,10 @@ DEFINE_STRUCT_CLK(dpll_disp_ck, dpll_core_ck_parents,
dpll_ddr_ck_ops);
* TODO: Add clksel here (sys_clkin, CORE_CLKOUTM6, PER_CLKOUTM2
* and ALT_CLK1/2)
*/
-DEFINE_CLK_DIVIDER(dpll_disp_m2_ck, dpll_disp_ck, dpll_disp_ck, 0x0,
- AM33XX_CM_DIV_M2_DPLL_DISP, AM33XX_DPLL_CLKOUT_DIV_SHIFT,
- AM33XX_DPLL_CLKOUT_DIV_WIDTH, CLK_DIVIDER_ONE_BASED, NULL);
+DEFINE_CLK_DIVIDER(dpll_disp_m2_ck, dpll_disp_ck, dpll_disp_ck,
+ CLK_SET_RATE_PARENT, AM33XX_CM_DIV_M2_DPLL_DISP,
+ AM33XX_DPLL_CLKOUT_DIV_SHIFT, AM33XX_DPLL_CLKOUT_DIV_WIDTH,
+ CLK_DIVIDER_ONE_BASED, NULL);
/* DPLL_PER */
static struct dpll_data dpll_per_dd = {
@@ -723,7 +724,8 @@ static struct clk_hw_omap lcd_gclk_hw = {
.clksel_mask= AM33XX_CLKSEL_0_1_MASK,
};
-DEFINE_STRUCT_CLK(lcd_gclk, lcd_ck_parents, gpio_fck_ops);
+DEFINE_STRUCT_CLK_FLAGS(lcd_gclk, lcd_ck_parents,
+ gpio_fck_ops, CLK_SET_RATE_PARENT);
DEFINE_CLK_FIXED_FACTOR(mmc_clk, dpll_per_m2_ck, dpll_per_m2_ck, 0x0, 1, 2);
--
1.7.12
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[PATCH v2 3/4] ARM: OMAP2+: clock: DEFINE_STRUCT_CLK_FLAGS helper
DEFINE_STRUCT_CLK does not have the capability to set flags, define
DEFINE_STRUCT_CLK_FLAGS to handle flags. This is needed to add
SET_RATE_PARENT flag in statically defined lcd clock in am335x.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/clock.h | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index b402048..60ddd86 100644
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -65,6 +65,17 @@ struct clockdomain;
.ops = _clkops_name, \
};
+#define DEFINE_STRUCT_CLK_FLAGS(_name, _parent_array_name, \
+ _clkops_name, _flags) \
+ static struct clk _name = { \
+ .name = #_name, \
+ .hw = _name##_hw.hw, \
+ .parent_names = _parent_array_name, \
+ .num_parents = ARRAY_SIZE(_parent_array_name), \
+ .ops = _clkops_name, \
+ .flags = _flags,\
+ };
+
#define DEFINE_STRUCT_CLK_HW_OMAP(_name, _clkdm_name) \
static struct clk_hw_omap _name##_hw = {\
.hw = { \
--
1.7.12
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[PATCH v2 2/4] ARM: OMAP2+: dpll: am335x - avoid freqsel
am335x does not have freqsel, avoid it.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/dpll3xxx.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/dpll3xxx.c b/arch/arm/mach-omap2/dpll3xxx.c
index 0a02aab5..3aed4b0 100644
--- a/arch/arm/mach-omap2/dpll3xxx.c
+++ b/arch/arm/mach-omap2/dpll3xxx.c
@@ -500,8 +500,9 @@ int omap3_noncore_dpll_set_rate(struct clk_hw *hw, unsigned
long rate,
if (dd-last_rounded_rate == 0)
return -EINVAL;
- /* No freqsel on OMAP4 and OMAP3630 */
- if (!cpu_is_omap44xx() !cpu_is_omap3630()) {
+ /* No freqsel on AM335x, OMAP4 and OMAP3630 */
+ if (!soc_is_am33xx() !cpu_is_omap44xx()
+ !cpu_is_omap3630()) {
freqsel = _omap3_dpll_compute_freqsel(clk,
dd-last_rounded_n);
WARN_ON(!freqsel);
--
1.7.12
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[PATCH v4 00/12] video: da8xx-fb: am335x DT support
Hi, This series adds DT support to da8xx-fb driver (device found on DaVinci and AM335x SoC's). It does certain cleanup's in the process. This series as compared to previous version uses new registration interface for clock divider that has constraints on minimum divider value. This makes use of Steffen Trumtrar's v16 of display timing DT support. Testing has been done on AM335x SoC based boards like AM335x EVM. It has also been verified that display on DA850 EVM (non-DT boot) works as earlier. This series is based on v3.8-rc3, and is dependent on, 1. Series v16 of: add display helper by, Steffen Trumtrar s.trumt...@pengutronix.de 2. Patch da8xx: Allow use by am33xx based devices by, Pantelis Antoniou pa...@antoniou-consulting.com 3. Series v3 video: da8xx-fb: runtime timing configuration by, me (Afzal Mohammed af...@ti.com) To test this series on AM335x based boards, 1. Series v2 ARM: dts: AM33XX: lcdc support by, me (Afzal Mohammed af...@ti.com), 2. Series HWMOD fixes for AM33xx PWM submodules and device tree nodes by, Philip, Avinash avinashphi...@ti.com 3. Series v2 clk: divider: prepare for minimum divider by, me (Afzal Mohammed af...@ti.com), 4. Series v2 ARM: AM335x: LCDC platform support by, me (Afzal Mohammed af...@ti.com), would be needed. All above dependencies along with those required for testing is available @ git://gitorious.org/x0148406-public/linux-kernel.git tags/da8xx-fb-dt-v4 Regards Afzal v4: use new registration for clock divider having minimum divider requirement and have ifdef'ery in a better way v3: model CCF clock divider with parent propogation if CCF selected v2: 2 new patches - one to configure clock rate properly (12/12)and other to make io operations safe (1/12) Afzal Mohammed (11): video: da8xx-fb: make io operations safe video: da8xx-fb: enable sync lost intr for v2 ip video: da8xx-fb: use devres video: da8xx-fb: ensure non-null cfg in pdata video: da8xx-fb: reorganize panel detection video: da8xx-fb: minimal dt support video: da8xx-fb: invoke platform callback safely video: da8xx-fb: obtain fb_videomode info from dt video: da8xx-fb: ensure pdata only for non-dt video: da8xx-fb: setup struct lcd_ctrl_config for dt video: da8xx-fb: CCF clock divider handling Manjunathappa, Prakash (1): video: da8xx-fb: fix 24bpp raster configuration .../devicetree/bindings/video/fb-da8xx.txt | 37 drivers/video/da8xx-fb.c | 222 - 2 files changed, 206 insertions(+), 53 deletions(-) create mode 100644 Documentation/devicetree/bindings/video/fb-da8xx.txt -- 1.7.12 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v4 06/12] video: da8xx-fb: reorganize panel detection
Move panel detection to a separate function, this helps in readability
as well as makes DT support cleaner.
Signed-off-by: Afzal Mohammed af...@ti.com
---
drivers/video/da8xx-fb.c | 42 ++
1 file changed, 26 insertions(+), 16 deletions(-)
diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c
index 3b146bc..b6ea5e9 100644
--- a/drivers/video/da8xx-fb.c
+++ b/drivers/video/da8xx-fb.c
@@ -1253,6 +1253,27 @@ static struct fb_ops da8xx_fb_ops = {
.fb_blank = cfb_blank,
};
+static struct fb_videomode *da8xx_fb_get_videomode(struct platform_device *dev)
+{
+ struct da8xx_lcdc_platform_data *fb_pdata = dev-dev.platform_data;
+ struct fb_videomode *lcdc_info;
+ int i;
+
+ for (i = 0, lcdc_info = known_lcd_panels;
+ i ARRAY_SIZE(known_lcd_panels); i++, lcdc_info++) {
+ if (strcmp(fb_pdata-type, lcdc_info-name) == 0)
+ break;
+ }
+
+ if (i == ARRAY_SIZE(known_lcd_panels)) {
+ dev_err(dev-dev, no panel found\n);
+ return NULL;
+ }
+ dev_info(dev-dev, found %s panel\n, lcdc_info-name);
+
+ return lcdc_info;
+}
+
static int fb_probe(struct platform_device *device)
{
struct da8xx_lcdc_platform_data *fb_pdata =
@@ -1262,7 +1283,7 @@ static int fb_probe(struct platform_device *device)
struct fb_info *da8xx_fb_info;
struct clk *fb_clk = NULL;
struct da8xx_fb_par *par;
- int ret, i;
+ int ret;
unsigned long ulcm;
if (fb_pdata == NULL) {
@@ -1270,6 +1291,10 @@ static int fb_probe(struct platform_device *device)
return -ENOENT;
}
+ lcdc_info = da8xx_fb_get_videomode(device);
+ if (lcdc_info == NULL)
+ return -ENODEV;
+
lcdc_regs = platform_get_resource(device, IORESOURCE_MEM, 0);
da8xx_fb_reg_base = devm_request_and_ioremap(device-dev, lcdc_regs);
if (!da8xx_fb_reg_base) {
@@ -1303,21 +1328,6 @@ static int fb_probe(struct platform_device *device)
break;
}
- for (i = 0, lcdc_info = known_lcd_panels;
- i ARRAY_SIZE(known_lcd_panels);
- i++, lcdc_info++) {
- if (strcmp(fb_pdata-type, lcdc_info-name) == 0)
- break;
- }
-
- if (i == ARRAY_SIZE(known_lcd_panels)) {
- dev_err(device-dev, GLCD: No valid panel found\n);
- ret = -ENODEV;
- goto err_pm_runtime_disable;
- } else
- dev_info(device-dev, GLCD: Found %s panel\n,
- fb_pdata-type);
-
lcd_cfg = (struct lcd_ctrl_config *)fb_pdata-controller_data;
if (!lcd_cfg) {
--
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[PATCH v4 03/12] video: da8xx-fb: enable sync lost intr for v2 ip
interrupt handler is checking for sync lost interrupt, but it was not enabled, enable it. Signed-off-by: Afzal Mohammed af...@ti.com --- drivers/video/da8xx-fb.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c index 7f92f37..ca69e01 100644 --- a/drivers/video/da8xx-fb.c +++ b/drivers/video/da8xx-fb.c @@ -318,7 +318,7 @@ static void lcd_blit(int load_mode, struct da8xx_fb_par *par) reg_int = lcdc_read(LCD_INT_ENABLE_SET_REG) | LCD_V2_END_OF_FRAME0_INT_ENA | LCD_V2_END_OF_FRAME1_INT_ENA | - LCD_FRAME_DONE; + LCD_FRAME_DONE | LCD_SYNC_LOST; lcdc_write(reg_int, LCD_INT_ENABLE_SET_REG); } reg_dma |= LCD_DUAL_FRAME_BUFFER_ENABLE; -- 1.7.12 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v4 04/12] video: da8xx-fb: use devres
Replace existing resource handling in the driver with managed device
resource.
Signed-off-by: Afzal Mohammed af...@ti.com
---
drivers/video/da8xx-fb.c | 35 ++-
1 file changed, 6 insertions(+), 29 deletions(-)
diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c
index ca69e01..7a32e83 100644
--- a/drivers/video/da8xx-fb.c
+++ b/drivers/video/da8xx-fb.c
@@ -1036,12 +1036,9 @@ static int fb_remove(struct platform_device *dev)
par-p_palette_base);
dma_free_coherent(NULL, par-vram_size, par-vram_virt,
par-vram_phys);
- free_irq(par-irq, par);
pm_runtime_put_sync(dev-dev);
pm_runtime_disable(dev-dev);
framebuffer_release(info);
- iounmap(da8xx_fb_reg_base);
- release_mem_region(lcdc_regs-start, resource_size(lcdc_regs));
}
return 0;
@@ -1265,7 +1262,6 @@ static int fb_probe(struct platform_device *device)
struct fb_info *da8xx_fb_info;
struct clk *fb_clk = NULL;
struct da8xx_fb_par *par;
- resource_size_t len;
int ret, i;
unsigned long ulcm;
@@ -1275,29 +1271,16 @@ static int fb_probe(struct platform_device *device)
}
lcdc_regs = platform_get_resource(device, IORESOURCE_MEM, 0);
- if (!lcdc_regs) {
- dev_err(device-dev,
- Can not get memory resource for LCD controller\n);
- return -ENOENT;
- }
-
- len = resource_size(lcdc_regs);
-
- lcdc_regs = request_mem_region(lcdc_regs-start, len, lcdc_regs-name);
- if (!lcdc_regs)
- return -EBUSY;
-
- da8xx_fb_reg_base = ioremap(lcdc_regs-start, len);
+ da8xx_fb_reg_base = devm_request_and_ioremap(device-dev, lcdc_regs);
if (!da8xx_fb_reg_base) {
- ret = -EBUSY;
- goto err_request_mem;
+ dev_err(device-dev, memory resource setup failed\n);
+ return -EADDRNOTAVAIL;
}
- fb_clk = clk_get(device-dev, fck);
+ fb_clk = devm_clk_get(device-dev, fck);
if (IS_ERR(fb_clk)) {
dev_err(device-dev, Can not get device clock\n);
- ret = -ENODEV;
- goto err_ioremap;
+ return -ENODEV;
}
pm_runtime_enable(device-dev);
@@ -1458,7 +1441,7 @@ static int fb_probe(struct platform_device *device)
lcdc_irq_handler = lcdc_irq_handler_rev02;
}
- ret = request_irq(par-irq, lcdc_irq_handler, 0,
+ ret = devm_request_irq(device-dev, par-irq, lcdc_irq_handler, 0,
DRIVER_NAME, par);
if (ret)
goto irq_freq;
@@ -1488,12 +1471,6 @@ err_pm_runtime_disable:
pm_runtime_put_sync(device-dev);
pm_runtime_disable(device-dev);
-err_ioremap:
- iounmap(da8xx_fb_reg_base);
-
-err_request_mem:
- release_mem_region(lcdc_regs-start, len);
-
return ret;
}
--
1.7.12
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[PATCH v4 05/12] video: da8xx-fb: ensure non-null cfg in pdata
Ensure that platform data contains pointer for lcd_ctrl_config.
Signed-off-by: Afzal Mohammed af...@ti.com
---
drivers/video/da8xx-fb.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c
index 7a32e83..3b146bc 100644
--- a/drivers/video/da8xx-fb.c
+++ b/drivers/video/da8xx-fb.c
@@ -1320,6 +1320,11 @@ static int fb_probe(struct platform_device *device)
lcd_cfg = (struct lcd_ctrl_config *)fb_pdata-controller_data;
+ if (!lcd_cfg) {
+ ret = -EINVAL;
+ goto err_pm_runtime_disable;
+ }
+
da8xx_fb_info = framebuffer_alloc(sizeof(struct da8xx_fb_par),
device-dev);
if (!da8xx_fb_info) {
--
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[PATCH v4 07/12] video: da8xx-fb: minimal dt support
Driver is provided a means to have the probe triggered by DT.
Signed-off-by: Afzal Mohammed af...@ti.com
---
Documentation/devicetree/bindings/video/fb-da8xx.txt | 16
drivers/video/da8xx-fb.c | 7 +++
2 files changed, 23 insertions(+)
create mode 100644 Documentation/devicetree/bindings/video/fb-da8xx.txt
diff --git a/Documentation/devicetree/bindings/video/fb-da8xx.txt
b/Documentation/devicetree/bindings/video/fb-da8xx.txt
new file mode 100644
index 000..581e014
--- /dev/null
+++ b/Documentation/devicetree/bindings/video/fb-da8xx.txt
@@ -0,0 +1,16 @@
+TI LCD Controller on DA830/DA850/AM335x SoC's
+
+Required properties:
+- compatible:
+ DA830 - ti,da830-lcdc
+ AM335x SoC's - ti,am3352-lcdc, ti,da830-lcdc
+- reg: Address range of lcdc register set
+- interrupts: lcdc interrupt
+
+Example:
+
+lcdc@4830e000 {
+ compatible = ti,am3352-lcdc, ti,da830-lcdc;
+ reg = 0x4830e000 0x1000;
+ interrupts = 36;
+};
diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c
index b6ea5e9..08ee8eb 100644
--- a/drivers/video/da8xx-fb.c
+++ b/drivers/video/da8xx-fb.c
@@ -1595,6 +1595,12 @@ static int fb_resume(struct platform_device *dev)
#define fb_resume NULL
#endif
+static const struct of_device_id da8xx_fb_of_match[] = {
+ {.compatible = ti,da830-lcdc, },
+ {},
+};
+MODULE_DEVICE_TABLE(of, da8xx_fb_of_match);
+
static struct platform_driver da8xx_fb_driver = {
.probe = fb_probe,
.remove = fb_remove,
@@ -1603,6 +1609,7 @@ static struct platform_driver da8xx_fb_driver = {
.driver = {
.name = DRIVER_NAME,
.owner = THIS_MODULE,
+ .of_match_table = of_match_ptr(da8xx_fb_of_match),
},
};
--
1.7.12
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[PATCH v4 08/12] video: da8xx-fb: invoke platform callback safely
Ensure that platform data is present before checking whether platform
callback is present (the one used to control backlight). So far this
was not an issue as driver was purely non-DT triggered, but now DT
support has been added.
Signed-off-by: Afzal Mohammed af...@ti.com
---
drivers/video/da8xx-fb.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c
index 08ee8eb..0beed20 100644
--- a/drivers/video/da8xx-fb.c
+++ b/drivers/video/da8xx-fb.c
@@ -1347,7 +1347,7 @@ static int fb_probe(struct platform_device *device)
par-dev = device-dev;
par-lcdc_clk = fb_clk;
par-lcd_fck_rate = clk_get_rate(fb_clk);
- if (fb_pdata-panel_power_ctrl) {
+ if (fb_pdata fb_pdata-panel_power_ctrl) {
par-panel_power_ctrl = fb_pdata-panel_power_ctrl;
par-panel_power_ctrl(1);
}
--
1.7.12
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[PATCH v4 09/12] video: da8xx-fb: obtain fb_videomode info from dt
Obtain fb_videomode details for the connected lcd panel using the
display timing details present in DT.
Signed-off-by: Afzal Mohammed af...@ti.com
---
.../devicetree/bindings/video/fb-da8xx.txt | 21 +
drivers/video/da8xx-fb.c| 17 +
2 files changed, 38 insertions(+)
diff --git a/Documentation/devicetree/bindings/video/fb-da8xx.txt
b/Documentation/devicetree/bindings/video/fb-da8xx.txt
index 581e014..0741f78 100644
--- a/Documentation/devicetree/bindings/video/fb-da8xx.txt
+++ b/Documentation/devicetree/bindings/video/fb-da8xx.txt
@@ -6,6 +6,12 @@ Required properties:
AM335x SoC's - ti,am3352-lcdc, ti,da830-lcdc
- reg: Address range of lcdc register set
- interrupts: lcdc interrupt
+- display-timings: typical videomode of lcd panel, represented as child.
+ Refer Documentation/devicetree/bindings/video/display-timing.txt for
+ display timing binding details. If multiple videomodes are mentioned
+ in display timings node, typical videomode has to be mentioned as the
+ native mode or it has to be first child (driver cares only for native
+ videomode).
Example:
@@ -13,4 +19,19 @@ lcdc@4830e000 {
compatible = ti,am3352-lcdc, ti,da830-lcdc;
reg = 0x4830e000 0x1000;
interrupts = 36;
+ display-timings {
+ 800x480p62 {
+ clock-frequency = 3000;
+ hactive = 800;
+ vactive = 480;
+ hfront-porch = 39;
+ hback-porch = 39;
+ hsync-len = 47;
+ vback-porch = 29;
+ vfront-porch = 13;
+ vsync-len = 2;
+ hsync-active = 1;
+ vsync-active = 1;
+ };
+ };
};
diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c
index 0beed20..0c68712 100644
--- a/drivers/video/da8xx-fb.c
+++ b/drivers/video/da8xx-fb.c
@@ -36,6 +36,7 @@
#include linux/slab.h
#include linux/delay.h
#include linux/lcm.h
+#include video/of_display_timing.h
#include video/da8xx-fb.h
#include asm/div64.h
@@ -1257,8 +1258,24 @@ static struct fb_videomode
*da8xx_fb_get_videomode(struct platform_device *dev)
{
struct da8xx_lcdc_platform_data *fb_pdata = dev-dev.platform_data;
struct fb_videomode *lcdc_info;
+ struct device_node *np = dev-dev.of_node;
int i;
+ if (np) {
+ lcdc_info = devm_kzalloc(dev-dev,
+sizeof(struct fb_videomode),
+GFP_KERNEL);
+ if (!lcdc_info) {
+ dev_err(dev-dev, memory allocation failed\n);
+ return NULL;
+ }
+ if (of_get_fb_videomode(np, lcdc_info, OF_USE_NATIVE_MODE)) {
+ dev_err(dev-dev, timings not available in DT\n);
+ return NULL;
+ }
+ return lcdc_info;
+ }
+
for (i = 0, lcdc_info = known_lcd_panels;
i ARRAY_SIZE(known_lcd_panels); i++, lcdc_info++) {
if (strcmp(fb_pdata-type, lcdc_info-name) == 0)
--
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[PATCH v4 10/12] video: da8xx-fb: ensure pdata only for non-dt
This driver is DT probe-able, hence ensure presence of platform data
only for non-DT boot.
Signed-off-by: Afzal Mohammed af...@ti.com
---
drivers/video/da8xx-fb.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c
index 0c68712..1c1a616 100644
--- a/drivers/video/da8xx-fb.c
+++ b/drivers/video/da8xx-fb.c
@@ -1303,7 +1303,7 @@ static int fb_probe(struct platform_device *device)
int ret;
unsigned long ulcm;
- if (fb_pdata == NULL) {
+ if (fb_pdata == NULL !device-dev.of_node) {
dev_err(device-dev, Can not get platform data\n);
return -ENOENT;
}
--
1.7.12
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[PATCH v4 11/12] video: da8xx-fb: setup struct lcd_ctrl_config for dt
strcut lcd_ctrl_config information required for driver is currently
obtained via platform data. To handle DT probing, create
lcd_ctrl_config and populate it with default values, these values are
sufficient for the panels so far used with this controller to work.
Signed-off-by: Afzal Mohammed af...@ti.com
---
drivers/video/da8xx-fb.c | 34 +-
1 file changed, 33 insertions(+), 1 deletion(-)
diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c
index 1c1a616..5455682 100644
--- a/drivers/video/da8xx-fb.c
+++ b/drivers/video/da8xx-fb.c
@@ -1254,6 +1254,35 @@ static struct fb_ops da8xx_fb_ops = {
.fb_blank = cfb_blank,
};
+static struct lcd_ctrl_config *da8xx_fb_create_cfg(struct platform_device *dev)
+{
+ struct lcd_ctrl_config *cfg;
+
+ cfg = devm_kzalloc(dev-dev, sizeof(struct fb_videomode), GFP_KERNEL);
+ if (!cfg) {
+ dev_err(dev-dev, memory allocation failed\n);
+ return NULL;
+ }
+
+ /* default values */
+
+ if (lcd_revision == LCD_VERSION_1)
+ cfg-bpp = 16;
+ else
+ cfg-bpp = 32;
+
+ /*
+* For panels so far used with this LCDC, below statement is sufficient.
+* For new panels, if required, struct lcd_ctrl_cfg fields to be updated
+* with additional/modified values. Those values would have to be then
+* obtained from dt(requiring new dt bindings).
+*/
+
+ cfg-panel_shade = COLOR_ACTIVE;
+
+ return cfg;
+}
+
static struct fb_videomode *da8xx_fb_get_videomode(struct platform_device *dev)
{
struct da8xx_lcdc_platform_data *fb_pdata = dev-dev.platform_data;
@@ -1345,7 +1374,10 @@ static int fb_probe(struct platform_device *device)
break;
}
- lcd_cfg = (struct lcd_ctrl_config *)fb_pdata-controller_data;
+ if (device-dev.of_node)
+ lcd_cfg = da8xx_fb_create_cfg(device);
+ else
+ lcd_cfg = (struct lcd_ctrl_config *)fb_pdata-controller_data;
if (!lcd_cfg) {
ret = -EINVAL;
--
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[PATCH v4 12/12] video: da8xx-fb: CCF clock divider handling
Common clock framework provides a basic clock divider. Make use of it
to handle clock configuration in the LCDC IP, wherever applicable;
out of two platforms having this IP, only am335x is converted to use
CCF, DaVinci is not yet converted. Hence wrap the modification such
that it will come into effect only if CCF is selected, otherwise,
prgram dividers as earlier. Once DaVinci is converted to use CCF,
this ifdef'ery can be removed.
Divider clock instantiated is made as a one that allows the rate
propogation to it's parent, that provides more options w.r.t pixel
clock rates that could be configured.
Signed-off-by: Afzal Mohammed af...@ti.com
---
v4: use new registration for clock divider having minimum divider
requirement and have ifdef'ery in a better way
v3: model CCF clock divider with parent propogation if CCF selected
v2: new patch
drivers/video/da8xx-fb.c | 72 ++--
1 file changed, 70 insertions(+), 2 deletions(-)
diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c
index 5455682..6723683 100644
--- a/drivers/video/da8xx-fb.c
+++ b/drivers/video/da8xx-fb.c
@@ -36,6 +36,7 @@
#include linux/slab.h
#include linux/delay.h
#include linux/lcm.h
+#include linux/clk-provider.h
#include video/of_display_timing.h
#include video/da8xx-fb.h
#include asm/div64.h
@@ -133,6 +134,10 @@
#define WSI_TIMEOUT50
#define PALETTE_SIZE 256
+#defineLCD_CLK_SHIFT 8
+#defineLCD_CLK_WIDTH 8
+#defineLCD_CLK_MIN_DIV 2
+
static void __iomem *da8xx_fb_reg_base;
static struct resource *lcdc_regs;
static unsigned int lcd_revision;
@@ -181,6 +186,9 @@ struct da8xx_fb_par {
u32 pseudo_palette[16];
struct fb_videomode mode;
struct lcd_ctrl_config cfg;
+#ifdef CONFIG_COMMON_CLK
+ struct clk *child_clk;
+#endif
};
static struct fb_var_screeninfo da8xx_fb_var;
@@ -683,12 +691,27 @@ static void da8xx_fb_lcd_reset(void)
}
}
+#ifndefCONFIG_COMMON_CLK
static inline unsigned da8xx_fb_calc_clk_divider(struct da8xx_fb_par *par,
unsigned pixclock)
{
return par-lcd_fck_rate / (PICOS2KHZ(pixclock) * 1000);
}
+#endif
+#ifdef CONFIG_COMMON_CLK
+static inline unsigned da8xx_fb_round_clk(struct da8xx_fb_par *par,
+ unsigned pixclock)
+{
+ unsigned long rate;
+
+ rate = PICOS2KHZ(pixclock) * 1000;
+ rate = clk_round_rate(par-child_clk, rate);
+ rate = KHZ2PICOS(rate / 1000);
+
+ return rate;
+}
+#else
static inline unsigned da8xx_fb_round_clk(struct da8xx_fb_par *par,
unsigned pixclock)
{
@@ -703,19 +726,43 @@ static inline void da8xx_fb_config_clk_divider(unsigned
div)
/* Configure the LCD clock divisor. */
lcdc_write(LCD_CLK_DIVISOR(div) |
(LCD_RASTER_MODE 0x1), LCD_CTRL_REG);
+}
+#endif
+static inline void da8xx_fb_clkc_enable(void)
+{
if (lcd_revision == LCD_VERSION_2)
lcdc_write(LCD_V2_DMA_CLK_EN | LCD_V2_LIDD_CLK_EN |
LCD_V2_CORE_CLK_EN, LCD_CLK_ENABLE_REG);
}
-static inline void da8xx_fb_calc_config_clk_divider(struct da8xx_fb_par *par,
+#ifdef CONFIG_COMMON_CLK
+static inline int da8xx_fb_calc_config_clk_divider(struct da8xx_fb_par *par,
+ struct fb_videomode *mode)
+{
+ int ret;
+
+ ret = clk_set_rate(par-child_clk, PICOS2KHZ(mode-pixclock) * 1000);
+ if (IS_ERR_VALUE(ret)) {
+ dev_err(par-dev, unable to setup pixel clock of %u ps,
+ mode-pixclock);
+ return ret;
+ }
+ da8xx_fb_clkc_enable();
+ return 0;
+}
+#else
+static inline int da8xx_fb_calc_config_clk_divider(struct da8xx_fb_par *par,
struct fb_videomode *mode)
{
unsigned div = da8xx_fb_calc_clk_divider(par, mode-pixclock);
da8xx_fb_config_clk_divider(div);
+ da8xx_fb_clkc_enable();
+
+ return 0;
}
+#endif
static int lcd_init(struct da8xx_fb_par *par, const struct lcd_ctrl_config
*cfg,
struct fb_videomode *panel)
@@ -723,7 +770,9 @@ static int lcd_init(struct da8xx_fb_par *par, const struct
lcd_ctrl_config *cfg,
u32 bpp;
int ret = 0;
- da8xx_fb_calc_config_clk_divider(par, panel);
+ ret = da8xx_fb_calc_config_clk_divider(par, panel);
+ if (IS_ERR_VALUE(ret))
+ return ret;
if (panel-sync FB_SYNC_CLK_INVERT)
lcdc_write((lcdc_read(LCD_RASTER_TIMING_2_REG) |
@@ -1406,6 +1455,25 @@ static int fb_probe(struct platform_device *device)
da8xx_fb_lcd_reset();
+#ifdef CONFIG_COMMON_CLK
+ /* set sane divisor value to begin along with the mode */
+ lcdc_write(LCD_RASTER_MODE | LCD_CLK_DIVISOR(LCD_CLK_MIN_DIV
[PATCH v4 01/12] video: da8xx-fb: make io operations safe
Replace __raw_readl/__raw_writel with readl/writel; this driver is
reused on ARMv7 (AM335x SoC).
Signed-off-by: Afzal Mohammed af...@ti.com
---
v2: new patch
drivers/video/da8xx-fb.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c
index 720604c..35a33ca 100644
--- a/drivers/video/da8xx-fb.c
+++ b/drivers/video/da8xx-fb.c
@@ -141,12 +141,12 @@ static int frame_done_flag;
static inline unsigned int lcdc_read(unsigned int addr)
{
- return (unsigned int)__raw_readl(da8xx_fb_reg_base + (addr));
+ return (unsigned int)readl(da8xx_fb_reg_base + (addr));
}
static inline void lcdc_write(unsigned int val, unsigned int addr)
{
- __raw_writel(val, da8xx_fb_reg_base + (addr));
+ writel(val, da8xx_fb_reg_base + (addr));
}
struct da8xx_fb_par {
--
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[PATCH v4 02/12] video: da8xx-fb: fix 24bpp raster configuration
From: Manjunathappa, Prakash prakash...@ti.com Set only LCD_V2_TFT_24BPP_MODE bit for 24bpp and LCD_V2_TFT_24BPP_UNPACK bit along with LCD_V2_TFT_24BPP_MODE for 32bpp configuration. Patch is tested on am335x-evm for 24bpp and da850-evm for 16bpp configurations. Signed-off-by: Manjunathappa, Prakash prakash...@ti.com Signed-off-by: Afzal Mohammed af...@ti.com --- drivers/video/da8xx-fb.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c index 35a33ca..7f92f37 100644 --- a/drivers/video/da8xx-fb.c +++ b/drivers/video/da8xx-fb.c @@ -550,10 +550,10 @@ static int lcd_cfg_frame_buffer(struct da8xx_fb_par *par, u32 width, u32 height, case 4: case 16: break; - case 24: - reg |= LCD_V2_TFT_24BPP_MODE; case 32: reg |= LCD_V2_TFT_24BPP_UNPACK; + case 24: + reg |= LCD_V2_TFT_24BPP_MODE; break; case 8: -- 1.7.12 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v5 00/12] video: da8xx-fb: am335x DT support
Hi, This series adds DT support to da8xx-fb driver (device found on DaVinci and AM335x SoC's). It does certain cleanup's in the process. This series as compared to previous version goes back to v2 way of configuring pixel clock rate. i.e. set divider if rate is within the range that is configurable with existing input clock rate, else change input clock rate as required instead of modeling CCF clock nodes in the driver (more details in 12/12) This makes use of Steffen Trumtrar's v17 of display timing DT support. Testing has been done on AM335x SoC based boards like AM335x EVM. It has also been verified that display on DA850 EVM (non-DT boot) works as earlier. This series is based on v3.8-rc3, and is dependent on, 1. Series v17 of: add display helper by, Steffen Trumtrar s.trumt...@pengutronix.de 2. Patch da8xx: Allow use by am33xx based devices by, Pantelis Antoniou pa...@antoniou-consulting.com 3. Series v3 video: da8xx-fb: runtime timing configuration by, me (Afzal Mohammed af...@ti.com) To test this series on AM335x based boards, 1. Series HWMOD fixes for AM33xx PWM submodules and device tree nodes by, Philip, Avinash avinashphi...@ti.com as well as following, 2. Series v2 ARM: dts: AM33XX: lcdc support, 3. Patch v2 ARM: OMAP2+: dpll: am335x - avoid freqsel, 4. Patch v2 ARM: OMAP2+: clock: DEFINE_STRUCT_CLK_FLAGS helper, 5. Patch v2 ARM: AM33XX: clock: SET_RATE_PARENT in lcd path by, me (Afzal Mohammed af...@ti.com) would be needed. All above dependencies along with those required for testing is available @ git://gitorious.org/x0148406-public/linux-kernel.git tags/da8xx-fb-dt-v5 Regards Afzal v5: use v2 method of configuring pixel clock rate instead of modeling CCF clock nodes in driver, i.e. set divider if rate is within the range that is configurable with existing input clock rate, else change input clock rate as required. v4: use new registration for clock divider having minimum divider requirement and have ifdef'ery in a better way v3: model CCF clock divider with parent propogation if CCF selected v2: 2 new patches - one to configure clock rate properly (12/12)and other to make io operations safe (1/12) Afzal Mohammed (11): video: da8xx-fb: make io operations safe video: da8xx-fb: enable sync lost intr for v2 ip video: da8xx-fb: use devres video: da8xx-fb: ensure non-null cfg in pdata video: da8xx-fb: reorganize panel detection video: da8xx-fb: minimal dt support video: da8xx-fb: invoke platform callback safely video: da8xx-fb: obtain fb_videomode info from dt video: da8xx-fb: ensure pdata only for non-dt video: da8xx-fb: setup struct lcd_ctrl_config for dt video: da8xx-fb: set upstream clock rate (if reqd) Manjunathappa, Prakash (1): video: da8xx-fb: fix 24bpp raster configuration .../devicetree/bindings/video/fb-da8xx.txt | 37 drivers/video/da8xx-fb.c | 226 ++--- 2 files changed, 194 insertions(+), 69 deletions(-) create mode 100644 Documentation/devicetree/bindings/video/fb-da8xx.txt -- 1.7.12 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v5 03/12] video: da8xx-fb: enable sync lost intr for v2 ip
interrupt handler is checking for sync lost interrupt, but it was not enabled, enable it. Signed-off-by: Afzal Mohammed af...@ti.com --- drivers/video/da8xx-fb.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c index 7f92f37..ca69e01 100644 --- a/drivers/video/da8xx-fb.c +++ b/drivers/video/da8xx-fb.c @@ -318,7 +318,7 @@ static void lcd_blit(int load_mode, struct da8xx_fb_par *par) reg_int = lcdc_read(LCD_INT_ENABLE_SET_REG) | LCD_V2_END_OF_FRAME0_INT_ENA | LCD_V2_END_OF_FRAME1_INT_ENA | - LCD_FRAME_DONE; + LCD_FRAME_DONE | LCD_SYNC_LOST; lcdc_write(reg_int, LCD_INT_ENABLE_SET_REG); } reg_dma |= LCD_DUAL_FRAME_BUFFER_ENABLE; -- 1.7.12 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v5 04/12] video: da8xx-fb: use devres
Replace existing resource handling in the driver with managed device
resource.
Signed-off-by: Afzal Mohammed af...@ti.com
---
drivers/video/da8xx-fb.c | 35 ++-
1 file changed, 6 insertions(+), 29 deletions(-)
diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c
index ca69e01..7a32e83 100644
--- a/drivers/video/da8xx-fb.c
+++ b/drivers/video/da8xx-fb.c
@@ -1036,12 +1036,9 @@ static int fb_remove(struct platform_device *dev)
par-p_palette_base);
dma_free_coherent(NULL, par-vram_size, par-vram_virt,
par-vram_phys);
- free_irq(par-irq, par);
pm_runtime_put_sync(dev-dev);
pm_runtime_disable(dev-dev);
framebuffer_release(info);
- iounmap(da8xx_fb_reg_base);
- release_mem_region(lcdc_regs-start, resource_size(lcdc_regs));
}
return 0;
@@ -1265,7 +1262,6 @@ static int fb_probe(struct platform_device *device)
struct fb_info *da8xx_fb_info;
struct clk *fb_clk = NULL;
struct da8xx_fb_par *par;
- resource_size_t len;
int ret, i;
unsigned long ulcm;
@@ -1275,29 +1271,16 @@ static int fb_probe(struct platform_device *device)
}
lcdc_regs = platform_get_resource(device, IORESOURCE_MEM, 0);
- if (!lcdc_regs) {
- dev_err(device-dev,
- Can not get memory resource for LCD controller\n);
- return -ENOENT;
- }
-
- len = resource_size(lcdc_regs);
-
- lcdc_regs = request_mem_region(lcdc_regs-start, len, lcdc_regs-name);
- if (!lcdc_regs)
- return -EBUSY;
-
- da8xx_fb_reg_base = ioremap(lcdc_regs-start, len);
+ da8xx_fb_reg_base = devm_request_and_ioremap(device-dev, lcdc_regs);
if (!da8xx_fb_reg_base) {
- ret = -EBUSY;
- goto err_request_mem;
+ dev_err(device-dev, memory resource setup failed\n);
+ return -EADDRNOTAVAIL;
}
- fb_clk = clk_get(device-dev, fck);
+ fb_clk = devm_clk_get(device-dev, fck);
if (IS_ERR(fb_clk)) {
dev_err(device-dev, Can not get device clock\n);
- ret = -ENODEV;
- goto err_ioremap;
+ return -ENODEV;
}
pm_runtime_enable(device-dev);
@@ -1458,7 +1441,7 @@ static int fb_probe(struct platform_device *device)
lcdc_irq_handler = lcdc_irq_handler_rev02;
}
- ret = request_irq(par-irq, lcdc_irq_handler, 0,
+ ret = devm_request_irq(device-dev, par-irq, lcdc_irq_handler, 0,
DRIVER_NAME, par);
if (ret)
goto irq_freq;
@@ -1488,12 +1471,6 @@ err_pm_runtime_disable:
pm_runtime_put_sync(device-dev);
pm_runtime_disable(device-dev);
-err_ioremap:
- iounmap(da8xx_fb_reg_base);
-
-err_request_mem:
- release_mem_region(lcdc_regs-start, len);
-
return ret;
}
--
1.7.12
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[PATCH v5 05/12] video: da8xx-fb: ensure non-null cfg in pdata
Ensure that platform data contains pointer for lcd_ctrl_config.
Signed-off-by: Afzal Mohammed af...@ti.com
---
drivers/video/da8xx-fb.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c
index 7a32e83..3b146bc 100644
--- a/drivers/video/da8xx-fb.c
+++ b/drivers/video/da8xx-fb.c
@@ -1320,6 +1320,11 @@ static int fb_probe(struct platform_device *device)
lcd_cfg = (struct lcd_ctrl_config *)fb_pdata-controller_data;
+ if (!lcd_cfg) {
+ ret = -EINVAL;
+ goto err_pm_runtime_disable;
+ }
+
da8xx_fb_info = framebuffer_alloc(sizeof(struct da8xx_fb_par),
device-dev);
if (!da8xx_fb_info) {
--
1.7.12
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[PATCH v5 09/12] video: da8xx-fb: obtain fb_videomode info from dt
Obtain fb_videomode details for the connected lcd panel using the
display timing details present in DT.
Signed-off-by: Afzal Mohammed af...@ti.com
---
.../devicetree/bindings/video/fb-da8xx.txt | 21 +
drivers/video/da8xx-fb.c| 17 +
2 files changed, 38 insertions(+)
diff --git a/Documentation/devicetree/bindings/video/fb-da8xx.txt
b/Documentation/devicetree/bindings/video/fb-da8xx.txt
index 581e014..0741f78 100644
--- a/Documentation/devicetree/bindings/video/fb-da8xx.txt
+++ b/Documentation/devicetree/bindings/video/fb-da8xx.txt
@@ -6,6 +6,12 @@ Required properties:
AM335x SoC's - ti,am3352-lcdc, ti,da830-lcdc
- reg: Address range of lcdc register set
- interrupts: lcdc interrupt
+- display-timings: typical videomode of lcd panel, represented as child.
+ Refer Documentation/devicetree/bindings/video/display-timing.txt for
+ display timing binding details. If multiple videomodes are mentioned
+ in display timings node, typical videomode has to be mentioned as the
+ native mode or it has to be first child (driver cares only for native
+ videomode).
Example:
@@ -13,4 +19,19 @@ lcdc@4830e000 {
compatible = ti,am3352-lcdc, ti,da830-lcdc;
reg = 0x4830e000 0x1000;
interrupts = 36;
+ display-timings {
+ 800x480p62 {
+ clock-frequency = 3000;
+ hactive = 800;
+ vactive = 480;
+ hfront-porch = 39;
+ hback-porch = 39;
+ hsync-len = 47;
+ vback-porch = 29;
+ vfront-porch = 13;
+ vsync-len = 2;
+ hsync-active = 1;
+ vsync-active = 1;
+ };
+ };
};
diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c
index 0beed20..0c68712 100644
--- a/drivers/video/da8xx-fb.c
+++ b/drivers/video/da8xx-fb.c
@@ -36,6 +36,7 @@
#include linux/slab.h
#include linux/delay.h
#include linux/lcm.h
+#include video/of_display_timing.h
#include video/da8xx-fb.h
#include asm/div64.h
@@ -1257,8 +1258,24 @@ static struct fb_videomode
*da8xx_fb_get_videomode(struct platform_device *dev)
{
struct da8xx_lcdc_platform_data *fb_pdata = dev-dev.platform_data;
struct fb_videomode *lcdc_info;
+ struct device_node *np = dev-dev.of_node;
int i;
+ if (np) {
+ lcdc_info = devm_kzalloc(dev-dev,
+sizeof(struct fb_videomode),
+GFP_KERNEL);
+ if (!lcdc_info) {
+ dev_err(dev-dev, memory allocation failed\n);
+ return NULL;
+ }
+ if (of_get_fb_videomode(np, lcdc_info, OF_USE_NATIVE_MODE)) {
+ dev_err(dev-dev, timings not available in DT\n);
+ return NULL;
+ }
+ return lcdc_info;
+ }
+
for (i = 0, lcdc_info = known_lcd_panels;
i ARRAY_SIZE(known_lcd_panels); i++, lcdc_info++) {
if (strcmp(fb_pdata-type, lcdc_info-name) == 0)
--
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[PATCH v5 10/12] video: da8xx-fb: ensure pdata only for non-dt
This driver is DT probe-able, hence ensure presence of platform data
only for non-DT boot.
Signed-off-by: Afzal Mohammed af...@ti.com
---
drivers/video/da8xx-fb.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c
index 0c68712..1c1a616 100644
--- a/drivers/video/da8xx-fb.c
+++ b/drivers/video/da8xx-fb.c
@@ -1303,7 +1303,7 @@ static int fb_probe(struct platform_device *device)
int ret;
unsigned long ulcm;
- if (fb_pdata == NULL) {
+ if (fb_pdata == NULL !device-dev.of_node) {
dev_err(device-dev, Can not get platform data\n);
return -ENOENT;
}
--
1.7.12
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[PATCH v5 06/12] video: da8xx-fb: reorganize panel detection
Move panel detection to a separate function, this helps in readability
as well as makes DT support cleaner.
Signed-off-by: Afzal Mohammed af...@ti.com
---
drivers/video/da8xx-fb.c | 42 ++
1 file changed, 26 insertions(+), 16 deletions(-)
diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c
index 3b146bc..b6ea5e9 100644
--- a/drivers/video/da8xx-fb.c
+++ b/drivers/video/da8xx-fb.c
@@ -1253,6 +1253,27 @@ static struct fb_ops da8xx_fb_ops = {
.fb_blank = cfb_blank,
};
+static struct fb_videomode *da8xx_fb_get_videomode(struct platform_device *dev)
+{
+ struct da8xx_lcdc_platform_data *fb_pdata = dev-dev.platform_data;
+ struct fb_videomode *lcdc_info;
+ int i;
+
+ for (i = 0, lcdc_info = known_lcd_panels;
+ i ARRAY_SIZE(known_lcd_panels); i++, lcdc_info++) {
+ if (strcmp(fb_pdata-type, lcdc_info-name) == 0)
+ break;
+ }
+
+ if (i == ARRAY_SIZE(known_lcd_panels)) {
+ dev_err(dev-dev, no panel found\n);
+ return NULL;
+ }
+ dev_info(dev-dev, found %s panel\n, lcdc_info-name);
+
+ return lcdc_info;
+}
+
static int fb_probe(struct platform_device *device)
{
struct da8xx_lcdc_platform_data *fb_pdata =
@@ -1262,7 +1283,7 @@ static int fb_probe(struct platform_device *device)
struct fb_info *da8xx_fb_info;
struct clk *fb_clk = NULL;
struct da8xx_fb_par *par;
- int ret, i;
+ int ret;
unsigned long ulcm;
if (fb_pdata == NULL) {
@@ -1270,6 +1291,10 @@ static int fb_probe(struct platform_device *device)
return -ENOENT;
}
+ lcdc_info = da8xx_fb_get_videomode(device);
+ if (lcdc_info == NULL)
+ return -ENODEV;
+
lcdc_regs = platform_get_resource(device, IORESOURCE_MEM, 0);
da8xx_fb_reg_base = devm_request_and_ioremap(device-dev, lcdc_regs);
if (!da8xx_fb_reg_base) {
@@ -1303,21 +1328,6 @@ static int fb_probe(struct platform_device *device)
break;
}
- for (i = 0, lcdc_info = known_lcd_panels;
- i ARRAY_SIZE(known_lcd_panels);
- i++, lcdc_info++) {
- if (strcmp(fb_pdata-type, lcdc_info-name) == 0)
- break;
- }
-
- if (i == ARRAY_SIZE(known_lcd_panels)) {
- dev_err(device-dev, GLCD: No valid panel found\n);
- ret = -ENODEV;
- goto err_pm_runtime_disable;
- } else
- dev_info(device-dev, GLCD: Found %s panel\n,
- fb_pdata-type);
-
lcd_cfg = (struct lcd_ctrl_config *)fb_pdata-controller_data;
if (!lcd_cfg) {
--
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[PATCH v5 07/12] video: da8xx-fb: minimal dt support
Driver is provided a means to have the probe triggered by DT.
Signed-off-by: Afzal Mohammed af...@ti.com
---
Documentation/devicetree/bindings/video/fb-da8xx.txt | 16
drivers/video/da8xx-fb.c | 7 +++
2 files changed, 23 insertions(+)
create mode 100644 Documentation/devicetree/bindings/video/fb-da8xx.txt
diff --git a/Documentation/devicetree/bindings/video/fb-da8xx.txt
b/Documentation/devicetree/bindings/video/fb-da8xx.txt
new file mode 100644
index 000..581e014
--- /dev/null
+++ b/Documentation/devicetree/bindings/video/fb-da8xx.txt
@@ -0,0 +1,16 @@
+TI LCD Controller on DA830/DA850/AM335x SoC's
+
+Required properties:
+- compatible:
+ DA830 - ti,da830-lcdc
+ AM335x SoC's - ti,am3352-lcdc, ti,da830-lcdc
+- reg: Address range of lcdc register set
+- interrupts: lcdc interrupt
+
+Example:
+
+lcdc@4830e000 {
+ compatible = ti,am3352-lcdc, ti,da830-lcdc;
+ reg = 0x4830e000 0x1000;
+ interrupts = 36;
+};
diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c
index b6ea5e9..08ee8eb 100644
--- a/drivers/video/da8xx-fb.c
+++ b/drivers/video/da8xx-fb.c
@@ -1595,6 +1595,12 @@ static int fb_resume(struct platform_device *dev)
#define fb_resume NULL
#endif
+static const struct of_device_id da8xx_fb_of_match[] = {
+ {.compatible = ti,da830-lcdc, },
+ {},
+};
+MODULE_DEVICE_TABLE(of, da8xx_fb_of_match);
+
static struct platform_driver da8xx_fb_driver = {
.probe = fb_probe,
.remove = fb_remove,
@@ -1603,6 +1609,7 @@ static struct platform_driver da8xx_fb_driver = {
.driver = {
.name = DRIVER_NAME,
.owner = THIS_MODULE,
+ .of_match_table = of_match_ptr(da8xx_fb_of_match),
},
};
--
1.7.12
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[PATCH v5 08/12] video: da8xx-fb: invoke platform callback safely
Ensure that platform data is present before checking whether platform
callback is present (the one used to control backlight). So far this
was not an issue as driver was purely non-DT triggered, but now DT
support has been added.
Signed-off-by: Afzal Mohammed af...@ti.com
---
drivers/video/da8xx-fb.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c
index 08ee8eb..0beed20 100644
--- a/drivers/video/da8xx-fb.c
+++ b/drivers/video/da8xx-fb.c
@@ -1347,7 +1347,7 @@ static int fb_probe(struct platform_device *device)
par-dev = device-dev;
par-lcdc_clk = fb_clk;
par-lcd_fck_rate = clk_get_rate(fb_clk);
- if (fb_pdata-panel_power_ctrl) {
+ if (fb_pdata fb_pdata-panel_power_ctrl) {
par-panel_power_ctrl = fb_pdata-panel_power_ctrl;
par-panel_power_ctrl(1);
}
--
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[PATCH v5 11/12] video: da8xx-fb: setup struct lcd_ctrl_config for dt
strcut lcd_ctrl_config information required for driver is currently
obtained via platform data. To handle DT probing, create
lcd_ctrl_config and populate it with default values, these values are
sufficient for the panels so far used with this controller to work.
Signed-off-by: Afzal Mohammed af...@ti.com
---
drivers/video/da8xx-fb.c | 34 +-
1 file changed, 33 insertions(+), 1 deletion(-)
diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c
index 1c1a616..5455682 100644
--- a/drivers/video/da8xx-fb.c
+++ b/drivers/video/da8xx-fb.c
@@ -1254,6 +1254,35 @@ static struct fb_ops da8xx_fb_ops = {
.fb_blank = cfb_blank,
};
+static struct lcd_ctrl_config *da8xx_fb_create_cfg(struct platform_device *dev)
+{
+ struct lcd_ctrl_config *cfg;
+
+ cfg = devm_kzalloc(dev-dev, sizeof(struct fb_videomode), GFP_KERNEL);
+ if (!cfg) {
+ dev_err(dev-dev, memory allocation failed\n);
+ return NULL;
+ }
+
+ /* default values */
+
+ if (lcd_revision == LCD_VERSION_1)
+ cfg-bpp = 16;
+ else
+ cfg-bpp = 32;
+
+ /*
+* For panels so far used with this LCDC, below statement is sufficient.
+* For new panels, if required, struct lcd_ctrl_cfg fields to be updated
+* with additional/modified values. Those values would have to be then
+* obtained from dt(requiring new dt bindings).
+*/
+
+ cfg-panel_shade = COLOR_ACTIVE;
+
+ return cfg;
+}
+
static struct fb_videomode *da8xx_fb_get_videomode(struct platform_device *dev)
{
struct da8xx_lcdc_platform_data *fb_pdata = dev-dev.platform_data;
@@ -1345,7 +1374,10 @@ static int fb_probe(struct platform_device *device)
break;
}
- lcd_cfg = (struct lcd_ctrl_config *)fb_pdata-controller_data;
+ if (device-dev.of_node)
+ lcd_cfg = da8xx_fb_create_cfg(device);
+ else
+ lcd_cfg = (struct lcd_ctrl_config *)fb_pdata-controller_data;
if (!lcd_cfg) {
ret = -EINVAL;
--
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[PATCH v5 12/12] video: da8xx-fb: set upstream clock rate (if reqd)
LCDC IP has a clock divider to adjust pixel clock, this limits pixel
clock range to fck/255 - fck/2(fck - rate of input clock to LCDC IP).
In the case of AM335x, where this IP is present, default fck is not
sufficient to provide normal pixel clock rates, hence rendering this
driver unusable on AM335x.
If input clock too is configurable, allowable range of pixel clock
would increase. Here initially it is checked whether with present fck,
divider in IP could be configured to obtain required rate, if not,
fck is adjusted. This makes it usable on AM335x.
Note:
Another solution would be to model an inherited basic clock divider of
CCF, an advantage would be a better possible resolution for pixel clk.
And trying to instantiate a CCF clock would mean that to be consistent,
3 bits being turned on to enable clocks of LCDC IP would have to be
modeled as gate clocks. Now that would bring in a total of 4 clocks,
including necessity to create a new inherited divider clock, and that
mean a branch of clock tree would be present in LCDC driver. This
would add complexity to LCDC driver bringing in considerable amount
of clock handling code, and this would not bring in much advantage
for existing use cases other than providing a higher resolution of
pixel clock. And existing use cases work without relying on clock
modeling. Another fact is that out of the two platform's using this
driver DaVinci is not yet converted to CCF. In future if higher
resolution of pixel clock is required, and probably after DaVinci is
CCF'ed, modeling clock nodes inside driver may be considered.
Signed-off-by: Afzal Mohammed af...@ti.com
---
v5: use v2 method of configuring pixel clock rate instead of modeling
CCF clock nodes in driver, i.e. set divider if rate is within
the range that is configurable with existing input clock rate,
else change input clock rate as required.
v4: use new registration for clock divider having minimum divider
requirement and have ifdef'ery in a better way
v3: model CCF clock divider with parent propogation if CCF selected
v2: new patch
drivers/video/da8xx-fb.c | 76
1 file changed, 58 insertions(+), 18 deletions(-)
diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c
index 5455682..09dfa12 100644
--- a/drivers/video/da8xx-fb.c
+++ b/drivers/video/da8xx-fb.c
@@ -133,6 +133,9 @@
#define WSI_TIMEOUT50
#define PALETTE_SIZE 256
+#defineCLK_MIN_DIV 2
+#defineCLK_MAX_DIV 255
+
static void __iomem *da8xx_fb_reg_base;
static struct resource *lcdc_regs;
static unsigned int lcd_revision;
@@ -683,23 +686,21 @@ static void da8xx_fb_lcd_reset(void)
}
}
-static inline unsigned da8xx_fb_calc_clk_divider(struct da8xx_fb_par *par,
-unsigned pixclock)
-{
- return par-lcd_fck_rate / (PICOS2KHZ(pixclock) * 1000);
-}
-
-static inline unsigned da8xx_fb_round_clk(struct da8xx_fb_par *par,
- unsigned pixclock)
+static int da8xx_fb_config_clk_divider(struct da8xx_fb_par *par,
+ unsigned div, unsigned rate)
{
- unsigned div;
+ int ret;
- div = da8xx_fb_calc_clk_divider(par, pixclock);
- return KHZ2PICOS(par-lcd_fck_rate / (1000 * div));
-}
+ if (par-lcd_fck_rate != rate) {
+ ret = clk_set_rate(par-lcdc_clk, rate);
+ if (IS_ERR_VALUE(ret)) {
+ dev_err(par-dev,
+ unable to set clock rate at %u\n, rate);
+ return ret;
+ }
+ par-lcd_fck_rate = clk_get_rate(par-lcdc_clk);
+ }
-static inline void da8xx_fb_config_clk_divider(unsigned div)
-{
/* Configure the LCD clock divisor. */
lcdc_write(LCD_CLK_DIVISOR(div) |
(LCD_RASTER_MODE 0x1), LCD_CTRL_REG);
@@ -707,14 +708,49 @@ static inline void da8xx_fb_config_clk_divider(unsigned
div)
if (lcd_revision == LCD_VERSION_2)
lcdc_write(LCD_V2_DMA_CLK_EN | LCD_V2_LIDD_CLK_EN |
LCD_V2_CORE_CLK_EN, LCD_CLK_ENABLE_REG);
+
+ return 0;
+}
+
+static unsigned int da8xx_fb_calc_clk_divider(struct da8xx_fb_par *par,
+ unsigned pixclock,
+ unsigned *rate)
+{
+ unsigned div;
+
+ pixclock = PICOS2KHZ(pixclock) * 1000;
+
+ *rate = par-lcd_fck_rate;
+
+ if (pixclock (*rate / CLK_MAX_DIV)) {
+ *rate = clk_round_rate(par-lcdc_clk, pixclock * CLK_MAX_DIV);
+ div = CLK_MAX_DIV;
+ } else if (pixclock (*rate / CLK_MIN_DIV)) {
+ *rate = clk_round_rate(par-lcdc_clk, pixclock * CLK_MIN_DIV);
+ div = CLK_MIN_DIV;
+ } else {
+ div = *rate / pixclock;
+ }
+
+ return div;
}
-static inline void
[PATCH v5 01/12] video: da8xx-fb: make io operations safe
Replace __raw_readl/__raw_writel with readl/writel; this driver is
reused on ARMv7 (AM335x SoC).
Signed-off-by: Afzal Mohammed af...@ti.com
---
v2: new patch
drivers/video/da8xx-fb.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c
index 720604c..35a33ca 100644
--- a/drivers/video/da8xx-fb.c
+++ b/drivers/video/da8xx-fb.c
@@ -141,12 +141,12 @@ static int frame_done_flag;
static inline unsigned int lcdc_read(unsigned int addr)
{
- return (unsigned int)__raw_readl(da8xx_fb_reg_base + (addr));
+ return (unsigned int)readl(da8xx_fb_reg_base + (addr));
}
static inline void lcdc_write(unsigned int val, unsigned int addr)
{
- __raw_writel(val, da8xx_fb_reg_base + (addr));
+ writel(val, da8xx_fb_reg_base + (addr));
}
struct da8xx_fb_par {
--
1.7.12
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[PATCH v5 02/12] video: da8xx-fb: fix 24bpp raster configuration
From: Manjunathappa, Prakash prakash...@ti.com Set only LCD_V2_TFT_24BPP_MODE bit for 24bpp and LCD_V2_TFT_24BPP_UNPACK bit along with LCD_V2_TFT_24BPP_MODE for 32bpp configuration. Patch is tested on am335x-evm for 24bpp and da850-evm for 16bpp configurations. Signed-off-by: Manjunathappa, Prakash prakash...@ti.com Signed-off-by: Afzal Mohammed af...@ti.com --- drivers/video/da8xx-fb.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c index 35a33ca..7f92f37 100644 --- a/drivers/video/da8xx-fb.c +++ b/drivers/video/da8xx-fb.c @@ -550,10 +550,10 @@ static int lcd_cfg_frame_buffer(struct da8xx_fb_par *par, u32 width, u32 height, case 4: case 16: break; - case 24: - reg |= LCD_V2_TFT_24BPP_MODE; case 32: reg |= LCD_V2_TFT_24BPP_UNPACK; + case 24: + reg |= LCD_V2_TFT_24BPP_MODE; break; case 8: -- 1.7.12 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[RFC 0/8] ARM: AM43 (OMAP2+) boot support
Hi, This series adds minimal support to boot Linux on platforms having AM43 based SoC's. This is being sent as an RFC to seek opinion about modification in twd to register percpu local timer clock event for scheduler tick in the case of one core SMP. AM43 SoC's are based on ARM Cortex-A9. It is an ARM Cortex-A9 SMP configuration with one core (not uniprocessor configuration). AM43 is similar to AM335x in it's peripheral capabilities, with many of the peripheral register mapping's similar like that of uart. AM43 is in pre-silicon stage and currently there are no public documents. This series has been tested on a pre-silicon platform that emulates AM43 SoC, changes proposed here are minimal - to get it booting. Kernel was directly run without the help of bootloader - Images were directly loaded onto a pre-initialized RAM and ARM registers updated as required for booting. Changes have been made over linux-next (next-20130213) with three OF related reverts (which otherwise causes problem in other platforms also) and compiled with omap2plus_defconfig. Multiplatform option was enabled, while most of CONFIG options were deselected for a faster boot. Beagle bone boots as earlier with these changes. An interesting observation is that it may be possible to boot this platform to console without any platform specific modification to proper Kernel (by that I mean excluding DT sources) using Arnd's, [PATCH,RFC] default machine descriptor for multiplatform, along with a CLOCKSOURCE_OF_DECLARE for smp twd. But later on to make SoC do any really useful work or to get done things that the SoC is meant to do, platform changes like omap-hwmod, handling power management, clock tree, detecting SoC capabilities etc would have to be made, necessitating DT_MACHINE_START at least in the foreseeable future. Patch - 8 that makes AM43 boot on pre-silicon platform would be replaced later by a one for original board. Last but not least, thanks to Ankur Kishore a-kish...@ti.com (who first made Linux to boot on AM43) for all the help that made Linux bringup easier. Regards Afzal Afzal Mohammed (8): ARM: localtimer: return percpu clkevt on register ARM: twd: register clock event for 1 core SMP ARM: twd: clock rate from DT (if no DT clk tree) ARM: am33xx: ll debug config help ARM: OMAP2+: am43: Kconfig ARM: OMAP2+: am43: basic dt support ARM: dts: am4372: initial support ARM: dts: am43-pre-silicon support Documentation/devicetree/bindings/arm/twd.txt | 7 +++- arch/arm/Kconfig.debug| 3 ++ arch/arm/boot/dts/Makefile| 3 +- arch/arm/boot/dts/am43-pre-silicon.dts| 31 +++ arch/arm/boot/dts/am4372.dtsi | 55 +++ arch/arm/include/asm/localtimer.h | 7 ++-- arch/arm/kernel/smp.c | 8 ++-- arch/arm/kernel/smp_twd.c | 16 +++- arch/arm/mach-omap2/Kconfig | 11 ++ arch/arm/mach-omap2/board-generic.c | 18 + 10 files changed, 148 insertions(+), 11 deletions(-) create mode 100644 arch/arm/boot/dts/am43-pre-silicon.dts create mode 100644 arch/arm/boot/dts/am4372.dtsi -- 1.7.12 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[RFC 1/8] ARM: localtimer: return percpu clkevt on register
Return percpu clock event on local timer register. It is the boot cpu
that calls this and it can use the returned percpu clock event to
register a clock event in the case of SMP configuration with one core.
This helps to have a booting Kernel even if no other timer is
registered for clock tick.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/include/asm/localtimer.h | 7 ---
arch/arm/kernel/smp.c | 8
arch/arm/kernel/smp_twd.c | 5 +++--
3 files changed, 11 insertions(+), 9 deletions(-)
diff --git a/arch/arm/include/asm/localtimer.h
b/arch/arm/include/asm/localtimer.h
index f77ffc1..c3f89c0 100644
--- a/arch/arm/include/asm/localtimer.h
+++ b/arch/arm/include/asm/localtimer.h
@@ -23,11 +23,12 @@ struct local_timer_ops {
/*
* Register a local timer driver
*/
-int local_timer_register(struct local_timer_ops *);
+struct clock_event_device *local_timer_register(struct local_timer_ops *);
#else
-static inline int local_timer_register(struct local_timer_ops *ops)
+static inline
+struct clock_event_device *local_timer_register(struct local_timer_ops *ops)
{
- return -ENXIO;
+ return ERR_PTR(-ENXIO);
}
#endif
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index 5f73f70..42d95d6 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -491,16 +491,16 @@ static void __cpuinit broadcast_timer_setup(struct
clock_event_device *evt)
static struct local_timer_ops *lt_ops;
#ifdef CONFIG_LOCAL_TIMERS
-int local_timer_register(struct local_timer_ops *ops)
+struct clock_event_device *local_timer_register(struct local_timer_ops *ops)
{
if (!is_smp() || !setup_max_cpus)
- return -ENXIO;
+ return ERR_PTR(-ENXIO);
if (lt_ops)
- return -EBUSY;
+ return ERR_PTR(-EBUSY);
lt_ops = ops;
- return 0;
+ return per_cpu(percpu_clockevent, smp_processor_id());
}
#endif
diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c
index c092115..616268c 100644
--- a/arch/arm/kernel/smp_twd.c
+++ b/arch/arm/kernel/smp_twd.c
@@ -315,6 +315,7 @@ static struct local_timer_ops twd_lt_ops __cpuinitdata = {
static int __init twd_local_timer_common_register(struct device_node *np)
{
int err;
+ struct clock_event_device *evt;
twd_evt = alloc_percpu(struct clock_event_device *);
if (!twd_evt) {
@@ -328,8 +329,8 @@ static int __init twd_local_timer_common_register(struct
device_node *np)
goto out_free;
}
- err = local_timer_register(twd_lt_ops);
- if (err)
+ evt = local_timer_register(twd_lt_ops);
+ if (IS_ERR(evt))
goto out_irq;
twd_get_clock(np);
--
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[RFC 7/8] ARM: dts: am4372: initial support
DT source (minimal) for AM4372 SoC. Those represented here are the
minimal DT nodes necessary to get kernel booting.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/boot/dts/am4372.dtsi | 55 +++
1 file changed, 55 insertions(+)
create mode 100644 arch/arm/boot/dts/am4372.dtsi
diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
new file mode 100644
index 000..178c41f
--- /dev/null
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -0,0 +1,55 @@
+/*
+ * Device Tree Source for AM4372 SoC
+ *
+ * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed as is without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/include/ skeleton.dtsi
+
+/ {
+ compatible = ti,am4372, ti,am43;
+ interrupt-parent = gic;
+
+
+ aliases {
+ serial0 = uart1;
+ };
+
+ cpus {
+ cpu@0 {
+ compatible = arm,cortex-a9;
+ };
+ };
+
+ gic: interrupt-controller@48241000 {
+ compatible = arm,cortex-a9-gic;
+ interrupt-controller;
+ #interrupt-cells = 3;
+ reg = 0x48241000 0x1000,
+ 0x48240100 0x0100;
+ };
+
+ twd1: local-timer@0x48240600 {
+ compatible = arm,cortex-a9-twd-timer;
+ reg = 0x48240600 0x20;
+ interrupts = 1 13 0x304;
+ };
+
+ ocp {
+ compatible = simple-bus;
+ #address-cells = 1;
+ #size-cells = 1;
+ ranges;
+
+ uart1: serial@44e09000 {
+ compatible = ti,am4372-uart,ti,omap2-uart;
+ clock-frequency = 4800;
+ reg = 0x44e09000 0x2000;
+ interrupts = 0 72 0x4;
+ };
+ };
+};
--
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[RFC 4/8] ARM: am33xx: ll debug config help
Selecting DEBUG_AM33XXUART1 routes low level debug messages to first UART instance of AM335x based SoC's. This selection is valid for upcoming AM43 based SoC's too. Make this information available upon configuring. Signed-off-by: Afzal Mohammed af...@ti.com --- arch/arm/Kconfig.debug | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index aca..b717b78 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -542,6 +542,9 @@ choice config DEBUG_AM33XXUART1 bool AM33XX UART1 + help + Route low level debug messages to first uart instance + for boards based on am335 and am43 family of SoC's config DEBUG_ZOOM_UART bool Zoom2/3 UART -- 1.7.12 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[RFC 5/8] ARM: OMAP2+: am43: Kconfig
Add Kconfig option for AM43 family of SoC's, these are ARM Cortex A9 based (SMP configuration with 1 core). Signed-off-by: Afzal Mohammed af...@ti.com --- arch/arm/mach-omap2/Kconfig | 11 +++ 1 file changed, 11 insertions(+) diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 49ac3df..683fbaa 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -141,6 +141,17 @@ config SOC_AM33XX select MULTI_IRQ_HANDLER select COMMON_CLK +config SOC_AM43 + bool TI AM43 + depends on ARCH_OMAP2PLUS + default y + select CPU_V7 + select HAVE_SMP + select LOCAL_TIMERS if SMP + select MULTI_IRQ_HANDLER + select ARM_GIC + select COMMON_CLK + config OMAP_PACKAGE_ZAF bool -- 1.7.12 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[RFC 6/8] ARM: OMAP2+: am43: basic dt support
Describe minimal DT boot machine details for AM43 based SoC's. AM43
family of SoC's are ARM Cortex-A9 based with one core in SMP
configuration. Low level debug could be achieved by selecting
DEBUG_AM33XXUART1. To boot AM43 SoC, this change is sufficient w.r.t
Kernel (considering the fact that strictly speaking DT sources does
not classify as a part of Kernel). Here private timer of the one and
only core is being used as clock event (as well as, as time source).
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/board-generic.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/arch/arm/mach-omap2/board-generic.c
b/arch/arm/mach-omap2/board-generic.c
index 0274ff7..e083f08 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -15,7 +15,10 @@
#include linux/of_irq.h
#include linux/of_platform.h
#include linux/irqdomain.h
+#include linux/irqchip.h
+#include asm/mach/map.h
+#include asm/smp_twd.h
#include asm/mach/arch.h
#include common.h
@@ -182,3 +185,18 @@ DT_MACHINE_START(OMAP5_DT, Generic OMAP5 (Flattened
Device Tree))
.restart= omap44xx_restart,
MACHINE_END
#endif
+
+#ifdef CONFIG_SOC_AM43
+static const char *am43_boards_compat[] __initdata = {
+ ti,am43,
+ NULL,
+};
+
+DT_MACHINE_START(AM43_DT, Generic AM43 (Flattened Device Tree))
+ .map_io = debug_ll_io_init,
+ .init_irq = irqchip_init,
+ .init_machine = omap_generic_init,
+ .init_time = twd_local_timer_of_register,
+ .dt_compat = am43_boards_compat,
+MACHINE_END
+#endif
--
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[RFC 8/8] ARM: dts: am43-pre-silicon support
AM43 SoC is in pre-silicon stage, meanwhile it has been modelled in
a pre-silicon platform. To validate and boot Linux in pre-silicon
platform that emulates an AM43 SoC, add DT build support.
As bootloader is not used, bootargs is passed through DT.
Note: This would be replaced by an original board support.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/boot/dts/Makefile | 3 ++-
arch/arm/boot/dts/am43-pre-silicon.dts | 31 +++
2 files changed, 33 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/boot/dts/am43-pre-silicon.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 94d88b9..b434344 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -124,7 +124,8 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
omap5-evm.dtb \
am335x-evm.dtb \
am335x-evmsk.dtb \
- am335x-bone.dtb
+ am335x-bone.dtb \
+ am43-pre-silicon.dtb
dtb-$(CONFIG_ARCH_ORION5X) += orion5x-lacie-ethernet-disk-mini-v2.dtb
dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb
dtb-$(CONFIG_ARCH_U8500) += snowball.dtb \
diff --git a/arch/arm/boot/dts/am43-pre-silicon.dts
b/arch/arm/boot/dts/am43-pre-silicon.dts
new file mode 100644
index 000..b9c6297
--- /dev/null
+++ b/arch/arm/boot/dts/am43-pre-silicon.dts
@@ -0,0 +1,31 @@
+/*
+ * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/* AM43 Pre Silicon */
+
+/dts-v1/;
+
+/include/ am4372.dtsi
+
+/ {
+ model = TI AM43 Pre Silicon;
+ compatible = ti,am43-pre-silicon,ti,am4372,ti,am43;
+
+ memory {
+ device_type = memory;
+ reg = 0x8000 0x1000; /* 256 MB */
+ };
+
+ chosen {
+ bootargs = console=ttyO0,115200n8 root=/dev/ram rw
initrd=0x8200,32MB earlyprintk;
+ };
+};
+
+twd1 {
+ clock-frequency = 3;
+};
--
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[RFC 3/8] ARM: twd: clock rate from DT (if no DT clk tree)
Add an optional property to find clock-frequency from DT. This helps
as a fallback mechanism in case there is no representation of clock
tree in DT.
Signed-off-by: Afzal Mohammed af...@ti.com
---
Documentation/devicetree/bindings/arm/twd.txt | 7 ++-
arch/arm/kernel/smp_twd.c | 8
2 files changed, 14 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/arm/twd.txt
b/Documentation/devicetree/bindings/arm/twd.txt
index 75b8610..fdafa4f 100644
--- a/Documentation/devicetree/bindings/arm/twd.txt
+++ b/Documentation/devicetree/bindings/arm/twd.txt
@@ -7,8 +7,9 @@ and watchdog.
The TWD is usually attached to a GIC to deliver its two per-processor
interrupts.
-** Timer node required properties:
+** Timer node properties:
+Required properties:
- compatible : Should be one of:
arm,cortex-a9-twd-timer
arm,cortex-a5-twd-timer
@@ -19,12 +20,16 @@ interrupts.
- reg : Specify the base address and the size of the TWD timer
register window.
+Optional property:
+- clock-frequency : frequency(Hz) of peripheral clock fed to timer
+
Example:
twd-timer@2c000600 {
compatible = arm,arm11mp-twd-timer;
reg = 0x2c000600 0x20;
interrupts = 1 13 0xf01;
+ clock-frequency = 3;
};
** Watchdog node properties:
diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c
index 118f4f2..aac0f9f 100644
--- a/arch/arm/kernel/smp_twd.c
+++ b/arch/arm/kernel/smp_twd.c
@@ -247,7 +247,15 @@ static void twd_get_clock(struct device_node *np)
twd_clk = clk_get_sys(smp_twd, NULL);
if (IS_ERR(twd_clk)) {
+ u32 freq;
+
pr_err(smp_twd: clock not found %d\n, (int) PTR_ERR(twd_clk));
+
+ /* If there is no representation of clock tree in DT,
+ provide a fallback option to obtain frequency
+*/
+ if (np !of_property_read_u32(np, clock-frequency, freq))
+ twd_timer_rate = freq;
return;
}
--
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[RFC 2/8] ARM: twd: register clock event for 1 core SMP
Register percpu local timer for scheduler tick in the case of one core SMP configuration. In other cases - secondary cpu's as well as boot cpu's having more than one core, this is being registered as per existing boot flow, with a difference that they happens after delay calibration. Registering the clock for tick in case of one core should be done before Kernel calibrates delay (this is required to boot, unless local timer is the only one registered for tick). Registering twd local timer at init_time (which platforms are doing now) helps achieve that with the proposed change. This helps in an almost booting Kernel (minimal) by only relying on ARM parts for an A9 one core SMP. Signed-off-by: Afzal Mohammed af...@ti.com --- arch/arm/kernel/smp_twd.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c index 616268c..118f4f2 100644 --- a/arch/arm/kernel/smp_twd.c +++ b/arch/arm/kernel/smp_twd.c @@ -335,6 +335,9 @@ static int __init twd_local_timer_common_register(struct device_node *np) twd_get_clock(np); + if (num_possible_cpus() == 1) + twd_timer_setup(evt); + return 0; out_irq: -- 1.7.12 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH, RFC 0/8] ARM: AM43 (OMAP2+) boot support
(Resending, since it seems, LAKML doesn't accept patches with subject prefix only as RFC, but requires PATCH prefix also) Hi, This series adds minimal support to boot Linux on platforms having AM43 based SoC's. This is being sent as an RFC to seek opinion about modification in twd to register percpu local timer clock event for scheduler tick in the case of one core SMP. AM43 SoC's are based on ARM Cortex-A9. It is an ARM Cortex-A9 SMP configuration with one core (not uniprocessor configuration). AM43 is similar to AM335x in it's peripheral capabilities, with many of the peripheral register mapping's similar like that of uart. AM43 is in pre-silicon stage and currently there are no public documents. This series has been tested on a pre-silicon platform that emulates AM43 SoC, changes proposed here are minimal - to get it booting. Kernel was directly run without the help of bootloader - Images were directly loaded onto a pre-initialized RAM and ARM registers updated as required for booting. Changes have been made over linux-next (next-20130213) with three OF related reverts (which otherwise causes problem in other platforms also) and compiled with omap2plus_defconfig. Multiplatform option was enabled, while most of CONFIG options were deselected for a faster boot. Beagle bone boots as earlier with these changes. An interesting observation is that it may be possible to boot this platform to console without any platform specific modification to proper Kernel (by that I mean excluding DT sources) using Arnd's, [PATCH,RFC] default machine descriptor for multiplatform, along with a CLOCKSOURCE_OF_DECLARE for smp twd. But later on to make SoC do any really useful work or to get done things that the SoC is meant to do, platform changes like omap-hwmod, handling power management, clock tree, detecting SoC capabilities etc would have to be made, necessitating DT_MACHINE_START at least in the foreseeable future. Patch - 8 that makes AM43 boot on pre-silicon platform would be replaced later by a one for original board. Last but not least, thanks to Ankur Kishore a-kish...@ti.com (who first made Linux to boot on AM43) for all the help that made Linux bringup easier. Regards Afzal Afzal Mohammed (8): ARM: localtimer: return percpu clkevt on register ARM: twd: register clock event for 1 core SMP ARM: twd: clock rate from DT (if no DT clk tree) ARM: am33xx: ll debug config help ARM: OMAP2+: am43: Kconfig ARM: OMAP2+: am43: basic dt support ARM: dts: am4372: initial support ARM: dts: am43-pre-silicon support Documentation/devicetree/bindings/arm/twd.txt | 7 +++- arch/arm/Kconfig.debug| 3 ++ arch/arm/boot/dts/Makefile| 3 +- arch/arm/boot/dts/am43-pre-silicon.dts| 31 +++ arch/arm/boot/dts/am4372.dtsi | 55 +++ arch/arm/include/asm/localtimer.h | 7 ++-- arch/arm/kernel/smp.c | 8 ++-- arch/arm/kernel/smp_twd.c | 16 +++- arch/arm/mach-omap2/Kconfig | 11 ++ arch/arm/mach-omap2/board-generic.c | 18 + 10 files changed, 148 insertions(+), 11 deletions(-) create mode 100644 arch/arm/boot/dts/am43-pre-silicon.dts create mode 100644 arch/arm/boot/dts/am4372.dtsi -- 1.7.12 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH, RFC 1/8] ARM: localtimer: return percpu clkevt on register
Return percpu clock event on local timer register. It is the boot cpu
that calls this and it can use the returned percpu clock event to
register a clock event in the case of SMP configuration with one core.
This helps to have a booting Kernel even if no other timer is
registered for clock tick.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/include/asm/localtimer.h | 7 ---
arch/arm/kernel/smp.c | 8
arch/arm/kernel/smp_twd.c | 5 +++--
3 files changed, 11 insertions(+), 9 deletions(-)
diff --git a/arch/arm/include/asm/localtimer.h
b/arch/arm/include/asm/localtimer.h
index f77ffc1..c3f89c0 100644
--- a/arch/arm/include/asm/localtimer.h
+++ b/arch/arm/include/asm/localtimer.h
@@ -23,11 +23,12 @@ struct local_timer_ops {
/*
* Register a local timer driver
*/
-int local_timer_register(struct local_timer_ops *);
+struct clock_event_device *local_timer_register(struct local_timer_ops *);
#else
-static inline int local_timer_register(struct local_timer_ops *ops)
+static inline
+struct clock_event_device *local_timer_register(struct local_timer_ops *ops)
{
- return -ENXIO;
+ return ERR_PTR(-ENXIO);
}
#endif
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index 5f73f70..42d95d6 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -491,16 +491,16 @@ static void __cpuinit broadcast_timer_setup(struct
clock_event_device *evt)
static struct local_timer_ops *lt_ops;
#ifdef CONFIG_LOCAL_TIMERS
-int local_timer_register(struct local_timer_ops *ops)
+struct clock_event_device *local_timer_register(struct local_timer_ops *ops)
{
if (!is_smp() || !setup_max_cpus)
- return -ENXIO;
+ return ERR_PTR(-ENXIO);
if (lt_ops)
- return -EBUSY;
+ return ERR_PTR(-EBUSY);
lt_ops = ops;
- return 0;
+ return per_cpu(percpu_clockevent, smp_processor_id());
}
#endif
diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c
index c092115..616268c 100644
--- a/arch/arm/kernel/smp_twd.c
+++ b/arch/arm/kernel/smp_twd.c
@@ -315,6 +315,7 @@ static struct local_timer_ops twd_lt_ops __cpuinitdata = {
static int __init twd_local_timer_common_register(struct device_node *np)
{
int err;
+ struct clock_event_device *evt;
twd_evt = alloc_percpu(struct clock_event_device *);
if (!twd_evt) {
@@ -328,8 +329,8 @@ static int __init twd_local_timer_common_register(struct
device_node *np)
goto out_free;
}
- err = local_timer_register(twd_lt_ops);
- if (err)
+ evt = local_timer_register(twd_lt_ops);
+ if (IS_ERR(evt))
goto out_irq;
twd_get_clock(np);
--
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[PATCH, RFC 2/8] ARM: twd: register clock event for 1 core SMP
Register percpu local timer for scheduler tick in the case of one core SMP configuration. In other cases - secondary cpu's as well as boot cpu's having more than one core, this is being registered as per existing boot flow, with a difference that they happens after delay calibration. Registering the clock for tick in case of one core should be done before Kernel calibrates delay (this is required to boot, unless local timer is the only one registered for tick). Registering twd local timer at init_time (which platforms are doing now) helps achieve that with the proposed change. This helps in an almost booting Kernel (minimal) by only relying on ARM parts for an A9 one core SMP. Signed-off-by: Afzal Mohammed af...@ti.com --- arch/arm/kernel/smp_twd.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c index 616268c..118f4f2 100644 --- a/arch/arm/kernel/smp_twd.c +++ b/arch/arm/kernel/smp_twd.c @@ -335,6 +335,9 @@ static int __init twd_local_timer_common_register(struct device_node *np) twd_get_clock(np); + if (num_possible_cpus() == 1) + twd_timer_setup(evt); + return 0; out_irq: -- 1.7.12 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH, RFC 4/8] ARM: am33xx: ll debug config help
Selecting DEBUG_AM33XXUART1 routes low level debug messages to first UART instance of AM335x based SoC's. This selection is valid for upcoming AM43 based SoC's too. Make this information available upon configuring. Signed-off-by: Afzal Mohammed af...@ti.com --- arch/arm/Kconfig.debug | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index aca..b717b78 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -542,6 +542,9 @@ choice config DEBUG_AM33XXUART1 bool AM33XX UART1 + help + Route low level debug messages to first uart instance + for boards based on am335 and am43 family of SoC's config DEBUG_ZOOM_UART bool Zoom2/3 UART -- 1.7.12 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH, RFC 6/8] ARM: OMAP2+: am43: basic dt support
Describe minimal DT boot machine details for AM43 based SoC's. AM43
family of SoC's are ARM Cortex-A9 based with one core in SMP
configuration. Low level debug could be achieved by selecting
DEBUG_AM33XXUART1. To boot AM43 SoC, this change is sufficient w.r.t
Kernel (considering the fact that strictly speaking DT sources does
not classify as a part of Kernel). Here private timer of the one and
only core is being used as clock event (as well as, as time source).
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/board-generic.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/arch/arm/mach-omap2/board-generic.c
b/arch/arm/mach-omap2/board-generic.c
index 0274ff7..e083f08 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -15,7 +15,10 @@
#include linux/of_irq.h
#include linux/of_platform.h
#include linux/irqdomain.h
+#include linux/irqchip.h
+#include asm/mach/map.h
+#include asm/smp_twd.h
#include asm/mach/arch.h
#include common.h
@@ -182,3 +185,18 @@ DT_MACHINE_START(OMAP5_DT, Generic OMAP5 (Flattened
Device Tree))
.restart= omap44xx_restart,
MACHINE_END
#endif
+
+#ifdef CONFIG_SOC_AM43
+static const char *am43_boards_compat[] __initdata = {
+ ti,am43,
+ NULL,
+};
+
+DT_MACHINE_START(AM43_DT, Generic AM43 (Flattened Device Tree))
+ .map_io = debug_ll_io_init,
+ .init_irq = irqchip_init,
+ .init_machine = omap_generic_init,
+ .init_time = twd_local_timer_of_register,
+ .dt_compat = am43_boards_compat,
+MACHINE_END
+#endif
--
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[PATCH, RFC 5/8] ARM: OMAP2+: am43: Kconfig
Add Kconfig option for AM43 family of SoC's, these are ARM Cortex A9 based (SMP configuration with 1 core). Signed-off-by: Afzal Mohammed af...@ti.com --- arch/arm/mach-omap2/Kconfig | 11 +++ 1 file changed, 11 insertions(+) diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 49ac3df..683fbaa 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -141,6 +141,17 @@ config SOC_AM33XX select MULTI_IRQ_HANDLER select COMMON_CLK +config SOC_AM43 + bool TI AM43 + depends on ARCH_OMAP2PLUS + default y + select CPU_V7 + select HAVE_SMP + select LOCAL_TIMERS if SMP + select MULTI_IRQ_HANDLER + select ARM_GIC + select COMMON_CLK + config OMAP_PACKAGE_ZAF bool -- 1.7.12 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH, RFC 7/8] ARM: dts: am4372: initial support
DT source (minimal) for AM4372 SoC. Those represented here are the
minimal DT nodes necessary to get kernel booting.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/boot/dts/am4372.dtsi | 55 +++
1 file changed, 55 insertions(+)
create mode 100644 arch/arm/boot/dts/am4372.dtsi
diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
new file mode 100644
index 000..178c41f
--- /dev/null
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -0,0 +1,55 @@
+/*
+ * Device Tree Source for AM4372 SoC
+ *
+ * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed as is without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/include/ skeleton.dtsi
+
+/ {
+ compatible = ti,am4372, ti,am43;
+ interrupt-parent = gic;
+
+
+ aliases {
+ serial0 = uart1;
+ };
+
+ cpus {
+ cpu@0 {
+ compatible = arm,cortex-a9;
+ };
+ };
+
+ gic: interrupt-controller@48241000 {
+ compatible = arm,cortex-a9-gic;
+ interrupt-controller;
+ #interrupt-cells = 3;
+ reg = 0x48241000 0x1000,
+ 0x48240100 0x0100;
+ };
+
+ twd1: local-timer@0x48240600 {
+ compatible = arm,cortex-a9-twd-timer;
+ reg = 0x48240600 0x20;
+ interrupts = 1 13 0x304;
+ };
+
+ ocp {
+ compatible = simple-bus;
+ #address-cells = 1;
+ #size-cells = 1;
+ ranges;
+
+ uart1: serial@44e09000 {
+ compatible = ti,am4372-uart,ti,omap2-uart;
+ clock-frequency = 4800;
+ reg = 0x44e09000 0x2000;
+ interrupts = 0 72 0x4;
+ };
+ };
+};
--
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[PATCH, RFC 8/8] ARM: dts: am43-pre-silicon support
AM43 SoC is in pre-silicon stage, meanwhile it has been modelled in
a pre-silicon platform. To validate and boot Linux in pre-silicon
platform that emulates an AM43 SoC, add DT build support.
As bootloader is not used, bootargs is passed through DT.
Note: This would be replaced by an original board support.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/boot/dts/Makefile | 3 ++-
arch/arm/boot/dts/am43-pre-silicon.dts | 31 +++
2 files changed, 33 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/boot/dts/am43-pre-silicon.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 94d88b9..b434344 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -124,7 +124,8 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
omap5-evm.dtb \
am335x-evm.dtb \
am335x-evmsk.dtb \
- am335x-bone.dtb
+ am335x-bone.dtb \
+ am43-pre-silicon.dtb
dtb-$(CONFIG_ARCH_ORION5X) += orion5x-lacie-ethernet-disk-mini-v2.dtb
dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb
dtb-$(CONFIG_ARCH_U8500) += snowball.dtb \
diff --git a/arch/arm/boot/dts/am43-pre-silicon.dts
b/arch/arm/boot/dts/am43-pre-silicon.dts
new file mode 100644
index 000..b9c6297
--- /dev/null
+++ b/arch/arm/boot/dts/am43-pre-silicon.dts
@@ -0,0 +1,31 @@
+/*
+ * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/* AM43 Pre Silicon */
+
+/dts-v1/;
+
+/include/ am4372.dtsi
+
+/ {
+ model = TI AM43 Pre Silicon;
+ compatible = ti,am43-pre-silicon,ti,am4372,ti,am43;
+
+ memory {
+ device_type = memory;
+ reg = 0x8000 0x1000; /* 256 MB */
+ };
+
+ chosen {
+ bootargs = console=ttyO0,115200n8 root=/dev/ram rw
initrd=0x8200,32MB earlyprintk;
+ };
+};
+
+twd1 {
+ clock-frequency = 3;
+};
--
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[PATCH, RFC 3/8] ARM: twd: clock rate from DT (if no DT clk tree)
Add an optional property to find clock-frequency from DT. This helps
as a fallback mechanism in case there is no representation of clock
tree in DT.
Signed-off-by: Afzal Mohammed af...@ti.com
---
Documentation/devicetree/bindings/arm/twd.txt | 7 ++-
arch/arm/kernel/smp_twd.c | 8
2 files changed, 14 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/arm/twd.txt
b/Documentation/devicetree/bindings/arm/twd.txt
index 75b8610..fdafa4f 100644
--- a/Documentation/devicetree/bindings/arm/twd.txt
+++ b/Documentation/devicetree/bindings/arm/twd.txt
@@ -7,8 +7,9 @@ and watchdog.
The TWD is usually attached to a GIC to deliver its two per-processor
interrupts.
-** Timer node required properties:
+** Timer node properties:
+Required properties:
- compatible : Should be one of:
arm,cortex-a9-twd-timer
arm,cortex-a5-twd-timer
@@ -19,12 +20,16 @@ interrupts.
- reg : Specify the base address and the size of the TWD timer
register window.
+Optional property:
+- clock-frequency : frequency(Hz) of peripheral clock fed to timer
+
Example:
twd-timer@2c000600 {
compatible = arm,arm11mp-twd-timer;
reg = 0x2c000600 0x20;
interrupts = 1 13 0xf01;
+ clock-frequency = 3;
};
** Watchdog node properties:
diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c
index 118f4f2..aac0f9f 100644
--- a/arch/arm/kernel/smp_twd.c
+++ b/arch/arm/kernel/smp_twd.c
@@ -247,7 +247,15 @@ static void twd_get_clock(struct device_node *np)
twd_clk = clk_get_sys(smp_twd, NULL);
if (IS_ERR(twd_clk)) {
+ u32 freq;
+
pr_err(smp_twd: clock not found %d\n, (int) PTR_ERR(twd_clk));
+
+ /* If there is no representation of clock tree in DT,
+ provide a fallback option to obtain frequency
+*/
+ if (np !of_property_read_u32(np, clock-frequency, freq))
+ twd_timer_rate = freq;
return;
}
--
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[PATCH v2 00/14] ARM: OMAP2+: AM43x initial support
Hi, This series adds initial support for AM43x based SoC's. To boot AM43x, in addition to these patches, PRCM support is also needed, which would be posted later as a separate series. DT sources doesn't have ti,hwmod entry - this would be added along with PRCM support. AM43x SoC's are based on ARM Cortex-A9 with one core. AM43x is similar to AM335x in it's peripheral capabilities, except a few additional ones, with many of the peripheral register mapping's similar. AM43x has a sync timer, which is being used as clocksource. Clockevent used is 1ms dmtimer. SoC has PL310 L2 cache, support for it would be added later. soc_is_am43xx() is introduced to handle AM43x specific details and soc_is_am437x() is a subclass of it - first member of the class. AM43x is currently in pre-silicon stage and currently there are no public documents. This has been tested on a pre-silicon platform that emulates AM43x SoC with additional changes on top of this. AM335x based board (AM335x EVM) has been verfied to boot as earlier with this series. Baseline: v3.10-rc3 Dependency: ARM: OMAP3+: am33xx id: Add new am33xx specific function to check dev_feature by Vaibhav Hiremath hvaib...@ti.com Regards Afzal v2: Major change - use SoC timer's outside of ARM instead of depending on ARM SMP local timer for clockevent/source. Afzal Mohammed (13): ARM: OMAP2+: separate out OMAP4 restart ARM: OMAP2+: AM43x: Kconfig ARM: OMAP2+: AM43x: kbuild ARM: OMAP2+: AM43x: soc_is support ARM: OMAP2+: AM437x: SoC revision detection ARM: OMAP2+: AM43x: static mapping ARM: OMAP2+: AM43x: early init ARM: OMAP2+: AM43x: GP or HS ? ARM: OMAP2+: AM43x: basic dt support Documentation: dt: binding: omap: am43x timer Documentation: dt: binding: omap: am43x counter Documentation: dt: binding: serial: omap: am43x ARM: dts: AM43x: initial support Sanjeev Premi (1): ARM: OMAP2+: AM43x: SRAM base and size .../devicetree/bindings/arm/omap/counter.txt | 1 + .../devicetree/bindings/arm/omap/timer.txt | 2 + .../devicetree/bindings/serial/omap_serial.txt | 1 + arch/arm/boot/dts/am4372.dtsi | 66 ++ arch/arm/mach-omap2/Kconfig| 10 arch/arm/mach-omap2/Makefile | 8 +++ arch/arm/mach-omap2/am33xx.h | 1 + arch/arm/mach-omap2/board-generic.c| 16 ++ arch/arm/mach-omap2/cm33xx.h | 2 +- arch/arm/mach-omap2/common.h | 1 + arch/arm/mach-omap2/id.c | 8 ++- arch/arm/mach-omap2/io.c | 18 +- arch/arm/mach-omap2/omap4-common.c | 16 -- arch/arm/mach-omap2/omap4-restart.c| 27 + arch/arm/mach-omap2/soc.h | 23 arch/arm/mach-omap2/sram.c | 3 + arch/arm/mach-omap2/timer.c| 2 +- 17 files changed, 184 insertions(+), 21 deletions(-) create mode 100644 arch/arm/boot/dts/am4372.dtsi create mode 100644 arch/arm/mach-omap2/omap4-restart.c -- 1.7.12 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 01/14] ARM: OMAP2+: separate out OMAP4 restart
Separate out OMAP4 restart and have it similar to other platforms, in
a different file. Main motive is to reuse omap4-common on platforms
other than OMAP4, like AM43x, even if OMAP4 is deselected (otherwise
would have caused build breakage).
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/Makefile| 2 ++
arch/arm/mach-omap2/omap4-common.c | 16
arch/arm/mach-omap2/omap4-restart.c | 27 +++
3 files changed, 29 insertions(+), 16 deletions(-)
create mode 100644 arch/arm/mach-omap2/omap4-restart.c
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 55a9d67..0fac8f4 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -58,6 +58,8 @@ obj-$(CONFIG_SOC_OMAP2420)+= omap2-restart.o
obj-$(CONFIG_SOC_OMAP2430) += omap2-restart.o
obj-$(CONFIG_SOC_AM33XX) += am33xx-restart.o
obj-$(CONFIG_ARCH_OMAP3) += omap3-restart.o
+obj-$(CONFIG_ARCH_OMAP4) += omap4-restart.o
+obj-$(CONFIG_SOC_OMAP5)+= omap4-restart.o
# Pin multiplexing
obj-$(CONFIG_SOC_OMAP2420) += mux2420.o
diff --git a/arch/arm/mach-omap2/omap4-common.c
b/arch/arm/mach-omap2/omap4-common.c
index 13b27ff..38cd3a6 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -339,19 +339,3 @@ int __init omap4_twl6030_hsmmc_init(struct
omap2_hsmmc_info *controllers)
return 0;
}
#endif
-
-/**
- * omap44xx_restart - trigger a software restart of the SoC
- * @mode: the reboot mode, see arch/arm/kernel/{setup,process}.c
- * @cmd: passed from the userspace program rebooting the system (if provided)
- *
- * Resets the SoC. For @cmd, see the 'reboot' syscall in
- * kernel/sys.c. No return value.
- */
-void omap44xx_restart(char mode, const char *cmd)
-{
- /* XXX Should save 'cmd' into scratchpad for use after reboot */
- omap4_prminst_global_warm_sw_reset(); /* never returns */
- while (1);
-}
-
diff --git a/arch/arm/mach-omap2/omap4-restart.c
b/arch/arm/mach-omap2/omap4-restart.c
new file mode 100644
index 000..f90e02e
--- /dev/null
+++ b/arch/arm/mach-omap2/omap4-restart.c
@@ -0,0 +1,27 @@
+/*
+ * omap4-restart.c - Common to OMAP4 and OMAP5
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include linux/types.h
+#include prminst44xx.h
+
+/**
+ * omap44xx_restart - trigger a software restart of the SoC
+ * @mode: the reboot mode, see arch/arm/kernel/{setup,process}.c
+ * @cmd: passed from the userspace program rebooting the system (if provided)
+ *
+ * Resets the SoC. For @cmd, see the 'reboot' syscall in
+ * kernel/sys.c. No return value.
+ */
+void omap44xx_restart(char mode, const char *cmd)
+{
+ /* XXX Should save 'cmd' into scratchpad for use after reboot */
+ omap4_prminst_global_warm_sw_reset(); /* never returns */
+ while (1)
+ ;
+}
--
1.7.12
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[PATCH v2 09/14] ARM: OMAP2+: AM43x: SRAM base and size
From: Sanjeev Premi pr...@ti.com
This definition corresponds to the L3_OCMC0,
as in case of AM33XX.
Signed-off-by: Sanjeev Premi pr...@ti.com
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/sram.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/mach-omap2/sram.c b/arch/arm/mach-omap2/sram.c
index 0ff0f06..4bd0968 100644
--- a/arch/arm/mach-omap2/sram.c
+++ b/arch/arm/mach-omap2/sram.c
@@ -119,6 +119,9 @@ static void __init omap_detect_sram(void)
if (soc_is_am33xx()) {
omap_sram_start = AM33XX_SRAM_PA;
omap_sram_size = 0x1; /* 64K */
+ } else if (soc_is_am43xx()) {
+ omap_sram_start = AM33XX_SRAM_PA;
+ omap_sram_size = SZ_256K;
} else if (cpu_is_omap34xx()) {
omap_sram_start = OMAP3_SRAM_PA;
omap_sram_size = 0x1; /* 64K */
--
1.7.12
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[PATCH v2 10/14] ARM: OMAP2+: AM43x: basic dt support
Describe minimal DT boot machine details for AM43x based SoC's. AM43x
SoC's are ARM Cortex-A9 based with one core. AM43x is similar to
AM335x w.r.t L4 PER/WKUP memory map. AM43x has a sync timer, here that
is being used as clocksource, while 1ms dmtimer as clockevent.
Signed-off-by: Ankur Kishore a-kish...@ti.com
Signed-off-by: Afzal Mohammed af...@ti.com
---
v2: Rely on dmtimer synctimer for clockevent/source, map peripheral
memory as in AM335x
arch/arm/mach-omap2/board-generic.c | 16
arch/arm/mach-omap2/timer.c | 2 +-
2 files changed, 17 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-omap2/board-generic.c
b/arch/arm/mach-omap2/board-generic.c
index 88aa6b1..e5fbfed 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -185,3 +185,19 @@ DT_MACHINE_START(OMAP5_DT, Generic OMAP5 (Flattened
Device Tree))
.restart= omap44xx_restart,
MACHINE_END
#endif
+
+#ifdef CONFIG_SOC_AM43XX
+static const char *am43_boards_compat[] __initdata = {
+ ti,am43,
+ NULL,
+};
+
+DT_MACHINE_START(AM43_DT, Generic AM43 (Flattened Device Tree))
+ .map_io = am33xx_map_io,
+ .init_early = am43xx_init_early,
+ .init_irq = omap_gic_of_init,
+ .init_machine = omap_generic_init,
+ .init_time = omap3_sync32k_timer_init,
+ .dt_compat = am43_boards_compat,
+MACHINE_END
+#endif
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 8e0c390..5f148e7 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -582,7 +582,7 @@ OMAP_SYS_32K_TIMER_INIT(2, 1, timer_32k_ck,
ti,timer-alwon,
2, timer_sys_ck, NULL);
#endif /* CONFIG_ARCH_OMAP2 */
-#ifdef CONFIG_ARCH_OMAP3
+#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_SOC_AM43XX)
OMAP_SYS_32K_TIMER_INIT(3, 1, timer_32k_ck, ti,timer-alwon,
2, timer_sys_ck, NULL);
OMAP_SYS_32K_TIMER_INIT(3_secure, 12, secure_32k_fck, ti,timer-secure,
--
1.7.12
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[PATCH v2 14/14] ARM: dts: AM43x: initial support
DT source (minimal) for AM4372 SoC to represent AM43x SoC's. Those
represented here are the minimal DT nodes necessary to get kernel
booting.
In DT nodes, ti,hwmod property has not been added, this would be
added along with PRCM support for AM43x.
Signed-off-by: Ankur Kishore a-kish...@ti.com
Signed-off-by: Afzal Mohammed af...@ti.com
---
v2: Add gptimer 1ms, timer2, synctimer and remove twd local timer
arch/arm/boot/dts/am4372.dtsi | 66 +++
1 file changed, 66 insertions(+)
create mode 100644 arch/arm/boot/dts/am4372.dtsi
diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
new file mode 100644
index 000..1d58298
--- /dev/null
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -0,0 +1,66 @@
+/*
+ * Device Tree Source for AM4372 SoC
+ *
+ * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed as is without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/include/ skeleton.dtsi
+
+/ {
+ compatible = ti,am4372, ti,am43;
+ interrupt-parent = gic;
+
+
+ aliases {
+ serial0 = uart1;
+ };
+
+ cpus {
+ cpu@0 {
+ compatible = arm,cortex-a9;
+ };
+ };
+
+ gic: interrupt-controller@48241000 {
+ compatible = arm,cortex-a9-gic;
+ interrupt-controller;
+ #interrupt-cells = 3;
+ reg = 0x48241000 0x1000,
+ 0x48240100 0x0100;
+ };
+
+ ocp {
+ compatible = simple-bus;
+ #address-cells = 1;
+ #size-cells = 1;
+ ranges;
+
+ uart1: serial@44e09000 {
+ compatible = ti,am4372-uart,ti,omap2-uart;
+ reg = 0x44e09000 0x2000;
+ interrupts = 0 72 0x4;
+ };
+
+ timer1: timer@44e31000 {
+ compatible =
ti,am4372-timer-1ms,ti,am335x-timer-1ms;
+ reg = 0x44e31000 0x400;
+ interrupts = 0 67 0x4;
+ ti,timer-alwon;
+ };
+
+ timer2: timer@4804 {
+ compatible = ti,am4372-timer,ti,am335x-timer;
+ reg = 0x4804 0x400;
+ interrupts = 0 68 0x4;
+ };
+
+ counter32k: counter@44e86000 {
+ compatible =
ti,am4372-counter32k,ti,omap-counter32k;
+ reg = 0x44e86000 0x40;
+ };
+ };
+};
--
1.7.12
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[PATCH v2 13/14] Documentation: dt: binding: serial: omap: am43x
AM43x uart binding. Signed-off-by: Afzal Mohammed af...@ti.com --- Documentation/devicetree/bindings/serial/omap_serial.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/serial/omap_serial.txt b/Documentation/devicetree/bindings/serial/omap_serial.txt index 342eedd..f37fdda 100644 --- a/Documentation/devicetree/bindings/serial/omap_serial.txt +++ b/Documentation/devicetree/bindings/serial/omap_serial.txt @@ -4,6 +4,7 @@ Required properties: - compatible : should be ti,omap2-uart for OMAP2 controllers - compatible : should be ti,omap3-uart for OMAP3 controllers - compatible : should be ti,omap4-uart for OMAP4 controllers +- compatible : ti,am4372-uart,ti,omap2-uart for AM43x controller - ti,hwmods : Must be uartn, n being the instance number (1-based) Optional properties: -- 1.7.12 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 02/14] ARM: OMAP2+: AM43x: Kconfig
Kconfig for AM43x (Cortex A9) family of SoC's. Signed-off-by: Afzal Mohammed af...@ti.com --- v2: Remove reliance on SMP, TWD, select MACH_OMAP_GENERIC arch/arm/mach-omap2/Kconfig | 10 ++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index f49cd51..8f555f8 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -149,6 +149,16 @@ config SOC_AM33XX select MULTI_IRQ_HANDLER select COMMON_CLK +config SOC_AM43XX + bool TI AM43x + depends on ARCH_OMAP2PLUS + default y + select CPU_V7 + select MULTI_IRQ_HANDLER + select ARM_GIC + select COMMON_CLK + select MACH_OMAP_GENERIC + config OMAP_PACKAGE_ZAF bool -- 1.7.12 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 03/14] ARM: OMAP2+: AM43x: kbuild
Build pieces that could be reused for AM43x - GIC related, secure related and common PRCM. Signed-off-by: Afzal Mohammed af...@ti.com --- arch/arm/mach-omap2/Makefile | 6 ++ arch/arm/mach-omap2/cm33xx.h | 2 +- 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index 0fac8f4..955b643 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -22,6 +22,7 @@ obj-$(CONFIG_ARCH_OMAP3) += $(omap-2-3-common) $(hwmod-common) $(secure-common) obj-$(CONFIG_ARCH_OMAP4) += prm44xx.o $(hwmod-common) $(secure-common) obj-$(CONFIG_SOC_AM33XX) += irq.o $(hwmod-common) obj-$(CONFIG_SOC_OMAP5) += prm44xx.o $(hwmod-common) $(secure-common) +obj-$(CONFIG_SOC_AM43XX) += $(hwmod-common) $(secure-common) ifneq ($(CONFIG_SND_OMAP_SOC_MCBSP),) obj-y += mcbsp.o @@ -38,6 +39,7 @@ omap-4-5-common = omap4-common.o omap-wakeupgen.o \ sleep44xx.o obj-$(CONFIG_ARCH_OMAP4) += $(omap-4-5-common) $(smp-y) obj-$(CONFIG_SOC_OMAP5)+= $(omap-4-5-common) $(smp-y) +obj-$(CONFIG_SOC_AM43XX) += $(omap-4-5-common) plus_sec := $(call as-instr,.arch_extension sec,+sec) AFLAGS_omap-headsmp.o :=-Wa,-march=armv7-a$(plus_sec) @@ -112,6 +114,7 @@ obj-$(CONFIG_ARCH_OMAP2)+= prm2xxx_3xxx.o prm2xxx.o cm2xxx.o obj-$(CONFIG_ARCH_OMAP3) += prm2xxx_3xxx.o prm3xxx.o cm3xxx.o obj-$(CONFIG_ARCH_OMAP3) += vc3xxx_data.o vp3xxx_data.o obj-$(CONFIG_SOC_AM33XX) += prm33xx.o cm33xx.o +obj-$(CONFIG_SOC_AM43XX) += prm33xx.o cm33xx.o omap-prcm-4-5-common = cminst44xx.o cm44xx.o prm44xx.o \ prcm_mpu44xx.o prminst44xx.o \ vc44xx_data.o vp44xx_data.o @@ -128,6 +131,7 @@ obj-$(CONFIG_ARCH_OMAP4)+= $(voltagedomain-common) obj-$(CONFIG_ARCH_OMAP4) += voltagedomains44xx_data.o obj-$(CONFIG_SOC_AM33XX) += $(voltagedomain-common) obj-$(CONFIG_SOC_AM33XX)+= voltagedomains33xx_data.o +obj-$(CONFIG_SOC_AM43XX) += $(voltagedomain-common) obj-$(CONFIG_SOC_OMAP5)+= $(voltagedomain-common) # OMAP powerdomain framework @@ -142,6 +146,7 @@ obj-$(CONFIG_ARCH_OMAP4)+= $(powerdomain-common) obj-$(CONFIG_ARCH_OMAP4) += powerdomains44xx_data.o obj-$(CONFIG_SOC_AM33XX) += $(powerdomain-common) obj-$(CONFIG_SOC_AM33XX) += powerdomains33xx_data.o +obj-$(CONFIG_SOC_AM43XX) += $(powerdomain-common) obj-$(CONFIG_SOC_OMAP5)+= $(powerdomain-common) # PRCM clockdomain control @@ -157,6 +162,7 @@ obj-$(CONFIG_ARCH_OMAP4)+= $(clockdomain-common) obj-$(CONFIG_ARCH_OMAP4) += clockdomains44xx_data.o obj-$(CONFIG_SOC_AM33XX) += $(clockdomain-common) obj-$(CONFIG_SOC_AM33XX) += clockdomains33xx_data.o +obj-$(CONFIG_SOC_AM43XX) += $(clockdomain-common) obj-$(CONFIG_SOC_OMAP5)+= $(clockdomain-common) # Clock framework diff --git a/arch/arm/mach-omap2/cm33xx.h b/arch/arm/mach-omap2/cm33xx.h index 64f4baf..9d1f4fc 100644 --- a/arch/arm/mach-omap2/cm33xx.h +++ b/arch/arm/mach-omap2/cm33xx.h @@ -383,7 +383,7 @@ extern void am33xx_cm_clkdm_disable_hwsup(s16 inst, u16 cdoffs); extern void am33xx_cm_clkdm_force_sleep(s16 inst, u16 cdoffs); extern void am33xx_cm_clkdm_force_wakeup(s16 inst, u16 cdoffs); -#ifdef CONFIG_SOC_AM33XX +#if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_AM43XX) extern int am33xx_cm_wait_module_idle(u16 inst, s16 cdoffs, u16 clkctrl_offs); extern void am33xx_cm_module_enable(u8 mode, u16 inst, s16 cdoffs, -- 1.7.12 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 05/14] ARM: OMAP2+: AM437x: SoC revision detection
Detect 437x SoC revision.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/id.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 44be835..c9c3f7d 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -209,6 +209,8 @@ static void __init omap3_cpuinfo(void)
cpu_name = TI816X;
} else if (soc_is_am335x()) {
cpu_name = AM335X;
+ } else if (soc_is_am437x()) {
+ cpu_name = AM437x;
} else if (cpu_is_ti814x()) {
cpu_name = TI814X;
} else if (omap3_has_iva() omap3_has_sgx()) {
@@ -443,6 +445,10 @@ void __init omap3xxx_check_revision(void)
break;
}
break;
+ case 0xb98c:
+ omap_revision = AM437X_REV_ES1_0;
+ cpu_rev = 1.0;
+ break;
case 0xb8f2:
switch (rev) {
case 0:
--
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[PATCH v2 06/14] ARM: OMAP2+: AM43x: static mapping
AM43x L4 WKUP/PER mappings are similar to AM335x, reuse.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/io.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 06a8946..3a81221 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -202,7 +202,7 @@ static struct map_desc omapti81xx_io_desc[] __initdata = {
};
#endif
-#ifdef CONFIG_SOC_AM33XX
+#if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_AM43XX)
static struct map_desc omapam33xx_io_desc[] __initdata = {
{
.virtual= L4_34XX_VIRT,
@@ -318,7 +318,7 @@ void __init ti81xx_map_io(void)
}
#endif
-#ifdef CONFIG_SOC_AM33XX
+#if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_AM43XX)
void __init am33xx_map_io(void)
{
iotable_init(omapam33xx_io_desc, ARRAY_SIZE(omapam33xx_io_desc));
--
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[PATCH v2 07/14] ARM: OMAP2+: AM43x: early init
Minimal early init - PRCM initialization not yet taken care.
Control module is similar (base address, feature register etc.) as
that of AM335x, while PRCM base address is different. Instead of
adding a new header file for AM43x, PRCM base address is added in
AM335x header file as it is similar to it to a large extent.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/am33xx.h | 1 +
arch/arm/mach-omap2/common.h | 1 +
arch/arm/mach-omap2/io.c | 14 ++
3 files changed, 16 insertions(+)
diff --git a/arch/arm/mach-omap2/am33xx.h b/arch/arm/mach-omap2/am33xx.h
index 43296c1..5eef093 100644
--- a/arch/arm/mach-omap2/am33xx.h
+++ b/arch/arm/mach-omap2/am33xx.h
@@ -21,6 +21,7 @@
#define AM33XX_SCM_BASE0x44E1
#define AM33XX_CTRL_BASE AM33XX_SCM_BASE
#define AM33XX_PRCM_BASE 0x44E0
+#define AM43XX_PRCM_BASE 0x44DF
#define AM33XX_TAP_BASE(AM33XX_CTRL_BASE + 0x3FC)
#endif /* __ASM_ARCH_AM33XX_H */
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index d555cf2..00f890e 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -96,6 +96,7 @@ void am33xx_init_early(void);
void am35xx_init_early(void);
void ti81xx_init_early(void);
void am33xx_init_early(void);
+void am43xx_init_early(void);
void omap4430_init_early(void);
void omap5_init_early(void);
void omap3_init_late(void);/* Do not use this one */
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 3a81221..f933f7f 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -586,6 +586,20 @@ void __init am33xx_init_early(void)
}
#endif
+#ifdef CONFIG_SOC_AM43XX
+void __init am43xx_init_early(void)
+{
+ omap2_set_globals_tap(AM335X_CLASS,
+ AM33XX_L4_WK_IO_ADDRESS(AM33XX_TAP_BASE));
+ omap2_set_globals_control(AM33XX_L4_WK_IO_ADDRESS(AM33XX_CTRL_BASE),
+ NULL);
+ omap2_set_globals_prm(AM33XX_L4_WK_IO_ADDRESS(AM43XX_PRCM_BASE));
+ omap2_set_globals_cm(AM33XX_L4_WK_IO_ADDRESS(AM43XX_PRCM_BASE), NULL);
+ omap3xxx_check_revision();
+ am33xx_check_features();
+}
+#endif
+
#ifdef CONFIG_ARCH_OMAP4
void __init omap4430_init_early(void)
{
--
1.7.12
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[PATCH v2 11/14] Documentation: dt: binding: omap: am43x timer
AM43x timer bindings. Signed-off-by: Afzal Mohammed af...@ti.com --- Documentation/devicetree/bindings/arm/omap/timer.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/omap/timer.txt b/Documentation/devicetree/bindings/arm/omap/timer.txt index d02e27c..70cb398 100644 --- a/Documentation/devicetree/bindings/arm/omap/timer.txt +++ b/Documentation/devicetree/bindings/arm/omap/timer.txt @@ -14,6 +14,8 @@ Required properties: ti,omap5430-timer (applicable to OMAP543x devices) ti,am335x-timer (applicable to AM335x devices) ti,am335x-timer-1ms (applicable to AM335x devices) + ti,am4372-timer-1ms, ti,am335x-timer-1ms for AM43x 1ms timer + ti,am4372-timer, ti,am335x-timer for AM43x timers other than 1ms one - reg: Contains timer register address range (base address and length). -- 1.7.12 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 12/14] Documentation: dt: binding: omap: am43x counter
AM43x 32K counter binding. Signed-off-by: Afzal Mohammed af...@ti.com --- Documentation/devicetree/bindings/arm/omap/counter.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/omap/counter.txt b/Documentation/devicetree/bindings/arm/omap/counter.txt index 5bd8aa0..9c48dca 100644 --- a/Documentation/devicetree/bindings/arm/omap/counter.txt +++ b/Documentation/devicetree/bindings/arm/omap/counter.txt @@ -2,6 +2,7 @@ OMAP Counter-32K bindings Required properties: - compatible: Must be ti,omap-counter32k for OMAP controllers + ti,am4372-counter32k,ti,omap-counter32k for AM43x counter - reg: Contains timer register address range (base address and length) - ti,hwmods: Name of the hwmod associated to the counter, which is typically counter_32k -- 1.7.12 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 08/14] ARM: OMAP2+: AM43x: GP or HS ?
Detect whether GP or HS, similar to the AM335x way.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/id.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index c9c3f7d..0c28ef6 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -55,7 +55,7 @@ int omap_type(void)
if (cpu_is_omap24xx()) {
val = omap_ctrl_readl(OMAP24XX_CONTROL_STATUS);
- } else if (soc_is_am33xx()) {
+ } else if (soc_is_am33xx() || soc_is_am43xx()) {
val = omap_ctrl_readl(AM33XX_CONTROL_STATUS);
} else if (cpu_is_omap34xx()) {
val = omap_ctrl_readl(OMAP343X_CONTROL_STATUS);
--
1.7.12
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[PATCH v2 04/14] ARM: OMAP2+: AM43x: soc_is support
soc_is support for AM43x family of SoC's. Only variant now is AM437x, it is made as a subclass of AM43x. Signed-off-by: Afzal Mohammed af...@ti.com --- arch/arm/mach-omap2/soc.h | 23 +++ 1 file changed, 23 insertions(+) diff --git a/arch/arm/mach-omap2/soc.h b/arch/arm/mach-omap2/soc.h index fd4507b..f59fdcd 100644 --- a/arch/arm/mach-omap2/soc.h +++ b/arch/arm/mach-omap2/soc.h @@ -96,6 +96,15 @@ # endif #endif +#ifdef CONFIG_SOC_AM43XX +# ifdef OMAP_NAME +# undef MULTI_OMAP2 +# define MULTI_OMAP2 +# else +# define OMAP_NAME am43xx +# endif +#endif + /* * Omap device type i.e. EMU/HS/TST/GP/BAD */ @@ -187,6 +196,7 @@ IS_OMAP_CLASS(44xx, 0x44) IS_AM_CLASS(35xx, 0x35) IS_OMAP_CLASS(54xx, 0x54) IS_AM_CLASS(33xx, 0x33) +IS_AM_CLASS(43xx, 0x43) IS_TI_CLASS(81xx, 0x81) @@ -202,6 +212,7 @@ IS_OMAP_SUBCLASS(543x, 0x543) IS_TI_SUBCLASS(816x, 0x816) IS_TI_SUBCLASS(814x, 0x814) IS_AM_SUBCLASS(335x, 0x335) +IS_AM_SUBCLASS(437x, 0x437) #define cpu_is_omap24xx() 0 #define cpu_is_omap242x() 0 @@ -214,6 +225,8 @@ IS_AM_SUBCLASS(335x, 0x335) #define soc_is_am35xx()0 #define soc_is_am33xx()0 #define soc_is_am335x()0 +#define soc_is_am43xx()0 +#define soc_is_am437x()0 #define cpu_is_omap44xx() 0 #define cpu_is_omap443x() 0 #define cpu_is_omap446x() 0 @@ -341,6 +354,13 @@ IS_OMAP_TYPE(3430, 0x3430) # define soc_is_am335x() is_am335x() #endif +#ifdef CONFIG_SOC_AM43XX +# undef soc_is_am43xx +# undef soc_is_am437x +# define soc_is_am43xx() is_am43xx() +# define soc_is_am437x() is_am437x() +#endif + # if defined(CONFIG_ARCH_OMAP4) # undef cpu_is_omap44xx # undef cpu_is_omap443x @@ -398,6 +418,9 @@ IS_OMAP_TYPE(3430, 0x3430) #define AM335X_REV_ES2_0 (AM335X_CLASS | (0x1 8)) #define AM335X_REV_ES2_1 (AM335X_CLASS | (0x2 8)) +#define AM437X_CLASS 0x4370 +#define AM437X_REV_ES1_0 AM437X_CLASS + #define OMAP443X_CLASS 0x44300044 #define OMAP4430_REV_ES1_0 (OMAP443X_CLASS | (0x10 8)) #define OMAP4430_REV_ES2_0 (OMAP443X_CLASS | (0x20 8)) -- 1.7.12 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] ARM: OMAP2+: timer: initialize before using oh_name
of_property_read_string_index(...,oh_name) in omap_dm_timer_init_one
does not alter the value of 'oh_name' even if the relevant function
fails and as 'oh_name' in stack may have a non-zero value, it would
be misunderstood by timer code that DT has specified ti,hwmod
property for timer. 'oh_name' in this scenario would be a junk value,
this would result in module not being enabled by hwmod API's for
timer, and in turn crash.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/timer.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index f8b23b8..8e0c390 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -220,7 +220,7 @@ static int __init omap_dm_timer_init_one(struct
omap_dm_timer *timer,
int posted)
{
char name[10]; /* 10 = sizeof(gptXX_Xck0) */
- const char *oh_name;
+ const char *oh_name = NULL;
struct device_node *np;
struct omap_hwmod *oh;
struct resource irq, mem;
--
1.7.12
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[PATCH v3] ARM: dts: AM43x: initial support
DT source (minimal) for AM4372 SoC to represent AM43x SoC's. Those
represented here are the minimal DT nodes necessary to get kernel
booting.
In DT nodes, ti,hwmod property has not been added, this would be
added along with PRCM support for AM43x.
Signed-off-by: Ankur Kishore a-kish...@ti.com
Signed-off-by: Afzal Mohammed af...@ti.com
---
v3: Make use of C preprocessor, rebased over Benoit's 'for_3.11/dts' branch
v2: Add gptimer 1ms, timer2, synctimer and remove twd local timer
arch/arm/boot/dts/am4372.dtsi | 68 +++
1 file changed, 68 insertions(+)
create mode 100644 arch/arm/boot/dts/am4372.dtsi
diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
new file mode 100644
index 000..ddc1df7
--- /dev/null
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -0,0 +1,68 @@
+/*
+ * Device Tree Source for AM4372 SoC
+ *
+ * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed as is without any warranty of any
+ * kind, whether express or implied.
+ */
+
+#include dt-bindings/interrupt-controller/arm-gic.h
+
+#include skeleton.dtsi
+
+/ {
+ compatible = ti,am4372, ti,am43;
+ interrupt-parent = gic;
+
+
+ aliases {
+ serial0 = uart0;
+ };
+
+ cpus {
+ cpu@0 {
+ compatible = arm,cortex-a9;
+ };
+ };
+
+ gic: interrupt-controller@48241000 {
+ compatible = arm,cortex-a9-gic;
+ interrupt-controller;
+ #interrupt-cells = 3;
+ reg = 0x48241000 0x1000,
+ 0x48240100 0x0100;
+ };
+
+ ocp {
+ compatible = simple-bus;
+ #address-cells = 1;
+ #size-cells = 1;
+ ranges;
+
+ uart0: serial@44e09000 {
+ compatible = ti,am4372-uart,ti,omap2-uart;
+ reg = 0x44e09000 0x2000;
+ interrupts = GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH;
+ };
+
+ timer1: timer@44e31000 {
+ compatible =
ti,am4372-timer-1ms,ti,am335x-timer-1ms;
+ reg = 0x44e31000 0x400;
+ interrupts = GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH;
+ ti,timer-alwon;
+ };
+
+ timer2: timer@4804 {
+ compatible = ti,am4372-timer,ti,am335x-timer;
+ reg = 0x4804 0x400;
+ interrupts = GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH;
+ };
+
+ counter32k: counter@44e86000 {
+ compatible =
ti,am4372-counter32k,ti,omap-counter32k;
+ reg = 0x44e86000 0x40;
+ };
+ };
+};
--
1.7.12
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[PATCH] ARM: dts: AM43x EPOS EVM support
Add AM43x ePOS EVM minimal DT source - this is a minimal one to get
it booting. Also include it in omap2plus dtbs and document bindings.
The hardware is under development.
Signed-off-by: Afzal Mohammed af...@ti.com
---
Hi Benoit,
This is based on your for_3.11/dts branch.
Ideally I wanted to split this into 3 patches - first doc, second dts
and last adding build support. As changes in total is trivial, it was
made a single one.
Regards
Afzal
Documentation/devicetree/bindings/arm/omap/omap.txt | 3 +++
arch/arm/boot/dts/Makefile | 3 ++-
arch/arm/boot/dts/am43x-epos-evm.dts| 18 ++
3 files changed, 23 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/boot/dts/am43x-epos-evm.dts
diff --git a/Documentation/devicetree/bindings/arm/omap/omap.txt
b/Documentation/devicetree/bindings/arm/omap/omap.txt
index f8288ea..6d498c7 100644
--- a/Documentation/devicetree/bindings/arm/omap/omap.txt
+++ b/Documentation/devicetree/bindings/arm/omap/omap.txt
@@ -56,3 +56,6 @@ Boards:
- OMAP5 EVM : Evaluation Module
compatible = ti,omap5-evm, ti,omap5
+
+- AM43x EPOS EVM
+ compatible = ti,am43x-epos-evm, ti,am4372, ti,am43
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 8e50761..05da469 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -155,7 +155,8 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
am335x-evmsk.dtb \
am335x-bone.dtb \
am3517-evm.dtb \
- am3517_mt_ventoux.dtb
+ am3517_mt_ventoux.dtb \
+ am43x-epos-evm.dtb
dtb-$(CONFIG_ARCH_ORION5X) += orion5x-lacie-ethernet-disk-mini-v2.dtb
dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb
dtb-$(CONFIG_ARCH_U8500) += snowball.dtb \
diff --git a/arch/arm/boot/dts/am43x-epos-evm.dts
b/arch/arm/boot/dts/am43x-epos-evm.dts
new file mode 100644
index 000..74174d4
--- /dev/null
+++ b/arch/arm/boot/dts/am43x-epos-evm.dts
@@ -0,0 +1,18 @@
+/*
+ * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/* AM43x EPOS EVM */
+
+/dts-v1/;
+
+#include am4372.dtsi
+
+/ {
+ model = TI AM43x EPOS EVM;
+ compatible = ti,am43x-epos-evm,ti,am4372,ti,am43;
+};
--
1.7.12
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[PATCH 2/2] ARM: OMAP2+: hwmod: AM335x: fix cpgmac address space
Register target address to be used for cpgmac is the second device
address space. By default, hwmod picks first address space (0th index)
for register target.
With removal of address space from hwmod and using DT instead, cpgmac
is getting wrong address space for register target.
Fix it by indicating the address space to be used for register target.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_33xx_data.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
index 28bbd56..7a9b492 100644
--- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
@@ -562,6 +562,7 @@ static struct omap_hwmod am33xx_cpgmac0_hwmod = {
.clkdm_name = cpsw_125mhz_clkdm,
.flags = (HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY),
.main_clk = cpsw_125mhz_gclk,
+ .mpu_rt_idx = 1,
.prcm = {
.omap4 = {
.clkctrl_offs = AM33XX_CM_PER_CPGMAC0_CLKCTRL_OFFSET,
--
1.8.3.1
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[PATCH 1/2] ARM: OMAP2+: hwmod: rt address space index for DT
Address space is being removed from hwmod database and DT information
in reg property is being used. Currently the 0th index of device
address space is used to map for register target address. This is not
always true, eg. cpgmac has it's sysconfig in second address space.
Handle it by specifying index of device address space to be used for
register target. As default value of this field would be zero with
static initialization, existing behaviour of using first address space
for register target while using DT would be kept as such.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/omap_hwmod.c | 2 +-
arch/arm/mach-omap2/omap_hwmod.h | 2 ++
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 7341eff..7f4db12 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -2386,7 +2386,7 @@ static void __init _init_mpu_rt_base(struct omap_hwmod
*oh, void *data)
np = of_dev_hwmod_lookup(of_find_node_by_name(NULL, ocp), oh);
if (np)
- va_start = of_iomap(np, 0);
+ va_start = of_iomap(np, oh-mpu_rt_idx);
} else {
va_start = ioremap(mem-pa_start, mem-pa_end - mem-pa_start);
}
diff --git a/arch/arm/mach-omap2/omap_hwmod.h b/arch/arm/mach-omap2/omap_hwmod.h
index aab33fd..29f7687 100644
--- a/arch/arm/mach-omap2/omap_hwmod.h
+++ b/arch/arm/mach-omap2/omap_hwmod.h
@@ -568,6 +568,7 @@ struct omap_hwmod_link {
* @voltdm: pointer to voltage domain (filled in at runtime)
* @dev_attr: arbitrary device attributes that can be passed to the driver
* @_sysc_cache: internal-use hwmod flags
+ * @mpu_rt_idx: index of device address space for register target (for DT boot)
* @_mpu_rt_va: cached register target start address (internal use)
* @_mpu_port: cached MPU register target slave (internal use)
* @opt_clks_cnt: number of @opt_clks
@@ -612,6 +613,7 @@ struct omap_hwmod {
struct list_headslave_ports; /* connect to *_TA */
void*dev_attr;
u32 _sysc_cache;
+ int mpu_rt_idx;
void __iomem*_mpu_rt_va;
spinlock_t _lock;
struct list_headnode;
--
1.8.3.1
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