[PATCH net-next 2/5] cxgb4/cxgb4vf/csiostor: Cleanup SGE and PCI related register defines
This patch cleansup remaining SGE related macros/register defines and all PCI
related ones that are defined in t4_regs.h and the affected files.
Signed-off-by: Hariprasad Shenai haripra...@chelsio.com
---
drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c| 68 ++--
drivers/net/ethernet/chelsio/cxgb4/sge.c | 78 ++--
drivers/net/ethernet/chelsio/cxgb4/t4_hw.c | 224
drivers/net/ethernet/chelsio/cxgb4/t4_regs.h | 605 ++--
drivers/net/ethernet/chelsio/cxgb4/t4_values.h |4 +
.../net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c| 12 +-
drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c |6 +-
drivers/scsi/csiostor/csio_hw.c| 33 +-
drivers/scsi/csiostor/csio_hw_chip.h |4 +-
drivers/scsi/csiostor/csio_hw_t4.c | 112 ++--
drivers/scsi/csiostor/csio_hw_t5.c | 114 ++--
drivers/scsi/csiostor/csio_isr.c |2 +-
drivers/scsi/csiostor/csio_wr.c| 36 +-
13 files changed, 766 insertions(+), 532 deletions(-)
diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
index 5e0d57a..16c633f 100644
--- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
+++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
@@ -1590,9 +1590,9 @@ static void get_stats(struct net_device *dev, struct
ethtool_stats *stats,
collect_sge_port_stats(adapter, pi, (struct queue_port_stats *)data);
data += sizeof(struct queue_port_stats) / sizeof(u64);
if (!is_t4(adapter-params.chip)) {
- t4_write_reg(adapter, SGE_STAT_CFG, STATSOURCE_T5(7));
- val1 = t4_read_reg(adapter, SGE_STAT_TOTAL);
- val2 = t4_read_reg(adapter, SGE_STAT_MATCH);
+ t4_write_reg(adapter, SGE_STAT_CFG_A, STATSOURCE_T5_V(7));
+ val1 = t4_read_reg(adapter, SGE_STAT_TOTAL_A);
+ val2 = t4_read_reg(adapter, SGE_STAT_MATCH_A);
*data = val1 - val2;
data++;
*data = val2;
@@ -3601,14 +3601,14 @@ unsigned int cxgb4_dbfifo_count(const struct net_device
*dev, int lpfifo)
struct adapter *adap = netdev2adap(dev);
u32 v1, v2, lp_count, hp_count;
- v1 = t4_read_reg(adap, A_SGE_DBFIFO_STATUS);
- v2 = t4_read_reg(adap, SGE_DBFIFO_STATUS2);
+ v1 = t4_read_reg(adap, SGE_DBFIFO_STATUS_A);
+ v2 = t4_read_reg(adap, SGE_DBFIFO_STATUS2_A);
if (is_t4(adap-params.chip)) {
- lp_count = G_LP_COUNT(v1);
- hp_count = G_HP_COUNT(v1);
+ lp_count = LP_COUNT_G(v1);
+ hp_count = HP_COUNT_G(v1);
} else {
- lp_count = G_LP_COUNT_T5(v1);
- hp_count = G_HP_COUNT_T5(v2);
+ lp_count = LP_COUNT_T5_G(v1);
+ hp_count = HP_COUNT_T5_G(v2);
}
return lpfifo ? lp_count : hp_count;
}
@@ -3667,14 +3667,14 @@ int cxgb4_flush_eq_cache(struct net_device *dev)
int ret;
ret = t4_fwaddrspace_write(adap, adap-mbox,
- 0xe100 + A_SGE_CTXT_CMD, 0x2000);
+ 0xe100 + SGE_CTXT_CMD_A, 0x2000);
return ret;
}
EXPORT_SYMBOL(cxgb4_flush_eq_cache);
static int read_eq_indices(struct adapter *adap, u16 qid, u16 *pidx, u16 *cidx)
{
- u32 addr = t4_read_reg(adap, A_SGE_DBQ_CTXT_BADDR) + 24 * qid + 8;
+ u32 addr = t4_read_reg(adap, SGE_DBQ_CTXT_BADDR_A) + 24 * qid + 8;
__be64 indices;
int ret;
@@ -3728,7 +3728,7 @@ void cxgb4_disable_db_coalescing(struct net_device *dev)
struct adapter *adap;
adap = netdev2adap(dev);
- t4_set_reg_field(adap, A_SGE_DOORBELL_CONTROL, NOCOALESCE_F,
+ t4_set_reg_field(adap, SGE_DOORBELL_CONTROL_A, NOCOALESCE_F,
NOCOALESCE_F);
}
EXPORT_SYMBOL(cxgb4_disable_db_coalescing);
@@ -3738,7 +3738,7 @@ void cxgb4_enable_db_coalescing(struct net_device *dev)
struct adapter *adap;
adap = netdev2adap(dev);
- t4_set_reg_field(adap, A_SGE_DOORBELL_CONTROL, NOCOALESCE_F, 0);
+ t4_set_reg_field(adap, SGE_DOORBELL_CONTROL_A, NOCOALESCE_F, 0);
}
EXPORT_SYMBOL(cxgb4_enable_db_coalescing);
@@ -3877,14 +3877,14 @@ static void drain_db_fifo(struct adapter *adap, int
usecs)
u32 v1, v2, lp_count, hp_count;
do {
- v1 = t4_read_reg(adap, A_SGE_DBFIFO_STATUS);
- v2 = t4_read_reg(adap, SGE_DBFIFO_STATUS2);
+ v1 = t4_read_reg(adap, SGE_DBFIFO_STATUS_A);
+ v2 = t4_read_reg(adap, SGE_DBFIFO_STATUS2_A);
if (is_t4(adap-params.chip)) {
- lp_count = G_LP_COUNT(v1);
- hp_count = G_HP_COUNT(v1);
+ lp_count = LP_COUNT_G(v1);
+ hp_count = HP_COUNT_G(v1);
} else {
-
[PATCH net-next 5/5] cxgb4/cxgb4vf/csiostor: Cleanup PL, XGMAC, SF and MC related register defines
This patch cleanups all PL, XGMAC and SF related macros/register defines
that are defined in t4_regs.h and the affected files
Signed-off-by: Hariprasad Shenai haripra...@chelsio.com
---
drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c| 56 +-
drivers/net/ethernet/chelsio/cxgb4/l2t.c |9 +-
drivers/net/ethernet/chelsio/cxgb4/t4_hw.c | 258 +-
drivers/net/ethernet/chelsio/cxgb4/t4_regs.h | 538 +++-
drivers/net/ethernet/chelsio/cxgb4/t4_values.h | 33 ++
.../net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c|2 +-
drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c |6 +-
drivers/scsi/csiostor/csio_hw.c| 186
drivers/scsi/csiostor/csio_hw.h|8 +-
drivers/scsi/csiostor/csio_hw_chip.h |4 +-
drivers/scsi/csiostor/csio_mb.c|6 +-
drivers/scsi/csiostor/csio_wr.c|2 +-
12 files changed, 594 insertions(+), 514 deletions(-)
diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
index 53ad8d3..04e675b 100644
--- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
+++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
@@ -834,11 +834,11 @@ static void disable_msi(struct adapter *adapter)
static irqreturn_t t4_nondata_intr(int irq, void *cookie)
{
struct adapter *adap = cookie;
+ u32 v = t4_read_reg(adap, MYPF_REG(PL_PF_INT_CAUSE_A));
- u32 v = t4_read_reg(adap, MYPF_REG(PL_PF_INT_CAUSE));
- if (v PFSW) {
+ if (v PFSW_F) {
adap-swintr = 1;
- t4_write_reg(adap, MYPF_REG(PL_PF_INT_CAUSE), v);
+ t4_write_reg(adap, MYPF_REG(PL_PF_INT_CAUSE_A), v);
}
t4_slow_intr_handler(adap);
return IRQ_HANDLED;
@@ -3654,10 +3654,10 @@ void cxgb4_iscsi_init(struct net_device *dev, unsigned
int tag_mask,
{
struct adapter *adap = netdev2adap(dev);
- t4_write_reg(adap, ULP_RX_ISCSI_TAGMASK, tag_mask);
- t4_write_reg(adap, ULP_RX_ISCSI_PSZ, HPZ0(pgsz_order[0]) |
-HPZ1(pgsz_order[1]) | HPZ2(pgsz_order[2]) |
-HPZ3(pgsz_order[3]));
+ t4_write_reg(adap, ULP_RX_ISCSI_TAGMASK_A, tag_mask);
+ t4_write_reg(adap, ULP_RX_ISCSI_PSZ_A, HPZ0_V(pgsz_order[0]) |
+HPZ1_V(pgsz_order[1]) | HPZ2_V(pgsz_order[2]) |
+HPZ3_V(pgsz_order[3]));
}
EXPORT_SYMBOL(cxgb4_iscsi_init);
@@ -4580,13 +4580,13 @@ int cxgb4_create_server_filter(const struct net_device
*dev, unsigned int stid,
f-fs.val.lip[i] = val[i];
f-fs.mask.lip[i] = ~0;
}
- if (adap-params.tp.vlan_pri_map F_PORT) {
+ if (adap-params.tp.vlan_pri_map PORT_F) {
f-fs.val.iport = port;
f-fs.mask.iport = mask;
}
}
- if (adap-params.tp.vlan_pri_map F_PROTOCOL) {
+ if (adap-params.tp.vlan_pri_map PROTOCOL_F) {
f-fs.val.proto = IPPROTO_TCP;
f-fs.mask.proto = ~0;
}
@@ -4950,37 +4950,37 @@ static int adap_init1(struct adapter *adap, struct
fw_caps_config_cmd *c)
/* tweak some settings */
t4_write_reg(adap, TP_SHIFT_CNT_A, 0x64f8849);
- t4_write_reg(adap, ULP_RX_TDDP_PSZ, HPZ0(PAGE_SHIFT - 12));
+ t4_write_reg(adap, ULP_RX_TDDP_PSZ_A, HPZ0_V(PAGE_SHIFT - 12));
t4_write_reg(adap, TP_PIO_ADDR_A, TP_INGRESS_CONFIG_A);
v = t4_read_reg(adap, TP_PIO_DATA_A);
t4_write_reg(adap, TP_PIO_DATA_A, v ~CSUM_HAS_PSEUDO_HDR_F);
/* first 4 Tx modulation queues point to consecutive Tx channels */
adap-params.tp.tx_modq_map = 0xE4;
- t4_write_reg(adap, A_TP_TX_MOD_QUEUE_REQ_MAP,
-V_TX_MOD_QUEUE_REQ_MAP(adap-params.tp.tx_modq_map));
+ t4_write_reg(adap, TP_TX_MOD_QUEUE_REQ_MAP_A,
+TX_MOD_QUEUE_REQ_MAP_V(adap-params.tp.tx_modq_map));
/* associate each Tx modulation queue with consecutive Tx channels */
v = 0x84218421;
t4_write_indirect(adap, TP_PIO_ADDR_A, TP_PIO_DATA_A,
- v, 1, A_TP_TX_SCHED_HDR);
+ v, 1, TP_TX_SCHED_HDR_A);
t4_write_indirect(adap, TP_PIO_ADDR_A, TP_PIO_DATA_A,
- v, 1, A_TP_TX_SCHED_FIFO);
+ v, 1, TP_TX_SCHED_FIFO_A);
t4_write_indirect(adap, TP_PIO_ADDR_A, TP_PIO_DATA_A,
- v, 1, A_TP_TX_SCHED_PCMD);
+ v, 1, TP_TX_SCHED_PCMD_A);
#define T4_TX_MODQ_10G_WEIGHT_DEFAULT 16 /* in KB units */
if (is_offload(adap)) {
- t4_write_reg(adap, A_TP_TX_MOD_QUEUE_WEIGHT0,
-V_TX_MODQ_WEIGHT0(T4_TX_MODQ_10G_WEIGHT_DEFAULT) |
-
[PATCH net-next 3/5] cxgb4/cxg4vf/csiostor: Cleanup MC, MA and CIM related register defines
This patch cleanups all MC, MA and CIM related macros/register defines that are
defined in t4_regs.h and the affected files.
Signed-off-by: Hariprasad Shenai haripra...@chelsio.com
---
drivers/net/ethernet/chelsio/cxgb4/t4_hw.c | 206 +-
drivers/net/ethernet/chelsio/cxgb4/t4_regs.h | 501 +++---
drivers/net/ethernet/chelsio/cxgb4vf/t4vf_defs.h |4 +-
drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c | 14 +-
drivers/scsi/csiostor/csio_hw.c | 125 +++---
drivers/scsi/csiostor/csio_hw_t4.c | 32 +-
drivers/scsi/csiostor/csio_hw_t5.c | 36 +-
drivers/scsi/csiostor/csio_mb.c | 49 ++-
8 files changed, 588 insertions(+), 379 deletions(-)
diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
index 9f8cd56..c9777e0 100644
--- a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
+++ b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
@@ -265,8 +265,8 @@ int t4_wr_mbox_meat(struct adapter *adap, int mbox, const
void *cmd, int size,
u64 res;
int i, ms, delay_idx;
const __be64 *p = cmd;
- u32 data_reg = PF_REG(mbox, CIM_PF_MAILBOX_DATA);
- u32 ctl_reg = PF_REG(mbox, CIM_PF_MAILBOX_CTRL);
+ u32 data_reg = PF_REG(mbox, CIM_PF_MAILBOX_DATA_A);
+ u32 ctl_reg = PF_REG(mbox, CIM_PF_MAILBOX_CTRL_A);
if ((size 15) || size MBOX_LEN)
return -EINVAL;
@@ -278,9 +278,9 @@ int t4_wr_mbox_meat(struct adapter *adap, int mbox, const
void *cmd, int size,
if (adap-pdev-error_state != pci_channel_io_normal)
return -EIO;
- v = MBOWNER_GET(t4_read_reg(adap, ctl_reg));
+ v = MBOWNER_G(t4_read_reg(adap, ctl_reg));
for (i = 0; v == MBOX_OWNER_NONE i 3; i++)
- v = MBOWNER_GET(t4_read_reg(adap, ctl_reg));
+ v = MBOWNER_G(t4_read_reg(adap, ctl_reg));
if (v != MBOX_OWNER_DRV)
return v ? -EBUSY : -ETIMEDOUT;
@@ -288,7 +288,7 @@ int t4_wr_mbox_meat(struct adapter *adap, int mbox, const
void *cmd, int size,
for (i = 0; i size; i += 8)
t4_write_reg64(adap, data_reg + i, be64_to_cpu(*p++));
- t4_write_reg(adap, ctl_reg, MBMSGVALID | MBOWNER(MBOX_OWNER_FW));
+ t4_write_reg(adap, ctl_reg, MBMSGVALID_F | MBOWNER_V(MBOX_OWNER_FW));
t4_read_reg(adap, ctl_reg); /* flush write */
delay_idx = 0;
@@ -304,8 +304,8 @@ int t4_wr_mbox_meat(struct adapter *adap, int mbox, const
void *cmd, int size,
mdelay(ms);
v = t4_read_reg(adap, ctl_reg);
- if (MBOWNER_GET(v) == MBOX_OWNER_DRV) {
- if (!(v MBMSGVALID)) {
+ if (MBOWNER_G(v) == MBOX_OWNER_DRV) {
+ if (!(v MBMSGVALID_F)) {
t4_write_reg(adap, ctl_reg, 0);
continue;
}
@@ -351,27 +351,27 @@ int t4_mc_read(struct adapter *adap, int idx, u32 addr,
__be32 *data, u64 *ecc)
u32 mc_bist_status_rdata, mc_bist_data_pattern;
if (is_t4(adap-params.chip)) {
- mc_bist_cmd = MC_BIST_CMD;
- mc_bist_cmd_addr = MC_BIST_CMD_ADDR;
- mc_bist_cmd_len = MC_BIST_CMD_LEN;
- mc_bist_status_rdata = MC_BIST_STATUS_RDATA;
- mc_bist_data_pattern = MC_BIST_DATA_PATTERN;
+ mc_bist_cmd = MC_BIST_CMD_A;
+ mc_bist_cmd_addr = MC_BIST_CMD_ADDR_A;
+ mc_bist_cmd_len = MC_BIST_CMD_LEN_A;
+ mc_bist_status_rdata = MC_BIST_STATUS_RDATA_A;
+ mc_bist_data_pattern = MC_BIST_DATA_PATTERN_A;
} else {
- mc_bist_cmd = MC_REG(MC_P_BIST_CMD, idx);
- mc_bist_cmd_addr = MC_REG(MC_P_BIST_CMD_ADDR, idx);
- mc_bist_cmd_len = MC_REG(MC_P_BIST_CMD_LEN, idx);
- mc_bist_status_rdata = MC_REG(MC_P_BIST_STATUS_RDATA, idx);
- mc_bist_data_pattern = MC_REG(MC_P_BIST_DATA_PATTERN, idx);
+ mc_bist_cmd = MC_REG(MC_P_BIST_CMD_A, idx);
+ mc_bist_cmd_addr = MC_REG(MC_P_BIST_CMD_ADDR_A, idx);
+ mc_bist_cmd_len = MC_REG(MC_P_BIST_CMD_LEN_A, idx);
+ mc_bist_status_rdata = MC_REG(MC_P_BIST_STATUS_RDATA_A, idx);
+ mc_bist_data_pattern = MC_REG(MC_P_BIST_DATA_PATTERN_A, idx);
}
- if (t4_read_reg(adap, mc_bist_cmd) START_BIST)
+ if (t4_read_reg(adap, mc_bist_cmd) START_BIST_F)
return -EBUSY;
t4_write_reg(adap, mc_bist_cmd_addr, addr ~0x3fU);
t4_write_reg(adap, mc_bist_cmd_len, 64);
t4_write_reg(adap, mc_bist_data_pattern, 0xc);
- t4_write_reg(adap, mc_bist_cmd, BIST_OPCODE(1) | START_BIST |
-BIST_CMD_GAP(1));
- i = t4_wait_op_done(adap, mc_bist_cmd, START_BIST, 0, 10, 1);
+ t4_write_reg(adap,
[PATCH net-next 0/5] RDMA/cxgb4/cxgb4vf/csiostor: Cleanup register defines
Hi, This series continues to cleanup all the macros/register defines related to SGE, PCIE, MC, MA, TCAM, MAC, etc that are defined in t4_regs.h and the affected files. Will post another 1 or 2 series so that we can cover all the macros so that they all follow the same style to be consistent. The patches series is created against 'net-next' tree. And includes patches on cxgb4, cxgb4vf, iw_cxgb4 and csiostor driver. We have included all the maintainers of respective drivers. Kindly review the change and let us know in case of any review comments. Thanks Hariprasad Shenai (5): RDMA/cxgb4/cxgb4vf/csiostor: Cleanup SGE register defines cxgb4/cxgb4vf/csiostor: Cleanup SGE and PCI related register defines cxgb4/cxg4vf/csiostor: Cleanup MC, MA and CIM related register defines cxgb4/csiostor: Cleanup TP, MPS and TCAM related register defines cxgb4/cxgb4vf/csiostor: Cleanup PL, XGMAC, SF and MC related register defines drivers/infiniband/hw/cxgb4/t4.h | 26 +- drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c| 266 +- drivers/net/ethernet/chelsio/cxgb4/l2t.c |9 +- drivers/net/ethernet/chelsio/cxgb4/sge.c | 174 +- drivers/net/ethernet/chelsio/cxgb4/t4_hw.c | 960 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h | 2749 drivers/net/ethernet/chelsio/cxgb4/t4_values.h | 118 + .../net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c| 40 +- drivers/net/ethernet/chelsio/cxgb4vf/sge.c | 47 +- drivers/net/ethernet/chelsio/cxgb4vf/t4vf_defs.h |4 +- drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c | 43 +- drivers/scsi/csiostor/csio_hw.c| 515 ++-- drivers/scsi/csiostor/csio_hw.h|8 +- drivers/scsi/csiostor/csio_hw_chip.h | 14 +- drivers/scsi/csiostor/csio_hw_t4.c | 144 +- drivers/scsi/csiostor/csio_hw_t5.c | 150 +- drivers/scsi/csiostor/csio_isr.c |2 +- drivers/scsi/csiostor/csio_mb.c| 53 +- drivers/scsi/csiostor/csio_wr.c| 154 +- 19 files changed, 3151 insertions(+), 2325 deletions(-) create mode 100644 drivers/net/ethernet/chelsio/cxgb4/t4_values.h -- To unsubscribe from this list: send the line unsubscribe linux-rdma in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH net-next 1/5] RDMA/cxgb4/cxgb4vf/csiostor: Cleanup SGE register defines
This patch cleanups all SGE related macros/register defines that are
defined in t4_regs.h and the affected files.
Signed-off-by: Hariprasad Shenai haripra...@chelsio.com
---
drivers/infiniband/hw/cxgb4/t4.h | 26 +-
drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c| 76 ++--
drivers/net/ethernet/chelsio/cxgb4/sge.c | 96 ++--
drivers/net/ethernet/chelsio/cxgb4/t4_hw.c | 118 +++---
drivers/net/ethernet/chelsio/cxgb4/t4_regs.h | 498 +++
drivers/net/ethernet/chelsio/cxgb4/t4_values.h | 81
.../net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c| 24 +-
drivers/net/ethernet/chelsio/cxgb4vf/sge.c | 47 +-
drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c | 17 +-
drivers/scsi/csiostor/csio_hw.c| 58 ++--
drivers/scsi/csiostor/csio_hw_chip.h |8 +-
drivers/scsi/csiostor/csio_wr.c| 112 +++---
12 files changed, 670 insertions(+), 491 deletions(-)
create mode 100644 drivers/net/ethernet/chelsio/cxgb4/t4_values.h
diff --git a/drivers/infiniband/hw/cxgb4/t4.h b/drivers/infiniband/hw/cxgb4/t4.h
index c04e513..29e764e 100644
--- a/drivers/infiniband/hw/cxgb4/t4.h
+++ b/drivers/infiniband/hw/cxgb4/t4.h
@@ -465,14 +465,14 @@ static inline void t4_ring_sq_db(struct t4_wq *wq, u16
inc, u8 t5,
} else {
PDBG(%s: DB wq-sq.pidx = %d\n,
__func__, wq-sq.pidx);
- writel(PIDX_T5(inc), wq-sq.udb);
+ writel(PIDX_T5_V(inc), wq-sq.udb);
}
/* Flush user doorbell area writes. */
wmb();
return;
}
- writel(QID(wq-sq.qid) | PIDX(inc), wq-db);
+ writel(QID_V(wq-sq.qid) | PIDX_V(inc), wq-db);
}
static inline void t4_ring_rq_db(struct t4_wq *wq, u16 inc, u8 t5,
@@ -489,14 +489,14 @@ static inline void t4_ring_rq_db(struct t4_wq *wq, u16
inc, u8 t5,
} else {
PDBG(%s: DB wq-rq.pidx = %d\n,
__func__, wq-rq.pidx);
- writel(PIDX_T5(inc), wq-rq.udb);
+ writel(PIDX_T5_V(inc), wq-rq.udb);
}
/* Flush user doorbell area writes. */
wmb();
return;
}
- writel(QID(wq-rq.qid) | PIDX(inc), wq-db);
+ writel(QID_V(wq-rq.qid) | PIDX_V(inc), wq-db);
}
static inline int t4_wq_in_error(struct t4_wq *wq)
@@ -561,14 +561,14 @@ static inline int t4_arm_cq(struct t4_cq *cq, int se)
u32 val;
set_bit(CQ_ARMED, cq-flags);
- while (cq-cidx_inc CIDXINC_MASK) {
- val = SEINTARM(0) | CIDXINC(CIDXINC_MASK) | TIMERREG(7) |
- INGRESSQID(cq-cqid);
+ while (cq-cidx_inc CIDXINC_M) {
+ val = SEINTARM_V(0) | CIDXINC_V(CIDXINC_M) | TIMERREG_V(7) |
+ INGRESSQID_V(cq-cqid);
writel(val, cq-gts);
- cq-cidx_inc -= CIDXINC_MASK;
+ cq-cidx_inc -= CIDXINC_M;
}
- val = SEINTARM(se) | CIDXINC(cq-cidx_inc) | TIMERREG(6) |
- INGRESSQID(cq-cqid);
+ val = SEINTARM_V(se) | CIDXINC_V(cq-cidx_inc) | TIMERREG_V(6) |
+ INGRESSQID_V(cq-cqid);
writel(val, cq-gts);
cq-cidx_inc = 0;
return 0;
@@ -597,11 +597,11 @@ static inline void t4_swcq_consume(struct t4_cq *cq)
static inline void t4_hwcq_consume(struct t4_cq *cq)
{
cq-bits_type_ts = cq-queue[cq-cidx].bits_type_ts;
- if (++cq-cidx_inc == (cq-size 4) || cq-cidx_inc == CIDXINC_MASK) {
+ if (++cq-cidx_inc == (cq-size 4) || cq-cidx_inc == CIDXINC_M) {
u32 val;
- val = SEINTARM(0) | CIDXINC(cq-cidx_inc) | TIMERREG(7) |
- INGRESSQID(cq-cqid);
+ val = SEINTARM_V(0) | CIDXINC_V(cq-cidx_inc) | TIMERREG_V(7) |
+ INGRESSQID_V(cq-cqid);
writel(val, cq-gts);
cq-cidx_inc = 0;
}
diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
index ccf3436..5e0d57a 100644
--- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
+++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
@@ -66,6 +66,7 @@
#include cxgb4.h
#include t4_regs.h
+#include t4_values.h
#include t4_msg.h
#include t4fw_api.h
#include cxgb4_dcb.h
@@ -1050,9 +1051,9 @@ static void enable_rx(struct adapter *adap)
if (q-handler)
napi_enable(q-napi);
/* 0-increment GTS to start the timer and enable interrupts */
- t4_write_reg(adap, MYPF_REG(SGE_PF_GTS),
-SEINTARM(q-intr_params) |
-INGRESSQID(q-cntxt_id));
+ t4_write_reg(adap, MYPF_REG(SGE_PF_GTS_A),
+SEINTARM_V(q-intr_params) |
[PATCH net-next 4/5] cxgb4/csiostor: Cleanup TP, MPS and TCAM related register defines
This patch cleanups all TP, MPS and TCAM related macros/register defines
that are defined in t4_regs.h and the affected files
Signed-off-by: Hariprasad Shenai haripra...@chelsio.com
---
drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c | 70 ++--
drivers/net/ethernet/chelsio/cxgb4/t4_hw.c | 154 +++---
drivers/net/ethernet/chelsio/cxgb4/t4_regs.h| 607 ++-
drivers/scsi/csiostor/csio_hw.c | 113 +++--
drivers/scsi/csiostor/csio_wr.c |4 +-
5 files changed, 536 insertions(+), 412 deletions(-)
diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
index 16c633f..53ad8d3 100644
--- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
+++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
@@ -359,8 +359,8 @@ MODULE_PARM_DESC(select_queue,
*/
enum {
TP_VLAN_PRI_MAP_DEFAULT = HW_TPL_FR_MT_PR_IV_P_FC,
- TP_VLAN_PRI_MAP_FIRST = FCOE_SHIFT,
- TP_VLAN_PRI_MAP_LAST = FRAGMENTATION_SHIFT,
+ TP_VLAN_PRI_MAP_FIRST = FCOE_S,
+ TP_VLAN_PRI_MAP_LAST = FRAGMENTATION_S,
};
static unsigned int tp_vlan_pri_map = TP_VLAN_PRI_MAP_DEFAULT;
@@ -1177,10 +1177,10 @@ freeout:t4_free_sge_resources(adap);
}
t4_write_reg(adap, is_t4(adap-params.chip) ?
- MPS_TRC_RSS_CONTROL :
- MPS_T5_TRC_RSS_CONTROL,
-RSSCONTROL(netdev2pinfo(adap-port[0])-tx_chan) |
-QUEUENUMBER(s-ethrxq[0].rspq.abs_id));
+ MPS_TRC_RSS_CONTROL_A :
+ MPS_T5_TRC_RSS_CONTROL_A,
+RSSCONTROL_V(netdev2pinfo(adap-port[0])-tx_chan) |
+QUEUENUMBER_V(s-ethrxq[0].rspq.abs_id));
return 0;
}
@@ -4094,7 +4094,7 @@ static void uld_attach(struct adapter *adap, unsigned int
uld)
lli.nports = adap-params.nports;
lli.wr_cred = adap-params.ofldq_wr_cred;
lli.adapter_type = adap-params.chip;
- lli.iscsi_iolen = MAXRXDATA_GET(t4_read_reg(adap, TP_PARA_REG2));
+ lli.iscsi_iolen = MAXRXDATA_G(t4_read_reg(adap, TP_PARA_REG2_A));
lli.cclk_ps = 10 / adap-params.vpd.cclk;
lli.udb_density = 1 adap-params.sge.eq_qpp;
lli.ucq_density = 1 adap-params.sge.iq_qpp;
@@ -4949,11 +4949,11 @@ static int adap_init1(struct adapter *adap, struct
fw_caps_config_cmd *c)
t4_sge_init(adap);
/* tweak some settings */
- t4_write_reg(adap, TP_SHIFT_CNT, 0x64f8849);
+ t4_write_reg(adap, TP_SHIFT_CNT_A, 0x64f8849);
t4_write_reg(adap, ULP_RX_TDDP_PSZ, HPZ0(PAGE_SHIFT - 12));
- t4_write_reg(adap, TP_PIO_ADDR, TP_INGRESS_CONFIG);
- v = t4_read_reg(adap, TP_PIO_DATA);
- t4_write_reg(adap, TP_PIO_DATA, v ~CSUM_HAS_PSEUDO_HDR);
+ t4_write_reg(adap, TP_PIO_ADDR_A, TP_INGRESS_CONFIG_A);
+ v = t4_read_reg(adap, TP_PIO_DATA_A);
+ t4_write_reg(adap, TP_PIO_DATA_A, v ~CSUM_HAS_PSEUDO_HDR_F);
/* first 4 Tx modulation queues point to consecutive Tx channels */
adap-params.tp.tx_modq_map = 0xE4;
@@ -4962,11 +4962,11 @@ static int adap_init1(struct adapter *adap, struct
fw_caps_config_cmd *c)
/* associate each Tx modulation queue with consecutive Tx channels */
v = 0x84218421;
- t4_write_indirect(adap, TP_PIO_ADDR, TP_PIO_DATA,
+ t4_write_indirect(adap, TP_PIO_ADDR_A, TP_PIO_DATA_A,
v, 1, A_TP_TX_SCHED_HDR);
- t4_write_indirect(adap, TP_PIO_ADDR, TP_PIO_DATA,
+ t4_write_indirect(adap, TP_PIO_ADDR_A, TP_PIO_DATA_A,
v, 1, A_TP_TX_SCHED_FIFO);
- t4_write_indirect(adap, TP_PIO_ADDR, TP_PIO_DATA,
+ t4_write_indirect(adap, TP_PIO_ADDR_A, TP_PIO_DATA_A,
v, 1, A_TP_TX_SCHED_PCMD);
#define T4_TX_MODQ_10G_WEIGHT_DEFAULT 16 /* in KB units */
@@ -5034,8 +5034,8 @@ static int adap_init0_tweaks(struct adapter *adapter)
* Don't include the IP Pseudo Header in CPL_RX_PKT checksums: Linux
* adds the pseudo header itself.
*/
- t4_tp_wr_bits_indirect(adapter, TP_INGRESS_CONFIG,
- CSUM_HAS_PSEUDO_HDR, 0);
+ t4_tp_wr_bits_indirect(adapter, TP_INGRESS_CONFIG_A,
+ CSUM_HAS_PSEUDO_HDR_F, 0);
return 0;
}
@@ -5401,34 +5401,34 @@ static int adap_init0_no_config(struct adapter
*adapter, int reset)
case 0:
/* compressed filter field not enabled */
break;
- case FCOE_MASK:
+ case FCOE_F:
bits += 1;
break;
- case PORT_MASK:
+ case PORT_F:
bits += 3;
break;
-
[PATCH opensm] Add separate dispatcher for SA set and delete requests
From: Daniel Klein dani...@mellanox.com
Add a separate dispatcher for SA set/delete requests in order to avoid
dependent request race conditions. This is caused by SA client
misbehavior (in not following IBA spec) in terms of dependent management
requests.
Without this change, when an agent sends a set of requests, OpenSM might
handle them in different order from that they were received, and if the
requests are dependent on each other, the outcome may vary.
With this change, requests will be handled in the order they were
received.
Stress test result:
Test is to send 200K set/delete guid info requests in parallel
(20 requests on the wire)
Without the patches: ~5.37 seconds
With the patches: 5.1 seconds
Background:
In terms of the general requirement/problem, the confusion stems from
the IBA management non standard meaning of a transaction. A
transaction ID is required to be unique if new operation (not rerequest
of existing operation) where transaction is determined from the
combination of TID, SGID (or SLID), and MgmtClass. There is no
requirement about handling the ordering of transactions. This was
explicitly omitted by design.
This lack of requirement actually goes further than just sets and could
serialize all incoming SA transactions if done across clients.
This is a bug but it is not OpenSM misbehavior. The requirement on any
ordering is on the client and not on the manager. The problem is to
deal with non compliant SA clients without negatively impacting
SA performance.
The specific issue is the ordering of set processing from a specific
application in a node which is a subset of the above. If a client is
to pipeline SA sets, it needs to know what it's doing and serialize
subsequent sets which depend on previous ones. If that is not done
(which is the case), per IBA standard, the bug is in the SA client.
Signed-off-by: Daniel Klein dani...@mellanox.com
Signed-off-by: Hal Rosenstock h...@mellanox.com
---
include/opensm/osm_opensm.h |8 +
include/opensm/osm_sa.h | 12 +++
include/opensm/osm_sa_mad_ctrl.h | 14 -
opensm/osm_opensm.c | 17 ++-
opensm/osm_sa.c | 45 ++-
opensm/osm_sa_mad_ctrl.c | 61 +++--
6 files changed, 143 insertions(+), 14 deletions(-)
diff --git a/include/opensm/osm_opensm.h b/include/opensm/osm_opensm.h
index 4750505..7768881 100644
--- a/include/opensm/osm_opensm.h
+++ b/include/opensm/osm_opensm.h
@@ -226,6 +226,8 @@ typedef struct osm_opensm {
osm_vl15_t vl15;
osm_log_t log;
cl_dispatcher_t disp;
+ cl_dispatcher_t sa_set_disp;
+ boolean_t sa_set_disp_initialized;
cl_plock_t lock;
struct osm_routing_engine *routing_engine_list;
struct osm_routing_engine *routing_engine_used;
@@ -269,6 +271,12 @@ typedef struct osm_opensm {
* disp
* Central dispatcher containing the OpenSM worker threads.
*
+* sa_set_disp
+* Dispatcher for SA Set and Delete requests.
+*
+* sa_set_disp_initialized.
+* Indicator that sa_set_disp dispatcher was initialized.
+*
* lock
* Shared lock guarding most OpenSM structures.
*
diff --git a/include/opensm/osm_sa.h b/include/opensm/osm_sa.h
index f9f334e..aeeaa02 100644
--- a/include/opensm/osm_sa.h
+++ b/include/opensm/osm_sa.h
@@ -186,6 +186,7 @@ typedef struct osm_sa {
osm_log_t *p_log;
osm_mad_pool_t *p_mad_pool;
cl_dispatcher_t *p_disp;
+ cl_dispatcher_t *p_set_disp;
cl_plock_t *p_lock;
atomic32_t sa_trans_id;
osm_sa_mad_ctrl_t mad_ctrl;
@@ -211,6 +212,10 @@ typedef struct osm_sa {
cl_disp_reg_handle_t lft_disp_h;
cl_disp_reg_handle_t sir_disp_h;
cl_disp_reg_handle_t mft_disp_h;
+ cl_disp_reg_handle_t infr_set_disp_h;
+ cl_disp_reg_handle_t gir_set_disp_h;
+ cl_disp_reg_handle_t mcmr_set_disp_h;
+ cl_disp_reg_handle_t sr_set_disp_h;
} osm_sa_t;
/*
* FIELDS
@@ -235,6 +240,9 @@ typedef struct osm_sa {
* p_disp
* Pointer to dispatcher
*
+* p_set_disp
+* Pointer to dispatcher for Set requests.
+*
* p_lock
* Pointer to Lock for serialization
*
@@ -346,6 +354,7 @@ ib_api_status_t osm_sa_init(IN osm_sm_t * p_sm, IN osm_sa_t
* p_sa,
IN osm_mad_pool_t * p_mad_pool,
IN osm_log_t * p_log, IN osm_stats_t * p_stats,
IN cl_dispatcher_t * p_disp,
+ IN cl_dispatcher_t * p_set_disp,
IN cl_plock_t * p_lock);
/*
* PARAMETERS
@@ -370,6 +379,9 @@ ib_api_status_t osm_sa_init(IN osm_sm_t * p_sm, IN osm_sa_t
* p_sa,
* p_disp
* [in] Pointer to the OpenSM central Dispatcher.
*
+* p_set_disp
+* [in] Pointer to the OpenSM Dispatcher for Set requests.
+*
*
Re: [PATCH net-next 0/5] RDMA/cxgb4/cxgb4vf/csiostor: Cleanup register defines
From: Hariprasad Shenai haripra...@chelsio.com Date: Mon, 5 Jan 2015 16:30:42 +0530 This series continues to cleanup all the macros/register defines related to SGE, PCIE, MC, MA, TCAM, MAC, etc that are defined in t4_regs.h and the affected files. Will post another 1 or 2 series so that we can cover all the macros so that they all follow the same style to be consistent. The patches series is created against 'net-next' tree. And includes patches on cxgb4, cxgb4vf, iw_cxgb4 and csiostor driver. We have included all the maintainers of respective drivers. Kindly review the change and let us know in case of any review comments. Series applied, thanks. -- To unsubscribe from this list: send the line unsubscribe linux-rdma in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] opensm/osm_subnet.c: Correct output error with congestion control table entries
On 1/5/2015 2:28 PM, Albert Chu wrote: Signed-off-by: Albert L. Chu ch...@llnl.gov Thanks. Applied. -- Hal -- To unsubscribe from this list: send the line unsubscribe linux-rdma in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] opensm/osm_subnet.c: Correct output error with congestion control table entries
Signed-off-by: Albert L. Chu ch...@llnl.gov
---
opensm/osm_subnet.c |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/opensm/osm_subnet.c b/opensm/osm_subnet.c
index d577a69..ba760ff 100644
--- a/opensm/osm_subnet.c
+++ b/opensm/osm_subnet.c
@@ -2926,10 +2926,10 @@ void osm_subn_output_conf(FILE *out, IN osm_subn_opt_t
* p_opts)
fprintf(out, %u:%u,
p_opts-cc_cct.entries[0].shift,
p_opts-cc_cct.entries[0].multiplier);
- for (i = 0; i p_opts-cc_cct.entries_len; i++) {
+ for (i = 1; i p_opts-cc_cct.entries_len; i++) {
fprintf(out, ,%u:%u,
- p_opts-cc_cct.entries[0].shift,
- p_opts-cc_cct.entries[0].multiplier);
+ p_opts-cc_cct.entries[i].shift,
+ p_opts-cc_cct.entries[i].multiplier);
}
fprintf(out, \n);
}
--
1.7.1
--
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the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/3] osm_congestion_control.c: Add additional header status check
On 12/22/2014 6:32 PM, Albert Chu wrote: In cc_rcv_mad, also check for IB_MAD_STATUS_UNSUP_CLASS_VER as indication congestion control is not available. Signed-off-by: Albert L. Chu ch...@llnl.gov Thanks. Applied. -- Hal -- To unsubscribe from this list: send the line unsubscribe linux-rdma in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 2/3] osm_congestion_control.c: Consistently set cc_unavailable_flag
On 12/22/2014 6:32 PM, Albert Chu wrote: For consistency to other code, set flag using TRUE and FALSE macros. Signed-off-by: Albert L. Chu ch...@llnl.gov Thanks. Applied. -- Hal -- To unsubscribe from this list: send the line unsubscribe linux-rdma in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 3/3] osm_congestion_control.c: Reset cc_timeout_count when count threshold passed
On 12/22/2014 6:32 PM, Albert Chu wrote: Signed-off-by: Albert L. Chu ch...@llnl.gov Thanks. Applied. -- Hal -- To unsubscribe from this list: send the line unsubscribe linux-rdma in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
