[PATCH/RFC 2/5] serial: sh-sci: Update DT binding documentation for dedicated RTS/CTS
Some Renesas SCIF UARTs have dedicated lines for RTS/CTS hardware flow control. Whether these lines exist depends on SoC and UART instance inside the SoC. Whether these lines can be used for hardware flow control depends on board wiring. Amend the DT bindings with an optional property to indicate that RTS/CTS hardware flow control lines exist, and can be used as such. Signed-off-by: Geert Uytterhoeven Cc: devicet...@vger.kernel.org --- This has been mimicked after the "fsl,uart-has-rtscts" and "sirf,uart-has-rtscts" properties. However, as this is fairly generic, perhaps it should just be named "uart-has-rtscts" instead? --- Documentation/devicetree/bindings/serial/renesas,sci-serial.txt | 5 + 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt b/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt index f8d7b36742967163..8de177c187536c68 100644 --- a/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt +++ b/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt @@ -79,6 +79,11 @@ Optional properties: - {cts,dsr,dcd,rng,rts,dtr,out1,out2}-gpios: Must contain a GPIO specifier, referring to the GPIO pin to be used as the UART's CTS, DSR, DCD, RNG, RTS, DTR, OUT1, or OUT2 line. + - renesas,uart-has-rtscts: The presence of this property indicates that the +UART has dedicated lines for RTS/CTS hardware flow control, and that +they are available for use (wired and enabled by pinmux configuration). +Note that this property is mutually-exclusive with "cts-gpios" and +"rts-gpios" above. Example: aliases { -- 1.9.1
[PATCH 01/10] iommu/ipmmu-vmsa: Make use of IOMMU_OF_DECLARE()
From: Magnus Damm Hook up IOMMU_OF_DECLARE() support in case CONFIG_IOMMU_DMA is enabled. The only current supported case for 32-bit ARM is disabled, however for 64-bit ARM this is required. Signed-off-by: Magnus Damm --- drivers/iommu/ipmmu-vmsa.c | 31 +++ 1 file changed, 27 insertions(+), 4 deletions(-) --- 0014/drivers/iommu/ipmmu-vmsa.c +++ work/drivers/iommu/ipmmu-vmsa.c 2016-03-18 00:12:22.950513000 +0900 @@ -19,6 +19,7 @@ #include #include #include +#include #include #include #include @@ -1016,18 +1017,22 @@ static struct platform_driver ipmmu_driv static int __init ipmmu_init(void) { - const struct iommu_ops *ops; + static bool setup_done; int ret; + if (setup_done) + return 0; + ret = platform_driver_register(&ipmmu_driver); if (ret < 0) return ret; - ops = IS_ENABLED(CONFIG_IOMMU_DMA) ? &ipmmu_ops_dma : &ipmmu_ops; - +#if defined(CONFIG_ARM) && !defined(CONFIG_IOMMU_DMA) if (!iommu_present(&platform_bus_type)) - bus_set_iommu(&platform_bus_type, ops); + bus_set_iommu(&platform_bus_type, &ipmmu_ops); +#endif + setup_done = true; return 0; } @@ -1039,6 +1044,24 @@ static void __exit ipmmu_exit(void) subsys_initcall(ipmmu_init); module_exit(ipmmu_exit); +#ifdef CONFIG_IOMMU_DMA +static int __init ipmmu_vmsa_iommu_of_setup(struct device_node *np) +{ + static const struct iommu_ops *ops = &ipmmu_ops_dma; + + ipmmu_init(); + + of_iommu_set_ops(np, (struct iommu_ops *)ops); + if (!iommu_present(&platform_bus_type)) + bus_set_iommu(&platform_bus_type, ops); + + return 0; +} + +IOMMU_OF_DECLARE(ipmmu_vmsa_iommu_of, "renesas,ipmmu-vmsa", +ipmmu_vmsa_iommu_of_setup); +#endif + MODULE_DESCRIPTION("IOMMU API for Renesas VMSA-compatible IPMMU"); MODULE_AUTHOR("Laurent Pinchart "); MODULE_LICENSE("GPL v2");
Re: [PATCH] sh_eth: do not call netif_start_queue() from sh_eth_dev_init()
From: Sergei Shtylyov Date: Mon, 14 Mar 2016 01:09:53 +0300 > Iff sh_eth_phy_start() call fails in sh_eth_open(), the netif_start_queue() > call done by sh_eth_dev_init() is not undone. In order to deal with that, > stop calling netif_start_queue() from there, so that it can be called only > when the device is fully opened and sh_eth_dev_init() only deals with the > hardware initialization, symmetrically to sh_eth_dev_exit()... > > Signed-off-by: Sergei Shtylyov Applied.
[PATCH 05/10] iommu/ipmmu-vmsa: Introduce features, break out alias
From: Magnus Damm Introduce struct ipmmu_features to track various hardware and software implementation changes inside the driver for different kinds of IPMMU hardware. Add use_ns_alias_offset as a first example of a feature to control if the secure register bank offset should be used or not. Signed-off-by: Magnus Damm --- drivers/iommu/ipmmu-vmsa.c | 34 -- 1 file changed, 28 insertions(+), 6 deletions(-) --- 0017/drivers/iommu/ipmmu-vmsa.c +++ work/drivers/iommu/ipmmu-vmsa.c 2016-03-18 00:29:15.860513000 +0900 @@ -33,6 +33,10 @@ #define IPMMU_CTX_MAX 4 +struct ipmmu_features { + bool use_ns_alias_offset; +}; + struct ipmmu_vmsa_device { struct device *dev; void __iomem *base; @@ -45,6 +49,7 @@ struct ipmmu_vmsa_device { #if defined(CONFIG_ARM) && !defined(CONFIG_IOMMU_DMA) struct dma_iommu_mapping *mapping; #endif + const struct ipmmu_features *features; }; struct ipmmu_vmsa_domain { @@ -932,13 +937,33 @@ static void ipmmu_device_reset(struct ip ipmmu_write(mmu, i * IM_CTX_SIZE + IMCTR, 0); } +static const struct ipmmu_features ipmmu_features_default = { + .use_ns_alias_offset = true, +}; + +static const struct of_device_id ipmmu_of_ids[] = { + { + .compatible = "renesas,ipmmu-vmsa", + .data = &ipmmu_features_default, + }, { + /* Terminator */ + }, +}; + +MODULE_DEVICE_TABLE(of, ipmmu_of_ids); + static int ipmmu_probe(struct platform_device *pdev) { struct ipmmu_vmsa_device *mmu; + const struct of_device_id *match; struct resource *res; int irq; int ret; + match = of_match_node(ipmmu_of_ids, pdev->dev.of_node); + if (!match) + return -EINVAL; + mmu = devm_kzalloc(&pdev->dev, sizeof(*mmu), GFP_KERNEL); if (!mmu) { dev_err(&pdev->dev, "cannot allocate device data\n"); @@ -948,6 +973,7 @@ static int ipmmu_probe(struct platform_d mmu->dev = &pdev->dev; mmu->num_utlbs = 32; bitmap_zero(mmu->ctx, IPMMU_CTX_MAX); + mmu->features = match->data; dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); /* Map I/O memory and request IRQ. */ @@ -968,7 +994,8 @@ static int ipmmu_probe(struct platform_d * Offset the registers base unconditionally to point to the non-secure * alias space for now. */ - mmu->base += IM_NS_ALIAS_OFFSET; + if (mmu->features->use_ns_alias_offset) + mmu->base += IM_NS_ALIAS_OFFSET; irq = platform_get_irq(pdev, 0); if (irq < 0) { @@ -1015,11 +1042,6 @@ static int ipmmu_remove(struct platform_ return 0; } -static const struct of_device_id ipmmu_of_ids[] = { - { .compatible = "renesas,ipmmu-vmsa", }, - { } -}; - static struct platform_driver ipmmu_driver = { .driver = { .name = "ipmmu-vmsa",
Re: [PATCH 1/2] pinctrl: sh-pfc: enable to indicate GPSR/IPSR/MOD_SEL for debug
Hi Laurent, Geert > > struct pinmux_cfg_reg { > > + const char *name; > > This will increase the kernel size, I would remove the name field when > compiling the kernel in non-debug mode. You could use CONFIG_DYNAMIC_DEBUG or > CONFIG_DEBUG_PINCTRL. OK, [1/2] patch is not a big deal. I'm happy if [2/2] was accepted.
[PATCH/RFC 01/05] arm64: dts: r8a7795: Add IPMMU device nodes
From: Magnus Damm Add r8a7795 IPMMU nodes and keep all disabled by default. Signed-off-by: Magnus Damm --- arch/arm64/boot/dts/renesas/r8a7795.dtsi | 113 ++ 1 file changed, 113 insertions(+) --- 0001/arch/arm64/boot/dts/renesas/r8a7795.dtsi +++ work/arch/arm64/boot/dts/renesas/r8a7795.dtsi 2016-03-17 18:42:51.210513000 +0900 @@ -373,6 +373,119 @@ power-domains = <&cpg>; }; + ipmmu_vi: mmu@febd { + compatible = "renesas,ipmmu-r8a7795"; + reg = <0 0xfebd 0 0x1000>; /* IPMMU-VI */ + renesas,ipmmu-main = <&ipmmu_mm 11>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_vp: mmu@fe99 { + compatible = "renesas,ipmmu-r8a7795"; + reg = <0 0xfe99 0 0x1000>; /* IPMMU-VP */ + renesas,ipmmu-main = <&ipmmu_mm 12>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_vc0: mmu@fe6b { + compatible = "renesas,ipmmu-r8a7795"; + reg = <0 0xfe6b 0 0x1000>; /* IPMMU-VC0 */ + renesas,ipmmu-main = <&ipmmu_mm 9>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_vc1: mmu@fe6f { + compatible = "renesas,ipmmu-r8a7795"; + reg = <0 0xfe6f 0 0x1000>; /* IPMMU-VC1 */ + renesas,ipmmu-main = <&ipmmu_mm 10>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_pv0: mmu@fd80 { + compatible = "renesas,ipmmu-r8a7795"; + reg = <0 0xfd80 0 0x1000>; /* IPMMU-PV0 */ + renesas,ipmmu-main = <&ipmmu_mm 6>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_ir: mmu@ff8b { + compatible = "renesas,ipmmu-r8a7795"; + reg = <0 0xff8b 0 0x1000>; /* IPMMU-IR */ + renesas,ipmmu-main = <&ipmmu_mm 3>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_hc: mmu@e657 { + compatible = "renesas,ipmmu-r8a7795"; + reg = <0 0xe657 0 0x1000>; /* IPMMU-HC */ + renesas,ipmmu-main = <&ipmmu_mm 2>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_rt: mmu@ffc8 { + compatible = "renesas,ipmmu-r8a7795"; + reg = <0 0xffc8 0 0x1000>; /* IPMMU-RT */ + renesas,ipmmu-main = <&ipmmu_mm 7>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_mp0: mmu@ec67 { + compatible = "renesas,ipmmu-r8a7795"; + reg = <0 0xec67 0 0x1000>; /* IPMMU-MP0 */ + renesas,ipmmu-main = <&ipmmu_mm 4>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_mp1: mmu@ec68 { + compatible = "renesas,ipmmu-r8a7795"; + reg = <0 0xec68 0 0x1000>; /* IPMMU-MP1 */ + renesas,ipmmu-main = <&ipmmu_mm 5>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_sy: mmu@e773 { + compatible = "renesas,ipmmu-r8a7795"; + reg = <0 0xe773 0 0x1000>; /* IPMMU-SY */ + renesas,ipmmu-main = <&ipmmu_mm 8>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_ds0: mmu@e674 { + compatible = "renesas,ipmmu-r8a7795"; + reg = <0 0xe674 0 0x1000>; /* IPMMU-DS0 */ + renesas,ipmmu-main = <&ipmmu_mm 0>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_ds1: mmu@e774 { + compatible = "renesas,ipmmu-r8a7795"; + reg = <0 0xe774 0 0x1000>; /* IPMMU-DS1 */ + renesas,ipmmu-main = <&ipmmu_mm 1>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_mm: mmu@e67b { +
[RFC V5 0/4] watchdog: add driver for RWDT watchdog
Geez, who would have thought how much fun you can have with such a tiny driver ;) Here is the new version. Still RFC because of the unknown clock handling, see patch 1. Thanks Geert for the review! Changes since last time: * use runtime_pm. Still always active because of the nowayout feature * use DIV_ROUND_UP to calculate clks_per_sec to make sure we are never too fast * fix binding names to recent conventions * fix Renesas product names * use min() instead of min_t(). Possible now because of previous code refactoring * use ARCH_RENESAS instead of ARCH_SHMOBILE * drop restart_handler since ARM64 uses PSCI firmware resets which do not call restart handlers The last point was quite a bummer to me because plain reboot was the reason I wrote this driver ;) Well, so is life... First I was a bit confused about the system clock running at half speed, never noticed before. I know EXTAL is 16.666 instead of 33.333 but I always thought that would have been taken into account for the system clock. So, if you try this, remember that until we get proper boards with 33.333MHz, the software ping trigger of the 'watchdog' command runs only at half the speed of the hardware. Please comment, test, enjoy... Wolfram Takeshi Kihara (1): arm64: dts: salvator-x: Enable watchdog timer Wolfram Sang (3): WIP: clk: r8a7795: add RWDT clock watchdog: renesas-rwdt: add driver arm64: dts: r8a7795: Add RWDT node .../devicetree/bindings/watchdog/renesas-rwdt.txt | 20 ++ arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 4 + arch/arm64/boot/dts/renesas/r8a7795.dtsi | 8 + drivers/clk/shmobile/r8a7795-cpg-mssr.c| 3 + drivers/watchdog/Kconfig | 8 + drivers/watchdog/Makefile | 1 + drivers/watchdog/renesas_rwdt.c| 213 + 7 files changed, 257 insertions(+) create mode 100644 Documentation/devicetree/bindings/watchdog/renesas-rwdt.txt create mode 100644 drivers/watchdog/renesas_rwdt.c -- 2.7.0
Re: [PATCH] ARM: dts: r8a7793: Add MMCIF0
On Thu, Mar 17, 2016 at 09:29:08AM +0900, Simon Horman wrote: > On Wed, Mar 16, 2016 at 08:20:46PM +0300, Sergei Shtylyov wrote: > > Hello. > > > > On 03/16/2016 08:10 PM, Ulrich Hecht wrote: > > > > >Same as on r8a7794. > > Thanks, I'm pleased to see this. > Its been on my todo list for a while. > > > > > > >Signed-off-by: Ulrich Hecht > > >--- > > > arch/arm/boot/dts/r8a7793.dtsi | 12 > > > 1 file changed, 12 insertions(+) > > > > > >diff --git a/arch/arm/boot/dts/r8a7793.dtsi > > >b/arch/arm/boot/dts/r8a7793.dtsi > > >index 63f811d..33413e8 100644 > > >--- a/arch/arm/boot/dts/r8a7793.dtsi > > >+++ b/arch/arm/boot/dts/r8a7793.dtsi > > >@@ -509,6 +509,18 @@ > > > reg = <0 0xe606 0 0x250>; > > > }; > > > > > >+ mmcif0: mmcif@ee20 { > > >+ compatible = "renesas,mmcif-r8a7793", "renesas,sh-mmcif"; > > >+ reg = <0 0xee20 0 0x80>; > > >+ interrupts = <0 169 IRQ_TYPE_LEVEL_HIGH>; > > >+ clocks = <&mstp3_clks R8A7793_CLK_MMCIF0>; > > >+ dmas = <&dmac0 0xd1>, <&dmac0 0xd2>, > > >+ <&dmac1 0xd1>, <&dmac1 0xd2>; > > >+ dma-names = "tx", "rx"; > > > >4 DMA channels but only 2 channel names? > > Right, it looks like it should be: > > dma-names = "tx", "rx", "tx", "rx"; > > Ulrich, could you verify that and repost? One more thing. I think you also need a power domains property: power-domains = <&cpg_clocks>;
[PATCH 3/4] ARM: dts: r8a7779: Add HSCIF0/1 device nodes
Based on Rev. 1.00 of the R-Car H1 datasheet. Signed-off-by: Ulrich Hecht --- arch/arm/boot/dts/r8a7779.dtsi | 26 ++ 1 file changed, 26 insertions(+) diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi index 14b28c2..71a48c0 100644 --- a/arch/arm/boot/dts/r8a7779.dtsi +++ b/arch/arm/boot/dts/r8a7779.dtsi @@ -285,6 +285,32 @@ status = "disabled"; }; + hscif0: serial@ffe48000 { + compatible = "renesas,hscif-r8a7779", +"renesas,rcar-gen1-hscif", "renesas,hscif"; + reg = <0 0xffe48000 0 96>; + interrupts = ; + clocks = <&mstp0_clks R8A7779_CLK_HSCIF0>, +<&cpg_clocks R8A7779_CLK_S>, +<&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; + power-domains = <&cpg_clocks>; + status = "disabled"; + }; + + hscif1: serial@ffe49000 { + compatible = "renesas,hscif-r8a7779", +"renesas,rcar-gen1-hscif", "renesas,hscif"; + reg = <0 0xffe49000 0 96>; + interrupts = ; + clocks = <&mstp0_clks R8A7779_CLK_HSCIF0>, +<&cpg_clocks R8A7779_CLK_S>, +<&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; + power-domains = <&cpg_clocks>; + status = "disabled"; + }; + pfc: pfc@fffc { compatible = "renesas,pfc-r8a7779"; reg = <0xfffc 0x23c>; -- 2.6.4
[PATCH 02/10] iommu/ipmmu-vmsa: Enable multi context support
From: Magnus Damm Add support for up to 4 contexts. Each context is mapped to one domain. One domain is associated with each device, however one or more uTLBs for a single device are kept in the same domain. Signed-off-by: Magnus Damm --- drivers/iommu/ipmmu-vmsa.c | 11 +-- 1 file changed, 9 insertions(+), 2 deletions(-) --- 0015/drivers/iommu/ipmmu-vmsa.c +++ work/drivers/iommu/ipmmu-vmsa.c 2016-03-18 00:15:49.180513000 +0900 @@ -31,7 +31,7 @@ #include "io-pgtable.h" -#define IPMMU_CTX_MAX 1 +#define IPMMU_CTX_MAX 4 struct ipmmu_vmsa_device { struct device *dev; @@ -536,6 +536,13 @@ static int ipmmu_attach_device(struct io /* The domain hasn't been used yet, initialize it. */ domain->mmu = mmu; ret = ipmmu_domain_init_context(domain); + if (ret < 0) { + dev_err(dev, "Unable to initialize IPMMU context\n"); + domain->mmu = NULL; + } else { + dev_info(dev, "Using IPMMU context %u\n", +domain->context_id); + } } else if (domain->mmu != mmu) { /* * Something is wrong, we can't attach two devices using @@ -915,7 +922,7 @@ static void ipmmu_device_reset(struct ip unsigned int i; /* Disable all contexts. */ - for (i = 0; i < 4; ++i) + for (i = 0; i < IPMMU_CTX_MAX; ++i) ipmmu_write(mmu, i * IM_CTX_SIZE + IMCTR, 0); }
Re: [PATCH] ARM: dts: lager: use generic pinctrl properties
On Wed, Mar 16, 2016 at 09:56:24AM +0100, Geert Uytterhoeven wrote: > On Wed, Mar 16, 2016 at 2:03 AM, Simon Horman > wrote: > > Since 16ccaf5bb5a5 ("pinctrl: sh-pfc: Accept standard function, pins and > > groups properties") renesas pfc drivers accept generic "function", "pins" > > and "groups" properties. > > > > This patch updates the lager device tree to use the generic > > rather than renesas-specific properties. > > > > Signed-off-by: Simon Horman > > Acked-by: Geert Uytterhoeven Thanks, I have queued this up as a cleanup for v4.7.
Re: [PATCH net] ravb: fix result value overwrite
From: Yoshihiro Kaneko Date: Wed, 16 Mar 2016 00:52:16 +0900 > The result value is overwritten by a return value of > ravb_ptp_interrupt(). > > Signed-off-by: Yoshihiro Kaneko Applied.
[PATCH 2/2] ARM: dts: r8a7779: Correct interrupt type for ARM TWD
The ARM TWD interrupt is a private peripheral interrupt (PPI), and per the ARM GIC documentation, whether the type for PPIs can be set is IMPLEMENTATION DEFINED. For R-Car H1 devices the PPI type cannot be set, and so when we attempt to set the type for the ARM TWD interrupt it fails. This has gone unnoticed because it fails silently, and because we cannot re-configure the type it has had no impact. Nevertheless fix the type for the TWD interrupt so that it matches the hardware configuration. Based on patches by Jon Hunter for Tegra20/30 and OMAP4. Signed-off-by: Geert Uytterhoeven --- Exposed by Jon Hunter's "[PATCH 04/15] irqchip/gic: WARN if setting the interrupt type fails": WARNING: CPU: 0 PID: 0 at drivers/irqchip/irq-gic-common.c:61 gic_configure_irq+0x64/0x7c() Modules linked in: CPU: 0 PID: 0 Comm: swapper/0 Not tainted 4.5.0-marzen-00426-g226dd0f378de2fe5-dirty #87 Hardware name: Generic R8A7779 (Flattened Device Tree) [] (unwind_backtrace) from [] (show_stack+0x10/0x14) [] (show_stack) from [] (dump_stack+0xa4/0xdc) [] (dump_stack) from [] (warn_slowpath_common+0x84/0xb0) [] (warn_slowpath_common) from [] (warn_slowpath_null+0x18/0x20) [] (warn_slowpath_null) from [] (gic_configure_irq+0x64/0x7c) [] (gic_configure_irq) from [] (gic_set_type+0x48/0x60) [] (gic_set_type) from [] (__irq_set_trigger+0xac/0x17c) [] (__irq_set_trigger) from [] (__setup_irq+0x344/0x5d8) [] (__setup_irq) from [] (request_percpu_irq+0x98/0xe0) [] (request_percpu_irq) from [] (twd_local_timer_common_register+0x38/0x1ac) [] (twd_local_timer_common_register) from [] (twd_local_timer_of_register+0x48/0x70) [] (twd_local_timer_of_register) from [] (clocksource_probe+0x48/0x88) [] (clocksource_probe) from [] (start_kernel+0x24c/0x3cc) [] (start_kernel) from [<6000807c>] (0x6000807c) --- arch/arm/boot/dts/r8a7779.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi index 540f3c57a7b32356..2581363879d9dfff 100644 --- a/arch/arm/boot/dts/r8a7779.dtsi +++ b/arch/arm/boot/dts/r8a7779.dtsi @@ -71,7 +71,7 @@ compatible = "arm,cortex-a9-twd-timer"; reg = <0xf600 0x20>; interrupts = ; + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>; clocks = <&cpg_clocks R8A7779_CLK_ZS>; }; -- 1.9.1
Re: [PATCH 00/12] ARM, arm64: dts: use generic pinctrl properties
Hi Simon, On Fri, Mar 18, 2016 at 12:59 AM, Simon Horman wrote: > Since 16ccaf5bb5a5 ("pinctrl: sh-pfc: Accept standard function, pins and > groups properties") renesas pfc drivers accept generic "function", "pins" > and "groups" properties. > > This series updates the device trees for the boards of Renesas ARM based > SoCs to use the generic properties. The device tree for the lager board was > already updated in an earlier patch which is present in > renesas-devel-20160318-v4.5. > > Based on renesas-devel-20160318-v4.5 Thanks! For the whole series: Acked-by: Geert Uytterhoeven Doh, now I have to update all my DT overlays, as you cannot mix new-style and old-style properties ;-) Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
[PATCH 1/2] ARM: dts: r8a7794: add IIC clocks
Add IIC clocks to r8a7794 device tree. Based on similar work for the r8a7790 by Wolfram Sang. CC: Wolfram Sang Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7794.dtsi| 9 ++--- include/dt-bindings/clock/r8a7794-clock.h | 2 ++ 2 files changed, 8 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi index e2a4b6bd16a0..755d85715c4a 100644 --- a/arch/arm/boot/dts/r8a7794.dtsi +++ b/arch/arm/boot/dts/r8a7794.dtsi @@ -1150,16 +1150,19 @@ compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>; clocks = <&sd3_clk>, <&sd2_clk>, <&cpg_clocks R8A7794_CLK_SD0>, -<&mmc0_clk>, <&rclk_clk>, <&hp_clk>, <&hp_clk>; +<&mmc0_clk>, <&hp_clk>, <&hp_clk>, <&rclk_clk>, +<&hp_clk>, <&hp_clk>; #clock-cells = <1>; clock-indices = < R8A7794_CLK_SDHI2 R8A7794_CLK_SDHI1 R8A7794_CLK_SDHI0 - R8A7794_CLK_MMCIF0 R8A7794_CLK_CMT1 + R8A7794_CLK_MMCIF0 R8A7794_CLK_IIC0 + R8A7794_CLK_IIC1 R8A7794_CLK_CMT1 R8A7794_CLK_USBDMAC0 R8A7794_CLK_USBDMAC1 >; clock-output-names = "sdhi2", "sdhi1", "sdhi0", - "mmcif0", "cmt1", "usbdmac0", "usbdmac1"; + "mmcif0", "i2c6", "i2c7", + "cmt1", "usbdmac0", "usbdmac1"; }; mstp4_clks: mstp4_clks@e6150140 { compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks"; diff --git a/include/dt-bindings/clock/r8a7794-clock.h b/include/dt-bindings/clock/r8a7794-clock.h index 9703fbdb81c8..4d3ecd626c1f 100644 --- a/include/dt-bindings/clock/r8a7794-clock.h +++ b/include/dt-bindings/clock/r8a7794-clock.h @@ -57,6 +57,8 @@ #define R8A7794_CLK_SDHI1 12 #define R8A7794_CLK_SDHI0 14 #define R8A7794_CLK_MMCIF0 15 +#define R8A7794_CLK_IIC0 18 +#define R8A7794_CLK_IIC1 23 #define R8A7794_CLK_CMT1 29 #define R8A7794_CLK_USBDMAC0 30 #define R8A7794_CLK_USBDMAC1 31 -- 2.1.4
[PATCH 2/2] ARM: dts: gose: Enable SATA controller
Turns on r8a7793 SATA on the Gose board. Signed-off-by: Ulrich Hecht --- arch/arm/boot/dts/r8a7793-gose.dts | 4 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/r8a7793-gose.dts b/arch/arm/boot/dts/r8a7793-gose.dts index 87e89ec..b7e8bd9 100644 --- a/arch/arm/boot/dts/r8a7793-gose.dts +++ b/arch/arm/boot/dts/r8a7793-gose.dts @@ -310,6 +310,10 @@ status = "okay"; }; +&sata0 { + status = "okay"; +}; + &scif0 { pinctrl-0 = <&scif0_pins>; pinctrl-names = "default"; -- 2.6.4
[PATCH 03/12] ARM: dts: bockw: use generic pinctrl properties
Since 16ccaf5bb5a5 ("pinctrl: sh-pfc: Accept standard function, pins and groups properties") renesas pfc drivers accept generic "function", "pins" and "groups" properties. This patch updates the bockw device tree to use the generic properties. Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7778-bockw.dts | 40 ++--- 1 file changed, 20 insertions(+), 20 deletions(-) diff --git a/arch/arm/boot/dts/r8a7778-bockw.dts b/arch/arm/boot/dts/r8a7778-bockw.dts index 21e3b9dda2da..e0dab1464648 100644 --- a/arch/arm/boot/dts/r8a7778-bockw.dts +++ b/arch/arm/boot/dts/r8a7778-bockw.dts @@ -130,53 +130,53 @@ pinctrl-names = "default"; scif0_pins: serial0 { - renesas,groups = "scif0_data_a", "scif0_ctrl"; - renesas,function = "scif0"; + groups = "scif0_data_a", "scif0_ctrl"; + function = "scif0"; }; scif_clk_pins: scif_clk { - renesas,groups = "scif_clk"; - renesas,function = "scif_clk"; + groups = "scif_clk"; + function = "scif_clk"; }; mmc_pins: mmc { - renesas,groups = "mmc_data8", "mmc_ctrl"; - renesas,function = "mmc"; + groups = "mmc_data8", "mmc_ctrl"; + function = "mmc"; }; sdhi0_pins: sd0 { - renesas,groups = "sdhi0_data4", "sdhi0_ctrl"; - renesas,function = "sdhi0"; + groups = "sdhi0_data4", "sdhi0_ctrl"; + function = "sdhi0"; }; sdhi0_pup_pins: sd0_pup { - renesas,groups = "sdhi0_cd", "sdhi0_wp"; - renesas,function = "sdhi0"; + groups = "sdhi0_cd", "sdhi0_wp"; + function = "sdhi0"; bias-pull-up; }; hspi0_pins: hspi0 { - renesas,groups = "hspi0_a"; - renesas,function = "hspi0"; + groups = "hspi0_a"; + function = "hspi0"; }; usb0_pins: usb0 { - renesas,groups = "usb0"; - renesas,function = "usb0"; + groups = "usb0"; + function = "usb0"; }; usb1_pins: usb1 { - renesas,groups = "usb1"; - renesas,function = "usb1"; + groups = "usb1"; + function = "usb1"; }; vin0_pins: vin0 { - renesas,groups = "vin0_data8", "vin0_clk"; - renesas,function = "vin0"; + groups = "vin0_data8", "vin0_clk"; + function = "vin0"; }; vin1_pins: vin1 { - renesas,groups = "vin1_data8", "vin1_clk"; - renesas,function = "vin1"; + groups = "vin1_data8", "vin1_clk"; + function = "vin1"; }; }; -- 2.1.4
[PATCH/RFC 5/5] serial: sh-sci: Replace SCIx_HAVE_RTSCTS by standard UPF_HARD_FLOW
Replace the custom SCIx_HAVE_RTSCTS flag in the plat_sci_port.capabilities field by the standard UPF_HARD_FLOW flag in the uart_port.flags and plat_sci_port.flags fields. Remove the now unused plat_sci_port.capabilities field. Legacy pllatform data can enable UPF_HARD_FLOW in plat_sci_port.flags. Note that currently nothing sets the SCIx_HAVE_RTSCTS flag. Signed-off-by: Geert Uytterhoeven --- drivers/tty/serial/sh-sci.c | 4 ++-- include/linux/serial_sci.h | 6 -- 2 files changed, 2 insertions(+), 8 deletions(-) diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c index 6897100ed5197df3..51b436e2334c3efc 100644 --- a/drivers/tty/serial/sh-sci.c +++ b/drivers/tty/serial/sh-sci.c @@ -720,7 +720,7 @@ static void sci_init_pins(struct uart_port *port, unsigned int cflag) if (!reg->size) return; - if ((s->cfg->capabilities & SCIx_HAVE_RTSCTS) && + if ((port->flags & UPF_HARD_FLOW) && ((!(cflag & CRTSCTS { unsigned short status; @@ -2247,7 +2247,7 @@ done: if (reg->size) { unsigned short ctrl = serial_port_in(port, SCFCR); - if (s->cfg->capabilities & SCIx_HAVE_RTSCTS) { + if (port->flags & UPF_HARD_FLOW) { if (termios->c_cflag & CRTSCTS) ctrl |= SCFCR_MCE; else diff --git a/include/linux/serial_sci.h b/include/linux/serial_sci.h index 9f2bfd0557429ac3..95640ee68462190f 100644 --- a/include/linux/serial_sci.h +++ b/include/linux/serial_sci.h @@ -48,17 +48,11 @@ struct plat_sci_port_ops { }; /* - * Port-specific capabilities - */ -#define SCIx_HAVE_RTSCTS BIT(0) - -/* * Platform device specific platform_data struct */ struct plat_sci_port { unsigned inttype; /* SCI / SCIF / IRDA / HSCIF */ upf_t flags; /* UPF_* flags */ - unsigned long capabilities; /* Port features/capabilities */ unsigned intsampling_rate; unsigned intscscr; /* SCSCR initialization */ -- 1.9.1
[PATCH] ARM: dts: r8a7793: Add MMCIF0
Same as on r8a7794. Signed-off-by: Ulrich Hecht --- arch/arm/boot/dts/r8a7793.dtsi | 12 1 file changed, 12 insertions(+) diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi index 63f811d..33413e8 100644 --- a/arch/arm/boot/dts/r8a7793.dtsi +++ b/arch/arm/boot/dts/r8a7793.dtsi @@ -509,6 +509,18 @@ reg = <0 0xe606 0 0x250>; }; + mmcif0: mmcif@ee20 { + compatible = "renesas,mmcif-r8a7793", "renesas,sh-mmcif"; + reg = <0 0xee20 0 0x80>; + interrupts = <0 169 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp3_clks R8A7793_CLK_MMCIF0>; + dmas = <&dmac0 0xd1>, <&dmac0 0xd2>, + <&dmac1 0xd1>, <&dmac1 0xd2>; + dma-names = "tx", "rx"; + reg-io-width = <4>; + status = "disabled"; + }; + scifa0: serial@e6c4 { compatible = "renesas,scifa-r8a7793", "renesas,rcar-gen2-scifa", "renesas,scifa"; -- 2.6.4
Re: [PATCH] media: add GFP flag to media_*() that could get called in atomic context
Em Wed, 16 Mar 2016 10:28:35 +0200 Sakari Ailus escreveu: > Hi Mauro, > > On Tue, Mar 15, 2016 at 12:55:35PM -0300, Mauro Carvalho Chehab wrote: > > Em Mon, 14 Mar 2016 14:09:09 +0200 > > Sakari Ailus escreveu: > > > > > Hi Mauro, > > > ... > > > Notify callbacks, perhaps not, but the list is still protected by the > > > spinlock. It perhaps is not likely that another process would change it > > > but > > > I don't think we can rely on that. > > > > I can see only 2 risks protected by the lock: > > > > 1) mdev gets freed while an entity is being created. This is a problem > >with the current memory protection schema we're using. I guess the > >only way to fix it is to use kref for > > mdev/entities/interfaces/links/pads. > >This change doesn't make it better or worse. > >Also, I don't think we have such risk with the current devices. > > > > 2) a notifier may be inserted or removed by another driver, while the > >loop is running. > > > > To avoid (2), I see 3 alternatives: > > > > a) keep the loop as proposed on this patch. As the list is navigated using > > list_for_each_entry_safe(), I guess[1] it should be safe to remove/add > > new notify callbacks there while the loop is running by some other process. > > > > list_for_each_entry_safe() does not protect against concurrent access, only > against adding and removing list entries by the same user. List access > serialisation is still needed, whether you use _safe() functions or not. > > > > > [1] It *is* safe if the change were done inside the loop - but I'm not > > 100% sure that it is safe if some other CPU touches the notify list. > > Indeed. > > > > > b) Unlock/relock the spinlock every time: > > > > /* previous code that locks mdev->lock spinlock */ > > > > /* invoke entity_notify callbacks */ > > list_for_each_entry_safe(notify, next, &mdev->entity_notify, list) { > > spin_unlock(&mdev->lock); > > (notify)->notify(entity, notify->notify_data); > > spin_lock(&mdev->lock); > > } > > > > spin_unlock(&mdev->lock); > > > > c) use a separate lock for the notify list -this seems to be an overkill. > > > > d) Protect it with the graph traversal mutex. That sounds the worse idea, > >IMHO, as we'll be abusing the lock. > > I'd simply replace the spinlock with a mutex here. As we want to get rid of > the graph mutex anyway in the long run, let's not mix the two as they're > well separated now. As long as the mutex users do not sleep (i.e. the > notify() callback) the mutex is about as fast to use as the spinlock. It could work. I added such patch on an experimental branch, where I'm addressing a few troubles with au0828 unbind logic: https://git.linuxtv.org/mchehab/experimental.git/log/?h=au0828-unbind-fixes The patch itself is at: https://git.linuxtv.org/mchehab/experimental.git/commit/?h=au0828-unbind-fixes&id=dba4d41bdfa6bb8dc51cb0f692102919b2b7c8b4 At least for au0828, it seems to work fine. Regards, Mauro
[PATCH 02/12] ARM: dts: armadillo800eva: use generic pinctrl properties
Since 16ccaf5bb5a5 ("pinctrl: sh-pfc: Accept standard function, pins and groups properties") renesas pfc drivers accept generic "function", "pins" and "groups" properties. This patch updates the armadillo800eva device tree to use the generic properties. Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7740-armadillo800eva.dts | 34 +-- 1 file changed, 17 insertions(+), 17 deletions(-) diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva.dts index c548cabb102f..2c82dab2b6f4 100644 --- a/arch/arm/boot/dts/r8a7740-armadillo800eva.dts +++ b/arch/arm/boot/dts/r8a7740-armadillo800eva.dts @@ -228,44 +228,44 @@ pinctrl-names = "default"; ether_pins: ether { - renesas,groups = "gether_mii", "gether_int"; - renesas,function = "gether"; + groups = "gether_mii", "gether_int"; + function = "gether"; }; scifa1_pins: serial1 { - renesas,groups = "scifa1_data"; - renesas,function = "scifa1"; + groups = "scifa1_data"; + function = "scifa1"; }; st1232_pins: touchscreen { - renesas,groups = "intc_irq10"; - renesas,function = "intc"; + groups = "intc_irq10"; + function = "intc"; }; backlight_pins: backlight { - renesas,groups = "tpu0_to2_1"; - renesas,function = "tpu0"; + groups = "tpu0_to2_1"; + function = "tpu0"; }; mmc0_pins: mmc0 { - renesas,groups = "mmc0_data8_1", "mmc0_ctrl_1"; - renesas,function = "mmc0"; + groups = "mmc0_data8_1", "mmc0_ctrl_1"; + function = "mmc0"; }; sdhi0_pins: sd0 { - renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_wp"; - renesas,function = "sdhi0"; + groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_wp"; + function = "sdhi0"; }; fsia_pins: sounda { - renesas,groups = "fsia_sclk_in", "fsia_mclk_out", -"fsia_data_in_1", "fsia_data_out_0"; - renesas,function = "fsia"; + groups = "fsia_sclk_in", "fsia_mclk_out", +"fsia_data_in_1", "fsia_data_out_0"; + function = "fsia"; }; lcd0_pins: lcd0 { - renesas,groups = "lcd0_data24_0", "lcd0_lclk_1", "lcd0_sync"; - renesas,function = "lcd0"; + groups = "lcd0_data24_0", "lcd0_lclk_1", "lcd0_sync"; + function = "lcd0"; /* DBGMD/LCDC0/FSIA MUX */ gpio-hog; -- 2.1.4
Re: [PATCH/RFC 1/5] serial: sh-sci: Update DT binding documentation for GPIO modem lines
Hi Simon, On Thu, Mar 17, 2016 at 11:43 PM, Simon Horman wrote: > On Thu, Mar 17, 2016 at 02:47:25PM +0100, Geert Uytterhoeven wrote: >> Amend the DT bindings for the Renesas SCI driver to allow describing >> optional GPIO-controlled modem lines, which can be used where dedicated >> modem lines are not available. >> >> The property naming is dictated by the SERIAL_MCTRL_GPIO helpers. >> >> Signed-off-by: Geert Uytterhoeven >> Cc: devicet...@vger.kernel.org >> --- >> Documentation/devicetree/bindings/serial/renesas,sci-serial.txt | 3 +++ >> 1 file changed, 3 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt >> b/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt >> index 528c3b90f23cb04b..f8d7b36742967163 100644 >> --- a/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt >> +++ b/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt >> @@ -76,6 +76,9 @@ Optional properties: >>- dmas: Must contain a list of two references to DMA specifiers, one for >> transmission, and one for reception. >>- dma-names: Must contain a list of two DMA names, "tx" and "rx". >> + - {cts,dsr,dcd,rng,rts,dtr,out1,out2}-gpios: Must contain a GPIO >> specifier, >> +referring to the GPIO pin to be used as the UART's CTS, DSR, DCD, RNG, >> RTS, >> +DTR, OUT1, or OUT2 line. >> >> Example: >> aliases { > > Hi Geert, > > I do not feel strongly about this but I wonder if it > would make sense to update the example with the new properties. These are meant to be added to the board .dts file, not to the .dtsi files. I can add an example if you like, let's hope nobody copies it blindly to a .dtsi file... Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
Re: [PATCH] [media] media: rename media unregister function
Hello Mauro, On 03/18/2016 10:05 AM, Mauro Carvalho Chehab wrote: > Now that media_device_unregister() also does a cleanup, rename it > to media_device_unregister_cleanup(). > I believe there should be a Suggested-by Sakari Ailus tag here. > Signed-off-by: Mauro Carvalho Chehab The patch looks good and I agree that makes things more clear. Reviewed-by: Javier Martinez Canillas Best regards, -- Javier Martinez Canillas Open Source Group Samsung Research America