Re: [PATCH] MAINTAINERS: gpio: add DT bindings directory
On Tue, Apr 12, 2016 at 5:57 PM, Wolfram Sang wrote: > From: Wolfram Sang > > Helps get_maintainer.pl to find the right people. > > Signed-off-by: Wolfram Sang OK patch applied. Maybe we should move the ACPI specs into the kernel as well as that stuff is taking my time as well now, apart from DT :/ Yours, Linus Walleij
Re: [PATCH] MAINTAINERS: gpio: add DT bindings directory
Hi Linus,
On Wed, Apr 13, 2016 at 9:23 AM, Linus Walleij wrote:
> On Tue, Apr 12, 2016 at 5:57 PM, Wolfram Sang wrote:
>
>> From: Wolfram Sang
>>
>> Helps get_maintainer.pl to find the right people.
>>
>> Signed-off-by: Wolfram Sang
>
> OK patch applied.
>
> Maybe we should move the ACPI specs into the kernel
> as well as that stuff is taking my time as well now, apart
> from DT :/
Wasn't the plan to move the DT bindings out of the kernel tree instead?
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
[git pull] pinctrl: sh-pfc: Updates for v4.7
Hi Linus,
The following changes since commit f55532a0c0b8bb6148f4e07853b876ef73bc69ca:
Linux 4.6-rc1 (2016-03-26 16:03:24 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git
sh-pfc-for-v4.7
for you to fetch changes up to 92e6d9a2cc827018a18885e0f3050ab9ff8c3206:
pinctrl: sh-pfc: r8a7795: Add drive strength support (2016-03-29 09:23:01
+0200)
Summary:
- Voltage switching support for SDHI on R-Car H2,
- Drive strength support on R-Car H3,
- Correct register write ordering.
Thanks for pulling!
Kuninori Morimoto (1):
pinctrl: sh-pfc: IPSRx and MOD_SELx should be set before GPSRx
Laurent Pinchart (2):
pinctrl: sh-pfc: Add drive strength support
pinctrl: sh-pfc: r8a7795: Add drive strength support
Wolfram Sang (1):
pinctrl: sh-pfc: r8a7790: Implement voltage switching for SDHI
.../bindings/pinctrl/renesas,pfc-pinctrl.txt | 4 +-
drivers/pinctrl/sh-pfc/core.c | 15 ++
drivers/pinctrl/sh-pfc/core.h | 3 +
drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 54 -
drivers/pinctrl/sh-pfc/pfc-r8a7795.c | 218 -
drivers/pinctrl/sh-pfc/pinctrl.c | 111 +++
drivers/pinctrl/sh-pfc/sh_pfc.h| 19 +-
7 files changed, 412 insertions(+), 12 deletions(-)
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
[git pull] clk: renesas: Updates for v4.7
Hi Mike, Stephen,
The following changes since commit f55532a0c0b8bb6148f4e07853b876ef73bc69ca:
Linux 4.6-rc1 (2016-03-26 16:03:24 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git
clk-renesas-for-v4.7
for you to fetch changes up to 12a56817b329d8a73ab53bad09aa976aeea46db9:
clk: renesas: mstp: Clarify cpg_mstp_{at,de}tach_dev() domain parameter
(2016-04-07 17:27:13 +0200)
Summary:
- Support for the PWM module clock and watchdog related clocks on R-Car H3,
- Cleanups and clarifications.
Thanks for pulling!
Geert Uytterhoeven (3):
clk: renesas: mstp: Drop check for CONFIG_PM_GENERIC_DOMAINS_OF
clk: renesas: cpg-mssr: Drop check for CONFIG_PM_GENERIC_DOMAINS_OF
clk: renesas: mstp: Clarify cpg_mstp_{at,de}tach_dev() domain parameter
Ulrich Hecht (1):
clk: renesas: r8a7795: add PWM clock
Wolfram Sang (5):
clk: renesas: r8a7795: make SD clk definition specific for GEN3
clk: renesas: cpg-mssr: add generic support for read-only DIV6 clocks
clk: renesas: r8a7795: add OSC and RINT clocks
clk: renesas: r8a7795: add R clk
clk: renesas: r8a7795: add RWDT clock
drivers/clk/renesas/clk-mstp.c | 7 ++-
drivers/clk/renesas/r8a7795-cpg-mssr.c | 34 ++
drivers/clk/renesas/renesas-cpg-mssr.c | 29 -
drivers/clk/renesas/renesas-cpg-mssr.h | 6 +++---
include/linux/clk/renesas.h| 8 ++--
5 files changed, 49 insertions(+), 35 deletions(-)
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Re: [PATCH v5 3/9] dma-mapping: add dma_{map,unmap}_resource
Hi Christoph, On 2016-03-21 08:26:01 -0700, Christoph Hellwig wrote: > On Thu, Mar 17, 2016 at 01:33:51PM +0200, Laurent Pinchart wrote: > > The good news is that, given that no code uses this new API at the moment, > > there isn't much to audit. The patch series implements the resource mapping > > for arch/arm only, and makes use of it in the rcar-dmac driver only. Would > > you > > like anything audited else than the arch/arm dma mapping implementation, > > the > > rcar-dmac driver and the code that then deals with the dma addresses (I'm > > thinking about the IOMMU subsystem and the ipmmu-vmsa driver in particular) > > ? > > Yes, it would be good to do an audit of all the ARM dma_ops as well > as generic code like drivers/base/dma-*.c, lib/dma-debug.c and > include/linux/dma-*.h I have now done an audit to the best of my abilities, thanks to Laurent for pointing me in the right direction. And from what I can tell we are good. * drivers/dma/sh/rcar-dmac.c Once the phys_addr_t is mapped to a dma_addr_t using dma_map_resource() it is only used to check that the transfere do not cross 4GB boundaries and then only directly written to HW registers. * drivers/iommu/iommu.c - iommu_map() Check that it's align to min page size or return -EINVAL then calls domain->ops->map() * drivers/iommu/ipmmu-vmsa.c - ipmmu_map() No logic only calls domain->ops->map() * drivers/iommu/io-pgtable-arm.c - arm_lpae_map() No logic only calls __arm_lpae_map() - __arm_lpae_map() No logic only calls arm_lpae_init_pte() - arm_lpae_init_pte() Used to get a pte: pte |= pfn_to_iopte(paddr >> data->pg_shift, data); * drivers/iommu/io-pgtable-arm-v7s.c - arm_v7s_map() No logic only calls __arm_v7s_map() - __arm_v7s_map() No logic only calls arm_v7s_init_pte() - arm_v7s_init_pte Used to get a pte: pte |= paddr & ARM_V7S_LVL_MASK(lvl); * ARM dma-mapping - dma_unmap_* Only valid unmap is dma_unmap_resource() all others are an invalid use case. - dma_sync_single_* Invalid use case, memmory that is mapped is device memmory - dma_common_mmap() and dma_mmap_attrs() Invalid use case - dma_common_get_sgtable() and dma_get_sgtable_attrs() Invalid use case, only for dma_alloc_* allocated memory, - dma_mapping_error() OK -- Regards, Niklas Söderlund
[PATCH v5 4/7] soc: renesas: Add r8a7791 SYSC PM Domain Binding Definitions
Signed-off-by: Geert Uytterhoeven Reviewed-by: Laurent Pinchart --- v5: - No changes, v4: - Add Reviewed-by, - Rename R8A7791_PD_SH to R8A7791_PD_SH_4A, - Add always-on power area, v3: - New. --- include/dt-bindings/power/r8a7791-sysc.h | 26 ++ 1 file changed, 26 insertions(+) create mode 100644 include/dt-bindings/power/r8a7791-sysc.h diff --git a/include/dt-bindings/power/r8a7791-sysc.h b/include/dt-bindings/power/r8a7791-sysc.h new file mode 100644 index ..1403baa0514fb0fc --- /dev/null +++ b/include/dt-bindings/power/r8a7791-sysc.h @@ -0,0 +1,26 @@ +/* + * Copyright (C) 2016 Glider bvba + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + */ +#ifndef __DT_BINDINGS_POWER_R8A7791_SYSC_H__ +#define __DT_BINDINGS_POWER_R8A7791_SYSC_H__ + +/* + * These power domain indices match the numbers of the interrupt bits + * representing the power areas in the various Interrupt Registers + * (e.g. SYSCISR, Interrupt Status Register) + */ + +#define R8A7791_PD_CA15_CPU00 +#define R8A7791_PD_CA15_CPU11 +#define R8A7791_PD_CA15_SCU12 +#define R8A7791_PD_SH_4A 16 +#define R8A7791_PD_SGX 20 + +/* Always-on power area */ +#define R8A7791_PD_ALWAYS_ON 32 + +#endif /* __DT_BINDINGS_POWER_R8A7791_SYSC_H__ */ -- 1.9.1
[PATCH v5 04/12] ARM: dts: r8a7793: Add SYSC PM Domains
Add a device node for the System Controller.
Hook up the first Cortex-A15 CPU core and the Cortex-A15 L2 cache/SCU to
their respective PM Domains.
Signed-off-by: Geert Uytterhoeven
---
v5:
- Remove "power-domains" property again from the sysc node, as the
System Controller itself is not part of the Clock Domain,
v4:
- Add "power-domains" property to the sysc node, to refer to the SoC's
Clock Domain,
v3:
- Drop power area hiearchy from DT,
- Switch to "#power-domain-cells = <1>",
- Drop fallback compatibility strings,
v2:
- Change one-line summary prefix to match current arm-soc practices,
- Update compatible values.
---
arch/arm/boot/dts/r8a7793.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
index bf70c464920bc687..c8c32b7423f6c8bb 100644
--- a/arch/arm/boot/dts/r8a7793.dtsi
+++ b/arch/arm/boot/dts/r8a7793.dtsi
@@ -11,6 +11,7 @@
#include
#include
#include
+#include
/ {
compatible = "renesas,r8a7793";
@@ -43,6 +44,7 @@
voltage-tolerance = <1>; /* 1% */
clocks = <&cpg_clocks R8A7793_CLK_Z>;
clock-latency = <30>; /* 300 us */
+ power-domains = <&sysc R8A7793_PD_CA15_CPU0>;
/* kHz - uV - OPPs unknown yet */
operating-points = <150 100>,
@@ -76,6 +78,7 @@
L2_CA15: cache-controller@0 {
compatible = "cache";
+ power-domains = <&sysc R8A7793_PD_CA15_SCU>;
cache-unified;
cache-level = <2>;
};
@@ -1212,6 +1215,12 @@
};
};
+ sysc: system-controller@e618 {
+ compatible = "renesas,r8a7793-sysc";
+ reg = <0 0xe618 0 0x0200>;
+ #power-domain-cells = <1>;
+ };
+
ipmmu_sy0: mmu@e628 {
compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
reg = <0 0xe628 0 0x1000>;
--
1.9.1
[PATCH v2 2/3] clk: renesas: mstp: Provide dummy attach/detach_dev callbacks
Provide dummy cpg_mstp_{at,de}tach_dev() PM Domain callbacks if CPG/MSTP
support is not included, so the rcar-sysc driver won't have to care
about this.
Signed-off-by: Geert Uytterhoeven
---
v2:
- New.
---
include/linux/clk/renesas.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/include/linux/clk/renesas.h b/include/linux/clk/renesas.h
index 095b1681daf46faf..ab57a298a3740c5c 100644
--- a/include/linux/clk/renesas.h
+++ b/include/linux/clk/renesas.h
@@ -25,7 +25,12 @@ void r8a7779_clocks_init(u32 mode);
void rcar_gen2_clocks_init(u32 mode);
void cpg_mstp_add_clk_domain(struct device_node *np);
+#ifdef CONFIG_CLK_RENESAS_CPG_MSTP
int cpg_mstp_attach_dev(struct generic_pm_domain *unused, struct device *dev);
void cpg_mstp_detach_dev(struct generic_pm_domain *unused, struct device *dev);
+#else
+#define cpg_mstp_attach_devNULL
+#define cpg_mstp_detach_devNULL
+#endif
#endif
--
1.9.1
[PATCH v5 10/11] soc: renesas: rcar-sysc: Add support for R-Car E2 power areas
Signed-off-by: Geert Uytterhoeven
Reviewed-by: Laurent Pinchart
---
v5:
- Add Reviewed-by,
- Add "always-on" power area,
v4:
- Rename R8A7794_PD_SH to R8A7794_PD_SH_4A, "sh" to "sh-4a",
- Reformat table,
v3:
- New (converted from DT to C).
---
drivers/soc/renesas/Makefile | 2 +-
drivers/soc/renesas/r8a7794-sysc.c | 33 +
drivers/soc/renesas/rcar-sysc.c| 3 +++
drivers/soc/renesas/rcar-sysc.h| 1 +
4 files changed, 38 insertions(+), 1 deletion(-)
create mode 100644 drivers/soc/renesas/r8a7794-sysc.c
diff --git a/drivers/soc/renesas/Makefile b/drivers/soc/renesas/Makefile
index c6c4ce7ef8a145ea..b328205fef36441a 100644
--- a/drivers/soc/renesas/Makefile
+++ b/drivers/soc/renesas/Makefile
@@ -3,4 +3,4 @@ obj-$(CONFIG_ARCH_R8A7790) += rcar-sysc.o r8a7790-sysc.o
obj-$(CONFIG_ARCH_R8A7791) += rcar-sysc.o r8a7791-sysc.o
# R-Car M2-N is identical to R-Car M2-W w.r.t. power domains.
obj-$(CONFIG_ARCH_R8A7793) += rcar-sysc.o r8a7791-sysc.o
-obj-$(CONFIG_ARCH_R8A7794) += rcar-sysc.o
+obj-$(CONFIG_ARCH_R8A7794) += rcar-sysc.o r8a7794-sysc.o
diff --git a/drivers/soc/renesas/r8a7794-sysc.c
b/drivers/soc/renesas/r8a7794-sysc.c
new file mode 100644
index ..c4da2941e06c9468
--- /dev/null
+++ b/drivers/soc/renesas/r8a7794-sysc.c
@@ -0,0 +1,33 @@
+/*
+ * Renesas R-Car E2 System Controller
+ *
+ * Copyright (C) 2016 Glider bvba
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ */
+
+#include
+#include
+
+#include
+
+#include "rcar-sysc.h"
+
+static const struct rcar_sysc_area r8a7794_areas[] __initconst = {
+ { "always-on", 0, 0, R8A7794_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
+ { "ca7-scu",0x100, 0, R8A7794_PD_CA7_SCU, R8A7794_PD_ALWAYS_ON,
+ PD_SCU },
+ { "ca7-cpu0", 0x1c0, 0, R8A7794_PD_CA7_CPU0, R8A7794_PD_CA7_SCU,
+ PD_CPU_NOCR },
+ { "ca7-cpu1", 0x1c0, 1, R8A7794_PD_CA7_CPU1, R8A7794_PD_CA7_SCU,
+ PD_CPU_NOCR },
+ { "sh-4a", 0x80, 0, R8A7794_PD_SH_4A, R8A7794_PD_ALWAYS_ON },
+ { "sgx", 0xc0, 0, R8A7794_PD_SGX, R8A7794_PD_ALWAYS_ON },
+};
+
+const struct rcar_sysc_info r8a7794_sysc_info __initconst = {
+ .areas = r8a7794_areas,
+ .num_areas = ARRAY_SIZE(r8a7794_areas),
+};
diff --git a/drivers/soc/renesas/rcar-sysc.c b/drivers/soc/renesas/rcar-sysc.c
index d472d8b3fa591675..99d2349b23cb923d 100644
--- a/drivers/soc/renesas/rcar-sysc.c
+++ b/drivers/soc/renesas/rcar-sysc.c
@@ -301,6 +301,9 @@ static const struct of_device_id rcar_sysc_matches[] = {
/* R-Car M2-N is identical to R-Car M2-W w.r.t. power domains. */
{ .compatible = "renesas,r8a7793-sysc", .data = &r8a7791_sysc_info },
#endif
+#ifdef CONFIG_ARCH_R8A7794
+ { .compatible = "renesas,r8a7794-sysc", .data = &r8a7794_sysc_info },
+#endif
{ /* sentinel */ }
};
diff --git a/drivers/soc/renesas/rcar-sysc.h b/drivers/soc/renesas/rcar-sysc.h
index d58b39400e790a46..d64258cfaa20ba3f 100644
--- a/drivers/soc/renesas/rcar-sysc.h
+++ b/drivers/soc/renesas/rcar-sysc.h
@@ -53,4 +53,5 @@ struct rcar_sysc_info {
extern const struct rcar_sysc_info r8a7779_sysc_info;
extern const struct rcar_sysc_info r8a7790_sysc_info;
extern const struct rcar_sysc_info r8a7791_sysc_info;
+extern const struct rcar_sysc_info r8a7794_sysc_info;
#endif /* __SOC_RENESAS_RCAR_SYSC_H__ */
--
1.9.1
[PATCH v2 0/4] clk: renesas: R-Car SYSC PM Domain Preparation
Hi Mike, Stephen, Simon, Magnus,
This patch series prepares the Renesas CPG/MSSR and CPG/MSTP drivers for
the advent of R-Car SYSC PM Domains.
Support for the latter will be introduced in 3 patch series:
1. "[PATCH v5 0/7] PM / Domains: Add DT bindings for the R-Car System
Controller",
2. "[PATCH v5 00/11] soc: renesas: Add R-Car SYSC PM Domain Support",
3. "[PATCH v5 00/12] ARM/arm64: dts: rcar: Add SYSC PM domains".
This patch series is against the pull request I've sent earlier today
("[git pull] clk: renesas: Updates for v4.7").
Changes compared to v1:
- Drop cleanups that are already included in the pull request,
- Provide Kconfig symbols for CPG/MSSR and CPG/MSTP support,
- Provide dummy attach/detach_dev callbacks, so the rcar-sysc driver
won't have to care about support being included or not.
As this series is a hard dependency for the second R-Car SYSC series, I
think it's best that I just queue this series in my clk-renesas-for-v4.7
branch, and ask both Mike/Stephen and Simon to pull from it.
Would that be OK for you?
Thanks!
Geert Uytterhoeven (3):
clk: renesas: Provide Kconfig symbols for CPG/MSSR and CPG/MSTP
support
clk: renesas: mstp: Provide dummy attach/detach_dev callbacks
clk: renesas: cpg-mssr: Export cpg_mssr_{at,de}tach_dev()
drivers/clk/Kconfig| 1 +
drivers/clk/renesas/Kconfig| 16
drivers/clk/renesas/Makefile | 26 ++
drivers/clk/renesas/renesas-cpg-mssr.c | 18 --
include/linux/clk/renesas.h| 12
5 files changed, 55 insertions(+), 18 deletions(-)
create mode 100644 drivers/clk/renesas/Kconfig
--
1.9.1
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
[PATCH v5 6/7] soc: renesas: Add r8a7794 SYSC PM Domain Binding Definitions
Signed-off-by: Geert Uytterhoeven Reviewed-by: Laurent Pinchart --- v5: - No changes, v4: - Add Reviewed-by, - Rename R8A7794_PD_SH to R8A7794_PD_SH_4A, - Add always-on power area, v3: - New. --- include/dt-bindings/power/r8a7794-sysc.h | 26 ++ 1 file changed, 26 insertions(+) create mode 100644 include/dt-bindings/power/r8a7794-sysc.h diff --git a/include/dt-bindings/power/r8a7794-sysc.h b/include/dt-bindings/power/r8a7794-sysc.h new file mode 100644 index ..862241c2d27b2fa3 --- /dev/null +++ b/include/dt-bindings/power/r8a7794-sysc.h @@ -0,0 +1,26 @@ +/* + * Copyright (C) 2016 Glider bvba + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + */ +#ifndef __DT_BINDINGS_POWER_R8A7794_SYSC_H__ +#define __DT_BINDINGS_POWER_R8A7794_SYSC_H__ + +/* + * These power domain indices match the numbers of the interrupt bits + * representing the power areas in the various Interrupt Registers + * (e.g. SYSCISR, Interrupt Status Register) + */ + +#define R8A7794_PD_CA7_CPU0 5 +#define R8A7794_PD_CA7_CPU1 6 +#define R8A7794_PD_SH_4A 16 +#define R8A7794_PD_SGX 20 +#define R8A7794_PD_CA7_SCU 21 + +/* Always-on power area */ +#define R8A7794_PD_ALWAYS_ON 32 + +#endif /* __DT_BINDINGS_POWER_R8A7794_SYSC_H__ */ -- 1.9.1
[PATCH v5 04/11] soc: renesas: rcar-sysc: Make rcar_sysc_power_is_off() static
As of commit b12ff41658171f53 ("ARM: shmobile: r8a7779: Remove legacy PM
Domain remainings"), rcar_sysc_power_is_off() is no longer used from
SoC-specific code.
Signed-off-by: Geert Uytterhoeven
Reviewed-by: Laurent Pinchart
---
v5:
- No changes,
v4:
- Add Reviewed-by,
v3:
- New.
---
drivers/soc/renesas/rcar-sysc.c | 2 +-
include/linux/soc/renesas/rcar-sysc.h | 1 -
2 files changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/soc/renesas/rcar-sysc.c b/drivers/soc/renesas/rcar-sysc.c
index 674a46ce46aac04d..a333ef4152428440 100644
--- a/drivers/soc/renesas/rcar-sysc.c
+++ b/drivers/soc/renesas/rcar-sysc.c
@@ -152,7 +152,7 @@ int rcar_sysc_power_up(const struct rcar_sysc_ch *sysc_ch)
return rcar_sysc_power(sysc_ch, true);
}
-bool rcar_sysc_power_is_off(const struct rcar_sysc_ch *sysc_ch)
+static bool rcar_sysc_power_is_off(const struct rcar_sysc_ch *sysc_ch)
{
unsigned int st;
diff --git a/include/linux/soc/renesas/rcar-sysc.h
b/include/linux/soc/renesas/rcar-sysc.h
index 96f30c2883881d97..92fc613ab23db091 100644
--- a/include/linux/soc/renesas/rcar-sysc.h
+++ b/include/linux/soc/renesas/rcar-sysc.h
@@ -11,7 +11,6 @@ struct rcar_sysc_ch {
int rcar_sysc_power_down(const struct rcar_sysc_ch *sysc_ch);
int rcar_sysc_power_up(const struct rcar_sysc_ch *sysc_ch);
-bool rcar_sysc_power_is_off(const struct rcar_sysc_ch *sysc_ch);
void __iomem *rcar_sysc_init(phys_addr_t base);
#endif /* __LINUX_SOC_RENESAS_RCAR_SYSC_H__ */
--
1.9.1
[PATCH v5 00/12] ARM/arm64: dts: rcar: Add SYSC PM domains
Hi Simon, Magnus,
This patch series adds the R-Car System Controller to the DTS files for
the various Renesas R-Car SoCs, and hooks up devices to their respective
PM domains.
This is a dependency for the enablement of DU and VSP on R-Car H3, as
on this SoC the VSPs are located in a PM Domain.
This series contains 2 parts:
1. Patches 1-6 add device node for the System Controllers, and hook
up CPU cores and L2 caches/SCUs to their respective PM Domains,
2. Patches 7-12 hook up devices to the SYSC "always-on" PM Domain, for
a more consistent device-power-area description in DT.
As "[PATCH v5 00/11] soc: renesas: Add R-Car SYSC PM Domain Support"
merged the two initialization phases again, the issues in v4 caused by
excessive deferred probing are gone, and both parts are now safe to
apply.
Changes compared to v4:
- Add Acked-by,
- Remove "power-domains" property again from the sysc nodes, as the
System Controller theirselves are not part of the Clock Domains.
Changes compared to v3:
- Add power-domains properties to the sysc nodes, to refer to the
SoC's Clock Domains,
- Extract using the SYSC "always-on" PM Domain on R-Car H3 into its
own patch,
- Add patches to use the SYSC "always-on" PM Domain on R-Car H1 and
R-Car Gen2,
- Update for recently added can0, can1, pciec0, and pciec1 device
nodes on R-Car H3.
Changes compared to v2:
- Move power area hierarchy from DT to C (cfr. DT bindings for Renesas
CPG/MSSR), and switch to "#power-domain-cells = <1>",
- Drop fallback compatibility strings, as the bindings are
SoC-specific,
- Add an "always-on" power area on R-Car H3.
Changes compared to v1:
- Add R-Car H3 (r8a7795) support,
- Use "renesas,-sysc" instead of "renesas,sysc-",
- Add fallback compatibility strings for R-Car Gen2 and Gen3.
Dependencies:
- renesas-devel-20160411-v4.6-rc3
- clk-renesas-for-v4.7
- "[PATCH v2 0/4] clk: renesas: R-Car SYSC PM Domain Preparation",
- "[PATCH v5 0/7] PM / Domains: Add DT bindings for the R-Car System
Controller",
- "[PATCH v5 00/11] soc: renesas: Add R-Car SYSC PM Domain Support".
Note that these are hard dependencies: adding SYSC PM Domains to DTS
files without driver support will cause breakage!
For your convenience, I've pushed this, incl. all dependencies, to the
topic/rcar-sysc-pd-v5 branch of
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git.
Integration with renesas-drivers-2016-04-12-v4.6-rc3 is available in the
topic/gen3-latest branch.
This has been tested on r8a7779/marzen, r8a7790/lager, r8a7791/koelsch,
r8a7794/alt, and r8a7795/salvator-x.
Thanks for applying!
Geert Uytterhoeven (12):
ARM: dts: r8a7779: Add SYSC PM Domains
ARM: dts: r8a7790: Add SYSC PM Domains
ARM: dts: r8a7791: Add SYSC PM Domains
ARM: dts: r8a7793: Add SYSC PM Domains
ARM: dts: r8a7794: Add SYSC PM Domains
arm64: dts: r8a7795: Add SYSC PM Domains
ARM: dts: r8a7779: Use SYSC "always-on" PM Domain
ARM: dts: r8a7790: Use SYSC "always-on" PM Domain
ARM: dts: r8a7791: Use SYSC "always-on" PM Domain
ARM: dts: r8a7793: Use SYSC "always-on" PM Domain
ARM: dts: r8a7794: Use SYSC "always-on" PM Domain
arm64: dts: r8a7795: Use SYSC "always-on" PM Domain
arch/arm/boot/dts/r8a7779.dtsi | 54 ++-
arch/arm/boot/dts/r8a7790.dtsi | 155 --
arch/arm/boot/dts/r8a7791.dtsi | 156 ---
arch/arm/boot/dts/r8a7793.dtsi | 105 +++--
arch/arm/boot/dts/r8a7794.dtsi | 116 ---
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 123 +---
6 files changed, 389 insertions(+), 320 deletions(-)
--
1.9.1
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
[PATCH v5 06/12] arm64: dts: r8a7795: Add SYSC PM Domains
Add a device node for the System Controller.
Hook up the Cortex-A57 CPU cores and the Cortex-A57 and Cortex A53 L2
caches/SCUs to their respective PM Domains.
Signed-off-by: Geert Uytterhoeven
---
v5:
- Remove "power-domains" property again from the sysc node, as the
System Controller itself is not part of the Clock Domain,
v4:
- Add "power-domains" property to the sysc node, to refer to the SoC's
Clock Domain,
- Extract using "<&sysc R8A7795_PD_ALWAYS_ON>" for devices in the
always-on power area into a separate patch,
v3:
- Drop power area hiearchy from DT,
- Switch to "#power-domain-cells = <1>",
- Use "<&sysc R8A7795_PD_ALWAYS_ON>" for devices in the always-on
power area,
- Drop fallback compatibility strings,
v2:
- New.
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index 11f9971a85433b7f..9c7424fc171fb876 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -10,6 +10,7 @@
#include
#include
+#include
/ {
compatible = "renesas,r8a7795";
@@ -39,6 +40,7 @@
compatible = "arm,cortex-a57", "arm,armv8";
reg = <0x0>;
device_type = "cpu";
+ power-domains = <&sysc R8A7795_PD_CA57_CPU0>;
next-level-cache = <&L2_CA57>;
enable-method = "psci";
};
@@ -47,6 +49,7 @@
compatible = "arm,cortex-a57","arm,armv8";
reg = <0x1>;
device_type = "cpu";
+ power-domains = <&sysc R8A7795_PD_CA57_CPU1>;
next-level-cache = <&L2_CA57>;
enable-method = "psci";
};
@@ -54,6 +57,7 @@
compatible = "arm,cortex-a57","arm,armv8";
reg = <0x2>;
device_type = "cpu";
+ power-domains = <&sysc R8A7795_PD_CA57_CPU2>;
next-level-cache = <&L2_CA57>;
enable-method = "psci";
};
@@ -61,6 +65,7 @@
compatible = "arm,cortex-a57","arm,armv8";
reg = <0x3>;
device_type = "cpu";
+ power-domains = <&sysc R8A7795_PD_CA57_CPU3>;
next-level-cache = <&L2_CA57>;
enable-method = "psci";
};
@@ -68,12 +73,14 @@
L2_CA57: cache-controller@0 {
compatible = "cache";
+ power-domains = <&sysc R8A7795_PD_CA57_SCU>;
cache-unified;
cache-level = <2>;
};
L2_CA53: cache-controller@1 {
compatible = "cache";
+ power-domains = <&sysc R8A7795_PD_CA53_SCU>;
cache-unified;
cache-level = <2>;
};
@@ -305,6 +312,12 @@
#power-domain-cells = <0>;
};
+ sysc: system-controller@e618 {
+ compatible = "renesas,r8a7795-sysc";
+ reg = <0 0xe618 0 0x0400>;
+ #power-domain-cells = <1>;
+ };
+
audma0: dma-controller@ec70 {
compatible = "renesas,rcar-dmac";
reg = <0 0xec70 0 0x1>;
--
1.9.1
[PATCH v5 08/12] ARM: dts: r8a7790: Use SYSC "always-on" PM Domain
Hook up all devices that are part of the CPG/MSTP Clock Domain to the
SYSC "always-on" PM Domain, for a more consistent device-power-area
description in DT.
Signed-off-by: Geert Uytterhoeven
Acked-by: Laurent Pinchart
---
v5:
- Add Acked-by,
v4:
- New.
---
arch/arm/boot/dts/r8a7790.dtsi | 138 -
1 file changed, 69 insertions(+), 69 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 1a3b6b08f1f3c90c..9b1b8af1cb9f5f4b 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -184,7 +184,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7790_CLK_GPIO0>;
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
};
gpio1: gpio@e6051000 {
@@ -197,7 +197,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7790_CLK_GPIO1>;
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
};
gpio2: gpio@e6052000 {
@@ -210,7 +210,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7790_CLK_GPIO2>;
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
};
gpio3: gpio@e6053000 {
@@ -223,7 +223,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7790_CLK_GPIO3>;
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
};
gpio4: gpio@e6054000 {
@@ -236,7 +236,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7790_CLK_GPIO4>;
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
};
gpio5: gpio@e6055000 {
@@ -249,7 +249,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7790_CLK_GPIO5>;
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
};
thermal: thermal@e61f {
@@ -259,7 +259,7 @@
reg = <0 0xe61f 0 0x14>, <0 0xe61f0100 0 0x38>;
interrupts = ;
clocks = <&mstp5_clks R8A7790_CLK_THERMAL>;
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
#thermal-sensor-cells = <0>;
};
@@ -278,7 +278,7 @@
;
clocks = <&mstp1_clks R8A7790_CLK_CMT0>;
clock-names = "fck";
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
renesas,channels-mask = <0x60>;
@@ -298,7 +298,7 @@
;
clocks = <&mstp3_clks R8A7790_CLK_CMT1>;
clock-names = "fck";
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
renesas,channels-mask = <0xff>;
@@ -315,7 +315,7 @@
,
;
clocks = <&mstp4_clks R8A7790_CLK_IRQC>;
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
};
dmac0: dma-controller@e670 {
@@ -344,7 +344,7 @@
"ch12", "ch13", "ch14";
clocks = <&mstp2_clks R8A7790_CLK_SYS_DMAC0>;
clock-names = "fck";
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
#dma-cells = <1>;
dma-channels = <15>;
};
@@ -375,7 +375,7 @@
"ch12", "ch13", "ch14";
clocks = <&mstp2_clks R8A7790_CLK_SYS_DMAC1>;
clock-names = "fck";
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
#dma-cells = <1>;
dma-channels = <15>;
};
@@ -404,7 +404,7 @@
"ch12";
clocks = <&mstp5_clks R8A7790_CLK_AUDIO_DMAC0>;
clock-names = "fck";
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
#dma-cells = <1>;
dma-channels = <13>;
};
@@ -433,7 +433,7 @@
"ch12";
clocks = <&mstp5_clks R8A7790_CLK_AUDIO_DMAC1>;
clock-names = "fck";
- power-domains = <&cpg_c
[PATCH v5 05/11] soc: renesas: rcar-sysc: Enable Clock Domain for I/O devices
On R-Car H3, some power areas (e.g. A3VP) contain I/O devices, which are
also part of the CPG/MSSR Clock Domain.
On all R-Car SoCs, devices in the "always-on" PM Domain are part of the
Clock Domain served by the CPG/MSSR or CPG/MSTP driver.
Hook up the CPG/MSTP or CPG/MSSR Clock Domain attach/detach callbacks to
enable power management using module clocks. Which callback to hook up
depends on the presence of device nodes compatible with
"renesas,cpg-mstp-clocks". This clears the path for a future migration
from the CPG/MSTP to the CPG/MSSR driver on R-Car H1 and
Gen2.
Signed-off-by: Geert Uytterhoeven
---
v5:
- Revert v4 changes,
- Use either the cpg_mssr_*() or cpg_mstp_*() callbacks,
- Drop dependency on r8a7795, as this is used for the "always-on" PM
Domain on R-Car H1 and Gen2, too,
v4:
- Remove the explicit dependency on the CPG/MSSR driver by forwarding
the attach/detach callbacks to the parent PM Domain.
If deemed reusable, rcar_sysc_{at,de}tach_dev() can be moved to
common genpd code later.
v3:
- Hook up the CPG/MSSR Clock Domain attach/detach callbacks instead of
using our own copies,
v2:
- New.
---
drivers/soc/renesas/rcar-sysc.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/drivers/soc/renesas/rcar-sysc.c b/drivers/soc/renesas/rcar-sysc.c
index a333ef4152428440..be83636ef2647947 100644
--- a/drivers/soc/renesas/rcar-sysc.c
+++ b/drivers/soc/renesas/rcar-sysc.c
@@ -9,6 +9,7 @@
* for more details.
*/
+#include
#include
#include
#include
@@ -222,6 +223,8 @@ static int rcar_sysc_pd_power_on(struct generic_pm_domain
*genpd)
return rcar_sysc_power_up(&pd->ch);
}
+static bool has_cpg_mstp;
+
static void __init rcar_sysc_pd_setup(struct rcar_sysc_pd *pd)
{
struct generic_pm_domain *genpd = &pd->genpd;
@@ -253,6 +256,18 @@ static void __init rcar_sysc_pd_setup(struct rcar_sysc_pd
*pd)
gov = &pm_domain_always_on_gov;
}
+ if (!(pd->flags & (PD_CPU | PD_SCU))) {
+ /* Enable Clock Domain for I/O devices */
+ genpd->flags = GENPD_FLAG_PM_CLK;
+ if (has_cpg_mstp) {
+ genpd->attach_dev = cpg_mstp_attach_dev;
+ genpd->detach_dev = cpg_mstp_detach_dev;
+ } else {
+ genpd->attach_dev = cpg_mssr_attach_dev;
+ genpd->detach_dev = cpg_mssr_detach_dev;
+ }
+ }
+
pm_genpd_init(genpd, gov, false);
genpd->dev_ops.active_wakeup = rcar_sysc_active_wakeup;
genpd->power_off = rcar_sysc_pd_power_off;
@@ -298,6 +313,9 @@ static int __init rcar_sysc_pd_init(void)
info = match->data;
+ has_cpg_mstp = of_find_compatible_node(NULL, NULL,
+ "renesas,cpg-mstp-clocks");
+
base = of_iomap(np, 0);
if (!base) {
pr_warn("%s: Cannot map regs\n", np->full_name);
--
1.9.1
[PATCH v5 06/11] soc: renesas: rcar-sysc: Add support for R-Car H1 power areas
Signed-off-by: Geert Uytterhoeven
Reviewed-by: Laurent Pinchart
---
v5:
- Add Reviewed-by,
- Add "always-on" power area,
v4:
- Drop R8A7779_PD_SH, as it's not documented in the datasheet,
- Reformat table,
v3:
- New (converted from DT to C).
---
drivers/soc/renesas/Makefile | 2 +-
drivers/soc/renesas/r8a7779-sysc.c | 34 ++
drivers/soc/renesas/rcar-sysc.c| 3 +++
drivers/soc/renesas/rcar-sysc.h| 1 +
4 files changed, 39 insertions(+), 1 deletion(-)
create mode 100644 drivers/soc/renesas/r8a7779-sysc.c
diff --git a/drivers/soc/renesas/Makefile b/drivers/soc/renesas/Makefile
index 2b64f6c9468136f9..b8aa9db4fdd95eb8 100644
--- a/drivers/soc/renesas/Makefile
+++ b/drivers/soc/renesas/Makefile
@@ -1,4 +1,4 @@
-obj-$(CONFIG_ARCH_R8A7779) += rcar-sysc.o
+obj-$(CONFIG_ARCH_R8A7779) += rcar-sysc.o r8a7779-sysc.o
obj-$(CONFIG_ARCH_R8A7790) += rcar-sysc.o
obj-$(CONFIG_ARCH_R8A7791) += rcar-sysc.o
obj-$(CONFIG_ARCH_R8A7793) += rcar-sysc.o
diff --git a/drivers/soc/renesas/r8a7779-sysc.c
b/drivers/soc/renesas/r8a7779-sysc.c
new file mode 100644
index ..9e8e6b7faa044684
--- /dev/null
+++ b/drivers/soc/renesas/r8a7779-sysc.c
@@ -0,0 +1,34 @@
+/*
+ * Renesas R-Car H1 System Controller
+ *
+ * Copyright (C) 2016 Glider bvba
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ */
+
+#include
+#include
+
+#include
+
+#include "rcar-sysc.h"
+
+static const struct rcar_sysc_area r8a7779_areas[] __initconst = {
+ { "always-on", 0, 0, R8A7779_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
+ { "arm1",0x40, 1, R8A7779_PD_ARM1, R8A7779_PD_ALWAYS_ON,
+ PD_CPU_CR },
+ { "arm2",0x40, 2, R8A7779_PD_ARM2, R8A7779_PD_ALWAYS_ON,
+ PD_CPU_CR },
+ { "arm3",0x40, 3, R8A7779_PD_ARM3, R8A7779_PD_ALWAYS_ON,
+ PD_CPU_CR },
+ { "sgx", 0xc0, 0, R8A7779_PD_SGX, R8A7779_PD_ALWAYS_ON },
+ { "vdp",0x100, 0, R8A7779_PD_VDP, R8A7779_PD_ALWAYS_ON },
+ { "imp",0x140, 0, R8A7779_PD_IMP, R8A7779_PD_ALWAYS_ON },
+};
+
+const struct rcar_sysc_info r8a7779_sysc_info __initconst = {
+ .areas = r8a7779_areas,
+ .num_areas = ARRAY_SIZE(r8a7779_areas),
+};
diff --git a/drivers/soc/renesas/rcar-sysc.c b/drivers/soc/renesas/rcar-sysc.c
index be83636ef2647947..c473f1f33c4dabd0 100644
--- a/drivers/soc/renesas/rcar-sysc.c
+++ b/drivers/soc/renesas/rcar-sysc.c
@@ -288,6 +288,9 @@ static void __init rcar_sysc_pd_setup(struct rcar_sysc_pd
*pd)
}
static const struct of_device_id rcar_sysc_matches[] = {
+#ifdef CONFIG_ARCH_R8A7779
+ { .compatible = "renesas,r8a7779-sysc", .data = &r8a7779_sysc_info },
+#endif
{ /* sentinel */ }
};
diff --git a/drivers/soc/renesas/rcar-sysc.h b/drivers/soc/renesas/rcar-sysc.h
index 7bb48b4f7334f960..7cf58b9cd544f4b9 100644
--- a/drivers/soc/renesas/rcar-sysc.h
+++ b/drivers/soc/renesas/rcar-sysc.h
@@ -50,4 +50,5 @@ struct rcar_sysc_info {
unsigned int num_areas;
};
+extern const struct rcar_sysc_info r8a7779_sysc_info;
#endif /* __SOC_RENESAS_RCAR_SYSC_H__ */
--
1.9.1
[PATCH v5 12/12] arm64: dts: r8a7795: Use SYSC "always-on" PM Domain
Hook up all devices that are part of the CPG/MSSR Clock Domain to the
SYSC "always-on" PM Domain, for a more consistent device-power-area
description in DT.
Signed-off-by: Geert Uytterhoeven
Acked-by: Laurent Pinchart
---
v5:
- Add Acked-by,
v4:
- New, extracted from "[PATCH v3] arm64: dts: r8a7795: Add SYSC PM
Domains",
- Use "<&sysc R8A7795_PD_ALWAYS_ON>" for recently added can0, can1,
pciec0, and pciec1 device nodes,
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 110 +++
1 file changed, 55 insertions(+), 55 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index 9c7424fc171fb876..1e0f43e72bf0eb80 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -178,7 +178,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&cpg CPG_MOD 912>;
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
};
gpio1: gpio@e6051000 {
@@ -192,7 +192,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&cpg CPG_MOD 911>;
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
};
gpio2: gpio@e6052000 {
@@ -206,7 +206,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&cpg CPG_MOD 910>;
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
};
gpio3: gpio@e6053000 {
@@ -220,7 +220,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&cpg CPG_MOD 909>;
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
};
gpio4: gpio@e6054000 {
@@ -234,7 +234,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&cpg CPG_MOD 908>;
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
};
gpio5: gpio@e6055000 {
@@ -248,7 +248,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&cpg CPG_MOD 907>;
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
};
gpio6: gpio@e6055400 {
@@ -262,7 +262,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&cpg CPG_MOD 906>;
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
};
gpio7: gpio@e6055800 {
@@ -276,7 +276,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&cpg CPG_MOD 905>;
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
};
pmu_a57 {
@@ -345,7 +345,7 @@
"ch12", "ch13", "ch14", "ch15";
clocks = <&cpg CPG_MOD 502>;
clock-names = "fck";
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
#dma-cells = <1>;
dma-channels = <16>;
};
@@ -377,7 +377,7 @@
"ch12", "ch13", "ch14", "ch15";
clocks = <&cpg CPG_MOD 501>;
clock-names = "fck";
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
#dma-cells = <1>;
dma-channels = <16>;
};
@@ -399,7 +399,7 @@
GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 407>;
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
};
dmac0: dma-controller@e670 {
@@ -430,7 +430,7 @@
"ch12", "ch13", "ch14", "ch15";
clocks = <&cpg CPG_MOD 219>;
clock-names = "fck";
-
[PATCH v5 10/12] ARM: dts: r8a7793: Use SYSC "always-on" PM Domain
Hook up all devices that are part of the CPG/MSTP Clock Domain to the
SYSC "always-on" PM Domain, for a more consistent device-power-area
description in DT.
Signed-off-by: Geert Uytterhoeven
Acked-by: Laurent Pinchart
---
v5:
- Add Acked-by,
v4:
- New.
---
arch/arm/boot/dts/r8a7793.dtsi | 96 +-
1 file changed, 48 insertions(+), 48 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
index c8c32b7423f6c8bb..93a4f1f6efd9c70a 100644
--- a/arch/arm/boot/dts/r8a7793.dtsi
+++ b/arch/arm/boot/dts/r8a7793.dtsi
@@ -105,7 +105,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7793_CLK_GPIO0>;
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
};
gpio1: gpio@e6051000 {
@@ -118,7 +118,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7793_CLK_GPIO1>;
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
};
gpio2: gpio@e6052000 {
@@ -131,7 +131,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7793_CLK_GPIO2>;
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
};
gpio3: gpio@e6053000 {
@@ -144,7 +144,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7793_CLK_GPIO3>;
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
};
gpio4: gpio@e6054000 {
@@ -157,7 +157,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7793_CLK_GPIO4>;
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
};
gpio5: gpio@e6055000 {
@@ -170,7 +170,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7793_CLK_GPIO5>;
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
};
gpio6: gpio@e6055400 {
@@ -183,7 +183,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7793_CLK_GPIO6>;
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
};
gpio7: gpio@e6055800 {
@@ -196,7 +196,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7793_CLK_GPIO7>;
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
};
thermal: thermal@e61f {
@@ -206,7 +206,7 @@
reg = <0 0xe61f 0 0x14>, <0 0xe61f0100 0 0x38>;
interrupts = ;
clocks = <&mstp5_clks R8A7793_CLK_THERMAL>;
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
#thermal-sensor-cells = <0>;
};
@@ -225,7 +225,7 @@
;
clocks = <&mstp1_clks R8A7793_CLK_CMT0>;
clock-names = "fck";
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
renesas,channels-mask = <0x60>;
@@ -245,7 +245,7 @@
;
clocks = <&mstp3_clks R8A7793_CLK_CMT1>;
clock-names = "fck";
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
renesas,channels-mask = <0xff>;
@@ -268,7 +268,7 @@
,
;
clocks = <&mstp4_clks R8A7793_CLK_IRQC>;
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
};
dmac0: dma-controller@e670 {
@@ -297,7 +297,7 @@
"ch12", "ch13", "ch14";
clocks = <&mstp2_clks R8A7793_CLK_SYS_DMAC0>;
clock-names = "fck";
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
#dma-cells = <1>;
dma-channels = <15>;
};
@@ -328,7 +328,7 @@
"ch12", "ch13", "ch14";
clocks = <&mstp2_clks R8A7793_CLK_SYS_DMAC1>;
clock-names = "fck";
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
[PATCH v2 3/3] clk: renesas: cpg-mssr: Export cpg_mssr_{at,de}tach_dev()
The R-Car SYSC PM Domain driver has to power manage devices in power
areas using clocks. To reuse code and to share knowledge of clocks
suitable for power management, this is ideally done through the existing
cpg_mssr_attach_dev() and cpg_mssr_detach_dev() callbacks.
Hence these callbacks can no longer rely on their "domain" parameter
pointing to the CPG/MSSR Clock Domain. To handle this, keep a pointer to
the clock domain in a static variable. cpg_mssr_attach_dev() has to
support probe deferral, as the R-Car SYSC PM Domain may be initialized,
and devices may be added to it, before the CPG/MSSR Clock Domain is
initialized.
Dummy callbacks are provided for the case where CPG/MSTP support is not
included, so the rcar-sysc driver won't have to care about this.
Signed-off-by: Geert Uytterhoeven
---
The probe deferral path was tested by initializing the renesas,fcpv
driver from an arch_initcall.
v2:
- Provide dummy callbacks if CPG/MSSR support is not included.
---
drivers/clk/renesas/renesas-cpg-mssr.c | 18 --
include/linux/clk/renesas.h| 7 +++
2 files changed, 19 insertions(+), 6 deletions(-)
diff --git a/drivers/clk/renesas/renesas-cpg-mssr.c
b/drivers/clk/renesas/renesas-cpg-mssr.c
index 703bdb157528eecb..1f2dc3629f0e02a0 100644
--- a/drivers/clk/renesas/renesas-cpg-mssr.c
+++ b/drivers/clk/renesas/renesas-cpg-mssr.c
@@ -15,6 +15,7 @@
#include
#include
+#include
#include
#include
#include
@@ -388,6 +389,8 @@ struct cpg_mssr_clk_domain {
unsigned int core_pm_clks[0];
};
+static struct cpg_mssr_clk_domain *cpg_mssr_clk_domain;
+
static bool cpg_mssr_is_pm_clk(const struct of_phandle_args *clkspec,
struct cpg_mssr_clk_domain *pd)
{
@@ -411,17 +414,20 @@ static bool cpg_mssr_is_pm_clk(const struct
of_phandle_args *clkspec,
}
}
-static int cpg_mssr_attach_dev(struct generic_pm_domain *genpd,
- struct device *dev)
+int cpg_mssr_attach_dev(struct generic_pm_domain *unused, struct device *dev)
{
- struct cpg_mssr_clk_domain *pd =
- container_of(genpd, struct cpg_mssr_clk_domain, genpd);
+ struct cpg_mssr_clk_domain *pd = cpg_mssr_clk_domain;
struct device_node *np = dev->of_node;
struct of_phandle_args clkspec;
struct clk *clk;
int i = 0;
int error;
+ if (!pd) {
+ dev_dbg(dev, "CPG/MSSR clock domain not yet available\n");
+ return -EPROBE_DEFER;
+ }
+
while (!of_parse_phandle_with_args(np, "clocks", "#clock-cells", i,
&clkspec)) {
if (cpg_mssr_is_pm_clk(&clkspec, pd))
@@ -461,8 +467,7 @@ fail_put:
return error;
}
-static void cpg_mssr_detach_dev(struct generic_pm_domain *genpd,
- struct device *dev)
+void cpg_mssr_detach_dev(struct generic_pm_domain *unused, struct device *dev)
{
if (!list_empty(&dev->power.subsys_data->clock_list))
pm_clk_destroy(dev);
@@ -491,6 +496,7 @@ static int __init cpg_mssr_add_clk_domain(struct device
*dev,
pm_genpd_init(genpd, &simple_qos_governor, false);
genpd->attach_dev = cpg_mssr_attach_dev;
genpd->detach_dev = cpg_mssr_detach_dev;
+ cpg_mssr_clk_domain = pd;
of_genpd_add_provider_simple(np, genpd);
return 0;
diff --git a/include/linux/clk/renesas.h b/include/linux/clk/renesas.h
index ab57a298a3740c5c..ba6fa4148515e5c9 100644
--- a/include/linux/clk/renesas.h
+++ b/include/linux/clk/renesas.h
@@ -33,4 +33,11 @@ void cpg_mstp_detach_dev(struct generic_pm_domain *unused,
struct device *dev);
#define cpg_mstp_detach_devNULL
#endif
+#ifdef CONFIG_CLK_RENESAS_CPG_MSSR
+int cpg_mssr_attach_dev(struct generic_pm_domain *unused, struct device *dev);
+void cpg_mssr_detach_dev(struct generic_pm_domain *unused, struct device *dev);
+#else
+#define cpg_mssr_attach_devNULL
+#define cpg_mssr_detach_devNULL
+#endif
#endif
--
1.9.1
[PATCH v5 05/12] ARM: dts: r8a7794: Add SYSC PM Domains
Add a device node for the System Controller.
Hook up the Cortex-A7 CPU cores and the Cortex-A7 L2 cache/SCU to their
respective PM Domains.
Signed-off-by: Geert Uytterhoeven
---
v5:
- Remove "power-domains" property again from the sysc node, as the
System Controller itself is not part of the Clock Domain,
v4:
- Add "power-domains" property to the sysc node, to refer to the SoC's
Clock Domain,
v3:
- Drop power area hiearchy from DT,
- Switch to "#power-domain-cells = <1>",
- Drop fallback compatibility strings,
v2:
- Change one-line summary prefix to match current arm-soc practices,
- Update compatible values.
---
arch/arm/boot/dts/r8a7794.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index 29a0a001f1b21a9e..99c41c9099b0c233 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -12,6 +12,7 @@
#include
#include
#include
+#include
/ {
compatible = "renesas,r8a7794";
@@ -42,6 +43,7 @@
compatible = "arm,cortex-a7";
reg = <0>;
clock-frequency = <10>;
+ power-domains = <&sysc R8A7794_PD_CA7_CPU0>;
next-level-cache = <&L2_CA7>;
};
@@ -50,12 +52,14 @@
compatible = "arm,cortex-a7";
reg = <1>;
clock-frequency = <10>;
+ power-domains = <&sysc R8A7794_PD_CA7_CPU1>;
next-level-cache = <&L2_CA7>;
};
};
L2_CA7: cache-controller@1 {
compatible = "cache";
+ power-domains = <&sysc R8A7794_PD_CA7_SCU>;
cache-unified;
cache-level = <2>;
};
@@ -1244,6 +1248,12 @@
};
};
+ sysc: system-controller@e618 {
+ compatible = "renesas,r8a7794-sysc";
+ reg = <0 0xe618 0 0x0200>;
+ #power-domain-cells = <1>;
+ };
+
ipmmu_sy0: mmu@e628 {
compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
reg = <0 0xe628 0 0x1000>;
--
1.9.1
[PATCH v5 11/11] soc: renesas: rcar-sysc: Add support for R-Car H3 power areas
Signed-off-by: Geert Uytterhoeven
Reviewed-by: Laurent Pinchart
---
v5:
- Add Reviewed-by,
- Re-add "always-on" power area,
v4:
- Remove "always-on" power area, as it's now implicitly handled by the
rcar-sysc driver,
- Reformat table,
v3:
- New (converted from DT to C).
---
drivers/soc/renesas/Makefile | 1 +
drivers/soc/renesas/r8a7795-sysc.c | 56 ++
drivers/soc/renesas/rcar-sysc.c| 3 ++
drivers/soc/renesas/rcar-sysc.h| 1 +
4 files changed, 61 insertions(+)
create mode 100644 drivers/soc/renesas/r8a7795-sysc.c
diff --git a/drivers/soc/renesas/Makefile b/drivers/soc/renesas/Makefile
index b328205fef36441a..151fcd3f025b01f3 100644
--- a/drivers/soc/renesas/Makefile
+++ b/drivers/soc/renesas/Makefile
@@ -4,3 +4,4 @@ obj-$(CONFIG_ARCH_R8A7791) += rcar-sysc.o r8a7791-sysc.o
# R-Car M2-N is identical to R-Car M2-W w.r.t. power domains.
obj-$(CONFIG_ARCH_R8A7793) += rcar-sysc.o r8a7791-sysc.o
obj-$(CONFIG_ARCH_R8A7794) += rcar-sysc.o r8a7794-sysc.o
+obj-$(CONFIG_ARCH_R8A7795) += rcar-sysc.o r8a7795-sysc.o
diff --git a/drivers/soc/renesas/r8a7795-sysc.c
b/drivers/soc/renesas/r8a7795-sysc.c
new file mode 100644
index ..5e7537c96f7bbbcd
--- /dev/null
+++ b/drivers/soc/renesas/r8a7795-sysc.c
@@ -0,0 +1,56 @@
+/*
+ * Renesas R-Car H3 System Controller
+ *
+ * Copyright (C) 2016 Glider bvba
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ */
+
+#include
+#include
+
+#include
+
+#include "rcar-sysc.h"
+
+static const struct rcar_sysc_area r8a7795_areas[] __initconst = {
+ { "always-on", 0, 0, R8A7795_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
+ { "ca57-scu", 0x1c0, 0, R8A7795_PD_CA57_SCU, R8A7795_PD_ALWAYS_ON,
+ PD_SCU },
+ { "ca57-cpu0", 0x80, 0, R8A7795_PD_CA57_CPU0, R8A7795_PD_CA57_SCU,
+ PD_CPU_NOCR },
+ { "ca57-cpu1", 0x80, 1, R8A7795_PD_CA57_CPU1, R8A7795_PD_CA57_SCU,
+ PD_CPU_NOCR },
+ { "ca57-cpu2", 0x80, 2, R8A7795_PD_CA57_CPU2, R8A7795_PD_CA57_SCU,
+ PD_CPU_NOCR },
+ { "ca57-cpu3", 0x80, 3, R8A7795_PD_CA57_CPU3, R8A7795_PD_CA57_SCU,
+ PD_CPU_NOCR },
+ { "ca53-scu", 0x140, 0, R8A7795_PD_CA53_SCU, R8A7795_PD_ALWAYS_ON,
+ PD_SCU },
+ { "ca53-cpu0", 0x200, 0, R8A7795_PD_CA53_CPU0, R8A7795_PD_CA53_SCU,
+ PD_CPU_NOCR },
+ { "ca53-cpu1", 0x200, 1, R8A7795_PD_CA53_CPU1, R8A7795_PD_CA53_SCU,
+ PD_CPU_NOCR },
+ { "ca53-cpu2", 0x200, 2, R8A7795_PD_CA53_CPU2, R8A7795_PD_CA53_SCU,
+ PD_CPU_NOCR },
+ { "ca53-cpu3", 0x200, 3, R8A7795_PD_CA53_CPU3, R8A7795_PD_CA53_SCU,
+ PD_CPU_NOCR },
+ { "a3vp", 0x340, 0, R8A7795_PD_A3VP, R8A7795_PD_ALWAYS_ON },
+ { "cr7",0x240, 0, R8A7795_PD_CR7, R8A7795_PD_ALWAYS_ON },
+ { "a3vc", 0x380, 0, R8A7795_PD_A3VC, R8A7795_PD_ALWAYS_ON },
+ { "a2vc0", 0x3c0, 0, R8A7795_PD_A2VC0, R8A7795_PD_A3VC },
+ { "a2vc1", 0x3c0, 1, R8A7795_PD_A2VC1, R8A7795_PD_A3VC },
+ { "3dg-a", 0x100, 0, R8A7795_PD_3DG_A, R8A7795_PD_ALWAYS_ON },
+ { "3dg-b", 0x100, 1, R8A7795_PD_3DG_B, R8A7795_PD_3DG_A },
+ { "3dg-c", 0x100, 2, R8A7795_PD_3DG_C, R8A7795_PD_3DG_B },
+ { "3dg-d", 0x100, 3, R8A7795_PD_3DG_D, R8A7795_PD_3DG_C },
+ { "3dg-e", 0x100, 4, R8A7795_PD_3DG_E, R8A7795_PD_3DG_D },
+ { "a3ir", 0x180, 0, R8A7795_PD_A3IR, R8A7795_PD_ALWAYS_ON },
+};
+
+const struct rcar_sysc_info r8a7795_sysc_info __initconst = {
+ .areas = r8a7795_areas,
+ .num_areas = ARRAY_SIZE(r8a7795_areas),
+};
diff --git a/drivers/soc/renesas/rcar-sysc.c b/drivers/soc/renesas/rcar-sysc.c
index 99d2349b23cb923d..1753e123e8826ab5 100644
--- a/drivers/soc/renesas/rcar-sysc.c
+++ b/drivers/soc/renesas/rcar-sysc.c
@@ -304,6 +304,9 @@ static const struct of_device_id rcar_sysc_matches[] = {
#ifdef CONFIG_ARCH_R8A7794
{ .compatible = "renesas,r8a7794-sysc", .data = &r8a7794_sysc_info },
#endif
+#ifdef CONFIG_ARCH_R8A7795
+ { .compatible = "renesas,r8a7795-sysc", .data = &r8a7795_sysc_info },
+#endif
{ /* sentinel */ }
};
diff --git a/drivers/soc/renesas/rcar-sysc.h b/drivers/soc/renesas/rcar-sysc.h
index d64258cfaa20ba3f..5e766174c2f47eb0 100644
--- a/drivers/soc/renesas/rcar-sysc.h
+++ b/drivers/soc/renesas/rcar-sysc.h
@@ -54,4 +54,5 @@ extern const struct rcar_sysc_info r8a7779_sysc_info;
extern const struct rcar_sysc_info r8a7790_sysc_info;
extern const struct rcar_sysc_info r8a7791_sysc_info;
extern const struct rcar_sysc_info r8a7794_sysc_info;
+extern const struct rcar_sysc_info r8a7795_sysc_info;
#endif /* __SOC_RENESAS_RCAR_SYSC_H__ */
--
1.9.1
[PATCH v2 1/3] clk: renesas: Provide Kconfig symbols for CPG/MSSR and CPG/MSTP support
Currently the decision whether to build the renesas-cpg-mssr and clk-mstp drivers is handled by Makefile logic. However, the rcar-sysc driver will need to know whether CPG/MSSR and/or CPG/MSTP support are available or not. To avoid having to duplicate this logic, move it to Kconfig. Provide non-visible CLK_RENESAS_CPG_MSSR and CLK_RENESAS_CPG_MSTP Kconfig symbols, which can be used by both Makefiles and C code. Signed-off-by: Geert Uytterhoeven --- v2: - New. --- drivers/clk/Kconfig | 1 + drivers/clk/renesas/Kconfig | 16 drivers/clk/renesas/Makefile | 26 ++ 3 files changed, 31 insertions(+), 12 deletions(-) create mode 100644 drivers/clk/renesas/Kconfig diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index 16f7d33421d8b63b..c45554957499ea60 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -201,6 +201,7 @@ source "drivers/clk/bcm/Kconfig" source "drivers/clk/hisilicon/Kconfig" source "drivers/clk/mvebu/Kconfig" source "drivers/clk/qcom/Kconfig" +source "drivers/clk/renesas/Kconfig" source "drivers/clk/samsung/Kconfig" source "drivers/clk/tegra/Kconfig" source "drivers/clk/ti/Kconfig" diff --git a/drivers/clk/renesas/Kconfig b/drivers/clk/renesas/Kconfig new file mode 100644 index ..2115ce410cfb4bc9 --- /dev/null +++ b/drivers/clk/renesas/Kconfig @@ -0,0 +1,16 @@ +config CLK_RENESAS_CPG_MSSR + bool + default y if ARCH_R8A7795 + +config CLK_RENESAS_CPG_MSTP + bool + default y if ARCH_R7S72100 + default y if ARCH_R8A73A4 + default y if ARCH_R8A7740 + default y if ARCH_R8A7778 + default y if ARCH_R8A7779 + default y if ARCH_R8A7790 + default y if ARCH_R8A7791 + default y if ARCH_R8A7793 + default y if ARCH_R8A7794 + default y if ARCH_SH73A0 diff --git a/drivers/clk/renesas/Makefile b/drivers/clk/renesas/Makefile index 7e2579b303267d8b..ead8bb8435249493 100644 --- a/drivers/clk/renesas/Makefile +++ b/drivers/clk/renesas/Makefile @@ -1,13 +1,15 @@ obj-$(CONFIG_ARCH_EMEV2) += clk-emev2.o -obj-$(CONFIG_ARCH_R7S72100)+= clk-rz.o clk-mstp.o -obj-$(CONFIG_ARCH_R8A73A4) += clk-r8a73a4.o clk-mstp.o clk-div6.o -obj-$(CONFIG_ARCH_R8A7740) += clk-r8a7740.o clk-mstp.o clk-div6.o -obj-$(CONFIG_ARCH_R8A7778) += clk-r8a7778.o clk-mstp.o -obj-$(CONFIG_ARCH_R8A7779) += clk-r8a7779.o clk-mstp.o -obj-$(CONFIG_ARCH_R8A7790) += clk-rcar-gen2.o clk-mstp.o clk-div6.o -obj-$(CONFIG_ARCH_R8A7791) += clk-rcar-gen2.o clk-mstp.o clk-div6.o -obj-$(CONFIG_ARCH_R8A7793) += clk-rcar-gen2.o clk-mstp.o clk-div6.o -obj-$(CONFIG_ARCH_R8A7794) += clk-rcar-gen2.o clk-mstp.o clk-div6.o -obj-$(CONFIG_ARCH_R8A7795) += renesas-cpg-mssr.o \ - r8a7795-cpg-mssr.o clk-div6.o -obj-$(CONFIG_ARCH_SH73A0) += clk-sh73a0.o clk-mstp.o clk-div6.o +obj-$(CONFIG_ARCH_R7S72100)+= clk-rz.o +obj-$(CONFIG_ARCH_R8A73A4) += clk-r8a73a4.o clk-div6.o +obj-$(CONFIG_ARCH_R8A7740) += clk-r8a7740.o clk-div6.o +obj-$(CONFIG_ARCH_R8A7778) += clk-r8a7778.o +obj-$(CONFIG_ARCH_R8A7779) += clk-r8a7779.o +obj-$(CONFIG_ARCH_R8A7790) += clk-rcar-gen2.o clk-div6.o +obj-$(CONFIG_ARCH_R8A7791) += clk-rcar-gen2.o clk-div6.o +obj-$(CONFIG_ARCH_R8A7793) += clk-rcar-gen2.o clk-div6.o +obj-$(CONFIG_ARCH_R8A7794) += clk-rcar-gen2.o clk-div6.o +obj-$(CONFIG_ARCH_R8A7795) += r8a7795-cpg-mssr.o +obj-$(CONFIG_ARCH_SH73A0) += clk-sh73a0.o clk-div6.o + +obj-$(CONFIG_CLK_RENESAS_CPG_MSSR) += renesas-cpg-mssr.o clk-div6.o +obj-$(CONFIG_CLK_RENESAS_CPG_MSTP) += clk-mstp.o -- 1.9.1
[PATCH v5 1/7] PM / Domains: Add DT bindings for the R-Car System Controller
The Renesas R-Car System Controller provides power management for the
CPU cores and various coprocessors, following the generic PM domain
bindings in Documentation/devicetree/bindings/power/power_domain.txt.
This supports R-Car Gen1 (H1), Gen2, and Gen3.
Signed-off-by: Geert Uytterhoeven
Reviewed-by: Laurent Pinchart
Acked-by: Rob Herring
---
v5:
- Remove power-domains property from the sysc node again, as the
System Controller itself is not part of the Clock Domain,
v4:
- Add Reviewed-by, Acked-by,
- Compatible value must contain "exactly one" instead of "one or
more",
- Add power-domains property to refer to the SoC's Clock Domain,
v3:
- Move power area hierarchy from DT to C (cfr. DT bindings for Renesas
CPG/MSSR), and switch to "#power-domain-cells = <1>",
- Drop fallback compatibility strings, as the bindings are
SoC-specific,
- Rename from renesas,sysc-rcar.txt to renesas,rcar-sysc.txt,
v2:
- Add R-Car H3 (r8a7795) support,
- Use "renesas,-sysc" instead of "renesas,sysc-",
- Add fallback compatibility strings for R-Car Gen2 and Gen3.
---
.../bindings/power/renesas,rcar-sysc.txt | 48 ++
1 file changed, 48 insertions(+)
create mode 100644
Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt
diff --git a/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt
b/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt
new file mode 100644
index ..b74e4d4785ab2d60
--- /dev/null
+++ b/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt
@@ -0,0 +1,48 @@
+DT bindings for the Renesas R-Car System Controller
+
+== System Controller Node ==
+
+The R-Car System Controller provides power management for the CPU cores and
+various coprocessors.
+
+Required properties:
+ - compatible: Must contain exactly one of the following:
+ - "renesas,r8a7779-sysc" (R-Car H1)
+ - "renesas,r8a7790-sysc" (R-Car H2)
+ - "renesas,r8a7791-sysc" (R-Car M2-W)
+ - "renesas,r8a7792-sysc" (R-Car V2H)
+ - "renesas,r8a7793-sysc" (R-Car M2-N)
+ - "renesas,r8a7794-sysc" (R-Car E2)
+ - "renesas,r8a7795-sysc" (R-Car H3)
+ - reg: Address start and address range for the device.
+ - #power-domain-cells: Must be 1.
+
+
+Example:
+
+ sysc: system-controller@e618 {
+ compatible = "renesas,r8a7791-sysc";
+ reg = <0 0xe618 0 0x0200>;
+ #power-domain-cells = <1>;
+ };
+
+
+== PM Domain Consumers ==
+
+Devices residing in a power area must refer to that power area, as documented
+by the generic PM domain bindings in
+Documentation/devicetree/bindings/power/power_domain.txt.
+
+Required properties:
+ - power-domains: A phandle and symbolic PM domain specifier, as defined in
+ .
+
+
+Example:
+
+ L2_CA15: cache-controller@0 {
+ compatible = "cache";
+ power-domains = <&sysc R8A7791_PD_CA15_SCU>;
+ cache-unified;
+ cache-level = <2>;
+ };
--
1.9.1
[PATCH v5 02/12] ARM: dts: r8a7790: Add SYSC PM Domains
Add a device node for the System Controller.
Hook up the Cortex-A15 and Cortex-A7 CPU cores and L2 caches/SCUs to
their respective PM Domains.
Signed-off-by: Geert Uytterhoeven
---
v5:
- Remove "power-domains" property again from the sysc node, as the
System Controller itself is not part of the Clock Domain,
v4:
- Add "power-domains" property to the sysc node, to refer to the SoC's
Clock Domain,
v3:
- Drop power area hiearchy from DT,
- Switch to "#power-domain-cells = <1>",
- Drop fallback compatibility strings,
v2:
- Change one-line summary prefix to match current arm-soc practices,
- Update compatible values.
---
arch/arm/boot/dts/r8a7790.dtsi | 17 +
1 file changed, 17 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 50e8484511893572..1a3b6b08f1f3c90c 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -13,6 +13,7 @@
#include
#include
#include
+#include
/ {
compatible = "renesas,r8a7790";
@@ -52,6 +53,7 @@
voltage-tolerance = <1>; /* 1% */
clocks = <&cpg_clocks R8A7790_CLK_Z>;
clock-latency = <30>; /* 300 us */
+ power-domains = <&sysc R8A7790_PD_CA15_CPU0>;
next-level-cache = <&L2_CA15>;
/* kHz - uV - OPPs unknown yet */
@@ -68,6 +70,7 @@
compatible = "arm,cortex-a15";
reg = <1>;
clock-frequency = <13>;
+ power-domains = <&sysc R8A7790_PD_CA15_CPU1>;
next-level-cache = <&L2_CA15>;
};
@@ -76,6 +79,7 @@
compatible = "arm,cortex-a15";
reg = <2>;
clock-frequency = <13>;
+ power-domains = <&sysc R8A7790_PD_CA15_CPU2>;
next-level-cache = <&L2_CA15>;
};
@@ -84,6 +88,7 @@
compatible = "arm,cortex-a15";
reg = <3>;
clock-frequency = <13>;
+ power-domains = <&sysc R8A7790_PD_CA15_CPU3>;
next-level-cache = <&L2_CA15>;
};
@@ -92,6 +97,7 @@
compatible = "arm,cortex-a7";
reg = <0x100>;
clock-frequency = <78000>;
+ power-domains = <&sysc R8A7790_PD_CA7_CPU0>;
next-level-cache = <&L2_CA7>;
};
@@ -100,6 +106,7 @@
compatible = "arm,cortex-a7";
reg = <0x101>;
clock-frequency = <78000>;
+ power-domains = <&sysc R8A7790_PD_CA7_CPU1>;
next-level-cache = <&L2_CA7>;
};
@@ -108,6 +115,7 @@
compatible = "arm,cortex-a7";
reg = <0x102>;
clock-frequency = <78000>;
+ power-domains = <&sysc R8A7790_PD_CA7_CPU2>;
next-level-cache = <&L2_CA7>;
};
@@ -116,6 +124,7 @@
compatible = "arm,cortex-a7";
reg = <0x103>;
clock-frequency = <78000>;
+ power-domains = <&sysc R8A7790_PD_CA7_CPU3>;
next-level-cache = <&L2_CA7>;
};
};
@@ -141,12 +150,14 @@
L2_CA15: cache-controller@0 {
compatible = "cache";
+ power-domains = <&sysc R8A7790_PD_CA15_SCU>;
cache-unified;
cache-level = <2>;
};
L2_CA7: cache-controller@1 {
compatible = "cache";
+ power-domains = <&sysc R8A7790_PD_CA7_SCU>;
cache-unified;
cache-level = <2>;
};
@@ -1471,6 +1482,12 @@
};
};
+ sysc: system-controller@e618 {
+ compatible = "renesas,r8a7790-sysc";
+ reg = <0 0xe618 0 0x0200>;
+ #power-domain-cells = <1>;
+ };
+
qspi: spi@e6b1 {
compatible = "renesas,qspi-r8a7790", "renesas,qspi";
reg = <0 0xe6b1 0 0x2c>;
--
1.9.1
[PATCH v5 03/12] ARM: dts: r8a7791: Add SYSC PM Domains
Add a device node for the System Controller.
Hook up the Cortex-A15 CPU cores and the Cortex-A15 L2 cache/SCU to
their respective PM Domains.
Signed-off-by: Geert Uytterhoeven
---
v5:
- Remove "power-domains" property again from the sysc node, as the
System Controller itself is not part of the Clock Domain,
v4:
- Add "power-domains" property to the sysc node, to refer to the SoC's
Clock Domain,
v3:
- Drop power area hiearchy from DT,
- Switch to "#power-domain-cells = <1>",
- Drop fallback compatibility strings,
v2:
- Change one-line summary prefix to match current arm-soc practices,
- Update compatible values.
---
arch/arm/boot/dts/r8a7791.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index 8693888057ff3f7d..cffd7f49c01fb7a1 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -13,6 +13,7 @@
#include
#include
#include
+#include
/ {
compatible = "renesas,r8a7791";
@@ -51,6 +52,7 @@
voltage-tolerance = <1>; /* 1% */
clocks = <&cpg_clocks R8A7791_CLK_Z>;
clock-latency = <30>; /* 300 us */
+ power-domains = <&sysc R8A7791_PD_CA15_CPU0>;
next-level-cache = <&L2_CA15>;
/* kHz - uV - OPPs unknown yet */
@@ -67,6 +69,7 @@
compatible = "arm,cortex-a15";
reg = <1>;
clock-frequency = <15>;
+ power-domains = <&sysc R8A7791_PD_CA15_CPU1>;
next-level-cache = <&L2_CA15>;
};
};
@@ -92,6 +95,7 @@
L2_CA15: cache-controller@0 {
compatible = "cache";
+ power-domains = <&sysc R8A7791_PD_CA15_SCU>;
cache-unified;
cache-level = <2>;
};
@@ -1491,6 +1495,12 @@
};
};
+ sysc: system-controller@e618 {
+ compatible = "renesas,r8a7791-sysc";
+ reg = <0 0xe618 0 0x0200>;
+ #power-domain-cells = <1>;
+ };
+
qspi: spi@e6b1 {
compatible = "renesas,qspi-r8a7791", "renesas,qspi";
reg = <0 0xe6b1 0 0x2c>;
--
1.9.1
[PATCH v5 07/12] ARM: dts: r8a7779: Use SYSC "always-on" PM Domain
Hook up all devices that are part of the CPG/MSTP Clock Domain to the SYSC "always-on" PM Domain, for a more consistent device-power-area description in DT. Signed-off-by: Geert Uytterhoeven Acked-by: Laurent Pinchart --- v5: - Add Acked-by, v4: - New. --- arch/arm/boot/dts/r8a7779.dtsi | 44 +- 1 file changed, 22 insertions(+), 22 deletions(-) diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi index e02875a8c040f304..d43e3b2105aef7dc 100644 --- a/arch/arm/boot/dts/r8a7779.dtsi +++ b/arch/arm/boot/dts/r8a7779.dtsi @@ -177,7 +177,7 @@ reg = <0xffc7 0x1000>; interrupts = ; clocks = <&mstp0_clks R8A7779_CLK_I2C0>; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7779_PD_ALWAYS_ON>; status = "disabled"; }; @@ -188,7 +188,7 @@ reg = <0xffc71000 0x1000>; interrupts = ; clocks = <&mstp0_clks R8A7779_CLK_I2C1>; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7779_PD_ALWAYS_ON>; status = "disabled"; }; @@ -199,7 +199,7 @@ reg = <0xffc72000 0x1000>; interrupts = ; clocks = <&mstp0_clks R8A7779_CLK_I2C2>; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7779_PD_ALWAYS_ON>; status = "disabled"; }; @@ -210,7 +210,7 @@ reg = <0xffc73000 0x1000>; interrupts = ; clocks = <&mstp0_clks R8A7779_CLK_I2C3>; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7779_PD_ALWAYS_ON>; status = "disabled"; }; @@ -222,7 +222,7 @@ clocks = <&mstp0_clks R8A7779_CLK_SCIF0>, <&cpg_clocks R8A7779_CLK_S1>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7779_PD_ALWAYS_ON>; status = "disabled"; }; @@ -234,7 +234,7 @@ clocks = <&mstp0_clks R8A7779_CLK_SCIF1>, <&cpg_clocks R8A7779_CLK_S1>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7779_PD_ALWAYS_ON>; status = "disabled"; }; @@ -246,7 +246,7 @@ clocks = <&mstp0_clks R8A7779_CLK_SCIF2>, <&cpg_clocks R8A7779_CLK_S1>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7779_PD_ALWAYS_ON>; status = "disabled"; }; @@ -258,7 +258,7 @@ clocks = <&mstp0_clks R8A7779_CLK_SCIF3>, <&cpg_clocks R8A7779_CLK_S1>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7779_PD_ALWAYS_ON>; status = "disabled"; }; @@ -270,7 +270,7 @@ clocks = <&mstp0_clks R8A7779_CLK_SCIF4>, <&cpg_clocks R8A7779_CLK_S1>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7779_PD_ALWAYS_ON>; status = "disabled"; }; @@ -282,7 +282,7 @@ clocks = <&mstp0_clks R8A7779_CLK_SCIF5>, <&cpg_clocks R8A7779_CLK_S1>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7779_PD_ALWAYS_ON>; status = "disabled"; }; @@ -304,7 +304,7 @@ ; clocks = <&mstp0_clks R8A7779_CLK_TMU0>; clock-names = "fck"; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7779_PD_ALWAYS_ON>; #renesas,channels = <3>; @@ -319,7 +319,7 @@ ; clocks = <&mstp0_clks R8A7779_CLK_TMU1>; clock-names = "fck"; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7779_PD_ALWAYS_ON>; #renesas,channels = <3>; @@ -334,7 +334,7 @@ ; clocks = <&mstp0_clks R8A7779_CLK_TMU2>; clock-names = "fck"; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7779_PD_ALWAYS_ON>; #renesas,channels = <3>; @@ -346,7 +346,7 @@ reg = <0xfc60 0x2000>;
[PATCH v5 5/7] soc: renesas: Add r8a7793 SYSC PM Domain Binding Definitions
R-Car M2-N is identical to R-Car M2-W w.r.t. power domains, so reuse the definitions from the latter. Signed-off-by: Geert Uytterhoeven Reviewed-by: Laurent Pinchart --- v5: - Add Reviewed-by, v4: - Rename R8A7793_PD_SH to R8A7793_PD_SH_4A, - Use the numbers directly, to make the header file self-contained, - Add always-on power area, v3: - New. --- include/dt-bindings/power/r8a7793-sysc.h | 28 1 file changed, 28 insertions(+) create mode 100644 include/dt-bindings/power/r8a7793-sysc.h diff --git a/include/dt-bindings/power/r8a7793-sysc.h b/include/dt-bindings/power/r8a7793-sysc.h new file mode 100644 index ..b5693df3d830ed42 --- /dev/null +++ b/include/dt-bindings/power/r8a7793-sysc.h @@ -0,0 +1,28 @@ +/* + * Copyright (C) 2016 Glider bvba + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + */ +#ifndef __DT_BINDINGS_POWER_R8A7793_SYSC_H__ +#define __DT_BINDINGS_POWER_R8A7793_SYSC_H__ + +/* + * These power domain indices match the numbers of the interrupt bits + * representing the power areas in the various Interrupt Registers + * (e.g. SYSCISR, Interrupt Status Register) + * + * Note that R-Car M2-N is identical to R-Car M2-W w.r.t. power domains. + */ + +#define R8A7793_PD_CA15_CPU00 +#define R8A7793_PD_CA15_CPU11 +#define R8A7793_PD_CA15_SCU12 +#define R8A7793_PD_SH_4A 16 +#define R8A7793_PD_SGX 20 + +/* Always-on power area */ +#define R8A7793_PD_ALWAYS_ON 32 + +#endif /* __DT_BINDINGS_POWER_R8A7793_SYSC_H__ */ -- 1.9.1
[PATCH v5 01/11] soc: renesas: Move pm-rcar to drivers/soc/renesas/rcar-sysc
Move the pm-rcar driver from arch/arm/mach-shmobile/ to drivers/soc/renesas/, and its header file to include/linux/soc/renesas/, so it can be shared between arm32 (R-Car H1 and Gen2) and arm64 (R-Car Gen3). Rename it to rcar-sysc as it's really a driver for the R-Car System Controller (SYSC). Kill the intermediate PM_RCAR config symbol, as it's not user configurable anymore, and to prepare for SoC-specific make rules. Add the missing #include to rcar-sysc.h, which was exposed by different include order. Signed-off-by: Geert Uytterhoeven Reviewed-by: Laurent Pinchart --- v5: - No changes, v4: - Update MAINTAINERS, v3: - Add Reviewed-by, - Rename driver from pm-rcar to rcar-sysc, - Kill CONFIG_PM_RCAR, - Add missing include, v2: - New. --- MAINTAINERS | 4 arch/arm/mach-shmobile/Kconfig| 11 --- arch/arm/mach-shmobile/Makefile | 1 - arch/arm/mach-shmobile/pm-r8a7779.c | 3 ++- arch/arm/mach-shmobile/pm-rcar-gen2.c | 2 +- arch/arm/mach-shmobile/smp-r8a7779.c | 2 +- arch/arm/mach-shmobile/smp-r8a7790.c | 2 +- drivers/soc/Makefile | 3 ++- drivers/soc/renesas/Makefile | 5 + .../pm-rcar.c => drivers/soc/renesas/rcar-sysc.c | 2 +- .../pm-rcar.h => include/linux/soc/renesas/rcar-sysc.h| 8 +--- 11 files changed, 26 insertions(+), 17 deletions(-) create mode 100644 drivers/soc/renesas/Makefile rename arch/arm/mach-shmobile/pm-rcar.c => drivers/soc/renesas/rcar-sysc.c (99%) rename arch/arm/mach-shmobile/pm-rcar.h => include/linux/soc/renesas/rcar-sysc.h (66%) diff --git a/MAINTAINERS b/MAINTAINERS index 61a323a6b2cfe734..582ecf7b8bde786a 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1491,6 +1491,8 @@ Q: http://patchwork.kernel.org/project/linux-renesas-soc/list/ T: git git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git next S: Supported F: arch/arm64/boot/dts/renesas/ +F: drivers/soc/renesas/ +F: include/linux/soc/renesas/ ARM/RISCPC ARCHITECTURE M: Russell King @@ -1604,6 +1606,8 @@ F:arch/arm/configs/shmobile_defconfig F: arch/arm/include/debug/renesas-scif.S F: arch/arm/mach-shmobile/ F: drivers/sh/ +F: drivers/soc/renesas/ +F: include/linux/soc/renesas/ ARM/SOCFPGA ARCHITECTURE M: Dinh Nguyen diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig index f2bc5c353119e96d..fe4ccb52f9213d8b 100644 --- a/arch/arm/mach-shmobile/Kconfig +++ b/arch/arm/mach-shmobile/Kconfig @@ -4,11 +4,6 @@ config ARCH_SHMOBILE config ARCH_SHMOBILE_MULTI bool -config PM_RCAR - bool - select PM - select PM_GENERIC_DOMAINS - config PM_RMOBILE bool select PM @@ -16,13 +11,15 @@ config PM_RMOBILE config ARCH_RCAR_GEN1 bool - select PM_RCAR + select PM + select PM_GENERIC_DOMAINS select RENESAS_INTC_IRQPIN select SYS_SUPPORTS_SH_TMU config ARCH_RCAR_GEN2 bool - select PM_RCAR + select PM + select PM_GENERIC_DOMAINS select RENESAS_IRQC select SYS_SUPPORTS_SH_CMT select PCI_DOMAINS if PCI diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile index a65c80ac9009d51f..ebb909c55b856a58 100644 --- a/arch/arm/mach-shmobile/Makefile +++ b/arch/arm/mach-shmobile/Makefile @@ -39,7 +39,6 @@ smp-$(CONFIG_ARCH_EMEV2) += smp-emev2.o headsmp-scu.o platsmp-scu.o # PM objects obj-$(CONFIG_SUSPEND) += suspend.o obj-$(CONFIG_CPU_FREQ) += cpufreq.o -obj-$(CONFIG_PM_RCAR) += pm-rcar.o obj-$(CONFIG_PM_RMOBILE) += pm-rmobile.o obj-$(CONFIG_ARCH_RCAR_GEN2) += pm-rcar-gen2.o diff --git a/arch/arm/mach-shmobile/pm-r8a7779.c b/arch/arm/mach-shmobile/pm-r8a7779.c index 14c42a1bdf1ef20d..4174cbcbc467d047 100644 --- a/arch/arm/mach-shmobile/pm-r8a7779.c +++ b/arch/arm/mach-shmobile/pm-r8a7779.c @@ -9,9 +9,10 @@ * for more details. */ +#include + #include -#include "pm-rcar.h" #include "r8a7779.h" /* SYSC */ diff --git a/arch/arm/mach-shmobile/pm-rcar-gen2.c b/arch/arm/mach-shmobile/pm-rcar-gen2.c index 6815781ad1165ef3..691ac166a277c03f 100644 --- a/arch/arm/mach-shmobile/pm-rcar-gen2.c +++ b/arch/arm/mach-shmobile/pm-rcar-gen2.c @@ -13,9 +13,9 @@ #include #include #include +#include #include #include "common.h" -#include "pm-rcar.h" #include "rcar-gen2.h" /* RST */ diff --git a/arch/arm/mach-shmobile/smp-r8a7779.c b/arch/arm/mach-shmobile/smp-r8a7779.c index f5c31fbc10b2efbf..c6951ee245889b8f 100644 --- a/arch/arm/mach-shmobile/smp-r8a7779.c +++ b/arch/arm/mach-shmobile/smp-r8a7779.c @@ -19,13 +19,13 @@ #include #include #include +#include
[PATCH v5 08/11] soc: renesas: rcar-sysc: Add support for R-Car M2-W power areas
Signed-off-by: Geert Uytterhoeven
Reviewed-by: Laurent Pinchart
---
v5:
- Add Reviewed-by,
- Add "always-on" power area,
v4:
- Rename R8A7791_PD_SH to R8A7791_PD_SH_4A, "sh" to "sh-4a",
- Reformat table,
v3:
- New (converted from DT to C).
---
drivers/soc/renesas/Makefile | 2 +-
drivers/soc/renesas/r8a7791-sysc.c | 33 +
drivers/soc/renesas/rcar-sysc.c| 3 +++
drivers/soc/renesas/rcar-sysc.h| 1 +
4 files changed, 38 insertions(+), 1 deletion(-)
create mode 100644 drivers/soc/renesas/r8a7791-sysc.c
diff --git a/drivers/soc/renesas/Makefile b/drivers/soc/renesas/Makefile
index 6588be3c6776fadf..96463c05ee594335 100644
--- a/drivers/soc/renesas/Makefile
+++ b/drivers/soc/renesas/Makefile
@@ -1,5 +1,5 @@
obj-$(CONFIG_ARCH_R8A7779) += rcar-sysc.o r8a7779-sysc.o
obj-$(CONFIG_ARCH_R8A7790) += rcar-sysc.o r8a7790-sysc.o
-obj-$(CONFIG_ARCH_R8A7791) += rcar-sysc.o
+obj-$(CONFIG_ARCH_R8A7791) += rcar-sysc.o r8a7791-sysc.o
obj-$(CONFIG_ARCH_R8A7793) += rcar-sysc.o
obj-$(CONFIG_ARCH_R8A7794) += rcar-sysc.o
diff --git a/drivers/soc/renesas/r8a7791-sysc.c
b/drivers/soc/renesas/r8a7791-sysc.c
new file mode 100644
index ..03b9f41a34e62f36
--- /dev/null
+++ b/drivers/soc/renesas/r8a7791-sysc.c
@@ -0,0 +1,33 @@
+/*
+ * Renesas R-Car M2-W/N System Controller
+ *
+ * Copyright (C) 2016 Glider bvba
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ */
+
+#include
+#include
+
+#include
+
+#include "rcar-sysc.h"
+
+static const struct rcar_sysc_area r8a7791_areas[] __initconst = {
+ { "always-on", 0, 0, R8A7791_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
+ { "ca15-scu", 0x180, 0, R8A7791_PD_CA15_SCU, R8A7791_PD_ALWAYS_ON,
+ PD_SCU },
+ { "ca15-cpu0", 0x40, 0, R8A7791_PD_CA15_CPU0, R8A7791_PD_CA15_SCU,
+ PD_CPU_NOCR },
+ { "ca15-cpu1", 0x40, 1, R8A7791_PD_CA15_CPU1, R8A7791_PD_CA15_SCU,
+ PD_CPU_NOCR },
+ { "sh-4a", 0x80, 0, R8A7791_PD_SH_4A, R8A7791_PD_ALWAYS_ON },
+ { "sgx", 0xc0, 0, R8A7791_PD_SGX, R8A7791_PD_ALWAYS_ON },
+};
+
+const struct rcar_sysc_info r8a7791_sysc_info __initconst = {
+ .areas = r8a7791_areas,
+ .num_areas = ARRAY_SIZE(r8a7791_areas),
+};
diff --git a/drivers/soc/renesas/rcar-sysc.c b/drivers/soc/renesas/rcar-sysc.c
index 9b6a7fed3038dc09..b90bdd8d7269ffbe 100644
--- a/drivers/soc/renesas/rcar-sysc.c
+++ b/drivers/soc/renesas/rcar-sysc.c
@@ -294,6 +294,9 @@ static const struct of_device_id rcar_sysc_matches[] = {
#ifdef CONFIG_ARCH_R8A7790
{ .compatible = "renesas,r8a7790-sysc", .data = &r8a7790_sysc_info },
#endif
+#ifdef CONFIG_ARCH_R8A7791
+ { .compatible = "renesas,r8a7791-sysc", .data = &r8a7791_sysc_info },
+#endif
{ /* sentinel */ }
};
diff --git a/drivers/soc/renesas/rcar-sysc.h b/drivers/soc/renesas/rcar-sysc.h
index 33c8f2d00a01eac6..d58b39400e790a46 100644
--- a/drivers/soc/renesas/rcar-sysc.h
+++ b/drivers/soc/renesas/rcar-sysc.h
@@ -52,4 +52,5 @@ struct rcar_sysc_info {
extern const struct rcar_sysc_info r8a7779_sysc_info;
extern const struct rcar_sysc_info r8a7790_sysc_info;
+extern const struct rcar_sysc_info r8a7791_sysc_info;
#endif /* __SOC_RENESAS_RCAR_SYSC_H__ */
--
1.9.1
[PATCH v5 00/11] soc: renesas: Add R-Car SYSC PM Domain Support
Hi Simon, Magnus,
This patch series introduces a DT-based driver for the R-Car System
Controller, as found on Renesas R-Car H1, R-Car Gen2, and R-Car Gen3
SoCs.
This is a dependency for the enablement of DU and VSP on R-Car H3, as
the VSPs are located in a PM Domain.
Changes compared to v4:
- Add Reviewed-by,
- Mask SYSC interrupts sources before enabling them (doesn't matter
much as they're disabled at the GIC level anyway),
- Reference r8a7791_sysc_info directly for R-Car M2-N in rcar-sysc.c,
- Re-add explicit "always-on" power area instead of aliasing the SoC's
Clock Domain,
- Add "always-on" power area on R-Car H1 and Gen2 SoCs,
- Merge the two initialization phases again,
- Use either the cpg_mssr_*() or cpg_mstp_*() callbacks for Clock
Domain control,
- Drop dependency on r8a7795 of the Clock Domain handling, as this is
used for the "always-on" PM Domain on R-Car H1 and Gen2, too,
Changes compared to v3:
- Add Reviewed-by,
- Make sure not to clear reserved SYSCIMR bits that were set before,
- Make the always-on power area implicit and always present, and an
alias of the existing SoC's Clock Domain. This makes the number of
power areas a compile-time constant, and allows to drop PD_ALWAYS_ON
and some checks.
- Split initialization in two phases,
- Remove the explicit dependency on the CPG/MSSR driver by forwarding
the attach/detach callbacks to the parent PM Domain.
If deemed reusable, rcar_sysc_{at,de}tach_dev() can be moved to
common genpd code later.
- Document that ARM cores are controlled by PSCI on R-Car Gen3
(although the underlying CPG/APMU hardware is the same as on Gen2),
- Drop R8A7779_PD_SH, as it's not documented in the datasheet,
- Rename R8A779*_PD_SH to R8A779*_PD_SH_4A, and "sh" to "sh-4a" on
R-Car Gen2,
- Remove always-on power area from the R-Car Gen3 table, as it's now
implicitly handled by the rcar-sysc driver,
- Reformat tables,
- Minor improvements (double evaluation, unused parameter, debug
message consolidation),
- Update MAINTAINERS.
Changes compared to v2:
- Add Reviewed-by,
- Rename driver from pm-rcar to rcar-sysc,
- Create PM Domains from hierarchy in C data instead of DT,
- Add support for an "always-on" domain, which is currently used on
R-Car H3 only (support can be added for other R-Car SoCs, preferably
after their migration to CPG/MSSR),
- Drop power area A3SH on R-Car H3, as it's no longer
documented in the datasheet, and touching it seems to crash SYSC,
- Hook up the CPG/MSSR Clock Domain attach/detach callbacks instead of
using our own copies,
- Initialize SYSCIER early, as SYSC needs the interrupt sources to be
enabled to control power,
- Mask all SYSC interrupt sources for the CPU,
- Drop check for CONFIG_PM_GENERIC_DOMAINS, which is now always
enabled on R-Car SoCs,
- Use early_initcall() instead of core_initcall(),
- Do not power up CPU power areas during initialization, as this is
handled later (directly or indirectly) by the SMP code,
- Extract bindings into its own series, "[PATCH v3 0/7] PM / Domains:
Add DT bindings for the R-Car System Controller".
Changes compared to v1 (more details in the individual patches):
- Moved pm-rcar from arch/arm/mach-shmobile/ to drivers/soc/renesas/,
- Added R-Car H3 (r8a7795) support, incl. support for devices part of
a SYSC PM domain and the CPG/MSSR clock domain,
- Use "renesas,-sysc" instead of "renesas,sysc-",
- Added fallback compatibility strings for R-Car Gen2 and Gen3.
- Changed one-line summary prefix to match current arm-soc practices,
- The L2 cache-controller patches have been extracted into a separate
series ("[PATCH v3 0/7] ARM/arm64: dts: renesas: Add/complete L2
cache-controller nodes"),
- Minor fixes.
Dependencies:
- renesas-devel-20160411-v4.6-rc3.
This has been tested on r8a7779/marzen, r8a7790/lager, r8a7791/koelsch,
r8a7794/alt, and r8a7795/salvator-x.
Thanks for applying!
Geert Uytterhoeven (11):
soc: renesas: Move pm-rcar to drivers/soc/renesas/rcar-sysc
soc: renesas: rcar-sysc: Improve rcar_sysc_power() debug info
soc: renesas: rcar-sysc: Add DT support for SYSC PM domains
soc: renesas: rcar-sysc: Make rcar_sysc_power_is_off() static
soc: renesas: rcar-sysc: Enable Clock Domain for I/O devices
soc: renesas: rcar-sysc: Add support for R-Car H1 power areas
soc: renesas: rcar-sysc: Add support for R-Car H2 power areas
soc: renesas: rcar-sysc: Add support for R-Car M2-W power areas
soc: renesas: rcar-sysc: Add support for R-Car M2-N power areas
soc: renesas: rcar-sysc: Add support for R-Car E2 power areas
soc: renesas: rcar-sysc: Add support for R-Car H3 power areas
MAINTAINERS| 4 +
arch/arm/mach-shmobile/Kconfig | 11 +-
arch/arm/mach-shmobile/Makefile| 1 -
arch/arm/mach-shmobile/pm-r8a7779.c
[PATCH v5 11/12] ARM: dts: r8a7794: Use SYSC "always-on" PM Domain
Hook up all devices that are part of the CPG/MSTP Clock Domain to the
SYSC "always-on" PM Domain, for a more consistent device-power-area
description in DT.
Signed-off-by: Geert Uytterhoeven
Acked-by: Laurent Pinchart
---
v5:
- Add Acked-by,
v4:
- New.
---
arch/arm/boot/dts/r8a7794.dtsi | 106 -
1 file changed, 53 insertions(+), 53 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index 99c41c9099b0c233..3ed50640df1d63f5 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -86,7 +86,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7794_CLK_GPIO0>;
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
};
gpio1: gpio@e6051000 {
@@ -99,7 +99,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7794_CLK_GPIO1>;
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
};
gpio2: gpio@e6052000 {
@@ -112,7 +112,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7794_CLK_GPIO2>;
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
};
gpio3: gpio@e6053000 {
@@ -125,7 +125,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7794_CLK_GPIO3>;
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
};
gpio4: gpio@e6054000 {
@@ -138,7 +138,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7794_CLK_GPIO4>;
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
};
gpio5: gpio@e6055000 {
@@ -151,7 +151,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7794_CLK_GPIO5>;
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
};
gpio6: gpio@e6055400 {
@@ -164,7 +164,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7794_CLK_GPIO6>;
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
};
cmt0: timer@ffca {
@@ -174,7 +174,7 @@
;
clocks = <&mstp1_clks R8A7794_CLK_CMT0>;
clock-names = "fck";
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
renesas,channels-mask = <0x60>;
@@ -194,7 +194,7 @@
;
clocks = <&mstp3_clks R8A7794_CLK_CMT1>;
clock-names = "fck";
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
renesas,channels-mask = <0xff>;
@@ -225,7 +225,7 @@
,
;
clocks = <&mstp4_clks R8A7794_CLK_IRQC>;
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
};
pfc: pin-controller@e606 {
@@ -259,7 +259,7 @@
"ch12", "ch13", "ch14";
clocks = <&mstp2_clks R8A7794_CLK_SYS_DMAC0>;
clock-names = "fck";
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
#dma-cells = <1>;
dma-channels = <15>;
};
@@ -290,7 +290,7 @@
"ch12", "ch13", "ch14";
clocks = <&mstp2_clks R8A7794_CLK_SYS_DMAC1>;
clock-names = "fck";
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
#dma-cells = <1>;
dma-channels = <15>;
};
@@ -305,7 +305,7 @@
dmas = <&dmac0 0x21>, <&dmac0 0x22>,
<&dmac1 0x21>, <&dmac1 0x22>;
dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -319,7 +319,7 @@
dmas = <&dmac0 0x25>, <&dmac0 0x26>,
<&dmac1 0x25>, <&dmac1 0x26>;
dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc
[PATCH v5 7/7] soc: renesas: Add r8a7795 SYSC PM Domain Binding Definitions
Signed-off-by: Geert Uytterhoeven Reviewed-by: Laurent Pinchart --- v5: - No changes, v4: - Add Reviewed-by, v3: - New. --- include/dt-bindings/power/r8a7795-sysc.h | 42 1 file changed, 42 insertions(+) create mode 100644 include/dt-bindings/power/r8a7795-sysc.h diff --git a/include/dt-bindings/power/r8a7795-sysc.h b/include/dt-bindings/power/r8a7795-sysc.h new file mode 100644 index ..ee2e26ba605ef9a3 --- /dev/null +++ b/include/dt-bindings/power/r8a7795-sysc.h @@ -0,0 +1,42 @@ +/* + * Copyright (C) 2016 Glider bvba + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + */ +#ifndef __DT_BINDINGS_POWER_R8A7795_SYSC_H__ +#define __DT_BINDINGS_POWER_R8A7795_SYSC_H__ + +/* + * These power domain indices match the numbers of the interrupt bits + * representing the power areas in the various Interrupt Registers + * (e.g. SYSCISR, Interrupt Status Register) + */ + +#define R8A7795_PD_CA57_CPU00 +#define R8A7795_PD_CA57_CPU11 +#define R8A7795_PD_CA57_CPU22 +#define R8A7795_PD_CA57_CPU33 +#define R8A7795_PD_CA53_CPU05 +#define R8A7795_PD_CA53_CPU16 +#define R8A7795_PD_CA53_CPU27 +#define R8A7795_PD_CA53_CPU38 +#define R8A7795_PD_A3VP 9 +#define R8A7795_PD_CA57_SCU12 +#define R8A7795_PD_CR7 13 +#define R8A7795_PD_A3VC14 +#define R8A7795_PD_3DG_A 17 +#define R8A7795_PD_3DG_B 18 +#define R8A7795_PD_3DG_C 19 +#define R8A7795_PD_3DG_D 20 +#define R8A7795_PD_CA53_SCU21 +#define R8A7795_PD_3DG_E 22 +#define R8A7795_PD_A3IR24 +#define R8A7795_PD_A2VC0 25 +#define R8A7795_PD_A2VC1 26 + +/* Always-on power area */ +#define R8A7795_PD_ALWAYS_ON 32 + +#endif /* __DT_BINDINGS_POWER_R8A7795_SYSC_H__ */ -- 1.9.1
[PATCH v5 0/7] PM / Domains: Add DT bindings for the R-Car System Controller
Hi Simon, Magnus,
This patch series introduces DT bindings for the R-Car System
Controller, as found on Renesas R-Car H1, R-Car Gen2, and R-Car Gen3
SoCs.
Changes compared to v4:
- Add Reviewed-by,
- Remove power-domains property from the sysc node again, as the
System Controller itself is not part of the Clock Domain.
Changes compared to v3:
- Add Reviewed-by, Acked-by,
- Compatible value must contain "exactly one" instead of "one or
more",
- Add power-domains property to refer to the SoC's Clock Domain,
- Drop R8A7779_PD_SH, as it's not documented in the datasheet,
- Rename R8A779*_PD_SH to R8A779*_PD_SH_4A on R-Car Gen2,
- Add always-on power area on R-Car H1 and R-Car Gen2,
- Use numbers directly on R-Car M2-N, to make the header file
self-contained.
Changes compared to v2:
- Move power area hierarchy from DT to C (cfr. DT bindings for Renesas
CPG/MSSR), and switch to "#power-domain-cells = <1>",
- Drop fallback compatibility strings, as the bindings are
SoC-specific,
- Drop power area A3SH on R-Car H3, as it's no longer
documented in the datasheet, and touching it seems to crash SYSC,
- Add an "always-on" power area on R-Car H3,
- Rename from renesas,sysc-rcar.txt to renesas,rcar-sysc.txt,
- Extract bindings into a separate series (was "[PATCH/RFC v2 00/11]
ARM/arm64: renesas: Add SYSC PM Domain DT Support",
http://www.spinics.net/lists/arm-kernel/msg483199.html).
Changes compared to v1:
- Add R-Car H3 (r8a7795) support,
- Use "renesas,-sysc" instead of "renesas,sysc-",
- Add fallback compatibility strings for R-Car Gen2 and Gen3.
Thanks for appplying!
Geert Uytterhoeven (7):
PM / Domains: Add DT bindings for the R-Car System Controller
soc: renesas: Add r8a7779 SYSC PM Domain Binding Definitions
soc: renesas: Add r8a7790 SYSC PM Domain Binding Definitions
soc: renesas: Add r8a7791 SYSC PM Domain Binding Definitions
soc: renesas: Add r8a7793 SYSC PM Domain Binding Definitions
soc: renesas: Add r8a7794 SYSC PM Domain Binding Definitions
soc: renesas: Add r8a7795 SYSC PM Domain Binding Definitions
.../bindings/power/renesas,rcar-sysc.txt | 48 ++
include/dt-bindings/power/r8a7779-sysc.h | 27
include/dt-bindings/power/r8a7790-sysc.h | 34 +++
include/dt-bindings/power/r8a7791-sysc.h | 26
include/dt-bindings/power/r8a7793-sysc.h | 28 +
include/dt-bindings/power/r8a7794-sysc.h | 26
include/dt-bindings/power/r8a7795-sysc.h | 42 +++
7 files changed, 231 insertions(+)
create mode 100644
Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt
create mode 100644 include/dt-bindings/power/r8a7779-sysc.h
create mode 100644 include/dt-bindings/power/r8a7790-sysc.h
create mode 100644 include/dt-bindings/power/r8a7791-sysc.h
create mode 100644 include/dt-bindings/power/r8a7793-sysc.h
create mode 100644 include/dt-bindings/power/r8a7794-sysc.h
create mode 100644 include/dt-bindings/power/r8a7795-sysc.h
--
1.9.1
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
[PATCH v5 07/11] soc: renesas: rcar-sysc: Add support for R-Car H2 power areas
Signed-off-by: Geert Uytterhoeven
Reviewed-by: Laurent Pinchart
---
v5:
- Add Reviewed-by,
- Add "always-on" power area,
v4:
- Rename R8A7790_PD_SH to R8A7790_PD_SH_4A, "sh" to "sh-4a",
- Reformat table,
v3:
- New (converted from DT to C).
---
drivers/soc/renesas/Makefile | 2 +-
drivers/soc/renesas/r8a7790-sysc.c | 48 ++
drivers/soc/renesas/rcar-sysc.c| 3 +++
drivers/soc/renesas/rcar-sysc.h| 1 +
4 files changed, 53 insertions(+), 1 deletion(-)
create mode 100644 drivers/soc/renesas/r8a7790-sysc.c
diff --git a/drivers/soc/renesas/Makefile b/drivers/soc/renesas/Makefile
index b8aa9db4fdd95eb8..6588be3c6776fadf 100644
--- a/drivers/soc/renesas/Makefile
+++ b/drivers/soc/renesas/Makefile
@@ -1,5 +1,5 @@
obj-$(CONFIG_ARCH_R8A7779) += rcar-sysc.o r8a7779-sysc.o
-obj-$(CONFIG_ARCH_R8A7790) += rcar-sysc.o
+obj-$(CONFIG_ARCH_R8A7790) += rcar-sysc.o r8a7790-sysc.o
obj-$(CONFIG_ARCH_R8A7791) += rcar-sysc.o
obj-$(CONFIG_ARCH_R8A7793) += rcar-sysc.o
obj-$(CONFIG_ARCH_R8A7794) += rcar-sysc.o
diff --git a/drivers/soc/renesas/r8a7790-sysc.c
b/drivers/soc/renesas/r8a7790-sysc.c
new file mode 100644
index ..7a567ad0ff73c2c7
--- /dev/null
+++ b/drivers/soc/renesas/r8a7790-sysc.c
@@ -0,0 +1,48 @@
+/*
+ * Renesas R-Car H2 System Controller
+ *
+ * Copyright (C) 2016 Glider bvba
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ */
+
+#include
+#include
+
+#include
+
+#include "rcar-sysc.h"
+
+static const struct rcar_sysc_area r8a7790_areas[] __initconst = {
+ { "always-on", 0, 0, R8A7790_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
+ { "ca15-scu", 0x180, 0, R8A7790_PD_CA15_SCU, R8A7790_PD_ALWAYS_ON,
+ PD_SCU },
+ { "ca15-cpu0", 0x40, 0, R8A7790_PD_CA15_CPU0, R8A7790_PD_CA15_SCU,
+ PD_CPU_NOCR },
+ { "ca15-cpu1", 0x40, 1, R8A7790_PD_CA15_CPU1, R8A7790_PD_CA15_SCU,
+ PD_CPU_NOCR },
+ { "ca15-cpu2", 0x40, 2, R8A7790_PD_CA15_CPU2, R8A7790_PD_CA15_SCU,
+ PD_CPU_NOCR },
+ { "ca15-cpu3", 0x40, 3, R8A7790_PD_CA15_CPU3, R8A7790_PD_CA15_SCU,
+ PD_CPU_NOCR },
+ { "ca7-scu",0x100, 0, R8A7790_PD_CA7_SCU, R8A7790_PD_ALWAYS_ON,
+ PD_SCU },
+ { "ca7-cpu0", 0x1c0, 0, R8A7790_PD_CA7_CPU0, R8A7790_PD_CA7_SCU,
+ PD_CPU_NOCR },
+ { "ca7-cpu1", 0x1c0, 1, R8A7790_PD_CA7_CPU1, R8A7790_PD_CA7_SCU,
+ PD_CPU_NOCR },
+ { "ca7-cpu2", 0x1c0, 2, R8A7790_PD_CA7_CPU2, R8A7790_PD_CA7_SCU,
+ PD_CPU_NOCR },
+ { "ca7-cpu3", 0x1c0, 3, R8A7790_PD_CA7_CPU3, R8A7790_PD_CA7_SCU,
+ PD_CPU_NOCR },
+ { "sh-4a", 0x80, 0, R8A7790_PD_SH_4A, R8A7790_PD_ALWAYS_ON },
+ { "rgx", 0xc0, 0, R8A7790_PD_RGX, R8A7790_PD_ALWAYS_ON },
+ { "imp",0x140, 0, R8A7790_PD_IMP, R8A7790_PD_ALWAYS_ON },
+};
+
+const struct rcar_sysc_info r8a7790_sysc_info __initconst = {
+ .areas = r8a7790_areas,
+ .num_areas = ARRAY_SIZE(r8a7790_areas),
+};
diff --git a/drivers/soc/renesas/rcar-sysc.c b/drivers/soc/renesas/rcar-sysc.c
index c473f1f33c4dabd0..9b6a7fed3038dc09 100644
--- a/drivers/soc/renesas/rcar-sysc.c
+++ b/drivers/soc/renesas/rcar-sysc.c
@@ -291,6 +291,9 @@ static const struct of_device_id rcar_sysc_matches[] = {
#ifdef CONFIG_ARCH_R8A7779
{ .compatible = "renesas,r8a7779-sysc", .data = &r8a7779_sysc_info },
#endif
+#ifdef CONFIG_ARCH_R8A7790
+ { .compatible = "renesas,r8a7790-sysc", .data = &r8a7790_sysc_info },
+#endif
{ /* sentinel */ }
};
diff --git a/drivers/soc/renesas/rcar-sysc.h b/drivers/soc/renesas/rcar-sysc.h
index 7cf58b9cd544f4b9..33c8f2d00a01eac6 100644
--- a/drivers/soc/renesas/rcar-sysc.h
+++ b/drivers/soc/renesas/rcar-sysc.h
@@ -51,4 +51,5 @@ struct rcar_sysc_info {
};
extern const struct rcar_sysc_info r8a7779_sysc_info;
+extern const struct rcar_sysc_info r8a7790_sysc_info;
#endif /* __SOC_RENESAS_RCAR_SYSC_H__ */
--
1.9.1
[PATCH v5 2/7] soc: renesas: Add r8a7779 SYSC PM Domain Binding Definitions
Signed-off-by: Geert Uytterhoeven Reviewed-by: Laurent Pinchart --- v5: - No changes, v4: - Add Reviewed-by, - Drop R8A7779_PD_SH, as it's not documented in the datasheet, - Add always-on power area, v3: - New. --- include/dt-bindings/power/r8a7779-sysc.h | 27 +++ 1 file changed, 27 insertions(+) create mode 100644 include/dt-bindings/power/r8a7779-sysc.h diff --git a/include/dt-bindings/power/r8a7779-sysc.h b/include/dt-bindings/power/r8a7779-sysc.h new file mode 100644 index ..183571da507e5c45 --- /dev/null +++ b/include/dt-bindings/power/r8a7779-sysc.h @@ -0,0 +1,27 @@ +/* + * Copyright (C) 2016 Glider bvba + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + */ +#ifndef __DT_BINDINGS_POWER_R8A7779_SYSC_H__ +#define __DT_BINDINGS_POWER_R8A7779_SYSC_H__ + +/* + * These power domain indices match the numbers of the interrupt bits + * representing the power areas in the various Interrupt Registers + * (e.g. SYSCISR, Interrupt Status Register) + */ + +#define R8A7779_PD_ARM1 1 +#define R8A7779_PD_ARM2 2 +#define R8A7779_PD_ARM3 3 +#define R8A7779_PD_SGX 20 +#define R8A7779_PD_VDP 21 +#define R8A7779_PD_IMP 24 + +/* Always-on power area */ +#define R8A7779_PD_ALWAYS_ON 32 + +#endif /* __DT_BINDINGS_POWER_R8A7779_SYSC_H__ */ -- 1.9.1
[PATCH v5 3/7] soc: renesas: Add r8a7790 SYSC PM Domain Binding Definitions
Signed-off-by: Geert Uytterhoeven Reviewed-by: Laurent Pinchart --- v5: - No changes, v4: - Add Reviewed-by, - Rename R8A7790_PD_SH to R8A7790_PD_SH_4A, - Add always-on power area, v3: - New. --- include/dt-bindings/power/r8a7790-sysc.h | 34 1 file changed, 34 insertions(+) create mode 100644 include/dt-bindings/power/r8a7790-sysc.h diff --git a/include/dt-bindings/power/r8a7790-sysc.h b/include/dt-bindings/power/r8a7790-sysc.h new file mode 100644 index ..6af4e9929bd04ba4 --- /dev/null +++ b/include/dt-bindings/power/r8a7790-sysc.h @@ -0,0 +1,34 @@ +/* + * Copyright (C) 2016 Glider bvba + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + */ +#ifndef __DT_BINDINGS_POWER_R8A7790_SYSC_H__ +#define __DT_BINDINGS_POWER_R8A7790_SYSC_H__ + +/* + * These power domain indices match the numbers of the interrupt bits + * representing the power areas in the various Interrupt Registers + * (e.g. SYSCISR, Interrupt Status Register) + */ + +#define R8A7790_PD_CA15_CPU00 +#define R8A7790_PD_CA15_CPU11 +#define R8A7790_PD_CA15_CPU22 +#define R8A7790_PD_CA15_CPU33 +#define R8A7790_PD_CA7_CPU0 5 +#define R8A7790_PD_CA7_CPU1 6 +#define R8A7790_PD_CA7_CPU2 7 +#define R8A7790_PD_CA7_CPU3 8 +#define R8A7790_PD_CA15_SCU12 +#define R8A7790_PD_SH_4A 16 +#define R8A7790_PD_RGX 20 +#define R8A7790_PD_CA7_SCU 21 +#define R8A7790_PD_IMP 24 + +/* Always-on power area */ +#define R8A7790_PD_ALWAYS_ON 32 + +#endif /* __DT_BINDINGS_POWER_R8A7790_SYSC_H__ */ -- 1.9.1
[PATCH v5 09/12] ARM: dts: r8a7791: Use SYSC "always-on" PM Domain
Hook up all devices that are part of the CPG/MSTP Clock Domain to the
SYSC "always-on" PM Domain, for a more consistent device-power-area
description in DT.
Signed-off-by: Geert Uytterhoeven
Acked-by: Laurent Pinchart
---
v5:
- Add Acked-by,
v4:
- New.
---
arch/arm/boot/dts/r8a7791.dtsi | 146 -
1 file changed, 73 insertions(+), 73 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index cffd7f49c01fb7a1..3f962299ae6212f3 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -122,7 +122,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7791_CLK_GPIO0>;
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
};
gpio1: gpio@e6051000 {
@@ -135,7 +135,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7791_CLK_GPIO1>;
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
};
gpio2: gpio@e6052000 {
@@ -148,7 +148,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7791_CLK_GPIO2>;
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
};
gpio3: gpio@e6053000 {
@@ -161,7 +161,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7791_CLK_GPIO3>;
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
};
gpio4: gpio@e6054000 {
@@ -174,7 +174,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7791_CLK_GPIO4>;
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
};
gpio5: gpio@e6055000 {
@@ -187,7 +187,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7791_CLK_GPIO5>;
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
};
gpio6: gpio@e6055400 {
@@ -200,7 +200,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7791_CLK_GPIO6>;
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
};
gpio7: gpio@e6055800 {
@@ -213,7 +213,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&mstp9_clks R8A7791_CLK_GPIO7>;
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
};
thermal: thermal@e61f {
@@ -223,7 +223,7 @@
reg = <0 0xe61f 0 0x14>, <0 0xe61f0100 0 0x38>;
interrupts = ;
clocks = <&mstp5_clks R8A7791_CLK_THERMAL>;
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
#thermal-sensor-cells = <0>;
};
@@ -242,7 +242,7 @@
;
clocks = <&mstp1_clks R8A7791_CLK_CMT0>;
clock-names = "fck";
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
renesas,channels-mask = <0x60>;
@@ -262,7 +262,7 @@
;
clocks = <&mstp3_clks R8A7791_CLK_CMT1>;
clock-names = "fck";
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
renesas,channels-mask = <0xff>;
@@ -285,7 +285,7 @@
,
;
clocks = <&mstp4_clks R8A7791_CLK_IRQC>;
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
};
dmac0: dma-controller@e670 {
@@ -314,7 +314,7 @@
"ch12", "ch13", "ch14";
clocks = <&mstp2_clks R8A7791_CLK_SYS_DMAC0>;
clock-names = "fck";
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
#dma-cells = <1>;
dma-channels = <15>;
};
@@ -345,7 +345,7 @@
"ch12", "ch13", "ch14";
clocks = <&mstp2_clks R8A7791_CLK_SYS_DMAC1>;
clock-names = "fck";
- power-domains = <&cpg_clocks>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
[PATCH v5 02/11] soc: renesas: rcar-sysc: Improve rcar_sysc_power() debug info
Print requested power domain state.
Signed-off-by: Geert Uytterhoeven
Reviewed-by: Laurent Pinchart
---
v5:
- No changes,
v4:
- No changes,
v3:
- Add Reviewed-by,
v2:
- New.
---
drivers/soc/renesas/rcar-sysc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/soc/renesas/rcar-sysc.c b/drivers/soc/renesas/rcar-sysc.c
index d59bcdf78f0b56ba..9ba5fd15c53bf9b9 100644
--- a/drivers/soc/renesas/rcar-sysc.c
+++ b/drivers/soc/renesas/rcar-sysc.c
@@ -128,7 +128,7 @@ static int rcar_sysc_power(const struct rcar_sysc_ch
*sysc_ch, bool on)
out:
spin_unlock_irqrestore(&rcar_sysc_lock, flags);
- pr_debug("sysc power domain %d: %08x -> %d\n",
+ pr_debug("sysc power %s domain %d: %08x -> %d\n", on ? "on" : "off",
sysc_ch->isr_bit, ioread32(rcar_sysc_base + SYSCISR), ret);
return ret;
}
--
1.9.1
[PATCH v5 03/11] soc: renesas: rcar-sysc: Add DT support for SYSC PM domains
Populate the SYSC PM domains from DT, based on the presence of a device
node for the System Controller. The actual power area hiearchy, and
features of specific areas are obtained from tables in the C code.
The SYSCIER and SYSCIMR register values are derived from the power areas
present, which will help to get rid of the hardcoded values in R-Car H1
and R-Car Gen2 platform code later.
Initialization is done from an early_initcall(), to make sure the PM
Domains are initialized before secondary CPU bringup.
Signed-off-by: Geert Uytterhoeven
---
v5:
- Mask SYSC interrupts sources before enabling them (doesn't matter
much as they're disabled at the GIC level anyway),
- Re-add explicit "always-on" power area instead of aliasing the SoC's
Clock Domain,
- Merge the two initialization phases again,
v4:
- Make sure not to clear reserved SYSCIMR bits that were set before,
- Make the always-on power area implicit and always present, and an
alias of the existing SoC's Clock Domain. This makes the number of
power areas a compile-time constant, and allows to drop PD_ALWAYS_ON
and some checks.
- Split initialization in two phases,
- Document that ARM cores are controlled by PSCI on R-Car Gen3
(although the underlying CPG/APMU hardware is the same as on Gen2),
- Minor improvements (double evaluation, unused parameter, debug
message consolidation),
v3:
- Drop check for CONFIG_PM_GENERIC_DOMAINS, which is now always
enabled on R-Car SoCs,
- Create PM Domains from hierarchy in C data instead of DT,
- Initialize SYSCIER early, as SYSC needs the interrupt sources to be
enabled to control power,
- Mask all SYSC interrupt sources for the CPU,
- Add support for an "always-on" domain,
- Use early_initcall() instead of core_initcall(),
- Do not power up CPU power areas during initialization, as this is
handled later (directly or indirectly) by the SMP code,
v2:
- Add missing definitions for SYSC_PWR_CA15_CPU and SYSC_PWR_CA7_CPU,
- Add R-Car H3 (r8a7795) support,
- Drop tests for CONFIG_ARCH_SHMOBILE_LEGACY,
- Add missing break statements in rcar_sysc_pwr_on_off(),
- Add missing calls to of_node_put() in error paths,
- Fix build if CONFIG_PM=n,
- Update compatible values,
- Update copyright.
---
drivers/soc/renesas/rcar-sysc.c | 206 +++-
drivers/soc/renesas/rcar-sysc.h | 53 +++
2 files changed, 258 insertions(+), 1 deletion(-)
create mode 100644 drivers/soc/renesas/rcar-sysc.h
diff --git a/drivers/soc/renesas/rcar-sysc.c b/drivers/soc/renesas/rcar-sysc.c
index 9ba5fd15c53bf9b9..674a46ce46aac04d 100644
--- a/drivers/soc/renesas/rcar-sysc.c
+++ b/drivers/soc/renesas/rcar-sysc.c
@@ -2,6 +2,7 @@
* R-Car SYSC Power management support
*
* Copyright (C) 2014 Magnus Damm
+ * Copyright (C) 2015-2016 Glider bvba
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
@@ -11,10 +12,15 @@
#include
#include
#include
+#include
+#include
+#include
#include
#include
#include
+#include "rcar-sysc.h"
+
/* SYSC Common */
#define SYSCSR 0x00/* SYSC Status Register */
#define SYSCISR0x04/* Interrupt Status Register */
@@ -29,7 +35,8 @@
/*
* Power Control Register Offsets inside the register block for each domain
* Note: The "CR" registers for ARM cores exist on H1 only
- * Use WFI to power off, CPG/APMU to resume ARM cores on R-Car Gen2
+ * Use WFI to power off, CPG/APMU to resume ARM cores on R-Car Gen2
+ * Use PSCI on R-Car Gen3
*/
#define PWRSR_OFFS 0x00/* Power Status Register */
#define PWROFFCR_OFFS 0x04/* Power Shutoff Control Register */
@@ -48,6 +55,8 @@
#define SYSCISR_RETRIES1000
#define SYSCISR_DELAY_US 1
+#define RCAR_PD_ALWAYS_ON 32 /* Always-on power area */
+
static void __iomem *rcar_sysc_base;
static DEFINE_SPINLOCK(rcar_sysc_lock); /* SMP CPUs + I/O devices */
@@ -162,3 +171,198 @@ void __iomem *rcar_sysc_init(phys_addr_t base)
return rcar_sysc_base;
}
+
+struct rcar_sysc_pd {
+ struct generic_pm_domain genpd;
+ struct rcar_sysc_ch ch;
+ unsigned int flags;
+ char name[0];
+};
+
+static inline struct rcar_sysc_pd *to_rcar_pd(struct generic_pm_domain *d)
+{
+ return container_of(d, struct rcar_sysc_pd, genpd);
+}
+
+static bool rcar_sysc_active_wakeup(struct device *dev)
+{
+ return true;
+}
+
+static int rcar_sysc_pd_power_off(struct generic_pm_domain *genpd)
+{
+ struct rcar_sysc_pd *pd = to_rcar_pd(genpd);
+
+ pr_debug("%s: %s\n", __func__, genpd->name);
+
+ if (pd->flags & PD_NO_CR) {
+ pr_debug("%s: Cannot control %s\n", __func__, genpd->name);
+ return -EBUSY;
+ }
+
+ if (pd->flags & PD_BUSY) {
+ pr_debug(
[PATCH v5 01/12] ARM: dts: r8a7779: Add SYSC PM Domains
Add a device node for the System Controller.
Hook up ARM CPU cores 1-3 to their respective PM Domains.
Note that ARM CPU core 0 cannot be shut off.
Signed-off-by: Geert Uytterhoeven
---
v5:
- Remove "power-domains" property again from the sysc node, as the
System Controller itself is not part of the Clock Domain,
v4:
- Add "power-domains" property to the sysc node, to refer to the SoC's
Clock Domain,
v3:
- Drop power area hiearchy from DT,
- Switch to "#power-domain-cells = <1>",
v2:
- Correct sysc "reg" property (#address/size-cells = 1, not 2),
- Change one-line summary prefix to match current arm-soc practices,
- Update compatible values.
---
arch/arm/boot/dts/r8a7779.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi
index 5c1d48d712a18652..e02875a8c040f304 100644
--- a/arch/arm/boot/dts/r8a7779.dtsi
+++ b/arch/arm/boot/dts/r8a7779.dtsi
@@ -14,6 +14,7 @@
#include
#include
#include
+#include
/ {
compatible = "renesas,r8a7779";
@@ -34,18 +35,21 @@
compatible = "arm,cortex-a9";
reg = <1>;
clock-frequency = <10>;
+ power-domains = <&sysc R8A7779_PD_ARM1>;
};
cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <2>;
clock-frequency = <10>;
+ power-domains = <&sysc R8A7779_PD_ARM2>;
};
cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <3>;
clock-frequency = <10>;
+ power-domains = <&sysc R8A7779_PD_ARM3>;
};
};
@@ -586,4 +590,10 @@
"mmc1", "mmc0";
};
};
+
+ sysc: system-controller@ffd85000 {
+ compatible = "renesas,r8a7779-sysc";
+ reg = <0xffd85000 0x0200>;
+ #power-domain-cells = <1>;
+ };
};
--
1.9.1
[PATCH v5 09/11] soc: renesas: rcar-sysc: Add support for R-Car M2-N power areas
R-Car M2-N is identical to R-Car M2-W w.r.t. power domains, so reuse the
definitions from the latter.
Signed-off-by: Geert Uytterhoeven
Reviewed-by: Laurent Pinchart
---
v5:
- Add Reviewed-by,
- Reference r8a7791_sysc_info directly for R-Car M2-N in rcar-sysc.c,
v4:
- No changes,
v3:
- New (converted from DT to C).
---
drivers/soc/renesas/Makefile| 3 ++-
drivers/soc/renesas/rcar-sysc.c | 4
2 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/soc/renesas/Makefile b/drivers/soc/renesas/Makefile
index 96463c05ee594335..c6c4ce7ef8a145ea 100644
--- a/drivers/soc/renesas/Makefile
+++ b/drivers/soc/renesas/Makefile
@@ -1,5 +1,6 @@
obj-$(CONFIG_ARCH_R8A7779) += rcar-sysc.o r8a7779-sysc.o
obj-$(CONFIG_ARCH_R8A7790) += rcar-sysc.o r8a7790-sysc.o
obj-$(CONFIG_ARCH_R8A7791) += rcar-sysc.o r8a7791-sysc.o
-obj-$(CONFIG_ARCH_R8A7793) += rcar-sysc.o
+# R-Car M2-N is identical to R-Car M2-W w.r.t. power domains.
+obj-$(CONFIG_ARCH_R8A7793) += rcar-sysc.o r8a7791-sysc.o
obj-$(CONFIG_ARCH_R8A7794) += rcar-sysc.o
diff --git a/drivers/soc/renesas/rcar-sysc.c b/drivers/soc/renesas/rcar-sysc.c
index b90bdd8d7269ffbe..d472d8b3fa591675 100644
--- a/drivers/soc/renesas/rcar-sysc.c
+++ b/drivers/soc/renesas/rcar-sysc.c
@@ -297,6 +297,10 @@ static const struct of_device_id rcar_sysc_matches[] = {
#ifdef CONFIG_ARCH_R8A7791
{ .compatible = "renesas,r8a7791-sysc", .data = &r8a7791_sysc_info },
#endif
+#ifdef CONFIG_ARCH_R8A7793
+ /* R-Car M2-N is identical to R-Car M2-W w.r.t. power domains. */
+ { .compatible = "renesas,r8a7793-sysc", .data = &r8a7791_sysc_info },
+#endif
{ /* sentinel */ }
};
--
1.9.1
[PATCH v2] pinctrl: sh-pfc: r8a7794: Add DU pin groups
From: Koji Matsuoka
r8a7794 PFC DU support from the R-Car Gen2 v1.9.4 BSP
[Magnus: added the description, added missing dot clock output signals,
separated CDE and DISP signals, broke out the ODDF signal from the sync
group.]
[Sergei: resolved rejects, folded in Magnus' patches, killed empty lines,
reordered pin/mux arrays and pin groups, fixed up some comments to the pin
arrays, removed the "du" function splitting its groups between the "du0"
and "du1" functions.]
Signed-off-by: Koji Matsuoka
Signed-off-by: Magnus Damm
Signed-off-by: Sergei Shtylyov
---
The patch is against the 'devel' branch of Linus Walleij's 'linux-pinctrl.git'.
drivers/pinctrl/sh-pfc/pfc-r8a7794.c | 217 +++
1 file changed, 217 insertions(+)
Index: linux-pinctrl/drivers/pinctrl/sh-pfc/pfc-r8a7794.c
===
--- linux-pinctrl.orig/drivers/pinctrl/sh-pfc/pfc-r8a7794.c
+++ linux-pinctrl/drivers/pinctrl/sh-pfc/pfc-r8a7794.c
@@ -1682,6 +1682,179 @@ static const unsigned int avb_avtp_match
static const unsigned int avb_avtp_match_b_mux[] = {
AVB_AVTP_MATCH_B_MARK,
};
+/* - DU -
*/
+static const unsigned int du0_rgb666_pins[] = {
+ /* R[7:2], G[7:2], B[7:2] */
+ RCAR_GP_PIN(2, 7), RCAR_GP_PIN(2, 6), RCAR_GP_PIN(2, 5),
+ RCAR_GP_PIN(2, 4), RCAR_GP_PIN(2, 3), RCAR_GP_PIN(2, 2),
+ RCAR_GP_PIN(2, 15), RCAR_GP_PIN(2, 14), RCAR_GP_PIN(2, 13),
+ RCAR_GP_PIN(2, 12), RCAR_GP_PIN(2, 11), RCAR_GP_PIN(2, 10),
+ RCAR_GP_PIN(2, 23), RCAR_GP_PIN(2, 22), RCAR_GP_PIN(2, 21),
+ RCAR_GP_PIN(2, 20), RCAR_GP_PIN(2, 19), RCAR_GP_PIN(2, 18),
+};
+static const unsigned int du0_rgb666_mux[] = {
+ DU0_DR7_MARK, DU0_DR6_MARK, DU0_DR5_MARK, DU0_DR4_MARK,
+ DU0_DR3_MARK, DU0_DR2_MARK,
+ DU0_DG7_MARK, DU0_DG6_MARK, DU0_DG5_MARK, DU0_DG4_MARK,
+ DU0_DG3_MARK, DU0_DG2_MARK,
+ DU0_DB7_MARK, DU0_DB6_MARK, DU0_DB5_MARK, DU0_DB4_MARK,
+ DU0_DB3_MARK, DU0_DB2_MARK,
+};
+static const unsigned int du0_rgb888_pins[] = {
+ /* R[7:0], G[7:0], B[7:0] */
+ RCAR_GP_PIN(2, 7), RCAR_GP_PIN(2, 6), RCAR_GP_PIN(2, 5),
+ RCAR_GP_PIN(2, 4), RCAR_GP_PIN(2, 3), RCAR_GP_PIN(2, 2),
+ RCAR_GP_PIN(2, 1), RCAR_GP_PIN(2, 0),
+ RCAR_GP_PIN(2, 15), RCAR_GP_PIN(2, 14), RCAR_GP_PIN(2, 13),
+ RCAR_GP_PIN(2, 12), RCAR_GP_PIN(2, 11), RCAR_GP_PIN(2, 10),
+ RCAR_GP_PIN(2, 9), RCAR_GP_PIN(2, 8),
+ RCAR_GP_PIN(2, 23), RCAR_GP_PIN(2, 22), RCAR_GP_PIN(2, 21),
+ RCAR_GP_PIN(2, 20), RCAR_GP_PIN(2, 19), RCAR_GP_PIN(2, 18),
+ RCAR_GP_PIN(2, 17), RCAR_GP_PIN(2, 16),
+};
+static const unsigned int du0_rgb888_mux[] = {
+ DU0_DR7_MARK, DU0_DR6_MARK, DU0_DR5_MARK, DU0_DR4_MARK,
+ DU0_DR3_MARK, DU0_DR2_MARK, DU0_DR1_MARK, DU0_DR0_MARK,
+ DU0_DG7_MARK, DU0_DG6_MARK, DU0_DG5_MARK, DU0_DG4_MARK,
+ DU0_DG3_MARK, DU0_DG2_MARK, DU0_DG1_MARK, DU0_DG0_MARK,
+ DU0_DB7_MARK, DU0_DB6_MARK, DU0_DB5_MARK, DU0_DB4_MARK,
+ DU0_DB3_MARK, DU0_DB2_MARK, DU0_DB1_MARK, DU0_DB0_MARK,
+};
+static const unsigned int du0_clk0_out_pins[] = {
+ /* DOTCLKOUT0 */
+ RCAR_GP_PIN(2, 25),
+};
+static const unsigned int du0_clk0_out_mux[] = {
+ DU0_DOTCLKOUT0_MARK
+};
+static const unsigned int du0_clk1_out_pins[] = {
+ /* DOTCLKOUT1 */
+ RCAR_GP_PIN(2, 26),
+};
+static const unsigned int du0_clk1_out_mux[] = {
+ DU0_DOTCLKOUT1_MARK
+};
+static const unsigned int du0_clk_in_pins[] = {
+ /* CLKIN */
+ RCAR_GP_PIN(2, 24),
+};
+static const unsigned int du0_clk_in_mux[] = {
+ DU0_DOTCLKIN_MARK
+};
+static const unsigned int du0_sync_pins[] = {
+ /* EXVSYNC/VSYNC, EXHSYNC/HSYNC */
+ RCAR_GP_PIN(2, 28), RCAR_GP_PIN(2, 27),
+};
+static const unsigned int du0_sync_mux[] = {
+ DU0_EXVSYNC_DU0_VSYNC_MARK, DU0_EXHSYNC_DU0_HSYNC_MARK
+};
+static const unsigned int du0_oddf_pins[] = {
+ /* EXODDF/ODDF/DISP/CDE */
+ RCAR_GP_PIN(2, 29),
+};
+static const unsigned int du0_oddf_mux[] = {
+ DU0_EXODDF_DU0_ODDF_DISP_CDE_MARK,
+};
+static const unsigned int du0_cde_pins[] = {
+ /* CDE */
+ RCAR_GP_PIN(2, 31),
+};
+static const unsigned int du0_cde_mux[] = {
+ DU0_CDE_MARK,
+};
+static const unsigned int du0_disp_pins[] = {
+ /* DISP */
+ RCAR_GP_PIN(2, 30),
+};
+static const unsigned int du0_disp_mux[] = {
+ DU0_DISP_MARK
+};
+static const unsigned int du1_rgb666_pins[] = {
+ /* R[7:2], G[7:2], B[7:2] */
+ RCAR_GP_PIN(4, 7), RCAR_GP_PIN(4, 6), RCAR_GP_PIN(4, 5),
+ RCAR_GP_PIN(4, 4), RCAR_GP_PIN(4, 3), RCAR_GP_PIN(4, 2),
+ RCAR_GP_PIN(4, 15), RCAR_GP_PIN(4, 14), RCAR_GP_PIN(4, 13),
+ RCAR_GP_PIN(4, 12), RCAR_GP_PIN(4, 11), RCAR_GP_PIN(4, 10),
+ RCAR_GP_PIN(4, 23), RCAR_GP_PIN(4, 22), RCAR_GP_PIN(4, 21),
+ RCAR_GP_PIN(4, 20), RCAR_GP_PIN(4, 19), R
[PATCH] ARM: dts: silk: add DU pins
Add the (previously omitted) DU pin data to the SILK board's device tree.
Signed-off-by: Sergei Shtylyov
---
This patch is against the 'renesas-devel-20160411-v4.6-rc3' tag of Simon
Horman's 'renesas.git' repo. It depends on the R8A7794 DU PFC driver patch
just posted for the pins to be configured...
arch/arm/boot/dts/r8a7794-silk.dts | 12
1 file changed, 12 insertions(+)
Index: renesas/arch/arm/boot/dts/r8a7794-silk.dts
===
--- renesas.orig/arch/arm/boot/dts/r8a7794-silk.dts
+++ renesas/arch/arm/boot/dts/r8a7794-silk.dts
@@ -183,6 +183,16 @@
groups = "usb1";
function = "usb1";
};
+
+ du0_pins: du0 {
+ groups = "du0_rgb888", "du0_sync", "du0_disp", "du0_clk0_out";
+ function = "du0";
+ };
+
+ du1_pins: du1 {
+ groups = "du1_rgb666", "du1_sync", "du1_disp", "du1_clk0_out";
+ function = "du1";
+ };
};
&scif2 {
@@ -360,6 +370,8 @@
};
&du {
+ pinctrl-0 = <&du0_pins &du1_pins>;
+ pinctrl-names = "default";
status = "okay";
clocks = <&mstp7_clks R8A7794_CLK_DU0>,
Re: [PATCH 2/2] ARM: shmobile: timer: Drop support for Cortex A8
Hi,
On Sun, Apr 3, 2016 at 6:22 PM, Simon Horman wrote:
> From: Geert Uytterhoeven
>
> Commit edf4100906044225 ("ARM: shmobile: sh7372 dtsi: Remove Legacy
> file") removed the DTS for the last shmobile SoC with a Cortex A8 CPU
> core (sh7372 aka SH-Mobile AP4).
>
> Signed-off-by: Geert Uytterhoeven
> Signed-off-by: Simon Horman
> ---
> arch/arm/mach-shmobile/timer.c | 4 +---
> 1 file changed, 1 insertion(+), 3 deletions(-)
>
> diff --git a/arch/arm/mach-shmobile/timer.c b/arch/arm/mach-shmobile/timer.c
> index 67d79f9c6bad..1fc7759feab1 100644
> --- a/arch/arm/mach-shmobile/timer.c
> +++ b/arch/arm/mach-shmobile/timer.c
> @@ -54,9 +54,7 @@ void __init shmobile_init_delay(void)
> if (!of_property_read_u32(np, "clock-frequency", &freq))
> max_freq = max(max_freq, freq);
>
> - if (of_device_is_compatible(np, "arm,cortex-a8")) {
> - div = 2;
> - } else if (of_device_is_compatible(np, "arm,cortex-a9")) {
> + if (of_device_is_compatible(np, "arm,cortex-a9")) {
> div = 1;
> } else if (of_device_is_compatible(np, "arm,cortex-a7") ||
> of_device_is_compatible(np, "arm,cortex-a15")) {
This setting of div doesn't make much sense now. It's always 1. This
function seems more complicated than it has to be...
-Olof
Re: [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.7
On Mon, Apr 04, 2016 at 10:22:20AM +0900, Simon Horman wrote: > Hi Olof, Hi Kevin, Hi Arnd, > > Please consider these Renesas ARM64 based SoC DT updates for v4.7. > > > The following changes since commit f55532a0c0b8bb6148f4e07853b876ef73bc69ca: > > Linux 4.6-rc1 (2016-03-26 16:03:24 -0700) > > are available in the git repository at: > > git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git > tags/renesas-arm64-dt-for-v4.7 > > for you to fetch changes up to 81ae0ac31bb90baef10850fdfdc2a9f72f36aa6f: > > arm64: dts: r8a7795: Use USB3.0 fallback compatibility string (2016-03-28 > 08:52:47 +0900) > > > Renesas ARM64 Based SoC DT Updates for v4.7 > > * Use USB3.0 fallback compatibility string in DT for r8a7795 SoC > * Add CAN support to DT for r8a7795 SoC Merged, thanks! -Olof
Re: [GIT PULL] Renesas ARM Based SoC Defconfig Updates for v4.7
On Mon, Apr 04, 2016 at 10:22:44AM +0900, Simon Horman wrote: > Hi Olof, Hi Kevin, Hi Arnd, > > Please consider these Renesas ARM based SoC defconfig updates for v4.7. > > > The following changes since commit f55532a0c0b8bb6148f4e07853b876ef73bc69ca: > > Linux 4.6-rc1 (2016-03-26 16:03:24 -0700) > > are available in the git repository at: > > git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git > tags/renesas-defconfig-for-v4.7 > > for you to fetch changes up to 352486b164ad41f2536f77d568ada7d729d080c2: > > ARM: shmobile: defconfig: enable I2C demultiplexer and slave eeprom > (2016-03-28 10:05:01 +0900) > > > Renesas ARM Based SoC Defconfig Updates for v4.7 > > * Enable I2C demultiplexer and slave eeprom in > shmobile and multi_v7defconfigs Merged, thanks. -Olof
Re: [GIT PULL] Renesas ARM64 Based SoC Cleanup for v4.7
On Mon, Apr 04, 2016 at 10:22:07AM +0900, Simon Horman wrote: > Hi Olof, Hi Kevin, Hi Arnd, > > Please consider these Renesas ARM64 based SoC cleanup for v4.7. > > > The following changes since commit f55532a0c0b8bb6148f4e07853b876ef73bc69ca: > > Linux 4.6-rc1 (2016-03-26 16:03:24 -0700) > > are available in the git repository at: > > git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git > tags/renesas-arm64-cleanup-for-v4.7 > > for you to fetch changes up to fa3d2aede8bf9dd69e9309230169b5ec1cc234e4: > > arm64: dts: salvator-x: use generic pinctrl properties (2016-03-28 08:50:52 > +0900) > > > Renesas ARM64 Based SoC Cleanup for v4.7 > > * Use generic pinctrl properties in DT for salvator-x board Merged into next/dt64. Thanks. -Olof
Re: [PATCH 31/47] ARM: dts: r8a7794: Reference both DMA controllers in SCIFA nodes
Hi, Commenting on this random patch in the series, but I'm guessing the same applies for others. First, I think it's somewhat silly to split this up into 31 patches instead of just doing one. But it's not bad enough that it really matters. My bigger concern is: On Sun, Apr 3, 2016 at 6:23 PM, Simon Horman wrote: > diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi > index eacb2b291361..4256557ca041 100644 > --- a/arch/arm/boot/dts/r8a7794.dtsi > +++ b/arch/arm/boot/dts/r8a7794.dtsi > @@ -296,8 +296,9 @@ > interrupts = ; > clocks = <&mstp2_clks R8A7794_CLK_SCIFA0>; > clock-names = "fck"; > - dmas = <&dmac0 0x21>, <&dmac0 0x22>; > - dma-names = "tx", "rx"; > + dmas = <&dmac0 0x21>, <&dmac0 0x22>, > + <&dmac1 0x21>, <&dmac1 0x22>; > + dma-names = "tx", "rx", "tx", "rx"; > power-domains = <&cpg_clocks>; > status = "disabled"; > }; The names are no longer unique. So a get__by_name() function no longer can work as expected. This should be fixed. -Olof
Re: [GIT PULL] Renesas ARM Based SoC Drivers Updates for v4.7
On Mon, Apr 04, 2016 at 10:22:56AM +0900, Simon Horman wrote: > Hi Olof, Hi Kevin, Hi Arnd, > > Please consider these Renesas ARM based SoC drivers updates for v4.7. > > > The following changes since commit f55532a0c0b8bb6148f4e07853b876ef73bc69ca: > > Linux 4.6-rc1 (2016-03-26 16:03:24 -0700) > > are available in the git repository at: > > git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git > tags/renesas-drivers-for-v4.7 > > for you to fetch changes up to cd89841fc6dbb6dc11aa113769f39dcd30be720f: > > ARM: shmobile: timer: Drop support for Cortex A8 (2016-03-28 09:01:31 +0900) > > > Renesas ARM Based SoC Drivers Updates for v4.7 > > Loop delay calculation updates: > * Remove check for no longer supported Cortex A8 cores > * Correct short calculation of delay > > > Geert Uytterhoeven (2): > ARM: shmobile: timer: Fix preset_lpj leading to too short delays > ARM: shmobile: timer: Drop support for Cortex A8 I don't understand your naming. THis isn't driver code, this is SoC code. Anyway, I replied to the drop-A8 patch, the resulting function doesn't make much sense once that code path is removed (div is always 1). Seems like this should be cleaned up in other ways instead. So, not merging this branch for now since I think it should be revisited. -Olof
Re: [GIT PULL] Renesas ARM Based SoC Cleanup for v4.7
On Mon, Apr 04, 2016 at 10:22:33AM +0900, Simon Horman wrote: > Hi Olof, Hi Kevin, Hi Arnd, > > Please consider these Renesas ARM based SoC cleanup for v4.7. > > > The following changes since commit f55532a0c0b8bb6148f4e07853b876ef73bc69ca: > > Linux 4.6-rc1 (2016-03-26 16:03:24 -0700) > > are available in the git repository at: > > git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git > tags/renesas-cleanup-for-v4.7 > > for you to fetch changes up to 25cfbb9e8bafd0a1fa84d8d83526d24bde42: > > ARM: dts: sh73a0: Remove unnecessary clock-output-names properties > (2016-03-28 08:56:11 +0900) > > > Renesas ARM Based SoC Cleanup for v4.7 > > * Remove unnecessary clock-output-names properties from DT > * Use generic pinctrl properties in DT Hi, Ok, so this is the second cleanup-labelled branch from you. I'm OK with these being split out, but we normally don't merge dt changes in the cleanup branch, we group them with other DT changes. So I've merged this into next/dt. If you want to separate out dt cleanups, I'm OK with that. Just don't mix DT and non-DT cleanups in those branches in the future, so I can still choose to merge into next/dt. -Olof
Re: [PATCH 2/2] ARM: shmobile: timer: Drop support for Cortex A8
Hi Olof,
On Wed, Apr 13, 2016 at 9:41 PM, Olof Johansson wrote:
> On Sun, Apr 3, 2016 at 6:22 PM, Simon Horman
> wrote:
>> From: Geert Uytterhoeven
>>
>> Commit edf4100906044225 ("ARM: shmobile: sh7372 dtsi: Remove Legacy
>> file") removed the DTS for the last shmobile SoC with a Cortex A8 CPU
>> core (sh7372 aka SH-Mobile AP4).
>>
>> Signed-off-by: Geert Uytterhoeven
>> Signed-off-by: Simon Horman
>> ---
>> arch/arm/mach-shmobile/timer.c | 4 +---
>> 1 file changed, 1 insertion(+), 3 deletions(-)
>>
>> diff --git a/arch/arm/mach-shmobile/timer.c b/arch/arm/mach-shmobile/timer.c
>> index 67d79f9c6bad..1fc7759feab1 100644
>> --- a/arch/arm/mach-shmobile/timer.c
>> +++ b/arch/arm/mach-shmobile/timer.c
>> @@ -54,9 +54,7 @@ void __init shmobile_init_delay(void)
>> if (!of_property_read_u32(np, "clock-frequency", &freq))
>> max_freq = max(max_freq, freq);
>>
>> - if (of_device_is_compatible(np, "arm,cortex-a8")) {
>> - div = 2;
>> - } else if (of_device_is_compatible(np, "arm,cortex-a9")) {
>> + if (of_device_is_compatible(np, "arm,cortex-a9")) {
>> div = 1;
>> } else if (of_device_is_compatible(np, "arm,cortex-a7") ||
>> of_device_is_compatible(np, "arm,cortex-a15")) {
>
> This setting of div doesn't make much sense now. It's always 1. This
> function seems more complicated than it has to be...
Yes, there are definitely more areas for improvement in this organic piece of
code...
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Re: [PATCH 31/47] ARM: dts: r8a7794: Reference both DMA controllers in SCIFA nodes
Hi Olof,
On Wed, Apr 13, 2016 at 9:48 PM, Olof Johansson wrote:
> On Sun, Apr 3, 2016 at 6:23 PM, Simon Horman
> wrote:
>> diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
>> index eacb2b291361..4256557ca041 100644
>> --- a/arch/arm/boot/dts/r8a7794.dtsi
>> +++ b/arch/arm/boot/dts/r8a7794.dtsi
>> @@ -296,8 +296,9 @@
>> interrupts = ;
>> clocks = <&mstp2_clks R8A7794_CLK_SCIFA0>;
>> clock-names = "fck";
>> - dmas = <&dmac0 0x21>, <&dmac0 0x22>;
>> - dma-names = "tx", "rx";
>> + dmas = <&dmac0 0x21>, <&dmac0 0x22>,
>> + <&dmac1 0x21>, <&dmac1 0x22>;
>> + dma-names = "tx", "rx", "tx", "rx";
>> power-domains = <&cpg_clocks>;
>> status = "disabled";
>> };
>
> The names are no longer unique. So a get__by_name() function no
> longer can work as expected.
That's intentional, and a relic of how dma_request_slave_channel_compat()
works: if e.g. the first "tx" channel can't be gotten (e.g. because
the referenced
DMAC instance ran out of channels), it will try the next one.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Re: [GIT PULL] Renesas ARM Based SoC Drivers Updates for v4.7
Hi Olof,
On Wed, Apr 13, 2016 at 9:43 PM, Olof Johansson wrote:
> On Mon, Apr 04, 2016 at 10:22:56AM +0900, Simon Horman wrote:
>> Please consider these Renesas ARM based SoC drivers updates for v4.7.
>>
>>
>> The following changes since commit f55532a0c0b8bb6148f4e07853b876ef73bc69ca:
>>
>> Linux 4.6-rc1 (2016-03-26 16:03:24 -0700)
>>
>> are available in the git repository at:
>>
>> git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git
>> tags/renesas-drivers-for-v4.7
>>
>> for you to fetch changes up to cd89841fc6dbb6dc11aa113769f39dcd30be720f:
>>
>> ARM: shmobile: timer: Drop support for Cortex A8 (2016-03-28 09:01:31
>> +0900)
>>
>>
>> Renesas ARM Based SoC Drivers Updates for v4.7
>>
>> Loop delay calculation updates:
>> * Remove check for no longer supported Cortex A8 cores
>> * Correct short calculation of delay
>>
>>
>> Geert Uytterhoeven (2):
>> ARM: shmobile: timer: Fix preset_lpj leading to too short delays
>> ARM: shmobile: timer: Drop support for Cortex A8
>
> I don't understand your naming. THis isn't driver code, this is SoC code.
>
> Anyway, I replied to the drop-A8 patch, the resulting function doesn't make
> much sense once that code path is removed (div is always 1). Seems like this
> should be cleaned up in other ways instead.
>
> So, not merging this branch for now since I think it should be revisited.
The reason these are small separate patches is because especially the
first one may be backported to stable, as it's a real bug fix.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Re: [GIT PULL] Renesas ARM Based SoC DT Updates for v4.7
On Mon, Apr 04, 2016 at 10:23:15AM +0900, Simon Horman wrote: > Hi Olof, Hi Kevin, Hi Arnd, > > Please consider these Renesas ARM based SoC DT updates for v4.7. > > > The following changes since commit f55532a0c0b8bb6148f4e07853b876ef73bc69ca: > > Linux 4.6-rc1 (2016-03-26 16:03:24 -0700) > > are available in the git repository at: > > git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git > tags/renesas-dt-for-v4.7 > > for you to fetch changes up to 64abfd0a89ae1c7e0edcc6744198842e706c0b52: > > ARM: dts: r8a7791: Use USB3.0 fallback compatibility string (2016-03-28 > 09:03:37 +0900) > > > Renesas ARM Based SoC DT Updates for v4.7 > > * Correct interrupt type for ARM TWD in DT of r8a7779 and sh73a0 SoCs > * Add IIC support to DT of r8a7794 SoC > * Add CAN support to DT of r8a7793 and r8a7794 SoCs > * Add SCIF2 support to r8a7790 device tree > * Reference both DMA controllers in MMCIF, SDHI, QSPI HSCIF, SFIFA, SCIFB > and IIC nodes of r8a7790, r8a7791 r8a7793 and r8a7794 SoCs. > * Use CAN, JPU and USB3.0 fallback compatibility string > in DT of r8a7791 and r8a7790 SoCs Hi, I had comments on the DMA controller additions, see reply on the specific patch. Branch not merged at this time. -Olof
Re: [GIT PULL] Renesas ARM Based SoC Drivers Updates for v4.7
On Wed, Apr 13, 2016 at 09:57:39PM +0200, Geert Uytterhoeven wrote: > Hi Olof, > > On Wed, Apr 13, 2016 at 9:43 PM, Olof Johansson wrote: > > On Mon, Apr 04, 2016 at 10:22:56AM +0900, Simon Horman wrote: > >> Please consider these Renesas ARM based SoC drivers updates for v4.7. > >> > >> > >> The following changes since commit > >> f55532a0c0b8bb6148f4e07853b876ef73bc69ca: > >> > >> Linux 4.6-rc1 (2016-03-26 16:03:24 -0700) > >> > >> are available in the git repository at: > >> > >> git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git > >> tags/renesas-drivers-for-v4.7 > >> > >> for you to fetch changes up to cd89841fc6dbb6dc11aa113769f39dcd30be720f: > >> > >> ARM: shmobile: timer: Drop support for Cortex A8 (2016-03-28 09:01:31 > >> +0900) > >> > >> > >> Renesas ARM Based SoC Drivers Updates for v4.7 > >> > >> Loop delay calculation updates: > >> * Remove check for no longer supported Cortex A8 cores > >> * Correct short calculation of delay > >> > >> > >> Geert Uytterhoeven (2): > >> ARM: shmobile: timer: Fix preset_lpj leading to too short delays > >> ARM: shmobile: timer: Drop support for Cortex A8 > > > > I don't understand your naming. THis isn't driver code, this is SoC code. > > > > Anyway, I replied to the drop-A8 patch, the resulting function doesn't make > > much sense once that code path is removed (div is always 1). Seems like this > > should be cleaned up in other ways instead. > > > > So, not merging this branch for now since I think it should be revisited. > > The reason these are small separate patches is because especially the > first one may be backported to stable, as it's a real bug fix. Ok, so then the second shouldn't just remove cortex-a8, but rework the function (yet again). -Olof
[PATCH] [media] vsp1: make vsp1_drm_frame_end static
As reported by smatch:
drivers/media/platform/vsp1/vsp1_drm.c:39:6: warning: no previous
prototype for 'vsp1_drm_frame_end' [-Wmissing-prototypes]
void vsp1_drm_frame_end(struct vsp1_pipeline *pipe)
Fixes: ef9621bcd664 ("[media] v4l: vsp1: Store the display list manager in the
WPF")
Signed-off-by: Mauro Carvalho Chehab
---
drivers/media/platform/vsp1/vsp1_drm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/media/platform/vsp1/vsp1_drm.c
b/drivers/media/platform/vsp1/vsp1_drm.c
index 22f67360b750..1f08da4b933b 100644
--- a/drivers/media/platform/vsp1/vsp1_drm.c
+++ b/drivers/media/platform/vsp1/vsp1_drm.c
@@ -36,7 +36,7 @@ void vsp1_drm_display_start(struct vsp1_device *vsp1)
vsp1_dlm_irq_display_start(vsp1->drm->pipe.output->dlm);
}
-void vsp1_drm_frame_end(struct vsp1_pipeline *pipe)
+static void vsp1_drm_frame_end(struct vsp1_pipeline *pipe)
{
vsp1_dlm_irq_frame_end(pipe->output->dlm);
}
--
2.5.5
Re: [GIT PULL] Renesas ARM Based SoC Simple PM Bus Updates for v4.7
On Mon, Apr 04, 2016 at 10:23:30AM +0900, Simon Horman wrote: > Hi Olof, Hi Kevin, Hi Arnd, > > Please consider these Renesas ARM based SoC Simple PM bus updates for v4.7. > > > The following changes since commit f55532a0c0b8bb6148f4e07853b876ef73bc69ca: > > Linux 4.6-rc1 (2016-03-26 16:03:24 -0700) > > are available in the git repository at: > > git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git > tags/renesas-simple-pm-bus-for-v4.7 > > for you to fetch changes up to 41feae79f2621d9fcea1437d4a2f29dc731fdbb0: > > bus: simple-pm-bus: Use ARCH_RENESAS (2016-03-28 09:05:58 +0900) > > > Renesas ARM Based SoC Simple PM Bus Updates for v4.7 > > * Use ARCH_RENESAS in Kconfig Merged into next/drivers. Thanks. -Olof
Re: [GIT PULL] Renesas ARM Based SoC Cleanup for v4.7
On Wed, Apr 13, 2016 at 12:16:45PM -0700, Olof Johansson wrote: > On Mon, Apr 04, 2016 at 10:22:33AM +0900, Simon Horman wrote: > > Hi Olof, Hi Kevin, Hi Arnd, > > > > Please consider these Renesas ARM based SoC cleanup for v4.7. > > > > > > The following changes since commit f55532a0c0b8bb6148f4e07853b876ef73bc69ca: > > > > Linux 4.6-rc1 (2016-03-26 16:03:24 -0700) > > > > are available in the git repository at: > > > > git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git > > tags/renesas-cleanup-for-v4.7 > > > > for you to fetch changes up to 25cfbb9e8bafd0a1fa84d8d83526d24bde42: > > > > ARM: dts: sh73a0: Remove unnecessary clock-output-names properties > > (2016-03-28 08:56:11 +0900) > > > > > > Renesas ARM Based SoC Cleanup for v4.7 > > > > * Remove unnecessary clock-output-names properties from DT > > * Use generic pinctrl properties in DT > > Hi, > > Ok, so this is the second cleanup-labelled branch from you. I'm OK with these > being split out, but we normally don't merge dt changes in the cleanup branch, > we group them with other DT changes. So I've merged this into next/dt. > > If you want to separate out dt cleanups, I'm OK with that. Just don't mix > DT and non-DT cleanups in those branches in the future, so I can still choose > to merge into next/dt. Thanks, understood.
Re: [PATCH] ARM: dts: r8a7791: Don't disable referenced optional clocks
On 04/08, Sjoerd Simons wrote:
> On Thu, 2016-04-07 at 16:21 -0700, Stephen Boyd wrote:
> > On 04/06, Sjoerd Simons wrote:
> > >
> > > Though even so I'm not sure what the convention is for clocks like
> > > these, the r8a7791.dtsi is inconsistent, as some are disabled while
> > > others (e.g. the audio clocks) are 0hz. Would be good to get some
> > > input
> > > on that regardless.
> > >
> > What's the question here?
>
> So the question is how to model unconnected external clocks in device-
> tree.
>
> The dtsi we're loooking at has (in pseudo dt):
>
> device {
> clock-names = "internal", "external";
> clocks = <&internal, &external>
> };
>
> external {
> compatible = "fixed-clock";
> clock-frequency = <12345>;
> status = "disabled";
> };
>
> Before 3e5dd6f6e690048d ("clk: Ignore disabled DT clock providers")
> this apparently worked. Afterwards drivers getting all the clocks would
> fail to probe with -EPROBE_DEFER.
>
> Judging by your comment I assume this way of modelling it is broken
> (and the behaviour caused by the patch is correct)?
>
> And as a follow-up, is modelling unconnected clocks as enabled with a
> frequency of 0hz as my proposed patch does seen as the right way of
> doing things?
>
Right. In the case where the external clk is populated, I imagine
there would be a DT node describing it with the clock-frequency
property if it's a fixed rate clk. If the clk is not populated on
the board, then we would have a "ground" clk node that has a
frequency of 0. This way, if we have some mux clk that is default
connected to the external clk but can switch to some internal clk
it isn't orphaned forever. This is actually a problem for orphan
clk deferral right now.
My head starts to spin when we consider something like expansion
boards that have clk pins on them though. Hopefully for things
like that, we can populate clks with DT overlays and then change
the root hierarchy of the clk tree by swapping out the "ground"
clk for some real clk on the expansion board. The usage of
strings to describe the clk tree is probably going to get us here
though. Fun!
If we can't do this DT design because of backwards compatibility
concerns, then perhaps we need to expand the core to return a
fixed rate of 0 clk whenever clk_get() is called on a provider
that's status = "disabled"? Here's an untested patch to show that
idea.
---8<
diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index fb74dc1f7520..19c3777b1cea 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -3085,6 +3085,17 @@ int of_clk_parent_fill(struct device_node *np, const
char **parents,
}
EXPORT_SYMBOL_GPL(of_clk_parent_fill);
+static void init_disabled_clk_provider(struct device_node *np)
+{
+ struct clk *clk;
+
+ clk = clk_register_fixed_rate(NULL, of_node_full_name(np), NULL, 0, 0);
+ if (IS_ERR(clk))
+ return;
+
+ of_clk_add_provider(np, of_clk_src_simple_get, clk);
+}
+
struct clock_provider {
of_clk_init_cb_t clk_init_cb;
struct device_node *np;
@@ -3150,9 +3161,6 @@ void __init of_clk_init(const struct of_device_id
*matches)
for_each_matching_node_and_match(np, matches, &match) {
struct clock_provider *parent;
- if (!of_device_is_available(np))
- continue;
-
parent = kzalloc(sizeof(*parent), GFP_KERNEL);
if (!parent) {
list_for_each_entry_safe(clk_provider, next,
@@ -3165,7 +3173,18 @@ void __init of_clk_init(const struct of_device_id
*matches)
return;
}
- parent->clk_init_cb = match->data;
+ /*
+* Sometimes DT nodes are status = "disabled" but they're used
+* by other clk providers. In that case we make the disabled
+* provider return fixed rate clks with a frequency of 0 so
+* that nothing is orphaned and drivers can still get all
+* their clks.
+*/
+ if (!of_device_is_available(np)) {
+ parent->clk_init_cb = init_disabled_clk_provider;
+ } else {
+ parent->clk_init_cb = match->data;
+ }
parent->np = of_node_get(np);
list_add_tail(&parent->node, &clk_provider_list);
}
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
Re: [PATCH v2] clk: let clk_disable() return immediately if clk is NULL or error
On 04/08, Masahiro Yamada wrote:
>
>
> This makes our driver programming life easier.
>
>
> For example, let's see drivers/tty/serial/8250/8250_of.c
>
>
> The "clock-frequency" DT property takes precedence over "clocks" property.
> So, it is valid to probe the driver with a NULL pointer for info->clk.
>
>
> if (of_property_read_u32(np, "clock-frequency", &clk)) {
>
> /* Get clk rate through clk driver if present */
> info->clk = devm_clk_get(&ofdev->dev, NULL);
> if (IS_ERR(info->clk)) {
> dev_warn(&ofdev->dev,
> "clk or clock-frequency not defined\n");
> return PTR_ERR(info->clk);
> }
>
> ret = clk_prepare_enable(info->clk);
> if (ret < 0)
> return ret;
>
> clk = clk_get_rate(info->clk);
> }
>
>
> As a result, we need to make sure the clk pointer is valid
> before calling clk_disable_unprepare().
>
>
> If we could support pointer checking in callees, we would be able to
> clean-up lots of clock consumers.
>
>
I'm not sure if you meant to use that example for the error
pointer case? It bails out if clk_get() returns an error pointer.
I'm all for a no-op in clk_disable()/unprepare() when the pointer
is NULL. But when it's an error pointer the driver should be
handling it and bail out before it would ever call enable/prepare
on it or disable/unprepare.
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
Re: [PATCH v2] clk: let clk_disable() return immediately if clk is NULL or error
On 04/08, Ralf Baechle wrote: > > While your argument makes perfect sense, Many clk_disable implementations > are already doing similar checks, for example: > > arch/arm/mach-davinci/clock.c: > [...] > > So should we go and weed out these checks? Yes, it would be nice to at least make the differing implementations of the clk API consistent. Of course, we should really put our efforts towards getting rid of the non-CCF implementations instead so that there's less confusion overall. -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project
Re: [PATCH v2] clk: let clk_disable() return immediately if clk is NULL or error
Hi Stephen,
2016-04-14 9:33 GMT+09:00 Stephen Boyd :
> On 04/08, Masahiro Yamada wrote:
>>
>>
>> This makes our driver programming life easier.
>>
>>
>> For example, let's see drivers/tty/serial/8250/8250_of.c
>>
>>
>> The "clock-frequency" DT property takes precedence over "clocks" property.
>> So, it is valid to probe the driver with a NULL pointer for info->clk.
>>
>>
>> if (of_property_read_u32(np, "clock-frequency", &clk)) {
>>
>> /* Get clk rate through clk driver if present */
>> info->clk = devm_clk_get(&ofdev->dev, NULL);
>> if (IS_ERR(info->clk)) {
>> dev_warn(&ofdev->dev,
>> "clk or clock-frequency not defined\n");
>> return PTR_ERR(info->clk);
>> }
>>
>> ret = clk_prepare_enable(info->clk);
>> if (ret < 0)
>> return ret;
>>
>> clk = clk_get_rate(info->clk);
>> }
>>
>>
>> As a result, we need to make sure the clk pointer is valid
>> before calling clk_disable_unprepare().
>>
>>
>> If we could support pointer checking in callees, we would be able to
>> clean-up lots of clock consumers.
>>
>>
>
> I'm not sure if you meant to use that example for the error
> pointer case? It bails out if clk_get() returns an error pointer.
>
> I'm all for a no-op in clk_disable()/unprepare() when the pointer
> is NULL. But when it's an error pointer the driver should be
> handling it and bail out before it would ever call enable/prepare
> on it or disable/unprepare.
Let me explain my original idea.
We do various initialization in a probe method,
so we (OK, I) sometimes want to split init code
into some helper function(s) like this:
static int foo_clk_init(struct platform_device *pdev,
struct foo_priv *priv)
{
int ret;
priv->clk = devm_clk_get(&pdev->dev, NULL); /* case 1 */
if (IS_ERR(priv->clk)) {
dev_err(&pdev->dev, "falied to get clk\n");
return PTR_ERR(priv->clk);
}
ret = clk_prepare_enable(priv->clk); /* case 2 */
if (ret < 0) {
dev_err(&pdev->dev, "falied to enable clk\n");
return ret;
}
priv->clk_rate = clk_get_rate(priv->clk);/* case 3 */
if (!priv->clk_rate) {
dev_err(&pdev->dev, "clk rate should not be zero\n");
return -EINVAL;
}
[ do something ]
return 0;
}
static int foo_probe(struct platform_device *pdev)
{
[memory allocation, OF parse, various init ]
ret = foo_clk_init(pdev, priv);
if (ret < 0)
goto err;
ret = foo_blahblah_init(pdev, priv) /* case 4 */
ir (ret < 0)
goto err;
[ more initialization ... ]
return 0;
err:
clk_disable_unprepare(priv->clk);
return ret;
}
There are some failure paths in this example.
[1] If case 1 fails, priv->clk contains an error pointer.
We should not do clk_disable_unprepare().
[2] If case 2 fails, priv->clk contains a valid pointer,
but we should not do clk_disable_unprepare().
[3] If case 3 fails, priv->clk contains a valid pointer,
and we should do clk_disable_unprepare().
[4] If case 4 fails, priv->clk contains a valid pointer,
and we should do clk_disable_unprepare().
My difficulty is that [1]-[3] are contained in one helper function.
(A real example is drivers/i2c/busses/i2c-uniphier.c)
If foo_clk_init() fails for reason [1],
I want clk_disable_unprepare() to just return.
(This is my original intention of this patch.)
If foo_clk_init() fails for reason [3],
I want clk_disable_unprepare() to do its job.
OK, now I notice another problem in my code;
if foo_clk_init() fails for reason [2],
clk_disable() WARN's due to zero enable_count.
if (WARN_ON(core->enable_count == 0))
return;
Perhaps, I got screwed up by splitting clock init stuff
into a helper function.
--
Best Regards
Masahiro Yamada
Re: [PATCH RESEND] net: ethernet: renesas: ravb_main: test clock rate to avoid division by 0
From: Wolfram Sang Date: Fri, 8 Apr 2016 13:28:42 +0200 > From: Wolfram Sang > > The clk API may return 0 on clk_get_rate, so we should check the result before > using it as a divisor. > > Signed-off-by: Wolfram Sang > Acked-by: Sergei Shtylyov Applied.
Re: [PATCH] ravb: make ravb_ptp_interrupt() *void*
From: Sergei Shtylyov Date: Sun, 10 Apr 2016 23:55:15 +0300 > When we have the ISS.CGIS bit set, we already know that gPTP interrupt has > happened, so an extra GIS register check at the end of ravb_ptp_interrupt() > seems superfluous. We can model the gPTP interrupt handler like all other > dedicated interrupt handlers in the driver and make it *void*. > > Signed-off-by: Sergei Shtylyov Applied, thanks.
[PATCH 0/4] ASoC: add graph base connection on simple-card
Hi Mark
Current simple-card is using "sound-dai" base connection on DT,
but V4L2 is using graph base connection.
For example HDMI case, we would like to use both connection.
To above confusable connection method, and to reuse current resource,
this patch adds new function, and detect both "sound-dai" and "remote-endpoint"
on simple-card. like this
sound {
compatible = "simple-audio-card";
...
sndcpu: simple-audio-card,cpu {
sound-dai = <&xxx>;
};
sndcodec: simple-audio-card,codec {
=> remote-endpoint = <&out_hdmi>;
};
};
xxx {
...
ports {
...
port@0 {
reg = <0>;
out_rgb: endpoint {
};
};
port@1 {
reg = <1>;
=> out_hdmi: endpoint {
};
};
...
};
};
Kuninori Morimoto (4):
of_graph: add of_graph_get_endpoint_count()
ASoC: add of_parse_snd_connection_with_args() for sound-dai/graph
connection
ASoC: snd_soc_of_get_dai_name() uses
of_parse_snd_soc_connection_with_args()
ASoC: simple-card: probe both sound-dai and remote-endpoint
Documentation/devicetree/bindings/sound/simple-card.txt | 19
+++
include/linux/of_graph.h| 11 +++
include/sound/soc.h | 2 ++
sound/soc/generic/simple-card.c | 9 ++---
sound/soc/soc-core.c| 45
+++--
5 files changed, 81 insertions(+), 5 deletions(-)
[PATCH 1/4] of_graph: add of_graph_get_endpoint_count()
From: Kuninori Morimoto
same as of_get_child_count()
Signed-off-by: Kuninori Morimoto
---
include/linux/of_graph.h | 11 +++
1 file changed, 11 insertions(+)
diff --git a/include/linux/of_graph.h b/include/linux/of_graph.h
index f8bcd0e..4b9c3c5 100644
--- a/include/linux/of_graph.h
+++ b/include/linux/of_graph.h
@@ -91,4 +91,15 @@ static inline struct device_node *of_graph_get_remote_port(
#endif /* CONFIG_OF */
+static inline int of_graph_get_endpoint_count(const struct device_node *np)
+{
+ struct device_node *child;
+ int num = 0;
+
+ for_each_endpoint_of_node(np, child)
+ num++;
+
+ return num;
+}
+
#endif /* __LINUX_OF_GRAPH_H */
--
1.9.1
[PATCH 3/4] ASoC: snd_soc_of_get_dai_name() uses of_parse_snd_soc_connection_with_args()
From: Kuninori Morimoto Signed-off-by: Kuninori Morimoto --- sound/soc/soc-core.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c index 643b244..fed5076 100644 --- a/sound/soc/soc-core.c +++ b/sound/soc/soc-core.c @@ -3887,8 +3887,7 @@ int snd_soc_of_get_dai_name(struct device_node *of_node, struct of_phandle_args args; int ret; - ret = of_parse_phandle_with_args(of_node, "sound-dai", -"#sound-dai-cells", 0, &args); + ret = of_parse_snd_soc_connection_with_args(of_node, &args); if (ret) return ret; -- 1.9.1
[PATCH 2/4] ASoC: add of_parse_snd_connection_with_args() for sound-dai/graph connection
From: Kuninori Morimoto
Current ASoC card connection is based on "sound-dai" on DT,
but V4L2 connection is using graph base.
This patch adds common function which can detect both connection.
Signed-off-by: Kuninori Morimoto
---
include/sound/soc.h | 2 ++
sound/soc/soc-core.c | 42 ++
2 files changed, 44 insertions(+)
diff --git a/include/sound/soc.h b/include/sound/soc.h
index 02b4a21..17ddc25 100644
--- a/include/sound/soc.h
+++ b/include/sound/soc.h
@@ -1669,6 +1669,8 @@ unsigned int snd_soc_of_parse_daifmt(struct device_node
*np,
const char *prefix,
struct device_node **bitclkmaster,
struct device_node **framemaster);
+int of_parse_snd_soc_connection_with_args(const struct device_node *np,
+ struct of_phandle_args *out_args);
int snd_soc_of_get_dai_name(struct device_node *of_node,
const char **dai_name);
int snd_soc_of_get_dai_link_codecs(struct device *dev,
diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c
index d2e62b15..643b244 100644
--- a/sound/soc/soc-core.c
+++ b/sound/soc/soc-core.c
@@ -34,6 +34,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -3839,6 +3840,47 @@ static int snd_soc_get_dai_name(struct of_phandle_args
*args,
return ret;
}
+int of_parse_snd_soc_connection_with_args(const struct device_node *np,
+ struct of_phandle_args *out_args)
+{
+ int ret;
+
+ ret = of_parse_phandle_with_args(np, "sound-dai",
+"#sound-dai-cells", 0, out_args);
+ if (ret) {
+ struct device_node *p_node = NULL;
+ struct device_node *ep_node = NULL;
+ struct of_endpoint ep;
+
+ /* try graph base parse */
+ p_node = of_graph_get_remote_port_parent(np);
+ if (!p_node)
+ return -EINVAL;
+
+ ep_node = of_graph_get_remote_port(np);
+ if (!p_node) {
+ ret = -EINVAL;
+ goto graph_err_parent;
+ }
+
+ ret = of_graph_parse_endpoint(ep_node, &ep);
+ if (ret < 0)
+ goto graph_err_endpoint;
+
+ out_args->np= p_node;
+ out_args->args_count= (1 !=
of_graph_get_endpoint_count(p_node));
+ out_args->args[0] = ep.port;
+
+graph_err_endpoint:
+ of_node_put(ep_node);
+graph_err_parent:
+ of_node_put(p_node);
+ }
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(of_parse_snd_soc_connection_with_args);
+
int snd_soc_of_get_dai_name(struct device_node *of_node,
const char **dai_name)
{
--
1.9.1
[PATCH 4/4] ASoC: simple-card: probe both sound-dai and remote-endpoint
From: Kuninori Morimoto
Current simple-card can probe "sound-dai" base connection on DT.
OTOH, V4L2 soc is using graph base connection. Because of this
different style, DT will be confusable if it support both
video/sound in same time.
This patch enables both "sound-dai" (= current simple-card style)
and "remote-endpoint" (= current V4L2 style) on simple-card.
sound {
compatible = "simple-audio-card";
...
sndcpu: simple-audio-card,cpu {
sound-dai = <&>;
};
sndcodec: simple-audio-card,codec {
remote-endpoint = <&>;
};
};
Signed-off-by: Kuninori Morimoto
---
.../devicetree/bindings/sound/simple-card.txt | 19 +++
sound/soc/generic/simple-card.c | 9 ++---
2 files changed, 25 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/sound/simple-card.txt
b/Documentation/devicetree/bindings/sound/simple-card.txt
index cf3979e..030edca 100644
--- a/Documentation/devicetree/bindings/sound/simple-card.txt
+++ b/Documentation/devicetree/bindings/sound/simple-card.txt
@@ -70,6 +70,7 @@ properties should also be placed in the codec node if needed.
Required CPU/CODEC subnodes properties:
- sound-dai: phandle and port of CPU/CODEC
+- remote-endpoint : graph endpoint of CPU/CODEC
Optional CPU/CODEC subnodes properties:
@@ -162,3 +163,21 @@ sound {
};
};
};
+
+Example 3 - sound-dai and remote-endpoint
+
+rsnd_ak4613: sound {
+ compatible = "simple-audio-card";
+
+ simple-audio-card,name = "R-Sound";
+ simple-audio-card,format = "left_j";
+ simple-audio-card,bitclock-master = <&sndcpu>;
+ simple-audio-card,frame-master = <&sndcpu>;
+
+ sndcpu: simple-audio-card,cpu {
+ sound-dai = <&rcar_sound 1>;
+ };
+ sndcodec: simple-audio-card,codec {
+ remote-endpoint = <&du_out_hdmi0>;
+ };
+};
diff --git a/sound/soc/generic/simple-card.c b/sound/soc/generic/simple-card.c
index 2389ab4..a1d6001 100644
--- a/sound/soc/generic/simple-card.c
+++ b/sound/soc/generic/simple-card.c
@@ -14,6 +14,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -224,11 +225,13 @@ asoc_simple_card_sub_parse_of(struct device_node *np,
int ret;
/*
-* Get node via "sound-dai = <&phandle port>"
+* Get node via
+* sound-dai = <&phandle port>
+* or
+* remote-endpoint = <&phandle>
* it will be used as xxx_of_node on soc_bind_dai_link()
*/
- ret = of_parse_phandle_with_args(np, "sound-dai",
-"#sound-dai-cells", 0, &args);
+ ret = of_parse_snd_soc_connection_with_args(np, &args);
if (ret)
return ret;
--
1.9.1
Re: [alsa-devel] [PATCH 2/4] ASoC: add of_parse_snd_connection_with_args() for sound-dai/graph connection
Hi Kuninori,
[auto build test WARNING on asoc/for-next]
[also build test WARNING on v4.6-rc3 next-20160413]
[if your patch is applied to the wrong git tree, please drop us a note to help
improving the system]
url:
https://github.com/0day-ci/linux/commits/Kuninori-Morimoto/ASoC-add-graph-base-connection-on-simple-card/20160414-135303
base: https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
for-next
config: x86_64-randconfig-x013-201615 (attached as .config)
reproduce:
# save the attached .config to linux build tree
make ARCH=x86_64
All warnings (new ones prefixed by >>):
sound/soc/soc-core.c: In function 'of_parse_snd_soc_connection_with_args':
>> sound/soc/soc-core.c:3848:35: warning: passing argument 1 of
>> 'of_parse_phandle_with_args' discards 'const' qualifier from pointer target
>> type [-Wdiscarded-qualifiers]
ret = of_parse_phandle_with_args(np, "sound-dai",
^
In file included from sound/soc/soc-core.c:36:0:
include/linux/of.h:588:19: note: expected 'struct device_node *' but
argument is of type 'const struct device_node *'
static inline int of_parse_phandle_with_args(struct device_node *np,
^
vim +3848 sound/soc/soc-core.c
3832 *dai_name = pos->dai_drv[id].name;
3833 if (!*dai_name)
3834 *dai_name = pos->name;
3835 }
3836
3837 break;
3838 }
3839 mutex_unlock(&client_mutex);
3840 return ret;
3841 }
3842
3843 int of_parse_snd_soc_connection_with_args(const struct device_node *np,
3844struct of_phandle_args
*out_args)
3845 {
3846 int ret;
3847
> 3848 ret = of_parse_phandle_with_args(np, "sound-dai",
3849 "#sound-dai-cells", 0,
out_args);
3850 if (ret) {
3851 struct device_node *p_node = NULL;
3852 struct device_node *ep_node = NULL;
3853 struct of_endpoint ep;
3854
3855 /* try graph base parse */
3856 p_node = of_graph_get_remote_port_parent(np);
---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
.config.gz
Description: Binary data
