[PATCH v3 05/10] v4l: fdp1: vb2_queue dev conversion
From: Geert Uytterhoeven
drivers/media/platform/rcar_fdp1.c:1972:2: warning: initialization from
incompatible pointer type
.queue_setup = fdp1_queue_setup,
^
drivers/media/platform/rcar_fdp1.c:1972:2: warning: (near initialization
for 'fdp1_qops.queue_setup')
drivers/media/platform/rcar_fdp1.c: In function 'fdp1_probe':
drivers/media/platform/rcar_fdp1.c:2264:2: error: implicit declaration of
function 'vb2_dma_contig_init_ctx' [-Werror=implicit-function-declaration]
fdp1->alloc_ctx = vb2_dma_contig_init_ctx(&pdev->dev);
^
drivers/media/platform/rcar_fdp1.c:2264:18: warning: assignment makes
pointer from integer without a cast
fdp1->alloc_ctx = vb2_dma_contig_init_ctx(&pdev->dev);
^
drivers/media/platform/rcar_fdp1.c:2331:2: error: implicit declaration of
function 'vb2_dma_contig_cleanup_ctx' [-Werror=implicit-function-declaration]
vb2_dma_contig_cleanup_ctx(fdp1->alloc_ctx);
^
Commit 36c0f8b32c4bd4f6 ("[media] vb2: replace void *alloc_ctxs by
struct device *alloc_devs") removed the vb2_dma_contig_init_ctx() and
vb2_dma_contig_cleanup_ctx() functions, and changed the prototype of
vb2_ops.queue_setup().
To fix this:
- Update the signature of fdp1_queue_setup(),
- Convert the FDP1 driver to use the new vb2_queue dev field, cfr.
commit 53ddcc683faef8c7 ("[media] media/platform: convert drivers to
use the new vb2_queue dev field").
Signed-off-by: Geert Uytterhoeven
---
drivers/media/platform/rcar_fdp1.c | 26 ++
1 file changed, 6 insertions(+), 20 deletions(-)
diff --git a/drivers/media/platform/rcar_fdp1.c
b/drivers/media/platform/rcar_fdp1.c
index c7280183262a..a2587745ca68 100644
--- a/drivers/media/platform/rcar_fdp1.c
+++ b/drivers/media/platform/rcar_fdp1.c
@@ -570,7 +570,6 @@ struct fdp1_dev {
void __iomem*regs;
unsigned intirq;
struct device *dev;
- void*alloc_ctx;
/* Job Queues */
struct fdp1_job jobs[FDP1_NUMBER_JOBS];
@@ -1788,7 +1787,8 @@ static const struct v4l2_ioctl_ops fdp1_ioctl_ops = {
static int fdp1_queue_setup(struct vb2_queue *vq,
unsigned int *nbuffers, unsigned int *nplanes,
- unsigned int sizes[], void *alloc_ctxs[])
+ unsigned int sizes[],
+ struct device *alloc_ctxs[])
{
struct fdp1_ctx *ctx = vb2_get_drv_priv(vq);
struct fdp1_q_data *q_data;
@@ -1800,18 +1800,13 @@ static int fdp1_queue_setup(struct vb2_queue *vq,
if (*nplanes > FDP1_MAX_PLANES)
return -EINVAL;
- for (i = 0; i < *nplanes; i++)
- alloc_ctxs[i] = ctx->fdp1->alloc_ctx;
-
return 0;
}
*nplanes = q_data->format.num_planes;
- for (i = 0; i < *nplanes; i++) {
+ for (i = 0; i < *nplanes; i++)
sizes[i] = q_data->format.plane_fmt[i].sizeimage;
- alloc_ctxs[i] = ctx->fdp1->alloc_ctx;
- }
return 0;
}
@@ -1992,6 +1987,7 @@ static int queue_init(void *priv, struct vb2_queue
*src_vq,
src_vq->mem_ops = &vb2_dma_contig_memops;
src_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY;
src_vq->lock = &ctx->fdp1->dev_mutex;
+ src_vq->dev = ctx->fdp1->dev;
ret = vb2_queue_init(src_vq);
if (ret)
@@ -2005,6 +2001,7 @@ static int queue_init(void *priv, struct vb2_queue
*src_vq,
dst_vq->mem_ops = &vb2_dma_contig_memops;
dst_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY;
dst_vq->lock = &ctx->fdp1->dev_mutex;
+ dst_vq->dev = ctx->fdp1->dev;
return vb2_queue_init(dst_vq);
}
@@ -2260,18 +2257,11 @@ static int fdp1_probe(struct platform_device *pdev)
fdp1->clk_rate = clk_get_rate(clk);
clk_put(clk);
- /* Memory allocation contexts */
- fdp1->alloc_ctx = vb2_dma_contig_init_ctx(&pdev->dev);
- if (IS_ERR(fdp1->alloc_ctx)) {
- v4l2_err(&fdp1->v4l2_dev, "Failed to init memory allocator\n");
- return PTR_ERR(fdp1->alloc_ctx);
- }
-
/* V4L2 device registration */
ret = v4l2_device_register(&pdev->dev, &fdp1->v4l2_dev);
if (ret) {
v4l2_err(&fdp1->v4l2_dev, "Failed to register video device\n");
- goto vb2_allocator_rollback;
+ return ret;
}
/* M2M registration */
@@ -2327,9 +2317,6 @@ release_m2m:
unreg_dev:
v4l2_device_unregister(&fdp1->v4l2_dev);
-vb2_allocator_rollback:
- vb2_dma_contig_cleanup_ctx(fdp1->alloc_ctx);
-
return ret;
}
@@ -2340,7 +2327,6 @@ static int fdp1_remove(struct platform_device *pdev)
v4l2_m2m_release(fdp1->m2m_dev);
video_unregister_device(&fdp1->vfd);
v4l2_device_unregister(&fdp1-
[PATCH v3 04/10] v4l: Add Renesas R-Car FDP1 Driver
From: Kieran Bingham The FDP1 driver performs advanced de-interlacing on a memory 2 memory based video stream, and supports conversion from YCbCr/YUV to RGB pixel formats Signed-off-by: Kieran Bingham --- MAINTAINERS|9 + drivers/media/platform/Kconfig | 13 + drivers/media/platform/Makefile|1 + drivers/media/platform/rcar_fdp1.c | 2395 4 files changed, 2418 insertions(+) create mode 100644 drivers/media/platform/rcar_fdp1.c diff --git a/MAINTAINERS b/MAINTAINERS index 0a16a820fd56..ab277e64aa1c 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -7498,6 +7498,15 @@ F: Documentation/devicetree/bindings/media/renesas,fcp.txt F: drivers/media/platform/rcar-fcp.c F: include/media/rcar-fcp.h +MEDIA DRIVERS FOR RENESAS - FDP1 +M: Kieran Bingham +L: linux-me...@vger.kernel.org +L: linux-renesas-soc@vger.kernel.org +T: git git://linuxtv.org/media_tree.git +S: Supported +F: Documentation/devicetree/bindings/media/renesas,fdp1.txt +F: drivers/media/platform/rcar_fdp1.c + MEDIA DRIVERS FOR RENESAS - VSP1 M: Laurent Pinchart L: linux-me...@vger.kernel.org diff --git a/drivers/media/platform/Kconfig b/drivers/media/platform/Kconfig index 46f14ddeee65..161cb40949c2 100644 --- a/drivers/media/platform/Kconfig +++ b/drivers/media/platform/Kconfig @@ -266,6 +266,19 @@ config VIDEO_SH_VEU Support for the Video Engine Unit (VEU) on SuperH and SH-Mobile SoCs. +config VIDEO_RENESAS_FDP1 + tristate "Renesas Fine Display Processor" + depends on VIDEO_DEV && VIDEO_V4L2 && HAS_DMA + depends on ARCH_SHMOBILE || COMPILE_TEST + select VIDEOBUF2_DMA_CONTIG + select V4L2_MEM2MEM_DEV + ---help--- + This is a V4L2 driver for the Renesas Fine Display Processor + providing colour space conversion, and de-interlacing features. + + To compile this driver as a module, choose M here: the module + will be called rcar_fdp1. + config VIDEO_RENESAS_JPU tristate "Renesas JPEG Processing Unit" depends on VIDEO_DEV && VIDEO_V4L2 && HAS_DMA diff --git a/drivers/media/platform/Makefile b/drivers/media/platform/Makefile index 536d1d8ef022..500d81536350 100644 --- a/drivers/media/platform/Makefile +++ b/drivers/media/platform/Makefile @@ -46,6 +46,7 @@ obj-$(CONFIG_VIDEO_SH_VOU)+= sh_vou.o obj-$(CONFIG_SOC_CAMERA) += soc_camera/ obj-$(CONFIG_VIDEO_RENESAS_FCP)+= rcar-fcp.o +obj-$(CONFIG_VIDEO_RENESAS_FDP1) += rcar_fdp1.o obj-$(CONFIG_VIDEO_RENESAS_JPU)+= rcar_jpu.o obj-$(CONFIG_VIDEO_RENESAS_VSP1) += vsp1/ diff --git a/drivers/media/platform/rcar_fdp1.c b/drivers/media/platform/rcar_fdp1.c new file mode 100644 index ..c7280183262a --- /dev/null +++ b/drivers/media/platform/rcar_fdp1.c @@ -0,0 +1,2395 @@ +/* + * Renesas RCar Fine Display Processor + * + * Video format converter and frame deinterlacer device. + * + * Author: Kieran Bingham, + * Copyright (c) 2016 Renesas Electronics Corporation. + * + * This code is developed and inspired from the vim2m, rcar_jpu, + * m2m-deinterlace, and vsp1 drivers. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the + * License, or (at your option) any later version + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static unsigned int debug; +module_param(debug, uint, 0644); +MODULE_PARM_DESC(debug, "activate debug info"); + +/* Min Width/Height/Height-Field */ +#define FDP1_MIN_W 80U +#define FDP1_MIN_H 80U + +#define FDP1_MAX_W 3840U +#define FDP1_MAX_H 2160U + +#define FDP1_MAX_PLANES3U + +/* Flags that indicate a format can be used for capture/output */ +#define FDP1_CAPTURE BIT(0) +#define FDP1_OUTPUTBIT(1) + +#define DRIVER_NAME"rcar_fdp1" + +/* Number of Job's to have available on the processing queue */ +#define FDP1_NUMBER_JOBS 8 +#define FDP1_NUMBER_BUFFERS ((FDP1_NUMBER_JOBS*2)+1) + +#define dprintk(fdp1, fmt, arg...) \ + v4l2_dbg(1, debug, &fdp1->v4l2_dev, "%s: " fmt, __func__, ## arg) + +/* + * FDP1 registers and bits + */ + +/* FDP1 start register - Imm */ +#define FD1_CTL_CMD0x +#define FD1_CTL_CMD_STRCMD BIT(0) + +/* Sync generator register - Imm */ +#define FD1_CTL_SGCMD 0x0004 +#define FD1_CTL_SGCMD_SGEN BIT(0) + +/* Register set end register - Imm */ +#define FD1_CTL_REGEND 0x0008 +#define FD1_CTL_REGEND_REGEND BIT(0) + +/* Channel activation register - Vup
[PATCH v3 09/10] v4l: fdp1: Fix field validation when preparing buffer
Ensure that the buffer field matches the field configured for the
format.
Signed-off-by: Laurent Pinchart
---
drivers/media/platform/rcar_fdp1.c | 40 +++---
1 file changed, 33 insertions(+), 7 deletions(-)
diff --git a/drivers/media/platform/rcar_fdp1.c
b/drivers/media/platform/rcar_fdp1.c
index 480f89381f15..c25531a919db 100644
--- a/drivers/media/platform/rcar_fdp1.c
+++ b/drivers/media/platform/rcar_fdp1.c
@@ -1884,17 +1884,43 @@ static int fdp1_buf_prepare(struct vb2_buffer *vb)
q_data = get_q_data(ctx, vb->vb2_queue->type);
- /* Default to Progressive if ANY selected */
- if (vbuf->field == V4L2_FIELD_ANY)
- vbuf->field = V4L2_FIELD_NONE;
+ if (V4L2_TYPE_IS_OUTPUT(vb->vb2_queue->type)) {
+ bool field_valid = true;
+
+ /* Validate the buffer field. */
+ switch (q_data->format.field) {
+ case V4L2_FIELD_NONE:
+ if (vbuf->field != V4L2_FIELD_NONE)
+ field_valid = false;
+ break;
+
+ case V4L2_FIELD_ALTERNATE:
+ if (vbuf->field != V4L2_FIELD_TOP &&
+ vbuf->field != V4L2_FIELD_BOTTOM)
+ field_valid = false;
+ break;
- /* We only support progressive CAPTURE */
- if (!V4L2_TYPE_IS_OUTPUT(vb->vb2_queue->type) &&
-vbuf->field != V4L2_FIELD_NONE) {
- dprintk(ctx->fdp1, "field isn't supported on capture\n");
+ case V4L2_FIELD_INTERLACED:
+ case V4L2_FIELD_SEQ_TB:
+ case V4L2_FIELD_SEQ_BT:
+ case V4L2_FIELD_INTERLACED_TB:
+ case V4L2_FIELD_INTERLACED_BT:
+ if (vbuf->field != q_data->format.field)
+ field_valid = false;
+ break;
+ }
+
+ if (!field_valid) {
+ dprintk(ctx->fdp1,
+ "buffer field %u invalid for format field %u\n",
+ vbuf->field, q_data->format.field);
return -EINVAL;
+ }
+ } else {
+ vbuf->field = V4L2_FIELD_NONE;
}
+ /* Validate the planes sizes. */
for (i = 0; i < q_data->format.num_planes; i++) {
unsigned long size = q_data->format.plane_fmt[i].sizeimage;
--
Regards,
Laurent Pinchart
[PATCH v3 08/10] v4l: fdp1: Rewrite format setting code
The handling of the TRY_FMT and S_FMT ioctls isn't correct. In
particular, the sink format isn't propagated to the source format
automatically, the strides are not computed when the device is opened,
and the colorspace handling is wrong.
Rewrite the implementation.
Signed-off-by: Laurent Pinchart
---
drivers/media/platform/rcar_fdp1.c | 324 +++--
1 file changed, 205 insertions(+), 119 deletions(-)
diff --git a/drivers/media/platform/rcar_fdp1.c
b/drivers/media/platform/rcar_fdp1.c
index fdab41165f5a..480f89381f15 100644
--- a/drivers/media/platform/rcar_fdp1.c
+++ b/drivers/media/platform/rcar_fdp1.c
@@ -40,7 +40,7 @@ static unsigned int debug;
module_param(debug, uint, 0644);
MODULE_PARM_DESC(debug, "activate debug info");
-/* Min Width/Height/Height-Field */
+/* Minimum and maximum frame width/height */
#define FDP1_MIN_W 80U
#define FDP1_MIN_H 80U
@@ -48,6 +48,7 @@ MODULE_PARM_DESC(debug, "activate debug info");
#define FDP1_MAX_H 2160U
#define FDP1_MAX_PLANES3U
+#define FDP1_MAX_STRIDE8190U
/* Flags that indicate a format can be used for capture/output */
#define FDP1_CAPTURE BIT(0)
@@ -1506,82 +1507,12 @@ static int fdp1_g_fmt(struct file *file, void *priv,
struct v4l2_format *f)
return 0;
}
-static int __fdp1_try_fmt(struct fdp1_ctx *ctx, const struct fdp1_fmt
**fmtinfo,
- struct v4l2_pix_format_mplane *pix,
- enum v4l2_buf_type type)
+static void fdp1_compute_stride(struct v4l2_pix_format_mplane *pix,
+ const struct fdp1_fmt *fmt)
{
- const struct fdp1_fmt *fmt;
- unsigned int width = pix->width;
- unsigned int height = pix->height;
- unsigned int fmt_type;
unsigned int i;
- fmt_type = V4L2_TYPE_IS_OUTPUT(type) ? FDP1_OUTPUT : FDP1_CAPTURE;
-
- fmt = fdp1_find_format(pix->pixelformat);
- if (!fmt || !(fmt->types & fmt_type))
- fmt = fdp1_find_format(V4L2_PIX_FMT_YUYV);
-
- pix->pixelformat = fmt->fourcc;
-
- /* Manage colorspace on the two queues */
- if (V4L2_TYPE_IS_OUTPUT(type)) {
- if (pix->colorspace == V4L2_COLORSPACE_DEFAULT)
- pix->colorspace = V4L2_COLORSPACE_REC709;
-
- if (pix->ycbcr_enc == V4L2_YCBCR_ENC_DEFAULT)
- pix->ycbcr_enc =
- V4L2_MAP_YCBCR_ENC_DEFAULT(pix->colorspace);
-
- if (pix->quantization == V4L2_QUANTIZATION_DEFAULT)
- pix->quantization =
- V4L2_MAP_QUANTIZATION_DEFAULT(false,
- pix->colorspace,
- pix->ycbcr_enc);
- } else {
- /* Manage the CAPTURE Queue */
- struct fdp1_q_data *src_data = &ctx->out_q;
-
- if (fdp1_fmt_is_rgb(fmt)) {
- pix->colorspace = V4L2_COLORSPACE_SRGB;
- pix->ycbcr_enc = V4L2_YCBCR_ENC_SYCC;
- pix->quantization = V4L2_QUANTIZATION_FULL_RANGE;
- } else {
- /* Copy input queue colorspace across */
- pix->colorspace = src_data->format.colorspace;
- pix->ycbcr_enc = src_data->format.ycbcr_enc;
- pix->quantization = src_data->format.quantization;
- }
- }
-
- /* We should be allowing FIELDS through on the Output queue !*/
- if (V4L2_TYPE_IS_OUTPUT(type)) {
- /* Clamp to allowable field types */
- if (pix->field == V4L2_FIELD_ANY ||
- pix->field == V4L2_FIELD_NONE)
- pix->field = V4L2_FIELD_NONE;
- else if (!V4L2_FIELD_HAS_BOTH(pix->field))
- pix->field = V4L2_FIELD_INTERLACED;
-
- dprintk(ctx->fdp1, "Output Field Type set as %d\n", pix->field);
- } else {
- pix->field = V4L2_FIELD_NONE;
- }
-
- pix->num_planes = fmt->num_planes;
-
- /* Align the width and height for YUV 4:2:2 and 4:2:0 formats. */
- width = round_down(width, fmt->hsub);
- height = round_down(height, fmt->vsub);
-
- /* Clamp the width and height */
- pix->width = clamp(width, FDP1_MIN_W, FDP1_MAX_W);
- pix->height = clamp(height, FDP1_MIN_H, FDP1_MAX_H);
-
- /* Compute and clamp the stride and image size. While not documented in
-* the datasheet, strides not aligned to a multiple of 128 bytes result
-* in image corruption.
-*/
+ /* Compute and clamp the stride and image size. */
for (i = 0; i < min_t(unsigned int, fmt->num_planes, 2U); ++i) {
unsigned int hsub = i > 0 ? fmt->hsub : 1;
unsigned int vsub = i > 0 ? fmt->vsub : 1;
@@ -
[PATCH v3 07/10] v4l: fdp1: Remove unused struct fdp1_v4l2_buffer
The structure is not used, remove it.
Signed-off-by: Laurent Pinchart
---
drivers/media/platform/rcar_fdp1.c | 13 -
1 file changed, 13 deletions(-)
diff --git a/drivers/media/platform/rcar_fdp1.c
b/drivers/media/platform/rcar_fdp1.c
index bbeacf1527b5..fdab41165f5a 100644
--- a/drivers/media/platform/rcar_fdp1.c
+++ b/drivers/media/platform/rcar_fdp1.c
@@ -514,19 +514,6 @@ enum fdp1_deint_mode {
mode == FDP1_PREVFIELD)
/*
- * fdp1_v4l2_buffer: Track v4l2_buffers with a reference count
- *
- * As buffers come in, they may be used for more than one field.
- * It then becomes necessary to track the usage of these buffers,
- * and only release when the last job has completed using this
- * vb buffer.
- */
-struct fdp1_v4l2_buffer {
- struct vb2_v4l2_buffer vb;
- struct list_headlist;
-};
-
-/*
* FDP1 operates on potentially 3 fields, which are tracked
* from the VB buffers using this context structure.
* Will always be a field or a full frame, never two fields.
--
Regards,
Laurent Pinchart
[PATCH v3 06/10] v4l: fdp1: Incorporate miscellaneous review comments
- Constify data tables
- Add missing break in switch statement
- Use struct video_device::device_caps
- Don't set read-only flag manually for V4L2_CID_MIN_BUFFERS_FOR_CAPTURE
- Use V4L2_YCBCR_ENC_709 instead of V4L2_COLORSPACE_REC709 for ycbcr_enc
- Fix handling of V4L2_FIELD_INTERLACED
- Use the standard V4L2_CID_DEINTERLACER_MODE control
- Add missing white space
Signed-off-by: Laurent Pinchart
---
drivers/media/platform/rcar_fdp1.c | 111 +
1 file changed, 52 insertions(+), 59 deletions(-)
diff --git a/drivers/media/platform/rcar_fdp1.c
b/drivers/media/platform/rcar_fdp1.c
index a2587745ca68..bbeacf1527b5 100644
--- a/drivers/media/platform/rcar_fdp1.c
+++ b/drivers/media/platform/rcar_fdp1.c
@@ -297,108 +297,108 @@ struct fdp1_fmt {
static const struct fdp1_fmt fdp1_formats[] = {
/* RGB formats are only supported by the Write Pixel Formatter */
- { V4L2_PIX_FMT_RGB332, { 8, 0, 0}, 1, 1, 1, 0x00, false, false,
+ { V4L2_PIX_FMT_RGB332, { 8, 0, 0 }, 1, 1, 1, 0x00, false, false,
FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
FD1_RWPF_SWAP_WORD | FD1_RWPF_SWAP_BYTE,
FDP1_CAPTURE },
- { V4L2_PIX_FMT_XRGB444, { 16, 0, 0}, 1, 1, 1, 0x01, false, false,
+ { V4L2_PIX_FMT_XRGB444, { 16, 0, 0 }, 1, 1, 1, 0x01, false, false,
FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
FD1_RWPF_SWAP_WORD,
FDP1_CAPTURE },
- { V4L2_PIX_FMT_XRGB555, { 16, 0, 0}, 1, 1, 1, 0x04, false, false,
+ { V4L2_PIX_FMT_XRGB555, { 16, 0, 0 }, 1, 1, 1, 0x04, false, false,
FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
FD1_RWPF_SWAP_WORD,
FDP1_CAPTURE },
- { V4L2_PIX_FMT_RGB565, { 16, 0, 0}, 1, 1, 1, 0x06, false, false,
+ { V4L2_PIX_FMT_RGB565, { 16, 0, 0 }, 1, 1, 1, 0x06, false, false,
FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
FD1_RWPF_SWAP_WORD,
FDP1_CAPTURE },
- { V4L2_PIX_FMT_ABGR32, { 32, 0, 0}, 1, 1, 1, 0x13, false, false,
+ { V4L2_PIX_FMT_ABGR32, { 32, 0, 0 }, 1, 1, 1, 0x13, false, false,
FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD,
FDP1_CAPTURE },
- { V4L2_PIX_FMT_XBGR32, { 32, 0, 0}, 1, 1, 1, 0x13, false, false,
+ { V4L2_PIX_FMT_XBGR32, { 32, 0, 0 }, 1, 1, 1, 0x13, false, false,
FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD,
FDP1_CAPTURE },
- { V4L2_PIX_FMT_ARGB32, { 32, 0, 0}, 1, 1, 1, 0x13, false, false,
+ { V4L2_PIX_FMT_ARGB32, { 32, 0, 0 }, 1, 1, 1, 0x13, false, false,
FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
FD1_RWPF_SWAP_WORD | FD1_RWPF_SWAP_BYTE,
FDP1_CAPTURE },
- { V4L2_PIX_FMT_XRGB32, { 32, 0, 0}, 1, 1, 1, 0x13, false, false,
+ { V4L2_PIX_FMT_XRGB32, { 32, 0, 0 }, 1, 1, 1, 0x13, false, false,
FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
FD1_RWPF_SWAP_WORD | FD1_RWPF_SWAP_BYTE,
FDP1_CAPTURE },
- { V4L2_PIX_FMT_RGB24, { 24, 0, 0}, 1, 1, 1, 0x15, false, false,
+ { V4L2_PIX_FMT_RGB24, { 24, 0, 0 }, 1, 1, 1, 0x15, false, false,
FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
FD1_RWPF_SWAP_WORD | FD1_RWPF_SWAP_BYTE,
FDP1_CAPTURE },
- { V4L2_PIX_FMT_BGR24, { 24, 0, 0}, 1, 1, 1, 0x18, false, false,
+ { V4L2_PIX_FMT_BGR24, { 24, 0, 0 }, 1, 1, 1, 0x18, false, false,
FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
FD1_RWPF_SWAP_WORD | FD1_RWPF_SWAP_BYTE,
FDP1_CAPTURE },
- { V4L2_PIX_FMT_ARGB444, { 16, 0, 0}, 1, 1, 1, 0x19, false, false,
+ { V4L2_PIX_FMT_ARGB444, { 16, 0, 0 }, 1, 1, 1, 0x19, false, false,
FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
FD1_RWPF_SWAP_WORD,
FDP1_CAPTURE },
- { V4L2_PIX_FMT_ARGB555, { 16, 0, 0}, 1, 1, 1, 0x1b, false, false,
+ { V4L2_PIX_FMT_ARGB555, { 16, 0, 0 }, 1, 1, 1, 0x1b, false, false,
FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
FD1_RWPF_SWAP_WORD,
FDP1_CAPTURE },
/* YUV Formats are supported by Read and Write Pixel Formatters */
- { V4L2_PIX_FMT_NV16M, { 8, 16, 0}, 2, 2, 1, 0x41, false, false,
+ { V4L2_PIX_FMT_NV16M, { 8, 16, 0 }, 2, 2, 1, 0x41, false, false,
FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
FD1_RWPF_SWAP_WORD | FD1_RWPF_SWAP_BYTE,
FDP1_CAPTURE | FDP1_OUTPUT },
- { V4L2_PIX_FMT_NV61M, { 8, 16, 0}, 2, 2, 1, 0x41, false, true,
+ { V4L2_PIX_FMT_NV61M, { 8, 16, 0 }, 2, 2, 1, 0x41, false, true,
FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
FD1_RWPF_SWAP_WORD | FD1_RWPF_SWAP_BYTE,
FDP1_CAPTURE | FDP1_OUTPUT },
- { V4L2_PIX_FMT_NV12M, { 8, 16, 0}, 2, 2, 2, 0x42, false, false,
+ { V4L2_PIX_FMT_NV12M, { 8, 16, 0 }, 2, 2, 2, 0x42, false, false,
FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
FD1_RWPF_SWAP_WORD | FD1_RWPF_SWAP_BYTE,
FDP1_CAPTURE | FDP1_OUTPUT },
- { V4L2_PIX_FMT_NV21M, { 8, 16, 0
[PATCH v3 02/10] v4l: ctrls: Add deinterlacing mode control
The menu control selects the operation mode of a video deinterlacer. The
menu entries are driver specific.
Signed-off-by: Laurent Pinchart
---
Documentation/media/uapi/v4l/extended-controls.rst | 4
drivers/media/v4l2-core/v4l2-ctrls.c | 2 ++
include/uapi/linux/v4l2-controls.h | 1 +
3 files changed, 7 insertions(+)
diff --git a/Documentation/media/uapi/v4l/extended-controls.rst
b/Documentation/media/uapi/v4l/extended-controls.rst
index 1f1518e4859d..8e6314e23cd3 100644
--- a/Documentation/media/uapi/v4l/extended-controls.rst
+++ b/Documentation/media/uapi/v4l/extended-controls.rst
@@ -4250,6 +4250,10 @@ Image Process Control IDs
test pattern images. These hardware specific test patterns can be
used to test if a device is working properly.
+``V4L2_CID_DEINTERLACING_MODE (menu)``
+The video deinterlacing mode (such as Bob, Weave, ...). The menu items are
+driver specific.
+
.. _dv-controls:
diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c
b/drivers/media/v4l2-core/v4l2-ctrls.c
index adc2147fcff7..47001e25fd9e 100644
--- a/drivers/media/v4l2-core/v4l2-ctrls.c
+++ b/drivers/media/v4l2-core/v4l2-ctrls.c
@@ -885,6 +885,7 @@ const char *v4l2_ctrl_get_name(u32 id)
case V4L2_CID_LINK_FREQ:return "Link Frequency";
case V4L2_CID_PIXEL_RATE: return "Pixel Rate";
case V4L2_CID_TEST_PATTERN: return "Test Pattern";
+ case V4L2_CID_DEINTERLACING_MODE: return "Deinterlacing Mode";
/* DV controls */
/* Keep the order of the 'case's the same as in v4l2-controls.h! */
@@ -1058,6 +1059,7 @@ void v4l2_ctrl_fill(u32 id, const char **name, enum
v4l2_ctrl_type *type,
case V4L2_CID_DV_RX_RGB_RANGE:
case V4L2_CID_DV_RX_IT_CONTENT_TYPE:
case V4L2_CID_TEST_PATTERN:
+ case V4L2_CID_DEINTERLACING_MODE:
case V4L2_CID_TUNE_DEEMPHASIS:
case V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_SEL:
case V4L2_CID_DETECT_MD_MODE:
diff --git a/include/uapi/linux/v4l2-controls.h
b/include/uapi/linux/v4l2-controls.h
index b6a357a5f053..0d2e1e01fbd5 100644
--- a/include/uapi/linux/v4l2-controls.h
+++ b/include/uapi/linux/v4l2-controls.h
@@ -892,6 +892,7 @@ enum v4l2_jpeg_chroma_subsampling {
#define V4L2_CID_LINK_FREQ (V4L2_CID_IMAGE_PROC_CLASS_BASE
+ 1)
#define V4L2_CID_PIXEL_RATE(V4L2_CID_IMAGE_PROC_CLASS_BASE
+ 2)
#define V4L2_CID_TEST_PATTERN (V4L2_CID_IMAGE_PROC_CLASS_BASE
+ 3)
+#define V4L2_CID_DEINTERLACING_MODE(V4L2_CID_IMAGE_PROC_CLASS_BASE
+ 4)
/* DV-class control IDs defined by V4L2 */
--
Regards,
Laurent Pinchart
[PATCH v3 03/10] v4l: Extend FCP compatible list to support the FDP
From: Kieran Bingham
The FCP must be powered up for the FDP1 to function, even when the FDP1
does not make use of the FCNL features. Extend the compatible list
to allow us to use the power domain and runtime-pm support.
Signed-off-by: Kieran Bingham
Acked-by: Laurent Pinchart
Signed-off-by: Laurent Pinchart
---
drivers/media/platform/rcar-fcp.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/media/platform/rcar-fcp.c
b/drivers/media/platform/rcar-fcp.c
index bc50c69ee0c5..7e944479205d 100644
--- a/drivers/media/platform/rcar-fcp.c
+++ b/drivers/media/platform/rcar-fcp.c
@@ -166,6 +166,7 @@ static int rcar_fcp_remove(struct platform_device *pdev)
static const struct of_device_id rcar_fcp_of_match[] = {
{ .compatible = "renesas,fcpv" },
+ { .compatible = "renesas,fcpf" },
{ },
};
--
Regards,
Laurent Pinchart
[PATCH v3 10/10] v4l: fdp1: Store buffer information in vb2 buffer
The struct fdp1_buffer instances are allocated separately from the vb2
buffers, with one instance per field. Simplify the allocation by
splitting the fdp1_buffer structure in per-buffer and per-field data,
and let vb2 allocate the the fdp1_buffer structure.
Signed-off-by: Laurent Pinchart
---
drivers/media/platform/rcar_fdp1.c | 437 ++---
1 file changed, 210 insertions(+), 227 deletions(-)
diff --git a/drivers/media/platform/rcar_fdp1.c
b/drivers/media/platform/rcar_fdp1.c
index c25531a919db..d4101a4fd114 100644
--- a/drivers/media/platform/rcar_fdp1.c
+++ b/drivers/media/platform/rcar_fdp1.c
@@ -473,12 +473,12 @@ static const u8 fdp1_mdet[] = {
/* Per-queue, driver-specific private data */
struct fdp1_q_data {
- const struct fdp1_fmt *fmt;
- struct v4l2_pix_format_mplane format;
+ const struct fdp1_fmt *fmt;
+ struct v4l2_pix_format_mplane format;
- unsigned intvsize;
- unsigned intstride_y;
- unsigned intstride_c;
+ unsigned intvsize;
+ unsigned intstride_y;
+ unsigned intstride_c;
};
static const struct fdp1_fmt *fdp1_find_format(u32 pixelformat)
@@ -519,91 +519,102 @@ enum fdp1_deint_mode {
* from the VB buffers using this context structure.
* Will always be a field or a full frame, never two fields.
*/
-struct fdp1_buffer {
- struct vb2_v4l2_buffer *vb;
- dma_addr_t addrs[3];
+struct fdp1_field_buffer {
+ struct vb2_v4l2_buffer *vb;
+ dma_addr_t addrs[3];
/* Should be NONE:TOP:BOTTOM only */
- enum v4l2_field field;
+ enum v4l2_field field;
/* Flag to indicate this is the last field in the vb */
- boollast_field;
+ boollast_field;
/* Buffer queue lists */
- struct list_headlist;
+ struct list_headlist;
+};
+
+struct fdp1_buffer {
+ struct v4l2_m2m_buffer m2m_buf;
+ struct fdp1_field_bufferfields[2];
+ unsigned intnum_fields;
};
+static inline struct fdp1_buffer *to_fdp1_buffer(struct vb2_v4l2_buffer *vb)
+{
+ return container_of(vb, struct fdp1_buffer, m2m_buf.vb);
+}
+
struct fdp1_job {
/* These could be pointers to save 'memory' and copying */
- struct fdp1_buffer *previous;
- struct fdp1_buffer *active;
- struct fdp1_buffer *next;
- struct fdp1_buffer dst;
+ struct fdp1_field_buffer*previous;
+ struct fdp1_field_buffer*active;
+ struct fdp1_field_buffer*next;
+ struct fdp1_field_buffer*dst;
/* A job can only be on one list at a time */
- struct list_headlist;
+ struct list_headlist;
};
struct fdp1_dev {
- struct v4l2_device v4l2_dev;
- struct video_device vfd;
+ struct v4l2_device v4l2_dev;
+ struct video_device vfd;
- struct mutexdev_mutex;
- spinlock_t irqlock;
- spinlock_t device_process_lock;
+ struct mutexdev_mutex;
+ spinlock_t irqlock;
+ spinlock_t device_process_lock;
- void __iomem*regs;
- unsigned intirq;
- struct device *dev;
+ void __iomem*regs;
+ unsigned intirq;
+ struct device *dev;
/* Job Queues */
- struct fdp1_job jobs[FDP1_NUMBER_JOBS];
- struct list_headfree_job_list;
- struct list_headqueued_job_list;
- struct list_headhw_job_list;
+ struct fdp1_job jobs[FDP1_NUMBER_JOBS];
+ struct list_headfree_job_list;
+ struct list_headqueued_job_list;
+ struct list_headhw_job_list;
- unsigned intclk_rate;
+ unsigned intclk_rate;
- struct rcar_fcp_device *fcp;
- struct v4l2_m2m_dev *m2m_dev;
+ struct rcar_fcp_device *fcp;
+ struct v4l2_m2m_dev *m2m_dev;
};
struct fdp1_ctx {
- struct v4l2_fh fh;
- struct fdp1_dev *fdp1;
+ struct v4l2_fh fh;
+ struct fdp1_dev *fdp1;
- struct v4l2_ctrl_handler hdl;
- unsigned intsequence;
+ struct v4l2_ctrl_handlerhdl;
+ unsigned intsequence;
/* Processed buffers in this transaction */
- u8 num_processed;
+ u8 num_pro
[PATCH v3 01/10] v4l: ioctl: Clear the v4l2_pix_format_mplane reserved field
The S_FMT and TRY_FMT handlers in multiplane mode attempt at clearing the reserved fields of the v4l2_format structure after the pix_mp member. However, the reserved fields are inside pix_mp, not after it. Signed-off-by: Laurent Pinchart Tested-by: Kieran Bingham --- drivers/media/v4l2-core/v4l2-ioctl.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c index eb6ccc70e9a8..c52d94c018bb 100644 --- a/drivers/media/v4l2-core/v4l2-ioctl.c +++ b/drivers/media/v4l2-core/v4l2-ioctl.c @@ -1504,7 +1504,7 @@ static int v4l_s_fmt(const struct v4l2_ioctl_ops *ops, case V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE: if (unlikely(!is_rx || !is_vid || !ops->vidioc_s_fmt_vid_cap_mplane)) break; - CLEAR_AFTER_FIELD(p, fmt.pix_mp); + CLEAR_AFTER_FIELD(p, fmt.pix_mp.xfer_func); return ops->vidioc_s_fmt_vid_cap_mplane(file, fh, arg); case V4L2_BUF_TYPE_VIDEO_OVERLAY: if (unlikely(!is_rx || !is_vid || !ops->vidioc_s_fmt_vid_overlay)) @@ -1532,7 +1532,7 @@ static int v4l_s_fmt(const struct v4l2_ioctl_ops *ops, case V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE: if (unlikely(!is_tx || !is_vid || !ops->vidioc_s_fmt_vid_out_mplane)) break; - CLEAR_AFTER_FIELD(p, fmt.pix_mp); + CLEAR_AFTER_FIELD(p, fmt.pix_mp.xfer_func); return ops->vidioc_s_fmt_vid_out_mplane(file, fh, arg); case V4L2_BUF_TYPE_VIDEO_OUTPUT_OVERLAY: if (unlikely(!is_tx || !is_vid || !ops->vidioc_s_fmt_vid_out_overlay)) @@ -1589,7 +1589,7 @@ static int v4l_try_fmt(const struct v4l2_ioctl_ops *ops, case V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE: if (unlikely(!is_rx || !is_vid || !ops->vidioc_try_fmt_vid_cap_mplane)) break; - CLEAR_AFTER_FIELD(p, fmt.pix_mp); + CLEAR_AFTER_FIELD(p, fmt.pix_mp.xfer_func); return ops->vidioc_try_fmt_vid_cap_mplane(file, fh, arg); case V4L2_BUF_TYPE_VIDEO_OVERLAY: if (unlikely(!is_rx || !is_vid || !ops->vidioc_try_fmt_vid_overlay)) @@ -1617,7 +1617,7 @@ static int v4l_try_fmt(const struct v4l2_ioctl_ops *ops, case V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE: if (unlikely(!is_tx || !is_vid || !ops->vidioc_try_fmt_vid_out_mplane)) break; - CLEAR_AFTER_FIELD(p, fmt.pix_mp); + CLEAR_AFTER_FIELD(p, fmt.pix_mp.xfer_func); return ops->vidioc_try_fmt_vid_out_mplane(file, fh, arg); case V4L2_BUF_TYPE_VIDEO_OUTPUT_OVERLAY: if (unlikely(!is_tx || !is_vid || !ops->vidioc_try_fmt_vid_out_overlay)) -- Regards, Laurent Pinchart
[PATCH v3 00/10] v4l: platform: Add Renesas R-Car FDP1 Driver
Hello, Here's the third version of the Renesas R-Car FDP1 driver. The FDP1 (Fine Display Processor) is a hardware memory-to-memory de-interlacer device, with capability to convert from various YCbCr/YUV formats to both YCbCr/YUV and RGB formats at the same time as converting interlaced content to progressive. Patch 01/10 fixes an issue in the V4L2 ioctl handling core code. It has been posted before and hasn't been changed. Patch 02/10 adds a new standard V4L2 menu control for the deinterlacing mode. The menu items are driver specific. Patch 03/10 extends the FCP driver to support the FDP1. It has been posted before and hasn't been changed. Patch 04/10 adds the FDP1 driver unchanged compared to the v2 posted by Kieran. Patches 05/10 to 09/10 then fix issues in the driver and incorporate review comments. They will eventually be squashed into patch 04/10, but are currently separate to allow easier review of the changes. Patch 10/10 reworks buffer handling in the FDP1 driver. This is experimental and doesn't fix any known bug. I've included the patch in the series to get feedback on whether this is a good idea. Kieran, I noticed that your patches are authored by Kieran Bingham Is that correct or should it be changed to Kieran Bingham ? Here is the V4L2 compliance report. v4l2-compliance SHA : abc1453dfe89f244dccd3460d8e1a2e3091cbadb Driver Info: Driver name : rcar_fdp1 Card type : rcar_fdp1 Bus info : platform:rcar_fdp1 Driver version: 4.8.0 Capabilities : 0x84204000 Video Memory-to-Memory Multiplanar Streaming Extended Pix Format Device Capabilities Device Caps : 0x04204000 Video Memory-to-Memory Multiplanar Streaming Extended Pix Format Compliance test for device /dev/video0 (not using libv4l2): Required ioctls: test VIDIOC_QUERYCAP: OK Allow for multiple opens: test second video open: OK test VIDIOC_QUERYCAP: OK test VIDIOC_G/S_PRIORITY: OK test for unlimited opens: OK Debug ioctls: test VIDIOC_DBG_G/S_REGISTER: OK (Not Supported) test VIDIOC_LOG_STATUS: OK (Not Supported) Input ioctls: test VIDIOC_G/S_TUNER/ENUM_FREQ_BANDS: OK (Not Supported) test VIDIOC_G/S_FREQUENCY: OK (Not Supported) test VIDIOC_S_HW_FREQ_SEEK: OK (Not Supported) test VIDIOC_ENUMAUDIO: OK (Not Supported) test VIDIOC_G/S/ENUMINPUT: OK (Not Supported) test VIDIOC_G/S_AUDIO: OK (Not Supported) Inputs: 0 Audio Inputs: 0 Tuners: 0 Output ioctls: test VIDIOC_G/S_MODULATOR: OK (Not Supported) test VIDIOC_G/S_FREQUENCY: OK (Not Supported) test VIDIOC_ENUMAUDOUT: OK (Not Supported) test VIDIOC_G/S/ENUMOUTPUT: OK (Not Supported) test VIDIOC_G/S_AUDOUT: OK (Not Supported) Outputs: 0 Audio Outputs: 0 Modulators: 0 Input/Output configuration ioctls: test VIDIOC_ENUM/G/S/QUERY_STD: OK (Not Supported) test VIDIOC_ENUM/G/S/QUERY_DV_TIMINGS: OK (Not Supported) test VIDIOC_DV_TIMINGS_CAP: OK (Not Supported) test VIDIOC_G/S_EDID: OK (Not Supported) Control ioctls: test VIDIOC_QUERY_EXT_CTRL/QUERYMENU: OK test VIDIOC_QUERYCTRL: OK test VIDIOC_G/S_CTRL: OK test VIDIOC_G/S/TRY_EXT_CTRLS: OK test VIDIOC_(UN)SUBSCRIBE_EVENT/DQEVENT: OK test VIDIOC_G/S_JPEGCOMP: OK (Not Supported) Standard Controls: 5 Private Controls: 0 Format ioctls: test VIDIOC_ENUM_FMT/FRAMESIZES/FRAMEINTERVALS: OK test VIDIOC_G/S_PARM: OK (Not Supported) test VIDIOC_G_FBUF: OK (Not Supported) test VIDIOC_G_FMT: OK test VIDIOC_TRY_FMT: OK test VIDIOC_S_FMT: OK test VIDIOC_G_SLICED_VBI_CAP: OK (Not Supported) test Cropping: OK (Not Supported) test Composing: OK (Not Supported) test Scaling: OK Codec ioctls: test VIDIOC_(TRY_)ENCODER_CMD: OK (Not Supported) test VIDIOC_G_ENC_INDEX: OK (Not Supported) test VIDIOC_(TRY_)DECODER_CMD: OK (Not Supported) Buffer ioctls: test VIDIOC_REQBUFS/CREATE_BUFS/QUERYBUF: OK test VIDIOC_EXPBUF: OK Test input 0: Total: 43, Succeeded: 43, Failed: 0, Warnings: 0 Geert Uytterhoeven (1): v4l: fdp1: vb2_queue dev conversion Kieran Bingham (2): v4l: Extend FCP compatible list to support the FDP v4l: Add Renesas R-Car FDP1 Driver Laurent Pinchart (7): v4l: ioctl: Clear the v4l2_pix_format_mplane reserved field v4l: ctrls: Add deinterlacing mode control v4l: fdp1: Incorporate miscellaneous review comments v4l: fdp1: Remove unused struct fdp1_v4l2_buffer v4l: fdp1: R
Re: [PATCH] gpio: rcar: Add r8a7796 (R-Car M3-W) support
On Tue, Sep 6, 2016 at 12:35 PM, Simon Horman wrote: > R-Car Gen3's GPIO blocks are identical to Gen2's in every respect. > > Based on work for the r8a7795 (R-Car H3) by Ulrich Hecht. > > Cc: Ulrich Hecht > Signed-off-by: Simon Horman > Reviewed-by: Geert Uytterhoeven > Reviewed-by: Laurent Pinchart > Tested-by: Laurent Pinchart Patch applied. Yours, Linus Walleij
Re: [PATCH resend] pinctrl: sh-pfc: r8a7792: add QSPI pin groups
On Fri, Sep 2, 2016 at 11:50 PM, Sergei Shtylyov wrote: > Add QSPI pin groups to the R8A7792 PFC driver. > > Based on the original (and large) patch by Vladimir Barinov > . > > Signed-off-by: Sergei Shtylyov Acked-by: Linus Walleij Expecting Geert to queue it. Yours, Linus Walleij
[PATCH] pcie-rcar: try setting PCIe speed to 5 GT/s at boot
From: Grigory Kletsko
Initially, the PCIe link speed is set up only at 2.5 GT/s.
For better performance, we're trying to increase link speed to 5 GT/s.
[Sergei Shtylyov: indented the macro definitions with tabs, renamed the
SPCHG register bits for consistency, renamed the link speed field/values,
fixed too long lines, fixed redundancy in clearing the MACSR register bits,
fixed grammar/typos in the comments/messages, removed unrelated/useless
changes, fixed bugs in rcar_rwm32() calls done to set the bits, removed
unneeded braces, removed non-informative comment, reworded the patch
summary/description.]
Signed-off-by: Grigory Kletsko
Signed-off-by: Sergei Shtylyov
---
The patch is against the 'next' branch of Bjorn Helgaas' 'pci.git' repo.
drivers/pci/host/pcie-rcar.c | 103 +++
1 file changed, 103 insertions(+)
Index: pci/drivers/pci/host/pcie-rcar.c
===
--- pci.orig/drivers/pci/host/pcie-rcar.c
+++ pci/drivers/pci/host/pcie-rcar.c
@@ -48,6 +48,10 @@
#define CFINIT1
#define PCIETSTR 0x02004
#define DATA_LINK_ACTIVE 1
+#define PCIEINTR 0x02008
+#define PCIEINTMAC(1 << 13)
+#define PCIEINTER 0x0200C
+#define PCIEINTMACE (1 << 13)
#define PCIEERRFR 0x02020
#define UNSUPPORTED_REQUEST (1 << 4)
#define PCIEMSIFR 0x02044
@@ -84,8 +88,21 @@
#define IDSETR10x011004
#define TLCTLR 0x011048
#define MACSR 0x011054
+#define SPCHG (1 << 5)
+#define SPCHGFIN (1 << 4)
+#define SPCHGSUC (1 << 7)
+#define SPCHGFAIL (1 << 6)
+#define LINK_SPEED(0xf << 16)
+#define LINK_SPEED_2_5GTS (1 << 16)
+#define LINK_SPEED_5_0GTS (2 << 16)
#define MACCTLR0x011058
+#define SPEED_CHANGE (1 << 24)
#define SCRAMBLE_DISABLE (1 << 27)
+#define MACINTENR 0x01106C
+#define SPCHGFINE (1 << 4)
+#define MACS2R 0x011078
+#define MACCGSPSETR0x011084
+#define SPCNGRSN (1 << 31)
/* R-Car H1 PHY */
#define H1_PCIEPHYADRR 0x04000c
@@ -385,6 +402,51 @@ static int rcar_pcie_setup(struct list_h
return 1;
}
+void rcar_pcie_force_speedup(struct rcar_pcie *pcie)
+{
+ u32 macsr;
+
+ dev_info(pcie->dev, "Trying speed up to 5 GT/s\n");
+
+ if ((rcar_pci_read_reg(pcie, MACSR) & SPCHGFIN) ||
+ (rcar_pci_read_reg(pcie, MACCTLR) & SPEED_CHANGE)) {
+ dev_err(pcie->dev, "Speed changing is in progress\n");
+ return;
+ }
+
+ if ((rcar_pci_read_reg(pcie, MACSR) & LINK_SPEED) ==
+ LINK_SPEED_5_0GTS) {
+ dev_err(pcie->dev, "Current link speed is already 5 GT/s\n");
+ return;
+ }
+
+ if ((rcar_pci_read_reg(pcie, MACS2R) & LINK_SPEED) !=
+ LINK_SPEED_5_0GTS) {
+ dev_err(pcie->dev,
+ "Current max support link speed not 5 GT/s\n");
+ return;
+ }
+
+ /* Set target link speed to 5.0 GT/s */
+ rcar_rmw32(pcie, EXPCAP(12), PCI_EXP_LNKSTA_CLS,
+ PCI_EXP_LNKSTA_CLS_5_0GB);
+
+ /* Set speed change reason as intentional factor */
+ rcar_rmw32(pcie, MACCGSPSETR, SPCNGRSN, 0);
+
+ /* Clear SPCHGFIN, SPCHGSUC, and SPCHGFAIL */
+ macsr = rcar_pci_read_reg(pcie, MACSR);
+ if (macsr & (SPCHGFIN | SPCHGSUC | SPCHGFAIL))
+ rcar_pci_write_reg(pcie, macsr, MACSR);
+
+ /* Enable interrupt */
+ rcar_rmw32(pcie, MACINTENR, SPCHGFINE, SPCHGFINE);
+ rcar_rmw32(pcie, PCIEINTER, PCIEINTMACE, PCIEINTMACE);
+
+ /* Start link speed change */
+ rcar_rmw32(pcie, MACCTLR, SPEED_CHANGE, SPEED_CHANGE);
+}
+
static int rcar_pcie_enable(struct rcar_pcie *pcie)
{
struct pci_bus *bus, *child;
@@ -416,6 +478,9 @@ static int rcar_pcie_enable(struct rcar_
pci_bus_add_devices(bus);
+ /* Try setting 5 GT/s link speed */
+ rcar_pcie_force_speedup(pcie);
+
return 0;
}
@@ -621,6 +686,44 @@ static irqreturn_t rcar_pcie_msi_irq(int
struct rcar_msi *msi = &pcie->msi;
unsigned long reg;
+ if (rcar_pci_read_reg(pcie, PCIEINTR) & PCIEINTMAC) {
+ dev_dbg(pcie->dev, "MAC interrupt received\n");
+
+ rcar_rmw32(pcie, MACSR, SPCHGFIN, SPCHGFIN);
+
+ /* Disable this interrupt */
+ rcar_rmw32(pcie, MACINTENR, SPCHGFINE, 0);
+ rcar_rmw32(pcie, PCIEINTER, PCIEINTMACE, 0);
+
+ if (rcar_pci_read_reg(pcie, MACSR) & SPCHGFAIL) {
+ dev_err(pcie->dev, "Speed change failed\n");
+
+ rcar_rmw32(pcie, MACSR, SPCHGFAIL, SPCHGFAIL);
+ /*
+
[PATCH v2] net: ethernet: renesas: sh_eth: add POST registers for rz
Due to a mistake in the hardware manual, the FWSLC and POST1-4 registers
were not documented and left out of the driver for RZ/A making the CAM
feature non-operational.
Additionally, when the offset values for POST1-4 are left blank, the driver
attempts to set them using an offset of 0x which can cause a memory
corruption or panic.
This patch fixes the panic and properly enables CAM.
Reported-by: Daniel Palmer
Signed-off-by: Chris Brandt
---
v2:
* POST registers really do exist, so just add them
---
drivers/net/ethernet/renesas/sh_eth.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/net/ethernet/renesas/sh_eth.c
b/drivers/net/ethernet/renesas/sh_eth.c
index 1f8240a..440ae27 100644
--- a/drivers/net/ethernet/renesas/sh_eth.c
+++ b/drivers/net/ethernet/renesas/sh_eth.c
@@ -201,9 +201,14 @@ static const u16
sh_eth_offset_fast_rz[SH_ETH_MAX_REGISTER_OFFSET] = {
[ARSTR] = 0x,
[TSU_CTRST] = 0x0004,
+ [TSU_FWSLC] = 0x0038,
[TSU_VTAG0] = 0x0058,
[TSU_ADSBSY]= 0x0060,
[TSU_TEN] = 0x0064,
+ [TSU_POST1] = 0x0070,
+ [TSU_POST2] = 0x0074,
+ [TSU_POST3] = 0x0078,
+ [TSU_POST4] = 0x007c,
[TSU_ADRH0] = 0x0100,
[TXNLCR0] = 0x0080,
@@ -2781,6 +2786,8 @@ static void sh_eth_tsu_init(struct sh_eth_private *mdp)
{
if (sh_eth_is_rz_fast_ether(mdp)) {
sh_eth_tsu_write(mdp, 0, TSU_TEN); /* Disable all CAM entry */
+ sh_eth_tsu_write(mdp, TSU_FWSLC_POSTENU | TSU_FWSLC_POSTENL,
+TSU_FWSLC);/* Enable POST registers */
return;
}
--
2.9.2
Re: [PATCH 02/21] ARM: shmobile: Convert to hotplug state machine
On 2016-09-06 20:05:37 [+0200], Geert Uytterhoeven wrote:
> Hi Sebastian,
Hi Geert,
> Please describe why this is desirable.
We have now an old and new infrastructure in place to handle hotplug
notifications while a CPU goes up and/or down. We want to get rid of the
old infrastructure and are converting its users away.
> > diff --git a/include/linux/cpuhotplug.h b/include/linux/cpuhotplug.h
> > index 0da071ff36d2..008eed0c0787 100644
> > --- a/include/linux/cpuhotplug.h
> > +++ b/include/linux/cpuhotplug.h
> > @@ -35,6 +35,7 @@ enum cpuhp_state {
> > CPUHP_POWERPC_PMAC_PREPARE,
> > CPUHP_POWERPC_MMU_CTX_PREPARE,
> > CPUHP_NOTIFY_PREPARE,
> > + CPUHP_ARM_SHMOBILE_SCU_PREPARE,
> > CPUHP_TIMERS_DEAD,
> > CPUHP_BRINGUP_CPU,
> > CPUHP_AP_IDLE_DEAD,
>
> What's the rationale behind adding all these numbers and always
> iterating over all
> of them, even though most/all of them cannot be used at the same time
> (e.g. CPUHP_SH_SH3X_PREPARE is for SuperH, while
> CPUHP_ARM_SHMOBILE_SCU_PREPARE is for ARM)?
PREPARE + STARTING states require static ids. The online callback has
dynamic allocations of ids since it was assumed that this is the most
common one.
We will most likely evaluate the situation once we done and total number
of IDS are not acceptable.
>
> Gr{oetje,eeting}s,
>
> Geert
>
Sebastian
Re: [PATCHv3 2/2] v4l: vsp1: Add HGT support
Hi Niklas, Thank you for the patch. On Wednesday 07 Sep 2016 14:09:38 Niklas Söderlund wrote: > The HGT is a Histogram Generator Two-Dimensions. It computes a weighted > frequency histograms for hue and saturation areas over a configurable > region of the image with optional subsampling. > > Signed-off-by: Niklas Söderlund Reviewed-by: Laurent Pinchart However, please note that we might need to upstream HGT support before HGO. To ease that, I've split the HGO patches in common code and HGO-specific code, and rebased your patch on top of that. The result is available at git://linuxtv.org/pinchartl/media.git vsp1/next There will still be conflicts if we need to reorder the patches, but they should be easier to handle now. > --- > drivers/media/platform/vsp1/Makefile | 2 +- > drivers/media/platform/vsp1/vsp1.h| 3 + > drivers/media/platform/vsp1/vsp1_drv.c| 33 - > drivers/media/platform/vsp1/vsp1_entity.c | 33 +++-- > drivers/media/platform/vsp1/vsp1_entity.h | 1 + > drivers/media/platform/vsp1/vsp1_hgt.c| 221 +++ > drivers/media/platform/vsp1/vsp1_hgt.h| 42 ++ > drivers/media/platform/vsp1/vsp1_pipe.c | 16 +++ > drivers/media/platform/vsp1/vsp1_pipe.h | 2 + > drivers/media/platform/vsp1/vsp1_regs.h | 9 ++ > drivers/media/platform/vsp1/vsp1_video.c | 10 +- > 11 files changed, 356 insertions(+), 16 deletions(-) > create mode 100644 drivers/media/platform/vsp1/vsp1_hgt.c > create mode 100644 drivers/media/platform/vsp1/vsp1_hgt.h -- Regards, Laurent Pinchart
[PATCHv3 2/2] v4l: vsp1: Add HGT support
The HGT is a Histogram Generator Two-Dimensions. It computes a weighted
frequency histograms for hue and saturation areas over a configurable
region of the image with optional subsampling.
Signed-off-by: Niklas Söderlund
---
drivers/media/platform/vsp1/Makefile | 2 +-
drivers/media/platform/vsp1/vsp1.h| 3 +
drivers/media/platform/vsp1/vsp1_drv.c| 33 -
drivers/media/platform/vsp1/vsp1_entity.c | 33 +++--
drivers/media/platform/vsp1/vsp1_entity.h | 1 +
drivers/media/platform/vsp1/vsp1_hgt.c| 221 ++
drivers/media/platform/vsp1/vsp1_hgt.h| 42 ++
drivers/media/platform/vsp1/vsp1_pipe.c | 16 +++
drivers/media/platform/vsp1/vsp1_pipe.h | 2 +
drivers/media/platform/vsp1/vsp1_regs.h | 9 ++
drivers/media/platform/vsp1/vsp1_video.c | 10 +-
11 files changed, 356 insertions(+), 16 deletions(-)
create mode 100644 drivers/media/platform/vsp1/vsp1_hgt.c
create mode 100644 drivers/media/platform/vsp1/vsp1_hgt.h
diff --git a/drivers/media/platform/vsp1/Makefile
b/drivers/media/platform/vsp1/Makefile
index 8ab6a06..a33afc3 100644
--- a/drivers/media/platform/vsp1/Makefile
+++ b/drivers/media/platform/vsp1/Makefile
@@ -3,7 +3,7 @@ vsp1-y += vsp1_dl.o vsp1_drm.o
vsp1_video.o
vsp1-y += vsp1_rpf.o vsp1_rwpf.o vsp1_wpf.o
vsp1-y += vsp1_clu.o vsp1_hsit.o vsp1_lut.o
vsp1-y += vsp1_bru.o vsp1_sru.o vsp1_uds.o
-vsp1-y += vsp1_hgo.o vsp1_histo.o
+vsp1-y += vsp1_hgo.o vsp1_hgt.o vsp1_histo.o
vsp1-y += vsp1_lif.o
obj-$(CONFIG_VIDEO_RENESAS_VSP1) += vsp1.o
diff --git a/drivers/media/platform/vsp1/vsp1.h
b/drivers/media/platform/vsp1/vsp1.h
index 9dce3ea..012ce40 100644
--- a/drivers/media/platform/vsp1/vsp1.h
+++ b/drivers/media/platform/vsp1/vsp1.h
@@ -33,6 +33,7 @@ struct vsp1_platform_data;
struct vsp1_bru;
struct vsp1_clu;
struct vsp1_hgo;
+struct vsp1_hgt;
struct vsp1_hsit;
struct vsp1_lif;
struct vsp1_lut;
@@ -52,6 +53,7 @@ struct vsp1_uds;
#define VSP1_HAS_WPF_VFLIP (1 << 5)
#define VSP1_HAS_WPF_HFLIP (1 << 6)
#define VSP1_HAS_HGO (1 << 7)
+#define VSP1_HAS_HGT (1 << 8)
struct vsp1_device_info {
u32 version;
@@ -74,6 +76,7 @@ struct vsp1_device {
struct vsp1_bru *bru;
struct vsp1_clu *clu;
struct vsp1_hgo *hgo;
+ struct vsp1_hgt *hgt;
struct vsp1_hsit *hsi;
struct vsp1_hsit *hst;
struct vsp1_lif *lif;
diff --git a/drivers/media/platform/vsp1/vsp1_drv.c
b/drivers/media/platform/vsp1/vsp1_drv.c
index 9ea4244..df97b57 100644
--- a/drivers/media/platform/vsp1/vsp1_drv.c
+++ b/drivers/media/platform/vsp1/vsp1_drv.c
@@ -31,6 +31,7 @@
#include "vsp1_dl.h"
#include "vsp1_drm.h"
#include "vsp1_hgo.h"
+#include "vsp1_hgt.h"
#include "vsp1_hsit.h"
#include "vsp1_lif.h"
#include "vsp1_lut.h"
@@ -107,6 +108,7 @@ static int vsp1_create_sink_links(struct vsp1_device *vsp1,
continue;
if (source->type == VSP1_ENTITY_HGO ||
+ source->type == VSP1_ENTITY_HGT ||
source->type == VSP1_ENTITY_LIF ||
source->type == VSP1_ENTITY_WPF)
continue;
@@ -160,6 +162,16 @@ static int vsp1_uapi_create_links(struct vsp1_device *vsp1)
return ret;
}
+ if (vsp1->hgt) {
+ ret =
media_create_pad_link(&vsp1->hgt->histo.entity.subdev.entity,
+ HISTO_PAD_SOURCE,
+ &vsp1->hgt->histo.video.entity, 0,
+ MEDIA_LNK_FL_ENABLED |
+ MEDIA_LNK_FL_IMMUTABLE);
+ if (ret < 0)
+ return ret;
+ }
+
if (vsp1->lif) {
ret = media_create_pad_link(&vsp1->wpf[0]->entity.subdev.entity,
RWPF_PAD_SOURCE,
@@ -301,6 +313,17 @@ static int vsp1_create_entities(struct vsp1_device *vsp1)
&vsp1->entities);
}
+ if (vsp1->info->features & VSP1_HAS_HGT && vsp1->info->uapi) {
+ vsp1->hgt = vsp1_hgt_create(vsp1);
+ if (IS_ERR(vsp1->hgt)) {
+ ret = PTR_ERR(vsp1->hgt);
+ goto done;
+ }
+
+ list_add_tail(&vsp1->hgt->histo.entity.list_dev,
+ &vsp1->entities);
+ }
+
/* The LIF is only supported when used in conjunction with the DU, in
* which case the userspace API is disabled. If the userspace API is
* enabled skip the LIF, even when present.
@@ -584,7 +607,8 @@ static const struct vsp1_device_info vsp1_device_infos[] = {
[PATCHv3 1/2] v4l: Define a pixel format for the R-Car VSP1 2-D histogram engine
The format is used on the R-Car VSP1 video queues that carry
2-D histogram statistics data.
Signed-off-by: Niklas Söderlund
Reviewed-by: Laurent Pinchart
---
Documentation/media/uapi/v4l/meta-formats.rst | 1 +
.../media/uapi/v4l/pixfmt-meta-vsp1-hgt.rst| 120 +
drivers/media/v4l2-core/v4l2-ioctl.c | 1 +
include/uapi/linux/videodev2.h | 3 +-
4 files changed, 124 insertions(+), 1 deletion(-)
create mode 100644 Documentation/media/uapi/v4l/pixfmt-meta-vsp1-hgt.rst
diff --git a/Documentation/media/uapi/v4l/meta-formats.rst
b/Documentation/media/uapi/v4l/meta-formats.rst
index 05ab91e..01e24e3 100644
--- a/Documentation/media/uapi/v4l/meta-formats.rst
+++ b/Documentation/media/uapi/v4l/meta-formats.rst
@@ -13,3 +13,4 @@ These formats are used for the :ref:`metadata` interface only.
:maxdepth: 1
pixfmt-meta-vsp1-hgo
+pixfmt-meta-vsp1-hgt
diff --git a/Documentation/media/uapi/v4l/pixfmt-meta-vsp1-hgt.rst
b/Documentation/media/uapi/v4l/pixfmt-meta-vsp1-hgt.rst
new file mode 100644
index 000..6c62308
--- /dev/null
+++ b/Documentation/media/uapi/v4l/pixfmt-meta-vsp1-hgt.rst
@@ -0,0 +1,120 @@
+.. -*- coding: utf-8; mode: rst -*-
+
+.. _v4l2-meta-fmt-vsp1-hgt:
+
+***
+V4L2_META_FMT_VSP1_HGT ('VSPT')
+***
+
+Renesas R-Car VSP1 2-D Histogram Data
+
+
+Description
+===
+
+This format describes histogram data generated by the Renesas R-Car VSP1
+2-D Histogram (HGT) engine.
+
+The VSP1 HGT is a histogram computation engine that operates on HSV
+data. It operates on a possibly cropped and subsampled input image and
+computes the sum, maximum and minimum of the S component as well as a
+weighted frequency histogram based on the H and S components.
+
+The histogram is a matrix of 6 Hue and 32 Saturation buckets, 192 in
+total. Each HSV value is added to one or more buckets with a weight
+between 1 and 16 depending on the Hue areas configuration. Finding the
+corresponding buckets is done by inspecting the H and S value independently.
+
+The Saturation position **n** (0 - 31) of the bucket in the matrix is
+found by the expression:
+
+n = S / 8
+
+The Hue position **m** (0 - 5) of the bucket in the matrix depends on
+how the HGT Hue areas are configured. There are 6 user configurable Hue
+Areas which can be configured to cover overlapping Hue values:
+
+::
+
+ Area 0 Area 1 Area 2 Area 3 Area 4 Area
5
+
+ \ /| |\ /| |\ /| |\ /| |\ /| |\ /|
|\ /
+\ / | | \ / | | \ / | | \ / | | \ / | | \ / |
| \ /
+ X | | X | | X | | X | | X | | X |
| X
+/ \ | | / \ | | / \ | | / \ | | / \ | | / \ |
| / \
+ / \| |/ \| |/ \| |/ \| |/ \| |/ \|
|/ \
+ 5U 0L 0U 1L 1U 2L 2U 3L 3U 4L 4U 5L
5U 0L
+<0..Hue
Value255>
+
+When two consecutive areas don't overlap (n+1L is equal to nU) the boundary
+value is considered as part of the lower area.
+
+Pixels with a hue value included in the centre of an area (between nL and nU
+included) are attributed to that single area and given a weight of 16.
+Pixels with a hue value included in the overlapping region between two areas
+(between n+1L and nU excluded) are attributed to both areas and given a weight
+for each of these areas proportional to their position along the diagonal
+lines (rounded down).
+
+The Hue area setup must match one of the following constrains:
+
+::
+
+0L <= 0U <= 1L <= 1U <= 2L <= 2U <= 3L <= 3U <= 4L <= 4U <= 5L <= 5U
+
+::
+
+0U <= 1L <= 1U <= 2L <= 2U <= 3L <= 3U <= 4L <= 4U <= 5L <= 5U <= 0L
+
+**Byte Order.**
+All data is stored in memory in little endian format. Each cell in the tables
+contains one byte.
+
+.. flat-table:: VSP1 HGT Data - (776 bytes)
+:header-rows: 2
+:stub-columns: 0
+
+* - Offset
+ - :cspan:`4` Memory
+* -
+ - [31:24]
+ - [23:16]
+ - [15:8]
+ - [7:0]
+* - 0
+ - -
+ - S max [7:0]
+ - -
+ - S min [7:0]
+* - 4
+ - :cspan:`4` S sum [31:0]
+* - 8
+ - :cspan:`4` Histogram bucket (m=0, n=0) [31:0]
+* - 12
+ - :cspan:`4` Histogram bucket (m=0, n=1) [31:0]
+* -
+ - :cspan:`4` ...
+* - 132
+ - :cspan:`4` Histogram bucket (m=0, n=31) [31:0]
+* - 136
+ - :cspan:`4` Histogram bucket (m=1, n=0) [31:0]
+* -
+ - :cspan:`4` ...
+* - 264
+ - :cspan:`4` Histogram bucket (m=2, n=0) [31:0]
+* -
+ - :cspan:`4` ...
+* - 392
+ - :cspan:`4` Histogram bucket (m=3, n=0) [31:0]
+* -
+ - :cspan:`4` ...
+* - 520
+
[PATCHv3 0/2] v4l: vsp1: Add HGT support
Hi, This series add support for the VSP1 2-D histogram engine HGT. It's based on top of Laurent Pinchart tree at git://linuxtv.org/pinchartl/media.git hgo. And depends on Laurents patch '[PATCH] v4l: vsp1: Move subdev operations from HGO to common histogram code'. It is tested on Koelsch using a modified vsp-tests suite package, modifications can be found at https://git.ragnatech.se/vsp-tests hgt. * Changes since v2 - Add .try_ctrl() handling and return -EINVAL instead of trying to correct the hue areas. Thanks Laurent for suggesting a solution to this. - Fixed typo in pixel format documentation, thanks Laurent for spotting it. * Changes since v1 - Rebased on top of Laurents patch which made all subdev operations common for HGO and HGT. This removed a lot of code that is now shared. - Removed the Hue area configuration for the histogram pixel format. These values are set by userspace so it already knows them. - Updated pixel format documentation after input from Laurent. - Better aligned the code to the existing VSP code base. - Simplify check that hue areas are valid for the hardware. - Fixed spelling. Niklas Söderlund (2): v4l: Define a pixel format for the R-Car VSP1 2-D histogram engine v4l: vsp1: Add HGT support Documentation/media/uapi/v4l/meta-formats.rst | 1 + .../media/uapi/v4l/pixfmt-meta-vsp1-hgt.rst| 120 +++ drivers/media/platform/vsp1/Makefile | 2 +- drivers/media/platform/vsp1/vsp1.h | 3 + drivers/media/platform/vsp1/vsp1_drv.c | 33 ++- drivers/media/platform/vsp1/vsp1_entity.c | 33 ++- drivers/media/platform/vsp1/vsp1_entity.h | 1 + drivers/media/platform/vsp1/vsp1_hgt.c | 221 + drivers/media/platform/vsp1/vsp1_hgt.h | 42 drivers/media/platform/vsp1/vsp1_pipe.c| 16 ++ drivers/media/platform/vsp1/vsp1_pipe.h| 2 + drivers/media/platform/vsp1/vsp1_regs.h| 9 + drivers/media/platform/vsp1/vsp1_video.c | 10 +- drivers/media/v4l2-core/v4l2-ioctl.c | 1 + include/uapi/linux/videodev2.h | 3 +- 15 files changed, 480 insertions(+), 17 deletions(-) create mode 100644 Documentation/media/uapi/v4l/pixfmt-meta-vsp1-hgt.rst create mode 100644 drivers/media/platform/vsp1/vsp1_hgt.c create mode 100644 drivers/media/platform/vsp1/vsp1_hgt.h -- 2.9.3
Re: [PATCHv2 2/2] v4l: vsp1: Add HGT support
Hi Niklas,
On Wednesday 07 Sep 2016 12:05:26 Niklas Söderlund wrote:
> On 2016-09-06 22:59:22 +0300, Laurent Pinchart wrote:
> > On Tuesday 06 Sep 2016 16:38:56 Niklas Söderlund wrote:
> >> The HGT is a Histogram Generator Two-Dimensions. It computes a weighted
> >> frequency histograms for hue and saturation areas over a configurable
> >> region of the image with optional subsampling.
> >>
> >> Signed-off-by: Niklas Söderlund
> >> ---
> >>
> >> drivers/media/platform/vsp1/Makefile | 2 +-
> >> drivers/media/platform/vsp1/vsp1.h| 3 +
> >> drivers/media/platform/vsp1/vsp1_drv.c| 33 -
> >> drivers/media/platform/vsp1/vsp1_entity.c | 33 +++--
> >> drivers/media/platform/vsp1/vsp1_entity.h | 1 +
> >> drivers/media/platform/vsp1/vsp1_hgt.c| 217 +++
> >> drivers/media/platform/vsp1/vsp1_hgt.h| 42 ++
> >> drivers/media/platform/vsp1/vsp1_pipe.c | 16 +++
> >> drivers/media/platform/vsp1/vsp1_pipe.h | 2 +
> >> drivers/media/platform/vsp1/vsp1_regs.h | 9 ++
> >> drivers/media/platform/vsp1/vsp1_video.c | 10 +-
> >> 11 files changed, 352 insertions(+), 16 deletions(-)
> >> create mode 100644 drivers/media/platform/vsp1/vsp1_hgt.c
> >> create mode 100644 drivers/media/platform/vsp1/vsp1_hgt.h
> >
> > [snip]
> >
> >> diff --git a/drivers/media/platform/vsp1/vsp1_hgt.c
> >> b/drivers/media/platform/vsp1/vsp1_hgt.c new file mode 100644
> >> index 000..4e3f762
> >> --- /dev/null
> >> +++ b/drivers/media/platform/vsp1/vsp1_hgt.c
> >
> > [snip]
> >
> >> +/* -
> >> + * Controls
> >> + */
> >> +
> >> +#define V4L2_CID_VSP1_HGT_HUE_AREAS (V4L2_CID_USER_BASE | 0x1001)
> >> +
> >> +static int hgt_hue_areas_s_ctrl(struct v4l2_ctrl *ctrl)
> >> +{
> >> + struct vsp1_hgt *hgt = container_of(ctrl->handler, struct vsp1_hgt,
> >> + ctrls);
> >> + u8 *value = ctrl->p_new.p_u8;
> >
> > Nitpicking, I'd call the variable values.
> >
> >> + unsigned int i;
> >> + bool ok = true;
> >> +
> >> + /*
> >> + * Make sure values meet one of two possible hardware constrains
> >
> > s/constrains/constraints./
> >
> >> + * 0L <= 0U <= 1L <= 1U <= 2L <= 2U <= 3L <= 3U <= 4L <= 4U <= 5L <=
> >> 5U
> >> + * 0U <= 1L <= 1U <= 2L <= 2U <= 3L <= 3U <= 4L <= 4U <= 5L <= 5U <=
> >> 0L
> >> + */
> >> +
> >> + if ((value[0] > value[1]) && (value[11] > value[0]))
> >> + ok = false;
> >> + for (i = 1; i < (HGT_NUM_HUE_AREAS * 2) - 1; ++i)
> >> + if (value[i] > value[i+1])
> >> + ok = false;
> >> +
> >> + /* Values do not match hardware, adjust to valid settings. */
> >> + if (!ok) {
> >> + for (i = 0; i < (HGT_NUM_HUE_AREAS * 2) - 1; ++i) {
> >> + if (value[i] > value[i+1])
> >> + value[i] = value[i+1];
> >> + }
> >> + }
> >
> > I'm afraid this won't work. Let's assume value[0] = 100, value[1] = 50,
> > value[2] = 25. The loop will unroll to
> >
> > if (value[0] /* 100 */ > value[1] /* 50 */)
> > value[0] = value[1] /* 50 */;
> >
> > if (value[1] /* 50 */ > value[2] /* 25 */)
> > value[1] = value[2] /* 25 */;
> >
> > You will end up with value[0] = 50, value[1] = 25, value[2] = 25, which
> > doesn't match the hardware constraints.
> >
> > How about the following, which tests and fixes the values in a single
> > operation ?
> >
> > static int hgt_hue_areas_s_ctrl(struct v4l2_ctrl *ctrl)
> > {
> > struct vsp1_hgt *hgt = container_of(ctrl->handler, struct vsp1_hgt,
> > ctrls);
> > u8 *values = ctrl->p_new.p_u8;
> > unsigned int i;
> >
> > /*
> > * Adjust the values if they don't meet the hardware constraints:
> > *
> > * 0U <= 1L <= 1U <= 2L <= 2U <= 3L <= 3U <= 4L <= 4U <= 5L <= 5U
> > */
> > for (i = 1; i < (HGT_NUM_HUE_AREAS * 2) - 1; ++i) {
> > if (values[i] > values[i+1])
> > values[i+1] = values[i];
> > }
> >
> > /* 0L <= 0U or 5U <= 0L */
> > if (values[0] > values[1] && values[11] > values[0])
> > values[0] = values[1];
> >
> > memcpy(hgt->hue_areas, ctrl->p_new.p_u8, sizeof(hgt->hue_areas));
> >
> > return 0;
> > }
> >
> > I'm also beginning to wonder whether it wouldn't make sense to return
> > -EINVAL when the values don't match the constraints instead of trying to
> > fix them.
>
> I'm fine with either solution. I looked at a few other drivers and it
> seems the most common way is to correct the control value. But maybe in
> this case it's better to just return -EINVAL.
>
> Let me know what you think and I will make it so and send a v3.
Given that fixed values would result in a different histogram that would
likely be unusable by a userspace application that doesn't expect the control
values to be changed (and if it did, it s
Re: [PATCHv2 2/2] v4l: vsp1: Add HGT support
Hi Laurent,
Thanks for your review.
On 2016-09-06 22:59:22 +0300, Laurent Pinchart wrote:
> Hi Niklas,
>
> Thank you for the patch.
>
> On Tuesday 06 Sep 2016 16:38:56 Niklas Söderlund wrote:
> > The HGT is a Histogram Generator Two-Dimensions. It computes a weighted
> > frequency histograms for hue and saturation areas over a configurable
> > region of the image with optional subsampling.
> >
> > Signed-off-by: Niklas Söderlund
> > ---
> > drivers/media/platform/vsp1/Makefile | 2 +-
> > drivers/media/platform/vsp1/vsp1.h| 3 +
> > drivers/media/platform/vsp1/vsp1_drv.c| 33 -
> > drivers/media/platform/vsp1/vsp1_entity.c | 33 +++--
> > drivers/media/platform/vsp1/vsp1_entity.h | 1 +
> > drivers/media/platform/vsp1/vsp1_hgt.c| 217 +++
> > drivers/media/platform/vsp1/vsp1_hgt.h| 42 ++
> > drivers/media/platform/vsp1/vsp1_pipe.c | 16 +++
> > drivers/media/platform/vsp1/vsp1_pipe.h | 2 +
> > drivers/media/platform/vsp1/vsp1_regs.h | 9 ++
> > drivers/media/platform/vsp1/vsp1_video.c | 10 +-
> > 11 files changed, 352 insertions(+), 16 deletions(-)
> > create mode 100644 drivers/media/platform/vsp1/vsp1_hgt.c
> > create mode 100644 drivers/media/platform/vsp1/vsp1_hgt.h
>
> [snip]
>
> > diff --git a/drivers/media/platform/vsp1/vsp1_hgt.c
> > b/drivers/media/platform/vsp1/vsp1_hgt.c new file mode 100644
> > index 000..4e3f762
> > --- /dev/null
> > +++ b/drivers/media/platform/vsp1/vsp1_hgt.c
>
> [snip]
>
> > +/*
> > + * Controls
> > + */
> > +
> > +#define V4L2_CID_VSP1_HGT_HUE_AREAS(V4L2_CID_USER_BASE | 0x1001)
> > +
> > +static int hgt_hue_areas_s_ctrl(struct v4l2_ctrl *ctrl)
> > +{
> > + struct vsp1_hgt *hgt = container_of(ctrl->handler, struct vsp1_hgt,
> > + ctrls);
> > + u8 *value = ctrl->p_new.p_u8;
>
> Nitpicking, I'd call the variable values.
>
> > + unsigned int i;
> > + bool ok = true;
> > +
> > + /*
> > +* Make sure values meet one of two possible hardware constrains
>
> s/constrains/constraints./
>
> > +* 0L <= 0U <= 1L <= 1U <= 2L <= 2U <= 3L <= 3U <= 4L <= 4U <= 5L <=
> 5U
> > +* 0U <= 1L <= 1U <= 2L <= 2U <= 3L <= 3U <= 4L <= 4U <= 5L <= 5U <=
> 0L
> > +*/
> > +
> > + if ((value[0] > value[1]) && (value[11] > value[0]))
> > + ok = false;
> > + for (i = 1; i < (HGT_NUM_HUE_AREAS * 2) - 1; ++i)
> > + if (value[i] > value[i+1])
> > + ok = false;
> > +
> > + /* Values do not match hardware, adjust to valid settings. */
> > + if (!ok) {
> > + for (i = 0; i < (HGT_NUM_HUE_AREAS * 2) - 1; ++i) {
> > + if (value[i] > value[i+1])
> > + value[i] = value[i+1];
> > + }
> > + }
>
> I'm afraid this won't work. Let's assume value[0] = 100, value[1] = 50,
> value[2] = 25. The loop will unroll to
>
> if (value[0] /* 100 */ > value[1] /* 50 */)
> value[0] = value[1] /* 50 */;
> if (value[1] /* 50 */ > value[2] /* 25 */)
> value[1] = value[2] /* 25 */;
>
> You will end up with value[0] = 50, value[1] = 25, value[2] = 25, which
> doesn't match the hardware constraints.
>
> How about the following, which tests and fixes the values in a single
> operation ?
>
> static int hgt_hue_areas_s_ctrl(struct v4l2_ctrl *ctrl)
> {
> struct vsp1_hgt *hgt = container_of(ctrl->handler, struct vsp1_hgt,
> ctrls);
> u8 *values = ctrl->p_new.p_u8;
> unsigned int i;
>
> /*
>* Adjust the values if they don't meet the hardware constraints:
>*
>* 0U <= 1L <= 1U <= 2L <= 2U <= 3L <= 3U <= 4L <= 4U <= 5L <= 5U
>*/
> for (i = 1; i < (HGT_NUM_HUE_AREAS * 2) - 1; ++i) {
> if (values[i] > values[i+1])
> values[i+1] = values[i];
> }
>
> /* 0L <= 0U or 5U <= 0L */
> if (values[0] > values[1] && values[11] > values[0])
> values[0] = values[1];
>
> memcpy(hgt->hue_areas, ctrl->p_new.p_u8, sizeof(hgt->hue_areas));
>
> return 0;
> }
>
> I'm also beginning to wonder whether it wouldn't make sense to return -EINVAL
> when the values don't match the constraints instead of trying to fix them.
I'm fine with either solution. I looked at a few other drivers and it
seems the most common way is to correct the control value. But maybe in
this case it's better to just return -EINVAL.
Let me know what you think and I will make it so and send a v3.
>
> > + memcpy(hgt->hue_areas, ctrl->p_new.p_u8, sizeof(hgt->hue_areas));
> > +
> > + return 0;
> > +}
>
> [snip]
>
--
Regards,
Niklas Söderlund
Re: [PATCH 0/6] R-Car DU: Fix IOMMU operation when connected to VSP
Hi Laurent, Thanks for your help with this. Good to see that the DU driver is getting closer to work with the IPMMU hardware! Please see below for some feedback from me. On Fri, Aug 19, 2016 at 5:39 PM, Laurent Pinchart wrote: > Hello, > > This patch series fixes the rcar-du-drm driver to support VSP plane sources > with an IOMMU. It is available for convenience at > > git://linuxtv.org/pinchartl/media.git iommu/devel/du > > On R-Car Gen3 the DU has no direct memory access but sources planes through > VSP instances. When an IOMMU is inserted between the VSP and memory, the DU > framebuffers need to be DMA mapped using the VSP device, not the DU device as > currently done. The same situation can also be reproduced on Gen2 hardware by > linking the VSP to the DU in DT [1], effectively disabling direct memory > access by the DU. > > The situation is made quite complex by the fact that different planes can be > connected to different DU instances, and thus served by different IOMMUs (or, > in practice on existing hardware, by the same IOMMU but through different > micro-TLBs). We thus can't allocate and map buffers to the right device in a > single dma_alloc_wc() operation as done in the DRM CMA GEM helpers. > > However, on such setups, the DU DT node doesn't reference IOMMUs as the DU > does not perform any direct memory access. We can thus keep the GEM object > allocation unchanged, and the DMA addresses that we receive in the DU driver > will be physical addresses. Those buffers then need to be mapped to the VSP > device when they are associated with planes. Fortunately the atomic framework > provides two plane helper operations, .prepare_fb() and .cleanup_fb() that we > can use for this purpose. > > The reality is slightly more complex than this on Gen3, as an FCP device > instance sits between VSP instances and memory. It is the FCP devices that are > connected to the IOMMUs, and buffer mapping thus need to be performed using > the FCP devices. This isn't required on Gen2 as the platforms don't have any > FCPs. > > Patches 1/6 and 2/6 unconstify the state argument to the .prepare_fb() and > .cleanup_fb() operations, to allow storing the mapped buffer addresses in the > state. Patches 3/6 and 4/6 then extend the rcar-fcp driver API to expose the > FCP struct device. Patch 5/6 extends the vsp1 driver API to allow mapping a > scatter-gather list to the VSP, with the implementation using the FCP devices > instead when available. Patch 6/6 then use the vsp1 mapping API in the > rcar-du-drm driver to map and unmap buffers when needed. > > The series has been tested on Gen2 (Lager) only as the Gen3 IOMMU is known to > be broken. Slight clarification, the R-Car Gen3 family as a whole does not have broken IPMMU hardware. Early R-Car H3 revisions do require some errata handling though, but M3-W and later ES versions and MP of H3 will be fine. Given the early R-Car H3 errata I agree it makes sense to develop and test this series on R-Car Gen2 though. > A possible improvement is to modify the GEM object allocation mechanism to use > non-contiguous memory when the DU driver detects that all the VSP instances it > is connected to use an IOMMU (possibly through FCP devices). > > An issue has been noticed with synchronization between page flip and VSP > operation. Buffers get unmapped (and possibly freed) before the VSP is done > reading them. The problem isn't new, but is much more noticeable with IOMMU > support enabled as any hardware access to unmapped memory generates an IOMMU > page fault immediately. > > The series unfortunately contain a dependency between DRM and V4L2 patches, > complicating upstream merge. As there's no urgency to merge patch 6/6 due to > the IOMMU being broken on Gen3 at the moment, I propose merging patches > 1/6-2/6 and 3/6-5/6 independently for the next kernel release. > > I would particularly appreciate feedback on the APIs introduced by patches 4/6 > and 5/6. The code in general looks fine to me. The APIs introduced by patches 4/6 and 5/6 seem quite straightforward. Is there something I can do to help with those? > [1] > https://www.mail-archive.com/linux-renesas-soc@vger.kernel.org/msg06589.html > > Laurent Pinchart (6): > drm: Don't implement empty prepare_fb()/cleanup_fb() > drm: Unconstify state argument to prepare_fb()/cleanup_fb() > v4l: rcar-fcp: Don't get/put module reference > v4l: rcar-fcp: Add an API to retrieve the FCP device > v4l: vsp1: Add API to map and unmap DRM buffers through the VSP > drm: rcar-du: Map memory through the VSP device > > drivers/gpu/drm/arc/arcpgu_crtc.c | 2 - > drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 4 +- > drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c | 15 - > drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c | 15 - > drivers/gpu/drm/i915/intel_display.c| 4 +- > drivers/gpu/drm/i915/intel_drv.h| 4 +- > drivers/gpu/drm/msm/mdp/mdp4/mdp4_plane.c | 4
[PATCH 21/26] ARM: dts: wheat: add CAN support
From: Sergei Shtylyov
Define the Wheat board dependent part of the CAN0/1 device nodes...
Based on the original (and large) patch by Vladimir Barinov
.
Signed-off-by: Sergei Shtylyov
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r8a7792-wheat.dts | 24
1 file changed, 24 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7792-wheat.dts
b/arch/arm/boot/dts/r8a7792-wheat.dts
index e214d707f81d..65d13c83d424 100644
--- a/arch/arm/boot/dts/r8a7792-wheat.dts
+++ b/arch/arm/boot/dts/r8a7792-wheat.dts
@@ -76,6 +76,16 @@
function = "lbsc";
};
};
+
+ can0_pins: can0 {
+ groups = "can0_data";
+ function = "can0";
+ };
+
+ can1_pins: can1 {
+ groups = "can1_data";
+ function = "can1";
+ };
};
&scif0 {
@@ -84,3 +94,17 @@
status = "okay";
};
+
+&can0 {
+ pinctrl-0 = <&can0_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};
+
+&can1 {
+ pinctrl-0 = <&can1_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};
--
2.7.0.rc3.207.g0ac5344
[PATCH 26/26] ARM: dts: wheat: add support for tactile switches
From: Sergei Shtylyov
Add support for the tactile switches SW2/3 (on the debug board) as a
virtual keyboard like it was done with the Blanche board).
Signed-off-by: Sergei Shtylyov
Acked-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r8a7792-wheat.dts | 20
1 file changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7792-wheat.dts
b/arch/arm/boot/dts/r8a7792-wheat.dts
index 0ec4bc606c61..6dbb94114a93 100644
--- a/arch/arm/boot/dts/r8a7792-wheat.dts
+++ b/arch/arm/boot/dts/r8a7792-wheat.dts
@@ -12,6 +12,7 @@
/dts-v1/;
#include "r8a7792.dtsi"
#include
+#include
/ {
model = "Wheat";
@@ -56,6 +57,25 @@
pinctrl-names = "default";
};
+ keyboard {
+ compatible = "gpio-keys";
+
+ key-a {
+ linux,code = ;
+ label = "SW2";
+ wakeup-source;
+ debounce-interval = <20>;
+ gpios = <&gpio3 20 GPIO_ACTIVE_LOW>;
+ };
+ key-b {
+ linux,code = ;
+ label = "SW3";
+ wakeup-source;
+ debounce-interval = <20>;
+ gpios = <&gpio11 2 GPIO_ACTIVE_LOW>;
+ };
+ };
+
vcc_sdhi0: regulator-vcc-sdhi0 {
compatible = "regulator-fixed";
--
2.7.0.rc3.207.g0ac5344
[PATCH 25/26] ARM: dts: wheat: add QSPI support
From: Sergei Shtylyov
Define the Wheat board dependent part of the QSPI device node.
Add device nodes for Spansion S25FL512S SPI flash and MTD partitions on it.
Based on the original (and large) patch by Vladimir Barinov
.
Signed-off-by: Sergei Shtylyov
Reviewed-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r8a7792-wheat.dts | 43 +
1 file changed, 43 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7792-wheat.dts
b/arch/arm/boot/dts/r8a7792-wheat.dts
index ff37de35c57c..0ec4bc606c61 100644
--- a/arch/arm/boot/dts/r8a7792-wheat.dts
+++ b/arch/arm/boot/dts/r8a7792-wheat.dts
@@ -103,6 +103,11 @@
groups = "sdhi0_data4", "sdhi0_ctrl";
function = "sdhi0";
};
+
+ qspi_pins: qspi {
+ groups = "qspi_ctrl", "qspi_data4";
+ function = "qspi";
+ };
};
&scif0 {
@@ -134,3 +139,41 @@
cd-gpios = <&gpio11 11 GPIO_ACTIVE_LOW>;
status = "okay";
};
+
+&qspi {
+ pinctrl-0 = <&qspi_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ flash@0 {
+ compatible = "spansion,s25fl512s", "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <3000>;
+ spi-tx-bus-width = <4>;
+ spi-rx-bus-width = <4>;
+ spi-cpol;
+ spi-cpha;
+ m25p,fast-read;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "loader";
+ reg = <0x 0x0004>;
+ read-only;
+ };
+ partition@4 {
+ label = "user";
+ reg = <0x0004 0x0040>;
+ read-only;
+ };
+ partition@44 {
+ label = "flash";
+ reg = <0x0044 0x03bc>;
+ };
+ };
+ };
+};
--
2.7.0.rc3.207.g0ac5344
[PATCH 24/26] ARM: dts: r8a7792: add QSPI support
From: Sergei Shtylyov
Define the generic R8A7792 part of the QSPI device node.
Based on the original (and large) patch by Vladimir Barinov
.
Signed-off-by: Sergei Shtylyov
Reviewed-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r8a7792.dtsi | 16
1 file changed, 16 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi
index 6ff3e365d56a..713141d38b3e 100644
--- a/arch/arm/boot/dts/r8a7792.dtsi
+++ b/arch/arm/boot/dts/r8a7792.dtsi
@@ -25,6 +25,7 @@
i2c3 = &i2c3;
i2c4 = &i2c4;
i2c5 = &i2c5;
+ spi0 = &qspi;
vin0 = &vin0;
vin1 = &vin1;
vin2 = &vin2;
@@ -556,6 +557,21 @@
status = "disabled";
};
+ qspi: spi@e6b1 {
+ compatible = "renesas,qspi-r8a7792", "renesas,qspi";
+ reg = <0 0xe6b1 0 0x2c>;
+ interrupts = ;
+ clocks = <&mstp9_clks R8A7792_CLK_QSPI_MOD>;
+ dmas = <&dmac0 0x17>, <&dmac0 0x18>,
+ <&dmac1 0x17>, <&dmac1 0x18>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
du: display@feb0 {
compatible = "renesas,du-r8a7792";
reg = <0 0xfeb0 0 0x4>;
--
2.7.0.rc3.207.g0ac5344
[PATCH 22/26] ARM: dts: wheat: add SDHI0 support
From: Sergei Shtylyov
Define the Wheat board dependent part of the SDHI0 (connected to the
micro-SD slot) device node along with the necessary voltage regulator.
Signed-off-by: Sergei Shtylyov
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r8a7792-wheat.dts | 26 ++
1 file changed, 26 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7792-wheat.dts
b/arch/arm/boot/dts/r8a7792-wheat.dts
index 65d13c83d424..ff37de35c57c 100644
--- a/arch/arm/boot/dts/r8a7792-wheat.dts
+++ b/arch/arm/boot/dts/r8a7792-wheat.dts
@@ -11,6 +11,7 @@
/dts-v1/;
#include "r8a7792.dtsi"
+#include
/ {
model = "Wheat";
@@ -54,6 +55,17 @@
pinctrl-0 = <&lan89218_pins>;
pinctrl-names = "default";
};
+
+ vcc_sdhi0: regulator-vcc-sdhi0 {
+ compatible = "regulator-fixed";
+
+ regulator-name = "SDHI0 Vcc";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+
+ gpio = <&gpio11 12 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
};
&extal_clk {
@@ -86,6 +98,11 @@
groups = "can1_data";
function = "can1";
};
+
+ sdhi0_pins: sdhi0 {
+ groups = "sdhi0_data4", "sdhi0_ctrl";
+ function = "sdhi0";
+ };
};
&scif0 {
@@ -108,3 +125,12 @@
status = "okay";
};
+
+&sdhi0 {
+ pinctrl-0 = <&sdhi0_pins>;
+ pinctrl-names = "default";
+
+ vmmc-supply = <&vcc_sdhi0>;
+ cd-gpios = <&gpio11 11 GPIO_ACTIVE_LOW>;
+ status = "okay";
+};
--
2.7.0.rc3.207.g0ac5344
[PATCH 23/26] ARM: dts: r8a7792: add QSPI clock
From: Sergei Shtylyov Describe the QSPI clock in the R8A7792 device tree. Based on the original (and large) patch by Vladimir Barinov . Signed-off-by: Sergei Shtylyov Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7792.dtsi | 7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi index ff47755fb01e..6ff3e365d56a 100644 --- a/arch/arm/boot/dts/r8a7792.dtsi +++ b/arch/arm/boot/dts/r8a7792.dtsi @@ -860,6 +860,7 @@ clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, <&p_clk>, <&p_clk>, +<&cpg_clocks R8A7792_CLK_QSPI>, <&cp_clk>, <&cp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>; #clock-cells = <1>; @@ -870,6 +871,7 @@ R8A7792_CLK_GPIO1 R8A7792_CLK_GPIO0 R8A7792_CLK_GPIO11 R8A7792_CLK_GPIO10 R8A7792_CLK_CAN1 R8A7792_CLK_CAN0 + R8A7792_CLK_QSPI_MOD R8A7792_CLK_GPIO9 R8A7792_CLK_GPIO8 R8A7792_CLK_I2C5 R8A7792_CLK_I2C4 R8A7792_CLK_I2C3 R8A7792_CLK_I2C2 @@ -879,8 +881,9 @@ "gpio7", "gpio6", "gpio5", "gpio4", "gpio3", "gpio2", "gpio1", "gpio0", "gpio11", "gpio10", "can1", "can0", - "gpio9", "gpio8", "i2c5", "i2c4", - "i2c3", "i2c2", "i2c1", "i2c0"; + "qspi_mod", "gpio9", "gpio8", + "i2c5", "i2c4", "i2c3", "i2c2", + "i2c1", "i2c0"; }; }; -- 2.7.0.rc3.207.g0ac5344
[PATCH 02/26] ARM: dts: alt: add SDHI0 and 1 support
Define the Alt board dependent part of the SDHI0 and 1
device nodes along with the necessary voltage regulators.
Based on work by the original patch by Vladimir Barinov and
Sergei Shtylyov for the Silk board.
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r8a7794-alt.dts | 81 +++
1 file changed, 81 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7794-alt.dts
b/arch/arm/boot/dts/r8a7794-alt.dts
index 1ad37d431a2a..fe7c128cc965 100644
--- a/arch/arm/boot/dts/r8a7794-alt.dts
+++ b/arch/arm/boot/dts/r8a7794-alt.dts
@@ -10,6 +10,7 @@
/dts-v1/;
#include "r8a7794.dtsi"
+#include
/ {
model = "Alt";
@@ -29,6 +30,54 @@
reg = <0 0x4000 0 0x4000>;
};
+ vcc_sdhi0: regulator-vcc-sdhi0 {
+ compatible = "regulator-fixed";
+
+ regulator-name = "SDHI0 Vcc";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+
+ gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ vccq_sdhi0: regulator-vccq-sdhi0 {
+ compatible = "regulator-gpio";
+
+ regulator-name = "SDHI0 VccQ";
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <330>;
+
+ gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>;
+ gpios-states = <1>;
+ states = <330 1
+ 180 0>;
+ };
+
+ vcc_sdhi1: regulator-vcc-sdhi1 {
+ compatible = "regulator-fixed";
+
+ regulator-name = "SDHI1 Vcc";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+
+ gpio = <&gpio4 26 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ vccq_sdhi1: regulator-vccq-sdhi1 {
+ compatible = "regulator-gpio";
+
+ regulator-name = "SDHI1 VccQ";
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <330>;
+
+ gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
+ gpios-states = <1>;
+ states = <330 1
+ 180 0>;
+ };
+
lbsc {
#address-cells = <1>;
#size-cells = <1>;
@@ -140,6 +189,16 @@
groups = "vin0_data8", "vin0_clk";
function = "vin0";
};
+
+ sdhi0_pins: sd0 {
+ groups = "sdhi0_data4", "sdhi0_ctrl";
+ function = "sdhi0";
+ };
+
+ sdhi1_pins: sd1 {
+ groups = "sdhi1_data4", "sdhi1_ctrl";
+ function = "sdhi1";
+ };
};
&cmt0 {
@@ -169,6 +228,28 @@
};
};
+&sdhi0 {
+ pinctrl-0 = <&sdhi0_pins>;
+ pinctrl-names = "default";
+
+ vmmc-supply = <&vcc_sdhi0>;
+ vqmmc-supply = <&vccq_sdhi0>;
+ cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
+ wp-gpios = <&gpio6 7 GPIO_ACTIVE_LOW>;
+ status = "okay";
+};
+
+&sdhi1 {
+ pinctrl-0 = <&sdhi1_pins>;
+ pinctrl-names = "default";
+
+ vmmc-supply = <&vcc_sdhi1>;
+ vqmmc-supply = <&vccq_sdhi1>;
+ cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
+ wp-gpios = <&gpio6 15 GPIO_ACTIVE_LOW>;
+ status = "okay";
+};
+
&i2c1 {
pinctrl-0 = <&i2c1_pins>;
pinctrl-names = "default";
--
2.7.0.rc3.207.g0ac5344
[PATCH 19/26] ARM: dts: rskrza1: add ethernet DT support
From: Chris Brandt
Signed-off-by: Chris Brandt
Reviewed-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r7s72100-rskrza1.dts | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/r7s72100-rskrza1.dts
b/arch/arm/boot/dts/r7s72100-rskrza1.dts
index aabfa0459dc1..e5dea5bb4032 100644
--- a/arch/arm/boot/dts/r7s72100-rskrza1.dts
+++ b/arch/arm/boot/dts/r7s72100-rskrza1.dts
@@ -47,6 +47,15 @@
status = "okay";
};
+ðer {
+ status = "okay";
+ renesas,no-ether-link;
+ phy-handle = <&phy0>;
+ phy0: ethernet-phy@0 {
+ reg = <0>;
+ };
+};
+
&scif2 {
status = "okay";
};
--
2.7.0.rc3.207.g0ac5344
[PATCH 09/26] ARM: dts: r8a7792: add VSP1V clocks
From: Sergei Shtylyov
Describe the VSP1V clocks in the R8A7792 device tree.
Signed-off-by: Sergei Shtylyov
Reviewed-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r8a7792.dtsi | 11 ---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi
index 9763289db5ce..856e6c5b94bc 100644
--- a/arch/arm/boot/dts/r8a7792.dtsi
+++ b/arch/arm/boot/dts/r8a7792.dtsi
@@ -757,10 +757,15 @@
compatible = "renesas,r8a7792-mstp-clocks",
"renesas,cpg-mstp-clocks";
reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>;
- clocks = <&m2_clk>;
+ clocks = <&m2_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>;
#clock-cells = <1>;
- clock-indices = ;
- clock-output-names = "jpu";
+ clock-indices = <
+ R8A7792_CLK_JPU
+ R8A7792_CLK_VSP1DU1 R8A7792_CLK_VSP1DU0
+ R8A7792_CLK_VSP1_SY
+ >;
+ clock-output-names = "jpu", "vsp1du1", "vsp1du0",
+"vsp1-sy";
};
mstp2_clks: mstp2_clks@e6150138 {
compatible = "renesas,r8a7792-mstp-clocks",
--
2.7.0.rc3.207.g0ac5344
[PATCH 11/26] ARM: dts: blanche: add support for general purpose LEDs
From: Sergei Shtylyov
Add support for the general purpose LEDs on the Blanche board.
Signed-off-by: Sergei Shtylyov
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r8a7792-blanche.dts | 17 +
1 file changed, 17 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7792-blanche.dts
b/arch/arm/boot/dts/r8a7792-blanche.dts
index 3c6f42b9fe9f..f3ea43b7b724 100644
--- a/arch/arm/boot/dts/r8a7792-blanche.dts
+++ b/arch/arm/boot/dts/r8a7792-blanche.dts
@@ -159,6 +159,23 @@
};
};
+ leds {
+ compatible = "gpio-leds";
+
+ led17 {
+ gpios = <&gpio10 10 GPIO_ACTIVE_HIGH>;
+ };
+ led18 {
+ gpios = <&gpio10 11 GPIO_ACTIVE_HIGH>;
+ };
+ led19 {
+ gpios = <&gpio10 12 GPIO_ACTIVE_HIGH>;
+ };
+ led20 {
+ gpios = <&gpio10 23 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
vcc_sdhi0: regulator-vcc-sdhi0 {
compatible = "regulator-fixed";
--
2.7.0.rc3.207.g0ac5344
[PATCH 06/26] ARM: dts: blanche: add support for general purpose switches
From: Sergei Shtylyov
Add support for the general purpose software switches SW2 and tactile
switches SW24/25 as a virtual keyboard (like it was done with the Lager/
Koelsch boards).
Signed-off-by: Sergei Shtylyov
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r8a7792-blanche.dts | 49 +++
1 file changed, 49 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7792-blanche.dts
b/arch/arm/boot/dts/r8a7792-blanche.dts
index eeffba870211..808a6aab7e5e 100644
--- a/arch/arm/boot/dts/r8a7792-blanche.dts
+++ b/arch/arm/boot/dts/r8a7792-blanche.dts
@@ -11,6 +11,8 @@
/dts-v1/;
#include "r8a7792.dtsi"
+#include
+#include
/ {
model = "Blanche";
@@ -54,6 +56,53 @@
pinctrl-0 = <&lan89218_pins>;
pinctrl-names = "default";
};
+
+ keyboard {
+ compatible = "gpio-keys";
+
+ key-1 {
+ linux,code = ;
+ label = "SW2-1";
+ wakeup-source;
+ debounce-interval = <20>;
+ gpios = <&gpio3 10 GPIO_ACTIVE_LOW>;
+ };
+ key-2 {
+ linux,code = ;
+ label = "SW2-2";
+ wakeup-source;
+ debounce-interval = <20>;
+ gpios = <&gpio3 11 GPIO_ACTIVE_LOW>;
+ };
+ key-3 {
+ linux,code = ;
+ label = "SW2-3";
+ wakeup-source;
+ debounce-interval = <20>;
+ gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
+ };
+ key-4 {
+ linux,code = ;
+ label = "SW2-4";
+ wakeup-source;
+ debounce-interval = <20>;
+ gpios = <&gpio3 15 GPIO_ACTIVE_LOW>;
+ };
+ key-a {
+ linux,code = ;
+ label = "SW24";
+ wakeup-source;
+ debounce-interval = <20>;
+ gpios = <&gpio3 20 GPIO_ACTIVE_LOW>;
+ };
+ key-b {
+ linux,code = ;
+ label = "SW25";
+ wakeup-source;
+ debounce-interval = <20>;
+ gpios = <&gpio11 2 GPIO_ACTIVE_LOW>;
+ };
+ };
};
&extal_clk {
--
2.7.0.rc3.207.g0ac5344
[PATCH 17/26] ARM: dts: r7s72100: add ethernet clock to device tree
From: Chris Brandt
Signed-off-by: Chris Brandt
Reviewed-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r7s72100.dtsi| 9 +
include/dt-bindings/clock/r7s72100-clock.h | 3 +++
2 files changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi
index e8e2a5d71976..6d29e8ffa0d9 100644
--- a/arch/arm/boot/dts/r7s72100.dtsi
+++ b/arch/arm/boot/dts/r7s72100.dtsi
@@ -108,6 +108,15 @@
clock-output-names = "scif0", "scif1", "scif2",
"scif3", "scif4", "scif5", "scif6", "scif7";
};
+ mstp7_clks: mstp7_clks@fcfe0430 {
+ #clock-cells = <1>;
+ compatible = "renesas,r7s72100-mstp-clocks",
"renesas,cpg-mstp-clocks";
+ reg = <0xfcfe0430 4>;
+ clocks = <&p0_clk>;
+ clock-indices = ;
+ clock-output-names = "ether";
+ };
+
mstp9_clks: mstp9_clks@fcfe0438 {
#clock-cells = <1>;
compatible = "renesas,r7s72100-mstp-clocks",
"renesas,cpg-mstp-clocks";
diff --git a/include/dt-bindings/clock/r7s72100-clock.h
b/include/dt-bindings/clock/r7s72100-clock.h
index 5128f4d94f44..3cd813896d08 100644
--- a/include/dt-bindings/clock/r7s72100-clock.h
+++ b/include/dt-bindings/clock/r7s72100-clock.h
@@ -25,6 +25,9 @@
#define R7S72100_CLK_SCIF6 1
#define R7S72100_CLK_SCIF7 0
+/* MSTP7 */
+#define R7S72100_CLK_ETHER 4
+
/* MSTP9 */
#define R7S72100_CLK_I2C0 7
#define R7S72100_CLK_I2C1 6
--
2.7.0.rc3.207.g0ac5344
[PATCH 07/26] ARM: dts: blanche: add SDHI0 support
From: Sergei Shtylyov
Define the Blanche board dependent part of the SDHI0 (connected to the
micro-SD slot) device node along with the necessary voltage regulator.
Signed-off-by: Sergei Shtylyov
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r8a7792-blanche.dts | 25 +
1 file changed, 25 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7792-blanche.dts
b/arch/arm/boot/dts/r8a7792-blanche.dts
index 808a6aab7e5e..436d44ea3c12 100644
--- a/arch/arm/boot/dts/r8a7792-blanche.dts
+++ b/arch/arm/boot/dts/r8a7792-blanche.dts
@@ -103,6 +103,17 @@
gpios = <&gpio11 2 GPIO_ACTIVE_LOW>;
};
};
+
+ vcc_sdhi0: regulator-vcc-sdhi0 {
+ compatible = "regulator-fixed";
+
+ regulator-name = "SDHI0 Vcc";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+
+ gpio = <&gpio11 12 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
};
&extal_clk {
@@ -139,6 +150,11 @@
groups = "can0_data", "can_clk";
function = "can0";
};
+
+ sdhi0_pins: sdhi0 {
+ groups = "sdhi0_data4", "sdhi0_ctrl";
+ function = "sdhi0";
+ };
};
&scif0 {
@@ -161,3 +177,12 @@
status = "okay";
};
+
+&sdhi0 {
+ pinctrl-0 = <&sdhi0_pins>;
+ pinctrl-names = "default";
+
+ vmmc-supply = <&vcc_sdhi0>;
+ cd-gpios = <&gpio11 11 GPIO_ACTIVE_LOW>;
+ status = "okay";
+};
--
2.7.0.rc3.207.g0ac5344
[PATCH 01/26] ARM: dts: r8a7794: add VSP1 support
From: Sergei Shtylyov
Describe two instances (VSPS and VSPD0) of the VSP1 in the R8A7794 device
tree.
Signed-off-by: Sergei Shtylyov
Reviewed-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r8a7794.dtsi | 16
1 file changed, 16 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index 6216a170a3df..611ec6df5cf6 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -894,6 +894,22 @@
};
};
+ vsp1@fe928000 {
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe928000 0 0x8000>;
+ interrupts = ;
+ clocks = <&mstp1_clks R8A7794_CLK_VSP1_S>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ };
+
+ vsp1@fe93 {
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe93 0 0x8000>;
+ interrupts = ;
+ clocks = <&mstp1_clks R8A7794_CLK_VSP1_DU0>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ };
+
du: display@feb0 {
compatible = "renesas,du-r8a7794";
reg = <0 0xfeb0 0 0x4>;
--
2.7.0.rc3.207.g0ac5344
[GIT PULL] Second Round of Renesas ARM Based SoC DT Updates for v4.9
Hi Olof, Hi Kevin, Hi Arnd, Please consider these second round of Renesas ARM based SoC DT updates for v4.9. This pull request is based on the previous round of such requests, tagged as renesas-dt-for-v4.9, which I have already sent a pull-request for. The following changes since commit 8bec0842ba2bb1b3bd954a1ef50f426b8f09c84f: ARM: dts: r8a7792: add DU support (2016-08-09 14:37:47 +0200) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-dt2-for-v4.9 for you to fetch changes up to fa8f4aba72e6d619c003dab60f58ab6c7410e465: ARM: dts: wheat: add support for tactile switches (2016-09-07 09:43:57 +0200) Second Round of Renesas ARM Based SoC DT Updates for v4.9 Fixes (for v4.9): * Correct PWM clock parent on r8a7794 SoC Clean-up: * Remove obsolete vsp1 properties from r8a779[01] SoCs New boards: * Add r8a7792/wheat and r7s72100/rskrza1 boards Enablement: * Enable LEDs, DU, SDHI on r8a7792/blanche board * Enable MMCIF and SDHI on r8a7794/alt board * Add SPI and VSP1 to r8a7792 SoC * Add ethernet to r7s72100 SoC Chris Brandt (5): ARM: dts: Add RSKRZA1 DT bindings documentation ARM: dts: rskrza1: initial device tree ARM: dts: r7s72100: add ethernet clock to device tree ARM: dts: r7s72100: add ethernet to device tree ARM: dts: rskrza1: add ethernet DT support Geert Uytterhoeven (2): ARM: dts: r8a7790: Remove obsolete vsp1 properties ARM: dts: r8a7791: Remove obsolete vsp1 properties Sergei Shtylyov (17): ARM: dts: r8a7794: add VSP1 support ARM: dts: blanche: add support for general purpose switches ARM: dts: blanche: add SDHI0 support ARM: dts: blanche: add DU support ARM: dts: r8a7792: add VSP1V clocks ARM: dts: r8a7792: add VSP1V support ARM: dts: blanche: add support for general purpose LEDs ARM: dts: document Wheat board ARM: dts: wheat: initial device tree ARM: dts: wheat: add Ethernet support ARM: dts: r8a7794: fix PWM clock parent ARM: dts: wheat: add CAN support ARM: dts: wheat: add SDHI0 support ARM: dts: r8a7792: add QSPI clock ARM: dts: r8a7792: add QSPI support ARM: dts: wheat: add QSPI support ARM: dts: wheat: add support for tactile switches Simon Horman (2): ARM: dts: alt: add SDHI0 and 1 support ARM: dts: alt: add MMCIF support Documentation/devicetree/bindings/arm/shmobile.txt | 4 + arch/arm/boot/dts/Makefile | 2 + arch/arm/boot/dts/r7s72100-rskrza1.dts | 61 ++ arch/arm/boot/dts/r7s72100.dtsi| 22 +++ arch/arm/boot/dts/r8a7790.dtsi | 23 --- arch/arm/boot/dts/r8a7791.dtsi | 18 -- arch/arm/boot/dts/r8a7792-blanche.dts | 216 + arch/arm/boot/dts/r8a7792-wheat.dts| 199 +++ arch/arm/boot/dts/r8a7792.dtsi | 58 +- arch/arm/boot/dts/r8a7794-alt.dts | 106 ++ arch/arm/boot/dts/r8a7794.dtsi | 18 +- include/dt-bindings/clock/r7s72100-clock.h | 3 + 12 files changed, 683 insertions(+), 47 deletions(-) create mode 100644 arch/arm/boot/dts/r7s72100-rskrza1.dts create mode 100644 arch/arm/boot/dts/r8a7792-wheat.dts
[PATCH 20/26] ARM: dts: r8a7794: fix PWM clock parent
From: Sergei Shtylyov
When removing the non-existing thermal clock I forgot to remove its
parent from the node's "clocks" property -- this led to a wrong PWM
clock's parent clock.
Fixes: 2a29f9d6fea8 ("ARM: dts: r8a7794: add MSTP5 clocks")
Signed-off-by: Sergei Shtylyov
Acked-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r8a7794.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index 611ec6df5cf6..9365580a194f 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -1251,7 +1251,7 @@
mstp5_clks: mstp5_clks@e6150144 {
compatible = "renesas,r8a7794-mstp-clocks",
"renesas,cpg-mstp-clocks";
reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>;
- clocks = <&hp_clk>, <&extal_clk>, <&p_clk>;
+ clocks = <&hp_clk>, <&p_clk>;
#clock-cells = <1>;
clock-indices = ;
--
2.7.0.rc3.207.g0ac5344
[PATCH 03/26] ARM: dts: alt: add MMCIF support
Define the Alt board dependent part of the MMCIF device node.
Like the Silk the board has eMMC chip along with the necessary voltage
regulator (note that the Vcc/Vccq regulator is dummy -- it's required by
the MMCIF driver but doesn't actually exist on the board).
Based on work for the Silk board by Vladimir Barinov and Sergei Shtylyov.
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r8a7794-alt.dts | 25 +
1 file changed, 25 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7794-alt.dts
b/arch/arm/boot/dts/r8a7794-alt.dts
index fe7c128cc965..8d1b35afaf82 100644
--- a/arch/arm/boot/dts/r8a7794-alt.dts
+++ b/arch/arm/boot/dts/r8a7794-alt.dts
@@ -30,6 +30,15 @@
reg = <0 0x4000 0 0x4000>;
};
+ d3_3v: regulator-d3-3v {
+ compatible = "regulator-fixed";
+ regulator-name = "D3.3V";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
vcc_sdhi0: regulator-vcc-sdhi0 {
compatible = "regulator-fixed";
@@ -190,6 +199,11 @@
function = "vin0";
};
+ mmcif0_pins: mmcif0 {
+ groups = "mmc_data8", "mmc_ctrl";
+ function = "mmc";
+ };
+
sdhi0_pins: sd0 {
groups = "sdhi0_data4", "sdhi0_ctrl";
function = "sdhi0";
@@ -228,6 +242,17 @@
};
};
+&mmcif0 {
+ pinctrl-0 = <&mmcif0_pins>;
+ pinctrl-names = "default";
+
+ vmmc-supply = <&d3_3v>;
+ vqmmc-supply = <&d3_3v>;
+ bus-width = <8>;
+ non-removable;
+ status = "okay";
+};
+
&sdhi0 {
pinctrl-0 = <&sdhi0_pins>;
pinctrl-names = "default";
--
2.7.0.rc3.207.g0ac5344
[PATCH 12/26] ARM: dts: document Wheat board
From: Sergei Shtylyov Document the Wheat device tree bindings, listing it as a supported board. This allows to use checkpatch.pl to validate .dts files referring to the Wheat board. Signed-off-by: Sergei Shtylyov Acked-by: Geert Uytterhoeven Acked-by: Rob Herring Signed-off-by: Simon Horman --- Documentation/devicetree/bindings/arm/shmobile.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/shmobile.txt b/Documentation/devicetree/bindings/arm/shmobile.txt index 1df32d339da5..90cf237ee558 100644 --- a/Documentation/devicetree/bindings/arm/shmobile.txt +++ b/Documentation/devicetree/bindings/arm/shmobile.txt @@ -69,3 +69,5 @@ Boards: compatible = "renesas,salvator-x", "renesas,r8a7796"; - SILK (RTP0RC7794LCB00011S) compatible = "renesas,silk", "renesas,r8a7794" + - Wheat +compatible = "renesas,wheat", "renesas,r8a7792" -- 2.7.0.rc3.207.g0ac5344
[PATCH 14/26] ARM: dts: wheat: add Ethernet support
From: Sergei Shtylyov
R8A7792 SoC doesn't have the EtherMAC core, so SMSC LAN89218 Ethernet
chip was used instead on the Wheat debug board; this chip is compatible
with SMSC LAN9115 for which there's a (device tree aware) driver.
Describe the chip in the Wheat device tree unconditionally (the driver
should fail the probe if the debug board isn't connected); enable DHCP and
NFS root in the command line for the kernel boot...
Based on the original (and large) patch by Vladimir Barinov
.
Signed-off-by: Sergei Shtylyov
Reviewed-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r8a7792-wheat.dts | 38 -
1 file changed, 37 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/r8a7792-wheat.dts
b/arch/arm/boot/dts/r8a7792-wheat.dts
index 22ae14ffc917..e214d707f81d 100644
--- a/arch/arm/boot/dts/r8a7792-wheat.dts
+++ b/arch/arm/boot/dts/r8a7792-wheat.dts
@@ -21,7 +21,7 @@
};
chosen {
- bootargs = "ignore_loglevel";
+ bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
stdout-path = "serial0:115200n8";
};
@@ -29,6 +29,31 @@
device_type = "memory";
reg = <0 0x4000 0 0x4000>;
};
+
+ d3_3v: regulator-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "D3.3V";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ethernet@1800 {
+ compatible = "smsc,lan89218", "smsc,lan9115";
+ reg = <0 0x1800 0 0x100>;
+ phy-mode = "mii";
+ interrupt-parent = <&irqc>;
+ interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
+ smsc,irq-push-pull;
+ smsc,save-mac-address;
+ reg-io-width = <4>;
+ vddvario-supply = <&d3_3v>;
+ vdd33a-supply = <&d3_3v>;
+
+ pinctrl-0 = <&lan89218_pins>;
+ pinctrl-names = "default";
+ };
};
&extal_clk {
@@ -40,6 +65,17 @@
groups = "scif0_data";
function = "scif0";
};
+
+ lan89218_pins: lan89218 {
+ intc {
+ groups = "intc_irq0";
+ function = "intc";
+ };
+ lbsc {
+ groups = "lbsc_ex_cs0";
+ function = "lbsc";
+ };
+ };
};
&scif0 {
--
2.7.0.rc3.207.g0ac5344
[PATCH 16/26] ARM: dts: rskrza1: initial device tree
From: Chris Brandt
Add the initial device tree for the RZ/A1 based development board (RSK).
Signed-off-by: Chris Brandt
Reviewed-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/r7s72100-rskrza1.dts | 52 ++
2 files changed, 53 insertions(+)
create mode 100644 arch/arm/boot/dts/r7s72100-rskrza1.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index d289ec733d2e..80193b3a450b 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -651,6 +651,7 @@ dtb-$(CONFIG_ARCH_S5PV210) += \
dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += \
emev2-kzm9d.dtb \
r7s72100-genmai.dtb \
+ r7s72100-rskrza1.dtb \
r8a73a4-ape6evm.dtb \
r8a7740-armadillo800eva.dtb \
r8a7778-bockw.dtb \
diff --git a/arch/arm/boot/dts/r7s72100-rskrza1.dts
b/arch/arm/boot/dts/r7s72100-rskrza1.dts
new file mode 100644
index ..aabfa0459dc1
--- /dev/null
+++ b/arch/arm/boot/dts/r7s72100-rskrza1.dts
@@ -0,0 +1,52 @@
+/*
+ * Device Tree Source for the RZ/A1H RSK board
+ *
+ * Copyright (C) 2016 Renesas Electronics
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/dts-v1/;
+#include "r7s72100.dtsi"
+
+/ {
+ model = "RSKRZA1";
+ compatible = "renesas,rskrza1", "renesas,r7s72100";
+
+ aliases {
+ serial0 = &scif2;
+ };
+
+ chosen {
+ bootargs = "ignore_loglevel";
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@800 {
+ device_type = "memory";
+ reg = <0x0800 0x0200>;
+ };
+
+ lbsc {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ };
+};
+
+&extal_clk {
+ clock-frequency = <1333>;
+};
+
+&usb_x1_clk {
+ clock-frequency = <4800>;
+};
+
+&mtu2 {
+ status = "okay";
+};
+
+&scif2 {
+ status = "okay";
+};
--
2.7.0.rc3.207.g0ac5344
[PATCH 05/26] ARM: dts: r8a7791: Remove obsolete vsp1 properties
From: Geert Uytterhoeven
As of commit 5aa2eb3c86d4fd16 ("[media] v4l: vsp1: Configure device
based on IP version"), the DT properties to identify the exact VSP
device instance features are no longer used. Hence remove them.
Signed-off-by: Geert Uytterhoeven
Reviewed-by: Laurent Pinchart
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r8a7791.dtsi | 18 --
1 file changed, 18 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index 8f0086bbd96b..162b55c665a3 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -983,12 +983,6 @@
interrupts = ;
clocks = <&mstp1_clks R8A7791_CLK_VSP1_S>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
-
- renesas,has-lut;
- renesas,has-sru;
- renesas,#rpf = <5>;
- renesas,#uds = <3>;
- renesas,#wpf = <4>;
};
vsp1@fe93 {
@@ -997,12 +991,6 @@
interrupts = ;
clocks = <&mstp1_clks R8A7791_CLK_VSP1_DU0>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
-
- renesas,has-lif;
- renesas,has-lut;
- renesas,#rpf = <4>;
- renesas,#uds = <1>;
- renesas,#wpf = <4>;
};
vsp1@fe938000 {
@@ -1011,12 +999,6 @@
interrupts = ;
clocks = <&mstp1_clks R8A7791_CLK_VSP1_DU1>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
-
- renesas,has-lif;
- renesas,has-lut;
- renesas,#rpf = <4>;
- renesas,#uds = <1>;
- renesas,#wpf = <4>;
};
du: display@feb0 {
--
2.7.0.rc3.207.g0ac5344
[PATCH 08/26] ARM: dts: blanche: add DU support
From: Sergei Shtylyov
Define the Blanche board dependent part of the DU device node.
Add the device nodes for the Analog Devices ADV7511W HDMI transmitter
(connected to DU0) and ADV7123 video DAC (connected to DU1). Add the
necessary subnodes to interconnect DU, HDMI/VDAC devices, and HDMI/VGA
connectors.
Signed-off-by: Sergei Shtylyov
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r8a7792-blanche.dts | 125 ++
1 file changed, 125 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7792-blanche.dts
b/arch/arm/boot/dts/r8a7792-blanche.dts
index 436d44ea3c12..3c6f42b9fe9f 100644
--- a/arch/arm/boot/dts/r8a7792-blanche.dts
+++ b/arch/arm/boot/dts/r8a7792-blanche.dts
@@ -57,6 +57,61 @@
pinctrl-names = "default";
};
+ vga-encoder {
+ compatible = "adi,adv7123";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ adv7123_in: endpoint {
+ remote-endpoint = <&du_out_rgb1>;
+ };
+ };
+ port@1 {
+ reg = <1>;
+ adv7123_out: endpoint {
+ remote-endpoint = <&vga_in>;
+ };
+ };
+ };
+ };
+
+ hdmi-out {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con: endpoint {
+ remote-endpoint = <&adv7511_out>;
+ };
+ };
+ };
+
+ vga {
+ compatible = "vga-connector";
+
+ port {
+ vga_in: endpoint {
+ remote-endpoint = <&adv7123_out>;
+ };
+ };
+ };
+
+ x1_clk: x1 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <7425>;
+ };
+
+ x2_clk: x2 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <6500>;
+ };
+
keyboard {
compatible = "gpio-keys";
@@ -155,6 +210,16 @@
groups = "sdhi0_data4", "sdhi0_ctrl";
function = "sdhi0";
};
+
+ du0_pins: du0 {
+ groups = "du0_rgb888", "du0_sync", "du0_disp";
+ function = "du0";
+ };
+
+ du1_pins: du1 {
+ groups = "du1_rgb666", "du1_sync", "du1_disp";
+ function = "du1";
+ };
};
&scif0 {
@@ -186,3 +251,63 @@
cd-gpios = <&gpio11 11 GPIO_ACTIVE_LOW>;
status = "okay";
};
+
+&i2c1 {
+ status = "okay";
+ clock-frequency = <40>;
+
+ hdmi@39 {
+ compatible = "adi,adv7511w";
+ reg = <0x39>;
+ interrupt-parent = <&irqc>;
+ interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
+
+ adi,input-depth = <8>;
+ adi,input-colorspace = "rgb";
+ adi,input-clock = "1x";
+ adi,input-style = <1>;
+ adi,input-justification = "evenly";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ adv7511_in: endpoint {
+ remote-endpoint = <&du_out_rgb0>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ adv7511_out: endpoint {
+ remote-endpoint = <&hdmi_con>;
+ };
+ };
+ };
+ };
+};
+
+&du {
+ pinctrl-0 = <&du0_pins &du1_pins>;
+ pinctrl-names = "default";
+
+ clocks = <&mstp7_clks R8A7792_CLK_DU0>, <&mstp7_clks R8A7792_CLK_DU1>,
+<&x1_clk>, <&x2_clk>;
+ clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1";
+ status = "okay";
+
+ ports {
+ port@0 {
+ endpoint {
+ remote-endpoint = <&adv7511_in>;
+ };
+ };
+ port@1 {
+ endpoint {
+ remote-endpoint = <&adv7123_in>;
+ };
+ };
+ };
+};
--
2.7.0.rc3.207.g0ac5344
[PATCH 04/26] ARM: dts: r8a7790: Remove obsolete vsp1 properties
From: Geert Uytterhoeven
As of commit 5aa2eb3c86d4fd16 ("[media] v4l: vsp1: Configure device
based on IP version"), the DT properties to identify the exact VSP
device instance features are no longer used. Hence remove them.
Signed-off-by: Geert Uytterhoeven
Reviewed-by: Laurent Pinchart
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r8a7790.dtsi | 23 ---
1 file changed, 23 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index d18558f21102..351fcc2f87df 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -944,11 +944,6 @@
interrupts = ;
clocks = <&mstp1_clks R8A7790_CLK_VSP1_R>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
-
- renesas,has-sru;
- renesas,#rpf = <5>;
- renesas,#uds = <1>;
- renesas,#wpf = <4>;
};
vsp1@fe928000 {
@@ -957,12 +952,6 @@
interrupts = ;
clocks = <&mstp1_clks R8A7790_CLK_VSP1_S>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
-
- renesas,has-lut;
- renesas,has-sru;
- renesas,#rpf = <5>;
- renesas,#uds = <3>;
- renesas,#wpf = <4>;
};
vsp1@fe93 {
@@ -971,12 +960,6 @@
interrupts = ;
clocks = <&mstp1_clks R8A7790_CLK_VSP1_DU0>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
-
- renesas,has-lif;
- renesas,has-lut;
- renesas,#rpf = <4>;
- renesas,#uds = <1>;
- renesas,#wpf = <4>;
};
vsp1@fe938000 {
@@ -985,12 +968,6 @@
interrupts = ;
clocks = <&mstp1_clks R8A7790_CLK_VSP1_DU1>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
-
- renesas,has-lif;
- renesas,has-lut;
- renesas,#rpf = <4>;
- renesas,#uds = <1>;
- renesas,#wpf = <4>;
};
du: display@feb0 {
--
2.7.0.rc3.207.g0ac5344
[PATCH 15/26] ARM: dts: Add RSKRZA1 DT bindings documentation
From: Chris Brandt Add RSKRZA1 Device tree bindings Documentation, listing it as a supported board. This allows to use checkpatch to validate DTSes referring to the RSKRZA1 board. Signed-off-by: Chris Brandt Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- Documentation/devicetree/bindings/arm/shmobile.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/shmobile.txt b/Documentation/devicetree/bindings/arm/shmobile.txt index 90cf237ee558..5484c31d555f 100644 --- a/Documentation/devicetree/bindings/arm/shmobile.txt +++ b/Documentation/devicetree/bindings/arm/shmobile.txt @@ -63,6 +63,8 @@ Boards: compatible = "renesas,marzen", "renesas,r8a7779" - Porter (M2-LCDP) compatible = "renesas,porter", "renesas,r8a7791" + - RSKRZA1 (YR0K77210C000BE) +compatible = "renesas,rskrza1", "renesas,r7s72100" - Salvator-X (RTP0RC7795SIPB0010S) compatible = "renesas,salvator-x", "renesas,r8a7795"; - Salvator-X -- 2.7.0.rc3.207.g0ac5344
[PATCH 13/26] ARM: dts: wheat: initial device tree
From: Sergei Shtylyov
Add the initial device tree for the R8A7792 SoC based Wheat board.
The Wheat board itself has no serial ports wired up, the USB serial chips
are situated on a separate debug board and one of them is connected to
SCFI0 -- include unconditional support for it, so that the serial console
can work.
Based on the original (and large) patch by Vladimir Barinov
.
Signed-off-by: Sergei Shtylyov
Reviewed-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/r8a7792-wheat.dts | 50 +
2 files changed, 51 insertions(+)
create mode 100644 arch/arm/boot/dts/r8a7792-wheat.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index faacd52370d2..d289ec733d2e 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -659,6 +659,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += \
r8a7791-koelsch.dtb \
r8a7791-porter.dtb \
r8a7792-blanche.dtb \
+ r8a7792-wheat.dtb \
r8a7793-gose.dtb \
r8a7794-alt.dtb \
r8a7794-silk.dtb \
diff --git a/arch/arm/boot/dts/r8a7792-wheat.dts
b/arch/arm/boot/dts/r8a7792-wheat.dts
new file mode 100644
index ..22ae14ffc917
--- /dev/null
+++ b/arch/arm/boot/dts/r8a7792-wheat.dts
@@ -0,0 +1,50 @@
+/*
+ * Device Tree Source for the Wheat board
+ *
+ * Copyright (C) 2016 Renesas Electronics Corporation
+ * Copyright (C) 2016 Cogent Embedded, Inc.
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/dts-v1/;
+#include "r8a7792.dtsi"
+
+/ {
+ model = "Wheat";
+ compatible = "renesas,wheat", "renesas,r8a7792";
+
+ aliases {
+ serial0 = &scif0;
+ };
+
+ chosen {
+ bootargs = "ignore_loglevel";
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@4000 {
+ device_type = "memory";
+ reg = <0 0x4000 0 0x4000>;
+ };
+};
+
+&extal_clk {
+ clock-frequency = <2000>;
+};
+
+&pfc {
+ scif0_pins: scif0 {
+ groups = "scif0_data";
+ function = "scif0";
+ };
+};
+
+&scif0 {
+ pinctrl-0 = <&scif0_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};
--
2.7.0.rc3.207.g0ac5344
[PATCH 18/26] ARM: dts: r7s72100: add ethernet to device tree
From: Chris Brandt
Signed-off-by: Chris Brandt
Reviewed-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r7s72100.dtsi | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi
index 6d29e8ffa0d9..fb9ef9ca120e 100644
--- a/arch/arm/boot/dts/r7s72100.dtsi
+++ b/arch/arm/boot/dts/r7s72100.dtsi
@@ -428,4 +428,17 @@
power-domains = <&cpg_clocks>;
status = "disabled";
};
+
+ ether: ethernet@e8203000 {
+ compatible = "renesas,ether-r7s72100";
+ reg = <0xe8203000 0x800>,
+ <0xe8204800 0x200>;
+ interrupts = ;
+ clocks = <&mstp7_clks R7S72100_CLK_ETHER>;
+ power-domains = <&cpg_clocks>;
+ phy-mode = "mii";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
};
--
2.7.0.rc3.207.g0ac5344
[PATCH 10/26] ARM: dts: r8a7792: add VSP1V support
From: Sergei Shtylyov
Describe 3 instances (VSPS, VSPD0, and VSPD1) of the VSP1V in the R8A7792
device tree.
Signed-off-by: Sergei Shtylyov
Reviewed-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
arch/arm/boot/dts/r8a7792.dtsi | 24
1 file changed, 24 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi
index 856e6c5b94bc..ff47755fb01e 100644
--- a/arch/arm/boot/dts/r8a7792.dtsi
+++ b/arch/arm/boot/dts/r8a7792.dtsi
@@ -668,6 +668,30 @@
status = "disabled";
};
+ vsp1@fe928000 {
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe928000 0 0x8000>;
+ interrupts = ;
+ clocks = <&mstp1_clks R8A7792_CLK_VSP1_SY>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ };
+
+ vsp1@fe93 {
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe93 0 0x8000>;
+ interrupts = ;
+ clocks = <&mstp1_clks R8A7792_CLK_VSP1DU0>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ };
+
+ vsp1@fe938000 {
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe938000 0 0x8000>;
+ interrupts = ;
+ clocks = <&mstp1_clks R8A7792_CLK_VSP1DU1>;
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ };
+
/* Special CPG clocks */
cpg_clocks: cpg_clocks@e615 {
compatible = "renesas,r8a7792-cpg-clocks",
--
2.7.0.rc3.207.g0ac5344
Re: [PATCH] v4l: vsp1: Add support for capture and output in HSV formats
On 09/07/16 02:14, Laurent Pinchart wrote:
Support both the HSV24 and HSV32 formats. From a hardware point of view
pretend the formats are RGB, the RPF and WPF will just pass the data
through without performing any processing.
Signed-off-by: Laurent Pinchart
Acked-by: Hans Verkuil
Regards,
Hans
---
This patch is based on top of Ricardo's "[PATCH v5 00/12] Add HSV format"
series. I have tested it with the VSP test suite available at
git://git.ideasonboard.com/renesas/vsp-tests.git hsv
drivers/media/platform/vsp1/vsp1_pipe.c | 8
drivers/media/platform/vsp1/vsp1_rwpf.c | 2 ++
drivers/media/platform/vsp1/vsp1_video.c | 5 +
3 files changed, 15 insertions(+)
diff --git a/drivers/media/platform/vsp1/vsp1_pipe.c
b/drivers/media/platform/vsp1/vsp1_pipe.c
index 052a6037b9cb..c0b8641d2158 100644
--- a/drivers/media/platform/vsp1/vsp1_pipe.c
+++ b/drivers/media/platform/vsp1/vsp1_pipe.c
@@ -80,6 +80,14 @@ static const struct vsp1_format_info vsp1_video_formats[] = {
VI6_FMT_ARGB_, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
1, { 32, 0, 0 }, false, false, 1, 1, false },
+ { V4L2_PIX_FMT_HSV24, MEDIA_BUS_FMT_AHSV_1X32,
+ VI6_FMT_RGB_888, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
+ VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
+ 1, { 24, 0, 0 }, false, false, 1, 1, false },
+ { V4L2_PIX_FMT_HSV32, MEDIA_BUS_FMT_AHSV_1X32,
+ VI6_FMT_ARGB_, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
+ VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
+ 1, { 32, 0, 0 }, false, false, 1, 1, false },
{ V4L2_PIX_FMT_UYVY, MEDIA_BUS_FMT_AYUV8_1X32,
VI6_FMT_YUYV_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
diff --git a/drivers/media/platform/vsp1/vsp1_rwpf.c
b/drivers/media/platform/vsp1/vsp1_rwpf.c
index 8d461b375e91..13e969ac1538 100644
--- a/drivers/media/platform/vsp1/vsp1_rwpf.c
+++ b/drivers/media/platform/vsp1/vsp1_rwpf.c
@@ -37,6 +37,7 @@ static int vsp1_rwpf_enum_mbus_code(struct v4l2_subdev
*subdev,
{
static const unsigned int codes[] = {
MEDIA_BUS_FMT_ARGB_1X32,
+ MEDIA_BUS_FMT_AHSV_1X32,
MEDIA_BUS_FMT_AYUV8_1X32,
};
@@ -74,6 +75,7 @@ static int vsp1_rwpf_set_format(struct v4l2_subdev *subdev,
/* Default to YUV if the requested format is not supported. */
if (fmt->format.code != MEDIA_BUS_FMT_ARGB_1X32 &&
+ fmt->format.code != MEDIA_BUS_FMT_AHSV_1X32 &&
fmt->format.code != MEDIA_BUS_FMT_AYUV8_1X32)
fmt->format.code = MEDIA_BUS_FMT_AYUV8_1X32;
diff --git a/drivers/media/platform/vsp1/vsp1_video.c
b/drivers/media/platform/vsp1/vsp1_video.c
index 7215e08eff6e..325377d7c444 100644
--- a/drivers/media/platform/vsp1/vsp1_video.c
+++ b/drivers/media/platform/vsp1/vsp1_video.c
@@ -126,6 +126,11 @@ static int __vsp1_video_try_format(struct vsp1_video
*video,
pix->pixelformat = info->fourcc;
pix->colorspace = V4L2_COLORSPACE_SRGB;
pix->field = V4L2_FIELD_NONE;
+
+ if (info->fourcc == V4L2_PIX_FMT_HSV24 ||
+ info->fourcc == V4L2_PIX_FMT_HSV32)
+ pix->hsv_enc = V4L2_HSV_ENC_256;
+
memset(pix->reserved, 0, sizeof(pix->reserved));
/* Align the width and height for YUV 4:2:2 and 4:2:0 formats. */
[GIT PULL] Renesas ARM64 Based SoC Defconfig Updates for v4.9
Hi Olof, Hi Kevin, Hi Arnd, Please consider these Renesas ARM64 based SoC defconfig updates for v4.9. The following changes since commit 29b4817d4018df78086157ea3a55c1d9424a7cfc: Linux 4.8-rc1 (2016-08-07 18:18:00 -0700) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-arm64-defconfig-for-v4.9 for you to fetch changes up to 6c04d2f7f1038bf6e5561827f862c6aa2beb4b37: arm64: defconfig: Enable SDHI and GPIO_REGULATOR (2016-09-01 16:32:46 +0200) Renesas ARM64 Based SoC Defconfig Updates for v4.9 * Enable HSUSB and SDHI Simon Horman (1): arm64: defconfig: Enable SDHI and GPIO_REGULATOR Yoshihiro Shimoda (1): arm64: defconfig: Add Renesas R-Car HSUSB driver support as module arch/arm64/configs/defconfig | 4 1 file changed, 4 insertions(+)
[GIT PULL] Renesas ARM Based SoC Fixes for v4.8
Hi Olof, Hi Kevin, Hi Arnd, Please consider these Renesas ARM based SoC fixes for v4.8. This relaxes the requirement that all da9xxx devices are added before the drivers for any are initialised. The following changes since commit 29b4817d4018df78086157ea3a55c1d9424a7cfc: Linux 4.8-rc1 (2016-08-07 18:18:00 -0700) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-fixes-for-v4.8 for you to fetch changes up to c2f321126e31cd69365e65ecd4a7c774e4fc71d2: ARM: shmobile: fix regulator quirk for Gen2 (2016-09-02 10:15:38 +0200) Renesas ARM Based SoC Fixes for v4.8 * Correct R-Car Gen2 regulator quirk Wolfram Sang (1): ARM: shmobile: fix regulator quirk for Gen2 arch/arm/mach-shmobile/regulator-quirk-rcar-gen2.c | 62 +- 1 file changed, 26 insertions(+), 36 deletions(-)
[PATCH 2/2] arm64: defconfig: Enable SDHI and GPIO_REGULATOR
This allows use of the SDHI SD/SDIO controller present on R-Car Gen3 SoCs and already enabled in the DT of the r8a7795/salvator-x (H3). Signed-off-by: Simon Horman --- arch/arm64/configs/defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 458d891aaa8e..2c0be455230f 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -229,6 +229,7 @@ CONFIG_REGULATOR=y CONFIG_MFD_CROS_EC=y CONFIG_MFD_CROS_EC_I2C=y CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_REGULATOR_GPIO=y CONFIG_REGULATOR_HI655X=y CONFIG_REGULATOR_MAX77620=y CONFIG_REGULATOR_PWM=y @@ -287,6 +288,7 @@ CONFIG_MMC_SDHCI_OF_ESDHC=y CONFIG_MMC_SDHCI_TEGRA=y CONFIG_MMC_SDHCI_MSM=y CONFIG_MMC_SPI=y +CONFIG_MMC_SDHI=y CONFIG_MMC_DW=y CONFIG_MMC_DW_EXYNOS=y CONFIG_MMC_DW_K3=y -- 2.7.0.rc3.207.g0ac5344
[PATCH] ARM: shmobile: fix regulator quirk for Gen2
From: Wolfram Sang
The current implementation only works if the da9xxx devices are added
before their drivers are registered. Only then it can apply the fixes to
both devices. Otherwise, the driver for the first device gets probed
before the fix for the second device can be applied. This is what
fails when using the IP core switcher or when having the i2c master
driver as a module.
So, we need to disable both da9xxx once we detected one of them. We now
use i2c_transfer with hardcoded i2c_messages and device addresses, so we
don't need the da9xxx client devices to be instantiated. Because the
fixup is used on specific boards only, the addresses are not going to
change.
Fixes: 663fbb52159cca ("ARM: shmobile: R-Car Gen2: Add da9063/da9210 regulator
quirk")
Signed-off-by: Wolfram Sang
Reviewed-by: Geert Uytterhoeven
Tested-by: Geert Uytterhoeven (r8a7791/koelsch)
Tested-by: Kuninori Morimoto
Signed-off-by: Simon Horman
---
arch/arm/mach-shmobile/regulator-quirk-rcar-gen2.c | 62 +-
1 file changed, 26 insertions(+), 36 deletions(-)
diff --git a/arch/arm/mach-shmobile/regulator-quirk-rcar-gen2.c
b/arch/arm/mach-shmobile/regulator-quirk-rcar-gen2.c
index 62437b57813e..73e3adbc1330 100644
--- a/arch/arm/mach-shmobile/regulator-quirk-rcar-gen2.c
+++ b/arch/arm/mach-shmobile/regulator-quirk-rcar-gen2.c
@@ -41,39 +41,26 @@
#define REGULATOR_IRQ_MASK BIT(2) /* IRQ2, active low */
-static void __iomem *irqc;
-
-static const u8 da9063_mask_regs[] = {
- DA9063_REG_IRQ_MASK_A,
- DA9063_REG_IRQ_MASK_B,
- DA9063_REG_IRQ_MASK_C,
- DA9063_REG_IRQ_MASK_D,
-};
-
-/* DA9210 System Control and Event Registers */
+/* start of DA9210 System Control and Event Registers */
#define DA9210_REG_MASK_A 0x54
-#define DA9210_REG_MASK_B 0x55
-
-static const u8 da9210_mask_regs[] = {
- DA9210_REG_MASK_A,
- DA9210_REG_MASK_B,
-};
-
-static void da9xxx_mask_irqs(struct i2c_client *client, const u8 regs[],
-unsigned int nregs)
-{
- unsigned int i;
- dev_info(&client->dev, "Masking %s interrupt sources\n", client->name);
+static void __iomem *irqc;
- for (i = 0; i < nregs; i++) {
- int error = i2c_smbus_write_byte_data(client, regs[i], ~0);
- if (error) {
- dev_err(&client->dev, "i2c error %d\n", error);
- return;
- }
- }
-}
+/* first byte sets the memory pointer, following are consecutive reg values */
+static u8 da9063_irq_clr[] = { DA9063_REG_IRQ_MASK_A, 0xff, 0xff, 0xff, 0xff };
+static u8 da9210_irq_clr[] = { DA9210_REG_MASK_A, 0xff, 0xff };
+
+static struct i2c_msg da9xxx_msgs[2] = {
+ {
+ .addr = 0x58,
+ .len = ARRAY_SIZE(da9063_irq_clr),
+ .buf = da9063_irq_clr,
+ }, {
+ .addr = 0x68,
+ .len = ARRAY_SIZE(da9210_irq_clr),
+ .buf = da9210_irq_clr,
+ },
+};
static int regulator_quirk_notify(struct notifier_block *nb,
unsigned long action, void *data)
@@ -93,12 +80,15 @@ static int regulator_quirk_notify(struct notifier_block *nb,
client = to_i2c_client(dev);
dev_dbg(dev, "Detected %s\n", client->name);
- if ((client->addr == 0x58 && !strcmp(client->name, "da9063")))
- da9xxx_mask_irqs(client, da9063_mask_regs,
-ARRAY_SIZE(da9063_mask_regs));
- else if (client->addr == 0x68 && !strcmp(client->name, "da9210"))
- da9xxx_mask_irqs(client, da9210_mask_regs,
-ARRAY_SIZE(da9210_mask_regs));
+ if ((client->addr == 0x58 && !strcmp(client->name, "da9063")) ||
+ (client->addr == 0x68 && !strcmp(client->name, "da9210"))) {
+ int ret;
+
+ dev_info(&client->dev, "clearing da9063/da9210 interrupts\n");
+ ret = i2c_transfer(client->adapter, da9xxx_msgs,
ARRAY_SIZE(da9xxx_msgs));
+ if (ret != ARRAY_SIZE(da9xxx_msgs))
+ dev_err(&client->dev, "i2c error %d\n", ret);
+ }
mon = ioread32(irqc + IRQC_MONITOR);
if (mon & REGULATOR_IRQ_MASK)
--
2.7.0.rc3.207.g0ac5344
[PATCH 3/3] ARM: shmobile: r8a7791: only use smp_init when SMP is selected
From: Wolfram Sang
We use the helper function which populates the smp_init pointer only in
case of SMP.
Signed-off-by: Wolfram Sang
Signed-off-by: Simon Horman
---
arch/arm/mach-shmobile/setup-r8a7791.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-shmobile/setup-r8a7791.c
b/arch/arm/mach-shmobile/setup-r8a7791.c
index 110e8b588e56..26e2d181a190 100644
--- a/arch/arm/mach-shmobile/setup-r8a7791.c
+++ b/arch/arm/mach-shmobile/setup-r8a7791.c
@@ -29,7 +29,7 @@ static const char *const r8a7791_boards_compat_dt[]
__initconst = {
};
DT_MACHINE_START(R8A7791_DT, "Generic R8A7791 (Flattened Device Tree)")
- .smp_init = shmobile_smp_init_fallback_ops,
+ .smp_init = smp_init_ops(shmobile_smp_init_fallback_ops),
.smp= smp_ops(r8a7791_smp_ops),
.init_early = shmobile_init_delay,
.init_time = rcar_gen2_timer_init,
--
2.7.0.rc3.207.g0ac5344
[PATCH 1/2] arm64: defconfig: Add Renesas R-Car HSUSB driver support as module
From: Yoshihiro Shimoda Signed-off-by: Yoshihiro Shimoda Signed-off-by: Simon Horman --- arch/arm64/configs/defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 0555b7caaf2c..458d891aaa8e 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -265,6 +265,7 @@ CONFIG_USB_EHCI_HCD_PLATFORM=y CONFIG_USB_OHCI_EXYNOS=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_HCD_PLATFORM=y +CONFIG_USB_RENESAS_USBHS=m CONFIG_USB_STORAGE=y CONFIG_USB_DWC2=y CONFIG_USB_DWC3=y @@ -276,6 +277,7 @@ CONFIG_USB_HSIC_USB3503=y CONFIG_USB_MSM_OTG=y CONFIG_USB_ULPI=y CONFIG_USB_GADGET=y +CONFIG_USB_RENESAS_USBHS_UDC=m CONFIG_MMC=y CONFIG_MMC_BLOCK_MINORS=32 CONFIG_MMC_ARMMMCI=y -- 2.7.0.rc3.207.g0ac5344
[GIT PULL] Renesas ARM Based SoC Updates for v4.9
Hi Olof, Hi Kevin, Hi Arnd, Please consider these Renesas ARM based SoC updates for v4.9. The following changes since commit 29b4817d4018df78086157ea3a55c1d9424a7cfc: Linux 4.8-rc1 (2016-08-07 18:18:00 -0700) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-soc-for-v4.9 for you to fetch changes up to 82acc69402d91bde8657c0db26e5211943de65fd: ARM: shmobile: r8a7791: only use smp_init when SMP is selected (2016-08-24 09:08:57 +0200) Renesas ARM Based SoC Updates for v4.9 Clean-up: * Only use smp_init when SMP is selected Enablement: * Add debug-ll support for r8a7992 Geert Uytterhoeven (1): ARM: debug-ll: Add support for r8a7992 Wolfram Sang (2): ARM: shmobile: r8a7790: only use smp_init when SMP is selected ARM: shmobile: r8a7791: only use smp_init when SMP is selected arch/arm/Kconfig.debug | 8 arch/arm/mach-shmobile/setup-r8a7790.c | 2 +- arch/arm/mach-shmobile/setup-r8a7791.c | 2 +- 3 files changed, 6 insertions(+), 6 deletions(-)
[PATCH 1/3] ARM: debug-ll: Add support for r8a7992
From: Geert Uytterhoeven Enable low-level debugging support for R-Car V2H (r8a7792). V2H uses SCIF0 for the debug console, like most other R-Car Gen2 SoCs. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/Kconfig.debug | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index a9693b6987a6..88440f63c31e 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -861,12 +861,12 @@ choice via SCIF2 on Renesas R-Car H1 (R8A7779). config DEBUG_RCAR_GEN2_SCIF0 - bool "Kernel low-level debugging messages via SCIF0 on R8A7790/R8A7791/R8A7793" - depends on ARCH_R8A7790 || ARCH_R8A7791 || ARCH_R8A7793 + bool "Kernel low-level debugging messages via SCIF0 on R8A7790/R8A7791/R8A7792/R8A7793" + depends on ARCH_R8A7790 || ARCH_R8A7791 || ARCH_R8A7792 || ARCH_R8A7793 help Say Y here if you want kernel low-level debugging support - via SCIF0 on Renesas R-Car H2 (R8A7790), M2-W (R8A7791), or - M2-N (R8A7793). + via SCIF0 on Renesas R-Car H2 (R8A7790), M2-W (R8A7791), V2H + (R8A7792), or M2-N (R8A7793). config DEBUG_RCAR_GEN2_SCIF2 bool "Kernel low-level debugging messages via SCIF2 on R8A7794" -- 2.7.0.rc3.207.g0ac5344
[PATCH 2/3] ARM: shmobile: r8a7790: only use smp_init when SMP is selected
From: Wolfram Sang
We use the helper function which populates the smp_init pointer only in
case of SMP.
Signed-off-by: Wolfram Sang
Signed-off-by: Simon Horman
---
arch/arm/mach-shmobile/setup-r8a7790.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c
b/arch/arm/mach-shmobile/setup-r8a7790.c
index 3506327e0bed..78d3e859bd64 100644
--- a/arch/arm/mach-shmobile/setup-r8a7790.c
+++ b/arch/arm/mach-shmobile/setup-r8a7790.c
@@ -28,7 +28,7 @@ static const char * const r8a7790_boards_compat_dt[]
__initconst = {
};
DT_MACHINE_START(R8A7790_DT, "Generic R8A7790 (Flattened Device Tree)")
- .smp_init = shmobile_smp_init_fallback_ops,
+ .smp_init = smp_init_ops(shmobile_smp_init_fallback_ops),
.smp= smp_ops(r8a7790_smp_ops),
.init_early = shmobile_init_delay,
.init_time = rcar_gen2_timer_init,
--
2.7.0.rc3.207.g0ac5344
[ANNOUNCE] Renesas tree closed for v4.9
Hi, I would like to stop accepting non-bug-fix patches for v4.9 and get the last pull requests posted by the end of this week. This is in order for them to be sent before the release of v4.8-rc6, the deadline set by the ARM SoC maintainers. As patches should ideally progress from the renesas tree into linux-next before sending pull requests there is a few days lead time involved. I intend to begin queueing up patches for v4.10 as new patches are ready.
Re: [PATCH] v4l: vsp1: Add support for capture and output in HSV formats
Hi Laurent, On Wed, Sep 7, 2016 at 9:09 AM, Laurent Pinchart wrote: >> >> Signed-off-by: Ricardo Ribalda Delgado > > Do you mean Acked-by ? Acked-by: Ricardo Ribalda Delgado Ups, my bad > > Feel free to take the patch in your tree to get it merged along with the HSV > series. I do not really have a tree, I have a github account that is it. Let me ask Hans on the irc how to procede from here. I really appreciate your help! -- Ricardo Ribalda
Re: [PATCH] v4l: vsp1: Add support for capture and output in HSV formats
Hi Ricardo, On Wednesday 07 Sep 2016 09:07:35 Ricardo Ribalda Delgado wrote: > Hi Laurent > > Thank you very much! You're welcome. > On Wed, Sep 7, 2016 at 2:14 AM, Laurent Pinchart wrote: > > Support both the HSV24 and HSV32 formats. From a hardware point of view > > pretend the formats are RGB, the RPF and WPF will just pass the data > > through without performing any processing. > > Signed-off-by: Ricardo Ribalda Delgado Do you mean Acked-by ? Feel free to take the patch in your tree to get it merged along with the HSV series. -- Regards, Laurent Pinchart
Re: [PATCH] v4l: vsp1: Add support for capture and output in HSV formats
Hi Laurent Thank you very much! On Wed, Sep 7, 2016 at 2:14 AM, Laurent Pinchart wrote: > Support both the HSV24 and HSV32 formats. From a hardware point of view > pretend the formats are RGB, the RPF and WPF will just pass the data > through without performing any processing. Signed-off-by: Ricardo Ribalda Delgado
