[PATCH 2/3] ARM: dts: sk-rzg1e: add SCIF2 pins

[Sergei Shtylyov]

Add the (previously omitted) SCIF2 pin data to the SK-RZG1E board's
device tree.

Signed-off-by: Sergei Shtylyov 

---
 arch/arm/boot/dts/r8a7745-sk-rzg1e.dts |   12 +++-
 1 file changed, 11 insertions(+), 1 deletion(-)

Index: renesas/arch/arm/boot/dts/r8a7745-sk-rzg1e.dts
===
--- renesas.orig/arch/arm/boot/dts/r8a7745-sk-rzg1e.dts
+++ renesas/arch/arm/boot/dts/r8a7745-sk-rzg1e.dts
@@ -1,7 +1,7 @@
 /*
  * Device Tree Source for the SK-RZG1E board
  *
- * Copyright (C) 2016 Cogent Embedded, Inc.
+ * Copyright (C) 2016-2017 Cogent Embedded, Inc.
  *
  * This file is licensed under the terms of the GNU General Public License
  * version 2. This program is licensed "as is" without any warranty of any
@@ -34,7 +34,17 @@
clock-frequency = <2000>;
 };
 
+&pfc {
+   scif2_pins: scif2 {
+   groups = "scif2_data";
+   function = "scif2";
+   };
+};
+
 &scif2 {
+   pinctrl-0 = <&scif2_pins>;
+   pinctrl-names = "default";
+
status = "okay";
 };
 

[PATCH 1/3] ARM: dts: r8a7745: add PFC support

[Sergei Shtylyov]

Define the generic R8A7745 part of the PFC device node.

Signed-off-by: Sergei Shtylyov 

---
 arch/arm/boot/dts/r8a7745.dtsi |7 ++-
 1 file changed, 6 insertions(+), 1 deletion(-)

Index: renesas/arch/arm/boot/dts/r8a7745.dtsi
===
--- renesas.orig/arch/arm/boot/dts/r8a7745.dtsi
+++ renesas/arch/arm/boot/dts/r8a7745.dtsi
@@ -1,7 +1,7 @@
 /*
  * Device Tree Source for the r8a7745 SoC
  *
- * Copyright (C) 2016 Cogent Embedded Inc.
+ * Copyright (C) 2016-2017 Cogent Embedded Inc.
  *
  * This file is licensed under the terms of the GNU General Public License
  * version 2. This program is licensed "as is" without any warranty of any
@@ -123,6 +123,11 @@
#power-domain-cells = <1>;
};
 
+   pfc: pin-controller@e606 {
+   compatible = "renesas,pfc-r8a7745";
+   reg = <0 0xe606 0 0x11c>;
+   };
+
dmac0: dma-controller@e670 {
compatible = "renesas,dmac-r8a7745",
 "renesas,rcar-dmac";

[PATCH 0/3] Add R8A7745/SK-RZG1E PFC support

[Sergei Shtylyov]

Hello.

   Here's the set of 3 patches against Simon Horman's 'renesas.git' repo,
'renesas-devel-20170410-v4.11-rc6' tag.  We're adding the R8A7745 PFC node and
then describe the pins for SCIF2 and Ether devices declared earlier. These
patches depend on the R8A7745 PFC suport in order to work properly.

[1/3] ARM: dts: r8a7745: add PFC support
[2/3] ARM: dts: sk-rzg1e: add SCIF2 pins
[3/3] ARM: dts: sk-rzg1e: add Ether pins

WBR, Sergei

[PATCH 3/3] ARM: dts: sk-rzg1e: add Ether pins

[Sergei Shtylyov]

Add the (previously omitted) Ether/PHY pin data to the SK-RZG1E board's
device tree.

Signed-off-by: Sergei Shtylyov 

---
 arch/arm/boot/dts/r8a7745-sk-rzg1e.dts |   13 +
 1 file changed, 13 insertions(+)

Index: renesas/arch/arm/boot/dts/r8a7745-sk-rzg1e.dts
===
--- renesas.orig/arch/arm/boot/dts/r8a7745-sk-rzg1e.dts
+++ renesas/arch/arm/boot/dts/r8a7745-sk-rzg1e.dts
@@ -39,6 +39,16 @@
groups = "scif2_data";
function = "scif2";
};
+
+   ether_pins: ether {
+   groups = "eth_link", "eth_mdio", "eth_rmii";
+   function = "eth";
+   };
+
+   phy1_pins: phy1 {
+   groups = "intc_irq8";
+   function = "intc";
+   };
 };
 
 &scif2 {
@@ -49,6 +59,9 @@
 };
 
 ðer {
+   pinctrl-0 = <ðer_pins &phy1_pins>;
+   pinctrl-names = "default";
+
phy-handle = <&phy1>;
renesas,ether-link-active-low;
status = "okay";