Re: [PATCH 06/14] pinctrl: sh-pfc: r8a7796: Fix FMCLK{_C,_D} and FMIN{_C,_D} pin function definitions

2017-07-13 Thread Geert Uytterhoeven
On Wed, Jul 12, 2017 at 6:55 PM, Yoshihiro Kaneko  wrote:
> From: Takeshi Kihara 
>
> This patch fixes the implementation incorrect of IPSR register value
> definitions for FMCLK{_C,_D} and FMIN{_C,_D} pins function.
>
> This is a correction to the incorrect implementation of IPSR register
> pin assignment for R8A7796 SoC specification of R-Car Gen3 Hardware
> User's Manual Rev.0.51E or later.
>
> Fixes: f9aece7344bd ("pinctrl: sh-pfc: Initial R8A7796 PFC support")
> Signed-off-by: Takeshi Kihara 
> Signed-off-by: Yoshihiro Kaneko 

Reviewed-by: Geert Uytterhoeven 

i.e. will queue in sh-pfc-for-v4.14.

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds


[PATCH 06/14] pinctrl: sh-pfc: r8a7796: Fix FMCLK{_C,_D} and FMIN{_C,_D} pin function definitions

2017-07-12 Thread Yoshihiro Kaneko
From: Takeshi Kihara 

This patch fixes the implementation incorrect of IPSR register value
definitions for FMCLK{_C,_D} and FMIN{_C,_D} pins function.

This is a correction to the incorrect implementation of IPSR register
pin assignment for R8A7796 SoC specification of R-Car Gen3 Hardware
User's Manual Rev.0.51E or later.

Fixes: f9aece7344bd ("pinctrl: sh-pfc: Initial R8A7796 PFC support")
Signed-off-by: Takeshi Kihara 
Signed-off-by: Yoshihiro Kaneko 
---
 drivers/pinctrl/sh-pfc/pfc-r8a7796.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c 
b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
index 467f32e..9a9094f 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
@@ -367,8 +367,8 @@
 #define IP17_23_20 FM(USB1_OVC)F_(0, 0)
FM(MSIOF1_SS2_C)F_(0, 0)FM(SSI_WS1_A)   
FM(TS_SDAT0_E)  FM(STP_ISD_0_E) FM(FMIN_B)  FM(RIF2_SYNC_B) 
F_(0, 0)FM(REMOCON_B)   F_(0, 0)F_(0, 0) FM(HCTS2_N_C) F_(0, 0) 
F_(0, 0)
 #define IP17_27_24 FM(USB30_PWEN)  F_(0, 0)F_(0, 0)
FM(AUDIO_CLKOUT_B)  FM(SSI_SCK2_B)  FM(TS_SDEN1_D)  
FM(STP_ISEN_1_D)FM(STP_OPWM_0_E)FM(RIF3_D0_B)   F_(0, 0)
FM(TCLK2_B) FM(TPU0TO0) FM(BPFCLK_C) FM(HRTS2_N_C) F_(0, 0) F_(0, 0)
 #define IP17_31_28 FM(USB30_OVC)   F_(0, 0)F_(0, 0)
FM(AUDIO_CLKOUT1_B) FM(SSI_WS2_B)   
FM(TS_SPSYNC1_D)FM(STP_ISSYNC_1_D)  FM(STP_IVCXO27_0_E)FM(RIF3_D1_B)
F_(0, 0)FM(FSO_TOE_B)   FM(TPU0TO1) F_(0, 0) F_(0, 0) F_(0, 0) 
F_(0, 0)
-#define IP18_3_0   FM(GP6_30)  F_(0, 0)F_(0, 0)
FM(AUDIO_CLKOUT2_B) FM(SSI_SCK9_B)  FM(TS_SDEN0_E)  
FM(STP_ISEN_0_E)F_(0, 0)FM(RIF2_D0_B)   F_(0, 0)
FM(FSO_CFE_0_A) FM(TPU0TO2) F_(0, 0) FM(FMCLK_C) FM(FMCLK_D) F_(0, 0)
-#define IP18_7_4   FM(GP6_31)  F_(0, 0)F_(0, 0)
FM(AUDIO_CLKOUT3_B) FM(SSI_WS9_B)   
FM(TS_SPSYNC0_E)FM(STP_ISSYNC_0_E)  F_(0, 0)FM(RIF2_D1_B)   
F_(0, 0)FM(FSO_CFE_1_A) FM(TPU0TO3) F_(0, 0) FM(FMIN_C) FM(FMIN_D) 
F_(0, 0)
+#define IP18_3_0   FM(GP6_30)  F_(0, 0)F_(0, 0)
FM(AUDIO_CLKOUT2_B) FM(SSI_SCK9_B)  FM(TS_SDEN0_E)  
FM(STP_ISEN_0_E)F_(0, 0)FM(RIF2_D0_B)   F_(0, 0)
FM(FSO_CFE_0_A) FM(TPU0TO2) FM(FMCLK_C) FM(FMCLK_D) F_(0, 0) F_(0, 0)
+#define IP18_7_4   FM(GP6_31)  F_(0, 0)F_(0, 0)
FM(AUDIO_CLKOUT3_B) FM(SSI_WS9_B)   
FM(TS_SPSYNC0_E)FM(STP_ISSYNC_0_E)  F_(0, 0)FM(RIF2_D1_B)   
F_(0, 0)FM(FSO_CFE_1_A) FM(TPU0TO3) FM(FMIN_C) FM(FMIN_D) F_(0, 0) 
F_(0, 0)
 
 #define PINMUX_GPSR\
 \
-- 
1.9.1