Now that include/dt-bindings/power/r8a774a1-sysc.h is in Linus'
master branch we can replace power related magic numbers with
the corresponding labels.
Signed-off-by: Fabrizio Castro
---
arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 201 +++---
1 file changed, 101 insertions(+), 100 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
index 78ac8e3..d549755 100644
--- a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
@@ -8,6 +8,7 @@
#include
#include
#include
+#include
/ {
compatible = "renesas,r8a774a1";
@@ -63,7 +64,7 @@
compatible = "arm,cortex-a57", "arm,armv8";
reg = <0x0>;
device_type = "cpu";
- power-domains = < 0>;
+ power-domains = < R8A774A1_PD_CA57_CPU0>;
next-level-cache = <_CA57>;
enable-method = "psci";
clocks = < CPG_CORE 0>;
@@ -73,7 +74,7 @@
compatible = "arm,cortex-a57", "arm,armv8";
reg = <0x1>;
device_type = "cpu";
- power-domains = < 1>;
+ power-domains = < R8A774A1_PD_CA57_CPU1>;
next-level-cache = <_CA57>;
enable-method = "psci";
clocks = < CPG_CORE 0>;
@@ -83,7 +84,7 @@
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x100>;
device_type = "cpu";
- power-domains = < 5>;
+ power-domains = < R8A774A1_PD_CA53_CPU0>;
next-level-cache = <_CA53>;
enable-method = "psci";
clocks =< CPG_CORE 1>;
@@ -93,7 +94,7 @@
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x101>;
device_type = "cpu";
- power-domains = < 6>;
+ power-domains = < R8A774A1_PD_CA53_CPU1>;
next-level-cache = <_CA53>;
enable-method = "psci";
clocks =< CPG_CORE 1>;
@@ -103,7 +104,7 @@
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x102>;
device_type = "cpu";
- power-domains = < 7>;
+ power-domains = < R8A774A1_PD_CA53_CPU2>;
next-level-cache = <_CA53>;
enable-method = "psci";
clocks =< CPG_CORE 1>;
@@ -113,7 +114,7 @@
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x103>;
device_type = "cpu";
- power-domains = < 8>;
+ power-domains = < R8A774A1_PD_CA53_CPU3>;
next-level-cache = <_CA53>;
enable-method = "psci";
clocks =< CPG_CORE 1>;
@@ -121,14 +122,14 @@
L2_CA57: cache-controller-0 {
compatible = "cache";
- power-domains = < 12>;
+ power-domains = < R8A774A1_PD_CA57_SCU>;
cache-unified;
cache-level = <2>;
};
L2_CA53: cache-controller-1 {
compatible = "cache";
- power-domains = < 21>;
+ power-domains = < R8A774A1_PD_CA53_SCU>;
cache-unified;
cache-level = <2>;
};
@@ -195,7 +196,7 @@
"renesas,rcar-gen3-wdt";
reg = <0 0xe602 0 0x0c>;
clocks = < CPG_MOD 402>;
- power-domains = < 32>;
+ power-domains = < R8A774A1_PD_ALWAYS_ON>;
resets = < 402>;
status = "disabled";
};
@@ -211,7 +212,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = < CPG_MOD 912>;
- power-domains = < 32>;
+ power-domains = < R8A774A1_PD_ALWAYS_ON>;
resets = < 912>;
};
@@ -226,7 +227,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = < CPG_MOD 911>;
- power-domains = < 32>;
+ power-domains = < R8A774A1_PD_ALWAYS_ON>;
resets = < 911>;
};
@@ -241,7 +242,7 @@