Re: [PATCH v4 0/9] Renesas RZ/A1 pin and gpio controller

[Geert Uytterhoeven]

Hi Linus,

On Tue, Apr 11, 2017 at 11:05 AM, Linus Walleij
 wrote:
> On Wed, Apr 5, 2017 at 4:07 PM, Jacopo Mondi  
> wrote:
>> Hi Linus,
>>this is 4th round of gpio/pincontroller for RZ/A1 devices.
>>
>> As you suggested in v3 review, I have now added what we called pinmux flags
>> to the list of standard pinconf generic properties, and we're now using
>> generic parsing routines to collect them and apply them when multiplexing
>> pins.
>
> I have merged patch 1/9 so you have the necessary infrastructure in place.
>
> If Geert want to send a pull request based on my devel branch that is fine
> (but a bit late) else the requirements are there for a merge in the early
> v4.12 kernel cycle.

I agree it's a bit late. Will queue for v4.13.

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

Re: [PATCH v4 0/9] Renesas RZ/A1 pin and gpio controller

[Linus Walleij]

On Wed, Apr 5, 2017 at 4:07 PM, Jacopo Mondi  wrote:

> Hi Linus,
>this is 4th round of gpio/pincontroller for RZ/A1 devices.
>
> As you suggested in v3 review, I have now added what we called pinmux flags
> to the list of standard pinconf generic properties, and we're now using
> generic parsing routines to collect them and apply them when multiplexing
> pins.

I have merged patch 1/9 so you have the necessary infrastructure in place.

If Geert want to send a pull request based on my devel branch that is fine
(but a bit late) else the requirements are there for a merge in the early
v4.12 kernel cycle.

Yours,
Linus Walleij

RE: [PATCH v4 0/9] Renesas RZ/A1 pin and gpio controller

[Chris Brandt]

Hi Jacopo,

On Wednesday, April 05, 2017, Jacopo Mondi wrote:
> v3 -> v4:
> - use "pinmux" property in pmx sub-nodes in place of "renesas,pins"
> - use pinconf standard properties to set pin mux additional flags
> - add "bi-directional" and "output-enable" to pinconf generic properties
> - perform pmx function parsing at dt_node_to_map() time
> - change DT bindings to use GENERIC_PINCONF
> - change DT bindings to allow sub-nodes to have "pinmux" property
> specified
> - several renames (register names, DT parse functions, set_mux() function)


I just tested this driver on the RZ/A1 RSK board.
The following worked good.

   SCIF2, I2C, SDHI, Ethernet


SDHI also has bi-direction pins. For your reference, here was my DT:


/* SHDI ch1 on CN1 */
sdhi1_pins: sdhi1 {
pins {
pinmux = ,/* SD_CD_1 */
 ,/* SD_WP_1 */
 ,   /* SD_CLK_1 */
 ;   /* SD_CMD_1 */
};

pins_bidir {
pinmux = ,   /* SD_D1_1 */
 ,   /* SD_D0_1 */
 ,   /* SD_D3_1 */
 ;   /* SD_D2_1 */
bi-directional;
};
};


Thanks,
Chris

[PATCH v4 0/9] Renesas RZ/A1 pin and gpio controller

[Jacopo Mondi]

Hi Linus,
   this is 4th round of gpio/pincontroller for RZ/A1 devices.

As you suggested in v3 review, I have now added what we called pinmux flags
to the list of standard pinconf generic properties, and we're now using
generic parsing routines to collect them and apply them when multiplexing
pins.

The device tree bindings changed significantly, and as anticipated I have not
incorporated Rob's ack as I would like him to have a look there again.

As a bonus, parsing of pin mux nodes now happens at dt_node_to_map() time, and
not at probe time. This makes the driver play nicely with device tree
overlays, that as Geert pointed out, were not supported in v3.

Tested with SCIF, RIIC, ETHER and gpio-leds on Genmai board.

Thanks
   j


v1 -> v2:
- change pin configuration flags as suggested by Chris
- gpio set direction function fixed as suggested by Chris
- add some more example on pin configuration flag usage to dt-binding doc
- fix gpio-controller names to remove unit address as suggested by Geert
- some comments chopped here and there to make the driver less verbose

v2 -> v3:
- fix grammar and syntax in comment and documentation
- fix code style (reverse xmas tree ordering in variable declaration)
- use irqsave/irqrestore in spinlock lock/unlock
- use devm_ version of kasprintf (memory returned was not properly free)
- use bitops.h operation ffs and fls to make sure a single bit is set in pmx
  mask
- Add Geert's reviewed-by to DTS patches

v3 -> v4:
- use "pinmux" property in pmx sub-nodes in place of "renesas,pins"
- use pinconf standard properties to set pin mux additional flags
- add "bi-directional" and "output-enable" to pinconf generic properties
- perform pmx function parsing at dt_node_to_map() time
- change DT bindings to use GENERIC_PINCONF
- change DT bindings to allow sub-nodes to have "pinmux" property specified
- several renames (register names, DT parse functions, set_mux() function)

Jacopo Mondi (9):
  pinctrl: generic: Add bi-directional and output-enable
  pinctrl: Renesas RZ/A1 pin and gpio controller
  dt-bindings: pinctrl: Add RZ/A1 bindings doc
  arm: dts: dt-bindings: Add Renesas RZ/A1 pinctrl header
  arm: dts: r7s72100: Add pin controller node
  arm: dts: genmai: Add SCIF2 pin group
  arm: dts: genmai: Add RIIC2 pin group
  arm: dts: genmai: Add user led device nodes
  arm: dts: genmai: Add ethernet pin group

 .../bindings/pinctrl/pinctrl-bindings.txt  |   2 +
 .../bindings/pinctrl/renesas,rza1-pinctrl.txt  | 218 +
 arch/arm/boot/dts/r7s72100-genmai.dts  |  76 ++
 arch/arm/boot/dts/r7s72100.dtsi|  78 ++
 drivers/pinctrl/Kconfig|  11 +
 drivers/pinctrl/Makefile   |   1 +
 drivers/pinctrl/pinconf-generic.c  |   3 +
 drivers/pinctrl/pinctrl-rza1.c | 995 +
 include/dt-bindings/pinctrl/r7s72100-pinctrl.h |  16 +
 include/linux/pinctrl/pinconf-generic.h|   3 +
 10 files changed, 1403 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/pinctrl/renesas,rza1-pinctrl.txt
 create mode 100644 drivers/pinctrl/pinctrl-rza1.c
 create mode 100644 include/dt-bindings/pinctrl/r7s72100-pinctrl.h

--
2.7.4