This patch adds watchdog support by installing shmobile_boot_vector_gen2
to ICRAM1 when enough memory is available, in which case we also keep a
copy of MPIDR to complete the reset vector logic.
Signed-off-by: Fabrizio Castro
Signed-off-by: Ramesh Shanmugasundaram
---
v4->v5:
* reworked comment style
arch/arm/mach-shmobile/platsmp-apmu.c | 1 +
arch/arm/mach-shmobile/pm-rcar-gen2.c | 15 ---
2 files changed, 13 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-shmobile/platsmp-apmu.c
b/arch/arm/mach-shmobile/platsmp-apmu.c
index 4422b61..ba732ef 100644
--- a/arch/arm/mach-shmobile/platsmp-apmu.c
+++ b/arch/arm/mach-shmobile/platsmp-apmu.c
@@ -191,6 +191,7 @@ static void __init shmobile_smp_apmu_setup_boot(void)
{
/* install boot code shared by all CPUs */
shmobile_boot_fn = __pa_symbol(shmobile_smp_boot);
+ shmobile_boot_fn_gen2 = shmobile_boot_fn;
}
void __init shmobile_smp_apmu_prepare_cpus(unsigned int max_cpus,
diff --git a/arch/arm/mach-shmobile/pm-rcar-gen2.c
b/arch/arm/mach-shmobile/pm-rcar-gen2.c
index e5f215c..5a798b4 100644
--- a/arch/arm/mach-shmobile/pm-rcar-gen2.c
+++ b/arch/arm/mach-shmobile/pm-rcar-gen2.c
@@ -17,6 +17,7 @@
#include
#include
#include
+#include
#include "common.h"
#include "rcar-gen2.h"
@@ -37,7 +38,6 @@
#define CA7RESCNT_CODE 0x5a5a
#define CA7RESCNT_CPUS 0xf /* CPU0-3 */
-
/* On-chip RAM */
#define ICRAM1 0xe63c /* Inter Connect RAM1 (4 KiB) */
@@ -119,8 +119,17 @@ void __init rcar_gen2_pm_init(void)
p = ioremap(res.start, resource_size());
if (!p)
return;
-
- memcpy_toio(p, shmobile_boot_vector, shmobile_boot_size);
+ /*
+* install the reset vector, use the largest version if we have enough
+* memory available
+*/
+ if (resource_size() >= shmobile_boot_size_gen2) {
+ shmobile_boot_cpu_gen2 = read_cpuid_mpidr();
+ memcpy_toio(p, shmobile_boot_vector_gen2,
+ shmobile_boot_size_gen2);
+ } else {
+ memcpy_toio(p, shmobile_boot_vector, shmobile_boot_size);
+ }
iounmap(p);
/* setup reset vectors */
--
2.7.4