hi,
I would like to give support to RGB LVDS BRIDGE RCAR E2
I am attaching the patch file..can you please review it and let me know the
status.is it correct or not?
Best Regards
Jithin T Raj
diff --git a/a/r8a7794-alt.dts b/b/r8a7779-marzen.dts
index 383ad79..b795da6 100644
--- a/a/r8a7794-alt.dts
+++ b/b/r8a7779-marzen.dts
@@ -1,7 +1,8 @@
/*
- * Device Tree Source for the Alt board
+ * Device Tree Source for the Marzen board
*
- * Copyright (C) 2014 Renesas Electronics Corporation
+ * Copyright (C) 2013 Renesas Solutions Corp.
+ * Copyright (C) 2013 Simon Horman
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
@@ -9,29 +10,64 @@
*/
/dts-v1/;
-#include "r8a7794.dtsi"
+#include "r8a7779.dtsi"
+#include
+#include
/ {
- model = "Alt";
- compatible = "renesas,alt", "renesas,r8a7794";
+ model = "marzen";
+ compatible = "renesas,marzen", "renesas,r8a7779";
aliases {
serial0 = &scif2;
+ serial1 = &scif4;
};
chosen {
- bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
- stdout-path = "serial0:115200n8";
+ bootargs = "ignore_loglevel root=/dev/nfs ip=on";
+ stdout-path = &scif2;
};
- memory@4000 {
+ memory {
device_type = "memory";
- reg = <0 0x4000 0 0x4000>;
+ reg = <0x6000 0x4000>;
};
- lbsc {
- #address-cells = <1>;
- #size-cells = <1>;
+ fixedregulator3v3: fixedregulator@0 {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-3.3V";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ethernet@1800 {
+ compatible = "smsc,lan9220", "smsc,lan9115";
+ reg = <0x1800 0x100>;
+ pinctrl-0 = <ðernet_pins>;
+ pinctrl-names = "default";
+
+ phy-mode = "mii";
+ interrupt-parent = <&irqpin0>;
+ interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
+ smsc,irq-push-pull;
+ reg-io-width = <4>;
+ vddvario-supply = <&fixedregulator3v3>;
+ vdd33a-supply = <&fixedregulator3v3>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ led2 {
+ gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
+ };
+ led3 {
+ gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>;
+ };
+ led4 {
+ gpios = <&gpio4 31 GPIO_ACTIVE_HIGH>;
+ };
};
vga-encoder {
@@ -43,13 +79,13 @@
port@0 {
reg = <0>;
-adv7123_in: endpoint {
- remote-endpoint = <&du_out_rgb1>;
+vga_enc_in: endpoint {
+ remote-endpoint = <&du_out_rgb0>;
};
};
port@1 {
reg = <1>;
-adv7123_out: endpoint {
+vga_enc_out: endpoint {
remote-endpoint = <&vga_in>;
};
};
@@ -61,21 +97,36 @@
port {
vga_in: endpoint {
-remote-endpoint = <&adv7123_out>;
+remote-endpoint = <&vga_enc_out>;
};
};
};
- x2_clk: x2-clock {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <7425>;
+ lvds-encoder {
+ compatible = "thine,thc63lvdm83d";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+reg = <0>;
+lvds_enc_in: endpoint {
+ remote-endpoint = <&du_out_rgb1>;
+};
+ };
+ port@1 {
+reg = <1>;
+lvds_connector: endpoint {
+};
+ };
+ };
};
- x13_clk: x13-clock {
+ x3_clk: x3-clock {
compatible = "fixed-clock";
#clock-cells = <0>;
- clock-frequency = <14850>;
+ clock-frequency = <6500>;
};
};
@@ -84,22 +135,33 @@
pinctrl-names = "default";
status = "okay";
- clocks = <&mstp7_clks R8A7794_CLK_DU0>,
- <&mstp7_clks R8A7794_CLK_DU0>,
- <&x13_clk>, <&x2_clk>;
- clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1";
+ clocks = <&mstp1_clks R8A7779_CLK_DU>, <&x3_clk>;
+ clock-names = "du", "dclkin.0";
ports {
+ port@0 {
+ endpoint {
+remote-endpoint = <&vga_enc_in>;
+ };
+ };
port@1 {
endpoint {
-remote-endpoint = <&adv7123_in>;
+remote-endpoint = <&lvds_enc_in>;
};
};
};
};
+&irqpin0 {
+ status = "okay";
+};
+
&extal_clk {
- clock-frequency = <2000>;
+ clock-frequency = <3125>;
+};
+
+&tmu0 {
+ status = "okay";
};
&pfc {
@@ -107,152 +169,83 @@
pinctrl-names = "default";
du_pins: du {
- groups = "du1_rgb666", "du1_sync", "du1_disp", "du1_dotclkout0";
- function = "du";
- };
-
- scif2_pins: serial2 {
- groups = "scif2_data";
- function = "scif2";
+ du0 {
+ groups = "du0_rgb888", "du0_sync_1", "du0_clk_out_0";
+ function = "du0";
+ };
+ du1 {
+ groups = "du1_rgb666", "du1_sync_1", "du1_clk_out";
+ function = "du1";
+ };
};
scif_clk_pins: scif_clk {
- groups = "scif_clk";
+ groups = "scif_clk_b";
function = "scif_clk";
};
- ether_pins: ether {
- groups = "eth_link", "eth_mdio", "eth_rmii";
- function = "eth";
+ ethernet_pins: ethernet {
+ intc {
+ groups = "intc_irq1_b";
+ function = "intc";
+ };
+ lbsc {
+ groups = "lbsc_ex_cs0";
+ function = "lbsc";
+ };
};
- phy1_pins: phy1 {
- groups = "intc_irq8";
- function = "intc";
+ scif2_
