On 06/29/2017 01:38 PM, Geert Uytterhoeven wrote:
> Hi Marek,
>
> On Thu, Jun 29, 2017 at 12:18 PM, Marek Vasut wrote:
>> From: Marek Vasut
>>
>> IDT VersaClock 6 5P49V6901 has 4 clock outputs, 4 fractional dividers.
>> Input clock source can be taken from either external crystal or from
>> external reference clock.
>>
>> Signed-off-by: Marek Vasut
>> Cc: Alexey Firago
>> Cc: Rob Herring
>> Cc: Stephen Boyd
>> Cc: Michael Turquette
>> Cc: Laurent Pinchart
>> Cc: linux-renesas-soc@vger.kernel.org
>> Cc: devicet...@vger.kernel.org
>> ---
>> .../devicetree/bindings/clock/idt,versaclock5.txt | 15
>> ---
>> 1 file changed, 12 insertions(+), 3 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/clock/idt,versaclock5.txt
>> b/Documentation/devicetree/bindings/clock/idt,versaclock5.txt
>> index 53d7e50ed875..a3d4260039a8 100644
>> --- a/Documentation/devicetree/bindings/clock/idt,versaclock5.txt
>> +++ b/Documentation/devicetree/bindings/clock/idt,versaclock5.txt
>
> Probably you want to sprinkle the first few lines of the document with
> a few "VersaClock 6" references?
Something like this?
--- a/Documentation/devicetree/bindings/clock/idt,versaclock5.txt
+++ b/Documentation/devicetree/bindings/clock/idt,versaclock5.txt
@@ -1,7 +1,7 @@
-Binding for IDT VersaClock5 programmable i2c clock generator.
+Binding for IDT VersaClock 5,6 programmable i2c clock generators.
-The IDT VersaClock5 are programmable i2c clock generators providing
-from 3 to 12 output clocks.
+The IDT VersaClock 5 and VersaClock 6 are programmable i2c clock
+generators providing from 3 to 12 output clocks.
==I2C device node==
>> @@ -7,18 +7,20 @@ from 3 to 12 output clocks.
>
> The rest looks OK to me, so
> Acked-by: Geert Uytterhoeven
Thanks
--
Best regards,
Marek Vasut