Re: [PATCH 25/25] ARM: pm: omap34xx: convert to generic suspend/resume support

2011-06-23 Thread Tony Lindgren
* Russell King - ARM Linux li...@arm.linux.org.uk [110622 08:24]:
 Convert sa11x0 to use the generic CPU suspend/resume support, rather
  ^^
Should be omap34xx above.

 than implementing its own version.  Tested on 3430 LDP.

Nice job with this series Russell!

Tony
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RE: [PATCH 6/7] ARM: EXYNOS4: Add save/restore for more ARM registers

2011-06-23 Thread Kukjin Kim
Russell King - ARM Linux wrote:
 
 On Wed, Jun 22, 2011 at 05:46:44PM +0900, Kukjin Kim wrote:
  From: Jaecheol Lee jc@samsung.com
 
  This patch adds save/restore for Power Control Register and
  Diagnostic Register.
 
 NAK.  Please see my further suspend consolidation patches posted earlier.
 I've also recently (last few days) moved these further forward and this
 code no longer exists in this file (all it contains is the early
 resume stuff.)
 
Oops :(
OK, will re-work based on latest rmk/for-next :)

 My guess is that these two registers are samsung specific, and so they
 should be saved and restored by higher level code (eg, a syscore_ops
 for exynos4 specific stuff.)

Let me think again.

Thanks.

Best regards,
Kgene.
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SW Solution Development Team, Samsung Electronics Co., Ltd.

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Re: RE: [PATCH V5 5/5] ARM: EXYNOS4: Add platform data for EXYNOS4 FIMD and LTE480WV platform-lcd

2011-06-23 Thread JinGoo Han

Hi, Marek.
 -Original Message-
 From: linux-fbdev-ow...@vger.kernel.org [mailto:linux-fbdev-
 ow...@vger.kernel.org] On Behalf Of Marek Szyprowski
 Sent: Wednesday, June 22, 2011 6:47 PM
 To: 'Jingoo Han'; 'Kukjin Kim'; 'Paul Mundt'; linux-samsung-
 s...@vger.kernel.org; linux-fb...@vger.kernel.org; 'Jonghun Han'
 Cc: 'Anand Kumar N'; 'Thomas Abraham'; Sylwester Nawrocki; 'Kyungmin Park';
 'Inki Dae'; 'ARM Linux'; 'Ben Dooks'; 'Jonghun Han'
 Subject: RE: [PATCH V5 5/5] ARM: EXYNOS4: Add platform data for EXYNOS4
 FIMD and LTE480WV platform-lcd
 
 Hello,
 
 On Wednesday, June 22, 2011 8:42 AM Jingoo Han wrote:
 
  From: Jonghun Han jonghun@samsung.com
 
  This patch adds support EXYNOS4 FIMD0 and LTE480WV LCD pannel.
 
  Signed-off-by: Jonghun Han jonghun@samsung.com
  Signed-off-by: Jingoo Han jg1@samsung.com
  ---
   arch/arm/mach-exynos4/mach-smdkc210.c |  114
  +
   arch/arm/mach-exynos4/mach-smdkv310.c |  114
  +
   2 files changed, 228 insertions(+), 0 deletions(-)
 
  diff --git a/arch/arm/mach-exynos4/mach-smdkc210.c b/arch/arm/mach-
  exynos4/mach-smdkc210.c
  index e645f7a..360a50a 100644
  --- a/arch/arm/mach-exynos4/mach-smdkc210.c
  +++ b/arch/arm/mach-exynos4/mach-smdkc210.c
  @@ -9,26 +9,33 @@
   */
 
   #include linux/serial_core.h
  +#include linux/delay.h
   #include linux/gpio.h
  +#include linux/lcd.h
   #include linux/mmc/host.h
   #include linux/platform_device.h
   #include linux/smsc911x.h
   #include linux/io.h
   #include linux/i2c.h
  +#include linux/clk.h
 
   #include asm/mach/arch.h
   #include asm/mach-types.h
 
  +#include video/platform_lcd.h
  +
   #include plat/regs-serial.h
   #include plat/regs-srom.h
   #include plat/exynos4.h
   #include plat/cpu.h
   #include plat/devs.h
  +#include plat/fb.h
   #include plat/sdhci.h
   #include plat/iic.h
   #include plat/pd.h
 
   #include mach/map.h
  +#include mach/regs-fb.h
 
   /* Following are default values for UCON, ULCON and UFCON UART
 registers
  */
   #define SMDKC210_UCON_DEFAULT  (S3C2410_UCON_TXILEVEL |\
  @@ -111,6 +118,69 @@ static struct s3c_sdhci_platdata
 smdkc210_hsmmc3_pdata
  __initdata = {
  .clk_type   = S3C_SDHCI_CLK_DIV_EXTERNAL,
   };
 
  +static void lcd_lte480wv_set_power(struct plat_lcd_data *pd,
  +  unsigned int power)
  +{
  +   if (power) {
  +#if !defined(CONFIG_BACKLIGHT_PWM)
  +   gpio_request(EXYNOS4_GPD0(1), GPD0);
  +   gpio_direction_output(EXYNOS4_GPD0(1), 1);
  +   gpio_free(EXYNOS4_GPD0(1));
  +#endif
  +   /* fire nRESET on power up */
  +   gpio_request(EXYNOS4_GPX0(6), GPX0);
  +
  +   gpio_direction_output(EXYNOS4_GPX0(6), 1);
  +   mdelay(100);
  +
  +   gpio_set_value(EXYNOS4_GPX0(6), 0);
  +   mdelay(10);
  +
  +   gpio_set_value(EXYNOS4_GPX0(6), 1);
  +   mdelay(10);
  +
  +   gpio_free(EXYNOS4_GPX0(6));
  +   } else {
  +#if !defined(CONFIG_BACKLIGHT_PWM)
  +   gpio_request(EXYNOS4_GPD0(1), GPD0);
  +   gpio_direction_output(EXYNOS4_GPD0(1), 0);
  +   gpio_free(EXYNOS4_GPD0(1));
  +#endif
  +   }
  +}
  +
  +static struct plat_lcd_data smdkc210_lcd_lte480wv_data = {
  +   .set_power  = lcd_lte480wv_set_power,
  +};
  +
  +static struct platform_device smdkc210_lcd_lte480wv = {
  +   .name   = platform-lcd,
  +   .dev.parent = s5p_device_fimd0.dev,
  +   .dev.platform_data  = smdkc210_lcd_lte480wv_data,
  +};
  +
  +static struct s3c_fb_pd_win smdkc210_fb_win0 = {
  +   .win_mode = {
  +   .left_margin= 13,
  +   .right_margin   = 8,
  +   .upper_margin   = 7,
  +   .lower_margin   = 5,
  +   .hsync_len  = 3,
  +   .vsync_len  = 1,
  +   .xres   = 800,
  +   .yres   = 480,
  +   },
  +   .max_bpp= 32,
  +   .default_bpp= 24,
  +};
  +
  +static struct s3c_fb_platdata smdkc210_lcd0_pdata __initdata = {
  +   .win[0] = smdkc210_fb_win0,
  +   .vidcon0= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
  +   .vidcon1= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
  +   .setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
  +};
  +
   static struct resource smdkc210_smsc911x_resources[] = {
  [0] = {
  .start  = EXYNOS4_PA_SROM_BANK(1),
  @@ -165,6 +235,8 @@ static struct platform_device *smdkc210_devices[]
  __initdata = {
  exynos4_device_pd[PD_GPS],
  exynos4_device_sysmmu,
  samsung_asoc_dma,
  +   s5p_device_fimd0,
  +   smdkc210_lcd_lte480wv,
  smdkc210_smsc911x,
   };
 
  @@ -191,6 +263,44 @@ static void __init smdkc210_smsc911x_init(void)
   (0x1  S5P_SROM_BCX__TACS__SHIFT), S5P_SROM_BC1);
   }
 
  +static int __init smdkc210_fimd0_setup_clock(void)
  +{
  +   struct clk *sclk = NULL;
  +   struct clk *mout_mpll = NULL;
  +
  +   u32 rate = 0;
  

RE: [PATCH] ARM:SAMSUNG: Move S3C DMA driver to drivers/dma

2011-06-23 Thread Kukjin Kim
kyungmi...@gmail.com wrote:
 
 2011/6/10 Kukjin Kim kgene@samsung.com:
  On 06/07/11 15:36, Russell King - ARM Linux wrote:
  I see no effort from the Samsung folk to even start considering moving
  to common APIs - I see precisely the opposite.  They seem to have a
  strong desire to invent their own new APIs all the time rather than
  look at existing APIs and discuss how they can be used or adapted so
  they work for Samsung.
 
  That is not sustainable, and if it continues, it will probably result
  in Samsung stuff being chucked out of mainline.  We are most definitely
  at the point where custom APIs are no longer permissible, especially
  for any new SoCs.
 
  Hi Russell and everyone,
 
  Sorry for late participation on this :(
  I'm out of my office for biz. trip so it was hard to check my e-mail
  and will be back to my country this weekend.
 
  Anyway, I and my colleagues know what we have to do for Linux world.
  And as I know, we are preparing some stuff for it so please don't
  expect the worst :)
 
  I should be back on this after discussing with my colleagues.
 Any updates? still need more time?

As a note, our engineers are working on this now.
If any updates about that, will post...

Thanks.

Best regards,
Kgene.
--
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SW Solution Development Team, Samsung Electronics Co., Ltd.

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Re: [PATCH 6/7] ARM: EXYNOS4: Add save/restore for more ARM registers

2011-06-23 Thread Russell King - ARM Linux
On Thu, Jun 23, 2011 at 03:39:02PM +0900, Kukjin Kim wrote:
 Russell King - ARM Linux wrote:
  
  On Wed, Jun 22, 2011 at 05:46:44PM +0900, Kukjin Kim wrote:
   From: Jaecheol Lee jc@samsung.com
  
   This patch adds save/restore for Power Control Register and
   Diagnostic Register.
  
  NAK.  Please see my further suspend consolidation patches posted earlier.
  I've also recently (last few days) moved these further forward and this
  code no longer exists in this file (all it contains is the early
  resume stuff.)
  
 Oops :(
 OK, will re-work based on latest rmk/for-next :)

The entire series is not in for-next yet, it's still being worked on.
That's why I posted the patches again yesterday.
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RE: [PATCH 2/6] [CPUFREQ] S5PV210: Add arm/int voltage control support

2011-06-23 Thread Kukjin Kim
Mark Brown wrote:
 
 On Wed, Jun 22, 2011 at 05:07:41PM +0900, Kukjin Kim wrote:
 
  if (freqs.new  freqs.old) {
  /* Voltage up: will be implemented */
 
 Presumably this comment is bitrotted?
 
Oops, thanks for your pointing out.

  +   if (!IS_ERR(arm_regulator) 
  +   !IS_ERR(int_regulator)) {
 
 You should not do this.  The regulator API stubs itself out and provides
 mechanisms for boards to fill out partial regulator configurations, and
 clearly these supplies must be physically present in the system.
 
Uhm...you're right.

 Plus...
 
   static int __init s5pv210_cpufreq_init(void)
   {
  +   arm_regulator = regulator_get(NULL, vddarm);
  +   if (IS_ERR(arm_regulator)) {
  +   pr_err(failed to get regulator vddarm);
  +   return PTR_ERR(arm_regulator);
  +   }
  +
  +   int_regulator = regulator_get(NULL, vddint);
  +   if (IS_ERR(int_regulator)) {
  +   pr_err(failed to get regulator vddint);
  +   regulator_put(arm_regulator);
  +   return PTR_ERR(int_regulator);
  +   }
 
 ...the driver won't currently bind if it didn't get the regulators.
 
 Ideally you should also have code which checks to see if the regulators
 can support all the operating points.  This will ensure that governors
 don't end up spending time trying to go into states that can't be
 supported for some reason.  That said this is fairly unusual so may not
 be worth bothering.

OK, will address comments from you :)

Thanks.

Best regards,
Kgene.
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SW Solution Development Team, Samsung Electronics Co., Ltd.

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RE: [PATCH 6/7] ARM: EXYNOS4: Add save/restore for more ARM registers

2011-06-23 Thread Kukjin Kim
Russell King - ARM Linux wrote:
 
 On Thu, Jun 23, 2011 at 03:39:02PM +0900, Kukjin Kim wrote:
  Russell King - ARM Linux wrote:
  
  Oops :(
  OK, will re-work based on latest rmk/for-next :)
 
 The entire series is not in for-next yet, it's still being worked on.
 That's why I posted the patches again yesterday.

OK, first of all, will test your yesterday patches on Samsung boards then
will re-work this based on it.

Thanks.

Best regards,
Kgene.
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SW Solution Development Team, Samsung Electronics Co., Ltd.

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RE: [PATCH 7/7] ARM: EXYNOS4: Move S5P_CENTRAL_SEQ_CONFIGURATION setting for PM

2011-06-23 Thread Kukjin Kim
Sergei Shtylyov wrote:
 
 Hello.
 
Hi :)

 On 22-06-2011 12:46, Kukjin Kim wrote:
 
  From: Jaecheol Leejc@samsung.com
 
  We need to balance between set and check
 S5P_CENTRAL_SEQ_CONFIGURATION
  register in syscore_ops suspend/resume function when failure in enter
  suspend mode. Moved this register setting for PM for the purpose of
balancing.
 
  Signed-off-by: Jaecheol Leejc@samsung.com
  Signed-off-by: Kukjin Kimkgene@samsung.com
  ---
arch/arm/mach-exynos4/pm.c |   22 ++
1 files changed, 14 insertions(+), 8 deletions(-)
 
  diff --git a/arch/arm/mach-exynos4/pm.c b/arch/arm/mach-exynos4/pm.c
  index b037fba..a103c13 100644
  --- a/arch/arm/mach-exynos4/pm.c
  +++ b/arch/arm/mach-exynos4/pm.c
 [...]
  @@ -413,6 +405,19 @@ static __init int exynos4_pm_drvinit(void)
}
arch_initcall(exynos4_pm_drvinit);
 
  +static int exynos4_pm_suspend(void)
  +{
  +   unsigned long tmp;
  +
  +   /* Setting Central Sequence Register for power down mode */
  +
  +   tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION);
  +   tmp = ~(S5P_CENTRAL_LOWPWR_CFG);
 
 Could drop useless parens, while at it.
 
Sergei, thanks ;)

Best regards,
Kgene.
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SW Solution Development Team, Samsung Electronics Co., Ltd.

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Re: [PATCH V4 5/5] ARM: EXYNOS4: Add platform data for EXYNOS4 FIMD and LTE480WV platform-lcd

2011-06-23 Thread K, Mythri P
2011/6/22 JinGoo Han jg1@samsung.com:
 From: Jonghun Han jonghun@samsung.com

 This patch adds support EXYNOS4 FIMD0 and LTE480WV LCD pannel.

 Signed-off-by: Jonghun Han jonghun@samsung.com
 Signed-off-by: Jingoo Han jg1@samsung.com
 ---
  arch/arm/mach-exynos4/mach-smdkc210.c |  114 
 +
  arch/arm/mach-exynos4/mach-smdkv310.c |  114 
 +
  2 files changed, 228 insertions(+), 0 deletions(-)

snip
 +static void lcd_lte480wv_set_power(struct plat_lcd_data *pd,
 +                                  unsigned int power)
 +{
 +       if (power) {
 +#if !defined(CONFIG_BACKLIGHT_PWM)
 +               gpio_request(EXYNOS4_GPD0(1), GPD0);
 +               gpio_direction_output(EXYNOS4_GPD0(1), 1);
 +               gpio_free(EXYNOS4_GPD0(1));
 +#endif
 +               /* fire nRESET on power up */
 +               gpio_request(EXYNOS4_GPX0(6), GPX0);
 +
 +               gpio_direction_output(EXYNOS4_GPX0(6), 1);
 +               mdelay(100);
 +
 +               gpio_set_value(EXYNOS4_GPX0(6), 0);
 +               mdelay(10);
 +
 +               gpio_set_value(EXYNOS4_GPX0(6), 1);
 +               mdelay(10);
 +
 +               gpio_free(EXYNOS4_GPX0(6));
 +       } else {
 +#if !defined(CONFIG_BACKLIGHT_PWM)
 +               gpio_request(EXYNOS4_GPD0(1), GPD0);
 +               gpio_direction_output(EXYNOS4_GPD0(1), 0);
 +               gpio_free(EXYNOS4_GPD0(1));
 +#endif
 +       }
 +}
 +

have you considered using gpio_request_one instead ? It simplifies the
three step API.

snip

 +       if (power) {
 +#if !defined(CONFIG_BACKLIGHT_PWM)
 +               gpio_request(EXYNOS4_GPD0(1), GPD0);
 +               gpio_direction_output(EXYNOS4_GPD0(1), 1);
 +               gpio_free(EXYNOS4_GPD0(1));
 +#endif
 +               /* fire nRESET on power up */
 +               gpio_request(EXYNOS4_GPX0(6), GPX0);
 +
 +               gpio_direction_output(EXYNOS4_GPX0(6), 1);
 +               mdelay(100);
 +
 +               gpio_set_value(EXYNOS4_GPX0(6), 0);
 +               mdelay(10);
 +
 +               gpio_set_value(EXYNOS4_GPX0(6), 1);
 +               mdelay(10);
 +
 +               gpio_free(EXYNOS4_GPX0(6));
 +       } else {
 +#if !defined(CONFIG_BACKLIGHT_PWM)
 +               gpio_request(EXYNOS4_GPD0(1), GPD0);
 +               gpio_direction_output(EXYNOS4_GPD0(1), 0);
 +               gpio_free(EXYNOS4_GPD0(1));
 +#endif
 +       }
 +}

same comment as above.

snip



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Re: [PATCH 25/25] ARM: pm: omap34xx: convert to generic suspend/resume support

2011-06-23 Thread Russell King - ARM Linux
On Wed, Jun 22, 2011 at 04:16:58PM +0100, Russell King - ARM Linux wrote:
 + /* Now branch to the common CPU resume function */
 + ldr r0, =cpu_resume
 + bx  r0
  
 + .ltorg

A slight correction - firstly this code does not run from SRAM.
Secondly, this will try to branch to the virtual address of cpu_resume
which is not a good idea.

Replace this with:
b   cpu_resume

and comment out the auxillary control register write in proc-v7.S, and
it should work on OMAP3.
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Re: [PATCH] ARM: EXYNOS4: Add PWM backlight support on Samsung SMDKV310

2011-06-23 Thread Banajit Goswami
 From: JinGoo Han jg1@samsung.com

 Hi, Banajit.
Hi Jingoo,


 Signed-off-by: Banajit Goswami banaji...@samsung.com
 ---
...
snip
...
 +     .pwm_period_ns  = 78770,
 Please use 1000 as pwm_period_ns instead of 78770 as follows:
 -       .pwm_period_ns  = 78770,
 +       .pwm_period_ns  = 1000,

Yes, I will modify the period value and send updated patch

 The value '78770' makes noise related to resonance at LCD board.

 I will explain how I get the value of PWM period.

 The SMDK boards use LT3591 as backlight LED driver of LTE480WV LCD
 According to the LT3591 datasheet, the switching frequency should
 be 1MHz. So, PWM period is calculated by following formula:
        PWM period = 1/switching frequency
                       = 1/1MHz
                       = 1000 ns

Thanks for the explanation.

 You can find LT3591 datasheet easily on the Internet. Please refer to it
 for more information.
 Good luck.
Thanks you.

 +     .init           = smdkv310_backlight_init,
...
snip
...


Regards,
Banajit
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Re: [PATCH 25/25] ARM: pm: omap34xx: convert to generic suspend/resume support

2011-06-23 Thread Russell King - ARM Linux
On Thu, Jun 23, 2011 at 11:06:10AM +0100, Russell King - ARM Linux wrote:
 On Wed, Jun 22, 2011 at 04:16:58PM +0100, Russell King - ARM Linux wrote:
  +   /* Now branch to the common CPU resume function */
  +   ldr r0, =cpu_resume
  +   bx  r0
   
  +   .ltorg
 
 A slight correction - firstly this code does not run from SRAM.
 Secondly, this will try to branch to the virtual address of cpu_resume
 which is not a good idea.
 
 Replace this with:
   b   cpu_resume
 
 and comment out the auxillary control register write in proc-v7.S, and
 it should work on OMAP3.

Actually... writing to the ACR seems fine on OMAP3.

Santosh,

I thought you pointed out a problem with the code in proc-v7.S which meant
there was a problem executing it in non-secure mode?  I can't seem to find
any problem there.  Could you re-state your concern please?
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Re: [PATCH 25/25] ARM: pm: omap34xx: convert to generic suspend/resume support

2011-06-23 Thread Russell King - ARM Linux
On Thu, Jun 23, 2011 at 05:03:39AM +0530, Santosh Shilimkar wrote:
 On 6/22/2011 9:40 PM, Russell King - ARM Linux wrote:
 A couple of things to point out here:

 On Wed, Jun 22, 2011 at 04:16:58PM +0100, Russell King - ARM Linux wrote:
 -   mrc p15, 0, r4, c13, c0, 1  @ Context ID
 -   mrc p15, 0, r5, c13, c0, 2  @ User r/w thread and process ID
 -   mrc p15, 0, r6, c12, c0, 0  @ Secure or NS vector base address
 -   mrs r7, cpsr@ Store current cpsr
 -   stmia   r8!, {r4-r7}

 1. The User r/w thread and process ID is not saved/restored by Linux over
 context switches, so it doesn't serve any useful purpose to save and
 restore over resume.

 It will be needed for CPUIDLE I guess.

No it isn't.  It is not used by Linux at all - the only thread register
which is used is the User r/o thread register, and I've patched the
proc-v7 code to preserve that register.

 2. Compare the instruction saving and restoring the vector base address
 (see below for the restore code.)

 That's typo. It should have been mcr. Actually VBAR isn't used on GP
 devices but might be used on secure devices. I know that common suspend
 code doesn't consider this register. It's fine to keep it that way
 and if OMAP needs it, it can save/restored outside common code.

The kernel doesn't use or initialize the register, so its not something
which the kernel should be concerned about.  Presumably secure devices
need to restore the secure-mode version of that register.

However, there's an extra twist here:
| On an implementation that does not include the Security Extensions all
| CP15 c12 encodings are UNDEFINED.

And a further twist is this:
| B3.12.40 c12, Vector Base Address Register (VBAR)
| When the Security Extensions are implemented and high exception vectors are
| not selected, the Vector Base Address Register, VBAR, provides the exception
| base address for exceptions that are not handled in Monitor mode, see
| Exception vectors and the exception base address on page B1-30. The high
| exception vectors always have the base address 0x and are not
| affected by the value of VBAR.

Since we always select high exception vectors, VBAR is not used, so we have
no requirement to save and restore this register on any ARMv7 MMU platform.
Given that it would be dangerous to do so (due to not knowing whether
security stuff is implemented or not) ignoring the presence of this register
is for the best.
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Re: Re: [PATCH V4 5/5] ARM: EXYNOS4: Add platform data for EXYNOS4 FIMD and LTE480WV platform-lcd

2011-06-23 Thread JinGoo Han

Hi, Mythri.
 -Original Message-
 From: linux-fbdev-ow...@vger.kernel.org [mailto:linux-fbdev-
 ow...@vger.kernel.org] On Behalf Of K, Mythri P
 Sent: Thursday, June 23, 2011 6:04 PM
 To: jg1@samsung.com
 Cc: Kukjin Kim; Paul Mundt; linux-samsung-soc@vger.kernel.org; linux-
 fb...@vger.kernel.org; Jong-Hun Han; ANAND KUMAR N; Sylwester Nawrocki;
 THOMAS P ABRAHAM; Marek Szyprowski; Kyungmin Park; In-Ki Dae; ARM Linux;
 Ben Dooks
 Subject: Re: [PATCH V4 5/5] ARM: EXYNOS4: Add platform data for EXYNOS4
 FIMD and LTE480WV platform-lcd
 
 2011/6/22 JinGoo Han jg1@samsung.com:
  From: Jonghun Han jonghun@samsung.com
 
  This patch adds support EXYNOS4 FIMD0 and LTE480WV LCD pannel.
 
  Signed-off-by: Jonghun Han jonghun@samsung.com
  Signed-off-by: Jingoo Han jg1@samsung.com
  ---
   arch/arm/mach-exynos4/mach-smdkc210.c |  114
 +
   arch/arm/mach-exynos4/mach-smdkv310.c |  114
 +
   2 files changed, 228 insertions(+), 0 deletions(-)
 
 snip
  +static void lcd_lte480wv_set_power(struct plat_lcd_data *pd,
  +  unsigned int power)
  +{
  +   if (power) {
  +#if !defined(CONFIG_BACKLIGHT_PWM)
  +   gpio_request(EXYNOS4_GPD0(1), GPD0);
  +   gpio_direction_output(EXYNOS4_GPD0(1), 1);
  +   gpio_free(EXYNOS4_GPD0(1));
  +#endif
  +   /* fire nRESET on power up */
  +   gpio_request(EXYNOS4_GPX0(6), GPX0);
  +
  +   gpio_direction_output(EXYNOS4_GPX0(6), 1);
  +   mdelay(100);
  +
  +   gpio_set_value(EXYNOS4_GPX0(6), 0);
  +   mdelay(10);
  +
  +   gpio_set_value(EXYNOS4_GPX0(6), 1);
  +   mdelay(10);
  +
  +   gpio_free(EXYNOS4_GPX0(6));
  +   } else {
  +#if !defined(CONFIG_BACKLIGHT_PWM)
  +   gpio_request(EXYNOS4_GPD0(1), GPD0);
  +   gpio_direction_output(EXYNOS4_GPD0(1), 0);
  +   gpio_free(EXYNOS4_GPD0(1));
  +#endif
  +   }
  +}
  +
 
 have you considered using gpio_request_one instead ? It simplifies the
 three step API.
You're right. It seems to be very helpful.
I will apply it and send V7 patches, soon.
Thank you for your reply.
 
 snip
 
  +   if (power) {
  +#if !defined(CONFIG_BACKLIGHT_PWM)
  +   gpio_request(EXYNOS4_GPD0(1), GPD0);
  +   gpio_direction_output(EXYNOS4_GPD0(1), 1);
  +   gpio_free(EXYNOS4_GPD0(1));
  +#endif
  +   /* fire nRESET on power up */
  +   gpio_request(EXYNOS4_GPX0(6), GPX0);
  +
  +   gpio_direction_output(EXYNOS4_GPX0(6), 1);
  +   mdelay(100);
  +
  +   gpio_set_value(EXYNOS4_GPX0(6), 0);
  +   mdelay(10);
  +
  +   gpio_set_value(EXYNOS4_GPX0(6), 1);
  +   mdelay(10);
  +
  +   gpio_free(EXYNOS4_GPX0(6));
  +   } else {
  +#if !defined(CONFIG_BACKLIGHT_PWM)
  +   gpio_request(EXYNOS4_GPD0(1), GPD0);
  +   gpio_direction_output(EXYNOS4_GPD0(1), 0);
  +   gpio_free(EXYNOS4_GPD0(1));
  +#endif
  +   }
  +}
 
 same comment as above.
 
 snip
 
 
 
 --
 Thanks and regards,
 Mythri.
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RE: [PATCH] ARM: EXYNOS4: Add PWM backlight support on Samsung SMDKV310

2011-06-23 Thread Kukjin Kim
Banajit Goswami wrote:
 
  From: JinGoo Han jg1@samsung.com
 
  Hi, Banajit.
 Hi Jingoo,
 
Hi all,

Hmm...
If the same code is required into each boards, please don't add them on both.

I think, we can avoid duplication...

Thanks.

Best regards,
Kgene.
--
Kukjin Kim kgene@samsung.com, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

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[PATCH] i2c-s3c2410: Fix typo 'i2s' - 'i2c'

2011-06-23 Thread Kukjin Kim
From: Huisung Kang hs1218.k...@samsung.com

Signed-off-by: Huisung Kang hs1218.k...@samsung.com
Signed-off-by: Kukjin Kim kgene@samsung.com
---
 drivers/i2c/busses/i2c-s3c2410.c |6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/i2c/busses/i2c-s3c2410.c b/drivers/i2c/busses/i2c-s3c2410.c
index 553b9cc..f84a63c 100644
--- a/drivers/i2c/busses/i2c-s3c2410.c
+++ b/drivers/i2c/busses/i2c-s3c2410.c
@@ -248,12 +248,12 @@ static inline int is_msgend(struct s3c24xx_i2c *i2c)
return i2c-msg_ptr = i2c-msg-len;
 }
 
-/* i2s_s3c_irq_nextbyte
+/* i2c_s3c_irq_nextbyte
  *
  * process an interrupt and work out what to do
  */
 
-static int i2s_s3c_irq_nextbyte(struct s3c24xx_i2c *i2c, unsigned long iicstat)
+static int i2c_s3c_irq_nextbyte(struct s3c24xx_i2c *i2c, unsigned long iicstat)
 {
unsigned long tmp;
unsigned char byte;
@@ -443,7 +443,7 @@ static irqreturn_t s3c24xx_i2c_irq(int irqno, void *dev_id)
/* pretty much this leaves us with the fact that we've
 * transmitted or received whatever byte we last sent */
 
-   i2s_s3c_irq_nextbyte(i2c, status);
+   i2c_s3c_irq_nextbyte(i2c, status);
 
  out:
return IRQ_HANDLED;
-- 
1.7.1

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[PATCH] i2c-s3c2410: Remove useless break code

2011-06-23 Thread Kukjin Kim
From: Jonghwan Choi jhbird.c...@samsung.com

Signed-off-by: Jonghwan Choi jhbird.c...@samsung.com
Signed-off-by: Kukjin Kim kgene@samsung.com
---
 drivers/i2c/busses/i2c-s3c2410.c |1 -
 1 files changed, 0 insertions(+), 1 deletions(-)

diff --git a/drivers/i2c/busses/i2c-s3c2410.c b/drivers/i2c/busses/i2c-s3c2410.c
index 6c00c10..553b9cc 100644
--- a/drivers/i2c/busses/i2c-s3c2410.c
+++ b/drivers/i2c/busses/i2c-s3c2410.c
@@ -264,7 +264,6 @@ static int i2s_s3c_irq_nextbyte(struct s3c24xx_i2c *i2c, 
unsigned long iicstat)
case STATE_IDLE:
dev_err(i2c-dev, %s: called in STATE_IDLE\n, __func__);
goto out;
-   break;
 
case STATE_STOP:
dev_err(i2c-dev, %s: called in STATE_STOP\n, __func__);
-- 
1.7.1

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Re: [PATCH] ARM: EXYNOS4: Add PWM backlight support on Samsung SMDKV310

2011-06-23 Thread Banajit Goswami
On Thu, Jun 23, 2011 at 5:14 PM, Kukjin Kim kgene@samsung.com wrote:
 Banajit Goswami wrote:

  From: JinGoo Han jg1@samsung.com
 
  Hi, Banajit.
 Hi Jingoo,

 Hi all,
Hello,

 Hmm...
 If the same code is required into each boards, please don't add them on both.

 I think, we can avoid duplication...
Yes, I have already started working on it.
I can send it by tomorrow.

 Thanks.

 Best regards,
 Kgene.

Thanks,
Banajit
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[PATCH 00/25] Re-jig cpu_suspend for a saner calling convention

2011-06-23 Thread Russell King - ARM Linux
Version 3.

Currently cpu_suspend is not like a normal C function - when it's called
it returns normally to a bunch of code which is not expected to return.
The return path is via code pointed to by 'r3'.

It also corrupts a bunch of registers in ways which make it non-compliant
with a C API.

If we do make this compliant as a normal C-like function, it eliminates
this register saving, and also allows us to make greater savings.  We
also swap 'lr' and 'r3', so cpu_suspend effectively only returns to
following code on resume - and r3 points to the suspend code.

I've also changed cpu_suspend() to have a saner visible prototype for
calling from platforms, hiding the needed v:p offset parameter in the
inline function.

So, this becomes:
static void soc_suspend(void)
{
[soc specific preparation]

cpu_suspend(soc_suspend_arg, soc_finish_suspend);

[soc specific cleanup ]
}

where soc_suspend_fn can be either assembly or C code - but must never
return.  (See separate patch posted on 13th June to allow it to return.)

This patch series also merges the call to cpu_init() into cpu_suspend(),
and makes cpu_init() call the per-CPU initialization function to ensure
that various registers are setup (eg, clock switching on StrongARM,
read-buffer enabled for userspace, etc.)  This allows some more custom
platform suspend code to be removed.

I've been able to convert OMAP3 suspend support and test it in both
retention and off modes.

The only platform not converted to cpu_suspend() is the shmobile stuff,
which I've requested their assistance with.

This patch set also eliminates 300 LOC from platform code.

Tested on Assabet (SA1100) and 3430LDP only.

 arch/arm/include/asm/suspend.h  |   21 
 arch/arm/kernel/setup.c |   99 ++--
 arch/arm/kernel/sleep.S |   73 ++-
 arch/arm/mach-exynos4/pm.c  |2 +-
 arch/arm/mach-exynos4/sleep.S   |   22 
 arch/arm/mach-omap2/pm34xx.c|   48 ++---
 arch/arm/mach-omap2/sleep34xx.S |  160 ++-
 arch/arm/mach-pxa/include/mach/pm.h |4 +-
 arch/arm/mach-pxa/palmz72.c |1 +
 arch/arm/mach-pxa/pm.c  |1 -
 arch/arm/mach-pxa/pxa25x.c  |3 +-
 arch/arm/mach-pxa/pxa27x.c  |   11 ++-
 arch/arm/mach-pxa/pxa3xx.c  |   14 +++-
 arch/arm/mach-pxa/sleep.S   |   55 ++-
 arch/arm/mach-pxa/zeus.c|3 +-
 arch/arm/mach-s3c2412/pm.c  |4 +-
 arch/arm/mach-s3c2416/pm.c  |4 +-
 arch/arm/mach-s3c64xx/pm.c  |2 +-
 arch/arm/mach-s3c64xx/sleep.S   |   23 -
 arch/arm/mach-s5pv210/pm.c  |2 +-
 arch/arm/mach-s5pv210/sleep.S   |   21 
 arch/arm/mach-sa1100/pm.c   |7 +-
 arch/arm/mach-sa1100/sleep.S|   19 +
 arch/arm/mm/proc-sa1100.S   |4 +-
 arch/arm/mm/proc-v7.S   |   10 ++-
 arch/arm/plat-s3c24xx/sleep.S   |   25 -
 arch/arm/plat-samsung/include/plat/pm.h |5 +-
 arch/arm/plat-samsung/pm.c  |   11 +--
 28 files changed, 180 insertions(+), 474 deletions(-)

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[PATCH 04/25] ARM: pm: make MULTI_CPU and !MULTI_CPU resume paths the same

2011-06-23 Thread Russell King - ARM Linux
Eliminate the differences between MULTI_CPU and non-MULTI_CPU resume
paths, making the saved structure identical irrespective of the way
the kernel was configured.

Acked-by: Frank Hofmann frank.hofm...@tomtom.com
Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
 arch/arm/kernel/sleep.S |   12 +++-
 1 files changed, 3 insertions(+), 9 deletions(-)

diff --git a/arch/arm/kernel/sleep.S b/arch/arm/kernel/sleep.S
index 6398ead..97a6577 100644
--- a/arch/arm/kernel/sleep.S
+++ b/arch/arm/kernel/sleep.S
@@ -40,9 +40,11 @@ ENTRY(cpu_suspend)
 #else
mov r2, sp  @ current virtual SP
ldr r0, =cpu_suspend_size
+   ldr ip, =cpu_do_resume
sub sp, sp, r0  @ allocate CPU state on stack
mov r0, sp  @ save pointer
-   stmfd   sp!, {r1, r2, r3}   @ save v:p, virt SP, return fn
+   add ip, ip, r1  @ convert resume fn to phys
+   stmfd   sp!, {r1, r2, r3, ip}   @ save v:p, virt SP, retfn, phys resume 
fn
ldr r3, =sleep_save_sp
add r2, sp, r1  @ convert SP to phys
 #ifdef CONFIG_SMP
@@ -120,20 +122,12 @@ ENTRY(cpu_resume)
ldr r0, sleep_save_sp   @ stack phys addr
 #endif
setmode PSR_I_BIT | PSR_F_BIT | SVC_MODE, r1  @ set SVC, irqs off
-#ifdef MULTI_CPU
@ load v:p, stack, return fn, resume fn
   ARM( ldmia   r0!, {r1, sp, lr, pc}   )
 THUMB( ldmia   r0!, {r1, r2, r3, r4}   )
 THUMB( mov sp, r2  )
 THUMB( mov lr, r3  )
 THUMB( bx  r4  )
-#else
-   @ load v:p, stack, return fn
-  ARM( ldmia   r0!, {r1, sp, lr}   )
-THUMB( ldmia   r0!, {r1, r2, lr}   )
-THUMB( mov sp, r2  )
-   b   cpu_do_resume
-#endif
 ENDPROC(cpu_resume)
 
 sleep_save_sp:
-- 
1.7.4.4

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[PATCH 05/25] ARM: pm: move return address (for cpu_resume) to top of stack

2011-06-23 Thread Russell King - ARM Linux
Move the return address for cpu_resume to the top of stack so that
cpu_resume looks more like a normal function.

Acked-by: Frank Hofmann frank.hofm...@tomtom.com
Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
 arch/arm/kernel/sleep.S |   16 
 1 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/arch/arm/kernel/sleep.S b/arch/arm/kernel/sleep.S
index 97a6577..f8e9251 100644
--- a/arch/arm/kernel/sleep.S
+++ b/arch/arm/kernel/sleep.S
@@ -15,6 +15,7 @@
  * r0-r3,r9,r10,lr corrupted
  */
 ENTRY(cpu_suspend)
+   stmfd   sp!, {r3}
mov r9, lr
 #ifdef MULTI_CPU
ldr r10, =processor
@@ -24,7 +25,7 @@ ENTRY(cpu_suspend)
sub sp, sp, r0  @ allocate CPU state on stack
mov r0, sp  @ save pointer
add ip, ip, r1  @ convert resume fn to phys
-   stmfd   sp!, {r1, r2, r3, ip}   @ save v:p, virt SP, retfn, phys resume 
fn
+   stmfd   sp!, {r1, r2, ip}   @ save v:p, virt SP, phys resume fn
ldr r3, =sleep_save_sp
add r2, sp, r1  @ convert SP to phys
 #ifdef CONFIG_SMP
@@ -44,7 +45,7 @@ ENTRY(cpu_suspend)
sub sp, sp, r0  @ allocate CPU state on stack
mov r0, sp  @ save pointer
add ip, ip, r1  @ convert resume fn to phys
-   stmfd   sp!, {r1, r2, r3, ip}   @ save v:p, virt SP, retfn, phys resume 
fn
+   stmfd   sp!, {r1, r2, ip}   @ save v:p, virt SP, phys resume fn
ldr r3, =sleep_save_sp
add r2, sp, r1  @ convert SP to phys
 #ifdef CONFIG_SMP
@@ -99,7 +100,7 @@ ENDPROC(cpu_resume_turn_mmu_on)
 cpu_resume_after_mmu:
str r5, [r2, r4, lsl #2]@ restore old mapping
mcr p15, 0, r0, c1, c0, 0   @ turn on D-cache
-   mov pc, lr
+   ldmfd   sp!, {pc}
 ENDPROC(cpu_resume_after_mmu)
 
 /*
@@ -122,12 +123,11 @@ ENTRY(cpu_resume)
ldr r0, sleep_save_sp   @ stack phys addr
 #endif
setmode PSR_I_BIT | PSR_F_BIT | SVC_MODE, r1  @ set SVC, irqs off
-   @ load v:p, stack, return fn, resume fn
-  ARM( ldmia   r0!, {r1, sp, lr, pc}   )
-THUMB( ldmia   r0!, {r1, r2, r3, r4}   )
+   @ load v:p, stack, resume fn
+  ARM( ldmia   r0!, {r1, sp, pc}   )
+THUMB( ldmia   r0!, {r1, r2, r3}   )
 THUMB( mov sp, r2  )
-THUMB( mov lr, r3  )
-THUMB( bx  r4  )
+THUMB( bx  r3  )
 ENDPROC(cpu_resume)
 
 sleep_save_sp:
-- 
1.7.4.4

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[PATCH 06/25] ARM: pm: extract common code from MULTI_CPU/!MULTI_CPU paths

2011-06-23 Thread Russell King - ARM Linux
Very little code is different between these two paths now, so extract
the common code.

Acked-by: Frank Hofmann frank.hofm...@tomtom.com
Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
 arch/arm/kernel/sleep.S |   24 ++--
 1 files changed, 6 insertions(+), 18 deletions(-)

diff --git a/arch/arm/kernel/sleep.S b/arch/arm/kernel/sleep.S
index f8e9251..0a778c3 100644
--- a/arch/arm/kernel/sleep.S
+++ b/arch/arm/kernel/sleep.S
@@ -19,29 +19,13 @@ ENTRY(cpu_suspend)
mov r9, lr
 #ifdef MULTI_CPU
ldr r10, =processor
-   mov r2, sp  @ current virtual SP
ldr r0, [r10, #CPU_SLEEP_SIZE] @ size of CPU sleep state
ldr ip, [r10, #CPU_DO_RESUME] @ virtual resume function
-   sub sp, sp, r0  @ allocate CPU state on stack
-   mov r0, sp  @ save pointer
-   add ip, ip, r1  @ convert resume fn to phys
-   stmfd   sp!, {r1, r2, ip}   @ save v:p, virt SP, phys resume fn
-   ldr r3, =sleep_save_sp
-   add r2, sp, r1  @ convert SP to phys
-#ifdef CONFIG_SMP
-   ALT_SMP(mrc p15, 0, lr, c0, c0, 5)
-   ALT_UP(mov lr, #0)
-   and lr, lr, #15
-   str r2, [r3, lr, lsl #2]@ save phys SP
 #else
-   str r2, [r3]@ save phys SP
-#endif
-   mov lr, pc
-   ldr pc, [r10, #CPU_DO_SUSPEND] @ save CPU state
-#else
-   mov r2, sp  @ current virtual SP
ldr r0, =cpu_suspend_size
ldr ip, =cpu_do_resume
+#endif
+   mov r2, sp  @ current virtual SP
sub sp, sp, r0  @ allocate CPU state on stack
mov r0, sp  @ save pointer
add ip, ip, r1  @ convert resume fn to phys
@@ -56,6 +40,10 @@ ENTRY(cpu_suspend)
 #else
str r2, [r3]@ save phys SP
 #endif
+#ifdef MULTI_CPU
+   mov lr, pc
+   ldr pc, [r10, #CPU_DO_SUSPEND] @ save CPU state
+#else
bl  cpu_do_suspend
 #endif
 
-- 
1.7.4.4

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[PATCH 07/25] ARM: pm: preserve r4 - r11 across a suspend

2011-06-23 Thread Russell King - ARM Linux
Make cpu_suspend()..return function preserve r4 to r11 across a suspend
cycle.  This is in preparation of relieving platform support code from
this task.

Acked-by: Frank Hofmann frank.hofm...@tomtom.com
Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
 arch/arm/kernel/sleep.S |5 +++--
 1 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/arm/kernel/sleep.S b/arch/arm/kernel/sleep.S
index 0a778c3..8dbca93 100644
--- a/arch/arm/kernel/sleep.S
+++ b/arch/arm/kernel/sleep.S
@@ -12,10 +12,11 @@
  *  r1 = v:p offset
  *  r3 = virtual return function
  * Note: sp is decremented to allocate space for CPU state on stack
- * r0-r3,r9,r10,lr corrupted
+ * r0-r3,ip,lr corrupted
  */
 ENTRY(cpu_suspend)
stmfd   sp!, {r3}
+   stmfd   sp!, {r4 - r11}
mov r9, lr
 #ifdef MULTI_CPU
ldr r10, =processor
@@ -88,7 +89,7 @@ ENDPROC(cpu_resume_turn_mmu_on)
 cpu_resume_after_mmu:
str r5, [r2, r4, lsl #2]@ restore old mapping
mcr p15, 0, r0, c1, c0, 0   @ turn on D-cache
-   ldmfd   sp!, {pc}
+   ldmfd   sp!, {r4 - r11, pc}
 ENDPROC(cpu_resume_after_mmu)
 
 /*
-- 
1.7.4.4

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[PATCH 08/25] ARM: pm: reallocate registers to avoid r2, r3

2011-06-23 Thread Russell King - ARM Linux
Avoid using r2 and r3 in the suspend code, allowing these to be
passed further into the function as arguments.

Acked-by: Frank Hofmann frank.hofm...@tomtom.com
Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
 arch/arm/kernel/sleep.S |   18 +-
 1 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/arch/arm/kernel/sleep.S b/arch/arm/kernel/sleep.S
index 8dbca93..358be13 100644
--- a/arch/arm/kernel/sleep.S
+++ b/arch/arm/kernel/sleep.S
@@ -20,26 +20,26 @@ ENTRY(cpu_suspend)
mov r9, lr
 #ifdef MULTI_CPU
ldr r10, =processor
-   ldr r0, [r10, #CPU_SLEEP_SIZE] @ size of CPU sleep state
+   ldr r5, [r10, #CPU_SLEEP_SIZE] @ size of CPU sleep state
ldr ip, [r10, #CPU_DO_RESUME] @ virtual resume function
 #else
-   ldr r0, =cpu_suspend_size
+   ldr r5, =cpu_suspend_size
ldr ip, =cpu_do_resume
 #endif
-   mov r2, sp  @ current virtual SP
-   sub sp, sp, r0  @ allocate CPU state on stack
+   mov r6, sp  @ current virtual SP
+   sub sp, sp, r5  @ allocate CPU state on stack
mov r0, sp  @ save pointer
add ip, ip, r1  @ convert resume fn to phys
-   stmfd   sp!, {r1, r2, ip}   @ save v:p, virt SP, phys resume fn
-   ldr r3, =sleep_save_sp
-   add r2, sp, r1  @ convert SP to phys
+   stmfd   sp!, {r1, r6, ip}   @ save v:p, virt SP, phys resume fn
+   ldr r5, =sleep_save_sp
+   add r6, sp, r1  @ convert SP to phys
 #ifdef CONFIG_SMP
ALT_SMP(mrc p15, 0, lr, c0, c0, 5)
ALT_UP(mov lr, #0)
and lr, lr, #15
-   str r2, [r3, lr, lsl #2]@ save phys SP
+   str r6, [r5, lr, lsl #2]@ save phys SP
 #else
-   str r2, [r3]@ save phys SP
+   str r6, [r5]@ save phys SP
 #endif
 #ifdef MULTI_CPU
mov lr, pc
-- 
1.7.4.4

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Re: [PATCH 25/25] ARM: pm: omap34xx: convert to generic suspend/resume support

2011-06-23 Thread Kevin Hilman
Hi Russell,

Russell King - ARM Linux li...@arm.linux.org.uk writes:

 Convert sa11x0 to use the generic CPU suspend/resume support, rather
 than implementing its own version.  Tested on 3430 LDP.

 Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk

I tested this on 3430/n900 and 3530/Overo and it worked fine for
retention, but not for off.

Testing with off-mode, I found the MULTI_CPU path to be broken in
cpu_suspend (jumping to zero.)  Rebuilding for only OMAP3, it worked
fine for full-chip retention in suspend and idle as well as full-chip
off in suspend and idle.

I'm digging into the MULTI_CPU path now.

Kevin
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[PATCH 09/25] ARM: pm: rejig suspend follow-on function calling convention

2011-06-23 Thread Russell King - ARM Linux
Save the suspend function pointer onto the stack for use when returning.
Allocate r2 to pass an argument to the suspend function.

Acked-by: Frank Hofmann frank.hofm...@tomtom.com
Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
 arch/arm/kernel/sleep.S |9 +
 1 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/arch/arm/kernel/sleep.S b/arch/arm/kernel/sleep.S
index 358be13..b924bcc 100644
--- a/arch/arm/kernel/sleep.S
+++ b/arch/arm/kernel/sleep.S
@@ -10,6 +10,7 @@
 /*
  * Save CPU state for a suspend
  *  r1 = v:p offset
+ *  r2 = suspend function arg0
  *  r3 = virtual return function
  * Note: sp is decremented to allocate space for CPU state on stack
  * r0-r3,ip,lr corrupted
@@ -17,7 +18,6 @@
 ENTRY(cpu_suspend)
stmfd   sp!, {r3}
stmfd   sp!, {r4 - r11}
-   mov r9, lr
 #ifdef MULTI_CPU
ldr r10, =processor
ldr r5, [r10, #CPU_SLEEP_SIZE] @ size of CPU sleep state
@@ -33,6 +33,7 @@ ENTRY(cpu_suspend)
stmfd   sp!, {r1, r6, ip}   @ save v:p, virt SP, phys resume fn
ldr r5, =sleep_save_sp
add r6, sp, r1  @ convert SP to phys
+   stmfd   sp!, {r2, lr}   @ save suspend func arg and pointer
 #ifdef CONFIG_SMP
ALT_SMP(mrc p15, 0, lr, c0, c0, 5)
ALT_UP(mov lr, #0)
@@ -51,12 +52,12 @@ ENTRY(cpu_suspend)
@ flush data cache
 #ifdef MULTI_CACHE
ldr r10, =cpu_cache
-   mov lr, r9
+   mov lr, pc
ldr pc, [r10, #CACHE_FLUSH_KERN_ALL]
 #else
-   mov lr, r9
-   b   __cpuc_flush_kern_all
+   bl  __cpuc_flush_kern_all
 #endif
+   ldmfd   sp!, {r0, pc}   @ call suspend fn
 ENDPROC(cpu_suspend)
.ltorg
 
-- 
1.7.4.4

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[PATCH 11/25] ARM: pm: convert cpu_suspend() to a normal function

2011-06-23 Thread Russell King - ARM Linux
cpu_suspend() has a weird calling method which makes it only possible to
call from assembly code: it returns with a modified stack pointer to
finish the suspend, but on resume, it 'returns' via a provided pointer.

We can make cpu_suspend() appear to be a normal function merely by
swapping the resume pointer argument and the link register.

Do so, and update all callers to take account of this more traditional
behaviour.

Acked-by: Frank Hofmann frank.hofm...@tomtom.com
Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
 arch/arm/include/asm/system.h |2 ++
 arch/arm/kernel/sleep.S   |   10 --
 arch/arm/mach-exynos4/sleep.S |7 +++
 arch/arm/mach-pxa/sleep.S |   13 ++---
 arch/arm/mach-s3c64xx/sleep.S |9 +++--
 arch/arm/mach-s5pv210/sleep.S |7 +++
 arch/arm/mach-sa1100/sleep.S  |   13 +++--
 arch/arm/plat-s3c24xx/sleep.S |   10 +++---
 8 files changed, 31 insertions(+), 40 deletions(-)

diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index 832888d..50be605 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -106,6 +106,8 @@ extern void __show_regs(struct pt_regs *);
 
 extern int cpu_architecture(void);
 extern void cpu_init(void);
+extern void cpu_suspend(int, long, unsigned long, void (*)(unsigned long));
+extern void cpu_resume(void);
 
 void arm_machine_restart(char mode, const char *cmd);
 extern void (*arm_pm_restart)(char str, const char *cmd);
diff --git a/arch/arm/kernel/sleep.S b/arch/arm/kernel/sleep.S
index b924bcc..e062677 100644
--- a/arch/arm/kernel/sleep.S
+++ b/arch/arm/kernel/sleep.S
@@ -11,13 +11,11 @@
  * Save CPU state for a suspend
  *  r1 = v:p offset
  *  r2 = suspend function arg0
- *  r3 = virtual return function
- * Note: sp is decremented to allocate space for CPU state on stack
- * r0-r3,ip,lr corrupted
+ *  r3 = suspend function
+ * Note: does not return until system resumes
  */
 ENTRY(cpu_suspend)
-   stmfd   sp!, {r3}
-   stmfd   sp!, {r4 - r11}
+   stmfd   sp!, {r4 - r11, lr}
 #ifdef MULTI_CPU
ldr r10, =processor
ldr r5, [r10, #CPU_SLEEP_SIZE] @ size of CPU sleep state
@@ -33,7 +31,7 @@ ENTRY(cpu_suspend)
stmfd   sp!, {r1, r6, ip}   @ save v:p, virt SP, phys resume fn
ldr r5, =sleep_save_sp
add r6, sp, r1  @ convert SP to phys
-   stmfd   sp!, {r2, lr}   @ save suspend func arg and pointer
+   stmfd   sp!, {r2, r3}   @ save suspend func arg and pointer
 #ifdef CONFIG_SMP
ALT_SMP(mrc p15, 0, lr, c0, c0, 5)
ALT_UP(mov lr, #0)
diff --git a/arch/arm/mach-exynos4/sleep.S b/arch/arm/mach-exynos4/sleep.S
index 6b62425..d9a2287 100644
--- a/arch/arm/mach-exynos4/sleep.S
+++ b/arch/arm/mach-exynos4/sleep.S
@@ -42,16 +42,15 @@
 ENTRY(s3c_cpu_save)
 
stmfd   sp!, { r3 - r12, lr }
-   ldr r3, =resume_with_mmu
+   adr r3, BSYM(exynos4_finish_suspend)
bl  cpu_suspend
+   ldmfd   sp!, { r3 - r12, pc }
 
+exynos4_finish_suspend:
ldr r0, =pm_cpu_sleep
ldr r0, [ r0 ]
mov pc, r0
 
-resume_with_mmu:
-   ldmfd   sp!, { r3 - r12, pc }
-
.ltorg
 
/*
diff --git a/arch/arm/mach-pxa/sleep.S b/arch/arm/mach-pxa/sleep.S
index 613ddfa..3a67887 100644
--- a/arch/arm/mach-pxa/sleep.S
+++ b/arch/arm/mach-pxa/sleep.S
@@ -35,9 +35,11 @@ ENTRY(pxa3xx_cpu_suspend)
 #endif
stmfd   sp!, {r2 - r12, lr} @ save registers on stack
mov r1, r0
-   ldr r3, =pxa_cpu_resume @ resume function
+   adr r3, BSYM(pxa3xx_finish_suspend)
bl  cpu_suspend
+   b   pxa_cpu_resume
 
+pxa3xx_finish_suspend:
mov r0, #0x06   @ S2D3C4 mode
mcr p14, 0, r0, c7, c0, 0   @ enter sleep
 
@@ -60,9 +62,11 @@ ENTRY(pxa27x_cpu_suspend)
 #endif
stmfd   sp!, {r2 - r12, lr} @ save registers on stack
mov r2, r0  @ save sleep mode
-   ldr r3, =pxa_cpu_resume @ resume function
+   adr r3, BSYM(pxa27x_finish_suspend)
bl  cpu_suspend
+   b   pxa_cpu_resume
 
+pxa27x_finish_suspend:
@ Put the processor to sleep
@ (also workaround for sighting 28071)
 
@@ -110,8 +114,11 @@ ENTRY(pxa27x_cpu_suspend)
 ENTRY(pxa25x_cpu_suspend)
stmfd   sp!, {r2 - r12, lr} @ save registers on stack
mov r2, r0  @ save sleep mode
-   ldr r3, =pxa_cpu_resume @ resume function
+   adr r3, BSYM(pxa25x_finish_suspend)
bl  cpu_suspend
+   b   pxa_cpu_resume
+
+pxa25x_finish_suspend:
@ prepare value for sleep mode
mov r1, r0  @ sleep mode
 
diff --git a/arch/arm/mach-s3c64xx/sleep.S b/arch/arm/mach-s3c64xx/sleep.S
index 1f87732..dc4f582 100644
--- a/arch/arm/mach-s3c64xx/sleep.S

[PATCH 12/25] ARM: pm: move cpu_init() call into core code

2011-06-23 Thread Russell King - ARM Linux
As we have core code dealing with CPU suspend/resume, we can
re-initialize the CPUs exception banked registers via that code rather
than having platforms deal with that level of detail.  So, move the
call to cpu_init() out of platform code into core code.

Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
 arch/arm/kernel/sleep.S|1 +
 arch/arm/mach-pxa/pm.c |1 -
 arch/arm/mach-sa1100/pm.c  |2 --
 arch/arm/plat-samsung/pm.c |4 
 4 files changed, 1 insertions(+), 7 deletions(-)

diff --git a/arch/arm/kernel/sleep.S b/arch/arm/kernel/sleep.S
index e062677..5392274 100644
--- a/arch/arm/kernel/sleep.S
+++ b/arch/arm/kernel/sleep.S
@@ -88,6 +88,7 @@ ENDPROC(cpu_resume_turn_mmu_on)
 cpu_resume_after_mmu:
str r5, [r2, r4, lsl #2]@ restore old mapping
mcr p15, 0, r0, c1, c0, 0   @ turn on D-cache
+   bl  cpu_init@ restore the und/abt/irq banked regs
ldmfd   sp!, {r4 - r11, pc}
 ENDPROC(cpu_resume_after_mmu)
 
diff --git a/arch/arm/mach-pxa/pm.c b/arch/arm/mach-pxa/pm.c
index 51e1583..37178a8 100644
--- a/arch/arm/mach-pxa/pm.c
+++ b/arch/arm/mach-pxa/pm.c
@@ -42,7 +42,6 @@ int pxa_pm_enter(suspend_state_t state)
 
/* *** go zzz *** */
pxa_cpu_pm_fns-enter(state);
-   cpu_init();
 
if (state != PM_SUSPEND_STANDBY  pxa_cpu_pm_fns-restore) {
/* after sleeping, validate the checksum */
diff --git a/arch/arm/mach-sa1100/pm.c b/arch/arm/mach-sa1100/pm.c
index c4661aa..d35885c 100644
--- a/arch/arm/mach-sa1100/pm.c
+++ b/arch/arm/mach-sa1100/pm.c
@@ -77,8 +77,6 @@ static int sa11x0_pm_enter(suspend_state_t state)
/* go zzz */
sa1100_cpu_suspend(PLAT_PHYS_OFFSET - PAGE_OFFSET);
 
-   cpu_init();
-
/*
 * Ensure not to come back here if it wasn't intended
 */
diff --git a/arch/arm/plat-samsung/pm.c b/arch/arm/plat-samsung/pm.c
index 5c0a440..3828191 100644
--- a/arch/arm/plat-samsung/pm.c
+++ b/arch/arm/plat-samsung/pm.c
@@ -300,10 +300,6 @@ static int s3c_pm_enter(suspend_state_t state)
 
s3c_cpu_save(0, PLAT_PHYS_OFFSET - PAGE_OFFSET);
 
-   /* restore the cpu state using the kernel's cpu init code. */
-
-   cpu_init();
-
/* restore the system state */
 
s3c_pm_restore_core();
-- 
1.7.4.4

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[PATCH 13/25] ARM: pm: sa1100: move cpu_suspend into C code

2011-06-23 Thread Russell King - ARM Linux
We don't need a veneer for cpu_suspend, it can be called directly from
C code now.  Move it into sa11x0_pm_enter() along with the re-enabling
of clock switching.

Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
 arch/arm/mach-sa1100/pm.c|4 ++--
 arch/arm/mach-sa1100/sleep.S |   11 ++-
 2 files changed, 4 insertions(+), 11 deletions(-)

diff --git a/arch/arm/mach-sa1100/pm.c b/arch/arm/mach-sa1100/pm.c
index d35885c..259ed3b 100644
--- a/arch/arm/mach-sa1100/pm.c
+++ b/arch/arm/mach-sa1100/pm.c
@@ -32,7 +32,7 @@
 #include asm/system.h
 #include asm/mach/time.h
 
-extern void sa1100_cpu_suspend(long);
+extern void sa1100_finish_suspend(unsigned long);
 
 #define SAVE(x)sleep_save[SLEEP_SAVE_##x] = x
 #define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x]
@@ -75,7 +75,7 @@ static int sa11x0_pm_enter(suspend_state_t state)
PSPR = virt_to_phys(cpu_resume);
 
/* go zzz */
-   sa1100_cpu_suspend(PLAT_PHYS_OFFSET - PAGE_OFFSET);
+   cpu_suspend(0, PHYS_OFFSET - PAGE_OFFSET, 0, sa1100_finish_suspend);
 
/*
 * Ensure not to come back here if it wasn't intended
diff --git a/arch/arm/mach-sa1100/sleep.S b/arch/arm/mach-sa1100/sleep.S
index f3fe397..e822331 100644
--- a/arch/arm/mach-sa1100/sleep.S
+++ b/arch/arm/mach-sa1100/sleep.S
@@ -22,20 +22,13 @@
 
.text
 /*
- * sa1100_cpu_suspend()
+ * sa1100_finish_suspend()
  *
  * Causes sa11x0 to enter sleep state
  *
  */
 
-ENTRY(sa1100_cpu_suspend)
-   stmfd   sp!, {r4 - r12, lr} @ save registers on stack
-   mov r1, r0
-   adr r3, BSYM(sa1100_finish_suspend)
-   bl  cpu_suspend
-   ldmfd   sp!, {r4 - r12, pc} @ return to caller
-
-sa1100_finish_suspend:
+ENTRY(sa1100_finish_suspend)
@ disable clock switching
mcr p15, 0, r1, c15, c2, 2
 
-- 
1.7.4.4

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[PATCH 14/25] ARM: pm: plat-s3c24xx: cleanup s3c_cpu_save

2011-06-23 Thread Russell King - ARM Linux
s3c_cpu_save does not need to save any registers with the new
cpu_suspend calling convention.  Remove these redundant instructions.

Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
 arch/arm/plat-s3c24xx/sleep.S |4 +---
 1 files changed, 1 insertions(+), 3 deletions(-)

diff --git a/arch/arm/plat-s3c24xx/sleep.S b/arch/arm/plat-s3c24xx/sleep.S
index f822e62..6ada459 100644
--- a/arch/arm/plat-s3c24xx/sleep.S
+++ b/arch/arm/plat-s3c24xx/sleep.S
@@ -48,10 +48,8 @@
*/
 
 ENTRY(s3c_cpu_save)
-   stmfd   sp!, { r4 - r12, lr }
adr r3, BSYM(s3c24xx_finish_suspend)
-   bl  cpu_suspend
-   ldmfd   sp!, { r4 - r12, pc }
+   b   cpu_suspend
 
 s3c24xx_finish_suspend:
@@ jump to final code to send system to sleep
-- 
1.7.4.4

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[PATCH 15/25] ARM: pm: mach-s5pv210: cleanup s3c_cpu_save

2011-06-23 Thread Russell King - ARM Linux
s3c_cpu_save does not need to save any registers with the new
cpu_suspend calling convention.  Remove these redundant instructions.

Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
 arch/arm/mach-s5pv210/sleep.S |5 +
 1 files changed, 1 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-s5pv210/sleep.S b/arch/arm/mach-s5pv210/sleep.S
index 1182fc8..28dfeff 100644
--- a/arch/arm/mach-s5pv210/sleep.S
+++ b/arch/arm/mach-s5pv210/sleep.S
@@ -39,11 +39,8 @@
*/
 
 ENTRY(s3c_cpu_save)
-
-   stmfd   sp!, { r3 - r12, lr }
adr r3, BSYM(s5pv210_finish_suspend)
-   bl  cpu_suspend
-   ldmfd   sp!, { r3 - r12, pc }
+   b   cpu_suspend
 
 s5pv210_finish_suspend:
ldr r0, =pm_cpu_sleep
-- 
1.7.4.4

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[PATCH 16/25] ARM: pm: mach-exynos4: cleanup s3c_cpu_save

2011-06-23 Thread Russell King - ARM Linux
s3c_cpu_save does not need to save any registers with the new
cpu_suspend calling convention.  Remove these redundant instructions.

Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
 arch/arm/mach-exynos4/sleep.S |5 +
 1 files changed, 1 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-exynos4/sleep.S b/arch/arm/mach-exynos4/sleep.S
index d9a2287..b56a491 100644
--- a/arch/arm/mach-exynos4/sleep.S
+++ b/arch/arm/mach-exynos4/sleep.S
@@ -40,11 +40,8 @@
 */
 
 ENTRY(s3c_cpu_save)
-
-   stmfd   sp!, { r3 - r12, lr }
adr r3, BSYM(exynos4_finish_suspend)
-   bl  cpu_suspend
-   ldmfd   sp!, { r3 - r12, pc }
+   b   cpu_suspend
 
 exynos4_finish_suspend:
ldr r0, =pm_cpu_sleep
-- 
1.7.4.4

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[PATCH 17/25] ARM: pm: mach-s3c64xx: cleanup s3c_cpu_save

2011-06-23 Thread Russell King - ARM Linux
s3c_cpu_save does not need to save any registers with the new
cpu_suspend calling convention.  Remove these redundant instructions.

Acked-by: Frank Hofmann frank.hofm...@tomtom.com
Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
 arch/arm/mach-s3c64xx/sleep.S |4 +---
 1 files changed, 1 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-s3c64xx/sleep.S b/arch/arm/mach-s3c64xx/sleep.S
index dc4f582..2fd3433 100644
--- a/arch/arm/mach-s3c64xx/sleep.S
+++ b/arch/arm/mach-s3c64xx/sleep.S
@@ -35,10 +35,8 @@
*/
 
 ENTRY(s3c_cpu_save)
-   stmfd   sp!, { r4 - r12, lr }
adr r3, BSYM(s3c64xx_finish_suspend)
-   bl  cpu_suspend
-   ldmfd   sp!, { r4 - r12, pc }
+   b   cpu_suspend
 
 s3c64xx_finish_suspend:
@@ call final suspend code
-- 
1.7.4.4

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[PATCH 18/25] ARM: pm: samsung: move cpu_suspend into C code

2011-06-23 Thread Russell King - ARM Linux
Move the call to cpu_suspend into C code, and noticing that all the
s3c_cpu_save implementations are now identical, we can move this
into the common samsung code.

Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
 arch/arm/mach-exynos4/pm.c  |2 +-
 arch/arm/mach-exynos4/sleep.S   |   18 --
 arch/arm/mach-s3c2412/pm.c  |2 +-
 arch/arm/mach-s3c2416/pm.c  |2 +-
 arch/arm/mach-s3c64xx/pm.c  |2 +-
 arch/arm/mach-s3c64xx/sleep.S   |   18 --
 arch/arm/mach-s5pv210/pm.c  |2 +-
 arch/arm/mach-s5pv210/sleep.S   |   17 -
 arch/arm/plat-s3c24xx/sleep.S   |   19 ---
 arch/arm/plat-samsung/include/plat/pm.h |5 ++---
 arch/arm/plat-samsung/pm.c  |6 +++---
 11 files changed, 10 insertions(+), 83 deletions(-)

diff --git a/arch/arm/mach-exynos4/pm.c b/arch/arm/mach-exynos4/pm.c
index 8755ca8..5c01c60 100644
--- a/arch/arm/mach-exynos4/pm.c
+++ b/arch/arm/mach-exynos4/pm.c
@@ -280,7 +280,7 @@ static struct sleep_save exynos4_l2cc_save[] = {
SAVE_ITEM(S5P_VA_L2CC + L2X0_AUX_CTRL),
 };
 
-void exynos4_cpu_suspend(void)
+void exynos4_cpu_suspend(unsigned long arg)
 {
unsigned long tmp;
unsigned long mask = 0x;
diff --git a/arch/arm/mach-exynos4/sleep.S b/arch/arm/mach-exynos4/sleep.S
index b56a491..0984078 100644
--- a/arch/arm/mach-exynos4/sleep.S
+++ b/arch/arm/mach-exynos4/sleep.S
@@ -33,24 +33,6 @@
.text
 
/*
-* s3c_cpu_save
-*
-* entry:
-*  r1 = v:p offset
-*/
-
-ENTRY(s3c_cpu_save)
-   adr r3, BSYM(exynos4_finish_suspend)
-   b   cpu_suspend
-
-exynos4_finish_suspend:
-   ldr r0, =pm_cpu_sleep
-   ldr r0, [ r0 ]
-   mov pc, r0
-
-   .ltorg
-
-   /*
 * sleep magic, to allow the bootloader to check for an valid
 * image to resume to. Must be the first word before the
 * s3c_cpu_resume entry.
diff --git a/arch/arm/mach-s3c2412/pm.c b/arch/arm/mach-s3c2412/pm.c
index 752b13a..fecd854 100644
--- a/arch/arm/mach-s3c2412/pm.c
+++ b/arch/arm/mach-s3c2412/pm.c
@@ -37,7 +37,7 @@
 
 extern void s3c2412_sleep_enter(void);
 
-static void s3c2412_cpu_suspend(void)
+static void s3c2412_cpu_suspend(unsigned long arg)
 {
unsigned long tmp;
 
diff --git a/arch/arm/mach-s3c2416/pm.c b/arch/arm/mach-s3c2416/pm.c
index 41db2b2..268fda7 100644
--- a/arch/arm/mach-s3c2416/pm.c
+++ b/arch/arm/mach-s3c2416/pm.c
@@ -24,7 +24,7 @@
 
 extern void s3c2412_sleep_enter(void);
 
-static void s3c2416_cpu_suspend(void)
+static void s3c2416_cpu_suspend(unsigned long arg)
 {
flush_cache_all();
 
diff --git a/arch/arm/mach-s3c64xx/pm.c b/arch/arm/mach-s3c64xx/pm.c
index bc1c470..7cc1879 100644
--- a/arch/arm/mach-s3c64xx/pm.c
+++ b/arch/arm/mach-s3c64xx/pm.c
@@ -112,7 +112,7 @@ void s3c_pm_save_core(void)
  * this.
  */
 
-static void s3c64xx_cpu_suspend(void)
+static void s3c64xx_cpu_suspend(unsigned long arg)
 {
unsigned long tmp;
 
diff --git a/arch/arm/mach-s3c64xx/sleep.S b/arch/arm/mach-s3c64xx/sleep.S
index 2fd3433..34313f9 100644
--- a/arch/arm/mach-s3c64xx/sleep.S
+++ b/arch/arm/mach-s3c64xx/sleep.S
@@ -25,24 +25,6 @@
 
.text
 
-   /* s3c_cpu_save
-*
-* Save enough processor state to allow the restart of the pm.c
-* code after resume.
-*
-* entry:
-*  r1 = v:p offset
-   */
-
-ENTRY(s3c_cpu_save)
-   adr r3, BSYM(s3c64xx_finish_suspend)
-   b   cpu_suspend
-
-s3c64xx_finish_suspend:
-   @@ call final suspend code
-   ldr r0, =pm_cpu_sleep
-   ldr pc, [r0]
-   
/* Sleep magic, the word before the resume entry point so that the
 * bootloader can check for a resumeable image. */
 
diff --git a/arch/arm/mach-s5pv210/pm.c b/arch/arm/mach-s5pv210/pm.c
index 24febae..309e388 100644
--- a/arch/arm/mach-s5pv210/pm.c
+++ b/arch/arm/mach-s5pv210/pm.c
@@ -88,7 +88,7 @@ static struct sleep_save s5pv210_core_save[] = {
SAVE_ITEM(S3C2410_TCNTO(0)),
 };
 
-void s5pv210_cpu_suspend(void)
+void s5pv210_cpu_suspend(unsigned long arg)
 {
unsigned long tmp;
 
diff --git a/arch/arm/mach-s5pv210/sleep.S b/arch/arm/mach-s5pv210/sleep.S
index 28dfeff..e3452cc 100644
--- a/arch/arm/mach-s5pv210/sleep.S
+++ b/arch/arm/mach-s5pv210/sleep.S
@@ -32,23 +32,6 @@
 
.text
 
-   /* s3c_cpu_save
-*
-* entry:
-*  r1 = v:p offset
-   */
-
-ENTRY(s3c_cpu_save)
-   adr r3, BSYM(s5pv210_finish_suspend)
-   b   cpu_suspend
-
-s5pv210_finish_suspend:
-   ldr r0, =pm_cpu_sleep
-   ldr r0, [ r0 ]
-   mov pc, r0
-
-   .ltorg
-
/* sleep magic, to allow the bootloader to check for an valid
 * image to resume to. Must be the first word before the
 * 

[PATCH 19/25] ARM: pm: samsung: no need to call flush_cache_all()

2011-06-23 Thread Russell King - ARM Linux
The core suspend code calls flush_cache_all() immediately prior to
calling the suspend finisher function, so remove these needless calls
from the finisher functions.

Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
 arch/arm/mach-s3c2412/pm.c |2 --
 arch/arm/mach-s3c2416/pm.c |2 --
 2 files changed, 0 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-s3c2412/pm.c b/arch/arm/mach-s3c2412/pm.c
index fecd854..9a1fb89 100644
--- a/arch/arm/mach-s3c2412/pm.c
+++ b/arch/arm/mach-s3c2412/pm.c
@@ -41,8 +41,6 @@ static void s3c2412_cpu_suspend(unsigned long arg)
 {
unsigned long tmp;
 
-   flush_cache_all();
-
/* set our standby method to sleep */
 
tmp = __raw_readl(S3C2412_PWRCFG);
diff --git a/arch/arm/mach-s3c2416/pm.c b/arch/arm/mach-s3c2416/pm.c
index 268fda7..9e67a2a 100644
--- a/arch/arm/mach-s3c2416/pm.c
+++ b/arch/arm/mach-s3c2416/pm.c
@@ -26,8 +26,6 @@ extern void s3c2412_sleep_enter(void);
 
 static void s3c2416_cpu_suspend(unsigned long arg)
 {
-   flush_cache_all();
-
/* enable wakeup sources regardless of battery state */
__raw_writel(S3C2443_PWRCFG_SLEEP, S3C2443_PWRCFG);
 
-- 
1.7.4.4

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[PATCH 20/25] ARM: pm: pxa: move cpu_suspend into C code

2011-06-23 Thread Russell King - ARM Linux
We don't need a veneer for cpu_suspend, it can be called directly from
C code now.  Move it into the PXA CPU suspend functions, along with
the accumulator register saving/restoring.

Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
 arch/arm/mach-pxa/include/mach/pm.h |4 +-
 arch/arm/mach-pxa/pxa25x.c  |3 +-
 arch/arm/mach-pxa/pxa27x.c  |   11 ++-
 arch/arm/mach-pxa/pxa3xx.c  |   13 ++-
 arch/arm/mach-pxa/sleep.S   |   58 +++---
 arch/arm/mach-pxa/zeus.c|3 +-
 6 files changed, 33 insertions(+), 59 deletions(-)

diff --git a/arch/arm/mach-pxa/include/mach/pm.h 
b/arch/arm/mach-pxa/include/mach/pm.h
index f15afe0..a566720 100644
--- a/arch/arm/mach-pxa/include/mach/pm.h
+++ b/arch/arm/mach-pxa/include/mach/pm.h
@@ -22,8 +22,8 @@ struct pxa_cpu_pm_fns {
 extern struct pxa_cpu_pm_fns *pxa_cpu_pm_fns;
 
 /* sleep.S */
-extern void pxa25x_cpu_suspend(unsigned int, long);
-extern void pxa27x_cpu_suspend(unsigned int, long);
+extern void pxa25x_finish_suspend(unsigned long);
+extern void pxa27x_finish_suspend(unsigned long);
 
 extern int pxa_pm_enter(suspend_state_t state);
 extern int pxa_pm_prepare(void);
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index fed363c..fd7725c 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -244,7 +244,8 @@ static void pxa25x_cpu_pm_enter(suspend_state_t state)
 
switch (state) {
case PM_SUSPEND_MEM:
-   pxa25x_cpu_suspend(PWRMODE_SLEEP, PLAT_PHYS_OFFSET - 
PAGE_OFFSET);
+   cpu_suspend(0, PHYS_OFFSET - PAGE_OFFSET, PWRMODE_SLEEP,
+   pxa25x_finish_suspend);
break;
}
 }
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index 2fecbec..824379d 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -284,6 +284,11 @@ void pxa27x_cpu_pm_restore(unsigned long *sleep_save)
 void pxa27x_cpu_pm_enter(suspend_state_t state)
 {
extern void pxa_cpu_standby(void);
+#ifndef CONFIG_IWMMXT
+   u64 acc0;
+
+   asm volatile(mra %Q0, %R0, acc0 : =r (acc0));
+#endif
 
/* ensure voltage-change sequencer not initiated, which hangs */
PCFR = ~PCFR_FVC;
@@ -299,7 +304,11 @@ void pxa27x_cpu_pm_enter(suspend_state_t state)
pxa_cpu_standby();
break;
case PM_SUSPEND_MEM:
-   pxa27x_cpu_suspend(pwrmode, PLAT_PHYS_OFFSET - PAGE_OFFSET);
+   cpu_suspend(0, PHYS_OFFSET - PAGE_OFFSET, pwrmode,
+   pxa27x_finish_suspend);
+#ifndef CONFIG_IWMMXT
+   asm volatile(mar acc0, %Q0, %R0 : =r (acc0));
+#endif
break;
}
 }
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index 8521d7d..220fd8c 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -141,8 +141,13 @@ static void pxa3xx_cpu_pm_suspend(void)
 {
volatile unsigned long *p = (volatile void *)0xc000;
unsigned long saved_data = *p;
+#ifndef CONFIG_IWMMXT
+   u64 acc0;
 
-   extern void pxa3xx_cpu_suspend(long);
+   asm volatile(mra %Q0, %R0, acc0 : =r (acc0));
+#endif
+
+   extern void pxa3xx_finish_suspend(unsigned long);
 
/* resuming from D2 requires the HSIO2/BOOT/TPM clocks enabled */
CKENA |= (1  CKEN_BOOT) | (1  CKEN_TPM);
@@ -162,11 +167,15 @@ static void pxa3xx_cpu_pm_suspend(void)
/* overwrite with the resume address */
*p = virt_to_phys(cpu_resume);
 
-   pxa3xx_cpu_suspend(PLAT_PHYS_OFFSET - PAGE_OFFSET);
+   cpu_suspend(0, PHYS_OFFSET - PAGE_OFFSET, 0, pxa3xx_finish_suspend);
 
*p = saved_data;
 
AD3ER = 0;
+
+#ifndef CONFIG_IWMMXT
+   asm volatile(mar acc0, %Q0, %R0 : =r (acc0));
+#endif
 }
 
 static void pxa3xx_cpu_pm_enter(suspend_state_t state)
diff --git a/arch/arm/mach-pxa/sleep.S b/arch/arm/mach-pxa/sleep.S
index 3a67887..1e544be 100644
--- a/arch/arm/mach-pxa/sleep.S
+++ b/arch/arm/mach-pxa/sleep.S
@@ -24,22 +24,9 @@
 
 #ifdef CONFIG_PXA3xx
 /*
- * pxa3xx_cpu_suspend() - forces CPU into sleep state (S2D3C4)
- *
- * r0 = v:p offset
+ * pxa3xx_finish_suspend() - forces CPU into sleep state (S2D3C4)
  */
-ENTRY(pxa3xx_cpu_suspend)
-
-#ifndef CONFIG_IWMMXT
-   mra r2, r3, acc0
-#endif
-   stmfd   sp!, {r2 - r12, lr} @ save registers on stack
-   mov r1, r0
-   adr r3, BSYM(pxa3xx_finish_suspend)
-   bl  cpu_suspend
-   b   pxa_cpu_resume
-
-pxa3xx_finish_suspend:
+ENTRY(pxa3xx_finish_suspend)
mov r0, #0x06   @ S2D3C4 mode
mcr p14, 0, r0, c7, c0, 0   @ enter sleep
 
@@ -48,25 +35,13 @@ pxa3xx_finish_suspend:
 
 #ifdef CONFIG_PXA27x
 /*
- * pxa27x_cpu_suspend()
+ * pxa27x_finish_suspend()
  *
  * Forces CPU into sleep state.
  *
  * r0 = value for PWRMODE M field for desired sleep state
- * r1 = v:p 

[PATCH 21/25] ARM: pm: omap34xx: no need to save all registers in sleep34xx.S

2011-06-23 Thread Russell King - ARM Linux
The ABI allows called functions to corrupt r0-r3 and ip (r12).  So
its pointless saving these registers in the suspend code - the
calling function will expect them to be corrupted and so won't rely
on their contents after resume.

Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
 arch/arm/mach-omap2/sleep34xx.S |   10 +-
 1 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S
index 63f1066..9551c7d 100644
--- a/arch/arm/mach-omap2/sleep34xx.S
+++ b/arch/arm/mach-omap2/sleep34xx.S
@@ -133,7 +133,7 @@ ENDPROC(enable_omap3630_toggle_l2_on_restore)
 /* Function to call rom code to save secure ram context */
.align  3
 ENTRY(save_secure_ram_context)
-   stmfd   sp!, {r1-r12, lr}   @ save registers on stack
+   stmfd   sp!, {r4 - r11, lr} @ save registers on stack
adr r3, api_params  @ r3 points to parameters
str r0, [r3,#0x4]   @ r0 has sdram address
ldr r12, high_mask
@@ -152,7 +152,7 @@ ENTRY(save_secure_ram_context)
nop
nop
nop
-   ldmfd   sp!, {r1-r12, pc}
+   ldmfd   sp!, {r4 - r11, pc}
.align
 sram_phy_addr_mask:
.word   SRAM_BASE_P
@@ -187,7 +187,7 @@ ENTRY(save_secure_ram_context_sz)
  */
.align  3
 ENTRY(omap34xx_cpu_suspend)
-   stmfd   sp!, {r0-r12, lr}   @ save registers on stack
+   stmfd   sp!, {r4 - r11, lr} @ save registers on stack
 
/*
 * r0 contains CPU context save/restore pointer in sdram
@@ -329,7 +329,7 @@ omap3_do_wfi:
  * == Exit point from non-OFF modes ==
  * ===
  */
-   ldmfd   sp!, {r0-r12, pc}   @ restore regs and return
+   ldmfd   sp!, {r4 - r11, pc} @ restore regs and return
 
 
 /*
@@ -572,7 +572,7 @@ usettbr0:
  * ==
  */
 restoremmu_on:
-   ldmfd   sp!, {r0-r12, pc}   @ restore regs and return
+   ldmfd   sp!, {r4 - r11, pc} @ restore regs and return
 
 
 /*
-- 
1.7.4.4

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[PATCH 22/25] ARM: pm: omap34xx: remove misleading comment and use of r9

2011-06-23 Thread Russell King - ARM Linux
The code alludes to r9 being used to indicate what was lost over the
suspend/resume transition.  However, although r9 is set, it is never
actually used.

Also, the comments before the code (which refer to the value of r9)
and the comments against the assignment of r9 contradict each other,
so just remove them to avoid confusion.

Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
 arch/arm/mach-omap2/sleep34xx.S |9 ++---
 1 files changed, 2 insertions(+), 7 deletions(-)

diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S
index 9551c7d..12e9da2 100644
--- a/arch/arm/mach-omap2/sleep34xx.S
+++ b/arch/arm/mach-omap2/sleep34xx.S
@@ -381,18 +381,13 @@ restore_3630:
 
 restore:
/*
-* Check what was the reason for mpu reset and store the reason in r9:
-*  0 - No context lost
-*  1 - Only L1 and logic lost
-*  2 - Only L2 lost - In this case, we wont be here
-*  3 - Both L1 and L2 lost
+* Read the pwstctrl register to check the reason for mpu reset.
+* This tells us what was lost.
 */
ldr r1, pm_pwstctrl_mpu
ldr r2, [r1]
and r2, r2, #0x3
cmp r2, #0x0@ Check if target power state was OFF or RET
-   moveq   r9, #0x3@ MPU OFF = L1 and L2 lost
-   movne   r9, #0x1@ Only L1 and L2 lost = avoid L2 invalidation
bne logic_l1_restore
 
ldr r0, l2dis_3630
-- 
1.7.4.4

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[PATCH 23/25] ARM: pm: omap34xx: convert to generic suspend/resume support

2011-06-23 Thread Russell King - ARM Linux
Convert sa11x0 to use the generic CPU suspend/resume support, rather
than implementing its own version.  Tested on 3430 LDP.

Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
 arch/arm/mach-omap2/pm34xx.c|   47 +++--
 arch/arm/mach-omap2/sleep34xx.S |  143 +--
 2 files changed, 13 insertions(+), 177 deletions(-)

diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index c155c9d..ae40177 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -40,8 +40,6 @@
 #include plat/gpmc.h
 #include plat/dma.h
 
-#include asm/tlbflush.h
-
 #include cm2xxx_3xxx.h
 #include cm-regbits-34xx.h
 #include prm-regbits-34xx.h
@@ -64,11 +62,6 @@ static inline bool is_suspending(void)
 }
 #endif
 
-/* Scratchpad offsets */
-#define OMAP343X_TABLE_ADDRESS_OFFSET 0xc4
-#define OMAP343X_TABLE_VALUE_OFFSET   0xc0
-#define OMAP343X_CONTROL_REG_VALUE_OFFSET  0xc8
-
 /* pm34xx errata defined in pm.h */
 u16 pm34xx_errata;
 
@@ -312,28 +305,9 @@ static irqreturn_t prcm_interrupt_handler (int irq, void 
*dev_id)
return IRQ_HANDLED;
 }
 
-/* Function to restore the table entry that was modified for enabling MMU */
-static void restore_table_entry(void)
+static void omap34xx_do_sram_idle(unsigned long save_state)
 {
-   void __iomem *scratchpad_address;
-   u32 previous_value, control_reg_value;
-   u32 *address;
-
-   scratchpad_address = OMAP2_L4_IO_ADDRESS(OMAP343X_SCRATCHPAD);
-
-   /* Get address of entry that was modified */
-   address = (u32 *)__raw_readl(scratchpad_address +
-OMAP343X_TABLE_ADDRESS_OFFSET);
-   /* Get the previous value which needs to be restored */
-   previous_value = __raw_readl(scratchpad_address +
-OMAP343X_TABLE_VALUE_OFFSET);
-   address = __va(address);
-   *address = previous_value;
-   flush_tlb_all();
-   control_reg_value = __raw_readl(scratchpad_address
-   + OMAP343X_CONTROL_REG_VALUE_OFFSET);
-   /* This will enable caches and prediction */
-   set_cr(control_reg_value);
+   _omap_sram_idle(omap3_arm_context, save_state);
 }
 
 void omap_sram_idle(void)
@@ -432,12 +406,15 @@ void omap_sram_idle(void)
sdrc_pwr = sdrc_read_reg(SDRC_POWER);
 
/*
-* omap3_arm_context is the location where ARM registers
-* get saved. The restore path then reads from this
-* location and restores them back.
+* omap3_arm_context is the location where some ARM context
+* get saved. The rest is placed on the stack, and restored
+* from there before resuming.
 */
-   _omap_sram_idle(omap3_arm_context, save_state);
-   cpu_init();
+   if (save_state == 1 || save_state == 3)
+   cpu_suspend(0, PHYS_OFFSET - PAGE_OFFSET, save_state,
+   omap34xx_do_sram_idle);
+   else
+   omap34xx_do_sram_idle(save_state);
 
/* Restore normal SDRC POWER settings */
if (omap_rev() = OMAP3430_REV_ES3_0 
@@ -445,10 +422,6 @@ void omap_sram_idle(void)
core_next_state == PWRDM_POWER_OFF)
sdrc_write_reg(sdrc_pwr, SDRC_POWER);
 
-   /* Restore table entry modified during MMU restoration */
-   if (pwrdm_read_prev_pwrst(mpu_pwrdm) == PWRDM_POWER_OFF)
-   restore_table_entry();
-
/* CORE */
if (core_next_state  PWRDM_POWER_ON) {
core_prev_state = pwrdm_read_prev_pwrst(core_pwrdm);
diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S
index 12e9da2..9a1349e 100644
--- a/arch/arm/mach-omap2/sleep34xx.S
+++ b/arch/arm/mach-omap2/sleep34xx.S
@@ -211,37 +211,6 @@ save_context_wfi:
mrc p15, 1, r5, c9, c0, 2   @ Read L2 AUX ctrl register
stmia   r8!, {r4-r5}@ Push parameters for restore call
 
-/* Check what that target sleep state is from r1 */
-   cmp r1, #0x2@ Only L2 lost, no need to save context
-   beq clean_caches
-
-l1_logic_lost:
-   mov r4, sp  @ Store sp
-   mrs r5, spsr@ Store spsr
-   mov r6, lr  @ Store lr
-   stmia   r8!, {r4-r6}
-
-   mrc p15, 0, r4, c1, c0, 2   @ Coprocessor access control register
-   mrc p15, 0, r5, c2, c0, 0   @ TTBR0
-   mrc p15, 0, r6, c2, c0, 1   @ TTBR1
-   mrc p15, 0, r7, c2, c0, 2   @ TTBCR
-   stmia   r8!, {r4-r7}
-
-   mrc p15, 0, r4, c3, c0, 0   @ Domain access Control Register
-   mrc p15, 0, r5, c10, c2, 0  @ PRRR
-   mrc p15, 0, r6, c10, c2, 1  @ NMRR
-   stmia   r8!,{r4-r6}
-
-   mrc p15, 0, r4, c13, c0, 1  @ Context ID
-   mrc p15, 0, r5, c13, c0, 2  @ User r/w thread and process ID
-   mrc p15, 0, r6, c12, c0, 0  @ Secure or NS 

[PATCH 24/25] ARM: pm: hide 1st and 2nd arguments to cpu_suspend from platform code

2011-06-23 Thread Russell King - ARM Linux
The first and second arguments shouldn't concern platform code, so
hide them from each platforms caller.

Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
 arch/arm/include/asm/suspend.h |   19 +++
 arch/arm/include/asm/system.h  |2 --
 arch/arm/kernel/sleep.S|2 +-
 arch/arm/mach-omap2/pm34xx.c   |5 +++--
 arch/arm/mach-pxa/palmz72.c|1 +
 arch/arm/mach-pxa/pxa25x.c |4 ++--
 arch/arm/mach-pxa/pxa27x.c |4 ++--
 arch/arm/mach-pxa/pxa3xx.c |3 ++-
 arch/arm/mach-pxa/zeus.c   |4 ++--
 arch/arm/mach-sa1100/pm.c  |3 ++-
 arch/arm/plat-samsung/pm.c |3 ++-
 11 files changed, 36 insertions(+), 14 deletions(-)
 create mode 100644 arch/arm/include/asm/suspend.h

diff --git a/arch/arm/include/asm/suspend.h b/arch/arm/include/asm/suspend.h
new file mode 100644
index 000..8d5b446
--- /dev/null
+++ b/arch/arm/include/asm/suspend.h
@@ -0,0 +1,19 @@
+#ifndef __ASM_ARM_SUSPEND_H
+#define __ASM_ARM_SUSPEND_H
+
+#include asm/memory.h
+
+extern void cpu_resume(void);
+
+/*
+ * Hide the first two arguments to __cpu_suspend - these are an implementation
+ * detail which platform code shouldn't have to know about.
+ */
+static inline void cpu_suspend(unsigned long arg, void (*fn)(unsigned long))
+{
+   extern void __cpu_suspend(int, long, unsigned long,
+ void (*)(unsigned long));
+   __cpu_suspend(0, PHYS_OFFSET - PAGE_OFFSET, arg, fn);
+}
+
+#endif
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index 50be605..832888d 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -106,8 +106,6 @@ extern void __show_regs(struct pt_regs *);
 
 extern int cpu_architecture(void);
 extern void cpu_init(void);
-extern void cpu_suspend(int, long, unsigned long, void (*)(unsigned long));
-extern void cpu_resume(void);
 
 void arm_machine_restart(char mode, const char *cmd);
 extern void (*arm_pm_restart)(char str, const char *cmd);
diff --git a/arch/arm/kernel/sleep.S b/arch/arm/kernel/sleep.S
index 5392274..0bdcc72 100644
--- a/arch/arm/kernel/sleep.S
+++ b/arch/arm/kernel/sleep.S
@@ -14,7 +14,7 @@
  *  r3 = suspend function
  * Note: does not return until system resumes
  */
-ENTRY(cpu_suspend)
+ENTRY(__cpu_suspend)
stmfd   sp!, {r4 - r11, lr}
 #ifdef MULTI_CPU
ldr r10, =processor
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index ae40177..3e9a13e 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -31,6 +31,8 @@
 #include linux/console.h
 #include trace/events/power.h
 
+#include asm/suspend.h
+
 #include plat/sram.h
 #include clockdomain.h
 #include powerdomain.h
@@ -411,8 +413,7 @@ void omap_sram_idle(void)
 * from there before resuming.
 */
if (save_state == 1 || save_state == 3)
-   cpu_suspend(0, PHYS_OFFSET - PAGE_OFFSET, save_state,
-   omap34xx_do_sram_idle);
+   cpu_suspend(save_state, omap34xx_do_sram_idle);
else
omap34xx_do_sram_idle(save_state);
 
diff --git a/arch/arm/mach-pxa/palmz72.c b/arch/arm/mach-pxa/palmz72.c
index 65f24f0..5a5329b 100644
--- a/arch/arm/mach-pxa/palmz72.c
+++ b/arch/arm/mach-pxa/palmz72.c
@@ -33,6 +33,7 @@
 #include linux/i2c-gpio.h
 
 #include asm/mach-types.h
+#include asm/suspend.h
 #include asm/mach/arch.h
 #include asm/mach/map.h
 
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index fd7725c..9c434d2 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -25,6 +25,7 @@
 #include linux/irq.h
 
 #include asm/mach/map.h
+#include asm/suspend.h
 #include mach/hardware.h
 #include mach/irqs.h
 #include mach/gpio.h
@@ -244,8 +245,7 @@ static void pxa25x_cpu_pm_enter(suspend_state_t state)
 
switch (state) {
case PM_SUSPEND_MEM:
-   cpu_suspend(0, PHYS_OFFSET - PAGE_OFFSET, PWRMODE_SLEEP,
-   pxa25x_finish_suspend);
+   cpu_suspend(PWRMODE_SLEEP, pxa25x_finish_suspend);
break;
}
 }
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index 824379d..9d2400b 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -24,6 +24,7 @@
 #include asm/mach/map.h
 #include mach/hardware.h
 #include asm/irq.h
+#include asm/suspend.h
 #include mach/irqs.h
 #include mach/gpio.h
 #include mach/pxa27x.h
@@ -304,8 +305,7 @@ void pxa27x_cpu_pm_enter(suspend_state_t state)
pxa_cpu_standby();
break;
case PM_SUSPEND_MEM:
-   cpu_suspend(0, PHYS_OFFSET - PAGE_OFFSET, pwrmode,
-   pxa27x_finish_suspend);
+   cpu_suspend(pwrmode, pxa27x_finish_suspend);
 #ifndef CONFIG_IWMMXT
asm volatile(mar acc0, %Q0, %R0 : =r (acc0));
 #endif
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c

[PATCH 25/25] ARM: pm: ensure our temporary page table entry is removed from the TLB

2011-06-23 Thread Russell King - ARM Linux
Ensure that our temporary page table entry is flushed from the TLB
before we resume normal operations.  This ensures that userspace
won't trip over the stale TLB entry.

Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
 arch/arm/include/asm/suspend.h |2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/arch/arm/include/asm/suspend.h b/arch/arm/include/asm/suspend.h
index 8d5b446..f8db9d0 100644
--- a/arch/arm/include/asm/suspend.h
+++ b/arch/arm/include/asm/suspend.h
@@ -2,6 +2,7 @@
 #define __ASM_ARM_SUSPEND_H
 
 #include asm/memory.h
+#include asm/tlbflush.h
 
 extern void cpu_resume(void);
 
@@ -14,6 +15,7 @@ static inline void cpu_suspend(unsigned long arg, void 
(*fn)(unsigned long))
extern void __cpu_suspend(int, long, unsigned long,
  void (*)(unsigned long));
__cpu_suspend(0, PHYS_OFFSET - PAGE_OFFSET, arg, fn);
+   flush_tlb_all();
 }
 
 #endif
-- 
1.7.4.4

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Re: [PATCH 2/6] serial: samsung: Add device tree support for s5pv210 uart driver

2011-06-23 Thread Grant Likely
On Wed, Jun 22, 2011 at 10:22 AM, Thomas Abraham
thomas.abra...@linaro.org wrote:

 I have added the functions as you have suggested and the diff is
 listed below. Could you please review the diff and suggest any changes
 required.

Thanks Thomas.  Comments below...

  drivers/of/base.c  |  129 
 
  include/linux/of.h |   10 
  2 files changed, 139 insertions(+), 0 deletions(-)

 diff --git a/drivers/of/base.c b/drivers/of/base.c
 index 632ebae..73f0144 100644
 --- a/drivers/of/base.c
 +++ b/drivers/of/base.c
 @@ -596,6 +596,135 @@ struct device_node
 *of_find_node_by_phandle(phandle handle)
  EXPORT_SYMBOL(of_find_node_by_phandle);

  /**
 + * of_read_property_u32 - Reads a indexed 32-bit property value
 + * @prop:      property to read from.
 + * @offset:    cell number to read.
 + * value:      returned cell value
 + *
 + * Returns a indexed 32-bit value of a property cell, -EINVAL in case the 
 cell
 + * does not exist
 + */
 +int of_read_property_u32(struct property *prop, u32 offset, u32 *value)
 +{
 +       if (!prop || !prop-value)
 +               return -EINVAL;

Hmmm, it would probably be a good idea to differentiate return code
depending on whether or not the property was found vs. the property
data not large enough.

 +       if ((offset + 1) * 4  prop-length)
 +               return -EINVAL;
 +
 +       *value = of_read_ulong(prop-value + (offset * 4), 1);
 +       return 0;

Despite the fact that this is exactly what I asked you to write, this
ends up being rather ugly.  (I originally put in the '*4' to match the
behaviour of the existing of_read_number(), but that was a mistake.
tglx also pointed it out).  How about this instead:

int of_read_property_u32(struct property *prop, unsigned int offset,
u32 *out_value)
{
if (!prop || !out_value)
return -EINVAL;
if (!prop-value)
return -ENODATA;
if (offset + sizeof(*out_value)  prop-length)
return -EOVERFLOW;
*out_value = be32_to_cpup(prop-data + offset);
return 0;
}
int of_read_property_u64(struct property *prop, unsigned int offset,
u64 *out_value)
{
if (!prop || !out_value)
return -EINVAL;
if (!prop-value)
return -ENODATA;
if (offset + sizeof(*out_value)  prop-length)
return -EOVERFLOW;
*out_value = be32_to_cpup(prop-value + offset);
*out_value = (*out_value  32) | be32_to_cpup(prop-value +
offset + sizeof(u32));
return 0;
}


 +}
 +EXPORT_SYMBOL(of_read_property_u32);

EXPORT_SYMBOL_GPL()

 +
 +/**
 + * of_getprop_u32 - Find a property in a device node and read a 32-bit value
 + * @np:                device node from which the property value is to be 
 read.
 + * @propname   name of the property to be searched.
 + * @offset:    cell number to read.
 + * @value:     returned value of the cell
 + *
 + * Search for a property in a device node and read a indexed 32-bit value of 
 a
 + * property cell. Returns the 32-bit cell value, -EINVAL in case the
 property or
 + * the indexed cell does not exist.
 + */
 +int
 +of_getprop_u32(struct device_node *np, char *propname, int offset, u32 
 *value)
 +{
 +       return of_read_property_u32(of_find_property(np, propname, NULL),
 +                                       offset, value);
 +}
 +EXPORT_SYMBOL(of_getprop_u32);
 +
 +/**
 + * of_read_property_u64 - Reads a indexed 64-bit property value
 + * @prop:      property to read from.
 + * @offset:    cell number to read (each cell is 64-bits).
 + * @value:     returned cell value
 + *
 + * Returns a indexed 64-bit value of a property cell, -EINVAL in case the 
 cell
 + * does not exist
 + */
 +int of_read_property_u64(struct property *prop, int offset, u64 *value)
 +{
 +       if (!prop || !prop-value)
 +               return -EINVAL;
 +       if ((offset + 1) * 8  prop-length)
 +               return -EINVAL;
 +
 +       *value = of_read_number(prop-value + (offset * 8), 2);
 +       return 0;
 +}
 +EXPORT_SYMBOL(of_read_property_u64);
 +
 +/**
 + * of_getprop_u64 - Find a property in a device node and read a 64-bit value
 + * @np:                device node from which the property value is to be 
 read.
 + * @propname   name of the property to be searched.
 + * @offset:    cell number to read (each cell is 64-bits).
 + * @value:     returned value of the cell
 + *
 + * Search for a property in a device node and read a indexed 64-bit value of 
 a
 + * property cell. Returns the 64-bit cell value, -EINVAL in case the
 property or
 + * the indexed cell does not exist.
 + */
 +int
 +of_getprop_u64(struct device_node *np, char *propname, int offset, u64 
 *value)
 +{
 +       return of_read_property_u64(of_find_property(np, propname, NULL),
 +                                       offset, value);
 +}
 +EXPORT_SYMBOL(of_getprop_u64);
 +
 +/**
 + * of_read_property_string - Returns a pointer to a indexed null terminated
 

Re: [PATCH 25/25] ARM: pm: omap34xx: convert to generic suspend/resume support

2011-06-23 Thread Kevin Hilman
Kevin Hilman khil...@ti.com writes:

 Hi Russell,

 Russell King - ARM Linux li...@arm.linux.org.uk writes:

 Convert sa11x0 to use the generic CPU suspend/resume support, rather
 than implementing its own version.  Tested on 3430 LDP.

 Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk

 I tested this on 3430/n900 and 3530/Overo and it worked fine for
 retention, but not for off.

 Testing with off-mode, I found the MULTI_CPU path to be broken in
 cpu_suspend (jumping to zero.)  Rebuilding for only OMAP3, it worked
 fine for full-chip retention in suspend and idle as well as full-chip
 off in suspend and idle.

 I'm digging into the MULTI_CPU path now.

Here's a dump of the printk __log_buf using Lauterbach:

Looks like cpu_suspend is jumping to 0x0, which triggers the fault
handler which then triggers the BUG in might_sleep().

Now looking into why cpu_suspend is jumping to 0x0...

Kevin


5[0.00] Linux version 
3.0.0-rc4-pm+initramfs+debug+cmdline-14038-g9ec291c (khilman@paris) (gcc 
version 4.5.2 (Ubuntu/Linaro 4.5.2-8ubuntu3) ) #19 SMP Thu Jun 23 13:21:58 PDT 
2011
4[0.00] CPU: ARMv7 Processor [411fc083] revision 3 (ARMv7), 
cr=10c53c7f
4[0.00] CPU: VIPT nonaliasing data cache, VIPT nonaliasing 
instruction cache
4[0.00] Machine: Nokia RX-51 board
4[0.00] Ignoring unrecognised tag 0x414f4d50
6[0.00] bootconsole [earlycon0] enabled
6[0.00] Reserving 16777216 bytes SDRAM for VRAM
4[0.00] Memory policy: ECC disabled, Data cache writeback
6[0.00] OMAP3430/3530 ES3.1 (l2cache iva sgx neon isp )
6[0.00] SRAM: Mapped pa 0x40208000 to va 0xfe408000 size: 0x7000
7[0.00] On node 0 totalpages: 61440
7[0.00] free_area_init_node: node 0, pgdat c086de40, node_mem_map 
c0dc5000
7[0.00]   Normal zone: 512 pages used for memmap
7[0.00]   Normal zone: 0 pages reserved
7[0.00]   Normal zone: 60928 pages, LIFO batch:15
6[0.00] Clocking rate (Crystal/Core/MPU): 19.2/332/500 MHz
6[0.00] Reprogramming SDRC clock to 33200 Hz
6[0.00] PERCPU: Embedded 7 pages/cpu @c0fca000 s7264 r8192 d13216 
u32768
7[0.00] pcpu-alloc: s7264 r8192 d13216 u32768 alloc=8*4096
7[0.00] pcpu-alloc: [0] 0 
4[0.00] Built 1 zonelists in Zone order, mobility grouping on.  Total 
pages: 60928
5[0.00] Kernel command line: console=ttyO2,115200n8 debug earlyprintk
6[0.00] PID hash table entries: 1024 (order: 0, 4096 bytes)
6[0.00] Dentry cache hash table entries: 32768 (order: 5, 131072 
bytes)
6[0.00] Inode-cache hash table entries: 16384 (order: 4, 65536 bytes)
6[0.00] Memory: 240MB = 240MB total
5[0.00] Memory: 229364k/229364k available, 32780k reserved, 0K highmem
5[0.00] Virtual kernel memory layout:
5[0.00] vector  : 0x - 0x1000   (   4 kB)
5[0.00] fixmap  : 0xfff0 - 0xfffe   ( 896 kB)
5[0.00] DMA : 0xffc0 - 0xffe0   (   2 MB)
5[0.00] vmalloc : 0xd080 - 0xf800   ( 632 MB)
5[0.00] lowmem  : 0xc000 - 0xd000   ( 256 MB)
5[0.00] modules : 0xbf00 - 0xc000   (  16 MB)
5[0.00]   .init : 0xc0008000 - 0xc024f000   (2332 kB)
5[0.00]   .text : 0xc024f000 - 0xc07edf0c   (5756 kB)
5[0.00]   .data : 0xc07ee000 - 0xc086f260   ( 517 kB)
5[0.00].bss : 0xc086f284 - 0xc0dc4328   (5461 kB)
6[0.00] Hierarchical RCU implementation.
6[0.00] NR_IRQS:410
6[0.00] IRQ: Found an INTC at 0xfa20 (revision 4.0) with 96 
interrupts
6[0.00] Total of 96 interrupts on 1 active controller
6[0.00] OMAP clockevent source: GPTIMER1 at 32768 Hz
6[0.00] sched_clock: 32 bits at 32kHz, resolution 30517ns, wraps 
every 131071999ms
6[0.00] Console: colour dummy device 80x30
4[0.00] Lock dependency validator: Copyright (c) 2006 Red Hat, Inc., 
Ingo Molnar
4[0.00] ... MAX_LOCKDEP_SUBCLASSES:  8
4[0.00] ... MAX_LOCK_DEPTH:  48
4[0.00] ... MAX_LOCKDEP_KEYS:8191
4[0.00] ... CLASSHASH_SIZE:  4096
4[0.00] ... MAX_LOCKDEP_ENTRIES: 16384
4[0.00] ... MAX_LOCKDEP_CHAINS:  32768
4[0.00] ... CHAINHASH_SIZE:  16384
4[0.00]  memory used by lock dependency info: 3695 kB
4[0.00]  per task-struct memory footprint: 1152 bytes
6[0.057434] Calibrating delay loop... 497.82 BogoMIPS (lpj=1941504)
6[0.096252] pid_max: default: 32768 minimum: 301
6[0.102050] Security Framework initialized
6[0.106811] Mount-cache hash table entries: 512
6[0.117370] CPU: Testing write buffer coherency: ok
6[0.126129] Brought up 1 CPUs
6[0.129302] SMP: Total of 1 processors activated (497.82 BogoMIPS).
4[0.154693] omap_hwmod: _populate_mpu_rt_base found no _mpu_rt_va for 
l4_core
4[0.162261] omap_hwmod: 

Re: [PATCH 24/25] ARM: pm: hide 1st and 2nd arguments to cpu_suspend from platform code

2011-06-23 Thread Kevin Hilman
Russell King - ARM Linux li...@arm.linux.org.uk writes:

 The first and second arguments shouldn't concern platform code, so
 hide them from each platforms caller.

 Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
 ---
  arch/arm/include/asm/suspend.h |   19 +++
  arch/arm/include/asm/system.h  |2 --
  arch/arm/kernel/sleep.S|2 +-
  arch/arm/mach-omap2/pm34xx.c   |5 +++--
  arch/arm/mach-pxa/palmz72.c|1 +
  arch/arm/mach-pxa/pxa25x.c |4 ++--
  arch/arm/mach-pxa/pxa27x.c |4 ++--
  arch/arm/mach-pxa/pxa3xx.c |3 ++-
  arch/arm/mach-pxa/zeus.c   |4 ++--
  arch/arm/mach-sa1100/pm.c  |3 ++-
  arch/arm/plat-samsung/pm.c |3 ++-
  11 files changed, 36 insertions(+), 14 deletions(-)
  create mode 100644 arch/arm/include/asm/suspend.h

 diff --git a/arch/arm/include/asm/suspend.h b/arch/arm/include/asm/suspend.h
 new file mode 100644
 index 000..8d5b446
 --- /dev/null
 +++ b/arch/arm/include/asm/suspend.h
 @@ -0,0 +1,19 @@
 +#ifndef __ASM_ARM_SUSPEND_H
 +#define __ASM_ARM_SUSPEND_H
 +
 +#include asm/memory.h
 +
 +extern void cpu_resume(void);
 +
 +/*
 + * Hide the first two arguments to __cpu_suspend - these are an 
 implementation
 + * detail which platform code shouldn't have to know about.
 + */
 +static inline void cpu_suspend(unsigned long arg, void (*fn)(unsigned long))
 +{
 + extern void __cpu_suspend(int, long, unsigned long,
 +   void (*)(unsigned long));
 + __cpu_suspend(0, PHYS_OFFSET - PAGE_OFFSET, arg, fn);
 +}
 +
 +#endif
 diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
 index 50be605..832888d 100644
 --- a/arch/arm/include/asm/system.h
 +++ b/arch/arm/include/asm/system.h
 @@ -106,8 +106,6 @@ extern void __show_regs(struct pt_regs *);
  
  extern int cpu_architecture(void);
  extern void cpu_init(void);
 -extern void cpu_suspend(int, long, unsigned long, void (*)(unsigned long));
 -extern void cpu_resume(void);
  
  void arm_machine_restart(char mode, const char *cmd);
  extern void (*arm_pm_restart)(char str, const char *cmd);
 diff --git a/arch/arm/kernel/sleep.S b/arch/arm/kernel/sleep.S
 index 5392274..0bdcc72 100644
 --- a/arch/arm/kernel/sleep.S
 +++ b/arch/arm/kernel/sleep.S
 @@ -14,7 +14,7 @@
   *  r3 = suspend function
   * Note: does not return until system resumes
   */
 -ENTRY(cpu_suspend)
 +ENTRY(__cpu_suspend)

You missed also changing the ENDPROC here, so it doesn't compile
without:

diff --git a/arch/arm/kernel/sleep.S b/arch/arm/kernel/sleep.S
index 0bdcc72..c156d0e 100644
--- a/arch/arm/kernel/sleep.S
+++ b/arch/arm/kernel/sleep.S
@@ -56,7 +56,7 @@ ENTRY(__cpu_suspend)
bl  __cpuc_flush_kern_all
 #endif
ldmfd   sp!, {r0, pc}   @ call suspend fn
-ENDPROC(cpu_suspend)
+ENDPROC(__cpu_suspend)
.ltorg
 
 /*


Kevin
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Re: [PATCH 25/25] ARM: pm: omap34xx: convert to generic suspend/resume support

2011-06-23 Thread Kevin Hilman
Kevin Hilman khil...@ti.com writes:

 Hi Russell,

 Russell King - ARM Linux li...@arm.linux.org.uk writes:

 Convert sa11x0 to use the generic CPU suspend/resume support, rather
 than implementing its own version.  Tested on 3430 LDP.

 Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk

 I tested this on 3430/n900 and 3530/Overo and it worked fine for
 retention, but not for off.

 Testing with off-mode, I found the MULTI_CPU path to be broken in
 cpu_suspend (jumping to zero.)  

Problem found, and patch sent to list:

[PATCH] ARM: pm: add v7 suspend/resume functions to v7_processor functions

With that patch, off-mode in both suspend and idle is working on
3430/n900 and 3530/Overo when built in MULTI_CPU mode also.

Kevin
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Re: [PATCH 00/25] Re-jig cpu_suspend for a saner calling convention

2011-06-23 Thread Kevin Hilman
Russell King - ARM Linux li...@arm.linux.org.uk writes:

[...]


 Tested on Assabet (SA1100) and 3430LDP only.


Tested-by: Kevin Hilman khil...@ti.com

Tested on OMAP: 3430/n900, 3530/Overo and 3630/Zoom3.

In addition to this series, I needed that ENDPROC fix as well as the
v7_processor_functions patch just sent.

With those, I was able to hit full-chip retention and off-mode in both
suspend and idle paths on the above platforms.

Kevin
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