Re: [PATCH v2 2/3] ARM: EXYNOS4: Add sclk_spdif clocks.
Hi Everyone,
Any suggestions regarding this below problem.
On 18 July 2011 16:55, Naveen Krishna Ch wrote:
> Hi Every one,
>
> On 18 July 2011 11:03, Kukjin Kim wrote:
>> Naveen Krishna Chatradhi wrote:
>>>
>>> Add the sclk_spdif clock is of type 'struct clksrc_clk' clock.
>>> Also, add clk_spdifextclk clocks of type 'struct clk' clock.
>>>
>>> Signed-off-by: Naveen Krishna Chatradhi
>>> ---
>>> arch/arm/mach-exynos4/clock.c | 35
>>> +++
>>> 1 files changed, 35 insertions(+), 0 deletions(-)
>>>
>>> diff --git a/arch/arm/mach-exynos4/clock.c b/arch/arm/mach-exynos4/clock.c
>>> index 937335a..feeb27e 100644
>>> --- a/arch/arm/mach-exynos4/clock.c
>>> +++ b/arch/arm/mach-exynos4/clock.c
>>> @@ -64,6 +64,11 @@ static struct clk clk_audiocdclk2 = {
>>> .name = "audiocdclk",
>>> };
>>>
>>> +static struct clk clk_spdifextclk = {
>>> + .name = "spdif_extclk",
>>> + .id = -1,
>>> +};
>>> +
>>> static int exynos4_clksrc_mask_top_ctrl(struct clk *clk, int enable)
>>> {
>>> return s5p_gatectrl(S5P_CLKSRC_MASK_TOP, clk, enable);
>>> @@ -550,6 +555,11 @@ static struct clk init_clocks_off[] = {
>>> .enable = exynos4_clk_ip_peril_ctrl,
>>> .ctrlbit = (1 << 21),
>>> }, {
>>> + .name = "spdif",
>>> + .id = -1,
>>> + .enable = exynos4_clk_ip_peril_ctrl,
>>> + .ctrlbit = (1 << 26),
>>> + }, {
>>
>> Need to re-work based on clkdev :)
> Sure, will rebase on updated for-next branch.
>>
>>> .name = "ac97",
>>> .id = -1,
>>> .enable = exynos4_clk_ip_peril_ctrl,
>>> @@ -801,6 +811,30 @@ static struct clk init_clocks[] = {
>>> }
>>> };
>>>
>>> +static struct clk *clkset_sclk_spdif_list[] = {
>>> + [0] = &clk_sclk_audio0.clk,
>>> + [1] = &clk_sclk_audio1.clk,
>>> + [2] = &clk_sclk_audio2.clk,
>>> + [3] = &clk_spdifextclk,
>>> +};
>>> +
>>> +static struct clksrc_sources clkset_sclk_spdif = {
>>> + .sources = clkset_sclk_spdif_list,
>>> + .nr_sources = ARRAY_SIZE(clkset_sclk_spdif_list),
>>> +};
>>> +
>>> +static struct clksrc_clk clk_sclk_spdif = {
>>> + .clk = {
>>> + .name = "sclk_spdif",
>>> + .id = -1,
>>> + .enable = exynos4_clksrc_mask_peril1_ctrl,
>>> + .ctrlbit = (1 << 8),
>>> + .ops = &s5p_sclk_spdif_ops,
>>> + },
>>> + .sources = &clkset_sclk_spdif,
>>> + .reg_src = { .reg = S5P_CLKSRC_PERIL1, .shift = 8, .size = 2
>> },
>>> +};
>>
>> Hmm...is it possible to move this into struct clksrc_clk clksrcs[] ?
> When i try to move it under struct clksrc_clk clksrcs[], I encountered
> a problem with .ops field
> The sample code as follows (I'm not sure if i can copy paste the code for RFC)
>
> +static struct clk *clkset_sclk_spdif_list[] = {
> + [0] = &clk_sclk_audio0.clk,
> + [1] = &clk_sclk_audio1.clk,
> + [2] = &clk_sclk_audio2.clk,
> + [3] = &clk_spdifextclk,
> +};
> +
> +static struct clksrc_sources clkset_sclk_spdif = {
> + .sources = clkset_sclk_spdif_list,
> + .nr_sources = ARRAY_SIZE(clkset_sclk_spdif_list),
> +};
> +
> static struct clk *clkset_group_list[] = {
> [0] = &clk_ext_xtal_mux,
> [1] = &clk_xusbxti,
> @@ -1175,6 +1197,17 @@ static struct clksrc_clk clksrcs[] = {
> .parent = &clk_sclk_audio2.clk,
> },
> .reg_div = { .reg = S5P_CLKDIV_PERIL4, .shift = 20, .size = 8
> },
> + }, {
> + .clk = {
> + .name = "sclk_spdif",
> + .id = 0,
> + .parent = &clk_sclk_audio0.clk,
> + // .ops = &s5p_sclk_spdif_ops,
> "When i keep this .ops, The system hangs during boot up.
> If i don't define the .ops, The WARN_ON would print a stack of call
> trace for undefined set_rate function"
> I did not find any set_ops kind off utility functions.
>
> Kindly, point me towards any better way of doing the same.
>
> + .enable = exynos4_clksrc_mask_peril1_ctrl,
> + .ctrlbit = (1 << 8),
> + },
> + .sources = &clkset_sclk_spdif,
> + .reg_src = { .reg = S5P_CLKSRC_PERIL1, .shift = 8, .size = 2
> },
> },
> };
>
>>
>>> +
>>> static struct clk *clkset_group_list[] = {
>>> [0] = &clk_ext_xtal_mux,
>>> [1] = &clk_xusbxti,
>>> @@ -1206,6 +1240,7 @@ static struct clksrc_clk *sysclks[] = {
>>> &clk_sclk_audio0,
>>> &clk_sclk_audio1,
>>> &clk_sclk_audio2,
>>> + &clk_sclk_spdif,
>>> };
>>>
>>> static int xtal_rate;
>>> --
>>> 1.7.2.3
>>
>>
>> Thanks.
>>
>> Best reg
[PATCH V4 00/13] To use DMA generic APIs for Samsung DMA
This patchset adds support DMA generic APIs for Samsung DMA. V4 doesn't has whole patch series and only has the patches differed from V3. Changes from V3: - Divided 03-patch into two patchs. - First is 03-1-patch for DMA_SLAVE_CONFIG command. - Another is 03-2-patch for DMA_CYCLIC capability. - Code clean-up - Remove unnecessary variable referance. - Remove redunancy code [PATCH V4 01/13] DMA: PL330: Add support runtime PM for PL330 DMAC [PATCH V4 03-1/13] DMA: PL330: Support DMA_SLAVE_CONFIG command [PATCH V4 03-2/13] DMA: PL330: Add DMA_CYCLIC capability [PATCH V4 05/13] ARM: SAMSUNG: Add common DMA operations -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH V4 01/13] DMA: PL330: Add support runtime PM for PL330 DMAC
Signed-off-by: Boojin Kim
Cc: Vinod Koul
Cc: Dan Williams
Signed-off-by: Kukjin Kim
---
drivers/dma/pl330.c | 75 +-
1 files changed, 73 insertions(+), 2 deletions(-)
diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c
index 6abe1ec..b7ecf47 100644
--- a/drivers/dma/pl330.c
+++ b/drivers/dma/pl330.c
@@ -17,6 +17,7 @@
#include
#include
#include
+#include
#define NR_DEFAULT_DESC16
@@ -83,6 +84,8 @@ struct dma_pl330_dmac {
/* Peripheral channels connected to this DMAC */
struct dma_pl330_chan peripherals[0]; /* keep at end */
+
+ struct clk *clk;
};
struct dma_pl330_desc {
@@ -696,6 +699,30 @@ pl330_probe(struct amba_device *adev, const struct amba_id
*id)
goto probe_err1;
}
+ pdmac->clk = clk_get(&adev->dev, "dma");
+ if (IS_ERR(pdmac->clk)) {
+ dev_err(&adev->dev, "Cannot get operation clock.\n");
+ ret = -EINVAL;
+ goto probe_err1;
+ }
+
+ amba_set_drvdata(adev, pdmac);
+
+#ifdef CONFIG_PM_RUNTIME
+ /* to use the runtime PM helper functions */
+ pm_runtime_enable(&adev->dev);
+
+ /* enable the power domain */
+ if (pm_runtime_get_sync(&adev->dev)) {
+ dev_err(&adev->dev, "failed to get runtime pm\n");
+ ret = -ENODEV;
+ goto probe_err1;
+ }
+#else
+ /* enable dma clk */
+ clk_enable(pdmac->clk);
+#endif
+
irq = adev->irq[0];
ret = request_irq(irq, pl330_irq_handler, 0,
dev_name(&adev->dev), pi);
@@ -763,8 +790,6 @@ pl330_probe(struct amba_device *adev, const struct amba_id
*id)
goto probe_err4;
}
- amba_set_drvdata(adev, pdmac);
-
dev_info(&adev->dev,
"Loaded driver for PL330 DMAC-%d\n", adev->periphid);
dev_info(&adev->dev,
@@ -825,6 +850,13 @@ static int __devexit pl330_remove(struct amba_device *adev)
res = &adev->res;
release_mem_region(res->start, resource_size(res));
+#ifdef CONFIG_PM_RUNTIME
+ pm_runtime_put(&adev->dev);
+ pm_runtime_disable(&adev->dev);
+#else
+ clk_disable(pdmac->clk);
+#endif
+
kfree(pdmac);
return 0;
@@ -838,10 +870,49 @@ static struct amba_id pl330_ids[] = {
{ 0, 0 },
};
+#ifdef CONFIG_PM_RUNTIME
+static int pl330_runtime_suspend(struct device *dev)
+{
+ struct dma_pl330_dmac *pdmac = dev_get_drvdata(dev);
+
+ if (!pdmac) {
+ dev_err(dev, "failed to get dmac\n");
+ return -ENODEV;
+ }
+
+ clk_disable(pdmac->clk);
+
+ return 0;
+}
+
+static int pl330_runtime_resume(struct device *dev)
+{
+ struct dma_pl330_dmac *pdmac = dev_get_drvdata(dev);
+
+ if (!pdmac) {
+ dev_err(dev, "failed to get dmac\n");
+ return -ENODEV;
+ }
+
+ clk_enable(pdmac->clk);
+
+ return 0;
+}
+#else
+#define pl330_runtime_suspend NULL
+#define pl330_runtime_resume NULL
+#endif /* CONFIG_PM_RUNTIME */
+
+static const struct dev_pm_ops pl330_pm_ops = {
+ .runtime_suspend = pl330_runtime_suspend,
+ .runtime_resume = pl330_runtime_resume,
+};
+
static struct amba_driver pl330_driver = {
.drv = {
.owner = THIS_MODULE,
.name = "dma-pl330",
+ .pm = &pl330_pm_ops,
},
.id_table = pl330_ids,
.probe = pl330_probe,
--
1.7.1
--
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[PATCH V4 05/13] ARM: SAMSUNG: Add common DMA operations
This patch adds common DMA operations which are used for Samsung DMA
drivers. Currently there are two types of DMA driver for Samsung SoCs.
The one is S3C-DMA for S3C SoCs and the other is PL330-DMA for S5P SoCs.
This patch provides funcion pointers for common DMA operations to DMA
client driver like SPI and Audio. It makes DMA client drivers support
multi-platform.
In addition, this common DMA operations implement the shared actions
that are needed for DMA client driver. For example shared actions are
filter() function for dma_request_channel() and parameter passing for
device_prep_slave_sg().
Signed-off-by: Boojin Kim
Signed-off-by: Kukjin Kim
---
arch/arm/mach-s3c2410/include/mach/dma.h |8 ++-
arch/arm/mach-s3c64xx/include/mach/dma.h |4 +
arch/arm/plat-samsung/Makefile |6 +-
arch/arm/plat-samsung/dma-ops.c| 133
arch/arm/plat-samsung/include/plat/dma-ops.h | 64 +++
arch/arm/plat-samsung/include/plat/dma-pl330.h |4 +
arch/arm/plat-samsung/include/plat/dma.h |1 +
arch/arm/plat-samsung/s3c-dma-ops.c| 133
8 files changed, 350 insertions(+), 3 deletions(-)
create mode 100644 arch/arm/plat-samsung/dma-ops.c
create mode 100644 arch/arm/plat-samsung/include/plat/dma-ops.h
create mode 100644 arch/arm/plat-samsung/s3c-dma-ops.c
diff --git a/arch/arm/mach-s3c2410/include/mach/dma.h
b/arch/arm/mach-s3c2410/include/mach/dma.h
index b2b2a5b..e61a91f 100644
--- a/arch/arm/mach-s3c2410/include/mach/dma.h
+++ b/arch/arm/mach-s3c2410/include/mach/dma.h
@@ -13,7 +13,6 @@
#ifndef __ASM_ARCH_DMA_H
#define __ASM_ARCH_DMA_H __FILE__
-#include
#include
#define MAX_DMA_TRANSFER_SIZE 0x10 /* Data Unit is half word */
@@ -51,6 +50,13 @@ enum dma_ch {
DMACH_MAX, /* the end entry */
};
+static inline bool samsung_dma_is_dmadev(void)
+{
+ return false;
+}
+
+#include
+
#define DMACH_LOW_LEVEL(1<<28) /* use this to specifiy hardware ch no
*/
/* we have 4 dma channels */
diff --git a/arch/arm/mach-s3c64xx/include/mach/dma.h
b/arch/arm/mach-s3c64xx/include/mach/dma.h
index 0a5d926..49c3a53 100644
--- a/arch/arm/mach-s3c64xx/include/mach/dma.h
+++ b/arch/arm/mach-s3c64xx/include/mach/dma.h
@@ -63,6 +63,10 @@ static __inline__ bool s3c_dma_has_circular(void)
return true;
}
+static inline bool samsung_dma_is_dmadev(void)
+{
+ return false;
+}
#define S3C2410_DMAF_CIRCULAR (1 << 0)
#include
diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile
index 53eb15b..9ecf2aa 100644
--- a/arch/arm/plat-samsung/Makefile
+++ b/arch/arm/plat-samsung/Makefile
@@ -62,9 +62,11 @@ obj-$(CONFIG_SAMSUNG_DEV_PWM)+= dev-pwm.o
# DMA support
-obj-$(CONFIG_S3C_DMA) += dma.o
+obj-$(CONFIG_S3C_DMA) += dma.o s3c-dma-ops.o
-obj-$(CONFIG_S3C_PL330_DMA)+= s3c-pl330.o
+obj-$(CONFIG_DMADEV_PL330) += dma-ops.o
+
+obj-$(CONFIG_S3C_PL330_DMA)+= s3c-pl330.o s3c-dma-ops.o
# PM support
diff --git a/arch/arm/plat-samsung/dma-ops.c b/arch/arm/plat-samsung/dma-ops.c
new file mode 100644
index 000..9053433
--- /dev/null
+++ b/arch/arm/plat-samsung/dma-ops.c
@@ -0,0 +1,133 @@
+/* linux/arch/arm/plat-samsung/dma-ops.c
+ *
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * Samsung DMA Operations
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include
+#include
+#include
+
+#include
+
+static bool pl330_filter(struct dma_chan *chan, void *param)
+{
+ struct dma_pl330_peri *peri = (struct dma_pl330_peri *)chan->private;
+ unsigned dma_ch = (unsigned)param;
+
+ if (peri->peri_id != dma_ch)
+ return false;
+
+ return true;
+}
+
+static unsigned samsung_dmadev_request(enum dma_ch dma_ch,
+ struct samsung_dma_info *info)
+{
+ struct dma_chan *chan;
+ dma_cap_mask_t mask;
+ struct dma_slave_config slave_config;
+
+ dma_cap_zero(mask);
+ dma_cap_set(info->cap, mask);
+
+ chan = dma_request_channel(mask, pl330_filter, (void *)dma_ch);
+
+ if (info->direction == DMA_FROM_DEVICE) {
+ memset(&slave_config, 0, sizeof(struct dma_slave_config));
+ slave_config.direction = info->direction;
+ slave_config.src_addr = info->fifo;
+ slave_config.src_addr_width = info->width;
+ dmaengine_slave_config(chan, &slave_config);
+ } else if (info->direction == DMA_TO_DEVICE) {
+ memset(&slave_config, 0, sizeof(struct dma_slave_config));
+ slave_config.direction = info->direction;
+ slave_config.dst_addr = info->fifo;
+ slave_config.dst_addr_wid
[PATCH V4 03-2/13] DMA: PL330: Add DMA_CYCLIC capability
This patch adds DMA_CYCLIC capability that is used for audio driver.
DMA driver activated with it reuses the dma requests that were submitted
through tx_submit().
Signed-off-by: Boojin Kim
Signed-off-by: Kukjin Kim
---
drivers/dma/pl330.c | 111 +++
1 files changed, 111 insertions(+), 0 deletions(-)
diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c
index 880f010..121c75a 100644
--- a/drivers/dma/pl330.c
+++ b/drivers/dma/pl330.c
@@ -69,6 +69,11 @@ struct dma_pl330_chan {
* NULL if the channel is available to be acquired.
*/
void *pl330_chid;
+
+ /* taks for cyclic capability */
+ struct tasklet_struct *cyclic_task;
+
+ bool cyclic;
};
struct dma_pl330_dmac {
@@ -184,6 +189,41 @@ static inline void fill_queue(struct dma_pl330_chan *pch)
}
}
+static void pl330_tasklet_cyclic(unsigned long data)
+{
+ struct dma_pl330_chan *pch = (struct dma_pl330_chan *)data;
+ struct dma_pl330_desc *desc, *_dt;
+ unsigned long flags;
+ LIST_HEAD(list);
+
+ spin_lock_irqsave(&pch->lock, flags);
+
+ /* Pick up ripe tomatoes */
+ list_for_each_entry_safe(desc, _dt, &pch->work_list, node)
+ if (desc->status == DONE) {
+ dma_async_tx_callback callback;
+
+ list_move_tail(&desc->node, &pch->work_list);
+ pch->completed = desc->txd.cookie;
+
+ desc->status = PREP;
+
+ /* Try to submit a req imm.
+ next to the last completed cookie */
+ fill_queue(pch);
+
+ /* Make sure the PL330 Channel thread is active */
+ pl330_chan_ctrl(pch->pl330_chid, PL330_OP_START);
+
+ callback = desc->txd.callback;
+ if (callback)
+ callback(desc->txd.callback_param);
+
+ }
+
+ spin_unlock_irqrestore(&pch->lock, flags);
+}
+
static void pl330_tasklet(unsigned long data)
{
struct dma_pl330_chan *pch = (struct dma_pl330_chan *)data;
@@ -227,6 +267,9 @@ static void dma_pl330_rqcb(void *token, enum pl330_op_err
err)
spin_unlock_irqrestore(&pch->lock, flags);
+ if (pch->cyclic_task)
+ tasklet_schedule(pch->cyclic_task);
+ else
tasklet_schedule(&pch->task);
}
@@ -316,6 +359,15 @@ static void pl330_free_chan_resources(struct dma_chan
*chan)
pl330_release_channel(pch->pl330_chid);
pch->pl330_chid = NULL;
+ if (pch->cyclic) {
+ pch->cyclic = false;
+ list_splice_tail_init(&pch->work_list, &pch->dmac->desc_pool);
+ if (pch->cyclic_task) {
+ tasklet_kill(pch->cyclic_task);
+ pch->cyclic_task = NULL;
+ }
+ }
+
spin_unlock_irqrestore(&pch->lock, flags);
}
@@ -547,6 +599,63 @@ static inline int get_burst_len(struct dma_pl330_desc
*desc, size_t len)
return burst_len;
}
+static struct dma_async_tx_descriptor *pl330_prep_dma_cyclic(
+ struct dma_chan *chan, dma_addr_t dma_addr, size_t len,
+ size_t period_len, enum dma_data_direction direction)
+{
+ struct dma_pl330_desc *desc;
+ struct dma_pl330_chan *pch = to_pchan(chan);
+ struct dma_pl330_peri *peri = chan->private;
+ dma_addr_t dst;
+ dma_addr_t src;
+
+ pch = to_pchan(chan);
+ if (!pch)
+ return NULL;
+
+ desc = pl330_get_desc(pch);
+ if (!desc) {
+ dev_err(pch->dmac->pif.dev, "%s:%d Unable to fetch desc\n",
+ __func__, __LINE__);
+ return NULL;
+ }
+
+ switch (direction) {
+ case DMA_TO_DEVICE:
+ desc->rqcfg.src_inc = 1;
+ desc->rqcfg.dst_inc = 0;
+ src = dma_addr;
+ dst = peri->fifo_addr;
+ break;
+ case DMA_FROM_DEVICE:
+ desc->rqcfg.src_inc = 0;
+ desc->rqcfg.dst_inc = 1;
+ src = peri->fifo_addr;
+ dst = dma_addr;
+ break;
+ default:
+ dev_err(pch->dmac->pif.dev, "%s:%d Invalid dma direction\n",
+ __func__, __LINE__);
+ return NULL;
+ }
+
+ desc->rqcfg.brst_size = peri->burst_sz;
+ desc->rqcfg.brst_len = 1;
+
+ if (!pch->cyclic_task) {
+ pch->cyclic_task =
+ kmalloc(sizeof(struct tasklet_struct), GFP_KERNEL);
+ tasklet_init(pch->cyclic_task,
+ pl330_tasklet_cyclic, (unsigned int)pch);
+ }
+
+ pch->cyclic = true;
+
+ fill_px(&desc->px, dst, src, period_len);
+
+ return &desc->txd;
+}
+
static struct dma_async_tx_descriptor *
pl330_prep_dma_memcpy(struct dma_chan *chan, dma_ad
[PATCH V4 03-1/13] DMA: PL330: Support DMA_SLAVE_CONFIG command
Signed-off-by: Boojin Kim
Signed-off-by: Kukjin Kim
---
drivers/dma/pl330.c | 53 +-
1 files changed, 39 insertions(+), 14 deletions(-)
diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c
index 586ab39..880f010 100644
--- a/drivers/dma/pl330.c
+++ b/drivers/dma/pl330.c
@@ -256,25 +256,50 @@ static int pl330_alloc_chan_resources(struct dma_chan
*chan)
static int pl330_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
unsigned long arg)
{
struct dma_pl330_chan *pch = to_pchan(chan);
- struct dma_pl330_desc *desc;
+ struct dma_pl330_desc *desc, *_dt;
unsigned long flags;
+ struct dma_pl330_dmac *pdmac = pch->dmac;
+ struct dma_slave_config *slave_config;
+ struct dma_pl330_peri *peri;
+ LIST_HEAD(list);
- /* Only supports DMA_TERMINATE_ALL */
- if (cmd != DMA_TERMINATE_ALL)
- return -ENXIO;
-
- spin_lock_irqsave(&pch->lock, flags);
-
- /* FLUSH the PL330 Channel thread */
- pl330_chan_ctrl(pch->pl330_chid, PL330_OP_FLUSH);
+ switch (cmd) {
+ case DMA_TERMINATE_ALL:
+ spin_lock_irqsave(&pch->lock, flags);
- /* Mark all desc done */
- list_for_each_entry(desc, &pch->work_list, node)
- desc->status = DONE;
+ /* FLUSH the PL330 Channel thread */
+ pl330_chan_ctrl(pch->pl330_chid, PL330_OP_FLUSH);
- spin_unlock_irqrestore(&pch->lock, flags);
+ /* Mark all desc done */
+ list_for_each_entry_safe(desc, _dt, &pch->work_list , node) {
+ desc->status = DONE;
+ pch->completed = desc->txd.cookie;
+ list_move_tail(&desc->node, &list);
+ }
- pl330_tasklet((unsigned long) pch);
+ list_splice_tail_init(&list, &pdmac->desc_pool);
+ spin_unlock_irqrestore(&pch->lock, flags);
+ break;
+ case DMA_SLAVE_CONFIG:
+ slave_config = (struct dma_slave_config *)arg;
+ peri = pch->chan.private;
+
+ if (slave_config->direction == DMA_TO_DEVICE) {
+ if (slave_config->dst_addr)
+ peri->fifo_addr = slave_config->dst_addr;
+ if (slave_config->dst_addr_width)
+ peri->burst_sz =
__ffs(slave_config->dst_addr_width);
+ } else if (slave_config->direction == DMA_FROM_DEVICE) {
+ if (slave_config->src_addr)
+ peri->fifo_addr = slave_config->src_addr;
+ if (slave_config->src_addr_width)
+ peri->burst_sz =
__ffs(slave_config->src_addr_width);
+ }
+ break;
+ default:
+ dev_err(pch->dmac->pif.dev, "Not supported command.\n");
+ return -ENXIO;
+ }
return 0;
}
--
1.7.1
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RE: [PATCH v3 0/6] Update Samsung-SoC ADC to support recent CPUs
MyungJoo Ham wrote: > > Patch 1/6: Add regulator support in ADC driver. > If CONFIG_REGULATOR is enabled, "vdd" regulator for the ADC driver > (e.g., "s5p-adc") should exist for the adc driver. > > Patch 2/6: Channel selection method for S5PC110 and Exynos4 > Recent Samsung SoCs have different register addresses for > channel selection. Use "s5p-adc" to support such chips. > > Patch 3/6: Bugfix for suspend/resume of ADC driver. > > Patch 4/6: Support ADC at Exynos4 > Define register addresses and device name for Exynos4 > > Patch 5/6: Support ADC at S5PC110/S5PV210 > Correct ADC device name for S5PC110/S5PV210 > > Patch 6/6: Header file correction (plat/devs.h) > The long-overdue bugfix for compiler errors. ADC for Exynos4 fails to > be compiled without this patch. > > > MyungJoo Ham (6): > Samsung SoC ADC: use regulator (VDD for ADC). > Samsung SoC ADC: Channel selection for S5PV210, S5PC110, and Exynos4 > Samsung SoC ADC: Revise PM for 12-bit ADC operations > ARM: EXYNOS4: Support ADC > ARM: S5PC110/S5PV210: Support ADC > Samsung SoC: header file revised to prevent declaring duplicated. > > arch/arm/mach-exynos4/Kconfig |1 + > arch/arm/mach-exynos4/cpu.c |4 + > arch/arm/mach-exynos4/include/mach/irqs.h |3 + > arch/arm/mach-exynos4/include/mach/map.h |5 ++ > arch/arm/mach-s5pv210/cpu.c |2 +- > arch/arm/plat-samsung/adc.c | 84 > +++-- > arch/arm/plat-samsung/include/plat/devs.h |5 ++ > arch/arm/plat-samsung/include/plat/regs-adc.h |1 + > 8 files changed, 84 insertions(+), 21 deletions(-) > > -- > 1.7.4.1 OK, applied but some comments. - If you want to add just 'note', please add it under '---' not '--'. - I don't think we need many developers in Cc like your Cc list. - We should fix S3C SoCs' breaks during 3.1-rc. Thanks. Best regards, Kgene. -- Kukjin Kim , Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd. -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH v3 1/6] Samsung SoC ADC: use regulator (VDD for ADC).
Mark Brown wrote: > > On Sat, Jul 16, 2011 at 02:07:13PM +0900, Kukjin Kim wrote: > > Mark Brown wrote: > > > > If there isn't a separate supply for the regulators on S3C24xx devices > > > then I guess the best option is to provide that supply as a dummy > > > regulator in the s3c24xx core code. > > > OK, but it means I can't apply this until adding a dummy regulator for > > S3C24XX? > > That could always come later as a bug fix :) The regulator API does > have a couple of methods of substituting in a dummy regulator itself, > though it does complain a bit, so it should mostly be a simple config > change to work around on affected systems. OK, I agree with your opinions. Thanks :) Best regards, Kgene. -- Kukjin Kim , Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd. -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH 0/8] ARM: SAMSUNG: Add common PWM Backlight support
Banajit Goswami wrote: > > The patches are created against "for-next" branch of Kukjin Kim's tree at: > git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git > > Patch [1/8] > -- add a common infrastructure to support PWM backlight for various > Samsung boards. > > Patch [2/8] > -- Add support for PWM backlight for SMDKV310 board. > > Patch [3/8] > -- Add support for PWM backlight for SMDKC210 board. > > Patch [4/8] > -- Add support for PWM backlight for SMDKV210 board. > > Patch [5/8] > -- Add support for PWM backlight for SMDKC100 board. > > Patch [6/8] > -- Add support for PWM backlight for SMDK6440 board. > > Patch [7/8] > -- Add support for PWM backlight for SMDK6450 board. > > Patch [8/8] > -- Add support for PWM backlight for SMDK6410 board. > > Patch 3 with PWM Backlight support for SMDKC210 is only compile tested. > >[Patch 1/8] ARM: SAMSUNG: Create a common infrastructure for PWM > backlight support >[Patch 2/8] ARM: EXYNOS4: Add PWM backlight support on Samsung > SMDKV310 board >[Patch 3/8] ARM: EXYNOS4: Add PWM backlight support on Samsung > SMDKC210 board >[Patch 4/8] ARM: S5PV210: Add PWM backlight support on Samsung > SMDKV210 board >[Patch 5/8] ARM: S5PC100: Add PWM backlight support on Samsung > SMDKC100 board >[Patch 6/8] ARM: S5P64X0: Add PWM backlight support on Samsung > SMDK6440 board >[Patch 7/8] ARM: S5P64X0: Add PWM backlight support on Samsung > SMDK6450 board >[Patch 8/8] ARM: S3C64XX: Add PWM backlight support on Samsung > SMDK6410 board > > arch/arm/mach-exynos4/Kconfig |4 + > arch/arm/mach-exynos4/mach-smdkc210.c | 16 +++ > arch/arm/mach-exynos4/mach-smdkv310.c | 16 +++ > arch/arm/mach-s3c64xx/Kconfig |1 + > arch/arm/mach-s3c64xx/mach-smdk6410.c | 15 ++- > arch/arm/mach-s5p64x0/Kconfig |2 + > arch/arm/mach-s5p64x0/mach-smdk6440.c | 54 ++--- > arch/arm/mach-s5p64x0/mach-smdk6450.c | 54 ++--- > arch/arm/mach-s5pc100/Kconfig |1 + > arch/arm/mach-s5pc100/mach-smdkc100.c | 55 ++--- > arch/arm/mach-s5pv210/Kconfig |1 + > arch/arm/mach-s5pv210/mach-smdkv210.c | 54 ++--- > arch/arm/plat-samsung/Kconfig |6 + > arch/arm/plat-samsung/Makefile |1 + > arch/arm/plat-samsung/dev-backlight.c | 151 > > arch/arm/plat-samsung/include/plat/backlight.h | 26 > 16 files changed, 291 insertions(+), 166 deletions(-) > create mode 100644 arch/arm/plat-samsung/dev-backlight.c > create mode 100644 arch/arm/plat-samsung/include/plat/backlight.h > > -- > 1.7.2.3 Looks ok to me, will apply. Thanks. Best regards, Kgene. -- Kukjin Kim , Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd. -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 0/3] ARM: SAMSUNG: Cleanup mach/regs-fb.h from various machines
This patchset cleans up mach/regs-fb.h from S3C64XX, S5PC100, and S5PV210. plat/regs-fb-v4.h is used instead to provide the same support. Display testing done on SMDK6410, SMDKC100 and SMDKV210. For other machines, its compile tested. o To Kukjin Kim, Jingoo Han, Marek Szyprowski. ARM: S5PC100: Cleanup mach/regs-fb.h from mach-s5pc100 ARM: S5PV210: Cleanup mach/regs-fb.h from mach-s5pv210 ARM: S3C64XX: Cleanup mach/regs-fb.h from mach-s3c64xx arch/arm/mach-s3c64xx/include/mach/regs-fb.h | 21 - arch/arm/mach-s3c64xx/mach-anw6410.c |2 +- arch/arm/mach-s3c64xx/mach-crag6410.c|2 +- arch/arm/mach-s3c64xx/mach-hmt.c |2 +- arch/arm/mach-s3c64xx/mach-mini6410.c|2 +- arch/arm/mach-s3c64xx/mach-ncp.c |2 +- arch/arm/mach-s3c64xx/mach-real6410.c|2 +- arch/arm/mach-s3c64xx/mach-smartq5.c |2 +- arch/arm/mach-s3c64xx/mach-smartq7.c |2 +- arch/arm/mach-s3c64xx/mach-smdk6410.c|2 +- arch/arm/mach-s3c64xx/setup-fb-24bpp.c |1 - arch/arm/mach-s5pc100/include/mach/regs-fb.h | 105 -- arch/arm/mach-s5pc100/mach-smdkc100.c|2 +- arch/arm/mach-s5pc100/setup-fb-24bpp.c |1 - arch/arm/mach-s5pv210/include/mach/regs-fb.h | 21 - arch/arm/mach-s5pv210/mach-aquila.c |2 +- arch/arm/mach-s5pv210/mach-goni.c|2 +- arch/arm/mach-s5pv210/mach-smdkv210.c|2 +- arch/arm/mach-s5pv210/setup-fb-24bpp.c |1 - 19 files changed, 13 insertions(+), 163 deletions(-) delete mode 100644 arch/arm/mach-s3c64xx/include/mach/regs-fb.h delete mode 100644 arch/arm/mach-s5pc100/include/mach/regs-fb.h delete mode 100644 arch/arm/mach-s5pv210/include/mach/regs-fb.h -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/3] ARM: S5PC100: Cleanup mach/regs-fb.h from mach-s5pc100
Use plat/regs-fb-v4.h in machine files instead of mach/regs-fb.h. Signed-off-by: Ajay Kumar --- arch/arm/mach-s5pc100/include/mach/regs-fb.h | 105 -- arch/arm/mach-s5pc100/mach-smdkc100.c|2 +- arch/arm/mach-s5pc100/setup-fb-24bpp.c |1 - 3 files changed, 1 insertions(+), 107 deletions(-) delete mode 100644 arch/arm/mach-s5pc100/include/mach/regs-fb.h diff --git a/arch/arm/mach-s5pc100/include/mach/regs-fb.h b/arch/arm/mach-s5pc100/include/mach/regs-fb.h deleted file mode 100644 index 07aa4d6..000 --- a/arch/arm/mach-s5pc100/include/mach/regs-fb.h +++ /dev/null @@ -1,105 +0,0 @@ -/* arch/arm/mach-s5pc100/include/mach/regs-fb.h - * - * Copyright 2009 Samsung Electronics Co. - * Pawel Osciak - * - * Framebuffer register definitions for Samsung S5PC100. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_REGS_FB_H -#define __ASM_ARCH_REGS_FB_H __FILE__ - -#include - -/* VP1 interface timing control */ -#define VP1CON0(0x118) -#define VP1_RATECON_EN (1 << 31) -#define VP1_CLKRATE_MASK (0xff) - -#define VP1CON1(0x11c) -#define VP1_VTREGCON_EN(1 << 31) -#define VP1_VBPD_MASK (0xfff) -#define VP1_VBPD_SHIFT (16) - - -#define WPALCON_H (0x19c) -#define WPALCON_L (0x1a0) - -/* Palette control for WPAL0 and WPAL1 is the same as in S3C64xx, but - * different for WPAL2-4 - */ -/* In WPALCON_L (aka WPALCON) */ -#define WPALCON_W1PAL_32BPP_A888 (0x7 << 3) -#define WPALCON_W0PAL_32BPP_A888 (0x7 << 0) - -/* To set W2PAL-W4PAL consist of one bit from WPALCON_L and two from WPALCON_H, - * e.g. W2PAL[2..0] is made of (WPALCON_H[10..9], WPALCON_L[6]). - */ -#define WPALCON_L_WxPAL_L_MASK (0x1) -#define WPALCON_L_W2PAL_L_SHIFT(6) -#define WPALCON_L_W3PAL_L_SHIFT(7) -#define WPALCON_L_W4PAL_L_SHIFT(8) - -#define WPALCON_L_WxPAL_H_MASK (0x3) -#define WPALCON_H_W2PAL_H_SHIFT(9) -#define WPALCON_H_W3PAL_H_SHIFT(13) -#define WPALCON_H_W4PAL_H_SHIFT(17) - -/* Per-window alpha value registers */ -/* For window 0 8-bit alpha values are in VIDW0ALPHAx, - * for windows 1-4 alpha values consist of two parts, the 4 low bits are - * taken from VIDWxALPHAx and 4 high bits are from VIDOSDxC, - * e.g. WIN1_ALPHA0_B[7..0] = (VIDOSD1C[3..0], VIDW1ALPHA0[3..0]) - */ -#define VIDWxALPHA0(_win) (0x200 + (_win * 8)) -#define VIDWxALPHA1(_win) (0x204 + (_win * 8)) - -/* Only for window 0 in VIDW0ALPHAx. */ -#define VIDW0ALPHAx_R(_x) ((_x) << 16) -#define VIDW0ALPHAx_R_MASK (0xff << 16) -#define VIDW0ALPHAx_R_SHIFT(16) -#define VIDW0ALPHAx_G(_x) ((_x) << 8) -#define VIDW0ALPHAx_G_MASK (0xff << 8) -#define VIDW0ALPHAx_G_SHIFT(8) -#define VIDW0ALPHAx_B(_x) ((_x) << 0) -#define VIDW0ALPHAx_B_MASK (0xff << 0) -#define VIDW0ALPHAx_B_SHIFT(0) - -/* Low 4 bits of alpha0-1 for windows 1-4 */ -#define VIDW14ALPHAx_R_L(_x) ((_x) << 16) -#define VIDW14ALPHAx_R_L_MASK (0xf << 16) -#define VIDW14ALPHAx_R_L_SHIFT (16) -#define VIDW14ALPHAx_G_L(_x) ((_x) << 8) -#define VIDW14ALPHAx_G_L_MASK (0xf << 8) -#define VIDW14ALPHAx_G_L_SHIFT (8) -#define VIDW14ALPHAx_B_L(_x) ((_x) << 0) -#define VIDW14ALPHAx_B_L_MASK (0xf << 0) -#define VIDW14ALPHAx_B_L_SHIFT (0) - - -/* Per-window blending equation control registers */ -#define BLENDEQx(_win) (0x244 + ((_win) * 4)) -#define BLENDEQ1 (0x244) -#define BLENDEQ2 (0x248) -#define BLENDEQ3 (0x24c) -#define BLENDEQ4 (0x250) - -#define BLENDEQx_Q_FUNC(_x)((_x) << 18) -#define BLENDEQx_Q_FUNC_MASK (0xf << 18) -#define BLENDEQx_P_FUNC(_x
[PATCH 2/3] ARM: S5PV210: Cleanup mach/regs-fb.h from mach-s5pv210
Use plat/regs-fb-v4.h in machine files instead of mach/regs-fb.h.
Signed-off-by: Ajay Kumar
---
arch/arm/mach-s5pv210/include/mach/regs-fb.h | 21 -
arch/arm/mach-s5pv210/mach-aquila.c |2 +-
arch/arm/mach-s5pv210/mach-goni.c|2 +-
arch/arm/mach-s5pv210/mach-smdkv210.c|2 +-
arch/arm/mach-s5pv210/setup-fb-24bpp.c |1 -
5 files changed, 3 insertions(+), 25 deletions(-)
delete mode 100644 arch/arm/mach-s5pv210/include/mach/regs-fb.h
diff --git a/arch/arm/mach-s5pv210/include/mach/regs-fb.h
b/arch/arm/mach-s5pv210/include/mach/regs-fb.h
deleted file mode 100644
index 60d9929..000
--- a/arch/arm/mach-s5pv210/include/mach/regs-fb.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * Copyright 2010 Ben Dooks
- *
- * Dummy framebuffer to allow build for the moment.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __ASM_ARCH_MACH_REGS_FB_H
-#define __ASM_ARCH_MACH_REGS_FB_H __FILE__
-
-#include
-
-static inline unsigned int s3c_fb_pal_reg(unsigned int window, int reg)
-{
- return 0x2400 + (window * 256 *4 ) + reg;
-}
-
-#endif /* __ASM_ARCH_MACH_REGS_FB_H */
diff --git a/arch/arm/mach-s5pv210/mach-aquila.c
b/arch/arm/mach-s5pv210/mach-aquila.c
index 4e1d8ff..509627f 100644
--- a/arch/arm/mach-s5pv210/mach-aquila.c
+++ b/arch/arm/mach-s5pv210/mach-aquila.c
@@ -29,7 +29,6 @@
#include
#include
-#include
#include
#include
@@ -40,6 +39,7 @@
#include
#include
#include
+#include
/* Following are default values for UCON, ULCON and UFCON UART registers */
#define AQUILA_UCON_DEFAULT(S3C2410_UCON_TXILEVEL |\
diff --git a/arch/arm/mach-s5pv210/mach-goni.c
b/arch/arm/mach-s5pv210/mach-goni.c
index 31d5aa7..e0c4d06 100644
--- a/arch/arm/mach-s5pv210/mach-goni.c
+++ b/arch/arm/mach-s5pv210/mach-goni.c
@@ -34,7 +34,6 @@
#include
#include
-#include
#include
#include
@@ -47,6 +46,7 @@
#include
#include
#include
+#include
/* Following are default values for UCON, ULCON and UFCON UART registers */
#define GONI_UCON_DEFAULT (S3C2410_UCON_TXILEVEL |\
diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c
b/arch/arm/mach-s5pv210/mach-smdkv210.c
index c6a9e86..9ccab15 100644
--- a/arch/arm/mach-s5pv210/mach-smdkv210.c
+++ b/arch/arm/mach-s5pv210/mach-smdkv210.c
@@ -29,7 +29,6 @@
#include
#include
-#include
#include
#include
@@ -45,6 +44,7 @@
#include
#include
#include
+#include
/* Following are default values for UCON, ULCON and UFCON UART registers */
#define SMDKV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL |\
diff --git a/arch/arm/mach-s5pv210/setup-fb-24bpp.c
b/arch/arm/mach-s5pv210/setup-fb-24bpp.c
index e932ebf..55103c8 100644
--- a/arch/arm/mach-s5pv210/setup-fb-24bpp.c
+++ b/arch/arm/mach-s5pv210/setup-fb-24bpp.c
@@ -15,7 +15,6 @@
#include
#include
-#include
#include
#include
#include
--
1.7.0.4
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[PATCH 3/3] ARM: S3C64XX: Cleanup mach/regs-fb.h from mach-s3c64xx
Use plat/regs-fb-v4.h in machine files instead of mach/regs-fb.h. Signed-off-by: Ajay Kumar --- arch/arm/mach-s3c64xx/include/mach/regs-fb.h | 21 - arch/arm/mach-s3c64xx/mach-anw6410.c |2 +- arch/arm/mach-s3c64xx/mach-crag6410.c|2 +- arch/arm/mach-s3c64xx/mach-hmt.c |2 +- arch/arm/mach-s3c64xx/mach-mini6410.c|2 +- arch/arm/mach-s3c64xx/mach-ncp.c |2 +- arch/arm/mach-s3c64xx/mach-real6410.c|2 +- arch/arm/mach-s3c64xx/mach-smartq5.c |2 +- arch/arm/mach-s3c64xx/mach-smartq7.c |2 +- arch/arm/mach-s3c64xx/mach-smdk6410.c|2 +- arch/arm/mach-s3c64xx/setup-fb-24bpp.c |1 - 11 files changed, 9 insertions(+), 31 deletions(-) delete mode 100644 arch/arm/mach-s3c64xx/include/mach/regs-fb.h diff --git a/arch/arm/mach-s3c64xx/include/mach/regs-fb.h b/arch/arm/mach-s3c64xx/include/mach/regs-fb.h deleted file mode 100644 index a06ee0a..000 --- a/arch/arm/mach-s3c64xx/include/mach/regs-fb.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * Copyright 2008 Openmoko, Inc. - * Copyright 2008 Simtec Electronics - * Copyright 2009 Samsung Electronics Co. - * - * Pawel Osciak - * Based on plat-s3c/include/plat/regs-fb.h by Ben Dooks - * - * Framebuffer register definitions for Samsung S3C64xx. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_MACH_REGS_FB_H -#define __ASM_ARCH_MACH_REGS_FB_H __FILE__ - -#include - -#endif /* __ASM_ARCH_MACH_REGS_FB_H */ diff --git a/arch/arm/mach-s3c64xx/mach-anw6410.c b/arch/arm/mach-s3c64xx/mach-anw6410.c index a53cf14..cb88643 100644 --- a/arch/arm/mach-s3c64xx/mach-anw6410.c +++ b/arch/arm/mach-s3c64xx/mach-anw6410.c @@ -35,7 +35,6 @@ #include #include -#include #include #include @@ -44,6 +43,7 @@ #include #include #include +#include #include #include diff --git a/arch/arm/mach-s3c64xx/mach-crag6410.c b/arch/arm/mach-s3c64xx/mach-crag6410.c index ae51b17..c8d7b5d 100644 --- a/arch/arm/mach-s3c64xx/mach-crag6410.c +++ b/arch/arm/mach-s3c64xx/mach-crag6410.c @@ -44,7 +44,6 @@ #include #include -#include #include #include #include @@ -64,6 +63,7 @@ #include #include #include +#include #include #include diff --git a/arch/arm/mach-s3c64xx/mach-hmt.c b/arch/arm/mach-s3c64xx/mach-hmt.c index b263958..b3d93cc 100644 --- a/arch/arm/mach-s3c64xx/mach-hmt.c +++ b/arch/arm/mach-s3c64xx/mach-hmt.c @@ -27,7 +27,6 @@ #include #include -#include #include #include @@ -42,6 +41,7 @@ #include #include #include +#include #define UCON S3C2410_UCON_DEFAULT #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE) diff --git a/arch/arm/mach-s3c64xx/mach-mini6410.c b/arch/arm/mach-s3c64xx/mach-mini6410.c index 89f35e0..527f49b 100644 --- a/arch/arm/mach-s3c64xx/mach-mini6410.c +++ b/arch/arm/mach-s3c64xx/mach-mini6410.c @@ -29,7 +29,6 @@ #include #include -#include #include #include #include @@ -42,6 +41,7 @@ #include #include #include +#include #include diff --git a/arch/arm/mach-s3c64xx/mach-ncp.c b/arch/arm/mach-s3c64xx/mach-ncp.c index c498649..01c6857 100644 --- a/arch/arm/mach-s3c64xx/mach-ncp.c +++ b/arch/arm/mach-s3c64xx/mach-ncp.c @@ -30,7 +30,6 @@ #include #include -#include #include #include @@ -44,6 +43,7 @@ #include #include #include +#include #define UCON S3C2410_UCON_DEFAULT #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE diff --git a/arch/arm/mach-s3c64xx/mach-real6410.c b/arch/arm/mach-s3c64xx/mach-real6410.c index 4957ab0..95b04b1 100644 --- a/arch/arm/mach-s3c64xx/mach-real6410.c +++ b/arch/arm/mach-s3c64xx/mach-real6410.c @@ -30,7 +30,6 @@ #include #include -#include #include #include #include @@ -43,6 +42,7 @@ #include #include #include +#include #include diff --git a/arch/arm/mach-s3c64xx/mach-smartq5.c b/arch/arm/mach-s3c64xx/mach-smartq5.c index 3a3e5ac..342e8df 100644 --- a/arch/arm/mach-s3c64xx/mach-smartq5.c +++ b/arch/arm/mach-s3c64xx/mach-smartq5.c @@ -21,7 +21,6 @@ #include #include -#include #include #include @@ -29,6 +28,7 @@ #include #include #include +#include #include "mach-smartq.h" diff --git a/arch/arm/mach-s3c64xx/mach-smartq7.c b/arch/arm/mach-s3c64xx/mach-smartq7.c index e653758..5796397 100644 --- a/arch/arm/mach-s3c64xx/mach-smartq7.c +++ b/arch/arm/mach-s3c64xx/mach-smartq7.c @@ -21,7 +21,6 @@ #include #include -#include #include #include @@ -29,6 +28,7 @@ #include #include #include +#include #include "mach-smartq.h" diff --git a/arch/arm/mach-s3c64xx/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c index e0521e0..209c9b5 100644 --- a/arch/arm/mach-s3c64xx/mach-smdk6410.c +++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c @@ -48,7 +48,6 @@ #in
RE: [PATCH v3 0/6] ARM: EXYNOS4: NURI Board Configuration Update
MyungJoo Ham wrote: > > 1/6: Increase NR_IRQS for MAX8997 > 2/6: Add MAX8997 PMIC > 3/6: Add MAX17042 Fuel Gauge > 4/6: Add ADC > 5/6: Add MAX8903 Secondary Charger > 6/6: Add RTC-S3C > > ps. Tushar, I didn't seperated MAX8997 support code out of mach-nuri.c, yet > because I still have no idea about how similar the Origen board is with NURI board. > > MyungJoo Ham (6): > ARM: EXYNOS4: Increase NR_IRQS for devices with more IRQs > Exynos4 NURI: configure regulators and PMIC (MAX8997) > Exynos4 NURI: configure MAX17042 fuel gauge > Exynos4 NURI: configure ADC. > Exynos4 NURI: configure MAX8903 secondary charger > Exynos4 NURI: configure rtc-s3c. > > arch/arm/mach-exynos4/include/mach/irqs.h |2 +- > arch/arm/mach-exynos4/mach-nuri.c | 739 > - > 2 files changed, 739 insertions(+), 2 deletions(-) > > -- > 1.7.4.1 Applied. Thanks. Best regards, Kgene. -- Kukjin Kim , Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd. -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH v3] ARM: EXYNOS4: Add platform device for dwmci driver.
Seungwon Jeon wrote:
>
> This patch adds platform device for Synopsys DesignWare Multimedia Card
> Interface driver.
>
> Signed-off-by: Seungwon Jeon
> ---
> arch/arm/mach-exynos4/Kconfig |5 ++
> arch/arm/mach-exynos4/Makefile |1 +
> arch/arm/mach-exynos4/dev-dwmci.c | 82
>
> arch/arm/mach-exynos4/include/mach/dwmci.h | 20 +++
> arch/arm/mach-exynos4/include/mach/irqs.h |1 +
> arch/arm/mach-exynos4/include/mach/map.h |1 +
> arch/arm/plat-samsung/include/plat/devs.h |1 +
> 7 files changed, 111 insertions(+), 0 deletions(-)
> create mode 100644 arch/arm/mach-exynos4/dev-dwmci.c
> create mode 100644 arch/arm/mach-exynos4/include/mach/dwmci.h
>
> diff --git a/arch/arm/mach-exynos4/Kconfig b/arch/arm/mach-exynos4/Kconfig
> index a4fb109..31f798c 100644
> --- a/arch/arm/mach-exynos4/Kconfig
> +++ b/arch/arm/mach-exynos4/Kconfig
> @@ -36,6 +36,11 @@ config EXYNOS4_DEV_SYSMMU
> help
> Common setup code for SYSTEM MMU in EXYNOS4
>
> +config EXYNOS4_DEV_DWMCI
> + bool
> + help
> + Compile in platform device definitions for DWMCI
> +
> config EXYNOS4_SETUP_I2C1
> bool
> help
> diff --git a/arch/arm/mach-exynos4/Makefile
b/arch/arm/mach-exynos4/Makefile
> index c3c70ab..4c4ea6b 100644
> --- a/arch/arm/mach-exynos4/Makefile
> +++ b/arch/arm/mach-exynos4/Makefile
> @@ -38,6 +38,7 @@ obj-y += dev-
> audio.o
> obj-$(CONFIG_EXYNOS4_DEV_AHCI) += dev-ahci.o
> obj-$(CONFIG_EXYNOS4_DEV_PD) += dev-pd.o
> obj-$(CONFIG_EXYNOS4_DEV_SYSMMU) += dev-sysmmu.o
> +obj-$(CONFIG_EXYNOS4_DEV_DWMCI) += dev-dwmci.o
>
> obj-$(CONFIG_EXYNOS4_SETUP_FIMC) += setup-fimc.o
> obj-$(CONFIG_EXYNOS4_SETUP_I2C1) += setup-i2c1.o
> diff --git a/arch/arm/mach-exynos4/dev-dwmci.c
b/arch/arm/mach-exynos4/dev-
> dwmci.c
> new file mode 100644
> index 000..b025db4
> --- /dev/null
> +++ b/arch/arm/mach-exynos4/dev-dwmci.c
> @@ -0,0 +1,82 @@
> +/*
> + * linux/arch/arm/mach-exynos4/dev-dwmci.c
> + *
> + * Copyright (c) 2011 Samsung Electronics Co., Ltd.
> + * http://www.samsung.com
> + *
> + * Platform device for Synopsys DesignWare Mobile Storage IP
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#include
> +
> +#include
> +
> +static int exynos4_dwmci_get_bus_wd(u32 slot_id)
> +{
> + return 4;
> +}
> +
> +static int exynos4_dwmci_init(u32 slot_id, irq_handler_t handler, void
*data)
> +{
> + return 0;
> +}
> +
> +static struct resource exynos4_dwmci_resource[] = {
> + [0] = {
> + .start = EXYNOS4_PA_DWMCI,
> + .end= EXYNOS4_PA_DWMCI + SZ_4K - 1,
> + .flags = IORESOURCE_MEM,
> + },
> + [1] = {
> + .start = IRQ_DWMCI,
> + .end= IRQ_DWMCI,
> + .flags = IORESOURCE_IRQ,
> + }
> +};
> +
> +static struct dw_mci_board exynos4_dwci_pdata = {
> + .num_slots = 1,
> + .quirks =
> DW_MCI_QUIRK_BROKEN_CARD_DETECTION,
> + .bus_hz = 80 * 1000 * 1000,
> + .detect_delay_ms= 200,
> + .init = exynos4_dwmci_init,
> + .get_bus_wd = exynos4_dwmci_get_bus_wd,
> +};
> +
> +static u64 exynos4_dwmci_dmamask = DMA_BIT_MASK(32);
> +
> +struct platform_device exynos4_device_dwmci = {
> + .name = "dw_mmc",
> + .id = -1,
> + .num_resources = ARRAY_SIZE(exynos4_dwmci_resource),
> + .resource = exynos4_dwmci_resource,
> + .dev= {
> + .dma_mask = &exynos4_dwmci_dmamask,
> + .coherent_dma_mask = DMA_BIT_MASK(32),
> + .platform_data = &exynos4_dwci_pdata,
> + },
> +};
> +
> +void __init exynos4_dwmci_set_platdata(struct dw_mci_board *pd)
> +{
> + struct dw_mci_board *npd;
> +
> + npd = s3c_set_platdata(pd, sizeof(struct dw_mci_board),
> + &exynos4_device_dwmci);
> +
> + if (!npd->init)
> + npd->init = exynos4_dwmci_init;
> + if (!npd->get_bus_wd)
> + npd->get_bus_wd = exynos4_dwmci_get_bus_wd;
> +}
> diff --git a/arch/arm/mach-exynos4/include/mach/dwmci.h b/arch/arm/mach-
> exynos4/include/mach/dwmci.h
> new file mode 100644
> index 000..7ce6574
> --- /dev/null
> +++ b/arch/arm/mach-exynos4/include/mach/dwmci.h
> @@ -0,0 +1,20 @@
> +/* linux/arch/arm/mach-exynos4/include/mach/dwmci.h
> + *
> + * Copyright (c) 2011 Samsung Electronics Co., Ltd.
> + * http://www.samsung.com/
> + *
> + * Synopsys DesignWare Mobile
RE: [PATCH V4 00/13] To use DMA generic APIs for Samsung DMA
Boojin Kim wrote:
>
> This patchset adds support DMA generic APIs for Samsung DMA.
> V4 doesn't has whole patch series and only has the patches differed from
V3.
>
> Changes from V3:
> - Divided 03-patch into two patchs.
> - First is 03-1-patch for DMA_SLAVE_CONFIG command.
> - Another is 03-2-patch for DMA_CYCLIC capability.
> - Code clean-up
> - Remove unnecessary variable referance.
> - Remove redunancy code
>
> [PATCH V4 01/13] DMA: PL330: Add support runtime PM for PL330 DMAC
> [PATCH V4 03-1/13] DMA: PL330: Support DMA_SLAVE_CONFIG command
> [PATCH V4 03-2/13] DMA: PL330: Add DMA_CYCLIC capability
> [PATCH V4 05/13] ARM: SAMSUNG: Add common DMA operations
Dear all,
Is there any comments on this?
As a note, this whole series are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git
next-samsung-dma
Boojin Kim (14):
DMA: PL330: Add support runtime PM for PL330 DMAC
DMA: PL330: Update PL330 DMA API driver
DMA: PL330: Support DMA_SLAVE_CONFIG command
DMA: PL330: Add DMA_CYCLIC capability
ARM: SAMSUNG: Update to use PL330-DMA driver
ARM: SAMSUNG: Add common DMA operations
ARM: EXYNOS4: Use generic DMA PL330 driver
ARM: S5PV210: Use generic DMA PL330 driver
ARM: S5PC100: Use generic DMA PL330 driver
ARM: S5P64X0: Use generic DMA PL330 driver
ARM: SAMSUNG: Remove S3C-PL330-DMA driver
spi/s3c64xx: Add support DMA engine API
ASoC: Samsung: Update DMA interface
ARM: SAMSUNG: Remove Samsung specific enum type for dma direction
arch/arm/mach-exynos4/Kconfig |2 +-
arch/arm/mach-exynos4/clock.c | 16 +-
arch/arm/mach-exynos4/dma.c| 323 --
arch/arm/mach-exynos4/include/mach/dma.h |4 +-
arch/arm/mach-s3c2410/include/mach/dma.h | 20 +-
arch/arm/mach-s3c2412/dma.c|4 +-
arch/arm/mach-s3c64xx/dma.c| 10 +-
arch/arm/mach-s3c64xx/include/mach/dma.h |8 +-
arch/arm/mach-s5p64x0/Kconfig |4 +-
arch/arm/mach-s5p64x0/clock-s5p6440.c |9 +-
arch/arm/mach-s5p64x0/clock-s5p6450.c |9 +-
arch/arm/mach-s5p64x0/dma.c| 317 --
arch/arm/mach-s5p64x0/include/mach/dma.h |2 +-
arch/arm/mach-s5pc100/Kconfig |2 +-
arch/arm/mach-s5pc100/clock.c | 23 +-
arch/arm/mach-s5pc100/dma.c| 357 --
arch/arm/mach-s5pc100/include/mach/dma.h |2 +-
arch/arm/mach-s5pv210/Kconfig |2 +-
arch/arm/mach-s5pv210/clock.c | 16 +-
arch/arm/mach-s5pv210/dma.c| 346 --
arch/arm/mach-s5pv210/include/mach/dma.h |2 +-
arch/arm/plat-s3c24xx/dma.c| 10 +-
arch/arm/plat-samsung/Kconfig |8 +-
arch/arm/plat-samsung/Makefile |4 +-
arch/arm/plat-samsung/dma-ops.c| 133 +++
arch/arm/plat-samsung/include/plat/dma-ops.h | 64 +
.../include/plat/{s3c-dma-pl330.h => dma-pl330.h} | 32 +-
arch/arm/plat-samsung/include/plat/dma-s3c24xx.h |2 +-
arch/arm/plat-samsung/include/plat/dma.h | 10 +-
.../plat-samsung/include/plat/s3c-pl330-pdata.h| 32 -
arch/arm/plat-samsung/s3c-dma-ops.c| 130 ++
arch/arm/plat-samsung/s3c-pl330.c | 1244
drivers/dma/Kconfig|3 +-
drivers/dma/pl330.c| 270 -
drivers/mmc/host/s3cmci.c |6 +-
drivers/spi/spi_s3c64xx.c | 141 ++--
include/linux/amba/pl330.h |2 +-
sound/soc/samsung/ac97.c | 10 +-
sound/soc/samsung/dma.c| 144 +--
sound/soc/samsung/dma.h|4 +-
40 files changed, 1740 insertions(+), 1987 deletions(-)
Thanks.
Best regards,
Kgene.
--
Kukjin Kim , Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
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RE: [PATCH v3 2/6] Exynos4 NURI: configure regulators and PMIC (MAX8997)
MyungJoo Ham wrote:
>
> Signed-off-by: MyungJoo Ham
> Signed-off-by: Kyungmin Park
(snip)
> +#include
(snip)
>
> +static void __init nuri_power_init(void)
> +{
> + int gpio;
> + int irq_base = IRQ_GPIO_END + 1;
> +
> + nuri_max8997_pdata.irq_base = irq_base;
> + irq_base += MAX8997_IRQ_NR;
Oops :(
arch/arm/mach-exynos4/mach-nuri.c: In function 'nuri_power_init':
arch/arm/mach-exynos4/mach-nuri.c:1051: error: 'MAX8997_IRQ_NR' undeclared
(first use in this function)
arch/arm/mach-exynos4/mach-nuri.c:1051: error: (Each undeclared identifier
is reported only once
arch/arm/mach-exynos4/mach-nuri.c:1051: error: for each function it appears
in.)
make[2]: *** [arch/arm/mach-exynos4/mach-nuri.o] Error 1
So need to add inclusion of on this file.
I fixed it.
Thanks.
Best regards,
Kgene.
--
Kukjin Kim , Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
> +
> + gpio = EXYNOS4_GPX0(7);
> + gpio_request(gpio, "AP_PMIC_IRQ");
> + s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf));
> + s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
> +}
> +
> /* USB EHCI */
> static struct s5p_ehci_platdata nuri_ehci_pdata;
>
> @@ -361,6 +980,7 @@ static void __init nuri_ehci_init(void)
>
> static struct platform_device *nuri_devices[] __initdata = {
> /* Samsung Platform Devices */
> + &s3c_device_i2c5, /* PMIC should initialize first */
> &emmc_fixed_voltage,
> &s3c_device_hsmmc0,
> &s3c_device_hsmmc2,
> @@ -387,10 +1007,13 @@ static void __init nuri_machine_init(void)
> {
> nuri_sdhci_init();
> nuri_tsp_init();
> + nuri_power_init();
>
> i2c_register_board_info(1, i2c1_devs, ARRAY_SIZE(i2c1_devs));
> s3c_i2c3_set_platdata(&i2c3_data);
> i2c_register_board_info(3, i2c3_devs, ARRAY_SIZE(i2c3_devs));
> + s3c_i2c5_set_platdata(NULL);
> + i2c5_devs[I2C5_MAX8997].irq = gpio_to_irq(EXYNOS4_GPX0(7));
> i2c_register_board_info(5, i2c5_devs, ARRAY_SIZE(i2c5_devs));
>
> nuri_ehci_init();
> --
> 1.7.4.1
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RE: [PATCH v3 1/6] ARM: EXYNOS4: Increase NR_IRQS for devices with more IRQs
MyungJoo Ham wrote: > > MAX8997/17042, which are used by Exynos4-NURI, use additional IRQ > numbers after GPIO's IRQs. The patch creates some room for those > devices. > > Signed-off-by: MyungJoo Ham > Signed-off-by: Kyungmin Park > --- > arch/arm/mach-exynos4/include/mach/irqs.h |2 +- > 1 files changed, 1 insertions(+), 1 deletions(-) > > diff --git a/arch/arm/mach-exynos4/include/mach/irqs.h b/arch/arm/mach- > exynos4/include/mach/irqs.h > index 31f6bed..51b5db5 100644 > --- a/arch/arm/mach-exynos4/include/mach/irqs.h > +++ b/arch/arm/mach-exynos4/include/mach/irqs.h > @@ -154,6 +154,6 @@ > #define IRQ_GPIO_END (S5P_GPIOINT_BASE + S5P_GPIOINT_COUNT) > > /* Set the default NR_IRQS */ > -#define NR_IRQS (IRQ_GPIO_END) > +#define NR_IRQS (IRQ_GPIO_END + 64) I applied but basically, we have to avoid using hard coded value like 64 on this. The NR_IRQS depends on CPU not board but this change is needed for supporting some specific board and if you need more interrupt numbers, will you increase it? It is not good way. We need to fix this up next time. Thanks. Best regards, Kgene. -- Kukjin Kim , Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd. -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH 0/7] ARM: SAMSUNG: Code cleanup for various devices
Banajit Goswami wrote: > > Use generic s3c_set_platdata to perform the same job. Saves a few lines > of code. > > The patches are created against "for-next" branch of Kukjin Kim's tree at: > git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git > > These patches are only compile tested. > > o To Kukjin Kim > PATCH[1/7] ARM: SAMSUNG: Use generic s3c_set_platdata for TS > PATCH[2/7] ARM: SAMSUNG: Use generic s3c_set_platdata for FB > PATCH[3/7] ARM: SAMSUNG: Use generic s3c_set_platdata for HWMON > PATCH[4/7] ARM: SAMSUNG: Use generic s3c_set_platdata for USB OHCI > PATCH[5/7] ARM: SAMSUNG: Use generic s3c_set_platdata for NAND > > o To Ben Dooks > PATCH[6/7] ARM: S3C64XX: Use generic s3c_set_platdata for OneNAND > PATCH[7/7] ARM: S3C24XX: Use generic s3c_set_platdata for devices > > arch/arm/mach-s3c64xx/dev-onenand1.c | 10 +++- > arch/arm/plat-s3c24xx/devs.c | 38 ++--- > arch/arm/plat-samsung/dev-fb.c | 14 +-- > arch/arm/plat-samsung/dev-hwmon.c| 14 +-- > arch/arm/plat-samsung/dev-nand.c |9 ++- > arch/arm/plat-samsung/dev-ts.c | 14 +-- > arch/arm/plat-samsung/dev-usb.c |9 +-- > 7 files changed, 22 insertions(+), 86 deletions(-) > > -- > 1.7.2.3 Applied. Thanks. Best regards, Kgene. -- Kukjin Kim , Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd. -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH 0/3] ARM: SAMSUNG: Cleanup mach/regs-fb.h from various machines
Ajay Kumar wrote: > > This patchset cleans up mach/regs-fb.h from S3C64XX, S5PC100, and S5PV210. > plat/regs-fb-v4.h is used instead to provide the same support. > > Display testing done on SMDK6410, SMDKC100 and SMDKV210. > For other machines, its compile tested. > > o To Kukjin Kim, Jingoo Han, Marek Szyprowski. > ARM: S5PC100: Cleanup mach/regs-fb.h from mach-s5pc100 > ARM: S5PV210: Cleanup mach/regs-fb.h from mach-s5pv210 > ARM: S3C64XX: Cleanup mach/regs-fb.h from mach-s3c64xx > > arch/arm/mach-s3c64xx/include/mach/regs-fb.h | 21 - > arch/arm/mach-s3c64xx/mach-anw6410.c |2 +- > arch/arm/mach-s3c64xx/mach-crag6410.c|2 +- > arch/arm/mach-s3c64xx/mach-hmt.c |2 +- > arch/arm/mach-s3c64xx/mach-mini6410.c|2 +- > arch/arm/mach-s3c64xx/mach-ncp.c |2 +- > arch/arm/mach-s3c64xx/mach-real6410.c|2 +- > arch/arm/mach-s3c64xx/mach-smartq5.c |2 +- > arch/arm/mach-s3c64xx/mach-smartq7.c |2 +- > arch/arm/mach-s3c64xx/mach-smdk6410.c|2 +- > arch/arm/mach-s3c64xx/setup-fb-24bpp.c |1 - > arch/arm/mach-s5pc100/include/mach/regs-fb.h | 105 -- > arch/arm/mach-s5pc100/mach-smdkc100.c|2 +- > arch/arm/mach-s5pc100/setup-fb-24bpp.c |1 - > arch/arm/mach-s5pv210/include/mach/regs-fb.h | 21 - > arch/arm/mach-s5pv210/mach-aquila.c |2 +- > arch/arm/mach-s5pv210/mach-goni.c|2 +- > arch/arm/mach-s5pv210/mach-smdkv210.c|2 +- > arch/arm/mach-s5pv210/setup-fb-24bpp.c |1 - > 19 files changed, 13 insertions(+), 163 deletions(-) > delete mode 100644 arch/arm/mach-s3c64xx/include/mach/regs-fb.h > delete mode 100644 arch/arm/mach-s5pc100/include/mach/regs-fb.h > delete mode 100644 arch/arm/mach-s5pv210/include/mach/regs-fb.h Applied. Thanks. Best regards, Kgene. -- Kukjin Kim , Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd. -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH] ARM: S5P64X0: External Interrupt Support
padma venkat wrote:
>
> Hi Russell,
>
> On Fri, Jul 15, 2011 at 6:04 PM, Russell King - ARM Linux
> wrote:
> > On Fri, Jul 15, 2011 at 05:23:33PM +0530, padma venkat wrote:
> >> Hi Russell,
> >>
> >> On Fri, Jul 15, 2011 at 2:30 PM, Russell King - ARM Linux
> >> wrote:
> >> > On Fri, Jul 15, 2011 at 12:11:34PM +0530, Padmavathi Venna wrote:
> >> >> +#define eint_offset(irq) ((irq) - IRQ_EINT(0))
> >> >> +#define eint_irq_to_bit(irq) ((u32)(1 << eint_offset(irq)))
> >> >> +
> >> >> +static inline void s5p64x0_irq_eint_mask(struct irq_data *data)
> >> >> +{
> >> >> + u32 mask;
> >> >> +
> >> >> + mask = __raw_readl(S5P64X0_EINT0MASK);
> >> >> + mask |= (u32)data->chip_data;
> >> >> + __raw_writel(mask, S5P64X0_EINT0MASK);
> >> >> +}
> >> >> +
> >> >> +static void s5p64x0_irq_eint_unmask(struct irq_data *data)
> >> >> +{
> >> >> + u32 mask;
> >> >> +
> >> >> + mask = __raw_readl(S5P64X0_EINT0MASK);
> >> >> + mask &= ~((u32)data->chip_data);
> >> >> + __raw_writel(mask, S5P64X0_EINT0MASK);
> >> >> +}
> >> >> +
> >> >> +static inline void s5p64x0_irq_eint_ack(struct irq_data *data)
> >> >> +{
> >> >> + __raw_writel((u32)data->chip_data, S5P64X0_EINT0PEND);
> >> >> +}
> >> >> +
> >> >> +static void s5p64x0_irq_eint_maskack(struct irq_data *data)
> >> >> +{
> >> >> + /* compiler should in-line these */
> >> >> + s5p64x0_irq_eint_mask(data);
> >> >> + s5p64x0_irq_eint_ack(data);
> >> >> +}
> >> >
> >> > Won't genirqchip support deal with all of the above for you?
> >> As per my understanding, to deal with low level interrupt hardware
access
> >> we need to use the accessor functions. Please suggest me if there is
> >> any better way of doing this.
> >
> > I'm not saying don't have these. I'm saying use the _generic_ irqchip
> > support which has the code implemented to set and clear bits in
registers.
> > Something like this:
> >
> > struct irq_chip_generic *gc;
> >
> > gc = irq_alloc_generic_chip(name, 1, first_irq,
base_of_controller,
> > handler);
> >
> > gc->chip_types->chip.irq_ack = irq_gc_ack;
> > gc->chip_types->chip.irq_mask = irq_gc_mask_set_bit;
> > gc->chip_types->chip.irq_unmask = irq_gc_mask_clr_bit;
> >
> > /* replace the two below with the _real_ offset, rather than
these
> calculations */
> > gc->chip_types->reg.ack = S5P64X0_EINT0PEND - base_of_controller;
> > gc->chip_types->reg.mask = S5P64X0_EINT0MASK -
base_of_controller;
> >
> > irq_setup_generic_chip(gc, mask_of_irqs_to_setup,
> > IRQ_GC_INIT_MASK_CACHE, flags_to_clear, flags_to_set);
> >
> Thanks for your explanation.
> I will remake the patch based on generic_irq_chip support and resend the
same.
>
Hmm...any updated patch on this?
Thanks.
Best regards,
Kgene.
--
Kukjin Kim , Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
--
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RE: [PATCH 1/8] ARM: Samsung: add i2c8 controller definitions
Marek Szyprowski wrote:
>
> From: Tomasz Stanislawski
>
> This patch adds generic i2c8 controller definitions.
>
> Signed-off-by: Tomasz Stanislawski
> Signed-off-by: Kyungmin Park
> Signed-off-by: Marek Szyprowski
> ---
> arch/arm/plat-samsung/Kconfig |5 ++
> arch/arm/plat-samsung/Makefile|1 +
> arch/arm/plat-samsung/dev-i2c8.c | 58
> +
> arch/arm/plat-samsung/include/plat/devs.h |1 +
> arch/arm/plat-samsung/include/plat/iic-core.h |7 +++
> arch/arm/plat-samsung/include/plat/iic.h |1 +
> 6 files changed, 73 insertions(+), 0 deletions(-)
> create mode 100644 arch/arm/plat-samsung/dev-i2c8.c
>
> diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
> index 4d79519..c0fd858 100644
> --- a/arch/arm/plat-samsung/Kconfig
> +++ b/arch/arm/plat-samsung/Kconfig
> @@ -212,6 +212,11 @@ config S3C_DEV_I2C7
> help
> Compile in platform device definition for I2C controller 7
>
> +config S3C_DEV_I2C8
> + bool
> + help
> + Compile in platform device definitions for I2C channel 8 (HDMIPHY)
> +
> config S3C_DEV_FB
> bool
> help
> diff --git a/arch/arm/plat-samsung/Makefile
b/arch/arm/plat-samsung/Makefile
> index 53eb15b..7f0e660 100644
> --- a/arch/arm/plat-samsung/Makefile
> +++ b/arch/arm/plat-samsung/Makefile
> @@ -45,6 +45,7 @@ obj-$(CONFIG_S3C_DEV_I2C4) += dev-i2c4.o
> obj-$(CONFIG_S3C_DEV_I2C5) += dev-i2c5.o
> obj-$(CONFIG_S3C_DEV_I2C6) += dev-i2c6.o
> obj-$(CONFIG_S3C_DEV_I2C7) += dev-i2c7.o
> +obj-$(CONFIG_S3C_DEV_I2C8) += dev-i2c8.o
> obj-$(CONFIG_S3C_DEV_FB) += dev-fb.o
> obj-y+= dev-uart.o
> obj-$(CONFIG_S3C_DEV_USB_HOST) += dev-usb.o
> diff --git a/arch/arm/plat-samsung/dev-i2c8.c
b/arch/arm/plat-samsung/dev-i2c8.c
> new file mode 100644
> index 000..23e8ccf
> --- /dev/null
> +++ b/arch/arm/plat-samsung/dev-i2c8.c
> @@ -0,0 +1,58 @@
> +/*
> + * Copyright (c) 2010 Samsung Electronics Co., Ltd.
> + * http://www.samsung.com/
> + *
> + * S3C series device definition for i2c device 8
> + *
> + * Based on plat-samsung/dev-i2c7.c
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> +*/
> +
> +#include
> +#include
> +#include
> +#include
> +
> +#include
> +#include
> +
> +#include
> +#include
> +#include
> +#include
> +
> +static struct resource s3c_i2c_resource[] = {
> + [0] = {
> + .start = S3C_PA_IIC8,
> + .end = S3C_PA_IIC8 + SZ_4K - 1,
> + .flags = IORESOURCE_MEM,
> + },
> + [1] = {
> + .start = IRQ_IIC8,
> + .end = IRQ_IIC8,
> + .flags = IORESOURCE_IRQ,
> + },
> +};
> +
> +struct platform_device s3c_device_i2c8 = {
> + .name = "s3c2440-i2c",
> + .id = 8,
> + .num_resources= ARRAY_SIZE(s3c_i2c_resource),
> + .resource = s3c_i2c_resource,
> +};
> +
> +void __init s3c_i2c8_set_platdata(struct s3c2410_platform_i2c *pd)
> +{
> + struct s3c2410_platform_i2c *npd;
> +
> + if (!pd) {
> + pd = &default_i2c_data;
> + pd->bus_num = 8;
> + }
> +
> + npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
> +&s3c_device_i2c8);
> +}
> diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-
> samsung/include/plat/devs.h
> index d5f700d..62ee543 100644
> --- a/arch/arm/plat-samsung/include/plat/devs.h
> +++ b/arch/arm/plat-samsung/include/plat/devs.h
> @@ -60,6 +60,7 @@ extern struct platform_device s3c_device_i2c4;
> extern struct platform_device s3c_device_i2c5;
> extern struct platform_device s3c_device_i2c6;
> extern struct platform_device s3c_device_i2c7;
> +extern struct platform_device s3c_device_i2c8;
> extern struct platform_device s3c_device_rtc;
> extern struct platform_device s3c_device_adc;
> extern struct platform_device s3c_device_sdi;
> diff --git a/arch/arm/plat-samsung/include/plat/iic-core.h
b/arch/arm/plat-
> samsung/include/plat/iic-core.h
> index f182669..97ecc44 100644
> --- a/arch/arm/plat-samsung/include/plat/iic-core.h
> +++ b/arch/arm/plat-samsung/include/plat/iic-core.h
> @@ -39,4 +39,11 @@ static inline void s3c_i2c2_setname(char *name)
> #endif
> }
>
> +static inline void s3c_i2c8_setname(char *name)
> +{
> +#ifdef CONFIG_S3C_DEV_I2C8
> + s3c_device_i2c8.name = name;
> +#endif
> +}
> +
> #endif /* __ASM_ARCH_IIC_H */
> diff --git a/arch/arm/plat-samsung/include/plat/iic.h b/arch/arm/plat-
> samsung/include/plat/iic.h
> index 56b0059..535524a 100644
> --- a/arch/arm/plat-samsung/include/plat/iic.h
> +++ b/arch/arm/plat-samsung/include/plat/iic.h
> @@ -60,6 +60,7 @@ extern void s3c_i2c4_set_platdata(struct
> s3c2410_platform_i2c *i2c);
> extern void
RE: [PATCH 7/8] ARM: S5PV210: add support for TV device
Marek Szyprowski wrote:
>
> From: Tomasz Stanislawski
>
> This patch adds clocks and definitions needed by TV driver
> infrastructure for Samsung S5PV210 platform.
>
> Signed-off-by: Tomasz Stanislawski
> Signed-off-by: Kyungmin Park
> Signed-off-by: Marek Szyprowski
> ---
> arch/arm/mach-s5pv210/clock.c | 156
> +--
> arch/arm/mach-s5pv210/cpu.c |4 +
> arch/arm/mach-s5pv210/include/mach/irqs.h |2 +-
> arch/arm/mach-s5pv210/include/mach/map.h| 16 +++
> arch/arm/mach-s5pv210/include/mach/regs-clock.h |7 +-
> 5 files changed, 171 insertions(+), 14 deletions(-)
>
> diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c
> index f41ee26..d1025e2 100644
> --- a/arch/arm/mach-s5pv210/clock.c
> +++ b/arch/arm/mach-s5pv210/clock.c
> @@ -174,6 +174,17 @@ static int s5pv210_clk_mask1_ctrl(struct clk *clk,
int
> enable)
> return s5p_gatectrl(S5P_CLK_SRC_MASK1, clk, enable);
> }
>
> +static int exynos4_clk_hdmiphy_ctrl(struct clk *clk, int enable)
> +{
> + return s5p_gatectrl(S5P_HDMI_PHY_CONTROL, clk, enable);
> +}
> +
> +static int exynos4_clk_dac_ctrl(struct clk *clk, int enable)
> +{
> + return s5p_gatectrl(S5P_DAC_PHY_CONTROL, clk, enable);
> +}
> +
> +
Just 1 empty line is enough...
> static struct clk clk_sclk_hdmi27m = {
> .name = "sclk_hdmi27m",
> .rate = 2700,
> @@ -330,6 +341,40 @@ static struct clk init_clocks_off[] = {
> .enable = s5pv210_clk_ip0_ctrl,
> .ctrlbit= (1 << 16),
> }, {
> + .name = "dac",
> + .devname= "s5p-sdo",
> + .parent = &clk_hclk_dsys.clk,
> + .enable = s5pv210_clk_ip1_ctrl,
> + .ctrlbit= (1 << 10),
> + }, {
> + .name = "mixer",
> + .devname= "s5p-mixer",
> + .parent = &clk_hclk_dsys.clk,
> + .enable = s5pv210_clk_ip1_ctrl,
> + .ctrlbit= (1 << 9),
> + }, {
> + .name = "vp",
> + .devname= "s5p-mixer",
> + .parent = &clk_hclk_dsys.clk,
> + .enable = s5pv210_clk_ip1_ctrl,
> + .ctrlbit= (1 << 8),
> + }, {
> + .name = "hdmi",
> + .devname= "s5pv210-hdmi",
> + .parent = &clk_hclk_dsys.clk,
> + .enable = s5pv210_clk_ip1_ctrl,
> + .ctrlbit= (1 << 11),
> + }, {
> + .name = "hdmiphy",
> + .devname= "s5pv210-hdmi",
> + .enable = exynos4_clk_hdmiphy_ctrl,
> + .ctrlbit= (1 << 0),
> + }, {
> + .name = "dacphy",
> + .devname= "s5p-sdo",
> + .enable = exynos4_clk_dac_ctrl,
> + .ctrlbit= (1 << 0),
> + }, {
> .name = "otg",
> .parent = &clk_hclk_psys.clk,
> .enable = s5pv210_clk_ip1_ctrl,
> @@ -600,6 +645,26 @@ static struct clksrc_sources clkset_sclk_mixer = {
> .nr_sources = ARRAY_SIZE(clkset_sclk_mixer_list),
> };
>
> +static struct clksrc_clk clk_sclk_mixer = {
> + .clk= {
> + .name = "sclk_mixer",
> + .enable = s5pv210_clk_mask0_ctrl,
> + .ctrlbit= (1 << 1),
> + },
> + .sources = &clkset_sclk_mixer,
> + .reg_src = { .reg = S5P_CLK_SRC1, .shift = 4, .size = 1 },
> +};
> +
> +static struct clksrc_clk *sclk_tv[] = {
> + &clk_sclk_dac,
> + &clk_sclk_pixel,
> + &clk_sclk_hdmi,
> + &clk_sclk_mixer,
> + NULL,
> +};
> +
> +/* */
?
> +
> static struct clk *clkset_sclk_audio0_list[] = {
> [0] = &clk_ext_xtal_mux,
> [1] = &clk_pcmcdclk0,
> @@ -783,14 +848,6 @@ static struct clksrc_clk clksrcs[] = {
> .reg_div = { .reg = S5P_CLK_DIV4, .shift = 28, .size = 4 },
> }, {
> .clk= {
> - .name = "sclk_mixer",
> - .enable = s5pv210_clk_mask0_ctrl,
> - .ctrlbit= (1 << 1),
> - },
> - .sources = &clkset_sclk_mixer,
> - .reg_src = { .reg = S5P_CLK_SRC1, .shift = 4, .size = 1 },
> - }, {
> - .clk= {
> .name = "sclk_fimc",
> .devname= "s5pv210-fimc.0",
> .enable = s5pv210_clk_mask1_ctrl,
> @@ -981,9 +1038,6 @@ static struct clksrc_clk *sysclks[] = {
> &clk_pclk_psys,
> &clk_vpllsrc,
> &clk_sclk_vpll,
> - &clk_sclk_dac,
> - &clk_sclk_pixel,
> - &clk_sclk_hdmi,
> &clk_mout_dm
RE: [PATCH 6/8] ARM: Exynos4: enable TV support on Universal_C210 board
Marek Szyprowski wrote:
>
> From: Tomasz Stanislawski
>
> This patch adds platform devices and regulators for TV devices on
> Samsung Universal C210 board.
>
> Signed-off-by: Tomasz Stanislawski
> Signed-off-by: Kyungmin Park
> Signed-off-by: Marek Szyprowski
> ---
> arch/arm/mach-exynos4/Kconfig |2 +
> arch/arm/mach-exynos4/mach-universal_c210.c | 76
> +++
> 2 files changed, 78 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/mach-exynos4/Kconfig b/arch/arm/mach-exynos4/Kconfig
> index 8236ffb..494ff7b 100644
> --- a/arch/arm/mach-exynos4/Kconfig
> +++ b/arch/arm/mach-exynos4/Kconfig
> @@ -166,9 +166,11 @@ config MACH_UNIVERSAL_C210
> select S3C_DEV_I2C1
> select S3C_DEV_I2C3
> select S3C_DEV_I2C5
> + select S3C_DEV_I2C8
> select S5P_DEV_MFC
> select S5P_DEV_ONENAND
> select EXYNOS4_DEV_PD
> + select S5P_DEV_TV
> select EXYNOS4_SETUP_I2C1
> select EXYNOS4_SETUP_I2C3
> select EXYNOS4_SETUP_I2C5
> diff --git a/arch/arm/mach-exynos4/mach-universal_c210.c b/arch/arm/mach-
> exynos4/mach-universal_c210.c
> index 0e280d1..0fd81be 100644
> --- a/arch/arm/mach-exynos4/mach-universal_c210.c
> +++ b/arch/arm/mach-exynos4/mach-universal_c210.c
> @@ -110,6 +110,8 @@ static struct regulator_consumer_supply
> lp3974_buck1_consumer =
> static struct regulator_consumer_supply lp3974_buck2_consumer =
> REGULATOR_SUPPLY("vddg3d", NULL);
>
> +static struct regulator_consumer_supply lp3974_buck3_consumer =
> + REGULATOR_SUPPLY("vdet", "s5p-sdo");
> static struct regulator_init_data lp3974_buck1_data = {
> .constraints= {
> .name = "VINT_1.1V",
> @@ -153,6 +155,8 @@ static struct regulator_init_data lp3974_buck3_data =
{
> .enabled= 1,
> },
> },
> + .num_consumer_supplies = 1,
> + .consumer_supplies = &lp3974_buck3_consumer,
> };
>
> static struct regulator_init_data lp3974_buck4_data = {
> @@ -181,6 +185,13 @@ static struct regulator_init_data lp3974_ldo2_data =
{
> },
> };
>
> +static struct regulator_consumer_supply lp3974_ldo3_consumer[] = {
> + REGULATOR_SUPPLY("vusb_a", "s3c-hsotg"),
> + REGULATOR_SUPPLY("vdd11", "s5p-mipi-csis.0"),
Is this for TV?
> + REGULATOR_SUPPLY("vdd", "exynos4-hdmi"),
> + REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"),
> +};
> +
> static struct regulator_init_data lp3974_ldo3_data = {
> .constraints= {
> .name = "VUSB+MIPI_1.1V",
> @@ -192,6 +203,12 @@ static struct regulator_init_data lp3974_ldo3_data =
{
> .disabled = 1,
> },
> },
> + .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo3_consumer),
> + .consumer_supplies = lp3974_ldo3_consumer,
> +};
> +
> +static struct regulator_consumer_supply lp3974_ldo4_consumer[] = {
> + REGULATOR_SUPPLY("vdd_osc", "exynos4-hdmi"),
> };
>
> static struct regulator_init_data lp3974_ldo4_data = {
> @@ -205,6 +222,8 @@ static struct regulator_init_data lp3974_ldo4_data = {
> .disabled = 1,
> },
> },
> + .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo4_consumer),
> + .consumer_supplies = lp3974_ldo4_consumer,
> };
>
> static struct regulator_init_data lp3974_ldo5_data = {
> @@ -246,6 +265,11 @@ static struct regulator_init_data lp3974_ldo7_data =
{
> },
> };
>
> +static struct regulator_consumer_supply lp3974_ldo8_consumer[] = {
> + REGULATOR_SUPPLY("vusb_d", "s3c-hsotg"),
Same as above.
> + REGULATOR_SUPPLY("vdd33a_dac", "s5p-sdo"),
> +};
> +
> static struct regulator_init_data lp3974_ldo8_data = {
> .constraints= {
> .name = "VUSB+VDAC_3.3V",
> @@ -257,6 +281,8 @@ static struct regulator_init_data lp3974_ldo8_data = {
> .disabled = 1,
> },
> },
> + .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo8_consumer),
> + .consumer_supplies = lp3974_ldo8_consumer,
> };
>
> static struct regulator_init_data lp3974_ldo9_data = {
> @@ -472,6 +498,34 @@ static struct max8998_platform_data
> universal_lp3974_pdata = {
> .wakeup = true,
> };
>
> +static struct regulator_consumer_supply hdmi_fixed_consumer =
> + REGULATOR_SUPPLY("hdmi-en", "exynos4-hdmi");
> +
> +static struct regulator_init_data hdmi_fixed_voltage_init_data = {
> + .constraints= {
> + .name = "HDMI_5V",
> + .valid_ops_mask = REGULATOR_CHANGE_STATUS,
> + },
> + .num_consumer_supplies = 1,
> + .consumer_supplies = &hdmi_fixed_consumer,
> +};
> +
> +static struct fixed_voltage_config hdmi_fixed_voltage_config = {
> + .supply_name= "HDMI_EN1",
> + .microvolts = 500,
> + .gpio = EXYNOS4_GPE0(1),
> + .enable_high= true,
> + .init_data
RE: [PATCH 5/8] ARM: Exynos4: add support for TV device
Marek Szyprowski wrote:
>
> From: Tomasz Stanislawski
>
> This patch adds clocks and definitions needed by TV driver
> infrastructure for Samsung Exynos4 platform.
>
> Signed-off-by: Tomasz Stanislawski
> Signed-off-by: Kyungmin Park
> Reviewed-by: Marek Szyprowski
> Signed-off-by: Marek Szyprowski
> ---
> arch/arm/mach-exynos4/clock.c | 205
> +++
> arch/arm/mach-exynos4/cpu.c |4 +
> arch/arm/mach-exynos4/include/mach/irqs.h |4 +-
> arch/arm/mach-exynos4/include/mach/map.h| 26 +++
> arch/arm/mach-exynos4/include/mach/regs-clock.h |1 +
> arch/arm/mach-exynos4/include/mach/regs-pmu.h |6 +
> 6 files changed, 245 insertions(+), 1 deletions(-)
>
> diff --git a/arch/arm/mach-exynos4/clock.c b/arch/arm/mach-exynos4/clock.c
> index b5e6d9d..f61a82d 100644
> --- a/arch/arm/mach-exynos4/clock.c
> +++ b/arch/arm/mach-exynos4/clock.c
> @@ -83,6 +83,11 @@ static int exynos4_clk_ip_mfc_ctrl(struct clk *clk, int
enable)
> return s5p_gatectrl(S5P_CLKGATE_IP_MFC, clk, enable);
> }
>
> +static int exynos4_clksrc_mask_tv_ctrl(struct clk *clk, int enable)
> +{
> + return s5p_gatectrl(S5P_CLKSRC_MASK_TV, clk, enable);
> +}
> +
> static int exynos4_clk_ip_cam_ctrl(struct clk *clk, int enable)
> {
> return s5p_gatectrl(S5P_CLKGATE_IP_CAM, clk, enable);
> @@ -123,6 +128,16 @@ static int exynos4_clk_ip_perir_ctrl(struct clk *clk,
int
> enable)
> return s5p_gatectrl(S5P_CLKGATE_IP_PERIR, clk, enable);
> }
>
> +static int exynos4_clk_hdmiphy_ctrl(struct clk *clk, int enable)
> +{
> + return s5p_gatectrl(S5P_HDMI_PHY_CONTROL, clk, enable);
> +}
> +
> +static int exynos4_clk_dac_ctrl(struct clk *clk, int enable)
> +{
> + return s5p_gatectrl(S5P_DAC_PHY_CONTROL, clk, enable);
> +}
> +
> /* Core list of CMU_CPU side */
>
> static struct clksrc_clk clk_mout_apll = {
> @@ -449,6 +464,36 @@ static struct clk init_clocks_off[] = {
> .enable = exynos4_clk_ip_fsys_ctrl,
> .ctrlbit= (1 << 9),
> }, {
> + .name = "dac",
> + .devname= "s5p-sdo",
> + .enable = exynos4_clk_ip_tv_ctrl,
> + .ctrlbit= (1 << 2),
> + }, {
> + .name = "mixer",
> + .devname= "s5p-mixer",
> + .enable = exynos4_clk_ip_tv_ctrl,
> + .ctrlbit= (1 << 1),
> + }, {
> + .name = "vp",
> + .devname= "s5p-mixer",
> + .enable = exynos4_clk_ip_tv_ctrl,
> + .ctrlbit= (1 << 0),
> + }, {
> + .name = "hdmi",
> + .devname= "s5p-hdmi",
> + .enable = exynos4_clk_ip_tv_ctrl,
> + .ctrlbit= (1 << 3),
> + }, {
> + .name = "hdmiphy",
> + .devname= "s5p-hdmi",
> + .enable = exynos4_clk_hdmiphy_ctrl,
> + .ctrlbit= (1 << 0),
> + }, {
> + .name = "dacphy",
> + .devname= "s5p-sdo",
> + .enable = exynos4_clk_dac_ctrl,
> + .ctrlbit= (1 << 0),
> + }, {
> .name = "sata",
> .parent = &clk_aclk_133.clk,
> .enable = exynos4_clk_ip_fsys_ctrl,
> @@ -788,6 +833,82 @@ static struct clksrc_sources clkset_mout_mfc = {
> .nr_sources = ARRAY_SIZE(clkset_mout_mfc_list),
> };
>
> +static struct clk *clkset_sclk_dac_list[] = {
> + [0] = &clk_sclk_vpll.clk,
> + [1] = &clk_sclk_hdmiphy,
> +};
> +
> +static struct clksrc_sources clkset_sclk_dac = {
> + .sources= clkset_sclk_dac_list,
> + .nr_sources = ARRAY_SIZE(clkset_sclk_dac_list),
> +};
> +
> +static struct clksrc_clk clk_sclk_dac = {
> + .clk= {
> + .name = "sclk_dac",
> + .enable = exynos4_clksrc_mask_tv_ctrl,
> + .ctrlbit= (1 << 8),
> + },
> + .sources = &clkset_sclk_dac,
> + .reg_src = { .reg = S5P_CLKSRC_TV, .shift = 8, .size = 1 },
> +};
> +
> +static struct clksrc_clk clk_sclk_pixel = {
> + .clk= {
> + .name = "sclk_pixel",
> + .parent = &clk_sclk_vpll.clk,
> + },
> + .reg_div = { .reg = S5P_CLKDIV_TV, .shift = 0, .size = 4 },
> +};
> +
> +static struct clk *clkset_sclk_hdmi_list[] = {
> + [0] = &clk_sclk_pixel.clk,
> + [1] = &clk_sclk_hdmiphy,
> +};
> +
> +static struct clksrc_sources clkset_sclk_hdmi = {
> + .sources= clkset_sclk_hdmi_list,
> + .nr_sources = ARRAY_SIZE(clkset_sclk_hdmi_list),
> +};
> +
> +static struct clksrc_clk clk_sclk_hdmi = {
> + .clk= {
> + .name = "sclk_hdmi",
> + .enable = exynos4_clksrc_mask_tv_ctrl
RE: [PATCH 4/8] ARM: S5P: add support for tv device
Marek Szyprowski wrote:
>
> From: Tomasz Stanislawski
>
> This patch adds:
> - resources for TV drivers and devices
> - setters for names of TV devices
>
> Signed-off-by: Tomasz Stanislawski
> Signed-off-by: Kyungmin Park
> Signed-off-by: Marek Szyprowski
> ---
> arch/arm/plat-s5p/Kconfig|5 ++
> arch/arm/plat-s5p/Makefile |1 +
> arch/arm/plat-s5p/dev-tv.c | 100
> ++
> arch/arm/plat-samsung/include/plat/devs.h|5 ++
> arch/arm/plat-samsung/include/plat/tv-core.h | 44 +++
> 5 files changed, 155 insertions(+), 0 deletions(-)
> create mode 100644 arch/arm/plat-s5p/dev-tv.c
> create mode 100644 arch/arm/plat-samsung/include/plat/tv-core.h
>
> diff --git a/arch/arm/plat-s5p/Kconfig b/arch/arm/plat-s5p/Kconfig
> index 39ea710..c0ac32c 100644
> --- a/arch/arm/plat-s5p/Kconfig
> +++ b/arch/arm/plat-s5p/Kconfig
> @@ -91,6 +91,11 @@ config S5P_DEV_CSIS1
> help
> Compile in platform device definitions for MIPI-CSIS channel 1
>
> +config S5P_DEV_TV
> + bool
> + help
> + Compile in platform device definition for TV interface
> +
> config S5P_DEV_USB_EHCI
> bool
> help
> diff --git a/arch/arm/plat-s5p/Makefile b/arch/arm/plat-s5p/Makefile
> index 18925ab..5d5eee3 100644
> --- a/arch/arm/plat-s5p/Makefile
> +++ b/arch/arm/plat-s5p/Makefile
> @@ -33,5 +33,6 @@ obj-$(CONFIG_S5P_DEV_FIMC3) += dev-fimc3.o
> obj-$(CONFIG_S5P_DEV_ONENAND)+= dev-onenand.o
> obj-$(CONFIG_S5P_DEV_CSIS0) += dev-csis0.o
> obj-$(CONFIG_S5P_DEV_CSIS1) += dev-csis1.o
> +obj-$(CONFIG_S5P_DEV_TV) += dev-tv.o
> obj-$(CONFIG_S5P_DEV_USB_EHCI) += dev-ehci.o
> obj-$(CONFIG_S5P_SETUP_MIPIPHY) += setup-mipiphy.o
> diff --git a/arch/arm/plat-s5p/dev-tv.c b/arch/arm/plat-s5p/dev-tv.c
> new file mode 100644
> index 000..28f43a2
> --- /dev/null
> +++ b/arch/arm/plat-s5p/dev-tv.c
> @@ -0,0 +1,100 @@
> +/* linux/arch/arm/plat-s5p/dev-tv.c
> + *
> + * Copyright 2011 Samsung Electronics
> + * Tomasz Stanislawski
> + *
> + * S5P series device definition for TV device
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> +*/
> +
> +#include
> +
> +#include
> +#include
> +
> +#include
> +
> +/* HDMI interface */
> +static struct resource s5p_hdmi_resources[] = {
> + [0] = {
> + .start = S5P_PA_HDMI,
^^
Tab?
> + .end= S5P_PA_HDMI + S5P_SZ_HDMI - 1,
Tab
+ .end= S5P_PA_HDMI + SZ_XXX - 1,
Just use SZ_XXX...
> + .flags = IORESOURCE_MEM,
^^
> + },
> + [1] = {
> + .start = IRQ_HDMI,
^^
> + .end= IRQ_HDMI,
> + .flags = IORESOURCE_IRQ,
^^
> + },
> +};
> +
> +struct platform_device s5p_device_hdmi = {
> + .name = "s5p-hdmi",
^^^
> + .id = -1,
^
> + .num_resources = ARRAY_SIZE(s5p_hdmi_resources),
^^
> + .resource = s5p_hdmi_resources,
^^^
> +};
> +EXPORT_SYMBOL(s5p_device_hdmi);
> +
> +/* MIXER */
> +static struct resource s5p_mixer_resources[] = {
> + [0] = {
> + .start = S5P_PA_MIXER,
^^
> + .end= S5P_PA_MIXER + S5P_SZ_MIXER - 1,
> + .flags = IORESOURCE_MEM,
^^
> + .name = "mxr"
> + },
> + [1] = {
> + .start = S5P_PA_VP,
^^
> + .end= S5P_PA_VP + S5P_SZ_VP - 1,
> + .flags = IORESOURCE_MEM,
^^
> + .name = "vp"
> + },
> + [2] = {
> + .start = IRQ_MIXER,
^^
> + .end= IRQ_MIXER,
> + .flags = IORESOURCE_IRQ,
^^
> + .name = "irq"
> + },
> +};
> +
> +struct platform_device s5p_device_mixer = {
> + .name = "s5p-mixer",
^^^
> + .id = -1,
^
> + .num_resources = ARRAY_SIZE(s5p_mixer_resources),
^^
> + .resource = s5p_mixer_resources,
^^^
> + .dev= {
> + .coherent_dma_mask = DMA_BIT_MASK(32),
> + .dma_mask = &s5p_device_mixer.dev.coherent_dma_mask,
> + }
> +};
> +EXPORT_SYMBOL(s5p_device_mixer);
+static u64 s5p_XXX_dmamask = DMA_BIT_MAKS(32);
+struct platform_device s5p_device_mixer = {
+ .name = "s5p-mixer",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(
RE: [PATCH v2 2/2] ARM: EXYNOS4: Add more registers to be saved and restored for PM
MyungJoo Ham wrote:
>
> We need more registers to be saved and restored for PM of Exynos4210.
> Otherwise, with additional drivers running, suspend-to-RAM fails to wake
> up properly. This patch adds registers omitted in the initial PM
> patches.
>
> Signed-off-by: MyungJoo Ham
> Signed-off-by: Kyungmin Park
> --
> Changed from v1
> - removed unnecessary registers
> - As the patch 1/2 is not changed, it is not re-sent.
>
> ---
> arch/arm/mach-exynos4/pm.c | 15 ++-
> 1 files changed, 14 insertions(+), 1 deletions(-)
>
> diff --git a/arch/arm/mach-exynos4/pm.c b/arch/arm/mach-exynos4/pm.c
> index a103c13..5d6f768 100644
> --- a/arch/arm/mach-exynos4/pm.c
> +++ b/arch/arm/mach-exynos4/pm.c
> @@ -27,6 +27,7 @@
> #include
> #include
> #include
> +#include
>
> #include
> #include
> @@ -67,7 +68,9 @@ static struct sleep_save exynos4_core_save[] = {
> SAVE_ITEM(S5P_CLKSRC_TOP0),
> SAVE_ITEM(S5P_CLKSRC_TOP1),
> SAVE_ITEM(S5P_CLKSRC_CAM),
> + SAVE_ITEM(S5P_CLKSRC_TV),
> SAVE_ITEM(S5P_CLKSRC_MFC),
> + SAVE_ITEM(S5P_CLKSRC_G3D),
> SAVE_ITEM(S5P_CLKSRC_IMAGE),
> SAVE_ITEM(S5P_CLKSRC_LCD0),
> SAVE_ITEM(S5P_CLKSRC_LCD1),
> @@ -94,6 +97,7 @@ static struct sleep_save exynos4_core_save[] = {
> SAVE_ITEM(S5P_CLKDIV_PERIL4),
> SAVE_ITEM(S5P_CLKDIV_PERIL5),
> SAVE_ITEM(S5P_CLKDIV_TOP),
> + SAVE_ITEM(S5P_CLKSRC_MASK_TOP),
> SAVE_ITEM(S5P_CLKSRC_MASK_CAM),
> SAVE_ITEM(S5P_CLKSRC_MASK_TV),
> SAVE_ITEM(S5P_CLKSRC_MASK_LCD0),
> @@ -102,6 +106,7 @@ static struct sleep_save exynos4_core_save[] = {
> SAVE_ITEM(S5P_CLKSRC_MASK_FSYS),
> SAVE_ITEM(S5P_CLKSRC_MASK_PERIL0),
> SAVE_ITEM(S5P_CLKSRC_MASK_PERIL1),
> + SAVE_ITEM(S5P_CLKDIV2_RATIO),
> SAVE_ITEM(S5P_CLKGATE_SCLKCAM),
> SAVE_ITEM(S5P_CLKGATE_IP_CAM),
> SAVE_ITEM(S5P_CLKGATE_IP_TV),
> @@ -122,8 +127,10 @@ static struct sleep_save exynos4_core_save[] = {
> SAVE_ITEM(S5P_CLKGATE_IP_DMC),
> SAVE_ITEM(S5P_CLKSRC_CPU),
> SAVE_ITEM(S5P_CLKDIV_CPU),
> + SAVE_ITEM(S5P_CLKDIV_CPU + 0x4),
> SAVE_ITEM(S5P_CLKGATE_SCLKCPU),
> SAVE_ITEM(S5P_CLKGATE_IP_CPU),
> +
> /* GIC side */
> SAVE_ITEM(S5P_VA_GIC_CPU + 0x000),
> SAVE_ITEM(S5P_VA_GIC_CPU + 0x004),
> @@ -232,11 +239,17 @@ static struct sleep_save exynos4_core_save[] = {
> SAVE_ITEM(S5P_VA_GIC_DIST + 0xC20),
> SAVE_ITEM(S5P_VA_GIC_DIST + 0xC24),
>
> -
> SAVE_ITEM(S5P_VA_COMBINER_BASE + 0x000),
> SAVE_ITEM(S5P_VA_COMBINER_BASE + 0x010),
> SAVE_ITEM(S5P_VA_COMBINER_BASE + 0x020),
> SAVE_ITEM(S5P_VA_COMBINER_BASE + 0x030),
> +
> + /* SROM side */
> + SAVE_ITEM(S5P_SROM_BW),
> + SAVE_ITEM(S5P_SROM_BC0),
> + SAVE_ITEM(S5P_SROM_BC1),
> + SAVE_ITEM(S5P_SROM_BC2),
> + SAVE_ITEM(S5P_SROM_BC3),
> };
>
> static struct sleep_save exynos4_l2cc_save[] = {
> --
> 1.7.4.1
Since we don't need some definitions, please update your 1/2 patch also.
Thanks.
Best regards,
Kgene.
--
Kukjin Kim , Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
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Re: [PATCH V4 01/13] DMA: PL330: Add support runtime PM for PL330 DMAC
On Wed, Jul 20, 2011 at 4:16 PM, Boojin Kim wrote:
> Signed-off-by: Boojin Kim
> Cc: Vinod Koul
> Cc: Dan Williams
> Signed-off-by: Kukjin Kim
Acked-by: Jassi Brar
> ---
> drivers/dma/pl330.c | 75 +-
> 1 files changed, 73 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c
> index 6abe1ec..b7ecf47 100644
> --- a/drivers/dma/pl330.c
> +++ b/drivers/dma/pl330.c
> @@ -17,6 +17,7 @@
> #include
> #include
> #include
> +#include
>
> #define NR_DEFAULT_DESC 16
>
> @@ -83,6 +84,8 @@ struct dma_pl330_dmac {
>
> /* Peripheral channels connected to this DMAC */
> struct dma_pl330_chan peripherals[0]; /* keep at end */
> +
> + struct clk *clk;
> };
>
> struct dma_pl330_desc {
> @@ -696,6 +699,30 @@ pl330_probe(struct amba_device *adev, const struct
> amba_id *id)
> goto probe_err1;
> }
>
> + pdmac->clk = clk_get(&adev->dev, "dma");
> + if (IS_ERR(pdmac->clk)) {
> + dev_err(&adev->dev, "Cannot get operation clock.\n");
> + ret = -EINVAL;
> + goto probe_err1;
> + }
> +
> + amba_set_drvdata(adev, pdmac);
> +
> +#ifdef CONFIG_PM_RUNTIME
> + /* to use the runtime PM helper functions */
> + pm_runtime_enable(&adev->dev);
> +
> + /* enable the power domain */
> + if (pm_runtime_get_sync(&adev->dev)) {
> + dev_err(&adev->dev, "failed to get runtime pm\n");
> + ret = -ENODEV;
> + goto probe_err1;
> + }
> +#else
> + /* enable dma clk */
> + clk_enable(pdmac->clk);
> +#endif
> +
> irq = adev->irq[0];
> ret = request_irq(irq, pl330_irq_handler, 0,
> dev_name(&adev->dev), pi);
> @@ -763,8 +790,6 @@ pl330_probe(struct amba_device *adev, const struct
> amba_id *id)
> goto probe_err4;
> }
>
> - amba_set_drvdata(adev, pdmac);
> -
> dev_info(&adev->dev,
> "Loaded driver for PL330 DMAC-%d\n", adev->periphid);
> dev_info(&adev->dev,
> @@ -825,6 +850,13 @@ static int __devexit pl330_remove(struct amba_device
> *adev)
> res = &adev->res;
> release_mem_region(res->start, resource_size(res));
>
> +#ifdef CONFIG_PM_RUNTIME
> + pm_runtime_put(&adev->dev);
> + pm_runtime_disable(&adev->dev);
> +#else
> + clk_disable(pdmac->clk);
> +#endif
> +
> kfree(pdmac);
>
> return 0;
> @@ -838,10 +870,49 @@ static struct amba_id pl330_ids[] = {
> { 0, 0 },
> };
>
> +#ifdef CONFIG_PM_RUNTIME
> +static int pl330_runtime_suspend(struct device *dev)
> +{
> + struct dma_pl330_dmac *pdmac = dev_get_drvdata(dev);
> +
> + if (!pdmac) {
> + dev_err(dev, "failed to get dmac\n");
> + return -ENODEV;
> + }
> +
> + clk_disable(pdmac->clk);
> +
> + return 0;
> +}
> +
> +static int pl330_runtime_resume(struct device *dev)
> +{
> + struct dma_pl330_dmac *pdmac = dev_get_drvdata(dev);
> +
> + if (!pdmac) {
> + dev_err(dev, "failed to get dmac\n");
> + return -ENODEV;
> + }
> +
> + clk_enable(pdmac->clk);
> +
> + return 0;
> +}
> +#else
> +#define pl330_runtime_suspend NULL
> +#define pl330_runtime_resume NULL
> +#endif /* CONFIG_PM_RUNTIME */
> +
> +static const struct dev_pm_ops pl330_pm_ops = {
> + .runtime_suspend = pl330_runtime_suspend,
> + .runtime_resume = pl330_runtime_resume,
> +};
> +
> static struct amba_driver pl330_driver = {
> .drv = {
> .owner = THIS_MODULE,
> .name = "dma-pl330",
> + .pm = &pl330_pm_ops,
> },
> .id_table = pl330_ids,
> .probe = pl330_probe,
> --
> 1.7.1
>
>
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Re: [PATCH V4 03-1/13] DMA: PL330: Support DMA_SLAVE_CONFIG command
On Wed, Jul 20, 2011 at 4:16 PM, Boojin Kim wrote:
> Signed-off-by: Boojin Kim
> Signed-off-by: Kukjin Kim
> ---
> drivers/dma/pl330.c | 53 +-
> 1 files changed, 39 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c
> index 586ab39..880f010 100644
> --- a/drivers/dma/pl330.c
> +++ b/drivers/dma/pl330.c
> @@ -256,25 +256,50 @@ static int pl330_alloc_chan_resources(struct dma_chan
> *chan)
> static int pl330_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
> unsigned long arg)
> {
> struct dma_pl330_chan *pch = to_pchan(chan);
> - struct dma_pl330_desc *desc;
> + struct dma_pl330_desc *desc, *_dt;
> unsigned long flags;
> + struct dma_pl330_dmac *pdmac = pch->dmac;
> + struct dma_slave_config *slave_config;
> + struct dma_pl330_peri *peri;
> + LIST_HEAD(list);
>
> - /* Only supports DMA_TERMINATE_ALL */
> - if (cmd != DMA_TERMINATE_ALL)
> - return -ENXIO;
> -
> - spin_lock_irqsave(&pch->lock, flags);
> -
> - /* FLUSH the PL330 Channel thread */
> - pl330_chan_ctrl(pch->pl330_chid, PL330_OP_FLUSH);
> + switch (cmd) {
> + case DMA_TERMINATE_ALL:
> + spin_lock_irqsave(&pch->lock, flags);
>
> - /* Mark all desc done */
> - list_for_each_entry(desc, &pch->work_list, node)
> - desc->status = DONE;
> + /* FLUSH the PL330 Channel thread */
> + pl330_chan_ctrl(pch->pl330_chid, PL330_OP_FLUSH);
>
> - spin_unlock_irqrestore(&pch->lock, flags);
> + /* Mark all desc done */
> + list_for_each_entry_safe(desc, _dt, &pch->work_list , node) {
> + desc->status = DONE;
> + pch->completed = desc->txd.cookie;
> + list_move_tail(&desc->node, &list);
> + }
>
> - pl330_tasklet((unsigned long) pch);
> + list_splice_tail_init(&list, &pdmac->desc_pool);
> + spin_unlock_irqrestore(&pch->lock, flags);
> + break;
> + case DMA_SLAVE_CONFIG:
Please protect this section too using spin_lock.
> + if (slave_config->direction == DMA_TO_DEVICE) {
> + if (slave_config->dst_addr)
> + peri->fifo_addr = slave_config->dst_addr;
> + if (slave_config->dst_addr_width)
> + peri->burst_sz =
> __ffs(slave_config->dst_addr_width);
> + } else if (slave_config->direction == DMA_FROM_DEVICE) {
> + if (slave_config->src_addr)
> + peri->fifo_addr = slave_config->src_addr;
> + if (slave_config->src_addr_width)
> + peri->burst_sz =
> __ffs(slave_config->src_addr_width);
> + }
PL330 has fixed channels to peripherals.
So FIFO addresses(burst_sz too?) should already be set via platform data.
Client drivers shouldn't bother.
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RE: [PATCH 1/4] ARM: Add support for MFC device to plat-s5p, mach-s5pv210 and mach-exynos4
Marek Szyprowski wrote:
>
> From: Kamil Debski
>
> Add support for MFC device to plat-s5p, mach-exynos4, mach-s5pv210:
> - clock support
> - memory mapping and reserving
> - s5p_device_mfc platform device
>
> Signed-off-by: Kamil Debski
> Signed-off-by: Marek Szyprowski
> Signed-off-by: Kyungmin Park
> ---
> arch/arm/Kconfig |2 +
> arch/arm/mach-exynos4/clock.c | 61 ++
> arch/arm/mach-exynos4/include/mach/map.h |2 +
> arch/arm/mach-s5pv210/clock.c |7 ++
> arch/arm/mach-s5pv210/include/mach/map.h |3 +
> arch/arm/plat-s5p/Kconfig |5 +
> arch/arm/plat-s5p/Makefile|2 +-
> arch/arm/plat-s5p/dev-mfc.c | 125
> +
> arch/arm/plat-s5p/include/plat/mfc.h | 28 +++
> arch/arm/plat-samsung/include/plat/devs.h |3 +
> 10 files changed, 237 insertions(+), 1 deletions(-)
> create mode 100644 arch/arm/plat-s5p/dev-mfc.c
> create mode 100644 arch/arm/plat-s5p/include/plat/mfc.h
>
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index d39f532..fba00ef 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -754,6 +754,7 @@ config ARCH_S5PV210
> bool "Samsung S5PV210/S5PC110"
> select CPU_V7
> select ARCH_SPARSEMEM_ENABLE
> + select ARCH_HAS_HOLES_MEMORYMODEL
> select GENERIC_GPIO
> select HAVE_CLK
> select CLKDEV_LOOKUP
> @@ -772,6 +773,7 @@ config ARCH_EXYNOS4
> bool "Samsung EXYNOS4"
> select CPU_V7
> select ARCH_SPARSEMEM_ENABLE
> + select ARCH_HAS_HOLES_MEMORYMODEL
> select GENERIC_GPIO
> select HAVE_CLK
> select CLKDEV_LOOKUP
> diff --git a/arch/arm/mach-exynos4/clock.c b/arch/arm/mach-exynos4/clock.c
> index 98b5cc4a..629ea1d 100644
> --- a/arch/arm/mach-exynos4/clock.c
> +++ b/arch/arm/mach-exynos4/clock.c
> @@ -528,6 +528,11 @@ static struct clk init_clocks_off[] = {
> .enable = exynos4_clk_ip_image_ctrl,
> .ctrlbit= (1 << 0),
> }, {
> + .name = "mfc",
> + .devname= "s5p-mfc",
> + .enable = exynos4_clk_ip_mfc_ctrl,
> + .ctrlbit= (1 << 0),
> + }, {
> .name = "i2c",
> .devname= "s3c2440-i2c.0",
> .parent = &clk_aclk_100.clk,
> @@ -731,6 +736,52 @@ static struct clksrc_sources clkset_mout_g2d = {
> .nr_sources = ARRAY_SIZE(clkset_mout_g2d_list),
> };
>
> +static struct clk *clkset_mout_mfc0_list[] = {
> + [0] = &clk_mout_mpll.clk,
> + [1] = &clk_sclk_apll.clk,
> +};
> +
> +static struct clksrc_sources clkset_mout_mfc0 = {
> + .sources= clkset_mout_mfc0_list,
> + .nr_sources = ARRAY_SIZE(clkset_mout_mfc0_list),
> +};
> +
> +static struct clksrc_clk clk_mout_mfc0 = {
> + .clk= {
> + .name = "mout_mfc0",
> + },
> + .sources= &clkset_mout_mfc0,
> + .reg_src= { .reg = S5P_CLKSRC_MFC, .shift = 0, .size = 1 },
> +};
> +
> +static struct clk *clkset_mout_mfc1_list[] = {
> + [0] = &clk_mout_epll.clk,
> + [1] = &clk_sclk_vpll.clk,
> +};
> +
> +static struct clksrc_sources clkset_mout_mfc1 = {
> + .sources= clkset_mout_mfc1_list,
> + .nr_sources = ARRAY_SIZE(clkset_mout_mfc1_list),
> +};
> +
> +static struct clksrc_clk clk_mout_mfc1 = {
> + .clk= {
> + .name = "mout_mfc1",
> + },
> + .sources= &clkset_mout_mfc1,
> + .reg_src= { .reg = S5P_CLKSRC_MFC, .shift = 4, .size = 1 },
> +};
> +
> +static struct clk *clkset_mout_mfc_list[] = {
> + [0] = &clk_mout_mfc0.clk,
> + [1] = &clk_mout_mfc1.clk,
> +};
> +
> +static struct clksrc_sources clkset_mout_mfc = {
> + .sources= clkset_mout_mfc_list,
> + .nr_sources = ARRAY_SIZE(clkset_mout_mfc_list),
> +};
> +
> static struct clksrc_clk clk_dout_mmc0 = {
> .clk= {
> .name = "dout_mmc0",
> @@ -974,6 +1025,14 @@ static struct clksrc_clk clksrcs[] = {
> .reg_div = { .reg = S5P_CLKDIV_IMAGE, .shift = 0, .size = 4
},
> }, {
> .clk= {
> + .name = "sclk_mfc",
> + .devname= "s5p-mfc",
> + },
> + .sources = &clkset_mout_mfc,
> + .reg_src = { .reg = S5P_CLKSRC_MFC, .shift = 8, .size = 1 },
> + .reg_div = { .reg = S5P_CLKDIV_MFC, .shift = 0, .size = 4 },
> + }, {
> + .clk= {
> .name = "sclk_mmc",
> .devname= "s3c-sdhci.0",
> .parent = &clk_dout_mmc0.clk,
> @@ -1049,6 +1108,8 @@ static struct clksrc_clk *sysclks[] = {
> &clk_dout_mmc2,
> &clk_dout_mmc3,
> &clk_dout_mmc4,
> + &clk_
[PATCH V8 0/5] ARM: EXYNOS4: Add support EXYNOS4 FIMD
The patches are created against "for-next" branch of Kukjin Kim's tree at: git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git This was originally submitted by Jonghun Han http://www.spinics.net/lists/arm-kernel/msg101781.html This patch adds support FIMD(Fully Interactive Mobile Display) on Exynos4. The 4th patch is update for s3c-fb and others are for platform data NOTE: The common part for SMDKV310 will be updated later. v2: change clock name of exynos4 FIMD: "fimd" -> "lcd" use 'has_clksel' variable in order to distinguish FIMD version add 'lcd_clk' that can be used for only lcd pixel clock add callback 'enable_clk()' to enable parent clock 'sclk_fimd'. v3: remove the callback from the platform data structure v4: move clk_enable(sfb->lcd_clk) under the if statement v5: add clk_enable/disable(sfb->lcd_clk) to s3c_fb_runtime_suspend/resume(). v6: rename dev-fimd-24bpp.c to dev-fimd0.c add 'exynos4_fimd0_setup_clock()' to dev-fimd0.c to setup parent clock. v7: remove parent clock setting from machine directory use ¡®gpio_request_one()¡¯ to simply the gpio setting step v8: updated minor fixes o To Kukjin Kim [PATCH V8 1/5] ARM: EXYNOS4: Change clock name for FIMD [PATCH V8 2/5] ARM: EXYNOS4: Add resource definition for FIMD [PATCH V8 3/5] ARM: EXYNOS4: Add platform device and helper functions for FIMD [PATCH V8 5/5] ARM: EXYNOS4: Add platform data for EXYNOS4 FIMD and LTE480WV platform-lcd on SMDKC210 o To Paul Mundt [PATCH V8 4/5] video: s3c-fb: Add support EXYNOS4 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH V8 1/5] ARM: EXYNOS4: Change clock name for FIMD
This patch changes clock for FIMD from 'fimd' to 'lcd'.
Also, devname for FIMD is changed from 's5pv310-fb' to 'exynos4-fb'.
Signed-off-by: Jingoo Han
---
arch/arm/mach-exynos4/clock.c | 12 ++--
1 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-exynos4/clock.c b/arch/arm/mach-exynos4/clock.c
index 98b5cc4..778a202 100644
--- a/arch/arm/mach-exynos4/clock.c
+++ b/arch/arm/mach-exynos4/clock.c
@@ -405,13 +405,13 @@ static struct clk init_clocks_off[] = {
.enable = exynos4_clk_ip_cam_ctrl,
.ctrlbit= (1 << 3),
}, {
- .name = "fimd",
- .devname= "s5pv310-fb.0",
+ .name = "lcd",
+ .devname= "exynos4-fb.0",
.enable = exynos4_clk_ip_lcd0_ctrl,
.ctrlbit= (1 << 0),
}, {
- .name = "fimd",
- .devname= "s5pv310-fb.1",
+ .name = "lcd",
+ .devname= "exynos4-fb.1",
.enable = exynos4_clk_ip_lcd1_ctrl,
.ctrlbit= (1 << 0),
}, {
@@ -909,7 +909,7 @@ static struct clksrc_clk clksrcs[] = {
}, {
.clk= {
.name = "sclk_fimd",
- .devname= "s5pv310-fb.0",
+ .devname= "exynos4-fb.0",
.enable = exynos4_clksrc_mask_lcd0_ctrl,
.ctrlbit= (1 << 0),
},
@@ -919,7 +919,7 @@ static struct clksrc_clk clksrcs[] = {
}, {
.clk= {
.name = "sclk_fimd",
- .devname= "s5pv310-fb.1",
+ .devname= "exynos4-fb.1",
.enable = exynos4_clksrc_mask_lcd1_ctrl,
.ctrlbit= (1 << 0),
},
--
1.7.1
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[PATCH V8 2/5] ARM: EXYNOS4: Add resource definition for FIMD
From: Jonghun Han This patch adds resource definitions for EXYNOS4 FIMD. IRQ and SFR definitions are added. Signed-off-by: Jonghun Han Signed-off-by: Jingoo Han --- arch/arm/mach-exynos4/include/mach/irqs.h |4 arch/arm/mach-exynos4/include/mach/map.h |3 +++ 2 files changed, 7 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-exynos4/include/mach/irqs.h b/arch/arm/mach-exynos4/include/mach/irqs.h index 250427f..0d315a9 100644 --- a/arch/arm/mach-exynos4/include/mach/irqs.h +++ b/arch/arm/mach-exynos4/include/mach/irqs.h @@ -137,6 +137,10 @@ #define IRQ_SYSMMU_MFC_M1_0COMBINER_IRQ(5, 6) #define IRQ_SYSMMU_PCIE_0 COMBINER_IRQ(5, 7) +#define IRQ_FIMD0_FIFO COMBINER_IRQ(11, 0) +#define IRQ_FIMD0_VSYNCCOMBINER_IRQ(11, 1) +#define IRQ_FIMD0_SYSTEM COMBINER_IRQ(11, 2) + #define MAX_COMBINER_NR16 #define S5P_IRQ_EINT_BASE COMBINER_IRQ(MAX_COMBINER_NR, 0) diff --git a/arch/arm/mach-exynos4/include/mach/map.h b/arch/arm/mach-exynos4/include/mach/map.h index 3677356..2a5a6f6 100644 --- a/arch/arm/mach-exynos4/include/mach/map.h +++ b/arch/arm/mach-exynos4/include/mach/map.h @@ -95,6 +95,8 @@ #define EXYNOS4_PA_MIPI_CSIS0 0x1188 #define EXYNOS4_PA_MIPI_CSIS1 0x1189 +#define EXYNOS4_PA_FIMD0 0x11C0 + #define EXYNOS4_PA_HSMMC(x)(0x1251 + ((x) * 0x1)) #define EXYNOS4_PA_SATA0x1256 @@ -142,6 +144,7 @@ #define S5P_PA_FIMC3 EXYNOS4_PA_FIMC3 #define S5P_PA_MIPI_CSIS0 EXYNOS4_PA_MIPI_CSIS0 #define S5P_PA_MIPI_CSIS1 EXYNOS4_PA_MIPI_CSIS1 +#define S5P_PA_FIMD0 EXYNOS4_PA_FIMD0 #define S5P_PA_ONENAND EXYNOS4_PA_ONENAND #define S5P_PA_ONENAND_DMA EXYNOS4_PA_ONENAND_DMA #define S5P_PA_SDRAM EXYNOS4_PA_SDRAM -- 1.7.1 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH V8 3/5] ARM: EXYNOS4: Add platform device and helper functions for FIMD
From: Jonghun Han
This patch adds platform device s5p_device_fimd0 for EXYNOS4 FIMD0.
EXYNOS4 has two FIMDs(FIMD0, FIMD1). FIMD1 will be added later.
Some definitions used to enable EXYNOS4 FIMD0 are added.
Signed-off-by: Jonghun Han
Signed-off-by: Jingoo Han
---
arch/arm/mach-exynos4/Kconfig|9
arch/arm/mach-exynos4/Makefile |1 +
arch/arm/mach-exynos4/cpu.c |3 +
arch/arm/mach-exynos4/setup-fimd0.c | 43
arch/arm/plat-s5p/Kconfig|5 ++
arch/arm/plat-s5p/Makefile |1 +
arch/arm/plat-s5p/dev-fimd0.c| 67 ++
arch/arm/plat-samsung/include/plat/devs.h|1 +
arch/arm/plat-samsung/include/plat/fb-core.h | 15 ++
arch/arm/plat-samsung/include/plat/fb.h | 15 ++
10 files changed, 160 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-exynos4/setup-fimd0.c
create mode 100644 arch/arm/plat-s5p/dev-fimd0.c
diff --git a/arch/arm/mach-exynos4/Kconfig b/arch/arm/mach-exynos4/Kconfig
index a4fb109..83518b5 100644
--- a/arch/arm/mach-exynos4/Kconfig
+++ b/arch/arm/mach-exynos4/Kconfig
@@ -26,6 +26,11 @@ config EXYNOS4_DEV_AHCI
help
Compile in platform device definitions for AHCI
+config EXYNOS4_SETUP_FIMD0
+ bool
+ help
+ Common setup code for FIMD0.
+
config EXYNOS4_DEV_PD
bool
help
@@ -104,6 +109,7 @@ menu "EXYNOS4 Machines"
config MACH_SMDKC210
bool "SMDKC210"
select CPU_EXYNOS4210
+ select S5P_DEV_FIMD0
select S3C_DEV_RTC
select S3C_DEV_WDT
select S3C_DEV_I2C1
@@ -113,6 +119,7 @@ config MACH_SMDKC210
select S3C_DEV_HSMMC3
select EXYNOS4_DEV_PD
select EXYNOS4_DEV_SYSMMU
+ select EXYNOS4_SETUP_FIMD0
select EXYNOS4_SETUP_I2C1
select EXYNOS4_SETUP_SDHCI
help
@@ -121,6 +128,7 @@ config MACH_SMDKC210
config MACH_SMDKV310
bool "SMDKV310"
select CPU_EXYNOS4210
+ select S5P_DEV_FIMD0
select S3C_DEV_RTC
select S3C_DEV_WDT
select S3C_DEV_I2C1
@@ -132,6 +140,7 @@ config MACH_SMDKV310
select SAMSUNG_DEV_KEYPAD
select EXYNOS4_DEV_PD
select EXYNOS4_DEV_SYSMMU
+ select EXYNOS4_SETUP_FIMD0
select EXYNOS4_SETUP_I2C1
select EXYNOS4_SETUP_KEYPAD
select EXYNOS4_SETUP_SDHCI
diff --git a/arch/arm/mach-exynos4/Makefile b/arch/arm/mach-exynos4/Makefile
index c3c70ab..b1077f4 100644
--- a/arch/arm/mach-exynos4/Makefile
+++ b/arch/arm/mach-exynos4/Makefile
@@ -40,6 +40,7 @@ obj-$(CONFIG_EXYNOS4_DEV_PD) += dev-pd.o
obj-$(CONFIG_EXYNOS4_DEV_SYSMMU) += dev-sysmmu.o
obj-$(CONFIG_EXYNOS4_SETUP_FIMC) += setup-fimc.o
+obj-$(CONFIG_EXYNOS4_SETUP_FIMD0) += setup-fimd0.o
obj-$(CONFIG_EXYNOS4_SETUP_I2C1) += setup-i2c1.o
obj-$(CONFIG_EXYNOS4_SETUP_I2C2) += setup-i2c2.o
obj-$(CONFIG_EXYNOS4_SETUP_I2C3) += setup-i2c3.o
diff --git a/arch/arm/mach-exynos4/cpu.c b/arch/arm/mach-exynos4/cpu.c
index 910ade6..85a0b96 100644
--- a/arch/arm/mach-exynos4/cpu.c
+++ b/arch/arm/mach-exynos4/cpu.c
@@ -23,6 +23,7 @@
#include
#include
#include
+#include
#include
#include
@@ -149,6 +150,8 @@ void __init exynos4_map_io(void)
s3c_i2c0_setname("s3c2440-i2c");
s3c_i2c1_setname("s3c2440-i2c");
s3c_i2c2_setname("s3c2440-i2c");
+
+ s5p_fb_setname(0, "exynos4-fb");
}
void __init exynos4_init_clocks(int xtal)
diff --git a/arch/arm/mach-exynos4/setup-fimd0.c
b/arch/arm/mach-exynos4/setup-fimd0.c
new file mode 100644
index 000..ca7ae71
--- /dev/null
+++ b/arch/arm/mach-exynos4/setup-fimd0.c
@@ -0,0 +1,43 @@
+/* linux/arch/arm/mach-exynos4/setup-fimd0.c
+ *
+ * Copyright (c) 2009-2011 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * Base Exynos4 FIMD 0 configuration
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include
+#include
+
+#include
+#include
+
+#include
+
+void exynos4_fimd0_gpio_setup_24bpp(void)
+{
+ unsigned int reg;
+
+ s3c_gpio_cfgrange_nopull(EXYNOS4_GPF0(0), 8, S3C_GPIO_SFN(2));
+ s3c_gpio_cfgrange_nopull(EXYNOS4_GPF1(0), 8, S3C_GPIO_SFN(2));
+ s3c_gpio_cfgrange_nopull(EXYNOS4_GPF2(0), 8, S3C_GPIO_SFN(2));
+ s3c_gpio_cfgrange_nopull(EXYNOS4_GPF3(0), 4, S3C_GPIO_SFN(2));
+
+ /*
+* Set DISPLAY_CONTROL register for Display path selection.
+*
+* DISPLAY_CONTROL[1:0]
+* -
+* 00 | MIE
+* 01 | MDINE
+* 10 | FIMD : selected
+* 11 | FIMD
+*/
+ reg = __raw_readl(S3C_VA_SYS + 0x0210);
+ reg |= (1 << 1);
+ __raw_writel(reg, S3C_VA_SYS + 0x0210);
+}
diff --git a/arch/arm/pl
[PATCH V8 4/5] video: s3c-fb: Add support EXYNOS4 FIMD
This patch adds struct s3c_fb_driverdata s3c_fb_data_exynos4 for EXYNOS4
and adds lcd clock gating support.
FIMD driver needs two clocks for FIMD IP and LCD pixel clock. Previously,
both clocks are provided by using bus clock such as HCLK. However, EXYNOS4
can not select HCLK for LCD pixel clock because the EXYNOS4 FIMD IP does not
have the CLKSEL bit of VIDCON0. So, FIMD driver should provide the lcd clock
using SCLK_FIMD as LCD pixel clock for EXYNOS4.
The driver selects enabling lcd clock according to has_clksel which means
the CLKSEL bit of VIDCON0. If there is has_clksel, the driver will not
enable the lcd clock using SCLK_FIMD because bus clock using HCLK is used
a LCD pixel clock.
Signed-off-by: Jingoo Han
---
drivers/video/Kconfig |2 +-
drivers/video/s3c-fb.c | 88 +--
2 files changed, 85 insertions(+), 5 deletions(-)
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 549b960..963b8b7 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -2027,7 +2027,7 @@ config FB_TMIO_ACCELL
config FB_S3C
tristate "Samsung S3C framebuffer support"
- depends on FB && S3C_DEV_FB
+ depends on FB && (S3C_DEV_FB || S5P_DEV_FIMD0)
select FB_CFB_FILLRECT
select FB_CFB_COPYAREA
select FB_CFB_IMAGEBLIT
diff --git a/drivers/video/s3c-fb.c b/drivers/video/s3c-fb.c
index 4aecf21..cb0d3ea 100644
--- a/drivers/video/s3c-fb.c
+++ b/drivers/video/s3c-fb.c
@@ -81,6 +81,7 @@ struct s3c_fb;
* @palette: Address of palette memory, or 0 if none.
* @has_prtcon: Set if has PRTCON register.
* @has_shadowcon: Set if has SHADOWCON register.
+ * @has_clksel: Set if VIDCON0 register has CLKSEL bit.
*/
struct s3c_fb_variant {
unsigned intis_2443:1;
@@ -98,6 +99,7 @@ struct s3c_fb_variant {
unsigned inthas_prtcon:1;
unsigned inthas_shadowcon:1;
+ unsigned inthas_clksel:1;
};
/**
@@ -186,6 +188,7 @@ struct s3c_fb_vsync {
* @dev: The device that we bound to, for printing, etc.
* @regs_res: The resource we claimed for the IO registers.
* @bus_clk: The clk (hclk) feeding our interface and possibly pixclk.
+ * @lcd_clk: The clk (sclk) feeding pixclk.
* @regs: The mapped hardware registers.
* @variant: Variant information for this hardware.
* @enabled: A bitmask of enabled hardware windows.
@@ -200,6 +203,7 @@ struct s3c_fb {
struct device *dev;
struct resource *regs_res;
struct clk *bus_clk;
+ struct clk *lcd_clk;
void __iomem*regs;
struct s3c_fb_variantvariant;
@@ -336,10 +340,15 @@ static int s3c_fb_check_var(struct fb_var_screeninfo *var,
*/
static int s3c_fb_calc_pixclk(struct s3c_fb *sfb, unsigned int pixclk)
{
- unsigned long clk = clk_get_rate(sfb->bus_clk);
+ unsigned long clk;
unsigned long long tmp;
unsigned int result;
+ if (sfb->variant.has_clksel)
+ clk = clk_get_rate(sfb->bus_clk);
+ else
+ clk = clk_get_rate(sfb->lcd_clk);
+
tmp = (unsigned long long)clk;
tmp *= pixclk;
@@ -1354,13 +1363,24 @@ static int __devinit s3c_fb_probe(struct
platform_device *pdev)
clk_enable(sfb->bus_clk);
+ if (!sfb->variant.has_clksel) {
+ sfb->lcd_clk = clk_get(dev, "sclk_fimd");
+ if (IS_ERR(sfb->lcd_clk)) {
+ dev_err(dev, "failed to get lcd clock\n");
+ ret = PTR_ERR(sfb->lcd_clk);
+ goto err_bus_clk;
+ }
+
+ clk_enable(sfb->lcd_clk);
+ }
+
pm_runtime_enable(sfb->dev);
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res) {
dev_err(dev, "failed to find registers\n");
ret = -ENOENT;
- goto err_clk;
+ goto err_lcd_clk;
}
sfb->regs_res = request_mem_region(res->start, resource_size(res),
@@ -1368,7 +1388,7 @@ static int __devinit s3c_fb_probe(struct platform_device
*pdev)
if (!sfb->regs_res) {
dev_err(dev, "failed to claim register region\n");
ret = -ENOENT;
- goto err_clk;
+ goto err_lcd_clk;
}
sfb->regs = ioremap(res->start, resource_size(res));
@@ -1450,7 +1470,13 @@ err_ioremap:
err_req_region:
release_mem_region(sfb->regs_res->start, resource_size(sfb->regs_res));
-err_clk:
+err_lcd_clk:
+ if (!sfb->variant.has_clksel) {
+ clk_disable(sfb->lcd_clk);
+ clk_put(sfb->lcd_clk);
+ }
+
+err_bus_clk:
clk_disable(sfb->bus_clk);
clk_put(sfb->bus_clk);
@@ -1481,6 +1507,11 @@ static int __devexit s3c_fb_remove(struct
platform_device *pdev)
iounmap(sfb->regs);
+ if (!sfb->variant.has_clksel) {
+ clk_disable(sfb->lcd_clk);
+
[PATCH V8 5/5] ARM: EXYNOS4: Add platform data for EXYNOS4 FIMD and LTE480WV platform-lcd on SMDKC210
This patch adds support EXYNOS4 FIMD0 and LTE480WV LCD pannel
on SMDKC210 board.
Signed-off-by: Jonghun Han
Signed-off-by: Jingoo Han
---
arch/arm/mach-exynos4/mach-smdkc210.c | 71 +
1 files changed, 71 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-exynos4/mach-smdkc210.c
b/arch/arm/mach-exynos4/mach-smdkc210.c
index e645f7a..31cfcd6 100644
--- a/arch/arm/mach-exynos4/mach-smdkc210.c
+++ b/arch/arm/mach-exynos4/mach-smdkc210.c
@@ -9,7 +9,9 @@
*/
#include
+#include
#include
+#include
#include
#include
#include
@@ -19,11 +21,15 @@
#include
#include
+#include
+
#include
#include
+#include
#include
#include
#include
+#include
#include
#include
#include
@@ -111,6 +117,67 @@ static struct s3c_sdhci_platdata smdkc210_hsmmc3_pdata
__initdata = {
.clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
};
+static void lcd_lte480wv_set_power(struct plat_lcd_data *pd,
+ unsigned int power)
+{
+ if (power) {
+#if !defined(CONFIG_BACKLIGHT_PWM)
+ gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_HIGH, "GPD0");
+ gpio_free(EXYNOS4_GPD0(1));
+#endif
+ /* fire nRESET on power up */
+ gpio_request(EXYNOS4_GPX0(6), "GPX0");
+
+ gpio_direction_output(EXYNOS4_GPX0(6), 1);
+ mdelay(100);
+
+ gpio_set_value(EXYNOS4_GPX0(6), 0);
+ mdelay(10);
+
+ gpio_set_value(EXYNOS4_GPX0(6), 1);
+ mdelay(10);
+
+ gpio_free(EXYNOS4_GPX0(6));
+ } else {
+#if !defined(CONFIG_BACKLIGHT_PWM)
+ gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_LOW, "GPD0");
+ gpio_free(EXYNOS4_GPD0(1));
+#endif
+ }
+}
+
+static struct plat_lcd_data smdkc210_lcd_lte480wv_data = {
+ .set_power = lcd_lte480wv_set_power,
+};
+
+static struct platform_device smdkc210_lcd_lte480wv = {
+ .name = "platform-lcd",
+ .dev.parent = &s5p_device_fimd0.dev,
+ .dev.platform_data = &smdkc210_lcd_lte480wv_data,
+};
+
+static struct s3c_fb_pd_win smdkc210_fb_win0 = {
+ .win_mode = {
+ .left_margin= 13,
+ .right_margin = 8,
+ .upper_margin = 7,
+ .lower_margin = 5,
+ .hsync_len = 3,
+ .vsync_len = 1,
+ .xres = 800,
+ .yres = 480,
+ },
+ .max_bpp= 32,
+ .default_bpp= 24,
+};
+
+static struct s3c_fb_platdata smdkc210_lcd0_pdata __initdata = {
+ .win[0] = &smdkc210_fb_win0,
+ .vidcon0= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
+ .vidcon1= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
+ .setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
+};
+
static struct resource smdkc210_smsc911x_resources[] = {
[0] = {
.start = EXYNOS4_PA_SROM_BANK(1),
@@ -165,6 +232,8 @@ static struct platform_device *smdkc210_devices[]
__initdata = {
&exynos4_device_pd[PD_GPS],
&exynos4_device_sysmmu,
&samsung_asoc_dma,
+ &s5p_device_fimd0,
+ &smdkc210_lcd_lte480wv,
&smdkc210_smsc911x,
};
@@ -210,6 +279,8 @@ static void __init smdkc210_machine_init(void)
s3c_sdhci2_set_platdata(&smdkc210_hsmmc2_pdata);
s3c_sdhci3_set_platdata(&smdkc210_hsmmc3_pdata);
+ s5p_fimd0_set_platdata(&smdkc210_lcd0_pdata);
+
platform_add_devices(smdkc210_devices, ARRAY_SIZE(smdkc210_devices));
}
--
1.7.1
--
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RE: [PATCH 2/6] ARM: S5P64X0: Add register base and IRQ for Framebuffer
Ajay Kumar wrote: > > This patch adds: > o Framebuffer related register mappings and bit fields. > o IRQ number being used. > > Signed-off-by: Ajay Kumar > --- > arch/arm/mach-s5p64x0/include/mach/irqs.h|4 > arch/arm/mach-s5p64x0/include/mach/map.h |3 +++ > arch/arm/mach-s5p64x0/include/mach/regs-fb.h | 19 +++ > 3 files changed, 26 insertions(+), 0 deletions(-) > create mode 100644 arch/arm/mach-s5p64x0/include/mach/regs-fb.h > > diff --git a/arch/arm/mach-s5p64x0/include/mach/irqs.h b/arch/arm/mach- > s5p64x0/include/mach/irqs.h > index 513abff..09995b8 100644 > --- a/arch/arm/mach-s5p64x0/include/mach/irqs.h > +++ b/arch/arm/mach-s5p64x0/include/mach/irqs.h > @@ -85,6 +85,10 @@ > #define IRQ_S3CUART_RX4 IRQ_S5P_UART_RX4 > #define IRQ_S3CUART_RX5 IRQ_S5P_UART_RX5 > > +#define IRQ_LCD_FIFO IRQ_DISPCON0 > +#define IRQ_LCD_VSYNCIRQ_DISPCON1 > +#define IRQ_LCD_SYSTEM IRQ_DISPCON2 > + > /* S5P6450 EINT feature will be added */ > > /* > diff --git a/arch/arm/mach-s5p64x0/include/mach/map.h b/arch/arm/mach- > s5p64x0/include/mach/map.h > index 95c9125..c5ef50c 100644 > --- a/arch/arm/mach-s5p64x0/include/mach/map.h > +++ b/arch/arm/mach-s5p64x0/include/mach/map.h > @@ -47,6 +47,8 @@ > > #define S5P64X0_PA_HSMMC(x) (0xED80 + ((x) * 0x10)) > > +#define S5P64X0_PA_FB0xEE00 > + > #define S5P64X0_PA_I2S 0xF200 > #define S5P6450_PA_I2S1 0xF280 > #define S5P6450_PA_I2S2 0xF290 > @@ -64,6 +66,7 @@ > #define S3C_PA_IIC1 S5P6440_PA_IIC1 > #define S3C_PA_RTC S5P64X0_PA_RTC > #define S3C_PA_WDT S5P64X0_PA_WDT > +#define S3C_PA_FBS5P64X0_PA_FB > > #define S5P_PA_CHIPIDS5P64X0_PA_CHIPID > #define S5P_PA_SROMC S5P64X0_PA_SROMC > diff --git a/arch/arm/mach-s5p64x0/include/mach/regs-fb.h b/arch/arm/mach- > s5p64x0/include/mach/regs-fb.h > new file mode 100644 > index 000..cbb8d8c > --- /dev/null > +++ b/arch/arm/mach-s5p64x0/include/mach/regs-fb.h > @@ -0,0 +1,19 @@ > +/* > + * linux/arch/arm/mach-s5p64x0/include/mach/regs-fb.h > + * > + * Copyright (c) 2011 Samsung Electronics Co., Ltd. > + * http://www.samsung.com/ > + * > + * Framebuffer register definitions for Samsung S5P64X0. > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License version 2 as > + * published by the Free Software Foundation. > +*/ > + > +#ifndef __ASM_ARCH_MACH_REGS_FB_H > +#define __ASM_ARCH_MACH_REGS_FB_H __FILE__ > + > +#include > + > +#endif /* __ASM_ARCH_MACH_REGS_FB_H */ > -- > 1.7.1 Since I applied your cleanup mach/regs-fb.h, you have to update this to avoid conflicts. Thanks. Best regards, Kgene. -- Kukjin Kim , Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd. -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH 4/6] ARM: S5P64X0: Add GPIO and SPCON settings for LCD
Ajay Kumar wrote:
>
> This patch adds:
> o GPIO lines settings(HSYNC, VSYNC, VCLK and VD) for LCD.
> o Function to select type of LCD interface (RGB/i80)
>
> Signed-off-by: Ajay Kumar
> ---
> arch/arm/mach-s5p64x0/Kconfig |6 +++
> arch/arm/mach-s5p64x0/Makefile |1 +
> arch/arm/mach-s5p64x0/include/mach/regs-gpio.h |4 ++
> arch/arm/mach-s5p64x0/setup-fb.c | 48
>
> arch/arm/plat-samsung/include/plat/fb.h| 14 +++
> 5 files changed, 73 insertions(+), 0 deletions(-)
> create mode 100644 arch/arm/mach-s5p64x0/setup-fb.c
>
> diff --git a/arch/arm/mach-s5p64x0/Kconfig b/arch/arm/mach-s5p64x0/Kconfig
> index 017af4c..2ca5ac0 100644
> --- a/arch/arm/mach-s5p64x0/Kconfig
> +++ b/arch/arm/mach-s5p64x0/Kconfig
> @@ -21,6 +21,12 @@ config CPU_S5P6450
> help
> Enable S5P6450 CPU support
>
> +config S5P64X0_SETUP_FB
> + bool
> + help
> + Common setup code for S5P64X0 based boards with a LCD display
> + through RGB interface.
> +
> config S5P64X0_SETUP_I2C1
> bool
> help
> diff --git a/arch/arm/mach-s5p64x0/Makefile
b/arch/arm/mach-s5p64x0/Makefile
> index ae6bf6f..43698c6 100644
> --- a/arch/arm/mach-s5p64x0/Makefile
> +++ b/arch/arm/mach-s5p64x0/Makefile
> @@ -28,3 +28,4 @@ obj-y += dev-audio.o
> obj-$(CONFIG_S3C64XX_DEV_SPI)+= dev-spi.o
>
> obj-$(CONFIG_S5P64X0_SETUP_I2C1) += setup-i2c1.o
> +obj-$(CONFIG_S5P64X0_SETUP_FB) += setup-fb.o
> diff --git a/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h
b/arch/arm/mach-
> s5p64x0/include/mach/regs-gpio.h
> index 0953ef6..2f07cbd 100644
> --- a/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h
> +++ b/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h
> @@ -34,4 +34,8 @@
> #define S5P6450_GPQ_BASE (S5P_VA_GPIO + 0x0180)
> #define S5P6450_GPS_BASE (S5P_VA_GPIO + 0x0300)
>
> +#define S5P64X0_SPCON0 (S5P_VA_GPIO + 0x1A0)
> +#define S5P64X0_SPCON0_LCD_SEL_MASK (0x3 << 0)
> +#define S5P64X0_SPCON0_LCD_SEL_RGB (0x1 << 0)
> +
> #endif /* __ASM_ARCH_REGS_GPIO_H */
> diff --git a/arch/arm/mach-s5p64x0/setup-fb.c
b/arch/arm/mach-s5p64x0/setup-fb.c
> new file mode 100644
> index 000..3e8ffad
> --- /dev/null
> +++ b/arch/arm/mach-s5p64x0/setup-fb.c
> @@ -0,0 +1,48 @@
> +/* linux/arch/arm/mach-s5p64x0/setup-fb.c
> + *
> + * Copyright (c) 2011 Samsung Electronics Co., Ltd.
> + * http://www.samsung.com/
> + *
> + * Base S5P64X0 GPIO setup information for LCD framebuffer
> + *
> + * GPIO settings for LCD on any other board based on s5p64x0
> + * should go in this file.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> +*/
> +
> +#include
> +#include
> +
> +#include
> +#include
> +
> +#include
> +#include
> +
> +void s5p64x0_fb_init(int lcd_interface_type)
> +{
> + unsigned int cfg;
> +
> + /* select TFT LCD type (RGB I/F) */
> + cfg = readl(S5P64X0_SPCON0);
Since no need memory barrier here, just use __raw_readl
> + cfg &= ~S5P64X0_SPCON0_LCD_SEL_MASK;
> + cfg |= lcd_interface_type;
> + writel(cfg, S5P64X0_SPCON0);
__raw_writel
> +}
> +
> +void s5p64x0_fb_gpio_setup_24bpp(void)
> +{
> + unsigned int cfg;
> +
> + cfg = readl(S5P64X0_SYS_ID) & 0xf;
> + if (cfg == 0x4) {
> + s3c_gpio_cfgrange_nopull(S5P6440_GPI(0), 16,
> S3C_GPIO_SFN(2));
> + s3c_gpio_cfgrange_nopull(S5P6440_GPJ(0), 12,
> S3C_GPIO_SFN(2));
> + } else if (cfg == 0x5) {
> + s3c_gpio_cfgrange_nopull(S5P6450_GPI(0), 16,
> S3C_GPIO_SFN(2));
> + s3c_gpio_cfgrange_nopull(S5P6450_GPJ(0), 12,
> S3C_GPIO_SFN(2));
> + }
Following is more make sense ?
+ unsigned int chipid;
+
+ chipid = __raw_readl(S5P64X0_SYS_ID) & 0xff000;
+ if (chipd == 0x5) {
+ s3c_gpio_cfgrange_nopull(S5P6450_GPI(0), 16,
S3C_GPIO_SFN(2));
+ s3c_gpio_cfgrange_nopull(S5P6450_GPJ(0), 12,
S3C_GPIO_SFN(2));
+ } else {
+ s3c_gpio_cfgrange_nopull(S5P6440_GPI(0), 16,
S3C_GPIO_SFN(2));
+ s3c_gpio_cfgrange_nopull(S5P6440_GPJ(0), 12,
S3C_GPIO_SFN(2));
+ }
> +}
> diff --git a/arch/arm/plat-samsung/include/plat/fb.h b/arch/arm/plat-
> samsung/include/plat/fb.h
> index cb3ca3a..8147c59 100644
> --- a/arch/arm/plat-samsung/include/plat/fb.h
> +++ b/arch/arm/plat-samsung/include/plat/fb.h
> @@ -94,4 +94,18 @@ extern void s5pc100_fb_gpio_setup_24bpp(void);
> */
> extern void s5pv210_fb_gpio_setup_24bpp(void);
>
> +/**
> + * s5p64x0_fb_init() - Common setup function for LCD
> + *
> + * Select LCD I/F configuration-RGB style or i80 style
> + */
> +extern void s5p64x0_fb_init(int lcd_interface_type);
> +
> +/**
> + * s5p64x0_fb_gpio_setup_24bpp() - Common GPI
RE: [PATCH 6/6] ARM: S5P6450: Add LCD-LTE480 and enable Framebuffer support
Ajay kumar wrote:
>
> Hi Jingoo,
>
> 2011/7/15 JinGoo Han :
> > Hi, Ajay Kumar.
> > Please read my comments.
> >> -Original Message-
> >> From: Ajay Kumar [mailto:ajaykumar...@samsung.com]
> >> Sent: Thursday, July 14, 2011 10:27 PM
> >> To: kgene@samsung.com; linux-samsung-soc@vger.kernel.org;
linux-arm-
> >> ker...@lists.infradead.org; let...@linux-sh.org; jg1@samsung.com
> >> Subject: [PATCH 6/6] ARM: S5P6450: Add LCD-LTE480 and enable
Framebuffer
> >> support
> >>
> >> This patch:
> >> o Adds platform device support for LCD-LTE480.
> >> o Adds platform data for FB with win_mode and default_bpp.
> >> o Enables FB device support and platform-lcd support.
> >>
> >> Signed-off-by: Ajay Kumar
> >> ---
> >> arch/arm/mach-s5p64x0/Kconfig | 2 +
> >> arch/arm/mach-s5p64x0/mach-smdk6450.c | 63
> >> +
> >> 2 files changed, 65 insertions(+), 0 deletions(-)
> >>
> >> diff --git a/arch/arm/mach-s5p64x0/Kconfig
b/arch/arm/mach-s5p64x0/Kconfig
> >> index c69a32d..b9f3aca 100644
> >> --- a/arch/arm/mach-s5p64x0/Kconfig
> >> +++ b/arch/arm/mach-s5p64x0/Kconfig
> >> @@ -53,6 +53,7 @@ config MACH_SMDK6440
> >> config MACH_SMDK6450
> >> bool "SMDK6450"
> >> select CPU_S5P6450
> >> + select S3C_DEV_FB
> >> select S3C_DEV_I2C1
> >> select S3C_DEV_RTC
> >> select S3C_DEV_WDT
> >> @@ -60,6 +61,7 @@ config MACH_SMDK6450
> >> select SAMSUNG_DEV_ADC
> >> select SAMSUNG_DEV_PWM
> >> select SAMSUNG_DEV_TS
> >> + select S5P64X0_SETUP_FB
> >> select S5P64X0_SETUP_I2C1
> >> help
> >> Machine support for the Samsung SMDK6450
> >> diff --git a/arch/arm/mach-s5p64x0/mach-smdk6450.c b/arch/arm/mach-
> >> s5p64x0/mach-smdk6450.c
> >> index d19c469..7568f38 100644
> >> --- a/arch/arm/mach-s5p64x0/mach-smdk6450.c
> >> +++ b/arch/arm/mach-s5p64x0/mach-smdk6450.c
> >> @@ -23,6 +23,7 @@
> >> #include
> >> #include
> >> #include
> >> +#include
> >>
> >> #include
> >> #include
> >> @@ -34,6 +35,7 @@
> >> #include
> >> #include
> >> #include
> >> +#include
> >>
> >> #include
> >> #include
> >> @@ -46,6 +48,9 @@
> >> #include
> >> #include
> >> #include
> >> +#include
> >> +
> >> +#include
> >>
> >> #define SMDK6450_UCON_DEFAULT (S3C2410_UCON_TXILEVEL
> | \
> >> S3C2410_UCON_RXILEVEL | \
> >> @@ -148,6 +153,59 @@ static struct platform_device
> >> smdk6450_backlight_device = {
> >> },
> >> };
> >>
> >> +/* Frame Buffer */
> >> +static struct s3c_fb_pd_win s5p6450_fb_win0 = {
> > This information also depends on LCD panel on the board.
> > So, s5p6450_fb_win0 should be changed to smdk6450_fb_win0.
> >> +/* this is to ensure we use win0 */
> >> + .win_mode = {
> >> + .left_margin = 8,
> >> + .right_margin = 13,
> >> + .upper_margin = 7,
> >> + .lower_margin = 5,
> >> + .hsync_len = 3,
> >> + .vsync_len = 1,
> >> + .xres = 800,
> >> + .yres = 480,
> >> + .refresh = 80,
> > Why do you use 80Hz as frame rate?
> > Please don't add this, if there is no problem when using 60Hz.
> >> + },
> >> + .max_bpp = 24,
> > max_bpp can be 32bpp. FIMD of S5P6440 and S5P6450 can support ARGB
> .
> > Please use 32 as max_bpp.
> > + .max_bpp = 32,
> >> + .default_bpp = 24,
> >> + };
> > Don't useless tab space.
> > It should be as follows.
> > +};
> >> +
> >> +static struct s3c_fb_platdata s5p6450_lcd_pdata __initdata = {
> >> + .win[0] = &s5p6450_fb_win0,
> > s5p6450_fb_win0 should be changed to smdk6450_fb_win0.
> >> + .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
> >> + .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
> >> + .setup_gpio = s5p64x0_fb_gpio_setup_24bpp,
> >> +};
> >> +
> >> +/* LCD power controller */
> >> +static void s5p6450_lte480_reset_power(struct plat_lcd_data *pd,
> >> + unsigned int power)
> >> +{
> >> + int err;
> >> +
> >> + if (power) {
> >> + err = gpio_request(S5P6450_GPN(5), "GPN");
> >> + if (err)
> >> + printk(KERN_ERR "failed to request GPN for lcd
> >> reset\n");
> >> +
> >> + gpio_direction_output(S5P6450_GPN(5), 1);
> >> + gpio_set_value(S5P6450_GPN(5), 0);
> >> + gpio_set_value(S5P6450_GPN(5), 1);
> >> + gpio_free(S5P6450_GPN(5));
> >> + }
> >> +}
> >> +
> >> +static struct plat_lcd_data s5p6450_lcd_power_data = {
> >> + .set_power = s5p6450_lte480_reset_power,
> >> +};
> >> +
> >> +static struct platform_device smdk6450_lcd_lte480wv = {
> >> + .name = "platform-lcd",
> >> + .dev.parent = &s3c_device_fb.dev,
> >> + .dev.platform_data = &s5p6450_lcd_power_data,
RE: [PATCH 0/3] ARM: Add SDMMC support for S5P64X0
Rajeshwari Shinde wrote: > > From: rajeshwari.s > > S5P64X0 supports 3 Channel MMC/SDHC/SDIO. > > This patchset adds the setup files, gpio configs and enables the HSMMC device > for S5P64X0. > > o To Kukjin Kim and Sangbeom Kim > [PATCH 1/3] ARM: S5P64X0: Add HSMMC setup for host Controller > [PATCH 2/3] ARM: S5P64X0: Initialize default SDHCI devices and platform data > [PATCH 3/3] ARM: S5P64X0: Enable SDHCI support > --- As I know, I got your reply on my comments like following. -- Hi Kukjin Kim, Thank you for your comments. Will modify the patches as per comments and resend the same. Regards, Rajeshwari Shinde. -- Hi Russell, Thank you for the comment will do the change as specified. Regards, Rajeshwari Shinde. -- But I didn't get any updated patch and unfortunately, we don't have much time for upcoming merge window. One more, please don't use html type e-mail in mailing list. Thanks. Best regards, Kgene. -- Kukjin Kim , Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd. -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] ARM: EXYNOS4: Add more register addresses of CMU.
These registers are crucial for PM to work properly. Signed-off-by: MyungJoo Ham Signed-off-by: Kyungmin Park --- arch/arm/mach-exynos4/include/mach/regs-clock.h |3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-exynos4/include/mach/regs-clock.h b/arch/arm/mach-exynos4/include/mach/regs-clock.h index 64bdd24..d493fdb 100644 --- a/arch/arm/mach-exynos4/include/mach/regs-clock.h +++ b/arch/arm/mach-exynos4/include/mach/regs-clock.h @@ -36,7 +36,9 @@ #define S5P_CLKSRC_TOP0S5P_CLKREG(0x0C210) #define S5P_CLKSRC_TOP1S5P_CLKREG(0x0C214) #define S5P_CLKSRC_CAM S5P_CLKREG(0x0C220) +#define S5P_CLKSRC_TV S5P_CLKREG(0x0C224) #define S5P_CLKSRC_MFC S5P_CLKREG(0x0C228) +#define S5P_CLKSRC_G3D S5P_CLKREG(0x0C22C) #define S5P_CLKSRC_IMAGE S5P_CLKREG(0x0C230) #define S5P_CLKSRC_LCD0S5P_CLKREG(0x0C234) #define S5P_CLKSRC_LCD1S5P_CLKREG(0x0C238) @@ -64,6 +66,7 @@ #define S5P_CLKDIV_PERIL3 S5P_CLKREG(0x0C55C) #define S5P_CLKDIV_PERIL4 S5P_CLKREG(0x0C560) #define S5P_CLKDIV_PERIL5 S5P_CLKREG(0x0C564) +#define S5P_CLKDIV2_RATIO S5P_CLKREG(0x0C580) #define S5P_CLKSRC_MASK_TOPS5P_CLKREG(0x0C310) #define S5P_CLKSRC_MASK_CAMS5P_CLKREG(0x0C320) -- 1.7.4.1 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 1/6] ARM: EXYNOS4: Increase NR_IRQS for devices with more IRQs
On Thu, Jul 21, 2011 at 2:04 AM, Kukjin Kim wrote: > MyungJoo Ham wrote: >> >> MAX8997/17042, which are used by Exynos4-NURI, use additional IRQ >> numbers after GPIO's IRQs. The patch creates some room for those >> devices. >> >> Signed-off-by: MyungJoo Ham >> Signed-off-by: Kyungmin Park >> --- >> arch/arm/mach-exynos4/include/mach/irqs.h | 2 +- >> 1 files changed, 1 insertions(+), 1 deletions(-) >> >> diff --git a/arch/arm/mach-exynos4/include/mach/irqs.h b/arch/arm/mach- >> exynos4/include/mach/irqs.h >> index 31f6bed..51b5db5 100644 >> --- a/arch/arm/mach-exynos4/include/mach/irqs.h >> +++ b/arch/arm/mach-exynos4/include/mach/irqs.h >> @@ -154,6 +154,6 @@ >> #define IRQ_GPIO_END (S5P_GPIOINT_BASE + S5P_GPIOINT_COUNT) >> >> /* Set the default NR_IRQS */ >> -#define NR_IRQS (IRQ_GPIO_END) >> +#define NR_IRQS (IRQ_GPIO_END + 64) > > I applied but basically, we have to avoid using hard coded value like 64 on > this. The NR_IRQS depends on CPU not board but this change is needed for > supporting some specific board and if you need more interrupt numbers, will > you increase it? It is not good way. > > We need to fix this up next time. > > Thanks. > > Best regards, > Kgene. Alright. I'll try to let it assign or change NR_IRQS adaptively either in run-time, boot-time, or compile-time later as a seperated patch. Thank you. - MyungJoo > -- > Kukjin Kim , Senior Engineer, > SW Solution Development Team, Samsung Electronics Co., Ltd. > > -- MyungJoo Ham (함명주), Ph.D. Mobile Software Platform Lab, Digital Media and Communications (DMC) Business Samsung Electronics cell: 82-10-6714-2858 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH] ARM: EXYNOS4: Add more register addresses of CMU.
MyungJoo Ham wrote: > > These registers are crucial for PM to work properly. > > Signed-off-by: MyungJoo Ham > Signed-off-by: Kyungmin Park > --- > arch/arm/mach-exynos4/include/mach/regs-clock.h |3 +++ > 1 files changed, 3 insertions(+), 0 deletions(-) > > diff --git a/arch/arm/mach-exynos4/include/mach/regs-clock.h b/arch/arm/mach- > exynos4/include/mach/regs-clock.h > index 64bdd24..d493fdb 100644 > --- a/arch/arm/mach-exynos4/include/mach/regs-clock.h > +++ b/arch/arm/mach-exynos4/include/mach/regs-clock.h > @@ -36,7 +36,9 @@ > #define S5P_CLKSRC_TOP0 S5P_CLKREG(0x0C210) > #define S5P_CLKSRC_TOP1 S5P_CLKREG(0x0C214) > #define S5P_CLKSRC_CAM S5P_CLKREG(0x0C220) > +#define S5P_CLKSRC_TVS5P_CLKREG(0x0C224) > #define S5P_CLKSRC_MFC S5P_CLKREG(0x0C228) > +#define S5P_CLKSRC_G3D S5P_CLKREG(0x0C22C) > #define S5P_CLKSRC_IMAGE S5P_CLKREG(0x0C230) > #define S5P_CLKSRC_LCD0 S5P_CLKREG(0x0C234) > #define S5P_CLKSRC_LCD1 S5P_CLKREG(0x0C238) > @@ -64,6 +66,7 @@ > #define S5P_CLKDIV_PERIL3S5P_CLKREG(0x0C55C) > #define S5P_CLKDIV_PERIL4S5P_CLKREG(0x0C560) > #define S5P_CLKDIV_PERIL5S5P_CLKREG(0x0C564) > +#define S5P_CLKDIV2_RATIOS5P_CLKREG(0x0C580) > > #define S5P_CLKSRC_MASK_TOP S5P_CLKREG(0x0C310) > #define S5P_CLKSRC_MASK_CAM S5P_CLKREG(0x0C320) > -- > 1.7.4.1 Thanks for your updating. Applied with your 'ARM: EXYNOS4: Add more registers to be saved and restored for PM'. Best regards, Kgene. -- Kukjin Kim , Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd. -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH V2] ARM: EXYNOS4: Add support for ORIGEN board
From: JeongHyeon Kim
Insignal's ORIGEN board is based Samsung EXYNOS4210 SoC.
Signed-off-by: JeongHyeon Kim
Signed-off-by: Tushar Behera
---
Changes for V2:
- Reworked based on Kukjin's comments and rebased to kgene/for-next
arch/arm/mach-exynos4/Kconfig | 10 +++
arch/arm/mach-exynos4/Makefile |1 +
arch/arm/mach-exynos4/mach-origen.c | 108 +++
3 files changed, 119 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-exynos4/mach-origen.c
diff --git a/arch/arm/mach-exynos4/Kconfig b/arch/arm/mach-exynos4/Kconfig
index 52fc172..012c034 100644
--- a/arch/arm/mach-exynos4/Kconfig
+++ b/arch/arm/mach-exynos4/Kconfig
@@ -205,6 +205,16 @@ config MACH_NURI
help
Machine support for Samsung Mobile NURI Board.
+config MACH_ORIGEN
+ bool "ORIGEN"
+ select CPU_EXYNOS4210
+ select S3C_DEV_RTC
+ select S3C_DEV_WDT
+ select S3C_DEV_HSMMC2
+ select EXYNOS4_SETUP_SDHCI
+ help
+ Machine support for ORIGEN based on Samsung S5PV310
+
endmenu
comment "Configuration for HSMMC bus width"
diff --git a/arch/arm/mach-exynos4/Makefile b/arch/arm/mach-exynos4/Makefile
index 2a0b682..ebec49c 100644
--- a/arch/arm/mach-exynos4/Makefile
+++ b/arch/arm/mach-exynos4/Makefile
@@ -31,6 +31,7 @@ obj-$(CONFIG_MACH_SMDKV310) += mach-smdkv310.o
obj-$(CONFIG_MACH_ARMLEX4210) += mach-armlex4210.o
obj-$(CONFIG_MACH_UNIVERSAL_C210) += mach-universal_c210.o
obj-$(CONFIG_MACH_NURI)+= mach-nuri.o
+obj-$(CONFIG_MACH_ORIGEN) += mach-origen.o
# device support
diff --git a/arch/arm/mach-exynos4/mach-origen.c
b/arch/arm/mach-exynos4/mach-origen.c
new file mode 100644
index 000..ed59f86
--- /dev/null
+++ b/arch/arm/mach-exynos4/mach-origen.c
@@ -0,0 +1,108 @@
+/* linux/arch/arm/mach-exynos4/mach-origen.c
+ *
+ * Copyright (c) 2011 Insignal Co., Ltd.
+ * http://www.insignal.co.kr/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+
+/* Following are default values for UCON, ULCON and UFCON UART registers */
+#define ORIGEN_UCON_DEFAULT(S3C2410_UCON_TXILEVEL |\
+S3C2410_UCON_RXILEVEL |\
+S3C2410_UCON_TXIRQMODE | \
+S3C2410_UCON_RXIRQMODE | \
+S3C2410_UCON_RXFIFO_TOI | \
+S3C2443_UCON_RXERR_IRQEN)
+
+#define ORIGEN_ULCON_DEFAULT S3C2410_LCON_CS8
+
+#define ORIGEN_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
+S5PV210_UFCON_TXTRIG4 |\
+S5PV210_UFCON_RXTRIG4)
+
+static struct s3c2410_uartcfg origen_uartcfgs[] __initdata = {
+ [0] = {
+ .hwport = 0,
+ .flags = 0,
+ .ucon = ORIGEN_UCON_DEFAULT,
+ .ulcon = ORIGEN_ULCON_DEFAULT,
+ .ufcon = ORIGEN_UFCON_DEFAULT,
+ },
+ [1] = {
+ .hwport = 1,
+ .flags = 0,
+ .ucon = ORIGEN_UCON_DEFAULT,
+ .ulcon = ORIGEN_ULCON_DEFAULT,
+ .ufcon = ORIGEN_UFCON_DEFAULT,
+ },
+ [2] = {
+ .hwport = 2,
+ .flags = 0,
+ .ucon = ORIGEN_UCON_DEFAULT,
+ .ulcon = ORIGEN_ULCON_DEFAULT,
+ .ufcon = ORIGEN_UFCON_DEFAULT,
+ },
+ [3] = {
+ .hwport = 3,
+ .flags = 0,
+ .ucon = ORIGEN_UCON_DEFAULT,
+ .ulcon = ORIGEN_ULCON_DEFAULT,
+ .ufcon = ORIGEN_UFCON_DEFAULT,
+ },
+};
+
+static struct s3c_sdhci_platdata origen_hsmmc2_pdata __initdata = {
+ .cd_type= S3C_SDHCI_CD_GPIO,
+ .ext_cd_gpio= EXYNOS4_GPK2(2),
+ .ext_cd_gpio_invert = 1,
+ .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
+};
+
+static struct platform_device *origen_devices[] __initdata = {
+ &s3c_device_hsmmc2,
+ &s3c_device_rtc,
+ &s3c_device_wdt,
+};
+
+static void __init origen_map_io(void)
+{
+ s5p_init_io(NULL, 0, S5P_VA_CHIPID);
+ s3c24xx_init_clocks(2400);
+ s3c24xx_init_uarts(origen_uartcfgs, ARRAY_SIZE(origen_uartcfgs));
+}
+
+static void __init origen_machine_init(void)
+{
+ s3c_sdhci2_set_platdata(&origen_hsmmc2_pdata);
+ platform_add_devices(origen_devices, AR
[PATCH] ARM: S5P64X0: External Interrupt Support
Add external interrupt support for S5P64X0.The external interrupt
group 0(0 to 15) is used for wake-up source in stop and sleep mode.
Add generic irq chip support
Signed-off-by: Padmavathi Venna
---
arch/arm/mach-s5p64x0/Makefile |2 +-
arch/arm/mach-s5p64x0/include/mach/regs-gpio.h | 10 ++
arch/arm/mach-s5p64x0/irq-eint.c | 151
3 files changed, 162 insertions(+), 1 deletions(-)
create mode 100644 arch/arm/mach-s5p64x0/irq-eint.c
diff --git a/arch/arm/mach-s5p64x0/Makefile b/arch/arm/mach-s5p64x0/Makefile
index ae6bf6f..5f6afdf 100644
--- a/arch/arm/mach-s5p64x0/Makefile
+++ b/arch/arm/mach-s5p64x0/Makefile
@@ -13,7 +13,7 @@ obj- :=
# Core support for S5P64X0 system
obj-$(CONFIG_ARCH_S5P64X0) += cpu.o init.o clock.o dma.o gpiolib.o
-obj-$(CONFIG_ARCH_S5P64X0) += setup-i2c0.o
+obj-$(CONFIG_ARCH_S5P64X0) += setup-i2c0.o irq-eint.o
obj-$(CONFIG_CPU_S5P6440) += clock-s5p6440.o
obj-$(CONFIG_CPU_S5P6450) += clock-s5p6450.o
diff --git a/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h
b/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h
index 0953ef6..6ce2547 100644
--- a/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h
+++ b/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h
@@ -34,4 +34,14 @@
#define S5P6450_GPQ_BASE (S5P_VA_GPIO + 0x0180)
#define S5P6450_GPS_BASE (S5P_VA_GPIO + 0x0300)
+/* External interrupt control registers for group0 */
+
+#define EINT0CON0_OFFSET (0x900)
+#define EINT0MASK_OFFSET (0x920)
+#define EINT0PEND_OFFSET (0x924)
+
+#define S5P64X0_EINT0CON0 (S5P_VA_GPIO + EINT0CON0_OFFSET)
+#define S5P64X0_EINT0MASK (S5P_VA_GPIO + EINT0MASK_OFFSET)
+#define S5P64X0_EINT0PEND (S5P_VA_GPIO + EINT0PEND_OFFSET)
+
#endif /* __ASM_ARCH_REGS_GPIO_H */
diff --git a/arch/arm/mach-s5p64x0/irq-eint.c b/arch/arm/mach-s5p64x0/irq-eint.c
new file mode 100644
index 000..eeb56f0
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/irq-eint.c
@@ -0,0 +1,151 @@
+/* arch/arm/mach-s5p64x0/irq-eint.c
+ *
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd
+ * http://www.samsung.com/
+ *
+ * Based on linux/arch/arm/mach-s3c64xx/irq-eint.c
+ *
+ * S5P64X0 - Interrupt handling for External Interrupts.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include
+#include
+#include
+#include
+
+#include
+#include
+
+#include
+#include
+
+#define eint_offset(irq) ((irq) - IRQ_EINT(0))
+
+static int s5p64x0_irq_eint_set_type(struct irq_data *data, unsigned int type)
+{
+ int offs = eint_offset(data->irq);
+ int shift;
+ u32 ctrl, mask;
+ u32 newvalue = 0;
+
+ if (offs > 15)
+ return -EINVAL;
+
+ switch (type) {
+ case IRQ_TYPE_NONE:
+ printk(KERN_WARNING "No edge setting!\n");
+ break;
+ case IRQ_TYPE_EDGE_RISING:
+ newvalue = S3C2410_EXTINT_RISEEDGE;
+ break;
+ case IRQ_TYPE_EDGE_FALLING:
+ newvalue = S3C2410_EXTINT_FALLEDGE;
+ break;
+ case IRQ_TYPE_EDGE_BOTH:
+ newvalue = S3C2410_EXTINT_BOTHEDGE;
+ break;
+ case IRQ_TYPE_LEVEL_LOW:
+ newvalue = S3C2410_EXTINT_LOWLEV;
+ break;
+ case IRQ_TYPE_LEVEL_HIGH:
+ newvalue = S3C2410_EXTINT_HILEV;
+ break;
+ default:
+ printk(KERN_ERR "No such irq type %d", type);
+ return -EINVAL;
+ }
+
+ shift = (offs / 2) * 4;
+ mask = 0x7 << shift;
+
+ ctrl = __raw_readl(S5P64X0_EINT0CON0) & ~mask;
+ ctrl |= newvalue << shift;
+ __raw_writel(ctrl, S5P64X0_EINT0CON0);
+
+ /* Configure the GPIO pin for 6450 or 6440 based on CPU ID */
+ if (0x5 == (__raw_readl(S5P64X0_SYS_ID) & 0xFF000))
+ s3c_gpio_cfgpin(S5P6450_GPN(offs), S3C_GPIO_SFN(2));
+ else
+ s3c_gpio_cfgpin(S5P6440_GPN(offs), S3C_GPIO_SFN(2));
+
+ return 0;
+}
+
+/*
+ * s5p64x0_irq_demux_eint
+ *
+ * This function demuxes the IRQ from the group0 external interrupts,
+ * from IRQ_EINT(0) to IRQ_EINT(15). It is designed to be inlined into
+ * the specific handlers s5p64x0_irq_demux_eintX_Y.
+ */
+static inline void s5p64x0_irq_demux_eint(unsigned int start, unsigned int end)
+{
+ u32 status = __raw_readl(S5P64X0_EINT0PEND);
+ u32 mask = __raw_readl(S5P64X0_EINT0MASK);
+ unsigned int irq;
+
+ status &= ~mask;
+ status >>= start;
+ status &= (1 << (end - start + 1)) - 1;
+
+ for (irq = IRQ_EINT(start); irq <= IRQ_EINT(end); irq++) {
+ if (status & 1)
+ generic_handle_irq(irq);
+ status >>=
RE: [PATCH V4 03-1/13] DMA: PL330: Support DMA_SLAVE_CONFIG command
Jassi Brar wrote:
> Sent: Thursday, July 21, 2011 4:18 AM
> To: Boojin Kim
> Cc: linux-arm-ker...@lists.infradead.org; linux-samsung-soc@vger.kernel.org;
> Vinod Koul; Dan Williams; Kukjin Kim
> Subject: Re: [PATCH V4 03-1/13] DMA: PL330: Support DMA_SLAVE_CONFIG command
>
> On Wed, Jul 20, 2011 at 4:16 PM, Boojin Kim wrote:
> > Signed-off-by: Boojin Kim
> > Signed-off-by: Kukjin Kim
> > ---
> > drivers/dma/pl330.c | 53
> > +--
> ---
> > 1 files changed, 39 insertions(+), 14 deletions(-)
> >
> > diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c
> > index 586ab39..880f010 100644
> > --- a/drivers/dma/pl330.c
> > +++ b/drivers/dma/pl330.c
> > @@ -256,25 +256,50 @@ static int pl330_alloc_chan_resources(struct
> > dma_chan
> *chan)
> > static int pl330_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
> unsigned long arg)
> > {
> >struct dma_pl330_chan *pch = to_pchan(chan);
> > - struct dma_pl330_desc *desc;
> > + struct dma_pl330_desc *desc, *_dt;
> >unsigned long flags;
> > + struct dma_pl330_dmac *pdmac = pch->dmac;
> > + struct dma_slave_config *slave_config;
> > + struct dma_pl330_peri *peri;
> > + LIST_HEAD(list);
> >
> > - /* Only supports DMA_TERMINATE_ALL */
> > - if (cmd != DMA_TERMINATE_ALL)
> > - return -ENXIO;
> > -
> > - spin_lock_irqsave(&pch->lock, flags);
> > -
> > - /* FLUSH the PL330 Channel thread */
> > - pl330_chan_ctrl(pch->pl330_chid, PL330_OP_FLUSH);
> > + switch (cmd) {
> > + case DMA_TERMINATE_ALL:
> > + spin_lock_irqsave(&pch->lock, flags);
> >
> > - /* Mark all desc done */
> > - list_for_each_entry(desc, &pch->work_list, node)
> > - desc->status = DONE;
> > + /* FLUSH the PL330 Channel thread */
> > + pl330_chan_ctrl(pch->pl330_chid, PL330_OP_FLUSH);
> >
> > - spin_unlock_irqrestore(&pch->lock, flags);
> > + /* Mark all desc done */
> > + list_for_each_entry_safe(desc, _dt, &pch->work_list ,
> > node)
> {
> > + desc->status = DONE;
> > + pch->completed = desc->txd.cookie;
> > + list_move_tail(&desc->node, &list);
> > + }
> >
> > - pl330_tasklet((unsigned long) pch);
> > + list_splice_tail_init(&list, &pdmac->desc_pool);
> > + spin_unlock_irqrestore(&pch->lock, flags);
> > + break;
> > + case DMA_SLAVE_CONFIG:
> Please protect this section too using spin_lock.
Why is spin_lock need here?
This code just sets configuration data into own channel structure.
>
>
> > + if (slave_config->direction == DMA_TO_DEVICE) {
> > + if (slave_config->dst_addr)
> > + peri->fifo_addr = slave_config->dst_addr;
> > + if (slave_config->dst_addr_width)
> > + peri->burst_sz = __ffs(slave_config-
> >dst_addr_width);
> > + } else if (slave_config->direction == DMA_FROM_DEVICE) {
> > + if (slave_config->src_addr)
> > + peri->fifo_addr = slave_config->src_addr;
> > + if (slave_config->src_addr_width)
> > + peri->burst_sz = __ffs(slave_config-
> >src_addr_width);
> > + }
> PL330 has fixed channels to peripherals.
> So FIFO addresses(burst_sz too?) should already be set via platform data.
> Client drivers shouldn't bother.
First, DMA machine code should know the FIFO address of all client drivers to
set via platform data.
In this case, Problem is that the definition of FIFO address is almost
declared to the header file of client driver.
For example, sound\soc\samsung\regs-i2s-v2.h only has the definition of fifo
address as following.
#define S3C2412_IISTXD (0x10)
#define S3C2412_IISRXD (0x14)
These definitions should be referred to DMA machine code to set fifo address
through platform data.
I think it's not good method.
And, SLAVE_CONFIG command exist to pass slave configuration data from client
driver to DMA driver.
So, I think that it's proper to pass fifo address through SLAVE_CONFIG
command.
Second, 'burst_sz' isn't fixed value. Namely, Client driver changes 'burst_sz'
according to its usecase.
For example, I2S driver sets 'burst_sz' to 4 in case of stereo
playback/recording. But in case of mono playback/recording, It changes
'burst_sz' to 2.
So, Client driver should use SLAVE_CONFIG command to set 'burst_sz' because
it's not fixed value.
>
>
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Re: [PATCH V2] ARM: EXYNOS4: Add support for ORIGEN board
On Thursday 21 July 2011 10:02 AM, Sachin Kamat wrote:
On 21 July 2011 09:27, Tushar Behera wrote:
From: JeongHyeon Kim
Insignal's ORIGEN board is based Samsung EXYNOS4210 SoC.
Signed-off-by: JeongHyeon Kim
Signed-off-by: Tushar Behera
---
Changes for V2:
- Reworked based on Kukjin's comments and rebased to kgene/for-next
arch/arm/mach-exynos4/Kconfig | 10 +++
arch/arm/mach-exynos4/Makefile |1 +
arch/arm/mach-exynos4/mach-origen.c | 108
+++
3 files changed, 119 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-exynos4/mach-origen.c
diff --git a/arch/arm/mach-exynos4/Kconfig b/arch/arm/mach-exynos4/Kconfig
index 52fc172..012c034 100644
--- a/arch/arm/mach-exynos4/Kconfig
+++ b/arch/arm/mach-exynos4/Kconfig
@@ -205,6 +205,16 @@ config MACH_NURI
help
Machine support for Samsung Mobile NURI Board.
+config MACH_ORIGEN
+ bool "ORIGEN"
+ select CPU_EXYNOS4210
+ select S3C_DEV_RTC
+ select S3C_DEV_WDT
+ select S3C_DEV_HSMMC2
+ select EXYNOS4_SETUP_SDHCI
+ help
+ Machine support for ORIGEN based on Samsung S5PV310
Use Exynos4(210) instead of S5PV310.
Ok.
Hi Kukjin,
Should I re-submit with this change?
+
endmenu
comment "Configuration for HSMMC bus width"
diff --git a/arch/arm/mach-exynos4/Makefile
b/arch/arm/mach-exynos4/Makefile
index 2a0b682..ebec49c 100644
--- a/arch/arm/mach-exynos4/Makefile
+++ b/arch/arm/mach-exynos4/Makefile
@@ -31,6 +31,7 @@ obj-$(CONFIG_MACH_SMDKV310) += mach-smdkv310.o
obj-$(CONFIG_MACH_ARMLEX4210) += mach-armlex4210.o
obj-$(CONFIG_MACH_UNIVERSAL_C210) += mach-universal_c210.o
obj-$(CONFIG_MACH_NURI)+= mach-nuri.o
+obj-$(CONFIG_MACH_ORIGEN) += mach-origen.o
# device support
diff --git a/arch/arm/mach-exynos4/mach-origen.c
b/arch/arm/mach-exynos4/mach-origen.c
new file mode 100644
index 000..ed59f86
--- /dev/null
+++ b/arch/arm/mach-exynos4/mach-origen.c
@@ -0,0 +1,108 @@
+/* linux/arch/arm/mach-exynos4/mach-origen.c
+ *
+ * Copyright (c) 2011 Insignal Co., Ltd.
+ * http://www.insignal.co.kr/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+
+/* Following are default values for UCON, ULCON and UFCON UART registers
*/
+#define ORIGEN_UCON_DEFAULT(S3C2410_UCON_TXILEVEL |\
+S3C2410_UCON_RXILEVEL |\
+S3C2410_UCON_TXIRQMODE | \
+S3C2410_UCON_RXIRQMODE | \
+S3C2410_UCON_RXFIFO_TOI | \
+S3C2443_UCON_RXERR_IRQEN)
+
+#define ORIGEN_ULCON_DEFAULT S3C2410_LCON_CS8
+
+#define ORIGEN_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
+S5PV210_UFCON_TXTRIG4 |\
+S5PV210_UFCON_RXTRIG4)
+
+static struct s3c2410_uartcfg origen_uartcfgs[] __initdata = {
+ [0] = {
+ .hwport = 0,
+ .flags = 0,
+ .ucon = ORIGEN_UCON_DEFAULT,
+ .ulcon = ORIGEN_ULCON_DEFAULT,
+ .ufcon = ORIGEN_UFCON_DEFAULT,
+ },
+ [1] = {
+ .hwport = 1,
+ .flags = 0,
+ .ucon = ORIGEN_UCON_DEFAULT,
+ .ulcon = ORIGEN_ULCON_DEFAULT,
+ .ufcon = ORIGEN_UFCON_DEFAULT,
+ },
+ [2] = {
+ .hwport = 2,
+ .flags = 0,
+ .ucon = ORIGEN_UCON_DEFAULT,
+ .ulcon = ORIGEN_ULCON_DEFAULT,
+ .ufcon = ORIGEN_UFCON_DEFAULT,
+ },
+ [3] = {
+ .hwport = 3,
+ .flags = 0,
+ .ucon = ORIGEN_UCON_DEFAULT,
+ .ulcon = ORIGEN_ULCON_DEFAULT,
+ .ufcon = ORIGEN_UFCON_DEFAULT,
+ },
+};
+
+static struct s3c_sdhci_platdata origen_hsmmc2_pdata __initdata = {
+ .cd_type= S3C_SDHCI_CD_GPIO,
+ .ext_cd_gpio= EXYNOS4_GPK2(2),
+ .ext_cd_gpio_invert = 1,
+ .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
+};
+
+static struct platform_device *origen_devices[] __initdata = {
+&s3c_device_hsmmc2,
+&s3c_device_rtc,
+&s3c_device_wdt,
+};
+
+static void __init origen_map_io(void)
+{
+ s5p_init_io(NULL, 0, S5P_VA_CHIPID);
+ s3c24xx_init_clocks(2400);
+ s3c24xx_init_uarts(origen_uartcfgs, ARRAY_SIZE(orige
Re: [PATCH V4 03-1/13] DMA: PL330: Support DMA_SLAVE_CONFIG command
On Thu, Jul 21, 2011 at 9:43 AM, Boojin Kim wrote:
>> > - pl330_tasklet((unsigned long) pch);
>> > + list_splice_tail_init(&list, &pdmac->desc_pool);
>> > + spin_unlock_irqrestore(&pch->lock, flags);
>> > + break;
>> > + case DMA_SLAVE_CONFIG:
>> Please protect this section too using spin_lock.
> Why is spin_lock need here?
> This code just sets configuration data into own channel structure.
It does seem unncessary, but the configuration that is set here is read
in other parts of the driver. However unlikely but there is theoretical
possibility of race here - one shouldn't count upon goodness of client drivers.
>>
>> > + if (slave_config->direction == DMA_TO_DEVICE) {
>> > + if (slave_config->dst_addr)
>> > + peri->fifo_addr = slave_config->dst_addr;
>> > + if (slave_config->dst_addr_width)
>> > + peri->burst_sz = __ffs(slave_config-
>> >dst_addr_width);
>> > + } else if (slave_config->direction == DMA_FROM_DEVICE) {
>> > + if (slave_config->src_addr)
>> > + peri->fifo_addr = slave_config->src_addr;
>> > + if (slave_config->src_addr_width)
>> > + peri->burst_sz = __ffs(slave_config-
>> >src_addr_width);
>> > + }
>> PL330 has fixed channels to peripherals.
>> So FIFO addresses(burst_sz too?) should already be set via platform data.
>> Client drivers shouldn't bother.
>
> First, DMA machine code should know the FIFO address of all client drivers to
> set via platform data.
> In this case, Problem is that the definition of FIFO address is almost
> declared to the header file of client driver.
> For example, sound\soc\samsung\regs-i2s-v2.h only has the definition of fifo
> address as following.
>
> #define S3C2412_IISTXD (0x10)
> #define S3C2412_IISRXD (0x14)
>
> These definitions should be referred to DMA machine code to set fifo address
> through platform data.
> I think it's not good method.
Crap!
Client drivers don't conjure up the fifo address - if not hardcoded they
are gotten via platform_data already.
> And, SLAVE_CONFIG command exist to pass slave configuration data from client
> driver to DMA driver.
> So, I think that it's proper to pass fifo address through SLAVE_CONFIG
> command.
If it's still not clear, read the para above definition of 'struct
dma_slave_config'
in include/linux/dmaengine.h
>
> Second, 'burst_sz' isn't fixed value. Namely, Client driver changes 'burst_sz'
> according to its usecase.
> For example, I2S driver sets 'burst_sz' to 4 in case of stereo
> playback/recording. But in case of mono playback/recording, It changes
> 'burst_sz' to 2.
> So, Client driver should use SLAVE_CONFIG command to set 'burst_sz' because
> it's not fixed value.
>
Yeah yeah, ok, that's why I put that with a ? in bracket.
I just don't remember testing with fixed burst_sz with pl330.
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[no subject]
Add external interrupt support for S5P64X0.The external interrupt
group 0(0 to 15) is used for wake-up source in stop and sleep mode.
Add generic irq chip support
Signed-off-by: Padmavathi Venna
---
Please ignore my previous patch due to wrong return value.
arch/arm/mach-s5p64x0/Makefile |2 +-
arch/arm/mach-s5p64x0/include/mach/regs-gpio.h | 10 ++
arch/arm/mach-s5p64x0/irq-eint.c | 152
3 files changed, 163 insertions(+), 1 deletions(-)
create mode 100644 arch/arm/mach-s5p64x0/irq-eint.c
diff --git a/arch/arm/mach-s5p64x0/Makefile b/arch/arm/mach-s5p64x0/Makefile
index ae6bf6f..5f6afdf 100644
--- a/arch/arm/mach-s5p64x0/Makefile
+++ b/arch/arm/mach-s5p64x0/Makefile
@@ -13,7 +13,7 @@ obj- :=
# Core support for S5P64X0 system
obj-$(CONFIG_ARCH_S5P64X0) += cpu.o init.o clock.o dma.o gpiolib.o
-obj-$(CONFIG_ARCH_S5P64X0) += setup-i2c0.o
+obj-$(CONFIG_ARCH_S5P64X0) += setup-i2c0.o irq-eint.o
obj-$(CONFIG_CPU_S5P6440) += clock-s5p6440.o
obj-$(CONFIG_CPU_S5P6450) += clock-s5p6450.o
diff --git a/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h
b/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h
index 0953ef6..6ce2547 100644
--- a/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h
+++ b/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h
@@ -34,4 +34,14 @@
#define S5P6450_GPQ_BASE (S5P_VA_GPIO + 0x0180)
#define S5P6450_GPS_BASE (S5P_VA_GPIO + 0x0300)
+/* External interrupt control registers for group0 */
+
+#define EINT0CON0_OFFSET (0x900)
+#define EINT0MASK_OFFSET (0x920)
+#define EINT0PEND_OFFSET (0x924)
+
+#define S5P64X0_EINT0CON0 (S5P_VA_GPIO + EINT0CON0_OFFSET)
+#define S5P64X0_EINT0MASK (S5P_VA_GPIO + EINT0MASK_OFFSET)
+#define S5P64X0_EINT0PEND (S5P_VA_GPIO + EINT0PEND_OFFSET)
+
#endif /* __ASM_ARCH_REGS_GPIO_H */
diff --git a/arch/arm/mach-s5p64x0/irq-eint.c b/arch/arm/mach-s5p64x0/irq-eint.c
new file mode 100644
index 000..69ed454
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/irq-eint.c
@@ -0,0 +1,152 @@
+/* arch/arm/mach-s5p64x0/irq-eint.c
+ *
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd
+ * http://www.samsung.com/
+ *
+ * Based on linux/arch/arm/mach-s3c64xx/irq-eint.c
+ *
+ * S5P64X0 - Interrupt handling for External Interrupts.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include
+#include
+#include
+#include
+
+#include
+#include
+
+#include
+#include
+
+#define eint_offset(irq) ((irq) - IRQ_EINT(0))
+
+static int s5p64x0_irq_eint_set_type(struct irq_data *data, unsigned int type)
+{
+ int offs = eint_offset(data->irq);
+ int shift;
+ u32 ctrl, mask;
+ u32 newvalue = 0;
+
+ if (offs > 15)
+ return -EINVAL;
+
+ switch (type) {
+ case IRQ_TYPE_NONE:
+ printk(KERN_WARNING "No edge setting!\n");
+ break;
+ case IRQ_TYPE_EDGE_RISING:
+ newvalue = S3C2410_EXTINT_RISEEDGE;
+ break;
+ case IRQ_TYPE_EDGE_FALLING:
+ newvalue = S3C2410_EXTINT_FALLEDGE;
+ break;
+ case IRQ_TYPE_EDGE_BOTH:
+ newvalue = S3C2410_EXTINT_BOTHEDGE;
+ break;
+ case IRQ_TYPE_LEVEL_LOW:
+ newvalue = S3C2410_EXTINT_LOWLEV;
+ break;
+ case IRQ_TYPE_LEVEL_HIGH:
+ newvalue = S3C2410_EXTINT_HILEV;
+ break;
+ default:
+ printk(KERN_ERR "No such irq type %d", type);
+ return -EINVAL;
+ }
+
+ shift = (offs / 2) * 4;
+ mask = 0x7 << shift;
+
+ ctrl = __raw_readl(S5P64X0_EINT0CON0) & ~mask;
+ ctrl |= newvalue << shift;
+ __raw_writel(ctrl, S5P64X0_EINT0CON0);
+
+ /* Configure the GPIO pin for 6450 or 6440 based on CPU ID */
+ if (0x5 == (__raw_readl(S5P64X0_SYS_ID) & 0xFF000))
+ s3c_gpio_cfgpin(S5P6450_GPN(offs), S3C_GPIO_SFN(2));
+ else
+ s3c_gpio_cfgpin(S5P6440_GPN(offs), S3C_GPIO_SFN(2));
+
+ return 0;
+}
+
+/*
+ * s5p64x0_irq_demux_eint
+ *
+ * This function demuxes the IRQ from the group0 external interrupts,
+ * from IRQ_EINT(0) to IRQ_EINT(15). It is designed to be inlined into
+ * the specific handlers s5p64x0_irq_demux_eintX_Y.
+ */
+static inline void s5p64x0_irq_demux_eint(unsigned int start, unsigned int end)
+{
+ u32 status = __raw_readl(S5P64X0_EINT0PEND);
+ u32 mask = __raw_readl(S5P64X0_EINT0MASK);
+ unsigned int irq;
+
+ status &= ~mask;
+ status >>= start;
+ status &= (1 << (end - start + 1)) - 1;
+
+ for (irq = IRQ_EINT(start); irq <= IRQ_EINT(end); irq++) {
+ if (status & 1)
+
Re:
On Thursday 21 July 2011 04:42 PM, Padmavathi Venna wrote:
Add external interrupt support for S5P64X0.The external interrupt
group 0(0 to 15) is used for wake-up source in stop and sleep mode.
Add generic irq chip support
Comment looks incomplete.
Signed-off-by: Padmavathi Venna
Subject line seems missing in the patch.
---
Please ignore my previous patch due to wrong return value.
arch/arm/mach-s5p64x0/Makefile |2 +-
arch/arm/mach-s5p64x0/include/mach/regs-gpio.h | 10 ++
arch/arm/mach-s5p64x0/irq-eint.c | 152
3 files changed, 163 insertions(+), 1 deletions(-)
create mode 100644 arch/arm/mach-s5p64x0/irq-eint.c
diff --git a/arch/arm/mach-s5p64x0/Makefile b/arch/arm/mach-s5p64x0/Makefile
index ae6bf6f..5f6afdf 100644
--- a/arch/arm/mach-s5p64x0/Makefile
+++ b/arch/arm/mach-s5p64x0/Makefile
@@ -13,7 +13,7 @@ obj- :=
# Core support for S5P64X0 system
obj-$(CONFIG_ARCH_S5P64X0)+= cpu.o init.o clock.o dma.o gpiolib.o
-obj-$(CONFIG_ARCH_S5P64X0) += setup-i2c0.o
+obj-$(CONFIG_ARCH_S5P64X0) += setup-i2c0.o irq-eint.o
obj-$(CONFIG_CPU_S5P6440) += clock-s5p6440.o
obj-$(CONFIG_CPU_S5P6450) += clock-s5p6450.o
diff --git a/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h
b/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h
index 0953ef6..6ce2547 100644
--- a/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h
+++ b/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h
@@ -34,4 +34,14 @@
#define S5P6450_GPQ_BASE (S5P_VA_GPIO + 0x0180)
#define S5P6450_GPS_BASE (S5P_VA_GPIO + 0x0300)
+/* External interrupt control registers for group0 */
+
+#define EINT0CON0_OFFSET (0x900)
+#define EINT0MASK_OFFSET (0x920)
+#define EINT0PEND_OFFSET (0x924)
+
+#define S5P64X0_EINT0CON0 (S5P_VA_GPIO + EINT0CON0_OFFSET)
+#define S5P64X0_EINT0MASK (S5P_VA_GPIO + EINT0MASK_OFFSET)
+#define S5P64X0_EINT0PEND (S5P_VA_GPIO + EINT0PEND_OFFSET)
+
#endif /* __ASM_ARCH_REGS_GPIO_H */
diff --git a/arch/arm/mach-s5p64x0/irq-eint.c b/arch/arm/mach-s5p64x0/irq-eint.c
new file mode 100644
index 000..69ed454
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/irq-eint.c
@@ -0,0 +1,152 @@
+/* arch/arm/mach-s5p64x0/irq-eint.c
+ *
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd
+ * http://www.samsung.com/
+ *
+ * Based on linux/arch/arm/mach-s3c64xx/irq-eint.c
+ *
+ * S5P64X0 - Interrupt handling for External Interrupts.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include
+#include
+#include
+#include
+
+#include
+#include
+
+#include
+#include
+
+#define eint_offset(irq) ((irq) - IRQ_EINT(0))
+
+static int s5p64x0_irq_eint_set_type(struct irq_data *data, unsigned int type)
+{
+ int offs = eint_offset(data->irq);
+ int shift;
+ u32 ctrl, mask;
+ u32 newvalue = 0;
+
+ if (offs> 15)
+ return -EINVAL;
+
+ switch (type) {
+ case IRQ_TYPE_NONE:
+ printk(KERN_WARNING "No edge setting!\n");
+ break;
+ case IRQ_TYPE_EDGE_RISING:
+ newvalue = S3C2410_EXTINT_RISEEDGE;
+ break;
+ case IRQ_TYPE_EDGE_FALLING:
+ newvalue = S3C2410_EXTINT_FALLEDGE;
+ break;
+ case IRQ_TYPE_EDGE_BOTH:
+ newvalue = S3C2410_EXTINT_BOTHEDGE;
+ break;
+ case IRQ_TYPE_LEVEL_LOW:
+ newvalue = S3C2410_EXTINT_LOWLEV;
+ break;
+ case IRQ_TYPE_LEVEL_HIGH:
+ newvalue = S3C2410_EXTINT_HILEV;
+ break;
+ default:
+ printk(KERN_ERR "No such irq type %d", type);
+ return -EINVAL;
+ }
+
+ shift = (offs / 2) * 4;
+ mask = 0x7<< shift;
+
+ ctrl = __raw_readl(S5P64X0_EINT0CON0)& ~mask;
+ ctrl |= newvalue<< shift;
+ __raw_writel(ctrl, S5P64X0_EINT0CON0);
+
+ /* Configure the GPIO pin for 6450 or 6440 based on CPU ID */
+ if (0x5 == (__raw_readl(S5P64X0_SYS_ID)& 0xFF000))
+ s3c_gpio_cfgpin(S5P6450_GPN(offs), S3C_GPIO_SFN(2));
+ else
+ s3c_gpio_cfgpin(S5P6440_GPN(offs), S3C_GPIO_SFN(2));
+
+ return 0;
+}
+
+/*
+ * s5p64x0_irq_demux_eint
+ *
+ * This function demuxes the IRQ from the group0 external interrupts,
+ * from IRQ_EINT(0) to IRQ_EINT(15). It is designed to be inlined into
+ * the specific handlers s5p64x0_irq_demux_eintX_Y.
+ */
+static inline void s5p64x0_irq_demux_eint(unsigned int start, unsigned int end)
+{
+ u32 status = __raw_readl(S5P64X0_EINT0PEND);
+ u32 mask = __raw_readl(S5P64X0_EINT0MASK);
+ unsigned int irq;
+
+ status&= ~mask;
+ status>>= start;
+ status&= (1<< (end - start +
[PATCH][RESEND] ARM: S5P64X0: External Interrupt Support
Add external interrupt support for S5P64X0.The external interrupt
group 0(0 to 15) is used for wake-up source in stop and sleep mode.
Add generic irq chip support
Signed-off-by: Padmavathi Venna
---
Please ignore my previous patch due to wrong return value.
arch/arm/mach-s5p64x0/Makefile |2 +-
arch/arm/mach-s5p64x0/include/mach/regs-gpio.h | 10 ++
arch/arm/mach-s5p64x0/irq-eint.c | 152
3 files changed, 163 insertions(+), 1 deletions(-)
create mode 100644 arch/arm/mach-s5p64x0/irq-eint.c
diff --git a/arch/arm/mach-s5p64x0/Makefile b/arch/arm/mach-s5p64x0/Makefile
index ae6bf6f..5f6afdf 100644
--- a/arch/arm/mach-s5p64x0/Makefile
+++ b/arch/arm/mach-s5p64x0/Makefile
@@ -13,7 +13,7 @@ obj- :=
# Core support for S5P64X0 system
obj-$(CONFIG_ARCH_S5P64X0) += cpu.o init.o clock.o dma.o gpiolib.o
-obj-$(CONFIG_ARCH_S5P64X0) += setup-i2c0.o
+obj-$(CONFIG_ARCH_S5P64X0) += setup-i2c0.o irq-eint.o
obj-$(CONFIG_CPU_S5P6440) += clock-s5p6440.o
obj-$(CONFIG_CPU_S5P6450) += clock-s5p6450.o
diff --git a/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h
b/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h
index 0953ef6..6ce2547 100644
--- a/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h
+++ b/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h
@@ -34,4 +34,14 @@
#define S5P6450_GPQ_BASE (S5P_VA_GPIO + 0x0180)
#define S5P6450_GPS_BASE (S5P_VA_GPIO + 0x0300)
+/* External interrupt control registers for group0 */
+
+#define EINT0CON0_OFFSET (0x900)
+#define EINT0MASK_OFFSET (0x920)
+#define EINT0PEND_OFFSET (0x924)
+
+#define S5P64X0_EINT0CON0 (S5P_VA_GPIO + EINT0CON0_OFFSET)
+#define S5P64X0_EINT0MASK (S5P_VA_GPIO + EINT0MASK_OFFSET)
+#define S5P64X0_EINT0PEND (S5P_VA_GPIO + EINT0PEND_OFFSET)
+
#endif /* __ASM_ARCH_REGS_GPIO_H */
diff --git a/arch/arm/mach-s5p64x0/irq-eint.c b/arch/arm/mach-s5p64x0/irq-eint.c
new file mode 100644
index 000..69ed454
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/irq-eint.c
@@ -0,0 +1,152 @@
+/* arch/arm/mach-s5p64x0/irq-eint.c
+ *
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd
+ * http://www.samsung.com/
+ *
+ * Based on linux/arch/arm/mach-s3c64xx/irq-eint.c
+ *
+ * S5P64X0 - Interrupt handling for External Interrupts.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include
+#include
+#include
+#include
+
+#include
+#include
+
+#include
+#include
+
+#define eint_offset(irq) ((irq) - IRQ_EINT(0))
+
+static int s5p64x0_irq_eint_set_type(struct irq_data *data, unsigned int type)
+{
+ int offs = eint_offset(data->irq);
+ int shift;
+ u32 ctrl, mask;
+ u32 newvalue = 0;
+
+ if (offs > 15)
+ return -EINVAL;
+
+ switch (type) {
+ case IRQ_TYPE_NONE:
+ printk(KERN_WARNING "No edge setting!\n");
+ break;
+ case IRQ_TYPE_EDGE_RISING:
+ newvalue = S3C2410_EXTINT_RISEEDGE;
+ break;
+ case IRQ_TYPE_EDGE_FALLING:
+ newvalue = S3C2410_EXTINT_FALLEDGE;
+ break;
+ case IRQ_TYPE_EDGE_BOTH:
+ newvalue = S3C2410_EXTINT_BOTHEDGE;
+ break;
+ case IRQ_TYPE_LEVEL_LOW:
+ newvalue = S3C2410_EXTINT_LOWLEV;
+ break;
+ case IRQ_TYPE_LEVEL_HIGH:
+ newvalue = S3C2410_EXTINT_HILEV;
+ break;
+ default:
+ printk(KERN_ERR "No such irq type %d", type);
+ return -EINVAL;
+ }
+
+ shift = (offs / 2) * 4;
+ mask = 0x7 << shift;
+
+ ctrl = __raw_readl(S5P64X0_EINT0CON0) & ~mask;
+ ctrl |= newvalue << shift;
+ __raw_writel(ctrl, S5P64X0_EINT0CON0);
+
+ /* Configure the GPIO pin for 6450 or 6440 based on CPU ID */
+ if (0x5 == (__raw_readl(S5P64X0_SYS_ID) & 0xFF000))
+ s3c_gpio_cfgpin(S5P6450_GPN(offs), S3C_GPIO_SFN(2));
+ else
+ s3c_gpio_cfgpin(S5P6440_GPN(offs), S3C_GPIO_SFN(2));
+
+ return 0;
+}
+
+/*
+ * s5p64x0_irq_demux_eint
+ *
+ * This function demuxes the IRQ from the group0 external interrupts,
+ * from IRQ_EINT(0) to IRQ_EINT(15). It is designed to be inlined into
+ * the specific handlers s5p64x0_irq_demux_eintX_Y.
+ */
+static inline void s5p64x0_irq_demux_eint(unsigned int start, unsigned int end)
+{
+ u32 status = __raw_readl(S5P64X0_EINT0PEND);
+ u32 mask = __raw_readl(S5P64X0_EINT0MASK);
+ unsigned int irq;
+
+ status &= ~mask;
+ status >>= start;
+ status &= (1 << (end - start + 1)) - 1;
+
+ for (irq = IRQ_EINT(start); irq <= IRQ_EINT(end); irq++) {
+ if (status & 1)
+
Re: [PATCH 0/3] ARM: Add SDMMC support for S5P64X0
Hi Kukjin Kim, Currently working on updating the SDMMC patches. Working on rebasing the SDMMC patches for the Clkdev support. Will update the same and send the patches for review. Regards, Rajeshwari Shinde. On Thu, Jul 21, 2011 at 7:04 AM, Kukjin Kim wrote: > Rajeshwari Shinde wrote: >> >> From: rajeshwari.s >> >> S5P64X0 supports 3 Channel MMC/SDHC/SDIO. >> >> This patchset adds the setup files, gpio configs and enables the HSMMC > device >> for S5P64X0. >> >> o To Kukjin Kim and Sangbeom Kim >> [PATCH 1/3] ARM: S5P64X0: Add HSMMC setup for host Controller >> [PATCH 2/3] ARM: S5P64X0: Initialize default SDHCI devices and platform > data >> [PATCH 3/3] ARM: S5P64X0: Enable SDHCI support >> --- > > As I know, I got your reply on my comments like following. > > -- > Hi Kukjin Kim, > > Thank you for your comments. > Will modify the patches as per comments and resend the same. > > Regards, > Rajeshwari Shinde. > -- > Hi Russell, > > Thank you for the comment will do the change as specified. > > Regards, > Rajeshwari Shinde. > -- > > But I didn't get any updated patch and unfortunately, we don't have much > time for upcoming merge window. > > One more, please don't use html type e-mail in mailing list. > > Thanks. > > Best regards, > Kgene. > -- > Kukjin Kim , Senior Engineer, > SW Solution Development Team, Samsung Electronics Co., Ltd. > > -- > To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" > in > the body of a message to majord...@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html > -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 1/6] ARM: EXYNOS4: Increase NR_IRQS for devices with more IRQs
On Thu, Jul 21, 2011 at 2:04 AM, Kukjin Kim wrote: > MyungJoo Ham wrote: >> >> MAX8997/17042, which are used by Exynos4-NURI, use additional IRQ >> numbers after GPIO's IRQs. The patch creates some room for those >> devices. >> >> Signed-off-by: MyungJoo Ham >> Signed-off-by: Kyungmin Park >> --- >> arch/arm/mach-exynos4/include/mach/irqs.h | 2 +- >> 1 files changed, 1 insertions(+), 1 deletions(-) >> >> diff --git a/arch/arm/mach-exynos4/include/mach/irqs.h b/arch/arm/mach- >> exynos4/include/mach/irqs.h >> index 31f6bed..51b5db5 100644 >> --- a/arch/arm/mach-exynos4/include/mach/irqs.h >> +++ b/arch/arm/mach-exynos4/include/mach/irqs.h >> @@ -154,6 +154,6 @@ >> #define IRQ_GPIO_END (S5P_GPIOINT_BASE + S5P_GPIOINT_COUNT) >> >> /* Set the default NR_IRQS */ >> -#define NR_IRQS (IRQ_GPIO_END) >> +#define NR_IRQS (IRQ_GPIO_END + 64) > > I applied but basically, we have to avoid using hard coded value like 64 on > this. The NR_IRQS depends on CPU not board but this change is needed for > supporting some specific board and if you need more interrupt numbers, will > you increase it? It is not good way. > > We need to fix this up next time. > > Thanks. OK.. Then, what about using "CONFIG_SPARSE_IRQ" and "irq_alloc_descs()" at board files? As long as NR_IRQS is large enough to cover all combiners (IRQ_GPIO_END is large enough in that sense), it appears to be fine for us (and tested to be ok). Thank you. - MyungJoo > > Best regards, > Kgene. > -- > Kukjin Kim , Senior Engineer, > SW Solution Development Team, Samsung Electronics Co., Ltd. > > -- MyungJoo Ham (함명주), Ph.D. Mobile Software Platform Lab, Digital Media and Communications (DMC) Business Samsung Electronics cell: 82-10-6714-2858 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re:
Hi Tushar,
On Thu, Jul 21, 2011 at 10:58 AM, Tushar Behera
wrote:
> On Thursday 21 July 2011 04:42 PM, Padmavathi Venna wrote:
>>
>> Add external interrupt support for S5P64X0.The external interrupt
>> group 0(0 to 15) is used for wake-up source in stop and sleep mode.
>> Add generic irq chip support
>
> Comment looks incomplete.
Please kindly ignore this patch.
>>
>> Signed-off-by: Padmavathi Venna
>
> Subject line seems missing in the patch.
>
>> ---
>>
>> Please ignore my previous patch due to wrong return value.
>>
>> arch/arm/mach-s5p64x0/Makefile | 2 +-
>> arch/arm/mach-s5p64x0/include/mach/regs-gpio.h | 10 ++
>> arch/arm/mach-s5p64x0/irq-eint.c | 152
>>
>> 3 files changed, 163 insertions(+), 1 deletions(-)
>> create mode 100644 arch/arm/mach-s5p64x0/irq-eint.c
>>
>> diff --git a/arch/arm/mach-s5p64x0/Makefile
>> b/arch/arm/mach-s5p64x0/Makefile
>> index ae6bf6f..5f6afdf 100644
>> --- a/arch/arm/mach-s5p64x0/Makefile
>> +++ b/arch/arm/mach-s5p64x0/Makefile
>> @@ -13,7 +13,7 @@ obj- :=
>> # Core support for S5P64X0 system
>>
>> obj-$(CONFIG_ARCH_S5P64X0) += cpu.o init.o clock.o dma.o gpiolib.o
>> -obj-$(CONFIG_ARCH_S5P64X0) += setup-i2c0.o
>> +obj-$(CONFIG_ARCH_S5P64X0) += setup-i2c0.o irq-eint.o
>> obj-$(CONFIG_CPU_S5P6440) += clock-s5p6440.o
>> obj-$(CONFIG_CPU_S5P6450) += clock-s5p6450.o
>>
>> diff --git a/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h
>> b/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h
>> index 0953ef6..6ce2547 100644
>> --- a/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h
>> +++ b/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h
>> @@ -34,4 +34,14 @@
>> #define S5P6450_GPQ_BASE (S5P_VA_GPIO + 0x0180)
>> #define S5P6450_GPS_BASE (S5P_VA_GPIO + 0x0300)
>>
>> +/* External interrupt control registers for group0 */
>> +
>> +#define EINT0CON0_OFFSET (0x900)
>> +#define EINT0MASK_OFFSET (0x920)
>> +#define EINT0PEND_OFFSET (0x924)
>> +
>> +#define S5P64X0_EINT0CON0 (S5P_VA_GPIO + EINT0CON0_OFFSET)
>> +#define S5P64X0_EINT0MASK (S5P_VA_GPIO + EINT0MASK_OFFSET)
>> +#define S5P64X0_EINT0PEND (S5P_VA_GPIO + EINT0PEND_OFFSET)
>> +
>> #endif /* __ASM_ARCH_REGS_GPIO_H */
>> diff --git a/arch/arm/mach-s5p64x0/irq-eint.c
>> b/arch/arm/mach-s5p64x0/irq-eint.c
>> new file mode 100644
>> index 000..69ed454
>> --- /dev/null
>> +++ b/arch/arm/mach-s5p64x0/irq-eint.c
>> @@ -0,0 +1,152 @@
>> +/* arch/arm/mach-s5p64x0/irq-eint.c
>> + *
>> + * Copyright (c) 2011 Samsung Electronics Co., Ltd
>> + * http://www.samsung.com/
>> + *
>> + * Based on linux/arch/arm/mach-s3c64xx/irq-eint.c
>> + *
>> + * S5P64X0 - Interrupt handling for External Interrupts.
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + */
>> +
>> +#include
>> +#include
>> +#include
>> +#include
>> +
>> +#include
>> +#include
>> +
>> +#include
>> +#include
>> +
>> +#define eint_offset(irq) ((irq) - IRQ_EINT(0))
>> +
>> +static int s5p64x0_irq_eint_set_type(struct irq_data *data, unsigned int
>> type)
>> +{
>> + int offs = eint_offset(data->irq);
>> + int shift;
>> + u32 ctrl, mask;
>> + u32 newvalue = 0;
>> +
>> + if (offs> 15)
>> + return -EINVAL;
>> +
>> + switch (type) {
>> + case IRQ_TYPE_NONE:
>> + printk(KERN_WARNING "No edge setting!\n");
>> + break;
>> + case IRQ_TYPE_EDGE_RISING:
>> + newvalue = S3C2410_EXTINT_RISEEDGE;
>> + break;
>> + case IRQ_TYPE_EDGE_FALLING:
>> + newvalue = S3C2410_EXTINT_FALLEDGE;
>> + break;
>> + case IRQ_TYPE_EDGE_BOTH:
>> + newvalue = S3C2410_EXTINT_BOTHEDGE;
>> + break;
>> + case IRQ_TYPE_LEVEL_LOW:
>> + newvalue = S3C2410_EXTINT_LOWLEV;
>> + break;
>> + case IRQ_TYPE_LEVEL_HIGH:
>> + newvalue = S3C2410_EXTINT_HILEV;
>> + break;
>> + default:
>> + printk(KERN_ERR "No such irq type %d", type);
>> + return -EINVAL;
>> + }
>> +
>> + shift = (offs / 2) * 4;
>> + mask = 0x7<< shift;
>> +
>> + ctrl = __raw_readl(S5P64X0_EINT0CON0)& ~mask;
>> + ctrl |= newvalue<< shift;
>> + __raw_writel(ctrl, S5P64X0_EINT0CON0);
>> +
>> + /* Configure the GPIO pin for 6450 or 6440 based on CPU ID */
>> + if (0x5 == (__raw_readl(S5P64X0_SYS_ID)& 0xFF000))
>> + s3c_gpio_cfgpin(S5P6450_GPN(offs), S3C_GPIO_SFN(2));
>> + else
>> + s3c_gpio_cfgpin(S5P6440_GPN(offs), S3C_GPIO_SFN(2));
>> +
>> + return 0;
>> +}
>> +
>> +/*
>> + * s5p64x0_irq_demux_eint
>> + *
>
Re:
On Thursday 21 July 2011 11:13 AM, padma venkat wrote:
Hi Tushar,
On Thu, Jul 21, 2011 at 10:58 AM, Tushar Behera
wrote:
On Thursday 21 July 2011 04:42 PM, Padmavathi Venna wrote:
[snip]
+ gc = irq_alloc_generic_chip("s5p64x0-eint", 1, S5P_IRQ_EINT_BASE,
+ S5P_VA_GPIO, handle_level_irq);
Added spaces purposefully to make the parameters aligned properly in
the next line
But spaces should never be used for indentation.
Quoting from http://www.kernel.org/doc/Documentation/CodingStyle
"Outside of comments, documentation and except in Kconfig, spaces are
never used for indentation"
nitpick: Should be TABS
Thanks&Regards
Padma
[snip]
--
Tushar Behera
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[PATCH] ARM: EXYNOS4: Add missing S3C_VA_UARTx
From: Jonghwan Choi Fix compile error with CONFIG_SAMSUNG_PM_DEBUG Signed-off-by: Jonghwan Choi --- arch/arm/mach-exynos4/include/mach/map.h |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-exynos4/include/mach/map.h b/arch/arm/mach-exynos4/include/mach/map.h index 0009e77..5ddbfe3 100644 --- a/arch/arm/mach-exynos4/include/mach/map.h +++ b/arch/arm/mach-exynos4/include/mach/map.h @@ -151,6 +151,7 @@ #define SAMSUNG_PA_KEYPAD EXYNOS4_PA_KEYPAD /* UART */ +#define S3C_VA_UARTx(x)(S3C_VA_UART + ((x) * S3C_UART_OFFSET)) #define S3C_PA_UARTEXYNOS4_PA_UART -- 1.7.0 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCHv2 0/4] Updated s5p-mfc platform definitions
Hello, This patch series contains platform definitions for s5p-mfc driver rebased onto latest for-next branch (including generic GIC and clockdev changes). Errors reported by check patch have been fixed. Best regards -- Marek Szyprowski Samsung Poland R&D Center Patch summary: Kamil Debski (3): ARM: S5P: Add support for MFC device to plat-s5p, mach-s5pv210 and mach-exynos4 ARM: S5PV210: Enable MFC on Goni ARM: EXYNOS4: Enable MFC on universal_c210 Marek Szyprowski (1): ARM: EXYNOS4: Enable MFC on Samsung NURI arch/arm/Kconfig|2 + arch/arm/mach-exynos4/Kconfig |4 + arch/arm/mach-exynos4/clock.c | 61 + arch/arm/mach-exynos4/include/mach/map.h|2 + arch/arm/mach-exynos4/mach-nuri.c | 13 +++ arch/arm/mach-exynos4/mach-universal_c210.c | 13 +++ arch/arm/mach-s5pv210/Kconfig |1 + arch/arm/mach-s5pv210/clock.c |7 ++ arch/arm/mach-s5pv210/include/mach/map.h|3 + arch/arm/mach-s5pv210/mach-goni.c | 10 ++ arch/arm/plat-s5p/Kconfig |5 + arch/arm/plat-s5p/Makefile |2 +- arch/arm/plat-s5p/dev-mfc.c | 123 +++ arch/arm/plat-s5p/include/plat/mfc.h| 27 ++ arch/arm/plat-samsung/include/plat/devs.h |3 + 15 files changed, 275 insertions(+), 1 deletions(-) create mode 100644 arch/arm/plat-s5p/dev-mfc.c create mode 100644 arch/arm/plat-s5p/include/plat/mfc.h -- 1.7.1.569.g6f426 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 2/4] ARM: S5PV210: Enable MFC on Goni
From: Kamil Debski
Enable MFC device on the Goni board using the S5PV210 SoC.
Signed-off-by: Kamil Debski
Signed-off-by: Kyungmin Park
Signed-off-by: Marek Szyprowski
---
arch/arm/mach-s5pv210/Kconfig |1 +
arch/arm/mach-s5pv210/mach-goni.c | 10 ++
2 files changed, 11 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-s5pv210/Kconfig b/arch/arm/mach-s5pv210/Kconfig
index 79bb3a0..69dd87c 100644
--- a/arch/arm/mach-s5pv210/Kconfig
+++ b/arch/arm/mach-s5pv210/Kconfig
@@ -90,6 +90,7 @@ config MACH_GONI
select S3C_DEV_HSMMC2
select S3C_DEV_I2C1
select S3C_DEV_I2C2
+ select S5P_DEV_MFC
select S3C_DEV_USB_HSOTG
select S5P_DEV_ONENAND
select SAMSUNG_DEV_KEYPAD
diff --git a/arch/arm/mach-s5pv210/mach-goni.c
b/arch/arm/mach-s5pv210/mach-goni.c
index e0c4d06..85c2d51 100644
--- a/arch/arm/mach-s5pv210/mach-goni.c
+++ b/arch/arm/mach-s5pv210/mach-goni.c
@@ -46,6 +46,7 @@
#include
#include
#include
+#include
#include
/* Following are default values for UCON, ULCON and UFCON UART registers */
@@ -808,6 +809,9 @@ static struct platform_device *goni_devices[] __initdata = {
&goni_i2c_gpio5,
&mmc2_fixed_voltage,
&goni_device_gpiokeys,
+ &s5p_device_mfc,
+ &s5p_device_mfc_l,
+ &s5p_device_mfc_r,
&s3c_device_i2c0,
&s5p_device_fimc0,
&s5p_device_fimc1,
@@ -841,6 +845,11 @@ static void __init goni_map_io(void)
s5p_set_timer_source(S5P_PWM3, S5P_PWM4);
}
+static void __init goni_reserve(void)
+{
+ s5p_mfc_reserve_mem(0x4300, 8 << 20, 0x5100, 8 << 20);
+}
+
static void __init goni_machine_init(void)
{
/* Radio: call before I2C 1 registeration */
@@ -893,4 +902,5 @@ MACHINE_START(GONI, "GONI")
.map_io = goni_map_io,
.init_machine = goni_machine_init,
.timer = &s5p_timer,
+ .reserve= &goni_reserve,
MACHINE_END
--
1.7.1.569.g6f426
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[PATCH 1/4] ARM: S5P: Add support for MFC device to plat-s5p, mach-s5pv210 and mach-exynos4
From: Kamil Debski
Add support for MFC device to plat-s5p, mach-exynos4, mach-s5pv210:
- clock support
- memory mapping and reserving
- s5p_device_mfc platform device
Signed-off-by: Kamil Debski
Signed-off-by: Marek Szyprowski
Signed-off-by: Kyungmin Park
---
arch/arm/Kconfig |2 +
arch/arm/mach-exynos4/clock.c | 61 ++
arch/arm/mach-exynos4/include/mach/map.h |2 +
arch/arm/mach-s5pv210/clock.c |7 ++
arch/arm/mach-s5pv210/include/mach/map.h |3 +
arch/arm/plat-s5p/Kconfig |5 +
arch/arm/plat-s5p/Makefile|2 +-
arch/arm/plat-s5p/dev-mfc.c | 123 +
arch/arm/plat-s5p/include/plat/mfc.h | 27 ++
arch/arm/plat-samsung/include/plat/devs.h |3 +
10 files changed, 234 insertions(+), 1 deletions(-)
create mode 100644 arch/arm/plat-s5p/dev-mfc.c
create mode 100644 arch/arm/plat-s5p/include/plat/mfc.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index d39f532..fba00ef 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -754,6 +754,7 @@ config ARCH_S5PV210
bool "Samsung S5PV210/S5PC110"
select CPU_V7
select ARCH_SPARSEMEM_ENABLE
+ select ARCH_HAS_HOLES_MEMORYMODEL
select GENERIC_GPIO
select HAVE_CLK
select CLKDEV_LOOKUP
@@ -772,6 +773,7 @@ config ARCH_EXYNOS4
bool "Samsung EXYNOS4"
select CPU_V7
select ARCH_SPARSEMEM_ENABLE
+ select ARCH_HAS_HOLES_MEMORYMODEL
select GENERIC_GPIO
select HAVE_CLK
select CLKDEV_LOOKUP
diff --git a/arch/arm/mach-exynos4/clock.c b/arch/arm/mach-exynos4/clock.c
index 98b5cc4a..629ea1d 100644
--- a/arch/arm/mach-exynos4/clock.c
+++ b/arch/arm/mach-exynos4/clock.c
@@ -528,6 +528,11 @@ static struct clk init_clocks_off[] = {
.enable = exynos4_clk_ip_image_ctrl,
.ctrlbit= (1 << 0),
}, {
+ .name = "mfc",
+ .devname= "s5p-mfc",
+ .enable = exynos4_clk_ip_mfc_ctrl,
+ .ctrlbit= (1 << 0),
+ }, {
.name = "i2c",
.devname= "s3c2440-i2c.0",
.parent = &clk_aclk_100.clk,
@@ -731,6 +736,52 @@ static struct clksrc_sources clkset_mout_g2d = {
.nr_sources = ARRAY_SIZE(clkset_mout_g2d_list),
};
+static struct clk *clkset_mout_mfc0_list[] = {
+ [0] = &clk_mout_mpll.clk,
+ [1] = &clk_sclk_apll.clk,
+};
+
+static struct clksrc_sources clkset_mout_mfc0 = {
+ .sources= clkset_mout_mfc0_list,
+ .nr_sources = ARRAY_SIZE(clkset_mout_mfc0_list),
+};
+
+static struct clksrc_clk clk_mout_mfc0 = {
+ .clk= {
+ .name = "mout_mfc0",
+ },
+ .sources= &clkset_mout_mfc0,
+ .reg_src= { .reg = S5P_CLKSRC_MFC, .shift = 0, .size = 1 },
+};
+
+static struct clk *clkset_mout_mfc1_list[] = {
+ [0] = &clk_mout_epll.clk,
+ [1] = &clk_sclk_vpll.clk,
+};
+
+static struct clksrc_sources clkset_mout_mfc1 = {
+ .sources= clkset_mout_mfc1_list,
+ .nr_sources = ARRAY_SIZE(clkset_mout_mfc1_list),
+};
+
+static struct clksrc_clk clk_mout_mfc1 = {
+ .clk= {
+ .name = "mout_mfc1",
+ },
+ .sources= &clkset_mout_mfc1,
+ .reg_src= { .reg = S5P_CLKSRC_MFC, .shift = 4, .size = 1 },
+};
+
+static struct clk *clkset_mout_mfc_list[] = {
+ [0] = &clk_mout_mfc0.clk,
+ [1] = &clk_mout_mfc1.clk,
+};
+
+static struct clksrc_sources clkset_mout_mfc = {
+ .sources= clkset_mout_mfc_list,
+ .nr_sources = ARRAY_SIZE(clkset_mout_mfc_list),
+};
+
static struct clksrc_clk clk_dout_mmc0 = {
.clk= {
.name = "dout_mmc0",
@@ -974,6 +1025,14 @@ static struct clksrc_clk clksrcs[] = {
.reg_div = { .reg = S5P_CLKDIV_IMAGE, .shift = 0, .size = 4 },
}, {
.clk= {
+ .name = "sclk_mfc",
+ .devname= "s5p-mfc",
+ },
+ .sources = &clkset_mout_mfc,
+ .reg_src = { .reg = S5P_CLKSRC_MFC, .shift = 8, .size = 1 },
+ .reg_div = { .reg = S5P_CLKDIV_MFC, .shift = 0, .size = 4 },
+ }, {
+ .clk= {
.name = "sclk_mmc",
.devname= "s3c-sdhci.0",
.parent = &clk_dout_mmc0.clk,
@@ -1049,6 +1108,8 @@ static struct clksrc_clk *sysclks[] = {
&clk_dout_mmc2,
&clk_dout_mmc3,
&clk_dout_mmc4,
+ &clk_mout_mfc0,
+ &clk_mout_mfc1,
};
static int xtal_rate;
diff --git a/arch/arm/mach-exynos4/include/mach/map.h
b/arch/arm/mach-exynos4/include/mach/map.h
[PATCH 3/4] ARM: EXYNOS4: Enable MFC on universal_c210
From: Kamil Debski
Enable MFC device on the universal_c210 boards using the EXYNOS4 SoC.
Signed-off-by: Kamil Debski
Signed-off-by: Kyungmin Park
Signed-off-by: Marek Szyprowski
---
arch/arm/mach-exynos4/Kconfig |2 ++
arch/arm/mach-exynos4/mach-universal_c210.c | 13 +
2 files changed, 15 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-exynos4/Kconfig b/arch/arm/mach-exynos4/Kconfig
index 52fc172..3cc0077 100644
--- a/arch/arm/mach-exynos4/Kconfig
+++ b/arch/arm/mach-exynos4/Kconfig
@@ -175,7 +175,9 @@ config MACH_UNIVERSAL_C210
select S3C_DEV_I2C1
select S3C_DEV_I2C3
select S3C_DEV_I2C5
+ select S5P_DEV_MFC
select S5P_DEV_ONENAND
+ select EXYNOS4_DEV_PD
select EXYNOS4_SETUP_I2C1
select EXYNOS4_SETUP_I2C3
select EXYNOS4_SETUP_I2C5
diff --git a/arch/arm/mach-exynos4/mach-universal_c210.c
b/arch/arm/mach-exynos4/mach-universal_c210.c
index 5d8b097..0e280d1 100644
--- a/arch/arm/mach-exynos4/mach-universal_c210.c
+++ b/arch/arm/mach-exynos4/mach-universal_c210.c
@@ -31,7 +31,9 @@
#include
#include
#include
+#include
#include
+#include
#include
@@ -717,6 +719,10 @@ static struct platform_device *universal_devices[]
__initdata = {
&i2c_gpio12,
&universal_gpio_keys,
&s5p_device_onenand,
+ &s5p_device_mfc,
+ &s5p_device_mfc_l,
+ &s5p_device_mfc_r,
+ &exynos4_device_pd[PD_MFC],
};
static void __init universal_map_io(void)
@@ -726,6 +732,11 @@ static void __init universal_map_io(void)
s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs));
}
+static void __init universal_reserve(void)
+{
+ s5p_mfc_reserve_mem(0x4300, 8 << 20, 0x5100, 8 << 20);
+}
+
static void __init universal_machine_init(void)
{
universal_sdhci_init();
@@ -746,6 +757,7 @@ static void __init universal_machine_init(void)
/* Last */
platform_add_devices(universal_devices, ARRAY_SIZE(universal_devices));
+ s5p_device_mfc.dev.parent = &exynos4_device_pd[PD_MFC].dev;
}
MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210")
@@ -755,4 +767,5 @@ MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210")
.map_io = universal_map_io,
.init_machine = universal_machine_init,
.timer = &exynos4_timer,
+ .reserve= &universal_reserve,
MACHINE_END
--
1.7.1.569.g6f426
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[PATCH 4/4] ARM: EXYNOS4: Enable MFC on Samsung NURI
Enable MFC device on the Samsung NURI boards using the EXYNOS4 SoC.
Signed-off-by: Marek Szyprowski
Signed-off-by: Kyungmin Park
---
arch/arm/mach-exynos4/Kconfig |2 ++
arch/arm/mach-exynos4/mach-nuri.c | 13 +
2 files changed, 15 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-exynos4/Kconfig b/arch/arm/mach-exynos4/Kconfig
index 3cc0077..fc38532 100644
--- a/arch/arm/mach-exynos4/Kconfig
+++ b/arch/arm/mach-exynos4/Kconfig
@@ -196,7 +196,9 @@ config MACH_NURI
select S3C_DEV_I2C1
select S3C_DEV_I2C3
select S3C_DEV_I2C5
+ select S5P_DEV_MFC
select S5P_DEV_USB_EHCI
+ select EXYNOS4_DEV_PD
select EXYNOS4_SETUP_I2C1
select EXYNOS4_SETUP_I2C3
select EXYNOS4_SETUP_I2C5
diff --git a/arch/arm/mach-exynos4/mach-nuri.c
b/arch/arm/mach-exynos4/mach-nuri.c
index 1920906..43be71b 100644
--- a/arch/arm/mach-exynos4/mach-nuri.c
+++ b/arch/arm/mach-exynos4/mach-nuri.c
@@ -41,6 +41,8 @@
#include
#include
#include
+#include
+#include
#include
@@ -1100,6 +1102,10 @@ static struct platform_device *nuri_devices[] __initdata
= {
&i2c9_gpio,
&s3c_device_adc,
&s3c_device_rtc,
+ &s5p_device_mfc,
+ &s5p_device_mfc_l,
+ &s5p_device_mfc_r,
+ &exynos4_device_pd[PD_MFC],
/* NURI Devices */
&nuri_gpio_keys,
@@ -1116,6 +1122,11 @@ static void __init nuri_map_io(void)
s3c24xx_init_uarts(nuri_uartcfgs, ARRAY_SIZE(nuri_uartcfgs));
}
+static void __init nuri_reserve(void)
+{
+ s5p_mfc_reserve_mem(0x4300, 8 << 20, 0x5100, 8 << 20);
+}
+
static void __init nuri_machine_init(void)
{
nuri_sdhci_init();
@@ -1136,6 +1147,7 @@ static void __init nuri_machine_init(void)
/* Last */
platform_add_devices(nuri_devices, ARRAY_SIZE(nuri_devices));
+ s5p_device_mfc.dev.parent = &exynos4_device_pd[PD_MFC].dev;
}
MACHINE_START(NURI, "NURI")
@@ -1145,4 +1157,5 @@ MACHINE_START(NURI, "NURI")
.map_io = nuri_map_io,
.init_machine = nuri_machine_init,
.timer = &exynos4_timer,
+ .reserve= &nuri_reserve,
MACHINE_END
--
1.7.1.569.g6f426
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RE: [PATCH V4 03-1/13] DMA: PL330: Support DMA_SLAVE_CONFIG command
Jassi Brar wrote:
> Sent: Thursday, July 21, 2011 2:00 PM
> To: Boojin Kim
> Cc: linux-arm-ker...@lists.infradead.org; linux-samsung-soc@vger.kernel.org;
> Vinod Koul; Dan Williams; Kukjin Kim
> Subject: Re: [PATCH V4 03-1/13] DMA: PL330: Support DMA_SLAVE_CONFIG command
>
> On Thu, Jul 21, 2011 at 9:43 AM, Boojin Kim wrote:
>
> >> > - pl330_tasklet((unsigned long) pch);
> >> > + list_splice_tail_init(&list, &pdmac->desc_pool);
> >> > + spin_unlock_irqrestore(&pch->lock, flags);
> >> > + break;
> >> > + case DMA_SLAVE_CONFIG:
> >> Please protect this section too using spin_lock.
> > Why is spin_lock need here?
> > This code just sets configuration data into own channel structure.
> It does seem unncessary, but the configuration that is set here is read
> in other parts of the driver. However unlikely but there is theoretical
> possibility of race here - one shouldn't count upon goodness of client
> drivers.
Yes, Client driver doesn't afflict the configuration data again.
So, I think spin_lock isn't required here.
>
> >>
> >> > + if (slave_config->direction == DMA_TO_DEVICE) {
> >> > + if (slave_config->dst_addr)
> >> > + peri->fifo_addr =
> >> > slave_config->dst_addr;
> >> > + if (slave_config->dst_addr_width)
> >> > + peri->burst_sz = __ffs(slave_config-
> >> >dst_addr_width);
> >> > + } else if (slave_config->direction == DMA_FROM_DEVICE)
> >> > {
> >> > + if (slave_config->src_addr)
> >> > + peri->fifo_addr =
> >> > slave_config->src_addr;
> >> > + if (slave_config->src_addr_width)
> >> > + peri->burst_sz = __ffs(slave_config-
> >> >src_addr_width);
> >> > + }
> >> PL330 has fixed channels to peripherals.
> >> So FIFO addresses(burst_sz too?) should already be set via platform data.
> >> Client drivers shouldn't bother.
> >
> > First, DMA machine code should know the FIFO address of all client drivers
> to
> > set via platform data.
> > In this case, Problem is that the definition of FIFO address is almost
> > declared to the header file of client driver.
> > For example, sound\soc\samsung\regs-i2s-v2.h only has the definition of
> fifo
> > address as following.
> >
> > #define S3C2412_IISTXD (0x10)
> > #define S3C2412_IISRXD (0x14)
> >
> > These definitions should be referred to DMA machine code to set fifo
> address
> > through platform data.
> > I think it's not good method.
> Crap!
> Client drivers don't conjure up the fifo address - if not hardcoded they
> are gotten via platform_data already.
For it, DMA machine code should include all header files of client driver that
has definition of FIFO address.
The number of header file would be more than 10. And I think it make the code
a little complicated.
>
> > And, SLAVE_CONFIG command exist to pass slave configuration data from
> client
> > driver to DMA driver.
> > So, I think that it's proper to pass fifo address through SLAVE_CONFIG
> > command.
> If it's still not clear, read the para above definition of 'struct
> dma_slave_config'
> in include/linux/dmaengine.h
Other DMA client drivers in mainline code already use SLAVE_CONFIG command to
pass fifo address as following.
Please refer to Sound/soc/imx/imx-pcm-dma/mx2.c, Driver/mmc/host/mmci.c,
Drivers/mmc/host/mxcmmc.c and so on.
And, Other DMA drivers also support to SLAVE_CONFIG command for it.
Please refer to amba-pl08x.c, coh901318.c, ste_dma40.c and so on in
'driver/dma' directory.
So, In my opinion, this is proper method to handle the client's fifo address.
>
> >
> > Second, 'burst_sz' isn't fixed value. Namely, Client driver changes
> 'burst_sz'
> > according to its usecase.
> > For example, I2S driver sets 'burst_sz' to 4 in case of stereo
> > playback/recording. But in case of mono playback/recording, It changes
> > 'burst_sz' to 2.
> > So, Client driver should use SLAVE_CONFIG command to set 'burst_sz'
> > because
> > it's not fixed value.
> >
> Yeah yeah, ok, that's why I put that with a ? in bracket.
> I just don't remember testing with fixed burst_sz with pl330.
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3.1 merge window
Hello all, Just note... Maybe as you know, it's already opened 3.1 merge window... So please don't rush, I can't pick up current submitting patches. Thanks. Best regards, Kgene. -- Kukjin Kim , Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd. -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
