Re: [PATCH 3/5] ARM: EXYNOS4: Add support PM for EXYNOS4212
On Friday, August 26, 2011, Kukjin Kim wrote:
> MyungJoo Ham wrote:
> >
> > On Wed, Aug 24, 2011 at 10:25 PM, Kukjin Kim
> wrote:
> > > From: Jonghwan Choi
> > >
> > > This patch moves regarding clock stuff of PM into clock
> > > file to support PM on EXYNOS4210 and EXYNOS4212 with one
> > > single kernel image. Because some clock registers are
> > > different on each SoCs.
> > >
> > > Signed-off-by: Jonghwan Choi
> > > Signed-off-by: Kukjin Kim
> > > ---
> > > arch/arm/mach-exynos4/clock-exynos4210.c| 38 ++
> > > arch/arm/mach-exynos4/clock-exynos4212.c| 34 +
> > > arch/arm/mach-exynos4/clock.c | 89
> > +++
> > > arch/arm/mach-exynos4/include/mach/regs-clock.h |4 +
> > > arch/arm/mach-exynos4/pm.c | 79
> ++--
> > > 5 files changed, 172 insertions(+), 72 deletions(-)
> > >
> > > diff --git a/arch/arm/mach-exynos4/clock-exynos4210.c b/arch/arm/mach-
> > exynos4/clock-exynos4210.c
> > > index fe74b91..a4b00b7 100644
> > > --- a/arch/arm/mach-exynos4/clock-exynos4210.c
> > > +++ b/arch/arm/mach-exynos4/clock-exynos4210.c
> > > +static struct sleep_save exynos4210_clock_save[] = {
> > > + SAVE_ITEM(S5P_CLKSRC_IMAGE),
> > > + SAVE_ITEM(S5P_CLKSRC_LCD1),
> > > + SAVE_ITEM(S5P_CLKDIV_IMAGE),
> > > + SAVE_ITEM(S5P_CLKDIV_LCD1),
> > > + SAVE_ITEM(S5P_CLKSRC_MASK_LCD1),
> > > + SAVE_ITEM(S5P_CLKGATE_IP_IMAGE_4210),
> > > + SAVE_ITEM(S5P_CLKGATE_IP_LCD1),
> > > + SAVE_ITEM(S5P_CLKGATE_IP_PERIR_4210),
> > > +};
> > > +
> > > --- a/arch/arm/mach-exynos4/clock-exynos4212.c
> > > +++ b/arch/arm/mach-exynos4/clock-exynos4212.c
> > > +static struct sleep_save exynos4212_clock_save[] = {
> > > + SAVE_ITEM(S5P_CLKSRC_IMAGE),
> > > + SAVE_ITEM(S5P_CLKDIV_IMAGE),
> > > + SAVE_ITEM(S5P_CLKGATE_IP_IMAGE_4212),
> > > + SAVE_ITEM(S5P_CLKGATE_IP_PERIR_4212),
> > > +};
> > > +
> > > --- a/arch/arm/mach-exynos4/clock.c
> > > +++ b/arch/arm/mach-exynos4/clock.c
> > > +static struct sleep_save exynos4_clock_save[] = {
> >
> > Hello,
> >
> Hi,
>
> > Is there any reason to have the following two
> > SAVE_ITEM(S5P_CLKSRC_IMAGE),
> > SAVE_ITEM(S5P_CLKDIV_IMAGE
> > defined at both clock-exynos4210.c and clock-exynos4212.c, not defined
> > at clock.c once?
> >
> Yes, I know. I just wanted to keep in mind there is a different
> value(CLKGATE_IP_IMAGE) in regarding IMAGE clocks on each SoCs, and I think
> need it now. Anyway thanks for your pointing out.
>
> > Also, consider using CONFIG_PM_SLEEP rather than CONFIG_PM for
> > suspend/resume ops.
> >
> (Cc'ed Rafael)
>
> Well, even though CONFIG_PM_SLEEP is used in regarding syscore_ops, in this
> case, using CONFIG_PM looks better.
>
> If ARCH_SUSPEND_POSSIBLE will be selected, then CONFIG_SUSPEND is selected
> and CONFIG_PM_SLEEP is selected in kernel/power/Kconfig and of course,
> ARCH_SUSPEND_POSSIBLE is selected in arch/arm/Kconfig. However above
> everything depends on CONFIG_PM. So I think to use CONFIG_PM is more
> reasonable. In addition, it is more popular in other mainline codes now.
>
> Hi Rafael,
> How do you think about this?
If you make syscore_ops depend on CONFIG_PM, they will be built but not
used when CONFIG_PM_RUNTIME is set and CONFIG_PM_SLEEP is unset. If you
think that's acceptable, I guess you can do it (although you may get a
few "defined but not used" warnings in that case, which don't look nice).
Thanks,
Rafael
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Re: [RFC PATCH 1/4] ARM: kernel: Small fixes in save/restore common code.
On Fri, Aug 19, 2011 at 03:33:45PM +0100, Amit Kucheria wrote:
> This patch is redundant with Lorenzo's new series[1]. Adding him to cc. I
> suggest you rebase on top of his latest series.
>
Yes, thanks for pointing that out.
> On 11 Aug 19, Amit Daniel Kachhap wrote:
> > These changes are necessary to make the retention cpuidle state work. This
> > adds
> > support for saving more L2 registers.
> >
> > Signed-off-by: Amit Daniel Kachhap
> > ---
> > arch/arm/common/gic.c|1 -
> > arch/arm/kernel/sr_helpers.h |2 +-
> > arch/arm/mm/cache-l2x0.c | 10 +-
> > 3 files changed, 10 insertions(+), 3 deletions(-)
> >
> > diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
> > index d845b75..124e122 100644
> > --- a/arch/arm/common/gic.c
> > +++ b/arch/arm/common/gic.c
> > @@ -385,7 +385,6 @@ static void gic_dist_save(unsigned int gic_nr)
> > gic_data[gic_nr].saved_spi_enable[i] =
> > readl_relaxed(dist_base + GIC_DIST_ENABLE_SET + i * 4);
> >
> > - writel_relaxed(0, dist_base + GIC_DIST_CTRL);
> > }
>
> He already has this bit in his tree[1]
>
> > /*
> > diff --git a/arch/arm/kernel/sr_helpers.h b/arch/arm/kernel/sr_helpers.h
> > index 1ae3a9a..5a30461 100644
> > --- a/arch/arm/kernel/sr_helpers.h
> > +++ b/arch/arm/kernel/sr_helpers.h
> > @@ -44,7 +44,7 @@ static inline void exit_coherency(void)
> > "mcrp15, 0, %0, c1, c0, 1\n"
> > : "=&r" (v)
> > : "Ir" (0x40)
> > -: );
> > +: "cc");
>
> He has a different fix for this.
>
We have to rework it anyway it since it does not belong in generic code.
> > }
> > #else
> > static inline void exit_coherency(void) { }
> > diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
> > index 4c99d41..f23696b 100644
> > --- a/arch/arm/mm/cache-l2x0.c
> > +++ b/arch/arm/mm/cache-l2x0.c
> > @@ -285,7 +285,11 @@ static void l2x0_save_context(void *data, bool
> > dormant, unsigned long end)
> > *l2x0_regs = readl_relaxed(l2x0_base + L2X0_TAG_LATENCY_CTRL);
> > l2x0_regs++;
> > *l2x0_regs = readl_relaxed(l2x0_base + L2X0_DATA_LATENCY_CTRL);
> > -
> > + l2x0_regs++;
> > + *l2x0_regs = readl_relaxed(l2x0_base + L2X0_PREFETCH_CTRL);
> > + l2x0_regs++;
> > + *l2x0_regs = readl_relaxed(l2x0_base + L2X0_POWER_CTRL);
> > + dormant = 0;
This is not right, dormant mode depends on cluster state and L2
retention capabilities, it must not be forced. I fixed L2 stack cleaning
when L2 is in retention, please fetch [1] below.
> > if (!dormant) {
> > /* clean entire L2 before disabling it*/
> > writel_relaxed(l2x0_way_mask, l2x0_base + L2X0_CLEAN_WAY);
> > @@ -325,6 +329,10 @@ static void l2x0_restore_context(void *data, bool
> > dormant)
> > writel_relaxed(*l2x0_regs, l2x0_base + L2X0_TAG_LATENCY_CTRL);
> > l2x0_regs++;
> > writel_relaxed(*l2x0_regs, l2x0_base + L2X0_DATA_LATENCY_CTRL);
> > + l2x0_regs++;
> > + writel_relaxed(*l2x0_regs, l2x0_base + L2X0_PREFETCH_CTRL);
> > + l2x0_regs++;
> > + writel_relaxed(*l2x0_regs, l2x0_base + L2X0_POWER_CTRL);
> > /*
> > * If L2 is retained do not invalidate
> > */
> > --
> > 1.7.1
>
> Already fixed in his tree.
>
> [1] git://linux-arm.org/linux-2.6-lp.git sr-test-for-linaro
Thanks,
Lorenzo
>
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Re: [GIT PULL] Samsung Fixes for v3.1-rc3
On Friday 19 August 2011, Kukjin Kim wrote: > > This is pull request for Samsung fixes for v3.1-rc3. > > Please pull Samsung fixes from: > git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git Pulled finally, sorry for the delay on my side. Arnd -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v7 04/15] DMA: PL330: Add DMA_CYCLIC capability
On Thu, Aug 25, 2011 at 7:43 AM, Boojin Kim wrote:
> static void pl330_issue_pending(struct dma_chan *chan)
> {
> - pl330_tasklet((unsigned long) to_pchan(chan));
> + struct dma_pl330_chan *pch = to_pchan(chan);
> +
> + pl330_tasklet((unsigned long) pch);
> }
This is a useless churn since v6.
Please fix this and add
Acked-by: Jassi Brar
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Re: [PATCH v7 03/15] DMA: PL330: Modify device_control()
On Thu, Aug 25, 2011 at 7:43 AM, Boojin Kim wrote: > This patch modifies device_control() to support both DMA_TERMINATE_ALL > and DMA_SLAVE_CONFIG command. > First, modify the flush control for DMA_TERMINATE_ALL command. > Second, add the slave configuration control for DMA_SLAVE_CONFIG command. I repeat what I said for v6. * Apart from the alleged purpose "Support DMA_SLAVE_CONFIG command" this patch also modifies the behavior of DMA_TERMINATE_ALL. If the change is intended, please split it into two patches and explain the reason. Otherwise, restore the behavior. * -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v7 02/15] DMA: PL330: Update PL330 DMA API driver
On Thu, Aug 25, 2011 at 7:43 AM, Boojin Kim wrote: > This patch updates following 3 items. > 1. Removes unneccessary code. > 2. Add AMBA, PL330 configuration > 3. Change the meaning of 'peri_id' variable > from PL330 event number to specific dma id by user. > > Signed-off-by: Boojin Kim > Acked-by: Linus Walleij > Acked-by: Vinod Koul > Cc: Dan Williams > Signed-off-by: Kukjin Kim Acked-by: Jassi Brar -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 4/6] DMA: PL330: Add device tree support
On Fri, Aug 26, 2011 at 08:16:11AM -0500, Rob Herring wrote: > Thomas, > > On 08/26/2011 03:40 AM, Thomas Abraham wrote: > > + - arm,pl330-peri-reqs: number of actual peripheral requests connected to > > the > > +dma controller. Maximum value is 32. > > Perhaps could be a bitmask for sparsely populated requests. May not > matter since phandles will define the connections. > > Can be optional and not present means 00 requests (mem-to-mem only). The number of peripheral requests is readable from configuration register zero, so this is discoverable. Why should we put this information into DT if its provided by the hardware? The number of DMA channels available is also configurable by the SoC designer, yet you don't specify that in DT. And there's a whole bunch of other configuration options available to the SoC designer, most of which are discoverable from the configuration registers. So, I don't think you should be specifying the number of requests. -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 4/6] DMA: PL330: Add device tree support
Thomas,
On 08/26/2011 03:40 AM, Thomas Abraham wrote:
> For PL330 dma controllers instantiated from device tree, the channel
> lookup is based on phandle of the dma controller and dma request id
> specified by the client node. During probe, the private data of each
> channel of the controller is set to point to the device node of the
> dma controller. The 'chan_id' of the each channel is used as the
> dma request id.
>
> Client driver requesting dma channels specify the phandle of the
> dma controller and the request id. The pl330 filter function
> converts the phandle to the device node pointer and matches that
> with channel's private data. If a match is found, the request id
> from the client node and the 'chan_id' of the channel is matched.
> A channel is found if both the values match.
>
> Signed-off-by: Thomas Abraham
> ---
> .../devicetree/bindings/dma/arm-pl330.txt | 42 +
> drivers/dma/pl330.c| 63
> +++-
> 2 files changed, 103 insertions(+), 2 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/dma/arm-pl330.txt
>
> diff --git a/Documentation/devicetree/bindings/dma/arm-pl330.txt
> b/Documentation/devicetree/bindings/dma/arm-pl330.txt
> new file mode 100644
> index 000..46a8307
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/dma/arm-pl330.txt
> @@ -0,0 +1,42 @@
> +* ARM PrimeCell PL330 DMA Controller
> +
> +The ARM PrimeCell PL330 DMA controller can move blocks of memory contents
> +between memory and peripherals or memory to memory.
> +
> +Required properties:
> + - compatible: should one or more of the following
> +- arm,pl330-pdma - For controllers that support mem-to-dev and dev-to-mem
> + transfers.
> +- arm,pl330-mdma - For controllers that support mem-to-mem transfers
> only.
And if they support both? I would think all controllers can support
mem-to-mem. If so, the distinction can be made with the number of requests.
> +- arm,primecell - should be included for all pl330 dma controller nodes.
> +
> + - reg: physical base address of the controller and length of memory mapped
> +region.
> +
> + - interrupts: interrupt number to the cpu.
> +
> + - arm,primecell-periphid: should be 0x00041330.
Should be optional. It's only needed when the h/w value is wrong. This
is already documented in primecell.txt.
> +
> + - arm,pl330-peri-reqs: number of actual peripheral requests connected to
> the
> +dma controller. Maximum value is 32.
Perhaps could be a bitmask for sparsely populated requests. May not
matter since phandles will define the connections.
Can be optional and not present means 00 requests (mem-to-mem only).
> +
> +Example: (from Samsung's Exynos4 processor dtsi file)
> +
> + pdma0: pdma@1268 {
> + compatible = "arm,pl330-pdma", "arm,primecell";
> + reg = <0x1268 0x1000>;
> + interrupts = <99>;
> + arm,primecell-periphid = <0x00041330>;
> + arm,pl330-peri-reqs = <30>;
> + };
> +
> +Client drivers (device nodes requiring dma transfers from dev-to-mem or
> +mem-to-dev) should specify the DMA channel numbers using a two-value pair
> +as shown below.
> +
> + [property name] = <[phandle of the dma controller] [dma request id]>;
> +
> + where 'dma request id' is the dma request number which is connected
> + to the client controller.
> +
> + Example: tx-dma-channel = <&pdma0 12>;
I like this approach. I looked at this some and some PPC platforms do a
node for each channel/request, but this is much more simple and similar
to clock binding approach.
You need to define the property name. Probably just "dma-channel" is
enough. For peripherals with more than 1, just list them out like when
you have more than 1 interrupt. The order should be defined as part of
that device's binding (i.e. 1st channel is tx and 2nd channel is rx).
> diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c
> index 9732995..984dc18 100644
> --- a/drivers/dma/pl330.c
> +++ b/drivers/dma/pl330.c
> @@ -19,6 +19,7 @@
> #include
> #include
> #include
> +#include
>
> #define NR_DEFAULT_DESC 16
>
> @@ -277,6 +278,20 @@ bool pl330_filter(struct dma_chan *chan, void *param)
> if (chan->device->dev->driver != &pl330_driver.drv)
> return false;
>
> +#ifdef CONFIG_OF
> + if (chan->device->dev->of_node) {
> + const __be32 *prop_value;
> + phandle phandle;
> + struct device_node *node;
> +
> + prop_value = ((struct property *)param)->value;
> + phandle = be32_to_cpup(prop_value++);
> + node = of_find_node_by_phandle(phandle);
> + return ((chan->private == node) &&
> + (chan->chan_id == be32_to_cpup(prop_value)));
> + }
> +#endif
> +
> peri_id = chan->private;
> return *peri_id == (unsigned)param;
> }
> @@ -777,6 +792,40 @@ static ir
Re: [PATCH] mmc: sdhci-s3c: Fix mmc card I/O problem
This patch looks fine to me. Acked-by: Jaehoon Chung Girish K S wrote: > This patch fixes the problem in sdhci-s3c host driver for > Samsung Soc's. During the card identification stage the > mmc core driver enumerates for the best bus width in combination > with the highest available data rate. It starts enumerating from > the highest bus width (8) to lowest bus width (1). > > In case of few MMC cards the 4-bit bus enumeration fails and tries > the 1-bit bus enumeration. When switched to 1-bit bus mode the host driver > has to clear the previous bus width setting and apply the new setting. > > The current patch will clear the previous bus mode and apply the new > mode setting. > > Signed-off-by: Girish K S > --- > drivers/mmc/host/sdhci-s3c.c |2 ++ > 1 files changed, 2 insertions(+), 0 deletions(-) > > diff --git a/drivers/mmc/host/sdhci-s3c.c b/drivers/mmc/host/sdhci-s3c.c > index 2bd7bf4..fe886d6 100644 > --- a/drivers/mmc/host/sdhci-s3c.c > +++ b/drivers/mmc/host/sdhci-s3c.c > @@ -302,6 +302,8 @@ static int sdhci_s3c_platform_8bit_width(struct > sdhci_host *host, int width) > ctrl &= ~SDHCI_CTRL_8BITBUS; > break; > default: > + ctrl &= ~SDHCI_CTRL_4BITBUS; > + ctrl &= ~SDHCI_CTRL_8BITBUS; > break; > } > -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 3/3] ARM: EXYNOS4: Add support for 8-bit bus width in SDHCI for ORIGEN
Platform data for SDHCI controller on ORIGEN board is missing the
support for 8-bit bus width. The platform data is extended in sync
with other EXYNOS4 machines.
Signed-off-by: Tushar Behera
---
arch/arm/mach-exynos4/mach-origen.c |8
1 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-exynos4/mach-origen.c
b/arch/arm/mach-exynos4/mach-origen.c
index ae18812..6b6cd77 100644
--- a/arch/arm/mach-exynos4/mach-origen.c
+++ b/arch/arm/mach-exynos4/mach-origen.c
@@ -75,11 +75,19 @@ static struct s3c2410_uartcfg origen_uartcfgs[] __initdata
= {
static struct s3c_sdhci_platdata origen_hsmmc0_pdata __initdata = {
.cd_type= S3C_SDHCI_CD_INTERNAL,
.clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
+#ifdef CONFIG_EXYNOS4_SDHCI_CH0_8BIT
+ .max_width = 8,
+ .host_caps = MMC_CAP_8_BIT_DATA,
+#endif
};
static struct s3c_sdhci_platdata origen_hsmmc2_pdata __initdata = {
.cd_type= S3C_SDHCI_CD_INTERNAL,
.clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
+#ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT
+ .max_width = 8,
+ .host_caps = MMC_CAP_8_BIT_DATA,
+#endif
};
static struct platform_device *origen_devices[] __initdata = {
--
1.7.4.1
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[PATCH 2/3] ARM: EXYNOS4: Add support for secondary MMC port on ORIGEN
Secondary MMC port on ORIGEN is connected to sdhci instance 0. Support
for secondary MMC port is extended by registering sdhci instance 0.
Since sdhci instance 2 can contain a bootable media, sdhci instance 0
is registered after instance 2.
Signed-off-by: Tushar Behera
---
arch/arm/mach-exynos4/Kconfig |1 +
arch/arm/mach-exynos4/mach-origen.c |7 +++
2 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-exynos4/Kconfig b/arch/arm/mach-exynos4/Kconfig
index e6925de..4c14d5e 100644
--- a/arch/arm/mach-exynos4/Kconfig
+++ b/arch/arm/mach-exynos4/Kconfig
@@ -229,6 +229,7 @@ config MACH_ORIGEN
select CPU_EXYNOS4210
select S3C_DEV_RTC
select S3C_DEV_WDT
+ select S3C_DEV_HSMMC
select S3C_DEV_HSMMC2
select EXYNOS4_SETUP_SDHCI
help
diff --git a/arch/arm/mach-exynos4/mach-origen.c
b/arch/arm/mach-exynos4/mach-origen.c
index e280270..ae18812 100644
--- a/arch/arm/mach-exynos4/mach-origen.c
+++ b/arch/arm/mach-exynos4/mach-origen.c
@@ -72,6 +72,11 @@ static struct s3c2410_uartcfg origen_uartcfgs[] __initdata =
{
},
};
+static struct s3c_sdhci_platdata origen_hsmmc0_pdata __initdata = {
+ .cd_type= S3C_SDHCI_CD_INTERNAL,
+ .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
+};
+
static struct s3c_sdhci_platdata origen_hsmmc2_pdata __initdata = {
.cd_type= S3C_SDHCI_CD_INTERNAL,
.clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
@@ -79,6 +84,7 @@ static struct s3c_sdhci_platdata origen_hsmmc2_pdata
__initdata = {
static struct platform_device *origen_devices[] __initdata = {
&s3c_device_hsmmc2,
+ &s3c_device_hsmmc0,
&s3c_device_rtc,
&s3c_device_wdt,
};
@@ -93,6 +99,7 @@ static void __init origen_map_io(void)
static void __init origen_machine_init(void)
{
s3c_sdhci2_set_platdata(&origen_hsmmc2_pdata);
+ s3c_sdhci0_set_platdata(&origen_hsmmc0_pdata);
platform_add_devices(origen_devices, ARRAY_SIZE(origen_devices));
}
--
1.7.4.1
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[PATCH 1/3] ARM: EXYNOS4: Fix sdhci card detection for ORIGEN
Fix incorrect value of cd_type field in platform data for sdhci
device.
Based on "ARM: EXYNOS4: Fix card detection for sdhci 0 and 2".
commit a0d8efedb203b5b908dd46cea38201761e2380f9
Signed-off-by: Tushar Behera
---
arch/arm/mach-exynos4/mach-origen.c |4 +---
1 files changed, 1 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-exynos4/mach-origen.c
b/arch/arm/mach-exynos4/mach-origen.c
index ed59f86..e280270 100644
--- a/arch/arm/mach-exynos4/mach-origen.c
+++ b/arch/arm/mach-exynos4/mach-origen.c
@@ -73,9 +73,7 @@ static struct s3c2410_uartcfg origen_uartcfgs[] __initdata = {
};
static struct s3c_sdhci_platdata origen_hsmmc2_pdata __initdata = {
- .cd_type= S3C_SDHCI_CD_GPIO,
- .ext_cd_gpio= EXYNOS4_GPK2(2),
- .ext_cd_gpio_invert = 1,
+ .cd_type= S3C_SDHCI_CD_INTERNAL,
.clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
};
--
1.7.4.1
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[PATCH 0/3] Extend SDHCI support for Origen board
Patch 1: It fixes the incorrect card detection type. Patch 2: It enables secondary MMC port. Patch 3: It extends support of 8-bit bus width The patches are rebased to for-next branch of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git Tushar Behera (3): ARM: EXYNOS4: Fix sdhci card detection for ORIGEN ARM: EXYNOS4: Add support for secondary MMC port on ORIGEN ARM: EXYNOS4: Add support for 8-bit bus width in SDHCI for ORIGEN arch/arm/mach-exynos4/Kconfig |1 + arch/arm/mach-exynos4/mach-origen.c | 19 --- 2 files changed, 17 insertions(+), 3 deletions(-) -- 1.7.4.1 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] mmc: sdhci-s3c: Fix mmc card I/O problem
This patch fixes the problem in sdhci-s3c host driver for Samsung Soc's. During the card identification stage the mmc core driver enumerates for the best bus width in combination with the highest available data rate. It starts enumerating from the highest bus width (8) to lowest bus width (1). In case of few MMC cards the 4-bit bus enumeration fails and tries the 1-bit bus enumeration. When switched to 1-bit bus mode the host driver has to clear the previous bus width setting and apply the new setting. The current patch will clear the previous bus mode and apply the new mode setting. Signed-off-by: Girish K S --- drivers/mmc/host/sdhci-s3c.c |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/drivers/mmc/host/sdhci-s3c.c b/drivers/mmc/host/sdhci-s3c.c index 2bd7bf4..fe886d6 100644 --- a/drivers/mmc/host/sdhci-s3c.c +++ b/drivers/mmc/host/sdhci-s3c.c @@ -302,6 +302,8 @@ static int sdhci_s3c_platform_8bit_width(struct sdhci_host *host, int width) ctrl &= ~SDHCI_CTRL_8BITBUS; break; default: + ctrl &= ~SDHCI_CTRL_4BITBUS; + ctrl &= ~SDHCI_CTRL_8BITBUS; break; } -- 1.7.1 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 6/6] ARM: EXYNOS4: Limit usage of pl330 device instance to non-dt build
The pl330 device instances and associated platform data is required only for non-device-tree builds. With device tree, all of this information is obtained from the device tree. Signed-off-by: Thomas Abraham --- arch/arm/mach-exynos4/Kconfig |7 +++ arch/arm/mach-exynos4/Makefile |3 ++- 2 files changed, 9 insertions(+), 1 deletions(-) diff --git a/arch/arm/mach-exynos4/Kconfig b/arch/arm/mach-exynos4/Kconfig index d4d401c..3edbf37 100644 --- a/arch/arm/mach-exynos4/Kconfig +++ b/arch/arm/mach-exynos4/Kconfig @@ -21,6 +21,13 @@ config EXYNOS4_MCT help Use MCT (Multi Core Timer) as kernel timers +config EXYNOS4_DEV_DMA + bool + default y if !OF + help + Compile in amba device definitions for DMA controller if OF + is not enabled. + config EXYNOS4_DEV_AHCI bool help diff --git a/arch/arm/mach-exynos4/Makefile b/arch/arm/mach-exynos4/Makefile index d2bf5bf..a2f33dc 100644 --- a/arch/arm/mach-exynos4/Makefile +++ b/arch/arm/mach-exynos4/Makefile @@ -13,7 +13,8 @@ obj- := # Core support for EXYNOS4 system obj-$(CONFIG_CPU_EXYNOS4210) += cpu.o init.o clock.o irq-combiner.o -obj-$(CONFIG_CPU_EXYNOS4210) += setup-i2c0.o irq-eint.o dma.o pmu.o +obj-$(CONFIG_CPU_EXYNOS4210) += setup-i2c0.o irq-eint.o pmu.o +obj-$(CONFIG_EXYNOS4_DEV_DMA) += dma.o obj-$(CONFIG_PM) += pm.o sleep.o obj-$(CONFIG_CPU_IDLE) += cpuidle.o -- 1.6.6.rc2 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 5/6] ARM: SAMSUNG: Add device tree support for pl330 dma engine wrappers
A new dma request id 'DMACH_DT_PROP' is introduced for client drivers
requesting a dma channel. This request indicates that a device tree
node property represting the dma channel is available in
'struct samsung_dma_info'. The dma channel request wrapper uses the
node property value as the value for the filter parameter.
Signed-off-by: Thomas Abraham
---
arch/arm/plat-samsung/dma-ops.c|9 -
arch/arm/plat-samsung/include/plat/dma-ops.h |1 +
arch/arm/plat-samsung/include/plat/dma-pl330.h |3 ++-
3 files changed, 11 insertions(+), 2 deletions(-)
diff --git a/arch/arm/plat-samsung/dma-ops.c b/arch/arm/plat-samsung/dma-ops.c
index 8d18425..b1135dd 100644
--- a/arch/arm/plat-samsung/dma-ops.c
+++ b/arch/arm/plat-samsung/dma-ops.c
@@ -23,11 +23,18 @@ static unsigned samsung_dmadev_request(enum dma_ch dma_ch,
struct dma_chan *chan;
dma_cap_mask_t mask;
struct dma_slave_config slave_config;
+ void *filter_param;
dma_cap_zero(mask);
dma_cap_set(info->cap, mask);
- chan = dma_request_channel(mask, pl330_filter, (void *)dma_ch);
+ /*
+* If a dma channel property of a device node from device tree is
+* specified, use that as the fliter parameter.
+*/
+ filter_param = (dma_ch == DMACH_DT_PROP) ? (void *)info->dt_dmach_prop :
+ (void *)dma_ch;
+ chan = dma_request_channel(mask, pl330_filter, filter_param);
if (info->direction == DMA_FROM_DEVICE) {
memset(&slave_config, 0, sizeof(struct dma_slave_config));
diff --git a/arch/arm/plat-samsung/include/plat/dma-ops.h
b/arch/arm/plat-samsung/include/plat/dma-ops.h
index 4c1a363..22eafc3 100644
--- a/arch/arm/plat-samsung/include/plat/dma-ops.h
+++ b/arch/arm/plat-samsung/include/plat/dma-ops.h
@@ -31,6 +31,7 @@ struct samsung_dma_info {
enum dma_slave_buswidth width;
dma_addr_t fifo;
struct s3c2410_dma_client *client;
+ struct property *dt_dmach_prop;
};
struct samsung_dma_ops {
diff --git a/arch/arm/plat-samsung/include/plat/dma-pl330.h
b/arch/arm/plat-samsung/include/plat/dma-pl330.h
index 2e55e59..c5eaad5 100644
--- a/arch/arm/plat-samsung/include/plat/dma-pl330.h
+++ b/arch/arm/plat-samsung/include/plat/dma-pl330.h
@@ -21,7 +21,8 @@
* use these just as IDs.
*/
enum dma_ch {
- DMACH_UART0_RX,
+ DMACH_DT_PROP = -1,
+ DMACH_UART0_RX = 0,
DMACH_UART0_TX,
DMACH_UART1_RX,
DMACH_UART1_TX,
--
1.6.6.rc2
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[PATCH 4/6] DMA: PL330: Add device tree support
For PL330 dma controllers instantiated from device tree, the channel
lookup is based on phandle of the dma controller and dma request id
specified by the client node. During probe, the private data of each
channel of the controller is set to point to the device node of the
dma controller. The 'chan_id' of the each channel is used as the
dma request id.
Client driver requesting dma channels specify the phandle of the
dma controller and the request id. The pl330 filter function
converts the phandle to the device node pointer and matches that
with channel's private data. If a match is found, the request id
from the client node and the 'chan_id' of the channel is matched.
A channel is found if both the values match.
Signed-off-by: Thomas Abraham
---
.../devicetree/bindings/dma/arm-pl330.txt | 42 +
drivers/dma/pl330.c| 63 +++-
2 files changed, 103 insertions(+), 2 deletions(-)
create mode 100644 Documentation/devicetree/bindings/dma/arm-pl330.txt
diff --git a/Documentation/devicetree/bindings/dma/arm-pl330.txt
b/Documentation/devicetree/bindings/dma/arm-pl330.txt
new file mode 100644
index 000..46a8307
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/arm-pl330.txt
@@ -0,0 +1,42 @@
+* ARM PrimeCell PL330 DMA Controller
+
+The ARM PrimeCell PL330 DMA controller can move blocks of memory contents
+between memory and peripherals or memory to memory.
+
+Required properties:
+ - compatible: should one or more of the following
+- arm,pl330-pdma - For controllers that support mem-to-dev and dev-to-mem
+ transfers.
+- arm,pl330-mdma - For controllers that support mem-to-mem transfers only.
+- arm,primecell - should be included for all pl330 dma controller nodes.
+
+ - reg: physical base address of the controller and length of memory mapped
+region.
+
+ - interrupts: interrupt number to the cpu.
+
+ - arm,primecell-periphid: should be 0x00041330.
+
+ - arm,pl330-peri-reqs: number of actual peripheral requests connected to the
+dma controller. Maximum value is 32.
+
+Example: (from Samsung's Exynos4 processor dtsi file)
+
+ pdma0: pdma@1268 {
+ compatible = "arm,pl330-pdma", "arm,primecell";
+ reg = <0x1268 0x1000>;
+ interrupts = <99>;
+ arm,primecell-periphid = <0x00041330>;
+ arm,pl330-peri-reqs = <30>;
+ };
+
+Client drivers (device nodes requiring dma transfers from dev-to-mem or
+mem-to-dev) should specify the DMA channel numbers using a two-value pair
+as shown below.
+
+ [property name] = <[phandle of the dma controller] [dma request id]>;
+
+ where 'dma request id' is the dma request number which is connected
+ to the client controller.
+
+ Example: tx-dma-channel = <&pdma0 12>;
diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c
index 9732995..984dc18 100644
--- a/drivers/dma/pl330.c
+++ b/drivers/dma/pl330.c
@@ -19,6 +19,7 @@
#include
#include
#include
+#include
#define NR_DEFAULT_DESC16
@@ -277,6 +278,20 @@ bool pl330_filter(struct dma_chan *chan, void *param)
if (chan->device->dev->driver != &pl330_driver.drv)
return false;
+#ifdef CONFIG_OF
+ if (chan->device->dev->of_node) {
+ const __be32 *prop_value;
+ phandle phandle;
+ struct device_node *node;
+
+ prop_value = ((struct property *)param)->value;
+ phandle = be32_to_cpup(prop_value++);
+ node = of_find_node_by_phandle(phandle);
+ return ((chan->private == node) &&
+ (chan->chan_id == be32_to_cpup(prop_value)));
+ }
+#endif
+
peri_id = chan->private;
return *peri_id == (unsigned)param;
}
@@ -777,6 +792,40 @@ static irqreturn_t pl330_irq_handler(int irq, void *data)
return IRQ_NONE;
}
+#ifdef CONFIG_OF
+static struct dma_pl330_platdata *pl330_parse_dt(struct device *dev)
+{
+ struct dma_pl330_platdata *pdat;
+ const void *value;
+
+ pdat = devm_kzalloc(dev, sizeof(*pdat), GFP_KERNEL);
+ if (!pdat)
+ return NULL;
+
+ value = of_get_property(dev->of_node, "arm,pl330-peri-reqs", NULL);
+ if (value)
+ pdat->nr_valid_peri = be32_to_cpup(value);
+
+ if (of_device_is_compatible(dev->of_node, "arm,pl330-pdma")) {
+ dma_cap_set(DMA_SLAVE, pdat->cap_mask);
+ dma_cap_set(DMA_CYCLIC, pdat->cap_mask);
+ } else if (of_device_is_compatible(dev->of_node, "arm,pl330-mdma")) {
+ dma_cap_set(DMA_MEMCPY, pdat->cap_mask);
+ } else if (of_device_is_compatible(dev->of_node, "arm,primecell")) {
+ dma_cap_set(DMA_SLAVE, pdat->cap_mask);
+ dma_cap_set(DMA_CYCLIC, pdat->cap_mask);
+ dma_cap_set(DMA_MEMCPY, pdat->cap_mask);
+ }
+
+ return pdat;
+}
+#else
+static s
[PATCH 3/6] ARM: EXYNOS4: Modify platform data for pl330 driver
With the 'struct dma_pl330_peri' removed, the platfrom data for dma
driver can be simplified to a simple list of peripheral request ids.
Cc: Jassi Brar
Cc: Boojin Kim
Signed-off-by: Thomas Abraham
---
arch/arm/mach-exynos4/dma.c | 223 ---
1 files changed, 62 insertions(+), 161 deletions(-)
diff --git a/arch/arm/mach-exynos4/dma.c b/arch/arm/mach-exynos4/dma.c
index 9667c61..c3c0d17 100644
--- a/arch/arm/mach-exynos4/dma.c
+++ b/arch/arm/mach-exynos4/dma.c
@@ -35,95 +35,40 @@
static u64 dma_dmamask = DMA_BIT_MASK(32);
-struct dma_pl330_peri pdma0_peri[28] = {
- {
- .peri_id = (u8)DMACH_PCM0_RX,
- .rqtype = DEVTOMEM,
- }, {
- .peri_id = (u8)DMACH_PCM0_TX,
- .rqtype = MEMTODEV,
- }, {
- .peri_id = (u8)DMACH_PCM2_RX,
- .rqtype = DEVTOMEM,
- }, {
- .peri_id = (u8)DMACH_PCM2_TX,
- .rqtype = MEMTODEV,
- }, {
- .peri_id = (u8)DMACH_MSM_REQ0,
- }, {
- .peri_id = (u8)DMACH_MSM_REQ2,
- }, {
- .peri_id = (u8)DMACH_SPI0_RX,
- .rqtype = DEVTOMEM,
- }, {
- .peri_id = (u8)DMACH_SPI0_TX,
- .rqtype = MEMTODEV,
- }, {
- .peri_id = (u8)DMACH_SPI2_RX,
- .rqtype = DEVTOMEM,
- }, {
- .peri_id = (u8)DMACH_SPI2_TX,
- .rqtype = MEMTODEV,
- }, {
- .peri_id = (u8)DMACH_I2S0S_TX,
- .rqtype = MEMTODEV,
- }, {
- .peri_id = (u8)DMACH_I2S0_RX,
- .rqtype = DEVTOMEM,
- }, {
- .peri_id = (u8)DMACH_I2S0_TX,
- .rqtype = MEMTODEV,
- }, {
- .peri_id = (u8)DMACH_UART0_RX,
- .rqtype = DEVTOMEM,
- }, {
- .peri_id = (u8)DMACH_UART0_TX,
- .rqtype = MEMTODEV,
- }, {
- .peri_id = (u8)DMACH_UART2_RX,
- .rqtype = DEVTOMEM,
- }, {
- .peri_id = (u8)DMACH_UART2_TX,
- .rqtype = MEMTODEV,
- }, {
- .peri_id = (u8)DMACH_UART4_RX,
- .rqtype = DEVTOMEM,
- }, {
- .peri_id = (u8)DMACH_UART4_TX,
- .rqtype = MEMTODEV,
- }, {
- .peri_id = (u8)DMACH_SLIMBUS0_RX,
- .rqtype = DEVTOMEM,
- }, {
- .peri_id = (u8)DMACH_SLIMBUS0_TX,
- .rqtype = MEMTODEV,
- }, {
- .peri_id = (u8)DMACH_SLIMBUS2_RX,
- .rqtype = DEVTOMEM,
- }, {
- .peri_id = (u8)DMACH_SLIMBUS2_TX,
- .rqtype = MEMTODEV,
- }, {
- .peri_id = (u8)DMACH_SLIMBUS4_RX,
- .rqtype = DEVTOMEM,
- }, {
- .peri_id = (u8)DMACH_SLIMBUS4_TX,
- .rqtype = MEMTODEV,
- }, {
- .peri_id = (u8)DMACH_AC97_MICIN,
- .rqtype = DEVTOMEM,
- }, {
- .peri_id = (u8)DMACH_AC97_PCMIN,
- .rqtype = DEVTOMEM,
- }, {
- .peri_id = (u8)DMACH_AC97_PCMOUT,
- .rqtype = MEMTODEV,
- },
+u8 pdma0_peri[] = {
+ DMACH_PCM0_RX,
+ DMACH_PCM0_TX,
+ DMACH_PCM2_RX,
+ DMACH_PCM2_TX,
+ DMACH_MSM_REQ0,
+ DMACH_MSM_REQ2,
+ DMACH_SPI0_RX,
+ DMACH_SPI0_TX,
+ DMACH_SPI2_RX,
+ DMACH_SPI2_TX,
+ DMACH_I2S0S_TX,
+ DMACH_I2S0_RX,
+ DMACH_I2S0_TX,
+ DMACH_UART0_RX,
+ DMACH_UART0_TX,
+ DMACH_UART2_RX,
+ DMACH_UART2_TX,
+ DMACH_UART4_RX,
+ DMACH_UART4_TX,
+ DMACH_SLIMBUS0_RX,
+ DMACH_SLIMBUS0_TX,
+ DMACH_SLIMBUS2_RX,
+ DMACH_SLIMBUS2_TX,
+ DMACH_SLIMBUS4_RX,
+ DMACH_SLIMBUS4_TX,
+ DMACH_AC97_MICIN,
+ DMACH_AC97_PCMIN,
+ DMACH_AC97_PCMOUT,
};
struct dma_pl330_platdata exynos4_pdma0_pdata = {
.nr_valid_peri = ARRAY_SIZE(pdma0_peri),
- .peri = pdma0_peri,
+ .peri_id = pdma0_peri,
};
struct amba_device exynos4_device_pdma0 = {
@@ -142,86 +87,37 @@ struct amba_device exynos4_device_pdma0 = {
.periphid = 0x00041330,
};
-struct dma_pl330_peri pdma1_peri[25] = {
- {
- .peri_id = (u8)DMACH_PCM0_RX,
- .rqtype = DEVTOMEM,
- }, {
- .peri_id = (u8)DMACH_PCM0_TX,
- .rqtype = MEMTODEV,
- }, {
- .peri_id = (u8)DMACH_PCM1_RX,
- .rqtype = DEVTOMEM,
- }, {
- .peri_id = (u8)DMACH_PCM1_TX,
- .rqtype = MEMTODEV,
- }, {
- .peri_id = (u8)DMACH_MSM_REQ1,
- }, {
- .peri_id = (u8)DMACH_MSM_REQ3,
- }, {
- .peri_id = (u8)DMACH_SPI1_RX,
- .rqtype = DEVTOMEM,
- }, {
- .peri_id = (u8)DMACH_SPI1_TX,
- .rqtyp
[PATCH 2/6] DMA: PL330: Infer transfer direction from transfer request instead of platform data
The transfer direction for a channel can be inferred from the transfer
request and the need for specifying transfer direction in platfrom data
can be eliminated. So the structure definition 'struct dma_pl330_peri'
is no longer required.
The channel's private data is set to point to a channel id specified in
the platform data (instead of an instance of type 'struct dma_pl330_peri').
The filter function is correspondingly modified to match the channel id.
With the 'struct dma_pl330_peri' removed from platform data, the dma
controller transfer capabilities cannot be inferred any more. Hence,
the dma controller capabilities is specified using platform data.
Cc: Jassi Brar
Cc: Boojin Kim
Signed-off-by: Thomas Abraham
Acked-by: Jassi Brar
---
drivers/dma/pl330.c| 65 +++-
include/linux/amba/pl330.h | 13 ++---
2 files changed, 19 insertions(+), 59 deletions(-)
diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c
index 7df2516..9732995 100644
--- a/drivers/dma/pl330.c
+++ b/drivers/dma/pl330.c
@@ -272,13 +272,13 @@ static void dma_pl330_rqcb(void *token, enum pl330_op_err
err)
bool pl330_filter(struct dma_chan *chan, void *param)
{
- struct dma_pl330_peri *peri;
+ u8 *peri_id;
if (chan->device->dev->driver != &pl330_driver.drv)
return false;
- peri = chan->private;
- return peri->peri_id == (unsigned)param;
+ peri_id = chan->private;
+ return *peri_id == (unsigned)param;
}
EXPORT_SYMBOL(pl330_filter);
@@ -514,7 +514,7 @@ pluck_desc(struct dma_pl330_dmac *pdmac)
static struct dma_pl330_desc *pl330_get_desc(struct dma_pl330_chan *pch)
{
struct dma_pl330_dmac *pdmac = pch->dmac;
- struct dma_pl330_peri *peri = pch->chan.private;
+ u8 *peri_id = pch->chan.private;
struct dma_pl330_desc *desc;
/* Pluck one desc from the pool of DMAC */
@@ -539,13 +539,7 @@ static struct dma_pl330_desc *pl330_get_desc(struct
dma_pl330_chan *pch)
desc->txd.cookie = 0;
async_tx_ack(&desc->txd);
- if (peri) {
- desc->req.rqtype = peri->rqtype;
- desc->req.peri = pch->chan.chan_id;
- } else {
- desc->req.rqtype = MEMTOMEM;
- desc->req.peri = 0;
- }
+ desc->req.peri = peri_id ? pch->chan.chan_id : 0;
dma_async_tx_descriptor_init(&desc->txd, &pch->chan);
@@ -632,12 +626,14 @@ static struct dma_async_tx_descriptor
*pl330_prep_dma_cyclic(
case DMA_TO_DEVICE:
desc->rqcfg.src_inc = 1;
desc->rqcfg.dst_inc = 0;
+ desc->req.rqtype = MEMTODEV;
src = dma_addr;
dst = pch->fifo_addr;
break;
case DMA_FROM_DEVICE:
desc->rqcfg.src_inc = 0;
desc->rqcfg.dst_inc = 1;
+ desc->req.rqtype = DEVTOMEM;
src = pch->fifo_addr;
dst = dma_addr;
break;
@@ -663,16 +659,12 @@ pl330_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t
dst,
{
struct dma_pl330_desc *desc;
struct dma_pl330_chan *pch = to_pchan(chan);
- struct dma_pl330_peri *peri = chan->private;
struct pl330_info *pi;
int burst;
if (unlikely(!pch || !len))
return NULL;
- if (peri && peri->rqtype != MEMTOMEM)
- return NULL;
-
pi = &pch->dmac->pif;
desc = __pl330_prep_dma_memcpy(pch, dst, src, len);
@@ -681,6 +673,7 @@ pl330_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dst,
desc->rqcfg.src_inc = 1;
desc->rqcfg.dst_inc = 1;
+ desc->req.rqtype = MEMTOMEM;
/* Select max possible burst size */
burst = pi->pcfg.data_bus_width / 8;
@@ -709,24 +702,13 @@ pl330_prep_slave_sg(struct dma_chan *chan, struct
scatterlist *sgl,
{
struct dma_pl330_desc *first, *desc = NULL;
struct dma_pl330_chan *pch = to_pchan(chan);
- struct dma_pl330_peri *peri = chan->private;
struct scatterlist *sg;
unsigned long flags;
int i;
dma_addr_t addr;
- if (unlikely(!pch || !sgl || !sg_len || !peri))
- return NULL;
-
- /* Make sure the direction is consistent */
- if ((direction == DMA_TO_DEVICE &&
- peri->rqtype != MEMTODEV) ||
- (direction == DMA_FROM_DEVICE &&
- peri->rqtype != DEVTOMEM)) {
- dev_err(pch->dmac->pif.dev, "%s:%d Invalid Direction\n",
- __func__, __LINE__);
+ if (unlikely(!pch || !sgl || !sg_len))
return NULL;
- }
addr = pch->fifo_addr;
@@ -767,11 +749,13 @@ pl330_prep_slave_sg(struct dma_chan *chan, struct
scatterlist *sgl,
if (direction == DMA_TO_DEVICE) {
desc->rqcfg.src_inc = 1;
[PATCH 1/6] DMA: PL330: move filter function into driver
The dma channel selection filter function is moved from plat-samsung
into the pl330 driver. In additon to that, a check is added in the
filter function to ensure that the channel on which the filter has
been invoked is pl330 channel instance (and avoid any incorrect
access of chan->private in a system with multiple types of DMA
drivers).
Suggested-by: Russell King
Signed-off-by: Thomas Abraham
---
arch/arm/plat-samsung/dma-ops.c |6 --
drivers/dma/pl330.c | 15 +++
include/linux/amba/pl330.h |2 ++
3 files changed, 17 insertions(+), 6 deletions(-)
diff --git a/arch/arm/plat-samsung/dma-ops.c b/arch/arm/plat-samsung/dma-ops.c
index 6e3d9ab..8d18425 100644
--- a/arch/arm/plat-samsung/dma-ops.c
+++ b/arch/arm/plat-samsung/dma-ops.c
@@ -17,12 +17,6 @@
#include
-static inline bool pl330_filter(struct dma_chan *chan, void *param)
-{
- struct dma_pl330_peri *peri = chan->private;
- return peri->peri_id == (unsigned)param;
-}
-
static unsigned samsung_dmadev_request(enum dma_ch dma_ch,
struct samsung_dma_info *info)
{
diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c
index 95976cf..7df2516 100644
--- a/drivers/dma/pl330.c
+++ b/drivers/dma/pl330.c
@@ -116,6 +116,9 @@ struct dma_pl330_desc {
struct dma_pl330_chan *pchan;
};
+/* forward declaration */
+static struct amba_driver pl330_driver;
+
static inline struct dma_pl330_chan *
to_pchan(struct dma_chan *ch)
{
@@ -267,6 +270,18 @@ static void dma_pl330_rqcb(void *token, enum pl330_op_err
err)
tasklet_schedule(&pch->task);
}
+bool pl330_filter(struct dma_chan *chan, void *param)
+{
+ struct dma_pl330_peri *peri;
+
+ if (chan->device->dev->driver != &pl330_driver.drv)
+ return false;
+
+ peri = chan->private;
+ return peri->peri_id == (unsigned)param;
+}
+EXPORT_SYMBOL(pl330_filter);
+
static int pl330_alloc_chan_resources(struct dma_chan *chan)
{
struct dma_pl330_chan *pch = to_pchan(chan);
diff --git a/include/linux/amba/pl330.h b/include/linux/amba/pl330.h
index d12f077..6db72da 100644
--- a/include/linux/amba/pl330.h
+++ b/include/linux/amba/pl330.h
@@ -12,6 +12,7 @@
#ifndef__AMBA_PL330_H_
#define__AMBA_PL330_H_
+#include
#include
struct dma_pl330_peri {
@@ -38,4 +39,5 @@ struct dma_pl330_platdata {
unsigned mcbuf_sz;
};
+extern bool pl330_filter(struct dma_chan *chan, void *param);
#endif /* __AMBA_PL330_H_ */
--
1.6.6.rc2
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[PATCH 0/6] Add device tree support for PL330 dma controller driver
This patchset adds device tree support for PL330 driver and uses it to add device tree support for Samsung platforms, specifically Exynos4. First patch moves the pl330_filter function from Samsung specific wrappers to pl330 dma driver and also adds a check to ensure that the filter function proceeds only if it the dma channel being investigated belongs to pl330 dma controller instance. Second patch adds support to infer the direction of the dma transfer using the direction specified with the transfer request instead of including this information in the platform data. This simlifies the addition of device tree support. Third patch simplifies the platform data for Exynos4 pl330 dma controllers. Similar patches simplifying the platform data for other Samsung platforms is under development. Fourth patch adds device tree support for pl330 dma controller driver. A dma channel is represented using a phandle of the dma controller node and the channel id within that controller. Client driver request a dma channel using the phandle and channel id pair. Correspondingly, the pl330 filter function has been modified to lookup a channel based on this value. Fifth patch adds device tree support for Samsung's DMA engine wrappers. Client drivers retrive the channel property from their device node and pass it to the wrappers. The wrapper functions use the property value as the filter function parameter. Sixth patch restricts the usage of pl330 device and platform data instances to non-dt platforms. This patchset is based on Linux 3.1-rc3 with following patch sets applied. * To use DMA generic APIs for Samsung DMA - v7 - (15 patches) * ARM: Samsung: use dma-pl330 device name for clock (3 patches) * ARM: S5P64X0: Add the devname for DMA clock. * ARM: SAMSUNG: register the second instance of PL330 DMAC (3 patches) Thomas Abraham (6): DMA: PL330: move filter function into driver DMA: PL330: Infer transfer direction from transfer request instead of platform data ARM: EXYNOS4: Modify platform data for pl330 driver DMA: PL330: Add device tree support ARM: SAMSUNG: Add device tree support for pl330 dma engine wrappers ARM: EXYNOS4: Limit usage of pl330 device instance to non-dt build .../devicetree/bindings/dma/arm-pl330.txt | 42 arch/arm/mach-exynos4/Kconfig |7 + arch/arm/mach-exynos4/Makefile |3 +- arch/arm/mach-exynos4/dma.c| 223 ++-- arch/arm/plat-samsung/dma-ops.c| 15 +- arch/arm/plat-samsung/include/plat/dma-ops.h |1 + arch/arm/plat-samsung/include/plat/dma-pl330.h |3 +- drivers/dma/pl330.c| 133 include/linux/amba/pl330.h | 15 +- 9 files changed, 216 insertions(+), 226 deletions(-) create mode 100644 Documentation/devicetree/bindings/dma/arm-pl330.txt -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
