Re: [PATCH v3 09/12] ARM: EXYNOS: add support get_core_count() for EXYNOS5250
On 03/13/12 09:15, Arnd Bergmann wrote: On Tuesday 13 March 2012, Kukjin Kim wrote: The EXYNOS5250 has two Cortex-A15 cores and there's no need to call scu_enable() in platform_smp_prepare_cpus(). Signed-off-by: Kukjin Kim Can you explain this patch more? It only seems to make the code less generic, but there is no indication if calling the scu_get_core_count() function is actually wrong on exynos5. Contrary to Cortex-A9, Cortex-A15 has no regarding scu register so EXYNO5250 can not get the number of core from that like EXYNOS4 SoCs. Thanks. Best regards, Kgene. -- Kukjin Kim , Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd. -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 12/12] ARM: dts: add initial dts file for EXYNOS5250, SMDK5250
On 03/13/12 20:56, Olof Johansson wrote:
On Tue, Mar 13, 2012 at 08:30:43AM -0700, Kukjin Kim wrote:
This patch adds initial dts file for EXYNOS5250 SoC. This dts
file is including the SoC specific devices and properties. And
adds the dts file for SMDK5250 board which uses the EXYNOS5250
dts file. Its board specific properites will be added later.
Cc: Thomas Abraham
Cc: Grant Likely
Signed-off-by: Kukjin Kim
---
arch/arm/boot/dts/exynos5250-smdk5250.dts | 26 ++
arch/arm/boot/dts/exynos5250.dtsi | 413 +
2 files changed, 439 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/boot/dts/exynos5250-smdk5250.dts
create mode 100644 arch/arm/boot/dts/exynos5250.dtsi
diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts
b/arch/arm/boot/dts/exynos5250-smdk5250.dts
new file mode 100644
index 000..491539a
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
[...]
+ chosen {
+ bootargs = "root=/dev/ram0 rw ramdisk=8192 rootfstype=squashfs
initrd=0x4100,8M console=ttySAC1,115200 init=/linuxrc";
Having these specific bootargs in the include file rarely makes sense, it's
better to have firmware update from the settings in firmware and just have a
very
simple fallback here.
In particular initrd is quite custom to hardcode like that.
Yes, the bootargs is no mandatory in dts file and u-boot bootargs can be
set. OK, we can simplify it here like following.
bootargs = "root=/dev/ram0 rw ramdisk=8192 console=ttySAC1,115200"
[...]
+ watchdog@101D {
lowercase hex here and elsewhere in these files, please.
OK, I see.
Also, technically no need to specify a unit address (@) in the device node
name unless you need it to tell more than one entry apart, but it's become
customary to always add them on ARM for some reason.
OK, just to be consistent in writing device nodes, prefer to add address
to the names for all device nodes.
Thanks.
Best regards,
Kgene.
--
Kukjin Kim , Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
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Re: [PATCH v3 08/12] ARM: EXYNOS: support EINT for EXYNOS4 and EXYNOS5
On 03/13/12 20:52, Olof Johansson wrote:
Hi,
A couple of comments below.
I agree, and will address comments from you.
Thanks.
Best regards,
Kgene.
--
Kukjin Kim , Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
On Tue, Mar 13, 2012 at 08:30:39AM -0700, Kukjin Kim wrote:
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 0b53018..72f21e4 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -777,39 +779,24 @@ static int exynos4_irq_eint_set_type(struct irq_data
*data, unsigned int type)
mask = 0x7<< shift;
spin_lock(&eint_lock);
- ctrl = __raw_readl(S5P_EINT_CON(EINT_REG_NR(data->irq)));
+ ctrl = __raw_readl(EINT_CON(exynos_eint_base, data->irq));
ctrl&= ~mask;
ctrl |= newvalue<< shift;
- __raw_writel(ctrl, S5P_EINT_CON(EINT_REG_NR(data->irq)));
+ __raw_writel(ctrl, EINT_CON(exynos_eint_base, data->irq));
spin_unlock(&eint_lock);
- switch (offs) {
- case 0 ... 7:
- s3c_gpio_cfgpin(EINT_GPIO_0(offs& 0x7), EINT_MODE);
- break;
- case 8 ... 15:
- s3c_gpio_cfgpin(EINT_GPIO_1(offs& 0x7), EINT_MODE);
- break;
- case 16 ... 23:
- s3c_gpio_cfgpin(EINT_GPIO_2(offs& 0x7), EINT_MODE);
- break;
- case 24 ... 31:
- s3c_gpio_cfgpin(EINT_GPIO_3(offs& 0x7), EINT_MODE);
- break;
- default:
- printk(KERN_ERR "No such irq number %d", offs);
- }
+ s3c_gpio_cfgpin(irq_to_gpio(data->irq), S3C_GPIO_SFN(0xf));
irq_to_gpio is going away, so it's not a good idea to add it under that name.
Add a local function locally at the top of this file instead. and call
it something else.
diff --git a/arch/arm/mach-exynos/include/mach/gpio.h
b/arch/arm/mach-exynos/include/mach/gpio.h
index 80523ca..c09deb6 100644
--- a/arch/arm/mach-exynos/include/mach/gpio.h
+++ b/arch/arm/mach-exynos/include/mach/gpio.h
@@ -146,4 +146,33 @@ enum s5p_gpio_number {
#define ARCH_NR_GPIOS (EXYNOS4_GPZ(EXYNOS4_GPIO_Z_NR) + \
CONFIG_SAMSUNG_GPIO_EXTRA + 1)
+#include
+#include
+#include
+#include
+
+static inline int irq_to_gpio(unsigned int irq)
+{
+ if (irq< IRQ_EINT(0))
+ return -EINVAL;
+
+ irq -= IRQ_EINT(0);
+ if (irq< 8)
+ return soc_is_exynos5250() ? EXYNOS5_GPX0(irq) :
+EXYNOS4_GPX0(irq);
+ irq -= 8;
+ if (irq< 8)
+ return soc_is_exynos5250() ? EXYNOS5_GPX1(irq) :
+EXYNOS4_GPX1(irq);
+ irq -= 8;
+ if (irq< 8)
+ return soc_is_exynos5250() ? EXYNOS5_GPX2(irq) :
+EXYNOS4_GPX2(irq);
+ irq -= 8;
+ if (irq< 8)
+ return soc_is_exynos5250() ? EXYNOS5_GPX3(irq) :
+EXYNOS4_GPX3(irq);
+ return -EINVAL;
+}
I think this would be cleaner as two small helpers and one check for SoC
version instead.
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Re: [PATCH v3 07/12] ARM: EXYNOS: add interrupt definitions for EXYNOS5250
On 03/13/12 22:27, Thomas Abraham wrote:
On 13 March 2012 21:00, Kukjin Kim wrote:
ARM: EXYNOS: irqs.h for exynos4 and exynos5 - WIP
This patch adds the interrupt definitions for EXYNOS5250 at
file. Basically, now it is needed for EXYNOS5250
interrupt and will be updated for single zImage next time.
Signed-off-by: Kukjin Kim
---
arch/arm/mach-exynos/common.c| 97 --
arch/arm/mach-exynos/dev-ahci.c |4 +-
arch/arm/mach-exynos/dev-audio.c |4 +-
arch/arm/mach-exynos/include/mach/irqs.h | 580 ++
arch/arm/mach-exynos/mct.c | 23 +-
arch/arm/plat-s5p/irq-pm.c | 25 +-
arch/arm/plat-samsung/irq-vic-timer.c| 16 +
7 files changed, 548 insertions(+), 201 deletions(-)
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 7fdb139..0b53018 100644
--- a/arch/arm/mach-exynos/common.c
[...]
for (irq = 0 ; irq<= 15 ; irq++) {
eint0_15_data[irq] = IRQ_EINT(irq);
- irq_set_handler_data(exynos4_get_irq_nr(irq),
-&eint0_15_data[irq]);
- irq_set_chained_handler(exynos4_get_irq_nr(irq),
+ if (soc_is_exynos5250()) {
+ irq_set_handler_data(exynos4_eint0_15_src_int[irq],
+&eint0_15_data[irq]);
+ irq_set_chained_handler(exynos4_eint0_15_src_int[irq],
+ exynos4_irq_eint0_15);
+ } else {
+ irq_set_handler_data(exynos5_eint0_15_src_int[irq],
+&eint0_15_data[irq]);
+ irq_set_chained_handler(exynos5_eint0_15_src_int[irq],
exynos4_irq_eint0_15);
+ }
}
The external interrupt numbers for Exynos4 and Exynos5 have been
swapped. This needs to be fixed.
Oops again :-( let me fix it.
Thanks, Thomas.
Best regards,
Kgene.
--
Kukjin Kim , Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
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Re: [PATCH v3 07/12] ARM: EXYNOS: add interrupt definitions for EXYNOS5250
On 03/13/12 20:42, Olof Johansson wrote: Hi On Tue, Mar 13, 2012 at 8:30 AM, Kukjin Kim wrote: ARM: EXYNOS: irqs.h for exynos4 and exynos5 - WIP This patch adds the interrupt definitions for EXYNOS5250 at file. Basically, now it is needed for EXYNOS5250 interrupt and will be updated for single zImage next time. Nit for when you stage the branch: Update the commit message a bit, I think? Oops, what's happened :( Let me update it. Thanks. Best regards, Kgene. -- Kukjin Kim , Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd. -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 07/12] ARM: EXYNOS: add interrupt definitions for EXYNOS5250
On 13 March 2012 21:00, Kukjin Kim wrote:
> ARM: EXYNOS: irqs.h for exynos4 and exynos5 - WIP
> This patch adds the interrupt definitions for EXYNOS5250 at
> file. Basically, now it is needed for EXYNOS5250
> interrupt and will be updated for single zImage next time.
>
> Signed-off-by: Kukjin Kim
> ---
> arch/arm/mach-exynos/common.c | 97 --
> arch/arm/mach-exynos/dev-ahci.c | 4 +-
> arch/arm/mach-exynos/dev-audio.c | 4 +-
> arch/arm/mach-exynos/include/mach/irqs.h | 580
> ++
> arch/arm/mach-exynos/mct.c | 23 +-
> arch/arm/plat-s5p/irq-pm.c | 25 +-
> arch/arm/plat-samsung/irq-vic-timer.c | 16 +
> 7 files changed, 548 insertions(+), 201 deletions(-)
>
> diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
> index 7fdb139..0b53018 100644
> --- a/arch/arm/mach-exynos/common.c
[...]
> for (irq = 0 ; irq <= 15 ; irq++) {
> eint0_15_data[irq] = IRQ_EINT(irq);
>
> - irq_set_handler_data(exynos4_get_irq_nr(irq),
> - &eint0_15_data[irq]);
> - irq_set_chained_handler(exynos4_get_irq_nr(irq),
> + if (soc_is_exynos5250()) {
> + irq_set_handler_data(exynos4_eint0_15_src_int[irq],
> + &eint0_15_data[irq]);
> + irq_set_chained_handler(exynos4_eint0_15_src_int[irq],
> + exynos4_irq_eint0_15);
> + } else {
> + irq_set_handler_data(exynos5_eint0_15_src_int[irq],
> + &eint0_15_data[irq]);
> + irq_set_chained_handler(exynos5_eint0_15_src_int[irq],
> exynos4_irq_eint0_15);
> + }
> }
The external interrupt numbers for Exynos4 and Exynos5 have been
swapped. This needs to be fixed.
Thanks,
Thomas.
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Re: [PATCH v3 00/12] ARM: EXYNOS: add support new EXYNOS5250
On Tue, Mar 13, 2012 at 04:22:08PM +, Arnd Bergmann wrote: > On Tuesday 13 March 2012, Kukjin Kim wrote: > > > > This patch adds support EXYNOS5250 SoC which has two A15 cores > > can be used on mobile and tablet devices. > > Looks basically ok to me. I've commented on patches 5 and 9 and > in both cases, I would either like to see the patch get dropped > or the changeset description expanded to give a good explanation > why the change is actually needed. Agree, looks quite reasonable. I had a few nits as well but nothing major. Thanks, -Olof -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 12/12] ARM: dts: add initial dts file for EXYNOS5250, SMDK5250
On Tue, Mar 13, 2012 at 08:30:43AM -0700, Kukjin Kim wrote:
> This patch adds initial dts file for EXYNOS5250 SoC. This dts
> file is including the SoC specific devices and properties. And
> adds the dts file for SMDK5250 board which uses the EXYNOS5250
> dts file. Its board specific properites will be added later.
>
> Cc: Thomas Abraham
> Cc: Grant Likely
> Signed-off-by: Kukjin Kim
> ---
> arch/arm/boot/dts/exynos5250-smdk5250.dts | 26 ++
> arch/arm/boot/dts/exynos5250.dtsi | 413
> +
> 2 files changed, 439 insertions(+), 0 deletions(-)
> create mode 100644 arch/arm/boot/dts/exynos5250-smdk5250.dts
> create mode 100644 arch/arm/boot/dts/exynos5250.dtsi
>
> diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts
> b/arch/arm/boot/dts/exynos5250-smdk5250.dts
> new file mode 100644
> index 000..491539a
> --- /dev/null
> +++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
> @@ -0,0 +1,26 @@
> +/*
> + * SAMSUNG SMDK5250 board device tree source
> + *
> + * Copyright (c) 2012 Samsung Electronics Co., Ltd.
> + * http://www.samsung.com
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> +*/
> +
> +/dts-v1/;
> +/include/ "exynos5250.dtsi"
> +
> +/ {
> + model = "SAMSUNG SMDK5250 board based on EXYNOS5250";
> + compatible = "samsung,smdk5250", "samsung,exynos5250";
> +
> + memory {
> + reg = <0x4000 0x8000>;
> + };
> +
> + chosen {
> + bootargs = "root=/dev/ram0 rw ramdisk=8192 rootfstype=squashfs
> initrd=0x4100,8M console=ttySAC1,115200 init=/linuxrc";
Having these specific bootargs in the include file rarely makes sense, it's
better to have firmware update from the settings in firmware and just have a
very
simple fallback here.
In particular initrd is quite custom to hardcode like that.
> --- /dev/null
> +++ b/arch/arm/boot/dts/exynos5250.dtsi
> @@ -0,0 +1,413 @@
> +/*
> + * SAMSUNG EXYNOS5250 SoC device tree source
> + *
> + * Copyright (c) 2012 Samsung Electronics Co., Ltd.
> + * http://www.samsung.com
> + *
> + * SAMSUNG EXYNOS5250 SoC device nodes are listed in this file.
> + * EXYNOS5250 based board files can include this file and provide
> + * values for board specfic bindings.
> + *
> + * Note: This file does not include device nodes for all the controllers in
> + * EXYNOS5250 SoC. As device tree coverage for EXYNOS5250 increases,
> + * additional nodes can be added to this file.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> +*/
> +
> +/include/ "skeleton.dtsi"
> +
> +/ {
> + compatible = "samsung,exynos5250";
> + interrupt-parent = <&gic>;
> +
> + gic:interrupt-controller@1049 {
> + compatible = "arm,cortex-a9-gic";
> + #interrupt-cells = <3>;
> + interrupt-controller;
> + reg = <0x1049 0x1000>, <0x1048 0x100>;
> + };
> +
> + watchdog@101D {
lowercase hex here and elsewhere in these files, please.
Also, technically no need to specify a unit address (@) in the device node
name unless you need it to tell more than one entry apart, but it's become
customary to always add them on ARM for some reason.
-Olof
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Re: [PATCH v3 08/12] ARM: EXYNOS: support EINT for EXYNOS4 and EXYNOS5
Hi,
A couple of comments below.
On Tue, Mar 13, 2012 at 08:30:39AM -0700, Kukjin Kim wrote:
> diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
> index 0b53018..72f21e4 100644
> --- a/arch/arm/mach-exynos/common.c
> +++ b/arch/arm/mach-exynos/common.c
> @@ -777,39 +779,24 @@ static int exynos4_irq_eint_set_type(struct irq_data
> *data, unsigned int type)
> mask = 0x7 << shift;
>
> spin_lock(&eint_lock);
> - ctrl = __raw_readl(S5P_EINT_CON(EINT_REG_NR(data->irq)));
> + ctrl = __raw_readl(EINT_CON(exynos_eint_base, data->irq));
> ctrl &= ~mask;
> ctrl |= newvalue << shift;
> - __raw_writel(ctrl, S5P_EINT_CON(EINT_REG_NR(data->irq)));
> + __raw_writel(ctrl, EINT_CON(exynos_eint_base, data->irq));
> spin_unlock(&eint_lock);
>
> - switch (offs) {
> - case 0 ... 7:
> - s3c_gpio_cfgpin(EINT_GPIO_0(offs & 0x7), EINT_MODE);
> - break;
> - case 8 ... 15:
> - s3c_gpio_cfgpin(EINT_GPIO_1(offs & 0x7), EINT_MODE);
> - break;
> - case 16 ... 23:
> - s3c_gpio_cfgpin(EINT_GPIO_2(offs & 0x7), EINT_MODE);
> - break;
> - case 24 ... 31:
> - s3c_gpio_cfgpin(EINT_GPIO_3(offs & 0x7), EINT_MODE);
> - break;
> - default:
> - printk(KERN_ERR "No such irq number %d", offs);
> - }
> + s3c_gpio_cfgpin(irq_to_gpio(data->irq), S3C_GPIO_SFN(0xf));
irq_to_gpio is going away, so it's not a good idea to add it under that name.
Add a local function locally at the top of this file instead. and call
it something else.
> diff --git a/arch/arm/mach-exynos/include/mach/gpio.h
> b/arch/arm/mach-exynos/include/mach/gpio.h
> index 80523ca..c09deb6 100644
> --- a/arch/arm/mach-exynos/include/mach/gpio.h
> +++ b/arch/arm/mach-exynos/include/mach/gpio.h
> @@ -146,4 +146,33 @@ enum s5p_gpio_number {
> #define ARCH_NR_GPIOS(EXYNOS4_GPZ(EXYNOS4_GPIO_Z_NR) +
> \
>CONFIG_SAMSUNG_GPIO_EXTRA + 1)
>
> +#include
> +#include
> +#include
> +#include
> +
> +static inline int irq_to_gpio(unsigned int irq)
> +{
> + if (irq < IRQ_EINT(0))
> + return -EINVAL;
> +
> + irq -= IRQ_EINT(0);
> + if (irq < 8)
> + return soc_is_exynos5250() ? EXYNOS5_GPX0(irq) :
> + EXYNOS4_GPX0(irq);
> + irq -= 8;
> + if (irq < 8)
> + return soc_is_exynos5250() ? EXYNOS5_GPX1(irq) :
> + EXYNOS4_GPX1(irq);
> + irq -= 8;
> + if (irq < 8)
> + return soc_is_exynos5250() ? EXYNOS5_GPX2(irq) :
> + EXYNOS4_GPX2(irq);
> + irq -= 8;
> + if (irq < 8)
> + return soc_is_exynos5250() ? EXYNOS5_GPX3(irq) :
> + EXYNOS4_GPX3(irq);
> + return -EINVAL;
> +}
I think this would be cleaner as two small helpers and one check for SoC
version instead.
-Olof
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Re: [PATCH v3 07/12] ARM: EXYNOS: add interrupt definitions for EXYNOS5250
Hi On Tue, Mar 13, 2012 at 8:30 AM, Kukjin Kim wrote: > ARM: EXYNOS: irqs.h for exynos4 and exynos5 - WIP > This patch adds the interrupt definitions for EXYNOS5250 at > file. Basically, now it is needed for EXYNOS5250 > interrupt and will be updated for single zImage next time. Nit for when you stage the branch: Update the commit message a bit, I think? -Olof -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH v2 3/3] ARM: Samsung: Rework platform data of s3c-fb driver
> -Original Message-
> From: Thomas Abraham [mailto:thomas.abra...@linaro.org]
> Sent: Tuesday, March 13, 2012 7:11 PM
> To: Jingoo Han
> Cc: linux-fb...@vger.kernel.org; florianschandi...@gmx.de;
> linux-arm-ker...@lists.infradead.org; linux-
> samsung-...@vger.kernel.org; kgene@samsung.com; ben-li...@fluff.org;
> patc...@linaro.org; Kyungmin
> Park; JeongHyeon Kim; Heiko Stuebner; Kwangwoo Lee; Mark Brown; Peter
> Korsgaard; Darius Augulis; Maurus
> Cuelenaere
> Subject: Re: [PATCH v2 3/3] ARM: Samsung: Rework platform data of s3c-fb
> driver
>
> On 13 March 2012 15:17, Jingoo Han wrote:
> >> -Original Message-
> >> From: Thomas Abraham [mailto:thomas.abra...@linaro.org]
> >> Sent: Tuesday, March 13, 2012 6:00 AM
> >> To: linux-fb...@vger.kernel.org
> >> Cc: florianschandi...@gmx.de; linux-arm-ker...@lists.infradead.org;
> >> linux-samsung-soc@vger.kernel.org;
> >> kgene@samsung.com; jg1@samsung.com; ben-li...@fluff.org;
> >> patc...@linaro.org; Kyungmin Park;
> >> JeongHyeon Kim; Heiko Stuebner; Kwangwoo Lee; Mark Brown; Peter Korsgaard;
> >> Darius Augulis; Maurus
> >> Cuelenaere
> >> Subject: [PATCH v2 3/3] ARM: Samsung: Rework platform data of s3c-fb driver
> >>
> >> For all the Samsung SoC based boards which have the platform data for
> >> s3c-fb driver, the 'default_win' element in the platform data is removed
> >> and the lcd panel video timing values are moved out of individual window
> >> configuration data.
> >>
> >> Cc: Jingoo Han
> >> Cc: Kyungmin Park
> >> Cc: JeongHyeon Kim
> >> Cc: Kukjin Kim
> >> Cc: Heiko Stuebner
> >> Cc: Ben Dooks
> >> Cc: Kwangwoo Lee
> >> Cc: Mark Brown
> >> Cc: Peter Korsgaard
> >> Cc: Darius Augulis
> >> Cc: Maurus Cuelenaere
> >> Signed-off-by: Thomas Abraham
> >> ---
> >> arch/arm/mach-exynos/mach-nuri.c | 26 ++---
> >> arch/arm/mach-exynos/mach-origen.c | 24 ++---
> >> arch/arm/mach-exynos/mach-smdkv310.c | 28 +++
> >> arch/arm/mach-exynos/mach-universal_c210.c | 26 ++---
> >> arch/arm/mach-s3c24xx/mach-smdk2416.c | 27 ++
> >> arch/arm/mach-s3c64xx/mach-anw6410.c | 25 ++---
> >> arch/arm/mach-s3c64xx/mach-crag6410.c | 25 ++---
> >> arch/arm/mach-s3c64xx/mach-hmt.c | 24 ++---
> >> arch/arm/mach-s3c64xx/mach-mini6410.c | 40
> >> ---
> >> arch/arm/mach-s3c64xx/mach-real6410.c | 40
> >> ---
> >> arch/arm/mach-s3c64xx/mach-smartq5.c | 26 ++---
> >> arch/arm/mach-s3c64xx/mach-smartq7.c | 26 ++---
> >> arch/arm/mach-s3c64xx/mach-smdk6410.c | 25 ++---
> >> arch/arm/mach-s5p64x0/mach-smdk6440.c | 24 ++---
> >> arch/arm/mach-s5p64x0/mach-smdk6450.c | 24 ++---
> >> arch/arm/mach-s5pc100/mach-smdkc100.c | 27 ++
> >> arch/arm/mach-s5pv210/mach-aquila.c | 36
> >> +++--
> >> arch/arm/mach-s5pv210/mach-goni.c | 26 ++---
> >> arch/arm/mach-s5pv210/mach-smdkv210.c | 24 ++---
> >> 19 files changed, 285 insertions(+), 238 deletions(-)
> >>
> >
> > [.]
> >
> >> diff --git a/arch/arm/mach-s3c64xx/mach-mini6410.c
> >> b/arch/arm/mach-s3c64xx/mach-mini6410.c
> >> index c34c2ab..24dcdc9 100644
> >> --- a/arch/arm/mach-s3c64xx/mach-mini6410.c
> >> +++ b/arch/arm/mach-s3c64xx/mach-mini6410.c
> >> @@ -153,36 +153,32 @@ static struct s3c2410_platform_nand
> >> mini6410_nand_info = {
> >>
> >> static struct s3c_fb_pd_win mini6410_fb_win[] = {
> >> {
> >> - .win_mode = { /* 4.3" 480x272 */
> >> - .left_margin = 3,
> >> - .right_margin = 2,
> >> - .upper_margin = 1,
> >> - .lower_margin = 1,
> >> - .hsync_len = 40,
> >> - .vsync_len = 1,
> >> - .xres = 480,
> >> - .yres = 272,
> >> - },
> >> .max_bpp = 32,
> >> .default_bpp = 16,
> >> + .xres = 480,
> >> + .yres = 272,
> >> }, {
> >> - .win_mode = { /* 7.0" 800x480 */
> >> - .left_margin = 8,
> >> - .right_margin = 13,
> >> - .upper_margin = 7,
> >> - .lower_margin = 5,
> >> - .hsync_len = 3,
> >> - .vsync_len = 1,
> >> - .xres = 800,
> >> - .yres = 480,
> >> - },
> >> .max_bpp = 32,
> >> .default_bpp = 16,
> >> + .xres = 800,
> >> +
Re: [PATCH 0/3 v2] Updates for exynos4210 and DT-based systems
+CC another i2c subsystem maintainer, Wolfram Sang. On 3/14/12, Karol Lewandowski wrote: > Changes since v1: > - Move unrelated code fragment to separate patch (of_match_ptr()) > - Move device-type handling to separate function and rework its >internals a bit > > This patchset reworks i2c-s3c2410 driver a bit to better handle > device tree-enabled platforms and adds two quirks required by > exynos4210-specific I2C controller used by s5p-hdmi driver. > > This patchset is based on "i2c-bjdooks/for-34/i2c/i2c-samsung" branch > taken from: > > git://git.fluff.org/bjdooks/linux.git > > Karol Lewandowski (3): > i2c-s3c2410: Drop unused define > i2c-s3c2410: Rework device type handling > i2c-s3c2410: Add HDMIPHY quirk for S3C2440 > > .../devicetree/bindings/i2c/samsung-i2c.txt| 10 ++- > drivers/i2c/busses/i2c-s3c2410.c | 93 > +++- > 2 files changed, 77 insertions(+), 26 deletions(-) > > -- > 1.7.9 > > -- > To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" > in > the body of a message to majord...@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html > -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [GIT PULL v2 4/4] Samsung devel-dma for v3.4
Hi, On Sun, Mar 11, 2012 at 1:03 AM, Kukjin Kim wrote: > Hi Arnd, Olof, > > I rebased devel-samsung-dma on top of new next-exynos-clock as per Olof's > suggestion. > > Please pull it from: > git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git > next/devel-samsung-dma > > If any problems, please let me know. > > > Thanks. > > Best regards, > Kgene. > -- > Kukjin Kim , Senior Engineer, > SW Solution Development Team, Samsung Electronics Co., Ltd. > > The following changes since commit 44b2cef5ae6da48523fa634230ca66107110a7dd: > > ARM: EXYNOS: Add clock register addresses for EXYNOS4X12 bus devfreq driver > (2012-03-10 22:30:32 -0800) > > > are available in the git repository at: > git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git > next/devel-samsung-dma Thanks, pulled into next/drivers. -Olof -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [GIT PULL 2/4] Samsung devel-pd for v3.4
Hi, On Sat, Mar 10, 2012 at 8:08 AM, Kukjin Kim wrote: > Hi Arnd, Olof, > > This is Generic Power Domain patches for EXYNOS. Basically, Thomas' patches, > adding support Generic Power Domain patches are in Rafael's tree, > linux-pm/linux-next and see below merge commit. > http://git.kernel.org/?p=linux/kernel/git/rafael/linux-pm.git;a=commit;h=dcaad77a8074b6de58e745546bc543d5538404f2 > And this adds hooking up G2D and JPEG to Generic PD. > > Please pull and here is my preferred resolution when merge this after > next/board-samsung. > > diff --cc arch/arm/mach-exynos/mach-universal_c210.c > index 3663aee,0262417..0b944eb > --- a/arch/arm/mach-exynos/mach-universal_c210.c > +++ b/arch/arm/mach-exynos/mach-universal_c210.c > @@@ -1053,10 -981,6 +1052,7 @@@ static struct platform_device *universa > &s5p_device_mfc, > &s5p_device_mfc_l, > &s5p_device_mfc_r, > - &exynos4_device_pd[PD_MFC], > - &exynos4_device_pd[PD_LCD0], > - &exynos4_device_pd[PD_CAM], > + &cam_vt_dio_fixed_reg_dev, > &cam_i_core_fixed_reg_dev, > &cam_s_if_fixed_reg_dev, > &s5p_device_fimc_md, > > If any problems, please kindly let me know. > > Thanks. > > Best regards, > Kgene. > -- > Kukjin Kim , Senior Engineer, > SW Solution Development Team, Samsung Electronics Co., Ltd. > > The following changes since commit 192cfd58774b4d17b2fe8bdc77d89c2ef4e0591d: > > Linux 3.3-rc6 (2012-03-03 17:08:09 -0800) > > are available in the git repository at: > git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git > next/devel-samsung-pd Pulled, thanks! -Olof -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [GIT PULL v2 3/4] Samsung devel-mmc for v3.4
Hi, On Sun, Mar 11, 2012 at 12:56 AM, Kukjin Kim wrote: > Hi Arnd, Olof > > Please pull Samsung devel-mmc for v3.4 and I rebased it on top of v3.3-rc7 > without v3.4-for-cjb. > > Please pull it from: > git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git > next/devel-samsung-mmc > > > If any problems, please kindly let me know. > > Thanks. > > Best regards, > Kgene. > -- > Kukjin Kim , Senior Engineer, > SW Solution Development Team, Samsung Electronics Co., Ltd. > > The following changes since commit fde7d9049e55ab85a390be7f415d74c9f62dd0f9: > > Linux 3.3-rc7 (2012-03-10 13:49:52 -0800) > > > are available in the git repository at: > git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git > next/devel-samsung-mmc Thanks, pulled into next/drivers. -Olof -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [GIT PULL v2] Samsung board patches for v3.4
Hi, On Sun, Mar 11, 2012 at 12:38 AM, Kukjin Kim wrote: > Hi Arnd, Olof, > > Please pull regarding rebased Samsung board patches without the non-dt board > file addition for v3.4. > > If any problems, please let me know. > > Thanks. > > Best regards, > Kgene. > -- > Kukjin Kim , Senior Engineer, > SW Solution Development Team, Samsung Electronics Co., Ltd. > > The following changes since commit fde7d9049e55ab85a390be7f415d74c9f62dd0f9: > > Linux 3.3-rc7 (2012-03-10 13:49:52 -0800) > > are available in the git repository at: > git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git > next/board-samsung Pulled into next/boards. Thanks. -Olof -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [GIT PULL v2] Samsung cleanup EXYNOS clock for v3.4
On Sun, Mar 11, 2012 at 12:32 AM, Kukjin Kim wrote: > Hi Arnd, Olof, > > I rebased cleanup-exynos-clock on top of cleanup-use-static as per Olof's > suggestion. > > Please pull it from: > git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git > next/cleanup-exynos-clock > > If any problems, please kindly let me know. > > Thanks. > > Best regards, > Kgene. > -- > Kukjin Kim , Senior Engineer, > SW Solution Development Team, Samsung Electronics Co., Ltd. > > The following changes since commit c15a04338b5a6d4305d107a5b6c0cd43418b7f3e: > > Merge branch 'next/cleanup-use-static' into next/cleanup-exynos-clock > (2012-03-10 22:21:36 -0800) > > are available in the git repository at: > > git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git > next/cleanup-exynos-clock Thanks, pulled into next/cleanup. -Olof -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [GIT PULL 2/4] Samsung devel-pd for v3.4
Hi, On Sat, Mar 10, 2012 at 1:09 PM, Rafael J. Wysocki wrote: > Hi, > > On Saturday, March 10, 2012, Olof Johansson wrote: >> Hi Rafael, >> >> The below series contains two patches that have been sent to you, and >> that are sitting in the pm-domains branch. >> >> Two questions before I pull this into arm-soc: >> >> 1) Are you 100% sure this will be submitted to 3.4? And if so, will >> you send it early during the merge window? > > Yes and yes. > >> 2) Are you 100% sure you will not rebase the branch into which you >> pulled the v3.4-for-rafael branch? > > Yes, I am. > >> I am asking because if we pull this in, and you rebase between now and >> when it's sent in, we're risking merge conflicts that will be painful >> to resolve. We've been bitten by that from other dependencies in the >> past so we're being careful. > > Sure, I understand that. > > As a general rule, topic braches in my tree whose names start with pm- are > never rebased (exactly for this reason). Excellent, thanks! I'll pull that in as a depends/ branch in arm-soc (since that's how we document it), and mark it in our notes so the Samsung branch gets merged after yours when going to Linus. -Olof -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 2/2] regulator: add device tree support for max8997
On Tue, 13 Mar 2012 12:14:42 +0530, Thomas Abraham wrote: > On 13 March 2012 09:13, Grant Likely wrote: > > On Thu, 23 Feb 2012 18:08:08 +0530, Thomas Abraham > > wrote: > > Otherwise, the patch looks pretty good. Â (although seeing the decode > > function > > has got me thinking that we need a much better way of decoding the dt data). > > The parsing function looks huge since there is lot of data to pick up > from the dt node. Oh, I understand that you have to do it this way; I just think the core code should make it a lot easier. :-) g. -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] i2c-s3c2410: Add HDMIPHY quirk for S3C2440
This patch adds support for s3c2440 I2C bus controller dedicated HDMIPHY device
on
Exynos4 platform. Some quirks are introduced due to differences between HDMIPHY
and other I2C controllers on Exynos4. These differences are:
- no GPIOs, HDMIPHY is inside the SoC and the controller is connected
internally
- due to unknown reason (probably HW bug in HDMIPHY and/or the controller) a
transfer fails to finish. The controller hangs after sending the last byte,
the workaround for this bug is resetting the controller after each transfer
Signed-off-by: Tomasz Stanislawski
Signed-off-by: Karol Lewandowski
Tested-by: Tomasz Stanislawski
Signed-off-by: Kyungmin Park
---
.../devicetree/bindings/i2c/samsung-i2c.txt| 11 +-
drivers/i2c/busses/i2c-s3c2410.c | 35
2 files changed, 44 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/i2c/samsung-i2c.txt
b/Documentation/devicetree/bindings/i2c/samsung-i2c.txt
index 38832c7..c6670f9 100644
--- a/Documentation/devicetree/bindings/i2c/samsung-i2c.txt
+++ b/Documentation/devicetree/bindings/i2c/samsung-i2c.txt
@@ -10,14 +10,21 @@ Required properties:
region.
- interrupts: interrupt number to the cpu.
- samsung,i2c-sda-delay: Delay (in ns) applied to data line (SDA) edges.
- - gpios: The order of the gpios should be the following: .
-The gpio specifier depends on the gpio controller.
Optional properties:
+ - gpios: The order of the gpios should be the following: .
+The gpio specifier depends on the gpio controller. Required in all cases
+except when "samsung,i2c-no-gpio" is also specified.
+ - samsung,i2c-no-gpio: input/output lines of the controller are
+permanently wired to the respective client, there are no gpio
+lines that need to be configured to enable this controller
- samsung,i2c-slave-addr: Slave address in multi-master enviroment. If not
specified, default value is 0.
- samsung,i2c-max-bus-freq: Desired frequency in Hz of the bus. If not
specified, the default value in Hz is 10.
+ - samsung,i2c-quirk-hdmiphy: Quirk for HDMI PHY block found on
+Exynos4 platform - reduce timeout and reset controller after each
+transfer
Example:
diff --git a/drivers/i2c/busses/i2c-s3c2410.c b/drivers/i2c/busses/i2c-s3c2410.c
index f84d26f..fa5f8c4 100644
--- a/drivers/i2c/busses/i2c-s3c2410.c
+++ b/drivers/i2c/busses/i2c-s3c2410.c
@@ -52,6 +52,8 @@ static const struct of_device_id s3c24xx_i2c_match[];
#define TYPE_BITS 0x00ff
#define TYPE_S3C2410 0x0001
#define TYPE_S3C2440 0x0002
+#define FLAG_HDMIPHY 0x0100
+#define FLAG_NO_GPIO 0x0200
/* i2c controller state */
enum s3c24xx_i2c_state {
@@ -481,6 +483,13 @@ static int s3c24xx_i2c_set_master(struct s3c24xx_i2c *i2c)
unsigned long iicstat;
int timeout = 400;
+ /* the timeout for HDMIPHY is reduced to 10 ms because
+* the hangup is expected to happen, so waiting 400 ms
+* causes only unnecessary system hangup
+*/
+ if (i2c->type & FLAG_HDMIPHY)
+ timeout = 10;
+
while (timeout-- > 0) {
iicstat = readl(i2c->regs + S3C2410_IICSTAT);
@@ -490,6 +499,15 @@ static int s3c24xx_i2c_set_master(struct s3c24xx_i2c *i2c)
msleep(1);
}
+ /* hang-up of bus dedicated for HDMIPHY occurred, resetting */
+ if (i2c->type & FLAG_HDMIPHY) {
+ writel(0, i2c->regs + S3C2410_IICCON);
+ writel(0, i2c->regs + S3C2410_IICSTAT);
+ writel(0, i2c->regs + S3C2410_IICDS);
+
+ return 0;
+ }
+
return -ETIMEDOUT;
}
@@ -771,6 +789,9 @@ static int s3c24xx_i2c_parse_dt_gpio(struct s3c24xx_i2c
*i2c)
{
int idx, gpio, ret;
+ if (i2c->type & FLAG_NO_GPIO)
+ return 0;
+
for (idx = 0; idx < 2; idx++) {
gpio = of_get_gpio(i2c->dev->of_node, idx);
if (!gpio_is_valid(gpio)) {
@@ -795,6 +816,10 @@ free_gpio:
static void s3c24xx_i2c_dt_gpio_free(struct s3c24xx_i2c *i2c)
{
unsigned int idx;
+
+ if (i2c->type & FLAG_NO_GPIO)
+ return;
+
for (idx = 0; idx < 2; idx++)
gpio_free(i2c->gpios[idx]);
}
@@ -871,6 +896,13 @@ s3c24xx_i2c_parse_dt(struct device_node *np, struct
s3c24xx_i2c *i2c)
return;
pdata->bus_num = -1; /* i2c bus number is dynamically assigned */
+
+ if (of_get_property(np, "samsung,i2c-quirk-hdmiphy", NULL))
+ i2c->type |= FLAG_HDMIPHY;
+
+ if (of_get_property(np, "samsung,i2c-no-gpio", NULL))
+ i2c->type |= FLAG_NO_GPIO;
+
of_property_read_u32(np, "samsung,i2c-sda-delay", &pdata->sda_delay);
of_property_read_u32(np, "samsung,i2c-slave-addr", &pdata->slave_addr);
of_property_read_u32(np, "samsung,i2c-max-bus-freq",
@@ -
Re: [PATCH 3/3] i2c-s3c2410: Add HDMIPHY quirk for S3C2440
On 13.03.2012 18:27, Tomasz Stanislawski wrote: > Hi Karol, > Please refer to comments below, > > Regards, > Tomasz Stanislawski > > On 03/13/2012 05:54 PM, Karol Lewandowski wrote: >> This patch adds support for s3c2440 I2C bus controller dedicated HDMIPHY >> device on >> Exynos4 platform. Some quirks are introduced due to differences between >> HDMIPHY >> and other I2C controllers on Exynos4. These differences are: >> - no GPIOs, HDMIPHY is inside the SoC and the controller is connected >> internally >> - due to unknown reason (probably HW bug in HDMIPHY and/or the controller) a >> transfer fails to finish. The controller hangs after sending the last byte, >> the workaround for this bug is resetting the controller after each transfer >> >> Signed-off-by: Tomasz Stanislawski >> Signed-off-by: Karol Lewandowski >> Tested-by: Tomasz Stanislawski >> Signed-off-by: Kyungmin Park >> --- >> .../devicetree/bindings/i2c/samsung-i2c.txt| 10 - >> drivers/i2c/busses/i2c-s3c2410.c | 36 >> >> 2 files changed, 44 insertions(+), 2 deletions(-) >> > [snip] >> @@ -871,6 +896,14 @@ s3c24xx_i2c_parse_dt(struct device_node *np, struct >> s3c24xx_i2c *i2c) >> return; >> >> pdata->bus_num = -1; /* i2c bus number is dynamically assigned */ >> + >> +if (s3c24xx_i2c_is_type(i2c, TYPE_S3C2440) && > > I think that type checking should be removed because hdmiphy quirk is > something > orthogonal to the controller type. Ok, I'll drop this test and resend patch in a minute. Thanks! -- Karol Lewandowski | Samsung Poland R&D Center | Linux/Platform -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 3/3] i2c-s3c2410: Add HDMIPHY quirk for S3C2440
Hi Karol,
Please refer to comments below,
Regards,
Tomasz Stanislawski
On 03/13/2012 05:54 PM, Karol Lewandowski wrote:
> This patch adds support for s3c2440 I2C bus controller dedicated HDMIPHY
> device on
> Exynos4 platform. Some quirks are introduced due to differences between
> HDMIPHY
> and other I2C controllers on Exynos4. These differences are:
> - no GPIOs, HDMIPHY is inside the SoC and the controller is connected
> internally
> - due to unknown reason (probably HW bug in HDMIPHY and/or the controller) a
> transfer fails to finish. The controller hangs after sending the last byte,
> the workaround for this bug is resetting the controller after each transfer
>
> Signed-off-by: Tomasz Stanislawski
> Signed-off-by: Karol Lewandowski
> Tested-by: Tomasz Stanislawski
> Signed-off-by: Kyungmin Park
> ---
> .../devicetree/bindings/i2c/samsung-i2c.txt| 10 -
> drivers/i2c/busses/i2c-s3c2410.c | 36
>
> 2 files changed, 44 insertions(+), 2 deletions(-)
>
[snip]
> @@ -871,6 +896,14 @@ s3c24xx_i2c_parse_dt(struct device_node *np, struct
> s3c24xx_i2c *i2c)
> return;
>
> pdata->bus_num = -1; /* i2c bus number is dynamically assigned */
> +
> + if (s3c24xx_i2c_is_type(i2c, TYPE_S3C2440) &&
I think that type checking should be removed because hdmiphy quirk is something
orthogonal to the controller type.
> + of_get_property(np, "samsung,i2c-quirk-hdmiphy", NULL))
> + i2c->type |= FLAG_HDMIPHY;
> +
> + if (of_get_property(np, "samsung,i2c-no-gpio", NULL))
> + i2c->type |= FLAG_NO_GPIO;
> +
> of_property_read_u32(np, "samsung,i2c-sda-delay", &pdata->sda_delay);
> of_property_read_u32(np, "samsung,i2c-slave-addr", &pdata->slave_addr);
> of_property_read_u32(np, "samsung,i2c-max-bus-freq",
> @@ -1128,6 +1161,9 @@ static struct platform_device_id s3c24xx_driver_ids[] =
> {
> }, {
> .name = "s3c2440-i2c",
> .driver_data= TYPE_S3C2440,
> + }, {
> + .name = "s3c2440-hdmiphy-i2c",
> + .driver_data= TYPE_S3C2440 | FLAG_HDMIPHY | FLAG_NO_GPIO,
> }, { },
> };
> MODULE_DEVICE_TABLE(platform, s3c24xx_driver_ids);
--
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[PATCH 3/3] i2c-s3c2410: Add HDMIPHY quirk for S3C2440
This patch adds support for s3c2440 I2C bus controller dedicated HDMIPHY device
on
Exynos4 platform. Some quirks are introduced due to differences between HDMIPHY
and other I2C controllers on Exynos4. These differences are:
- no GPIOs, HDMIPHY is inside the SoC and the controller is connected
internally
- due to unknown reason (probably HW bug in HDMIPHY and/or the controller) a
transfer fails to finish. The controller hangs after sending the last byte,
the workaround for this bug is resetting the controller after each transfer
Signed-off-by: Tomasz Stanislawski
Signed-off-by: Karol Lewandowski
Tested-by: Tomasz Stanislawski
Signed-off-by: Kyungmin Park
---
.../devicetree/bindings/i2c/samsung-i2c.txt| 10 -
drivers/i2c/busses/i2c-s3c2410.c | 36
2 files changed, 44 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/i2c/samsung-i2c.txt
b/Documentation/devicetree/bindings/i2c/samsung-i2c.txt
index 38832c7..ac0917c 100644
--- a/Documentation/devicetree/bindings/i2c/samsung-i2c.txt
+++ b/Documentation/devicetree/bindings/i2c/samsung-i2c.txt
@@ -10,14 +10,20 @@ Required properties:
region.
- interrupts: interrupt number to the cpu.
- samsung,i2c-sda-delay: Delay (in ns) applied to data line (SDA) edges.
- - gpios: The order of the gpios should be the following: .
-The gpio specifier depends on the gpio controller.
Optional properties:
+ - gpios: The order of the gpios should be the following: .
+The gpio specifier depends on the gpio controller. Required in all cases
+except when "samsung,i2c-no-gpio" is also specified.
+ - samsung,i2c-no-gpio: input/output lines of the controller are
+permanently wired to the respective client, there are no gpio
+lines that need to be configured to enable this controller
- samsung,i2c-slave-addr: Slave address in multi-master enviroment. If not
specified, default value is 0.
- samsung,i2c-max-bus-freq: Desired frequency in Hz of the bus. If not
specified, the default value in Hz is 10.
+ - samsung,i2c-quirk-hdmiphy: Quirk for HDMI PHY block on S3C2440 -
+reduce timeout and reset controller when doing transefers
Example:
diff --git a/drivers/i2c/busses/i2c-s3c2410.c b/drivers/i2c/busses/i2c-s3c2410.c
index f84d26f..23bf7fa 100644
--- a/drivers/i2c/busses/i2c-s3c2410.c
+++ b/drivers/i2c/busses/i2c-s3c2410.c
@@ -52,6 +52,8 @@ static const struct of_device_id s3c24xx_i2c_match[];
#define TYPE_BITS 0x00ff
#define TYPE_S3C2410 0x0001
#define TYPE_S3C2440 0x0002
+#define FLAG_HDMIPHY 0x0100
+#define FLAG_NO_GPIO 0x0200
/* i2c controller state */
enum s3c24xx_i2c_state {
@@ -481,6 +483,13 @@ static int s3c24xx_i2c_set_master(struct s3c24xx_i2c *i2c)
unsigned long iicstat;
int timeout = 400;
+ /* the timeout for HDMIPHY is reduced to 10 ms because
+* the hangup is expected to happen, so waiting 400 ms
+* causes only unnecessary system hangup
+*/
+ if (i2c->type & FLAG_HDMIPHY)
+ timeout = 10;
+
while (timeout-- > 0) {
iicstat = readl(i2c->regs + S3C2410_IICSTAT);
@@ -490,6 +499,15 @@ static int s3c24xx_i2c_set_master(struct s3c24xx_i2c *i2c)
msleep(1);
}
+ /* hang-up of bus dedicated for HDMIPHY occurred, resetting */
+ if (i2c->type & FLAG_HDMIPHY) {
+ writel(0, i2c->regs + S3C2410_IICCON);
+ writel(0, i2c->regs + S3C2410_IICSTAT);
+ writel(0, i2c->regs + S3C2410_IICDS);
+
+ return 0;
+ }
+
return -ETIMEDOUT;
}
@@ -771,6 +789,9 @@ static int s3c24xx_i2c_parse_dt_gpio(struct s3c24xx_i2c
*i2c)
{
int idx, gpio, ret;
+ if (i2c->type & FLAG_NO_GPIO)
+ return 0;
+
for (idx = 0; idx < 2; idx++) {
gpio = of_get_gpio(i2c->dev->of_node, idx);
if (!gpio_is_valid(gpio)) {
@@ -795,6 +816,10 @@ free_gpio:
static void s3c24xx_i2c_dt_gpio_free(struct s3c24xx_i2c *i2c)
{
unsigned int idx;
+
+ if (i2c->type & FLAG_NO_GPIO)
+ return;
+
for (idx = 0; idx < 2; idx++)
gpio_free(i2c->gpios[idx]);
}
@@ -871,6 +896,14 @@ s3c24xx_i2c_parse_dt(struct device_node *np, struct
s3c24xx_i2c *i2c)
return;
pdata->bus_num = -1; /* i2c bus number is dynamically assigned */
+
+ if (s3c24xx_i2c_is_type(i2c, TYPE_S3C2440) &&
+ of_get_property(np, "samsung,i2c-quirk-hdmiphy", NULL))
+ i2c->type |= FLAG_HDMIPHY;
+
+ if (of_get_property(np, "samsung,i2c-no-gpio", NULL))
+ i2c->type |= FLAG_NO_GPIO;
+
of_property_read_u32(np, "samsung,i2c-sda-delay", &pdata->sda_delay);
of_property_read_u32(np, "samsung,i2c-slave-addr", &pdata->slave_addr);
of_property_read_u32(n
[PATCH 2/3] i2c-s3c2410: Rework device type handling
Reorganize driver a bit to better handle device tree-based systems:
- move machine type to driver's private structure instead of
quering platform device variants in runtime
- replace s3c24xx_i2c_type enum with plain unsigned int that can
hold not only device type but also hw revision-specific quirks
Signed-off-by: Karol Lewandowski
Signed-off-by: Kyungmin Park
---
drivers/i2c/busses/i2c-s3c2410.c | 53 +++---
1 files changed, 32 insertions(+), 21 deletions(-)
diff --git a/drivers/i2c/busses/i2c-s3c2410.c b/drivers/i2c/busses/i2c-s3c2410.c
index 85e3664..f84d26f 100644
--- a/drivers/i2c/busses/i2c-s3c2410.c
+++ b/drivers/i2c/busses/i2c-s3c2410.c
@@ -44,8 +44,16 @@
#include
#include
-/* i2c controller state */
+#ifdef CONFIG_OF
+static const struct of_device_id s3c24xx_i2c_match[];
+#endif
+
+/* reserve lower 8 bits for device type, use remaining space for hw quirks */
+#define TYPE_BITS 0x00ff
+#define TYPE_S3C2410 0x0001
+#define TYPE_S3C2440 0x0002
+/* i2c controller state */
enum s3c24xx_i2c_state {
STATE_IDLE,
STATE_START,
@@ -54,14 +62,10 @@ enum s3c24xx_i2c_state {
STATE_STOP
};
-enum s3c24xx_i2c_type {
- TYPE_S3C2410,
- TYPE_S3C2440,
-};
-
struct s3c24xx_i2c {
spinlock_t lock;
wait_queue_head_t wait;
+ unsigned inttype;
unsigned intsuspended:1;
struct i2c_msg *msg;
@@ -88,26 +92,32 @@ struct s3c24xx_i2c {
#endif
};
-/* default platform data removed, dev should always carry data. */
-
-/* s3c24xx_i2c_is2440()
+/* s3c24xx_i2c_is_type()
*
- * return true is this is an s3c2440
+ * return true if this controller is of specified type
*/
-static inline int s3c24xx_i2c_is2440(struct s3c24xx_i2c *i2c)
+static inline int s3c24xx_i2c_is_type(struct s3c24xx_i2c *i2c, unsigned int
type)
{
- struct platform_device *pdev = to_platform_device(i2c->dev);
- enum s3c24xx_i2c_type type;
+ return (i2c->type & TYPE_BITS) == type;
+}
+
+/* s3c24xx_get_device_type
+ *
+ * Get controller type either from device tree or platform device variant.
+*/
+static inline unsigned int s3c24xx_get_device_type(struct platform_device
*pdev)
+{
#ifdef CONFIG_OF
- if (i2c->dev->of_node)
- return of_device_is_compatible(i2c->dev->of_node,
- "samsung,s3c2440-i2c");
+ if (pdev->dev.of_node) {
+ const struct of_device_id *match;
+ match = of_match_node(&s3c24xx_i2c_match[0], pdev->dev.of_node);
+ return (unsigned int)match->data;
+ }
#endif
- type = platform_get_device_id(pdev)->driver_data;
- return type == TYPE_S3C2440;
+ return platform_get_device_id(pdev)->driver_data;
}
/* s3c24xx_i2c_master_complete
@@ -676,7 +686,7 @@ static int s3c24xx_i2c_clockrate(struct s3c24xx_i2c *i2c,
unsigned int *got)
writel(iiccon, i2c->regs + S3C2410_IICCON);
- if (s3c24xx_i2c_is2440(i2c)) {
+ if (s3c24xx_i2c_is_type(i2c, TYPE_S3C2440)) {
unsigned long sda_delay;
if (pdata->sda_delay) {
@@ -906,6 +916,7 @@ static int s3c24xx_i2c_probe(struct platform_device *pdev)
goto err_noclk;
}
+ i2c->type = s3c24xx_get_device_type(pdev);
if (pdata)
memcpy(i2c->pdata, pdata, sizeof(*pdata));
else
@@ -1123,8 +1134,8 @@ MODULE_DEVICE_TABLE(platform, s3c24xx_driver_ids);
#ifdef CONFIG_OF
static const struct of_device_id s3c24xx_i2c_match[] = {
- { .compatible = "samsung,s3c2410-i2c" },
- { .compatible = "samsung,s3c2440-i2c" },
+ { .compatible = "samsung,s3c2410-i2c", .data = (void *)TYPE_S3C2410 },
+ { .compatible = "samsung,s3c2440-i2c", .data = (void *)TYPE_S3C2440 },
{},
};
MODULE_DEVICE_TABLE(of, s3c24xx_i2c_match);
--
1.7.9
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[PATCH 1/3] i2c-s3c2410: Drop unused define
Use standard of_match_ptr() to avoid defining variable unused
in non device tree builds.
Signed-off-by: Karol Lewandowski
Signed-off-by: Kyungmin Park
---
drivers/i2c/busses/i2c-s3c2410.c |4 +---
1 files changed, 1 insertions(+), 3 deletions(-)
diff --git a/drivers/i2c/busses/i2c-s3c2410.c b/drivers/i2c/busses/i2c-s3c2410.c
index 737f721..85e3664 100644
--- a/drivers/i2c/busses/i2c-s3c2410.c
+++ b/drivers/i2c/busses/i2c-s3c2410.c
@@ -1128,8 +1128,6 @@ static const struct of_device_id s3c24xx_i2c_match[] = {
{},
};
MODULE_DEVICE_TABLE(of, s3c24xx_i2c_match);
-#else
-#define s3c24xx_i2c_match NULL
#endif
static struct platform_driver s3c24xx_i2c_driver = {
@@ -1140,7 +1138,7 @@ static struct platform_driver s3c24xx_i2c_driver = {
.owner = THIS_MODULE,
.name = "s3c-i2c",
.pm = S3C24XX_DEV_PM_OPS,
- .of_match_table = s3c24xx_i2c_match,
+ .of_match_table = of_match_ptr(s3c24xx_i2c_match),
},
};
--
1.7.9
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[PATCH 0/3 v2] Updates for exynos4210 and DT-based systems
Changes since v1: - Move unrelated code fragment to separate patch (of_match_ptr()) - Move device-type handling to separate function and rework its internals a bit This patchset reworks i2c-s3c2410 driver a bit to better handle device tree-enabled platforms and adds two quirks required by exynos4210-specific I2C controller used by s5p-hdmi driver. This patchset is based on "i2c-bjdooks/for-34/i2c/i2c-samsung" branch taken from: git://git.fluff.org/bjdooks/linux.git Karol Lewandowski (3): i2c-s3c2410: Drop unused define i2c-s3c2410: Rework device type handling i2c-s3c2410: Add HDMIPHY quirk for S3C2440 .../devicetree/bindings/i2c/samsung-i2c.txt| 10 ++- drivers/i2c/busses/i2c-s3c2410.c | 93 +++- 2 files changed, 77 insertions(+), 26 deletions(-) -- 1.7.9 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v11 3/3] iommu/exynos: Add iommu driver for Exynos Platforms
On Tue, Mar 13, 2012 at 7:00 PM, Joerg Roedel wrote:
> On Tue, Mar 13, 2012 at 05:50:16PM +0900, KyongHo Cho wrote:
>> >> +struct sysmmu_drvdata {
>> >> + struct device *sysmmu;
>> >> + char *dbgname;
>> >> + int nsfrs;
>> >> + void __iomem **sfrbases;
>> >> + struct clk *clk[2];
>> >> + int activations;
>> >> + rwlock_t lock;
>> >> + struct iommu_domain *domain;
>> >> + sysmmu_fault_handler_t fault_handler;
>> >> + unsigned long pgtable;
>> >> + struct iommu_client client;
>> >> +};
>> >
>> > Is there any reason why 'struct iommu_client' is a seperate data
>> > structure? Otherwise it can be merged with 'truct sysmmu_drvdata'.
>
> Of course this doesn't need to be changed immediatly. I just asked if
> there was a specific reason for this seperation.
>
>> The problems will be soon fixed and I will post next patch tomorrow.
>
> Fine. Please also get the Acked-bys from the Exynos maintainer on
> patches 1 and 2 at least. I'll merge it then.
>
Thank you.
AFAIK, Exynos maintainer is somewhat busy for his own job.
I will ask him to ack my patch soon.
Best regards,
Cho KyongHo.
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Re: [PATCH v3 00/12] ARM: EXYNOS: add support new EXYNOS5250
On Tuesday 13 March 2012, Kukjin Kim wrote: > > This patch adds support EXYNOS5250 SoC which has two A15 cores > can be used on mobile and tablet devices. Looks basically ok to me. I've commented on patches 5 and 9 and in both cases, I would either like to see the patch get dropped or the changeset description expanded to give a good explanation why the change is actually needed. Arnd -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 09/12] ARM: EXYNOS: add support get_core_count() for EXYNOS5250
On Tuesday 13 March 2012, Kukjin Kim wrote:
> The EXYNOS5250 has two Cortex-A15 cores and there's no
> need to call scu_enable() in platform_smp_prepare_cpus().
>
> Signed-off-by: Kukjin Kim
Can you explain this patch more? It only seems to make the
code less generic, but there is no indication if calling
the scu_get_core_count() function is actually wrong on
exynos5.
Arnd
> diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
> index 0f2035a..36c3984 100644
> --- a/arch/arm/mach-exynos/platsmp.c
> +++ b/arch/arm/mach-exynos/platsmp.c
> @@ -166,7 +166,10 @@ void __init smp_init_cpus(void)
> void __iomem *scu_base = scu_base_addr();
> unsigned int i, ncores;
>
> - ncores = scu_base ? scu_get_core_count(scu_base) : 1;
> + if (soc_is_exynos5250())
> + ncores = 2;
> + else
> + ncores = scu_base ? scu_get_core_count(scu_base) : 1;
>
> /* sanity check */
> if (ncores > nr_cpu_ids) {
> @@ -183,8 +186,8 @@ void __init smp_init_cpus(void)
>
> void __init platform_smp_prepare_cpus(unsigned int max_cpus)
> {
> -
> - scu_enable(scu_base_addr());
> + if (!soc_is_exynos5250())
> + scu_enable(scu_base_addr());
>
> /*
> * Write the address of secondary startup into the
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Re: [PATCH v3 05/12] ARM: EXYNOS: add support uart for EXYNOS4 and EXYNOS5
On Tuesday 13 March 2012, Kukjin Kim wrote: > Actually, the base address of uart is different between EXYNOS4 > and EXYNOS5 and this patch enables to support uart for EXYNOS4 > and EXYNOS5 SoCs at runtime. Can you explain why this patch is still needed? The exynos5250_dt_map_io function does not call s3c24xx_init_uarts() at all, so it seems that most of this patch just adds dead code that would only be needed for the non-dt case. Arnd -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v3 02/12] ARM: EXYNOS: use exynos_init_uarts() instead of exynos4_init_uarts()
Since exynos4_init_uarts() can be used for EXYNOS5 SoCs,
this patch changes the name of function to exynos_init_uarts().
Signed-off-by: Kukjin Kim
---
arch/arm/mach-exynos/common.c | 10 +-
1 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index a1f8a99..02eed29 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -52,7 +52,7 @@ static const char name_exynos4412[] = "EXYNOS4412";
static void exynos4_map_io(void);
static void exynos4_init_clocks(int xtal);
-static void exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no);
+static void exynos_init_uarts(struct s3c2410_uartcfg *cfg, int no);
static int exynos_init(void);
static struct cpu_table cpu_ids[] __initdata = {
@@ -61,7 +61,7 @@ static struct cpu_table cpu_ids[] __initdata = {
.idmask = EXYNOS4_CPU_MASK,
.map_io = exynos4_map_io,
.init_clocks= exynos4_init_clocks,
- .init_uarts = exynos4_init_uarts,
+ .init_uarts = exynos_init_uarts,
.init = exynos_init,
.name = name_exynos4210,
}, {
@@ -69,7 +69,7 @@ static struct cpu_table cpu_ids[] __initdata = {
.idmask = EXYNOS4_CPU_MASK,
.map_io = exynos4_map_io,
.init_clocks= exynos4_init_clocks,
- .init_uarts = exynos4_init_uarts,
+ .init_uarts = exynos_init_uarts,
.init = exynos_init,
.name = name_exynos4212,
}, {
@@ -77,7 +77,7 @@ static struct cpu_table cpu_ids[] __initdata = {
.idmask = EXYNOS4_CPU_MASK,
.map_io = exynos4_map_io,
.init_clocks= exynos4_init_clocks,
- .init_uarts = exynos4_init_uarts,
+ .init_uarts = exynos_init_uarts,
.init = exynos_init,
.name = name_exynos4412,
},
@@ -469,7 +469,7 @@ static int __init exynos_init(void)
/* uart registration process */
-static void __init exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no)
+static void __init exynos_init_uarts(struct s3c2410_uartcfg *cfg, int no)
{
struct s3c2410_uartcfg *tcfg = cfg;
u32 ucnt;
--
1.7.4.4
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[PATCH v3 05/12] ARM: EXYNOS: add support uart for EXYNOS4 and EXYNOS5
Actually, the base address of uart is different between EXYNOS4
and EXYNOS5 and this patch enables to support uart for EXYNOS4
and EXYNOS5 SoCs at runtime.
Signed-off-by: Kukjin Kim
---
arch/arm/mach-exynos/Makefile |1 +
arch/arm/mach-exynos/common.c |5 +-
arch/arm/mach-exynos/dev-uart.c | 78 +++
arch/arm/mach-exynos/include/mach/debug-macro.S |9 ++-
arch/arm/mach-exynos/include/mach/irqs.h| 12
arch/arm/mach-exynos/include/mach/map.h | 20 +++---
arch/arm/mach-exynos/include/mach/uncompress.h | 17 --
arch/arm/plat-s5p/Kconfig |4 +
arch/arm/plat-s5p/Makefile |3 +-
arch/arm/plat-samsung/include/plat/devs.h |2 +
arch/arm/plat-samsung/include/plat/uncompress.h |2 +
11 files changed, 135 insertions(+), 18 deletions(-)
create mode 100644 arch/arm/mach-exynos/dev-uart.c
diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index 2117f02..f8a3770 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -44,6 +44,7 @@ obj-$(CONFIG_MACH_EXYNOS4_DT) += mach-exynos4-dt.o
# device support
+obj-y += dev-uart.o
obj-$(CONFIG_ARCH_EXYNOS4) += dev-audio.o
obj-$(CONFIG_EXYNOS4_DEV_AHCI) += dev-ahci.o
obj-$(CONFIG_EXYNOS4_DEV_PD) += dev-pd.o
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 02eed29..4a82cf0 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -477,7 +477,10 @@ static void __init exynos_init_uarts(struct
s3c2410_uartcfg *cfg, int no)
for (ucnt = 0; ucnt < no; ucnt++, tcfg++)
tcfg->has_fracval = 1;
- s3c24xx_init_uartdevs("exynos4210-uart", s5p_uart_resources, cfg, no);
+ if (soc_is_exynos5250())
+ s3c24xx_init_uartdevs("exynos4210-uart",
exynos5_uart_resources, cfg, no);
+ else
+ s3c24xx_init_uartdevs("exynos4210-uart",
exynos4_uart_resources, cfg, no);
}
static DEFINE_SPINLOCK(eint_lock);
diff --git a/arch/arm/mach-exynos/dev-uart.c b/arch/arm/mach-exynos/dev-uart.c
new file mode 100644
index 000..2e85c02
--- /dev/null
+++ b/arch/arm/mach-exynos/dev-uart.c
@@ -0,0 +1,78 @@
+/*
+ * Copyright (c) 2012 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * Base EXYNOS UART resource and device definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+
+#include
+
+#define EXYNOS_UART_RESOURCE(_series, _nr) \
+static struct resource exynos##_series##_uart##_nr##_resource[] = {\
+ [0] = DEFINE_RES_MEM(EXYNOS##_series##_PA_UART##_nr,
EXYNOS##_series##_SZ_UART),\
+ [1] = DEFINE_RES_IRQ(EXYNOS##_series##_IRQ_UART##_nr), \
+};
+
+EXYNOS_UART_RESOURCE(4, 0)
+EXYNOS_UART_RESOURCE(4, 1)
+EXYNOS_UART_RESOURCE(4, 2)
+EXYNOS_UART_RESOURCE(4, 3)
+
+struct s3c24xx_uart_resources exynos4_uart_resources[] __initdata = {
+ [0] = {
+ .resources = exynos4_uart0_resource,
+ .nr_resources = ARRAY_SIZE(exynos4_uart0_resource),
+ },
+ [1] = {
+ .resources = exynos4_uart1_resource,
+ .nr_resources = ARRAY_SIZE(exynos4_uart1_resource),
+ },
+ [2] = {
+ .resources = exynos4_uart2_resource,
+ .nr_resources = ARRAY_SIZE(exynos4_uart2_resource),
+ },
+ [3] = {
+ .resources = exynos4_uart3_resource,
+ .nr_resources = ARRAY_SIZE(exynos4_uart3_resource),
+ },
+};
+
+EXYNOS_UART_RESOURCE(5, 0)
+EXYNOS_UART_RESOURCE(5, 1)
+EXYNOS_UART_RESOURCE(5, 2)
+EXYNOS_UART_RESOURCE(5, 3)
+
+struct s3c24xx_uart_resources exynos5_uart_resources[] __initdata = {
+ [0] = {
+ .resources = exynos5_uart0_resource,
+ .nr_resources = ARRAY_SIZE(exynos5_uart0_resource),
+ },
+ [1] = {
+ .resources = exynos5_uart1_resource,
+ .nr_resources = ARRAY_SIZE(exynos5_uart0_resource),
+ },
+ [2] = {
+ .resources = exynos5_uart2_resource,
+ .nr_resources = ARRAY_SIZE(exynos5_uart2_resource),
+ },
+ [3] = {
+ .resources = exynos5_uart3_resource,
+ .nr_resources = ARRAY_SIZE(exynos5_uart3_resource),
+ },
+};
diff --git a/arch/arm/mach-exynos/include/mach/debug-macro.S
b/arch/arm/mach-exynos/include/mach/debug-macro.S
index 6cacf16..6c857ff 100644
--- a/arch/arm/mach-exynos/include/mach/debug-macro.S
+++ b/arch/arm/mach-exynos/include/mac
[PATCH v3 04/12] ARM: EXYNOS: add initial setup-i2c0 for EXYNOS5
In all of Samsung platform, the setup-i2c0.c file for I2C channel 0
is always compiled. So when supporting new SoC,it should be updated
for it. Since EXYNOS5 GPIO will be supported after this, there is no
setup gpio in there now. It will be implemented with that, of course.
Signed-off-by: Kukjin Kim
---
arch/arm/mach-exynos/Makefile |2 +-
arch/arm/mach-exynos/setup-i2c0.c |9 ++---
2 files changed, 7 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index 995e7cc..2117f02 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -52,7 +52,7 @@ obj-$(CONFIG_EXYNOS4_DEV_DWMCI) += dev-dwmci.o
obj-$(CONFIG_EXYNOS4_DEV_DMA) += dma.o
obj-$(CONFIG_EXYNOS4_DEV_USB_OHCI) += dev-ohci.o
-obj-$(CONFIG_ARCH_EXYNOS4) += setup-i2c0.o
+obj-$(CONFIG_ARCH_EXYNOS) += setup-i2c0.o
obj-$(CONFIG_EXYNOS4_SETUP_FIMC) += setup-fimc.o
obj-$(CONFIG_EXYNOS4_SETUP_FIMD0) += setup-fimd0.o
obj-$(CONFIG_EXYNOS4_SETUP_I2C1) += setup-i2c1.o
diff --git a/arch/arm/mach-exynos/setup-i2c0.c
b/arch/arm/mach-exynos/setup-i2c0.c
index d395bd1..b90d94c 100644
--- a/arch/arm/mach-exynos/setup-i2c0.c
+++ b/arch/arm/mach-exynos/setup-i2c0.c
@@ -1,7 +1,5 @@
/*
- * linux/arch/arm/mach-exynos4/setup-i2c0.c
- *
- * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+ * Copyright (c) 2009-2012 Samsung Electronics Co., Ltd.
* http://www.samsung.com/
*
* I2C0 GPIO configuration.
@@ -18,9 +16,14 @@ struct platform_device; /* don't need the contents */
#include
#include
#include
+#include
void s3c_i2c0_cfg_gpio(struct platform_device *dev)
{
+ if (soc_is_exynos5250())
+ /* will be implemented with gpio function */
+ return;
+
s3c_gpio_cfgall_range(EXYNOS4_GPD1(0), 2,
S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
}
--
1.7.4.4
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[PATCH v3 10/12] ARM: EXYNOS: add support ARCH_EXYNOS5 for EXYNOS5 SoCs
This patch adds CONFIG_ARCH_EXYNOS5 and CONFIG_SOC_EXYNOS5250 for supporting EXYNOS5250 SoC and allows supporting EXYNOS4 and EXYNOS5 together. Signed-off-by: Kukjin Kim --- arch/arm/mach-exynos/Kconfig | 17 - arch/arm/mach-exynos/Makefile |1 + 2 files changed, 13 insertions(+), 5 deletions(-) diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index 5d602f6..31ef33f 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig @@ -11,10 +11,6 @@ if ARCH_EXYNOS menu "SAMSUNG EXYNOS SoCs Support" -choice - prompt "EXYNOS System Type" - default ARCH_EXYNOS4 - config ARCH_EXYNOS4 bool "SAMSUNG EXYNOS4" select HAVE_SMP @@ -22,7 +18,11 @@ config ARCH_EXYNOS4 help Samsung EXYNOS4 SoCs based systems -endchoice +config ARCH_EXYNOS5 + bool "SAMSUNG EXYNOS5" + select HAVE_SMP + help + Samsung EXYNOS5 (Cortex-A15) SoC based systems comment "EXYNOS SoCs" @@ -53,6 +53,13 @@ config SOC_EXYNOS4412 help Enable EXYNOS4412 SoC support +config SOC_EXYNOS5250 + bool "SAMSUNG EXYNOS5250" + default y + depends on ARCH_EXYNOS5 + help + Enable EXYNOS5250 SoC support + config EXYNOS4_MCT bool default y diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile index f8a3770..7214092 100644 --- a/arch/arm/mach-exynos/Makefile +++ b/arch/arm/mach-exynos/Makefile @@ -14,6 +14,7 @@ obj- := obj-$(CONFIG_ARCH_EXYNOS) += common.o obj-$(CONFIG_ARCH_EXYNOS4) += clock-exynos4.o +obj-$(CONFIG_ARCH_EXYNOS5) += clock-exynos5.o obj-$(CONFIG_CPU_EXYNOS4210) += clock-exynos4210.o obj-$(CONFIG_SOC_EXYNOS4212) += clock-exynos4212.o -- 1.7.4.4 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v3 12/12] ARM: dts: add initial dts file for EXYNOS5250, SMDK5250
This patch adds initial dts file for EXYNOS5250 SoC. This dts
file is including the SoC specific devices and properties. And
adds the dts file for SMDK5250 board which uses the EXYNOS5250
dts file. Its board specific properites will be added later.
Cc: Thomas Abraham
Cc: Grant Likely
Signed-off-by: Kukjin Kim
---
arch/arm/boot/dts/exynos5250-smdk5250.dts | 26 ++
arch/arm/boot/dts/exynos5250.dtsi | 413 +
2 files changed, 439 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/boot/dts/exynos5250-smdk5250.dts
create mode 100644 arch/arm/boot/dts/exynos5250.dtsi
diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts
b/arch/arm/boot/dts/exynos5250-smdk5250.dts
new file mode 100644
index 000..491539a
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
@@ -0,0 +1,26 @@
+/*
+ * SAMSUNG SMDK5250 board device tree source
+ *
+ * Copyright (c) 2012 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/dts-v1/;
+/include/ "exynos5250.dtsi"
+
+/ {
+ model = "SAMSUNG SMDK5250 board based on EXYNOS5250";
+ compatible = "samsung,smdk5250", "samsung,exynos5250";
+
+ memory {
+ reg = <0x4000 0x8000>;
+ };
+
+ chosen {
+ bootargs = "root=/dev/ram0 rw ramdisk=8192 rootfstype=squashfs
initrd=0x4100,8M console=ttySAC1,115200 init=/linuxrc";
+ };
+};
diff --git a/arch/arm/boot/dts/exynos5250.dtsi
b/arch/arm/boot/dts/exynos5250.dtsi
new file mode 100644
index 000..3e70608
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -0,0 +1,413 @@
+/*
+ * SAMSUNG EXYNOS5250 SoC device tree source
+ *
+ * Copyright (c) 2012 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * SAMSUNG EXYNOS5250 SoC device nodes are listed in this file.
+ * EXYNOS5250 based board files can include this file and provide
+ * values for board specfic bindings.
+ *
+ * Note: This file does not include device nodes for all the controllers in
+ * EXYNOS5250 SoC. As device tree coverage for EXYNOS5250 increases,
+ * additional nodes can be added to this file.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/include/ "skeleton.dtsi"
+
+/ {
+ compatible = "samsung,exynos5250";
+ interrupt-parent = <&gic>;
+
+ gic:interrupt-controller@1049 {
+ compatible = "arm,cortex-a9-gic";
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ reg = <0x1049 0x1000>, <0x1048 0x100>;
+ };
+
+ watchdog@101D {
+ compatible = "samsung,s3c2410-wdt";
+ reg = <0x101D 0x100>;
+ interrupts = <0 42 0>;
+ };
+
+ rtc@101E {
+ compatible = "samsung,s3c6410-rtc";
+ reg = <0x101E 0x100>;
+ interrupts = <0 43 0>, <0 44 0>;
+ };
+
+ sdhci@1220 {
+ compatible = "samsung,exynos4210-sdhci";
+ reg = <0x1220 0x100>;
+ interrupts = <0 75 0>;
+ };
+
+ sdhci@1221 {
+ compatible = "samsung,exynos4210-sdhci";
+ reg = <0x1221 0x100>;
+ interrupts = <0 76 0>;
+ };
+
+ sdhci@1222 {
+ compatible = "samsung,exynos4210-sdhci";
+ reg = <0x1222 0x100>;
+ interrupts = <0 77 0>;
+ };
+
+ sdhci@1223 {
+ compatible = "samsung,exynos4210-sdhci";
+ reg = <0x1223 0x100>;
+ interrupts = <0 78 0>;
+ };
+
+ serial@12C0 {
+ compatible = "samsung,exynos4210-uart";
+ reg = <0x12C0 0x100>;
+ interrupts = <0 51 0>;
+ };
+
+ serial@12C1 {
+ compatible = "samsung,exynos4210-uart";
+ reg = <0x12C1 0x100>;
+ interrupts = <0 52 0>;
+ };
+
+ serial@12C2 {
+ compatible = "samsung,exynos4210-uart";
+ reg = <0x12C2 0x100>;
+ interrupts = <0 53 0>;
+ };
+
+ serial@12C3 {
+ compatible = "samsung,exynos4210-uart";
+ reg = <0x12C3 0x100>;
+ interrupts = <0 54 0>;
+ };
+
+ i2c@12C6 {
+ compatible = "samsung,s3c2440-i2c";
+ reg = <0x12C6 0x100>;
+ interrupts = <0 56 0>;
+ };
+
+ i2c@12C7 {
+ compatible = "samsung,s3c2440-i2c";
+ reg = <0x12C7 0x100>;
+ interrupts = <0 57 0>;
+ };
+
+
[PATCH v3 11/12] ARM: EXYNOS: add support device tree enabled board file for EXYNOS5
This patch adds a new EXYNOS5 compatible device tree enabled board
When using this, a corresponding device tree blob which describes the
board's properties should be supplied at boot time to the kernel.
Cc: Thomas Abraham
Cc: Grant Likely
Signed-off-by: Kukjin Kim
---
arch/arm/mach-exynos/Kconfig | 22 +-
arch/arm/mach-exynos/Makefile |1 +
arch/arm/mach-exynos/mach-exynos5-dt.c | 78
3 files changed, 100 insertions(+), 1 deletions(-)
create mode 100644 arch/arm/mach-exynos/mach-exynos5-dt.c
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 31ef33f..bca0ded 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -358,7 +358,18 @@ config MACH_SMDK4412
Machine support for Samsung SMDK4412
endif
-comment "Flattened Device Tree based board for Exynos4 based SoC"
+if ARCH_EXYNOS5
+
+comment "EXYNOS5250 Boards"
+
+config MACH_SMDK5250
+ bool "SMDK5250"
+ select SOC_EXYNOS5250
+ help
+ Machine support for Samsung SMDK5250
+endif
+
+comment "Flattened Device Tree based board for EXYNOS SoCs"
config MACH_EXYNOS4_DT
bool "Samsung Exynos4 Machine using device tree"
@@ -372,6 +383,15 @@ config MACH_EXYNOS4_DT
Note: This is under development and not all peripherals can be
supported
with this machine file.
+config MACH_EXYNOS5_DT
+ bool "SAMSUNG EXYNOS5 Machine using device tree"
+ select SOC_EXYNOS5250
+ select USE_OF
+ select ARM_AMBA
+ help
+ Machine support for Samsung Exynos4 machine with device tree enabled.
+ Select this if a fdt blob is available for the EXYNOS4 SoC based
board.
+
if ARCH_EXYNOS4
comment "Configuration for HSMMC 8-bit bus width"
diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index 7214092..29967ef 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -42,6 +42,7 @@ obj-$(CONFIG_MACH_SMDK4212) += mach-smdk4x12.o
obj-$(CONFIG_MACH_SMDK4412)+= mach-smdk4x12.o
obj-$(CONFIG_MACH_EXYNOS4_DT) += mach-exynos4-dt.o
+obj-$(CONFIG_MACH_EXYNOS5_DT) += mach-exynos5-dt.o
# device support
diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c
b/arch/arm/mach-exynos/mach-exynos5-dt.c
new file mode 100644
index 000..0d26f50
--- /dev/null
+++ b/arch/arm/mach-exynos/mach-exynos5-dt.c
@@ -0,0 +1,78 @@
+/*
+ * SAMSUNG EXYNOS5250 Flattened Device Tree enabled machine
+ *
+ * Copyright (c) 2012 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include
+#include
+
+#include
+#include
+#include
+
+#include
+#include
+
+#include "common.h"
+
+/*
+ * The following lookup table is used to override device names when devices
+ * are registered from device tree. This is temporarily added to enable
+ * device tree support addition for the EXYNOS5 architecture.
+ *
+ * For drivers that require platform data to be provided from the machine
+ * file, a platform data pointer can also be supplied along with the
+ * devices names. Usually, the platform data elements that cannot be parsed
+ * from the device tree by the drivers (example: function pointers) are
+ * supplied. But it should be noted that this is a temporary mechanism and
+ * at some point, the drivers should be capable of parsing all the platform
+ * data from the device tree.
+ */
+static const struct of_dev_auxdata exynos5250_auxdata_lookup[] __initconst = {
+ OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS5_PA_UART0,
+ "exynos4210-uart.0", NULL),
+ OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS5_PA_UART1,
+ "exynos4210-uart.1", NULL),
+ OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS5_PA_UART2,
+ "exynos4210-uart.2", NULL),
+ OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS5_PA_UART3,
+ "exynos4210-uart.3", NULL),
+ OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA0, "dma-pl330.0", NULL),
+ OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA1, "dma-pl330.1", NULL),
+ OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA1, "dma-pl330.2", NULL),
+ {},
+};
+
+static void __init exynos5250_dt_map_io(void)
+{
+ exynos_init_io(NULL, 0);
+ s3c24xx_init_clocks(2400);
+}
+
+static void __init exynos5250_dt_machine_init(void)
+{
+ of_platform_populate(NULL, of_default_bus_match_table,
+ exynos5250_auxdata_lookup, NULL);
+}
+
+static char const *exynos5250_dt_compat[] __initdata = {
+ "samsung,exynos5250",
+ NULL
+};
+
+DT_MACHINE_START(EXYNOS5_DT, "SAMSUNG EXYNOS5 (Flattened Device Tree)")
+
[PATCH v3 09/12] ARM: EXYNOS: add support get_core_count() for EXYNOS5250
The EXYNOS5250 has two Cortex-A15 cores and there's no
need to call scu_enable() in platform_smp_prepare_cpus().
Signed-off-by: Kukjin Kim
---
arch/arm/mach-exynos/platsmp.c |9 ++---
1 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index 0f2035a..36c3984 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -166,7 +166,10 @@ void __init smp_init_cpus(void)
void __iomem *scu_base = scu_base_addr();
unsigned int i, ncores;
- ncores = scu_base ? scu_get_core_count(scu_base) : 1;
+ if (soc_is_exynos5250())
+ ncores = 2;
+ else
+ ncores = scu_base ? scu_get_core_count(scu_base) : 1;
/* sanity check */
if (ncores > nr_cpu_ids) {
@@ -183,8 +186,8 @@ void __init smp_init_cpus(void)
void __init platform_smp_prepare_cpus(unsigned int max_cpus)
{
-
- scu_enable(scu_base_addr());
+ if (!soc_is_exynos5250())
+ scu_enable(scu_base_addr());
/*
* Write the address of secondary startup into the
--
1.7.4.4
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[PATCH v3 07/12] ARM: EXYNOS: add interrupt definitions for EXYNOS5250
ARM: EXYNOS: irqs.h for exynos4 and exynos5 - WIP
This patch adds the interrupt definitions for EXYNOS5250 at
file. Basically, now it is needed for EXYNOS5250
interrupt and will be updated for single zImage next time.
Signed-off-by: Kukjin Kim
---
arch/arm/mach-exynos/common.c| 97 --
arch/arm/mach-exynos/dev-ahci.c |4 +-
arch/arm/mach-exynos/dev-audio.c |4 +-
arch/arm/mach-exynos/include/mach/irqs.h | 580 ++
arch/arm/mach-exynos/mct.c | 23 +-
arch/arm/plat-s5p/irq-pm.c | 25 +-
arch/arm/plat-samsung/irq-vic-timer.c| 16 +
7 files changed, 548 insertions(+), 201 deletions(-)
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 7fdb139..0b53018 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -345,6 +345,11 @@ static void __init exynos5_map_io(void)
{
iotable_init(exynos5_iodesc, ARRAY_SIZE(exynos5_iodesc));
+ s3c_device_i2c0.resource[0].start = EXYNOS5_PA_IIC(0);
+ s3c_device_i2c0.resource[0].end = EXYNOS5_PA_IIC(0) + SZ_4K - 1;
+ s3c_device_i2c0.resource[1].start = EXYNOS5_IRQ_IIC;
+ s3c_device_i2c0.resource[1].end = EXYNOS5_IRQ_IIC;
+
/* The I2C bus controllers are directly compatible with s3c2440 */
s3c_i2c0_setname("s3c2440-i2c");
s3c_i2c1_setname("s3c2440-i2c");
@@ -451,7 +456,14 @@ static struct irq_chip combiner_chip = {
static void __init combiner_cascade_irq(unsigned int combiner_nr, unsigned int
irq)
{
- if (combiner_nr >= MAX_COMBINER_NR)
+ unsigned int max_nr;
+
+ if (soc_is_exynos5250())
+ max_nr = EXYNOS5_MAX_COMBINER_NR;
+ else
+ max_nr = EXYNOS4_MAX_COMBINER_NR;
+
+ if (combiner_nr >= max_nr)
BUG();
if (irq_set_handler_data(irq, &combiner_data[combiner_nr]) != 0)
BUG();
@@ -462,8 +474,14 @@ static void __init combiner_init(unsigned int combiner_nr,
void __iomem *base,
unsigned int irq_start)
{
unsigned int i;
+ unsigned int max_nr;
- if (combiner_nr >= MAX_COMBINER_NR)
+ if (soc_is_exynos5250())
+ max_nr = EXYNOS5_MAX_COMBINER_NR;
+ else
+ max_nr = EXYNOS4_MAX_COMBINER_NR;
+
+ if (combiner_nr >= max_nr)
BUG();
combiner_data[combiner_nr].base = base;
@@ -506,7 +524,7 @@ void __init exynos4_init_irq(void)
of_irq_init(exynos4_dt_irq_match);
#endif
- for (irq = 0; irq < MAX_COMBINER_NR; irq++) {
+ for (irq = 0; irq < EXYNOS4_MAX_COMBINER_NR; irq++) {
combiner_init(irq, (void __iomem *)S5P_VA_COMBINER(irq),
COMBINER_IRQ(irq, 0));
@@ -527,7 +545,7 @@ void __init exynos5_init_irq(void)
gic_init(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU);
- for (irq = 0; irq < MAX_COMBINER_NR; irq++) {
+ for (irq = 0; irq < EXYNOS5_MAX_COMBINER_NR; irq++) {
combiner_init(irq, (void __iomem *)S5P_VA_COMBINER(irq),
COMBINER_IRQ(irq, 0));
combiner_cascade_irq(irq, IRQ_SPI(irq));
@@ -651,27 +669,43 @@ static DEFINE_SPINLOCK(eint_lock);
static unsigned int eint0_15_data[16];
-static unsigned int exynos4_get_irq_nr(unsigned int number)
-{
- u32 ret = 0;
-
- switch (number) {
- case 0 ... 3:
- ret = (number + IRQ_EINT0);
- break;
- case 4 ... 7:
- ret = (number + (IRQ_EINT4 - 4));
- break;
- case 8 ... 15:
- ret = (number + (IRQ_EINT8 - 8));
- break;
- default:
- printk(KERN_ERR "number available : %d\n", number);
- }
-
- return ret;
-}
+static unsigned int exynos4_eint0_15_src_int[16] = {
+ EXYNOS4_IRQ_EINT0,
+ EXYNOS4_IRQ_EINT1,
+ EXYNOS4_IRQ_EINT2,
+ EXYNOS4_IRQ_EINT3,
+ EXYNOS4_IRQ_EINT4,
+ EXYNOS4_IRQ_EINT5,
+ EXYNOS4_IRQ_EINT6,
+ EXYNOS4_IRQ_EINT7,
+ EXYNOS4_IRQ_EINT8,
+ EXYNOS4_IRQ_EINT9,
+ EXYNOS4_IRQ_EINT10,
+ EXYNOS4_IRQ_EINT11,
+ EXYNOS4_IRQ_EINT12,
+ EXYNOS4_IRQ_EINT13,
+ EXYNOS4_IRQ_EINT14,
+ EXYNOS4_IRQ_EINT15,
+};
+static unsigned int exynos5_eint0_15_src_int[16] = {
+ EXYNOS5_IRQ_EINT0,
+ EXYNOS5_IRQ_EINT1,
+ EXYNOS5_IRQ_EINT2,
+ EXYNOS5_IRQ_EINT3,
+ EXYNOS5_IRQ_EINT4,
+ EXYNOS5_IRQ_EINT5,
+ EXYNOS5_IRQ_EINT6,
+ EXYNOS5_IRQ_EINT7,
+ EXYNOS5_IRQ_EINT8,
+ EXYNOS5_IRQ_EINT9,
+ EXYNOS5_IRQ_EINT10,
+ EXYNOS5_IRQ_EINT11,
+ EXYNOS5_IRQ_EINT12,
+ EXYNOS5_IRQ_EINT13,
+ EXYNOS5_IRQ_EINT14,
+ EXYNOS5_IRQ_EINT15,
+};
static inline void exynos4_irq_eint_mask(struct irq_data *data)
{
u32 mask;
@@ -846,15 +880,22 @@ static int __init exynos4_i
[PATCH v3 08/12] ARM: EXYNOS: support EINT for EXYNOS4 and EXYNOS5
From: Eunki Kim
The GPIOs of EXYNOS4 and EXYNOS5 are changed to use
ioremap instead of static mapping. It alse causes the
change of external interrupt IO mapping. This patch
changes EXYNOS4 to EXYNOS for common use and changes
EINT_x macros for supporting dynamic IO mapping.
Signed-off-by: Eunki Kim
Signed-off-by: Kukjin Kim
---
arch/arm/mach-exynos/common.c | 102 -
arch/arm/mach-exynos/include/mach/gpio.h | 29 +++
arch/arm/mach-exynos/include/mach/regs-gpio.h | 20 ++---
3 files changed, 86 insertions(+), 65 deletions(-)
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 0b53018..72f21e4 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -665,6 +665,8 @@ static void __init exynos_init_uarts(struct s3c2410_uartcfg
*cfg, int no)
s3c24xx_init_uartdevs("exynos4210-uart",
exynos4_uart_resources, cfg, no);
}
+static void __iomem *exynos_eint_base;
+
static DEFINE_SPINLOCK(eint_lock);
static unsigned int eint0_15_data[16];
@@ -706,41 +708,41 @@ static unsigned int exynos5_eint0_15_src_int[16] = {
EXYNOS5_IRQ_EINT14,
EXYNOS5_IRQ_EINT15,
};
-static inline void exynos4_irq_eint_mask(struct irq_data *data)
+static inline void exynos_irq_eint_mask(struct irq_data *data)
{
u32 mask;
spin_lock(&eint_lock);
- mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(data->irq)));
- mask |= eint_irq_to_bit(data->irq);
- __raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(data->irq)));
+ mask = __raw_readl(EINT_MASK(exynos_eint_base, data->irq));
+ mask |= EINT_OFFSET_BIT(data->irq);
+ __raw_writel(mask, EINT_MASK(exynos_eint_base, data->irq));
spin_unlock(&eint_lock);
}
-static void exynos4_irq_eint_unmask(struct irq_data *data)
+static void exynos_irq_eint_unmask(struct irq_data *data)
{
u32 mask;
spin_lock(&eint_lock);
- mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(data->irq)));
- mask &= ~(eint_irq_to_bit(data->irq));
- __raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(data->irq)));
+ mask = __raw_readl(EINT_MASK(exynos_eint_base, data->irq));
+ mask &= ~(EINT_OFFSET_BIT(data->irq));
+ __raw_writel(mask, EINT_MASK(exynos_eint_base, data->irq));
spin_unlock(&eint_lock);
}
-static inline void exynos4_irq_eint_ack(struct irq_data *data)
+static inline void exynos_irq_eint_ack(struct irq_data *data)
{
- __raw_writel(eint_irq_to_bit(data->irq),
-S5P_EINT_PEND(EINT_REG_NR(data->irq)));
+ __raw_writel(EINT_OFFSET_BIT(data->irq),
+EINT_PEND(exynos_eint_base, data->irq));
}
-static void exynos4_irq_eint_maskack(struct irq_data *data)
+static void exynos_irq_eint_maskack(struct irq_data *data)
{
- exynos4_irq_eint_mask(data);
- exynos4_irq_eint_ack(data);
+ exynos_irq_eint_mask(data);
+ exynos_irq_eint_ack(data);
}
-static int exynos4_irq_eint_set_type(struct irq_data *data, unsigned int type)
+static int exynos_irq_eint_set_type(struct irq_data *data, unsigned int type)
{
int offs = EINT_OFFSET(data->irq);
int shift;
@@ -777,39 +779,24 @@ static int exynos4_irq_eint_set_type(struct irq_data
*data, unsigned int type)
mask = 0x7 << shift;
spin_lock(&eint_lock);
- ctrl = __raw_readl(S5P_EINT_CON(EINT_REG_NR(data->irq)));
+ ctrl = __raw_readl(EINT_CON(exynos_eint_base, data->irq));
ctrl &= ~mask;
ctrl |= newvalue << shift;
- __raw_writel(ctrl, S5P_EINT_CON(EINT_REG_NR(data->irq)));
+ __raw_writel(ctrl, EINT_CON(exynos_eint_base, data->irq));
spin_unlock(&eint_lock);
- switch (offs) {
- case 0 ... 7:
- s3c_gpio_cfgpin(EINT_GPIO_0(offs & 0x7), EINT_MODE);
- break;
- case 8 ... 15:
- s3c_gpio_cfgpin(EINT_GPIO_1(offs & 0x7), EINT_MODE);
- break;
- case 16 ... 23:
- s3c_gpio_cfgpin(EINT_GPIO_2(offs & 0x7), EINT_MODE);
- break;
- case 24 ... 31:
- s3c_gpio_cfgpin(EINT_GPIO_3(offs & 0x7), EINT_MODE);
- break;
- default:
- printk(KERN_ERR "No such irq number %d", offs);
- }
+ s3c_gpio_cfgpin(irq_to_gpio(data->irq), S3C_GPIO_SFN(0xf));
return 0;
}
-static struct irq_chip exynos4_irq_eint = {
- .name = "exynos4-eint",
- .irq_mask = exynos4_irq_eint_mask,
- .irq_unmask = exynos4_irq_eint_unmask,
- .irq_mask_ack = exynos4_irq_eint_maskack,
- .irq_ack= exynos4_irq_eint_ack,
- .irq_set_type = exynos4_irq_eint_set_type,
+static struct irq_chip exynos_irq_eint = {
+ .name = "exynos-eint",
+ .irq_mask = exynos_irq_eint_mask,
+ .irq_unmask = exynos_irq_eint_unmask,
+ .irq_mask_ack = exynos_irq_eint_maskack,
+ .ir
[PATCH v3 00/12] ARM: EXYNOS: add support new EXYNOS5250
This patch adds support EXYNOS5250 SoC which has two A15 cores can be used on mobile and tablet devices. Changes since v2: - update interrupt number declaration for single zImage of exynos4 and exynos5 - allow to select for exynos4 and exynos5 together - add support EINT for exynos4 and exynos5 - add l2 cache initializer for exynos5250 Changes since v1: - address comments from mailing list - update the option accordingly common.[ch] - update clock part - get rid of static mapping for uart - add device tree enabled board file(mach-exynos5-dt.c) - add initial dts file for EXYNOS5250(SoC), SMDK5250(Board) [PATCH v3 01/12] ARM: EXYNOS: to declare static for mach-exynos/common.c [PATCH v3 02/12] ARM: EXYNOS: use exynos_init_uarts() instead of exynos4_init_uarts() [PATCH v3 03/12] ARM: EXYNOS: add clock part for EXYNOS5250 SoC [PATCH v3 04/12] ARM: EXYNOS: add initial setup-i2c0 for EXYNOS5 [PATCH v3 05/12] ARM: EXYNOS: add support uart for EXYNOS4 and EXYNOS5 [PATCH v3 06/12] ARM: EXYNOS: add support for EXYNOS5250 SoC [PATCH v3 07/12] ARM: EXYNOS: add interrupt definitions for EXYNOS5250 [PATCH v3 08/12] ARM: EXYNOS: support EINT for EXYNOS4 and EXYNOS5 [PATCH v3 09/12] ARM: EXYNOS: add support get_core_count() for EXYNOS5250 [PATCH v3 10/12] ARM: EXYNOS: add support ARCH_EXYNOS5 for EXYNOS5 SoCs [PATCH v3 11/12] ARM: EXYNOS: add support device tree enabled board file for EXYNOS5 [PATCH v3 12/12] ARM: dts: add initial dts file for EXYNOS5250, SMDK5250 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v3 06/12] ARM: EXYNOS: add support for EXYNOS5250 SoC
This patch add support for EXYNOS5250 SoC has two Cortex-A15 cores.
Since actually, most codes in mach-exynos/ are used commonly for
EXYNOS4 and EXYNOS5 the EXYNOS5/EXYNOS5250 has been implemented
in mach-exynos/.
Signed-off-by: Kukjin Kim
---
arch/arm/Makefile|1 +
arch/arm/mach-exynos/common.c| 191 --
arch/arm/mach-exynos/common.h| 11 ++
arch/arm/mach-exynos/include/mach/map.h | 21 +++-
arch/arm/mach-exynos/include/mach/regs-pmu.h |1 +
arch/arm/plat-s5p/Kconfig|4 +-
arch/arm/plat-samsung/include/plat/cpu.h | 10 ++
7 files changed, 223 insertions(+), 16 deletions(-)
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 1683bfb..a826ffc 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -180,6 +180,7 @@ machine-$(CONFIG_ARCH_S5P64X0) := s5p64x0
machine-$(CONFIG_ARCH_S5PC100) := s5pc100
machine-$(CONFIG_ARCH_S5PV210) := s5pv210
machine-$(CONFIG_ARCH_EXYNOS4) := exynos
+machine-$(CONFIG_ARCH_EXYNOS5) := exynos
machine-$(CONFIG_ARCH_SA1100) := sa1100
machine-$(CONFIG_ARCH_SHARK) := shark
machine-$(CONFIG_ARCH_SHMOBILE):= shmobile
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 4a82cf0..7fdb139 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -49,9 +49,12 @@
static const char name_exynos4210[] = "EXYNOS4210";
static const char name_exynos4212[] = "EXYNOS4212";
static const char name_exynos4412[] = "EXYNOS4412";
+static const char name_exynos5250[] = "EXYNOS5250";
static void exynos4_map_io(void);
+static void exynos5_map_io(void);
static void exynos4_init_clocks(int xtal);
+static void exynos5_init_clocks(int xtal);
static void exynos_init_uarts(struct s3c2410_uartcfg *cfg, int no);
static int exynos_init(void);
@@ -80,6 +83,14 @@ static struct cpu_table cpu_ids[] __initdata = {
.init_uarts = exynos_init_uarts,
.init = exynos_init,
.name = name_exynos4412,
+ }, {
+ .idcode = EXYNOS5250_SOC_ID,
+ .idmask = EXYNOS5_SOC_MASK,
+ .map_io = exynos5_map_io,
+ .init_clocks= exynos5_init_clocks,
+ .init_uarts = exynos_init_uarts,
+ .init = exynos_init,
+ .name = name_exynos5250,
},
};
@@ -88,10 +99,14 @@ static struct cpu_table cpu_ids[] __initdata = {
static struct map_desc exynos_iodesc[] __initdata = {
{
.virtual= (unsigned long)S5P_VA_CHIPID,
- .pfn= __phys_to_pfn(EXYNOS4_PA_CHIPID),
+ .pfn= __phys_to_pfn(EXYNOS_PA_CHIPID),
.length = SZ_4K,
.type = MT_DEVICE,
- }, {
+ },
+};
+
+static struct map_desc exynos4_iodesc[] __initdata = {
+ {
.virtual= (unsigned long)S3C_VA_SYS,
.pfn= __phys_to_pfn(EXYNOS4_PA_SYSCON),
.length = SZ_64K,
@@ -141,11 +156,7 @@ static struct map_desc exynos_iodesc[] __initdata = {
.pfn= __phys_to_pfn(EXYNOS4_PA_UART),
.length = SZ_512K,
.type = MT_DEVICE,
- },
-};
-
-static struct map_desc exynos4_iodesc[] __initdata = {
- {
+ }, {
.virtual= (unsigned long)S5P_VA_CMU,
.pfn= __phys_to_pfn(EXYNOS4_PA_CMU),
.length = SZ_128K,
@@ -206,11 +217,80 @@ static struct map_desc exynos4_iodesc1[] __initdata = {
},
};
+static struct map_desc exynos5_iodesc[] __initdata = {
+ {
+ .virtual= (unsigned long)S3C_VA_SYS,
+ .pfn= __phys_to_pfn(EXYNOS5_PA_SYSCON),
+ .length = SZ_64K,
+ .type = MT_DEVICE,
+ }, {
+ .virtual= (unsigned long)S3C_VA_TIMER,
+ .pfn= __phys_to_pfn(EXYNOS5_PA_TIMER),
+ .length = SZ_16K,
+ .type = MT_DEVICE,
+ }, {
+ .virtual= (unsigned long)S3C_VA_WATCHDOG,
+ .pfn= __phys_to_pfn(EXYNOS5_PA_WATCHDOG),
+ .length = SZ_4K,
+ .type = MT_DEVICE,
+ }, {
+ .virtual= (unsigned long)S5P_VA_SROMC,
+ .pfn= __phys_to_pfn(EXYNOS5_PA_SROMC),
+ .length = SZ_4K,
+ .type = MT_DEVICE,
+ }, {
+ .virtual= (unsigned long)S5P_VA_SYSTIMER,
+ .pfn= __phys_to_pfn(EXYNOS5_PA_SYSTIMER),
+ .length = SZ_4K,
+
[PATCH v3 03/12] ARM: EXYNOS: add clock part for EXYNOS5250 SoC
This patch adds clock-exynos5.c for EXYNOS5250 now
and that can be used for other EXYNOS5 SoCs later.
Signed-off-by: Kukjin Kim
---
arch/arm/mach-exynos/clock-exynos5.c | 1247
arch/arm/mach-exynos/include/mach/regs-clock.h | 62 ++
arch/arm/plat-s5p/clock.c | 36 +
arch/arm/plat-samsung/include/plat/s5p-clock.h |6 +
4 files changed, 1351 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-exynos/clock-exynos5.c
diff --git a/arch/arm/mach-exynos/clock-exynos5.c
b/arch/arm/mach-exynos/clock-exynos5.c
new file mode 100644
index 000..d013982
--- /dev/null
+++ b/arch/arm/mach-exynos/clock-exynos5.c
@@ -0,0 +1,1247 @@
+/*
+ * Copyright (c) 2012 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * Clock support for EXYNOS5 SoCs
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+
+#include "common.h"
+
+#ifdef CONFIG_PM_SLEEP
+static struct sleep_save exynos5_clock_save[] = {
+ /* will be implemented */
+};
+#endif
+
+static struct clk exynos5_clk_sclk_dptxphy = {
+ .name = "sclk_dptx",
+};
+
+static struct clk exynos5_clk_sclk_hdmi24m = {
+ .name = "sclk_hdmi24m",
+ .rate = 2400,
+};
+
+static struct clk exynos5_clk_sclk_hdmi27m = {
+ .name = "sclk_hdmi27m",
+ .rate = 2700,
+};
+
+static struct clk exynos5_clk_sclk_hdmiphy = {
+ .name = "sclk_hdmiphy",
+};
+
+static struct clk exynos5_clk_sclk_usbphy = {
+ .name = "sclk_usbphy",
+ .rate = 4800,
+};
+
+static int exynos5_clksrc_mask_top_ctrl(struct clk *clk, int enable)
+{
+ return s5p_gatectrl(EXYNOS5_CLKSRC_MASK_TOP, clk, enable);
+}
+
+static int exynos5_clksrc_mask_disp1_0_ctrl(struct clk *clk, int enable)
+{
+ return s5p_gatectrl(EXYNOS5_CLKSRC_MASK_DISP1_0, clk, enable);
+}
+
+static int exynos5_clksrc_mask_fsys_ctrl(struct clk *clk, int enable)
+{
+ return s5p_gatectrl(EXYNOS5_CLKSRC_MASK_FSYS, clk, enable);
+}
+
+static int exynos5_clksrc_mask_gscl_ctrl(struct clk *clk, int enable)
+{
+ return s5p_gatectrl(EXYNOS5_CLKSRC_MASK_GSCL, clk, enable);
+}
+
+static int exynos5_clksrc_mask_peric0_ctrl(struct clk *clk, int enable)
+{
+ return s5p_gatectrl(EXYNOS5_CLKSRC_MASK_PERIC0, clk, enable);
+}
+
+static int exynos5_clk_ip_core_ctrl(struct clk *clk, int enable)
+{
+ return s5p_gatectrl(EXYNOS5_CLKGATE_IP_CORE, clk, enable);
+}
+
+static int exynos5_clk_ip_disp1_ctrl(struct clk *clk, int enable)
+{
+ return s5p_gatectrl(EXYNOS5_CLKGATE_IP_DISP1, clk, enable);
+}
+
+static int exynos5_clk_ip_fsys_ctrl(struct clk *clk, int enable)
+{
+ return s5p_gatectrl(EXYNOS5_CLKGATE_IP_FSYS, clk, enable);
+}
+
+static int exynos5_clk_block_ctrl(struct clk *clk, int enable)
+{
+ return s5p_gatectrl(EXYNOS5_CLKGATE_BLOCK, clk, enable);
+}
+
+static int exynos5_clk_ip_gen_ctrl(struct clk *clk, int enable)
+{
+ return s5p_gatectrl(EXYNOS5_CLKGATE_IP_GEN, clk, enable);
+}
+
+static int exynos5_clk_ip_gps_ctrl(struct clk *clk, int enable)
+{
+ return s5p_gatectrl(EXYNOS5_CLKGATE_IP_GPS, clk, enable);
+}
+
+static int exynos5_clk_ip_mfc_ctrl(struct clk *clk, int enable)
+{
+ return s5p_gatectrl(EXYNOS5_CLKGATE_IP_MFC, clk, enable);
+}
+
+static int exynos5_clk_ip_peric_ctrl(struct clk *clk, int enable)
+{
+ return s5p_gatectrl(EXYNOS5_CLKGATE_IP_PERIC, clk, enable);
+}
+
+static int exynos5_clk_ip_peris_ctrl(struct clk *clk, int enable)
+{
+ return s5p_gatectrl(EXYNOS5_CLKGATE_IP_PERIS, clk, enable);
+}
+
+/* Core list of CMU_CPU side */
+
+static struct clksrc_clk exynos5_clk_mout_apll = {
+ .clk= {
+ .name = "mout_apll",
+ },
+ .sources = &clk_src_apll,
+ .reg_src = { .reg = EXYNOS5_CLKSRC_CPU, .shift = 0, .size = 1 },
+};
+
+static struct clksrc_clk exynos5_clk_sclk_apll = {
+ .clk= {
+ .name = "sclk_apll",
+ .parent = &exynos5_clk_mout_apll.clk,
+ },
+ .reg_div = { .reg = EXYNOS5_CLKDIV_CPU0, .shift = 24, .size = 3 },
+};
+
+static struct clksrc_clk exynos5_clk_mout_bpll = {
+ .clk= {
+ .name = "mout_bpll",
+ },
+ .sources = &clk_src_bpll,
+ .reg_src = { .reg = EXYNOS5_CLKSRC_CDREX, .shift = 0, .size = 1 },
+};
+
+static struct clk *exynos5_clk_src_bpll_user_list[] = {
+ [0] = &clk_fin_mpll,
+ [1] = &exynos5_clk_mout_bpll.clk,
+};
+
+static struct clksrc_sources exynos5_clk_src_bpll_user = {
+ .sources= exynos5_clk_src_bpll_user_list,
+ .nr_
[PATCH v3 01/12] ARM: EXYNOS: to declare static for mach-exynos/common.c
According to commit cc511b8d84d8 ("ARM: 7257/1: EXYNOS: introduce
arch/arm/mach-exynos/common.[ch]"), we don't need to declare extern
for exynos4_map_io(), exynos4_init_clocks(), exynos4_init_uarts(),
and exynos_init(). And the exynos4210_register_clocks() and
exynos4212_register_clocks depend on each SoC not ARCH_EXYNOS4.
So this patch fixed above.
Signed-off-by: Kukjin Kim
---
arch/arm/mach-exynos/common.c | 13 +
arch/arm/mach-exynos/common.h | 28 +++-
2 files changed, 20 insertions(+), 21 deletions(-)
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 34e8190..a1f8a99 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -50,6 +50,11 @@ static const char name_exynos4210[] = "EXYNOS4210";
static const char name_exynos4212[] = "EXYNOS4212";
static const char name_exynos4412[] = "EXYNOS4412";
+static void exynos4_map_io(void);
+static void exynos4_init_clocks(int xtal);
+static void exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no);
+static int exynos_init(void);
+
static struct cpu_table cpu_ids[] __initdata = {
{
.idcode = EXYNOS4210_CPU_ID,
@@ -225,7 +230,7 @@ void __init exynos_init_io(struct map_desc *mach_desc, int
size)
s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
}
-void __init exynos4_map_io(void)
+static void __init exynos4_map_io(void)
{
iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc));
@@ -256,7 +261,7 @@ void __init exynos4_map_io(void)
s5p_hdmi_setname("exynos4-hdmi");
}
-void __init exynos4_init_clocks(int xtal)
+static void __init exynos4_init_clocks(int xtal)
{
printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
@@ -456,7 +461,7 @@ static int __init exynos4_l2x0_cache_init(void)
early_initcall(exynos4_l2x0_cache_init);
#endif
-int __init exynos_init(void)
+static int __init exynos_init(void)
{
printk(KERN_INFO "EXYNOS: Initializing architecture\n");
return device_register(&exynos4_dev);
@@ -464,7 +469,7 @@ int __init exynos_init(void)
/* uart registration process */
-void __init exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no)
+static void __init exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no)
{
struct s3c2410_uartcfg *tcfg = cfg;
u32 ucnt;
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index 8c1efe6..b32c6b5 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -12,39 +12,33 @@
#ifndef __ARCH_ARM_MACH_EXYNOS_COMMON_H
#define __ARCH_ARM_MACH_EXYNOS_COMMON_H
+extern struct sys_timer exynos4_timer;
+
void exynos_init_io(struct map_desc *mach_desc, int size);
void exynos4_init_irq(void);
+void exynos4_restart(char mode, const char *cmd);
#ifdef CONFIG_ARCH_EXYNOS4
void exynos4_register_clocks(void);
void exynos4_setup_clocks(void);
-void exynos4210_register_clocks(void);
-void exynos4212_register_clocks(void);
-
#else
#define exynos4_register_clocks()
#define exynos4_setup_clocks()
-
-#define exynos4210_register_clocks()
-#define exynos4212_register_clocks()
#endif
-void exynos4_restart(char mode, const char *cmd);
+#ifdef CONFIG_CPU_EXYNOS4210
+void exynos4210_register_clocks(void);
-extern struct sys_timer exynos4_timer;
+#else
+#define exynos4210_register_clocks()
+#endif
-#ifdef CONFIG_ARCH_EXYNOS
-extern int exynos_init(void);
-extern void exynos4_map_io(void);
-extern void exynos4_init_clocks(int xtal);
-extern void exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no);
+#ifdef CONFIG_SOC_EXYNOS4212
+void exynos4212_register_clocks(void);
#else
-#define exynos4_init_clocks NULL
-#define exynos4_init_uarts NULL
-#define exynos4_map_io NULL
-#define exynos_init NULL
+#define exynos4212_register_clocks()
#endif
#endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */
--
1.7.4.4
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RE: [PATCH 2/3] ARM: Exynos: Add DRM core device support for Universal C210 board
Hello,
On Tuesday, March 13, 2012 5:39 AM Kyungmin Park wrote:
> On 3/13/12, Sachin Kamat wrote:
> > Hi Marek,
> > Thanks for the patch.
> >
> > On 09/03/2012, Marek Szyprowski wrote:
> >> Add core DRM device and alternative platform device data for FIMD DRM
> >> subdriver. Based on the initial patch by Joonyoung Shim
> >>
> >>
> >> Signed-off-by: Marek Szyprowski
> >> Signed-off-by: Kyungmin Park
> >> ---
> >> arch/arm/mach-exynos/Kconfig |1 +
> >> arch/arm/mach-exynos/mach-universal_c210.c | 31
> >>
> >> 2 files changed, 32 insertions(+), 0 deletions(-)
> >>
> >> diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
> >> index 5a26944..c73eeba 100644
> >> --- a/arch/arm/mach-exynos/Kconfig
> >> +++ b/arch/arm/mach-exynos/Kconfig
> >> @@ -257,6 +257,7 @@ config MACH_UNIVERSAL_C210
> >>select S5P_DEV_ONENAND
> >>select S5P_DEV_TV
> >>select EXYNOS4_DEV_DMA
> >> + select EXYNOS_DEV_DRM
> >>select EXYNOS4_SETUP_FIMD0
> >>select EXYNOS4_SETUP_I2C1
> >>select EXYNOS4_SETUP_I2C3
> >> diff --git a/arch/arm/mach-exynos/mach-universal_c210.c
> >> b/arch/arm/mach-exynos/mach-universal_c210.c
> >> index 322b272..30a3ff3 100644
> >> --- a/arch/arm/mach-exynos/mach-universal_c210.c
> >> +++ b/arch/arm/mach-exynos/mach-universal_c210.c
> >> @@ -23,6 +23,7 @@
> >> #include
> >> #include
> >> #include
> >> +#include
> >>
> >> #include
> >> #include
> >> @@ -811,6 +812,27 @@ static struct i2c_board_info i2c1_devs[] __initdata =
> >> {
> >>/* Gyro, To be updated */
> >> };
> >>
> >> +#ifdef CONFIG_DRM_EXYNOS
> >> +static struct exynos_drm_fimd_pdata drm_fimd_pdata = {
> >> + .timing = {
> >> + .left_margin= 16,
> >> + .right_margin = 16,
> >> + .upper_margin = 2,
> >> + .lower_margin = 28,
> >> + .hsync_len = 2,
> >> + .vsync_len = 1,
> >> + .xres = 480,
> >> + .yres = 800,
> >> + .refresh= 55,
> >> + },
> >
> > Shouldn't this be:
> Right, recently we added the panel information. It should be drm-next soon.
I'm sorry for the confusion, I've sent patches which were based on 3.3-rc5
without
drm-next/fixes. I've just sent v2 patchset which reflects latest changes in
drm-next/fixes
branches.
Best regards
--
Marek Szyprowski
Samsung Poland R&D Center
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[PATCHv2 1/3] ARM: Exynos: add platform device for core DRM subsystem
Add platform device for Exynos DRM core. This device is used for
creating DRM user-space device and allocating memory for display buffers.
Signed-off-by: Marek Szyprowski
Signed-off-by: Kyungmin Park
---
arch/arm/mach-exynos/Kconfig |5 +
arch/arm/mach-exynos/Makefile |1 +
arch/arm/mach-exynos/dev-drm.c| 29 +
arch/arm/plat-samsung/include/plat/devs.h |2 ++
4 files changed, 37 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-exynos/dev-drm.c
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 060414e..9124ce9 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -85,6 +85,11 @@ config EXYNOS4_DEV_AHCI
help
Compile in platform device definitions for AHCI
+config EXYNOS_DEV_DRM
+ bool
+ help
+ Compile in platform device definitions for core DRM device
+
config EXYNOS4_SETUP_FIMD0
bool
help
diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index 8631840..f67e882 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -50,6 +50,7 @@ obj-$(CONFIG_MACH_EXYNOS5_DT) += mach-exynos5-dt.o
obj-y += dev-uart.o
obj-$(CONFIG_ARCH_EXYNOS4) += dev-audio.o
obj-$(CONFIG_EXYNOS4_DEV_AHCI) += dev-ahci.o
+obj-$(CONFIG_EXYNOS_DEV_DRM) += dev-drm.o
obj-$(CONFIG_EXYNOS4_DEV_SYSMMU) += dev-sysmmu.o
obj-$(CONFIG_EXYNOS4_DEV_DWMCI)+= dev-dwmci.o
obj-$(CONFIG_EXYNOS4_DEV_DMA) += dma.o
diff --git a/arch/arm/mach-exynos/dev-drm.c b/arch/arm/mach-exynos/dev-drm.c
new file mode 100644
index 000..17c9c6e
--- /dev/null
+++ b/arch/arm/mach-exynos/dev-drm.c
@@ -0,0 +1,29 @@
+/*
+ * linux/arch/arm/mach-exynos/dev-drm.c
+ *
+ * Copyright (c) 2012 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * EXYNOS - core DRM device
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include
+#include
+#include
+
+#include
+
+static u64 exynos_drm_dma_mask = DMA_BIT_MASK(32);
+
+struct platform_device exynos_device_drm = {
+ .name = "exynos-drm",
+ .dev= {
+ .dma_mask = &exynos_drm_dma_mask,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
+ }
+};
diff --git a/arch/arm/plat-samsung/include/plat/devs.h
b/arch/arm/plat-samsung/include/plat/devs.h
index 2155d4a..62e6251 100644
--- a/arch/arm/plat-samsung/include/plat/devs.h
+++ b/arch/arm/plat-samsung/include/plat/devs.h
@@ -135,6 +135,8 @@ extern struct platform_device exynos4_device_pd[];
extern struct platform_device exynos4_device_spdif;
extern struct platform_device exynos4_device_sysmmu;
+extern struct platform_device exynos_device_drm;
+
extern struct platform_device samsung_asoc_dma;
extern struct platform_device samsung_asoc_idma;
extern struct platform_device samsung_device_keypad;
--
1.7.1.569.g6f426
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[PATCHv2 0/3] Add support for DRM display subsystem
Hello, This patch set adds support for Exynos DRM display subsystem for Universal C210 and NURI boards. Exynos DRM driver has been merged to 3.3 kernel tree and provides unified and more powerful alternative for s3c-fb and s5p-tv drivers. V2 includes update for the latest changes in platform data structure (added 'panel' entry). Best regards Marek Szyprowski Samsung Poland R&D Center Patch summary: Marek Szyprowski (3): ARM: Exynos: add platform device for core DRM subsystem ARM: Exynos: Add DRM core device support for Universal C210 board ARM: Exynos: Add DRM core support for NURI board arch/arm/mach-exynos/Kconfig |7 ++ arch/arm/mach-exynos/Makefile |1 + arch/arm/mach-exynos/dev-drm.c | 29 arch/arm/mach-exynos/mach-nuri.c | 33 arch/arm/mach-exynos/mach-universal_c210.c | 33 arch/arm/plat-samsung/include/plat/devs.h |2 + 6 files changed, 105 insertions(+), 0 deletions(-) create mode 100644 arch/arm/mach-exynos/dev-drm.c -- 1.7.1.569.g6f426 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCHv2 3/3] ARM: Exynos: Add DRM core support for NURI board
Add core DRM device and alternative platform device data for FIMD DRM
subdriver. Based on the initial patch by Joonyoung Shim
Signed-off-by: Marek Szyprowski
Signed-off-by: Kyungmin Park
---
arch/arm/mach-exynos/Kconfig |1 +
arch/arm/mach-exynos/mach-nuri.c | 33 +
2 files changed, 34 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 52cb248..db4b897 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -299,6 +299,7 @@ config MACH_NURI
select S5P_DEV_USB_EHCI
select S5P_SETUP_MIPIPHY
select EXYNOS4_DEV_DMA
+ select EXYNOS_DEV_DRM
select EXYNOS4_SETUP_FIMC
select EXYNOS4_SETUP_FIMD0
select EXYNOS4_SETUP_I2C1
diff --git a/arch/arm/mach-exynos/mach-nuri.c b/arch/arm/mach-exynos/mach-nuri.c
index 7ac81ce..8049f93 100644
--- a/arch/arm/mach-exynos/mach-nuri.c
+++ b/arch/arm/mach-exynos/mach-nuri.c
@@ -25,6 +25,7 @@
#include
#include
#include
+#include
#include
#include
@@ -210,6 +211,29 @@ static struct platform_device nuri_gpio_keys = {
},
};
+#ifdef CONFIG_DRM_EXYNOS
+static struct exynos_drm_fimd_pdata drm_fimd_pdata = {
+ .panel = {
+ .timing = {
+ .xres = 1024,
+ .yres = 600,
+ .hsync_len = 40,
+ .left_margin= 79,
+ .right_margin = 200,
+ .vsync_len = 10,
+ .upper_margin = 10,
+ .lower_margin = 11,
+ .refresh= 60,
+ },
+ },
+ .vidcon0= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB |
+ VIDCON0_CLKSEL_LCD,
+ .vidcon1= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
+ .default_win= 3,
+ .bpp= 32,
+};
+
+#else
/* Frame Buffer */
static struct s3c_fb_pd_win nuri_fb_win0 = {
.win_mode = {
@@ -236,6 +260,7 @@ static struct s3c_fb_platdata nuri_fb_pdata __initdata = {
.vidcon1= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
.setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
};
+#endif
static void nuri_lcd_power_on(struct plat_lcd_data *pd, unsigned int power)
{
@@ -1341,6 +1366,9 @@ static struct platform_device *nuri_devices[] __initdata
= {
&cam_vdda_fixed_rdev,
&cam_8m_12v_fixed_rdev,
&exynos4_bus_devfreq,
+#ifdef CONFIG_DRM_EXYNOS
+ &exynos_device_drm,
+#endif
};
static void __init nuri_map_io(void)
@@ -1372,7 +1400,12 @@ static void __init nuri_machine_init(void)
i2c_register_board_info(9, i2c9_devs, ARRAY_SIZE(i2c9_devs));
s3c_i2c6_set_platdata(&nuri_i2c6_platdata);
+#ifdef CONFIG_DRM_EXYNOS
+ s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;
+ exynos4_fimd0_gpio_setup_24bpp();
+#else
s5p_fimd0_set_platdata(&nuri_fb_pdata);
+#endif
nuri_camera_init();
--
1.7.1.569.g6f426
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[PATCHv2 2/3] ARM: Exynos: Add DRM core device support for Universal C210 board
Add core DRM device and alternative platform device data for FIMD DRM
subdriver. Based on the initial patch by Joonyoung Shim
Signed-off-by: Marek Szyprowski
Signed-off-by: Kyungmin Park
---
arch/arm/mach-exynos/Kconfig |1 +
arch/arm/mach-exynos/mach-universal_c210.c | 33
2 files changed, 34 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 9124ce9..52cb248 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -262,6 +262,7 @@ config MACH_UNIVERSAL_C210
select S5P_DEV_ONENAND
select S5P_DEV_TV
select EXYNOS4_DEV_DMA
+ select EXYNOS_DEV_DRM
select EXYNOS4_SETUP_FIMD0
select EXYNOS4_SETUP_I2C1
select EXYNOS4_SETUP_I2C3
diff --git a/arch/arm/mach-exynos/mach-universal_c210.c
b/arch/arm/mach-exynos/mach-universal_c210.c
index 57e4418..b8bd8ab 100644
--- a/arch/arm/mach-exynos/mach-universal_c210.c
+++ b/arch/arm/mach-exynos/mach-universal_c210.c
@@ -23,6 +23,7 @@
#include
#include
#include
+#include
#include
#include
@@ -811,6 +812,29 @@ static struct i2c_board_info i2c1_devs[] __initdata = {
/* Gyro, To be updated */
};
+#ifdef CONFIG_DRM_EXYNOS
+static struct exynos_drm_fimd_pdata drm_fimd_pdata = {
+ .panel = {
+ .timing = {
+ .left_margin= 16,
+ .right_margin = 16,
+ .upper_margin = 2,
+ .lower_margin = 28,
+ .hsync_len = 2,
+ .vsync_len = 1,
+ .xres = 480,
+ .yres = 800,
+ .refresh= 55,
+ },
+ },
+ .vidcon0= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB |
+ VIDCON0_CLKSEL_LCD,
+ .vidcon1= VIDCON1_INV_VCLK | VIDCON1_INV_VDEN
+ | VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
+ .default_win= 3,
+ .bpp= 32,
+};
+#else
/* Frame Buffer */
static struct s3c_fb_pd_win universal_fb_win0 = {
.win_mode = {
@@ -838,6 +862,7 @@ static struct s3c_fb_platdata universal_lcd_pdata
__initdata = {
| VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
.setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
};
+#endif
static struct regulator_consumer_supply cam_vt_dio_supply =
REGULATOR_SUPPLY("vdd_core", "0-003c");
@@ -1047,6 +1072,9 @@ static struct platform_device *universal_devices[]
__initdata = {
&s5p_device_onenand,
&s5p_device_fimd0,
&s5p_device_jpeg,
+#ifdef CONFIG_DRM_EXYNOS
+ &exynos_device_drm,
+#endif
&s5p_device_mfc,
&s5p_device_mfc_l,
&s5p_device_mfc_r,
@@ -1092,7 +1120,12 @@ static void __init universal_machine_init(void)
s5p_i2c_hdmiphy_set_platdata(NULL);
i2c_register_board_info(5, i2c5_devs, ARRAY_SIZE(i2c5_devs));
+#ifdef CONFIG_DRM_EXYNOS
+ s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;
+ exynos4_fimd0_gpio_setup_24bpp();
+#else
s5p_fimd0_set_platdata(&universal_lcd_pdata);
+#endif
universal_touchkey_init();
i2c_register_board_info(I2C_GPIO_BUS_12, i2c_gpio12_devs,
--
1.7.1.569.g6f426
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Re: [PATCH 0/5] pinctrl: add new Samsung pinctrl driver and add Exynos4 support
On 13 March 2012 15:43, Linus Walleij wrote: > On Sun, Mar 11, 2012 at 1:46 PM, Thomas Abraham > wrote: > >> This patch series adds new pinctrl driver for Samsung SoC's. The driver >> supports >> a gpiolib interface as well since Samsung SoC's have a combined >> pinmux/pinctrl >> and gpio controller. > > Overall this all looks good to me Thomas! > I will provide detailed review if/when it is more ripe for merge. Thanks linus for having a look. The missing bits in the driver are wakeup interrupt and gpio interrupt support. Without these, it would not be possible to meaningfully demonstrate a fully functional system using the pinctrl and gpiolib driver for Exynos4. Regards, Thomas. > > Yours, > Linus Walleij -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 0/5] pinctrl: add new Samsung pinctrl driver and add Exynos4 support
On Sun, Mar 11, 2012 at 1:46 PM, Thomas Abraham wrote: > This patch series adds new pinctrl driver for Samsung SoC's. The driver > supports > a gpiolib interface as well since Samsung SoC's have a combined pinmux/pinctrl > and gpio controller. Overall this all looks good to me Thomas! I will provide detailed review if/when it is more ripe for merge. Yours, Linus Walleij -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 3/3] ARM: Samsung: Rework platform data of s3c-fb driver
On 13 March 2012 15:17, Jingoo Han wrote:
>> -Original Message-
>> From: Thomas Abraham [mailto:thomas.abra...@linaro.org]
>> Sent: Tuesday, March 13, 2012 6:00 AM
>> To: linux-fb...@vger.kernel.org
>> Cc: florianschandi...@gmx.de; linux-arm-ker...@lists.infradead.org;
>> linux-samsung-soc@vger.kernel.org;
>> kgene@samsung.com; jg1@samsung.com; ben-li...@fluff.org;
>> patc...@linaro.org; Kyungmin Park;
>> JeongHyeon Kim; Heiko Stuebner; Kwangwoo Lee; Mark Brown; Peter Korsgaard;
>> Darius Augulis; Maurus
>> Cuelenaere
>> Subject: [PATCH v2 3/3] ARM: Samsung: Rework platform data of s3c-fb driver
>>
>> For all the Samsung SoC based boards which have the platform data for
>> s3c-fb driver, the 'default_win' element in the platform data is removed
>> and the lcd panel video timing values are moved out of individual window
>> configuration data.
>>
>> Cc: Jingoo Han
>> Cc: Kyungmin Park
>> Cc: JeongHyeon Kim
>> Cc: Kukjin Kim
>> Cc: Heiko Stuebner
>> Cc: Ben Dooks
>> Cc: Kwangwoo Lee
>> Cc: Mark Brown
>> Cc: Peter Korsgaard
>> Cc: Darius Augulis
>> Cc: Maurus Cuelenaere
>> Signed-off-by: Thomas Abraham
>> ---
>> arch/arm/mach-exynos/mach-nuri.c | 26 ++---
>> arch/arm/mach-exynos/mach-origen.c | 24 ++---
>> arch/arm/mach-exynos/mach-smdkv310.c | 28 +++
>> arch/arm/mach-exynos/mach-universal_c210.c | 26 ++---
>> arch/arm/mach-s3c24xx/mach-smdk2416.c | 27 ++
>> arch/arm/mach-s3c64xx/mach-anw6410.c | 25 ++---
>> arch/arm/mach-s3c64xx/mach-crag6410.c | 25 ++---
>> arch/arm/mach-s3c64xx/mach-hmt.c | 24 ++---
>> arch/arm/mach-s3c64xx/mach-mini6410.c | 40
>> ---
>> arch/arm/mach-s3c64xx/mach-real6410.c | 40
>> ---
>> arch/arm/mach-s3c64xx/mach-smartq5.c | 26 ++---
>> arch/arm/mach-s3c64xx/mach-smartq7.c | 26 ++---
>> arch/arm/mach-s3c64xx/mach-smdk6410.c | 25 ++---
>> arch/arm/mach-s5p64x0/mach-smdk6440.c | 24 ++---
>> arch/arm/mach-s5p64x0/mach-smdk6450.c | 24 ++---
>> arch/arm/mach-s5pc100/mach-smdkc100.c | 27 ++
>> arch/arm/mach-s5pv210/mach-aquila.c | 36 +++--
>> arch/arm/mach-s5pv210/mach-goni.c | 26 ++---
>> arch/arm/mach-s5pv210/mach-smdkv210.c | 24 ++---
>> 19 files changed, 285 insertions(+), 238 deletions(-)
>>
>
> [.]
>
>> diff --git a/arch/arm/mach-s3c64xx/mach-mini6410.c
>> b/arch/arm/mach-s3c64xx/mach-mini6410.c
>> index c34c2ab..24dcdc9 100644
>> --- a/arch/arm/mach-s3c64xx/mach-mini6410.c
>> +++ b/arch/arm/mach-s3c64xx/mach-mini6410.c
>> @@ -153,36 +153,32 @@ static struct s3c2410_platform_nand mini6410_nand_info
>> = {
>>
>> static struct s3c_fb_pd_win mini6410_fb_win[] = {
>> {
>> - .win_mode = { /* 4.3" 480x272 */
>> - .left_margin = 3,
>> - .right_margin = 2,
>> - .upper_margin = 1,
>> - .lower_margin = 1,
>> - .hsync_len = 40,
>> - .vsync_len = 1,
>> - .xres = 480,
>> - .yres = 272,
>> - },
>> .max_bpp = 32,
>> .default_bpp = 16,
>> + .xres = 480,
>> + .yres = 272,
>> }, {
>> - .win_mode = { /* 7.0" 800x480 */
>> - .left_margin = 8,
>> - .right_margin = 13,
>> - .upper_margin = 7,
>> - .lower_margin = 5,
>> - .hsync_len = 3,
>> - .vsync_len = 1,
>> - .xres = 800,
>> - .yres = 480,
>> - },
>> .max_bpp = 32,
>> .default_bpp = 16,
>> + .xres = 800,
>> + .yres = 480,
>> },
>> };
>>
>> +static struct fb_videomode mini6410_lcd_timing = {
>> + .left_margin = 8,
>> + .right_margin = 13,
>> + .upper_margin = 7,
>> + .lower_margin = 5,
>> + .hsync_len = 3,
>> + .vsync_len = 1,
>> + .xres = 800,
>> + .yres = 480,
>> +};
>> +
>> static struct s3c_fb_platdata mini6410_lcd_pdata __initdata = {
>> .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
>> + .vtiming = &mini6410_lcd_timing,
>> .win[0] = &mini6410_fb_win[0],
>> .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
>> .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
>> @@ -310,8 +306,8 @@ static void __init mini6410_mac
Re: [PATCH v11 3/3] iommu/exynos: Add iommu driver for Exynos Platforms
On Tue, Mar 13, 2012 at 05:50:16PM +0900, KyongHo Cho wrote:
> >> +struct sysmmu_drvdata {
> >> + struct device *sysmmu;
> >> + char *dbgname;
> >> + int nsfrs;
> >> + void __iomem **sfrbases;
> >> + struct clk *clk[2];
> >> + int activations;
> >> + rwlock_t lock;
> >> + struct iommu_domain *domain;
> >> + sysmmu_fault_handler_t fault_handler;
> >> + unsigned long pgtable;
> >> + struct iommu_client client;
> >> +};
> >
> > Is there any reason why 'struct iommu_client' is a seperate data
> > structure? Otherwise it can be merged with 'truct sysmmu_drvdata'.
Of course this doesn't need to be changed immediatly. I just asked if
there was a specific reason for this seperation.
> The problems will be soon fixed and I will post next patch tomorrow.
Fine. Please also get the Acked-bys from the Exynos maintainer on
patches 1 and 2 at least. I'll merge it then.
Joerg
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RE: [PATCH v2 3/3] ARM: Samsung: Rework platform data of s3c-fb driver
> -Original Message-
> From: Thomas Abraham [mailto:thomas.abra...@linaro.org]
> Sent: Tuesday, March 13, 2012 6:00 AM
> To: linux-fb...@vger.kernel.org
> Cc: florianschandi...@gmx.de; linux-arm-ker...@lists.infradead.org;
> linux-samsung-soc@vger.kernel.org;
> kgene@samsung.com; jg1@samsung.com; ben-li...@fluff.org;
> patc...@linaro.org; Kyungmin Park;
> JeongHyeon Kim; Heiko Stuebner; Kwangwoo Lee; Mark Brown; Peter Korsgaard;
> Darius Augulis; Maurus
> Cuelenaere
> Subject: [PATCH v2 3/3] ARM: Samsung: Rework platform data of s3c-fb driver
>
> For all the Samsung SoC based boards which have the platform data for
> s3c-fb driver, the 'default_win' element in the platform data is removed
> and the lcd panel video timing values are moved out of individual window
> configuration data.
>
> Cc: Jingoo Han
> Cc: Kyungmin Park
> Cc: JeongHyeon Kim
> Cc: Kukjin Kim
> Cc: Heiko Stuebner
> Cc: Ben Dooks
> Cc: Kwangwoo Lee
> Cc: Mark Brown
> Cc: Peter Korsgaard
> Cc: Darius Augulis
> Cc: Maurus Cuelenaere
> Signed-off-by: Thomas Abraham
> ---
> arch/arm/mach-exynos/mach-nuri.c | 26 ++---
> arch/arm/mach-exynos/mach-origen.c | 24 ++---
> arch/arm/mach-exynos/mach-smdkv310.c | 28 +++
> arch/arm/mach-exynos/mach-universal_c210.c | 26 ++---
> arch/arm/mach-s3c24xx/mach-smdk2416.c | 27 ++
> arch/arm/mach-s3c64xx/mach-anw6410.c | 25 ++---
> arch/arm/mach-s3c64xx/mach-crag6410.c | 25 ++---
> arch/arm/mach-s3c64xx/mach-hmt.c | 24 ++---
> arch/arm/mach-s3c64xx/mach-mini6410.c | 40 ---
> arch/arm/mach-s3c64xx/mach-real6410.c | 40 ---
> arch/arm/mach-s3c64xx/mach-smartq5.c | 26 ++---
> arch/arm/mach-s3c64xx/mach-smartq7.c | 26 ++---
> arch/arm/mach-s3c64xx/mach-smdk6410.c | 25 ++---
> arch/arm/mach-s5p64x0/mach-smdk6440.c | 24 ++---
> arch/arm/mach-s5p64x0/mach-smdk6450.c | 24 ++---
> arch/arm/mach-s5pc100/mach-smdkc100.c | 27 ++
> arch/arm/mach-s5pv210/mach-aquila.c| 36 +++--
> arch/arm/mach-s5pv210/mach-goni.c | 26 ++---
> arch/arm/mach-s5pv210/mach-smdkv210.c | 24 ++---
> 19 files changed, 285 insertions(+), 238 deletions(-)
>
[.]
> diff --git a/arch/arm/mach-s3c64xx/mach-mini6410.c
> b/arch/arm/mach-s3c64xx/mach-mini6410.c
> index c34c2ab..24dcdc9 100644
> --- a/arch/arm/mach-s3c64xx/mach-mini6410.c
> +++ b/arch/arm/mach-s3c64xx/mach-mini6410.c
> @@ -153,36 +153,32 @@ static struct s3c2410_platform_nand mini6410_nand_info
> = {
>
> static struct s3c_fb_pd_win mini6410_fb_win[] = {
> {
> - .win_mode = { /* 4.3" 480x272 */
> - .left_margin= 3,
> - .right_margin = 2,
> - .upper_margin = 1,
> - .lower_margin = 1,
> - .hsync_len = 40,
> - .vsync_len = 1,
> - .xres = 480,
> - .yres = 272,
> - },
> .max_bpp= 32,
> .default_bpp= 16,
> + .xres = 480,
> + .yres = 272,
> }, {
> - .win_mode = { /* 7.0" 800x480 */
> - .left_margin= 8,
> - .right_margin = 13,
> - .upper_margin = 7,
> - .lower_margin = 5,
> - .hsync_len = 3,
> - .vsync_len = 1,
> - .xres = 800,
> - .yres = 480,
> - },
> .max_bpp= 32,
> .default_bpp= 16,
> + .xres = 800,
> + .yres = 480,
> },
> };
>
> +static struct fb_videomode mini6410_lcd_timing = {
> + .left_margin= 8,
> + .right_margin = 13,
> + .upper_margin = 7,
> + .lower_margin = 5,
> + .hsync_len = 3,
> + .vsync_len = 1,
> + .xres = 800,
> + .yres = 480,
> +};
> +
> static struct s3c_fb_platdata mini6410_lcd_pdata __initdata = {
> .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
> + .vtiming= &mini6410_lcd_timing,
> .win[0] = &mini6410_fb_win[0],
> .vidcon0= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
> .vidcon1= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
> @@ -310,8 +306,8 @@ static void __init mini6410_machine_init(void)
> mini6410_lcd_pdata.win[0] = &mini6410_fb_win[features.lcd_index];
>
> printk(KERN_INFO "MINI6410: selected LCD display is %dx%d\n",
[PATCH v3 2/3] video: s3c-fb: remove 'default_win' element from platform data
From: Thomas Abraham
The decision to enable or disable the data output to the lcd panel from
the controller need not be based on the value of 'default_win' element
in the platform data. Instead, the data output to the panel is enabled
if any of the windows are active, else data output is disabled.
Cc: Ben Dooks
Signed-off-by: Jingoo Han
Signed-off-by: Thomas Abraham
---
v3: fix some minor coding styles
arch/arm/plat-samsung/include/plat/fb.h |3 ---
drivers/video/s3c-fb.c | 24 +---
2 files changed, 5 insertions(+), 22 deletions(-)
diff --git a/arch/arm/plat-samsung/include/plat/fb.h
b/arch/arm/plat-samsung/include/plat/fb.h
index 39d6bd7..b885322 100644
--- a/arch/arm/plat-samsung/include/plat/fb.h
+++ b/arch/arm/plat-samsung/include/plat/fb.h
@@ -43,7 +43,6 @@ struct s3c_fb_pd_win {
* @setup_gpio: Setup the external GPIO pins to the right state to transfer
* the data from the display system to the connected display
* device.
- * @default_win: default window layer number to be used for UI layer.
* @vidcon0: The base vidcon0 values to control the panel data format.
* @vidcon1: The base vidcon1 values to control the panel data output.
* @vtiming: Video timing when connected to a RGB type panel.
@@ -62,8 +61,6 @@ struct s3c_fb_platdata {
struct s3c_fb_pd_win*win[S3C_FB_MAX_WIN];
struct fb_videomode *vtiming;
- u32 default_win;
-
u32 vidcon0;
u32 vidcon1;
};
diff --git a/drivers/video/s3c-fb.c b/drivers/video/s3c-fb.c
index c94f40d..dd816fb 100644
--- a/drivers/video/s3c-fb.c
+++ b/drivers/video/s3c-fb.c
@@ -531,7 +531,7 @@ static int s3c_fb_set_par(struct fb_info *info)
/* disable the window whilst we update it */
writel(0, regs + WINCON(win_no));
- if (win_no == sfb->pdata->default_win)
+ if (!sfb->output_on)
s3c_fb_enable(sfb, 1);
/* write the buffer address */
@@ -799,6 +799,7 @@ static int s3c_fb_blank(int blank_mode, struct fb_info
*info)
struct s3c_fb *sfb = win->parent;
unsigned int index = win->index;
u32 wincon;
+ u32 output_on = sfb->output_on;
dev_dbg(sfb->dev, "blank mode %d\n", blank_mode);
@@ -844,27 +845,12 @@ static int s3c_fb_blank(int blank_mode, struct fb_info
*info)
* it is highly likely that we also do not need to output
* anything.
*/
-
- /* We could do something like the following code, but the current
-* system of using framebuffer events means that we cannot make
-* the distinction between just window 0 being inactive and all
-* the windows being down.
-*
-* s3c_fb_enable(sfb, sfb->enabled ? 1 : 0);
- */
-
- /* we're stuck with this until we can do something about overriding
-* the power control using the blanking event for a single fb.
-*/
- if (index == sfb->pdata->default_win) {
- shadow_protect_win(win, 1);
- s3c_fb_enable(sfb, blank_mode != FB_BLANK_POWERDOWN ? 1 : 0);
- shadow_protect_win(win, 0);
- }
+ s3c_fb_enable(sfb, sfb->enabled ? 1 : 0);
+ shadow_protect_win(win, 0);
pm_runtime_put_sync(sfb->dev);
- return 0;
+ return output_on == sfb->output_on;
}
/**
--
1.7.1
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Re: [PATCH v11 3/3] iommu/exynos: Add iommu driver for Exynos Platforms
On Tue, Mar 13, 2012 at 12:01 AM, Joerg Roedel wrote:
> On Fri, Mar 09, 2012 at 09:15:24PM +0900, Cho KyongHo wrote:
>> +/* We does not consider super section mapping (16MB) */
>> +struct iommu_client {
>> + struct list_head node;
>> + struct device *dev;
>> +};
>> +
>> +struct exynos_iommu_domain {
>> + struct list_head clients; /* list of iommu_client */
>> + unsigned long *pgtable; /* lv1 page table, 16KB */
>> + short *lv2entcnt; /* free lv2 entry counter for each section */
>> + spinlock_t lock; /* lock for this structure and attached iommu_client
>> */
>> + spinlock_t pgtablelock; /* lock for modifying page table @ pgtable */
>> +};
>> +
>> +struct sysmmu_drvdata {
>> + struct device *sysmmu;
>> + char *dbgname;
>> + int nsfrs;
>> + void __iomem **sfrbases;
>> + struct clk *clk[2];
>> + int activations;
>> + rwlock_t lock;
>> + struct iommu_domain *domain;
>> + sysmmu_fault_handler_t fault_handler;
>> + unsigned long pgtable;
>> + struct iommu_client client;
>> +};
>
> Is there any reason why 'struct iommu_client' is a seperate data
> structure? Otherwise it can be merged with 'truct sysmmu_drvdata'.
>
There is no reason to separate it.
It is not cleanly refactored since patch version 10.
>> +static void exynos_iommu_domain_destroy(struct iommu_domain *domain)
>> +{
>> + struct exynos_iommu_domain *priv = domain->priv;
>> + struct list_head *pos, *n;
>> + unsigned long flags;
>> + int i;
>> +
>> + WARN_ON(!list_empty(&priv->clients));
>> +
>> + spin_lock_irqsave(&priv->lock, flags);
>> +
>> + list_for_each_safe(pos, n, &priv->clients) {
>> + struct iommu_client *client;
>> +
>> + client = list_entry(pos, struct iommu_client, node);
>> + exynos_sysmmu_disable(client->dev);
>> + kfree(client);
>> + }
>
> Why this kfree here? Aren't all iommu_clients just a part of another
> data-structre?
It is absolutely my fault. It must be removed.
I have forgot to care about updating iommu_domain_destroy()
when modifying exynos_iommu_attach/detach_device().
Thank you.
The problems will be soon fixed and I will post next patch tomorrow.
Cho KyongHo/
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Re: [PATCH v3 1/2] mfd: add irq domain support for max8997 interrupts
On 13 March 2012 11:35, Thomas Abraham wrote: > On 13 March 2012 08:58, Grant Likely wrote: >> On Thu, 23 Feb 2012 18:08:07 +0530, Thomas Abraham >> wrote: >>> Add irq domain support for max8997 interrupts. The reverse mapping method >>> used is linear mapping since the sub-drivers of max8997 such as regulator >>> and charger drivers can use the max8997 irq_domain to get the linux irq >>> number for max8997 interrupts. All uses of irq_base in platform data and >>> max8997 driver private data are removed. >>> >>> Cc: Grant Likely >>> Cc: MyungJoo Ham >>> Signed-off-by: Thomas Abraham >>> --- >>> arch/arm/mach-exynos/mach-nuri.c | 4 -- >>> arch/arm/mach-exynos/mach-origen.c | 1 - >>> drivers/mfd/max8997-irq.c | 60 >>> -- >>> drivers/mfd/max8997.c | 1 - >>> include/linux/mfd/max8997-private.h | 4 ++- >>> include/linux/mfd/max8997.h | 1 - >>> 6 files changed, 38 insertions(+), 33 deletions(-) [...] >> >> Hahaha. The max8997_irqs table is kind of overdone when the group and mask >> values >> can be arithmetically derived from the hwirq number.. > > Yes, I agree. Each group could have maximum of 8 interrupts. Then, > data->hwirq % 8 will be the group number and data->hwirq & 7 would be Typo here. group number = data->hwirq >> 3 and mask = data->hwirq & 7. Thanks, Thomas. -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/3] ARM: EXYNOS: Add usb otg phy control for EXYNOS4210
This patch supports to control usb otg phy of EXYNOS4210.
Signed-off-by: Joonyoung Shim
Signed-off-by: Kyungmin Park
[Rebased on the newest git/kgene/linux-samsung #for-next]
Signed-off-by: Lukasz Majewski
---
arch/arm/mach-exynos/include/mach/irqs.h |2 +-
arch/arm/mach-exynos/include/mach/map.h |3 +
arch/arm/mach-exynos/include/mach/regs-pmu.h |3 +
arch/arm/mach-exynos/setup-usb-phy.c | 95 +++---
4 files changed, 77 insertions(+), 26 deletions(-)
diff --git a/arch/arm/mach-exynos/include/mach/irqs.h
b/arch/arm/mach-exynos/include/mach/irqs.h
index 2fd2c25..dfb9411 100644
--- a/arch/arm/mach-exynos/include/mach/irqs.h
+++ b/arch/arm/mach-exynos/include/mach/irqs.h
@@ -80,7 +80,7 @@
#define IRQ_SPI2 IRQ_SPI(68)
#define IRQ_USB_HOST IRQ_SPI(70)
-#define IRQ_USB_HSOTG IRQ_SPI(71)
+#define IRQ_OTGIRQ_SPI(71)
#define IRQ_MODEM_IF IRQ_SPI(72)
#define IRQ_HSMMC0 IRQ_SPI(73)
#define IRQ_HSMMC1 IRQ_SPI(74)
diff --git a/arch/arm/mach-exynos/include/mach/map.h
b/arch/arm/mach-exynos/include/mach/map.h
index 188d87d..75a6228 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -36,6 +36,8 @@
#define EXYNOS4_PA_G2D 0x1280
+#define EXYNOS4_PA_USB_HSOTG 0x1248
+
#define EXYNOS4_PA_I2S00x0383
#define EXYNOS4_PA_I2S10xE310
#define EXYNOS4_PA_I2S20xE2A0
@@ -174,6 +176,7 @@
#define S3C_PA_IIC6EXYNOS4_PA_IIC(6)
#define S3C_PA_IIC7EXYNOS4_PA_IIC(7)
#define S3C_PA_RTC EXYNOS4_PA_RTC
+#define S3C_PA_USB_HSOTG EXYNOS4_PA_USB_HSOTG
#define S3C_PA_WDT EXYNOS4_PA_WATCHDOG
#define S3C_PA_SPI0EXYNOS4_PA_SPI0
#define S3C_PA_SPI1EXYNOS4_PA_SPI1
diff --git a/arch/arm/mach-exynos/include/mach/regs-pmu.h
b/arch/arm/mach-exynos/include/mach/regs-pmu.h
index 4c53f38..d457d05 100644
--- a/arch/arm/mach-exynos/include/mach/regs-pmu.h
+++ b/arch/arm/mach-exynos/include/mach/regs-pmu.h
@@ -163,6 +163,9 @@
#define S5P_CHECK_SLEEP0x0BAD
/* Only for EXYNOS4210 */
+#define S5P_USBDEVICE_PHY_CONTROL S5P_PMUREG(0x0704)
+#define S5P_USBDEVICE_PHY_ENABLE (1 << 0)
+
#define S5P_USBHOST_PHY_CONTROLS5P_PMUREG(0x0708)
#define S5P_USBHOST_PHY_ENABLE (1 << 0)
diff --git a/arch/arm/mach-exynos/setup-usb-phy.c
b/arch/arm/mach-exynos/setup-usb-phy.c
index 41743d2..6cf5d6a 100644
--- a/arch/arm/mach-exynos/setup-usb-phy.c
+++ b/arch/arm/mach-exynos/setup-usb-phy.c
@@ -26,11 +26,72 @@ static int exynos4_usb_host_phy_is_on(void)
return (readl(EXYNOS4_PHYPWR) & PHY1_STD_ANALOG_POWERDOWN) ? 0 : 1;
}
-static int exynos4_usb_phy1_init(struct platform_device *pdev)
+static void exynos4_usb_phy_clkset(struct platform_device *pdev)
{
- struct clk *otg_clk;
struct clk *xusbxti_clk;
u32 phyclk;
+
+ /* set clock frequency for PLL */
+ phyclk = readl(EXYNOS4_PHYCLK) & ~CLKSEL_MASK;
+
+ xusbxti_clk = clk_get(&pdev->dev, "xusbxti");
+ if (xusbxti_clk && !IS_ERR(xusbxti_clk)) {
+ switch (clk_get_rate(xusbxti_clk)) {
+ case 12 * MHZ:
+ phyclk |= CLKSEL_12M;
+ break;
+ case 24 * MHZ:
+ phyclk |= CLKSEL_24M;
+ break;
+ default:
+ case 48 * MHZ:
+ /* default reference clock */
+ break;
+ }
+ clk_put(xusbxti_clk);
+ }
+
+ writel(phyclk, EXYNOS4_PHYCLK);
+}
+
+static int exynos4_usb_phy0_init(struct platform_device *pdev)
+{
+ u32 rstcon;
+
+ writel(readl(S5P_USBDEVICE_PHY_CONTROL) | S5P_USBDEVICE_PHY_ENABLE,
+ S5P_USBDEVICE_PHY_CONTROL);
+
+ exynos4_usb_phy_clkset(pdev);
+
+ /* set to normal PHY0 */
+ writel((readl(EXYNOS4_PHYPWR) & ~PHY0_NORMAL_MASK), EXYNOS4_PHYPWR);
+
+ /* reset PHY0 and Link */
+ rstcon = readl(EXYNOS4_RSTCON) | PHY0_SWRST_MASK;
+ writel(rstcon, EXYNOS4_RSTCON);
+ udelay(10);
+
+ rstcon &= ~PHY0_SWRST_MASK;
+ writel(rstcon, EXYNOS4_RSTCON);
+ udelay(80);
+
+ return 0;
+}
+
+static int exynos4_usb_phy0_exit(struct platform_device *pdev)
+{
+ writel((readl(EXYNOS4_PHYPWR) | PHY0_ANALOG_POWERDOWN |
+ PHY0_OTG_DISABLE), EXYNOS4_PHYPWR);
+
+ writel(readl(S5P_USBDEVICE_PHY_CONTROL) & ~S5P_USBDEVICE_PHY_ENABLE,
+ S5P_USBDEVICE_PHY_CONTROL);
+
+ return 0;
+}
+
+static int exynos4_usb_phy1_init(struct platform_device *pdev)
+{
+ struct clk *otg_clk;
u32 rstco
[PATCH 2/3] ARM: EXYNOS: Add s3c-hsotg device support for NURI board
From: Joonyoung Shim
This patch adds hsotg device to the NURI board.
Signed-off-by: Joonyoung Shim
Signed-off-by: Kyungmin Park
[Rebased on the newest git/kgene/linux-samsung #for-next]
Signed-off-by: Lukasz Majewski
---
arch/arm/mach-exynos/Kconfig |1 +
arch/arm/mach-exynos/mach-nuri.c |9 -
2 files changed, 9 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 060414e..1292ad3 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -292,6 +292,7 @@ config MACH_NURI
select S5P_DEV_MFC
select S5P_DEV_USB_EHCI
select S5P_SETUP_MIPIPHY
+ select S3C_DEV_USB_HSOTG
select EXYNOS4_DEV_DMA
select EXYNOS4_SETUP_FIMC
select EXYNOS4_SETUP_FIMD0
diff --git a/arch/arm/mach-exynos/mach-nuri.c b/arch/arm/mach-exynos/mach-nuri.c
index 7ac81ce..23463d8 100644
--- a/arch/arm/mach-exynos/mach-nuri.c
+++ b/arch/arm/mach-exynos/mach-nuri.c
@@ -44,6 +44,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -390,6 +391,7 @@ static struct regulator_consumer_supply __initdata
max8997_ldo1_[] = {
REGULATOR_SUPPLY("vdd", "s5p-adc"), /* Used by CPU's ADC drv */
};
static struct regulator_consumer_supply __initdata max8997_ldo3_[] = {
+ REGULATOR_SUPPLY("vusb_d", "s3c-hsotg"), /* USB */
REGULATOR_SUPPLY("vdd11", "s5p-mipi-csis.0"), /* MIPI */
};
static struct regulator_consumer_supply __initdata max8997_ldo4_[] = {
@@ -405,7 +407,7 @@ static struct regulator_consumer_supply __initdata
max8997_ldo7_[] = {
REGULATOR_SUPPLY("dig_18", "0-001f"), /* HCD803 */
};
static struct regulator_consumer_supply __initdata max8997_ldo8_[] = {
- REGULATOR_SUPPLY("vusb_d", NULL), /* Used by CPU */
+ REGULATOR_SUPPLY("vusb_a", "s3c-hsotg"), /* USB */
REGULATOR_SUPPLY("vdac", NULL), /* Used by CPU */
};
static struct regulator_consumer_supply __initdata max8997_ldo11_[] = {
@@ -1118,6 +1120,9 @@ static void __init nuri_ehci_init(void)
s5p_ehci_set_platdata(pdata);
}
+/* USB OTG */
+static struct s3c_hsotg_plat nuri_hsotg_pdata;
+
/* CAMERA */
static struct regulator_consumer_supply cam_vt_cam15_supply =
REGULATOR_SUPPLY("vdd_core", "6-003c");
@@ -1330,6 +1335,7 @@ static struct platform_device *nuri_devices[] __initdata
= {
&s5p_device_mfc_l,
&s5p_device_mfc_r,
&s5p_device_fimc_md,
+ &s3c_device_usb_hsotg,
/* NURI Devices */
&nuri_gpio_keys,
@@ -1377,6 +1383,7 @@ static void __init nuri_machine_init(void)
nuri_camera_init();
nuri_ehci_init();
+ s3c_hsotg_set_platdata(&nuri_hsotg_pdata);
clk_xusbxti.rate = 2400;
/* Last */
--
1.7.2.3
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[PATCH 3/3] ARM: EXYNOS: Add s3c-hsotg device support for Universal C210 board
This patch adds platform data for using S3C-HSOTG driver at
Universal_C210 target.
Signed-off-by: Lukasz Majewski
Signed-off-by: Kyungmin Park
---
arch/arm/mach-exynos/Kconfig |2 ++
arch/arm/mach-exynos/mach-universal_c210.c | 14 ++
2 files changed, 16 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 1292ad3..118f35d 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -256,6 +256,7 @@ config MACH_UNIVERSAL_C210
select S5P_DEV_MFC
select S5P_DEV_ONENAND
select S5P_DEV_TV
+ select S3C_DEV_USB_HSOTG
select EXYNOS4_DEV_DMA
select EXYNOS4_SETUP_FIMD0
select EXYNOS4_SETUP_I2C1
@@ -264,6 +265,7 @@ config MACH_UNIVERSAL_C210
select EXYNOS4_SETUP_SDHCI
select EXYNOS4_SETUP_FIMC
select S5P_SETUP_MIPIPHY
+ select EXYNOS4_SETUP_USB_PHY
help
Machine support for Samsung Mobile Universal S5PC210 Reference
Board.
diff --git a/arch/arm/mach-exynos/mach-universal_c210.c
b/arch/arm/mach-exynos/mach-universal_c210.c
index 57e4418..f15dcc7 100644
--- a/arch/arm/mach-exynos/mach-universal_c210.c
+++ b/arch/arm/mach-exynos/mach-universal_c210.c
@@ -29,6 +29,7 @@
#include
#include
+#include
#include
#include
#include
@@ -41,6 +42,7 @@
#include
#include
#include
+#include
#include
@@ -203,6 +205,7 @@ static struct regulator_init_data lp3974_ldo2_data = {
};
static struct regulator_consumer_supply lp3974_ldo3_consumer[] = {
+ REGULATOR_SUPPLY("vusb_a", "s3c-hsotg"),
REGULATOR_SUPPLY("vdd", "exynos4-hdmi"),
REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"),
REGULATOR_SUPPLY("vdd11", "s5p-mipi-csis.0"),
@@ -288,6 +291,7 @@ static struct regulator_init_data lp3974_ldo7_data = {
};
static struct regulator_consumer_supply lp3974_ldo8_consumer[] = {
+ REGULATOR_SUPPLY("vusb_d", "s3c-hsotg"),
REGULATOR_SUPPLY("vdd33a_dac", "s5p-sdo"),
};
@@ -484,7 +488,10 @@ static struct regulator_init_data lp3974_vichg_data = {
static struct regulator_init_data lp3974_esafeout1_data = {
.constraints= {
.name = "SAFEOUT1",
+ .min_uV = 480,
+ .max_uV = 480,
.valid_ops_mask = REGULATOR_CHANGE_STATUS,
+ .always_on = 1,
.state_mem = {
.enabled= 1,
},
@@ -992,6 +999,9 @@ static struct gpio universal_camera_gpios[] = {
{ GPIO_CAM_VGA_NSTBY, GPIOF_OUT_INIT_LOW, "CAM_VGA_NSTBY" },
};
+/* USB OTG */
+static struct s3c_hsotg_plat universal_hsotg_pdata;
+
static void __init universal_camera_init(void)
{
s3c_set_platdata(&mipi_csis_platdata, sizeof(mipi_csis_platdata),
@@ -1047,6 +1057,7 @@ static struct platform_device *universal_devices[]
__initdata = {
&s5p_device_onenand,
&s5p_device_fimd0,
&s5p_device_jpeg,
+ &s3c_device_usb_hsotg,
&s5p_device_mfc,
&s5p_device_mfc_l,
&s5p_device_mfc_r,
@@ -1098,10 +1109,13 @@ static void __init universal_machine_init(void)
i2c_register_board_info(I2C_GPIO_BUS_12, i2c_gpio12_devs,
ARRAY_SIZE(i2c_gpio12_devs));
+ s3c_hsotg_set_platdata(&universal_hsotg_pdata);
universal_camera_init();
/* Last */
platform_add_devices(universal_devices, ARRAY_SIZE(universal_devices));
+
+ clk_xusbxti.rate = 2400;
}
MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210")
--
1.7.2.3
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[PATCH 0/3] ARM: EXYNOS: Add s3c-hsotg support for Exynos4210 boards
This patch add support for Exynos4210 based targets; namely Universal_C210 and Nuri. Tested HW: - Exynos4210 NURI target rev.1 - Exynos4210 Universal_C210 target rev.0 Joonyoung Shim (1): ARM: EXYNOS: Add s3c-hsotg device support for NURI board Lukasz Majewski (2): ARM: EXYNOS: Add usb otg phy control for EXYNOS4210 ARM: EXYNOS: Add s3c-hsotg device support for Universal C210 board arch/arm/mach-exynos/Kconfig |3 + arch/arm/mach-exynos/include/mach/irqs.h |2 +- arch/arm/mach-exynos/include/mach/map.h |3 + arch/arm/mach-exynos/include/mach/regs-pmu.h |3 + arch/arm/mach-exynos/mach-nuri.c |9 ++- arch/arm/mach-exynos/mach-universal_c210.c | 14 arch/arm/mach-exynos/setup-usb-phy.c | 95 +++--- 7 files changed, 102 insertions(+), 27 deletions(-) -- 1.7.2.3 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
