[PATCH 1/2] ARM: dts: Add pinctrl node entries for Samsung Exynos4210 SoC
Add pinctrl driver nodes for the three instances of pin controllers
in Samsung Exynos4210 SoC and add the pin group nodes available in the
each of those three instances.
Cc: Kukjin Kim
Signed-off-by: Thomas Abraham
---
arch/arm/boot/dts/exynos4210-pinctrl.dtsi | 457 +
arch/arm/boot/dts/exynos4210.dtsi | 37 +++
2 files changed, 494 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/boot/dts/exynos4210-pinctrl.dtsi
diff --git a/arch/arm/boot/dts/exynos4210-pinctrl.dtsi
b/arch/arm/boot/dts/exynos4210-pinctrl.dtsi
new file mode 100644
index 000..b12cf27
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4210-pinctrl.dtsi
@@ -0,0 +1,457 @@
+/*
+ * Samsung's Exynos4210 SoC pin-mux and pin-config device tree source
+ *
+ * Copyright (c) 2011-2012 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ * Copyright (c) 2011-2012 Linaro Ltd.
+ * www.linaro.org
+ *
+ * Samsung's Exynos4210 SoC pin-mux and pin-config optiosn are listed as device
+ * tree nodes are listed in this file.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/ {
+ pinctrl@1140 {
+ uart0_data: uart0-data {
+ samsung,pins = "gpa0-0", "gpa0-1";
+ samsung,pin-function = <0x2>;
+ samsung,pin-pud = <0>;
+ samsung,pin-drv = <0>;
+ };
+
+ uart0_fctl: uart0-fctl {
+ samsung,pins = "gpa0-2", "gpa0-3";
+ samsung,pin-function = <2>;
+ samsung,pin-pud = <0>;
+ samsung,pin-drv = <0>;
+ };
+
+ uart1_data: uart1-data {
+ samsung,pins = "gpa0-4", "gpa0-5";
+ samsung,pin-function = <2>;
+ samsung,pin-pud = <0>;
+ samsung,pin-drv = <0>;
+ };
+
+ uart1_fctl: uart1-fctl {
+ samsung,pins = "gpa0-6", "gpa0-7";
+ samsung,pin-function = <2>;
+ samsung,pin-pud = <0>;
+ samsung,pin-drv = <0>;
+ };
+
+ i2c2_bus: i2c2-bus {
+ samsung,pins = "gpa0-6", "gpa0-7";
+ samsung,pin-function = <3>;
+ samsung,pin-pud = <3>;
+ samsung,pin-drv = <0>;
+ };
+
+ uart2_data: uart2-data {
+ samsung,pins = "gpa1-0", "gpa1-1";
+ samsung,pin-function = <2>;
+ samsung,pin-pud = <0>;
+ samsung,pin-drv = <0>;
+ };
+
+ uart2_fctl: uart2-fctl {
+ samsung,pins = "gpa1-2", "gpa1-3";
+ samsung,pin-function = <2>;
+ samsung,pin-pud = <0>;
+ samsung,pin-drv = <0>;
+ };
+
+ uart_audio_a: uart-audio-a {
+ samsung,pins = "gpa1-0", "gpa1-1";
+ samsung,pin-function = <4>;
+ samsung,pin-pud = <0>;
+ samsung,pin-drv = <0>;
+ };
+
+ i2c3_bus: i2c3-bus {
+ samsung,pins = "gpa1-2", "gpa1-3";
+ samsung,pin-function = <3>;
+ samsung,pin-pud = <3>;
+ samsung,pin-drv = <0>;
+ };
+
+ uart3_data: uart3-data {
+ samsung,pins = "gpa1-4", "gpa1-5";
+ samsung,pin-function = <2>;
+ samsung,pin-pud = <0>;
+ samsung,pin-drv = <0>;
+ };
+
+ uart_audio_b: uart-audio-b {
+ samsung,pins = "gpa1-4", "gpa1-5";
+ samsung,pin-function = <4>;
+ samsung,pin-pud = <0>;
+ samsung,pin-drv = <0>;
+ };
+
+ spi0_bus: spi0-bus {
+ samsung,pins = "gpb-0", "gpb-2", "gpb-3";
+ samsung,pin-function = <2>;
+ samsung,pin-pud = <3>;
+ samsung,pin-drv = <0>;
+ };
+
+ i2c4_bus: i2c4-bus {
+ samsung,pins = "gpb-2", "gpb-3";
+ samsung,pin-function = <3>;
+ samsung,pin-pud = <3>;
+ samsung,pin-drv = <0>;
+ };
+
+ spi1_bus: spi1-bus {
+ samsung,pins = "gpb-4", "gpb-6", "gpb-7";
+ samsung,pin-function = <2>;
+ samsung,pin-pud = <3>;
+ sams
[PATCH 0/2] Enable pinctrl driver support for Exynos4210 based platforms
This patch series enables support for pin controller driver for Exynos4210 SoC based device tree enabled platforms. The first patch in this series adds the pin group nodes for each of the three pin controller instances, but it is not a exhaustive list of all possible pin group nodes. As the coverage of pinctrl driver is extended device drivers used on Exynos4210 platforms, additional pin group nodes can be added as required. Thomas Abraham (2): ARM: dts: Add pinctrl node entries for Samsung Exynos4210 SoC ARM: EXYNOS: Enable PINCTRL config option for Exynos4 device tree enabled platform arch/arm/boot/dts/exynos4210-pinctrl.dtsi | 457 + arch/arm/boot/dts/exynos4210.dtsi | 37 +++ arch/arm/mach-exynos/Kconfig |1 + 3 files changed, 495 insertions(+), 0 deletions(-) create mode 100644 arch/arm/boot/dts/exynos4210-pinctrl.dtsi -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 2/2] ARM: EXYNOS: Enable PINCTRL config option for Exynos4 device tree enabled platform
This enables support for Samsung and Exynos4 pinctrl driver for device tree enabled Exynos4 platforms. Cc: Kukjin Kim Signed-off-by: Thomas Abraham --- arch/arm/mach-exynos/Kconfig |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index b5b4c8c..ad96c59 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig @@ -405,6 +405,7 @@ config MACH_EXYNOS4_DT select USE_OF select ARM_AMBA select HAVE_SAMSUNG_KEYPAD if INPUT_KEYBOARD + select PINCTRL help Machine support for Samsung Exynos4 machine with device tree enabled. Select this if a fdt blob is available for the Exynos4 SoC based board. -- 1.6.6.rc2 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 2/4] pinctrl: add exynos4210 specific extensions for samsung pinctrl driver
Add information about the Exynos4210 pin banks and driver data which is
used by the Samsung pinctrl driver. In addition to this, the support for
external gpio and wakeup interrupt support is included and hooked up with
the Samsung pinctrl driver.
Cc: Linus Walleij
Cc: Kukjin Kim
Signed-off-by: Thomas Abraham
---
drivers/pinctrl/Kconfig |7 +
drivers/pinctrl/Makefile |1 +
drivers/pinctrl/pinctrl-exynos.c | 555 ++
drivers/pinctrl/pinctrl-exynos.h | 213 +++
4 files changed, 776 insertions(+), 0 deletions(-)
create mode 100644 drivers/pinctrl/pinctrl-exynos.c
create mode 100644 drivers/pinctrl/pinctrl-exynos.h
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index 0d2398f..858afa5 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -165,6 +165,13 @@ config PINCTRL_SAMSUNG
bool "Samsung pinctrl driver"
depends on OF
+config PINCTRL_EXYNOS4
+ bool "Pinctrl driver data for Exynos4 SoC"
+ depends on ARCH_EXYNOS4 && OF
+ depends on PINCTRL_SAMSUNG
+ select PINMUX
+ select PINCONF
+
source "drivers/pinctrl/spear/Kconfig"
endmenu
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index 7155301..9665411 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -33,5 +33,6 @@ obj-$(CONFIG_PINCTRL_TEGRA30) += pinctrl-tegra30.o
obj-$(CONFIG_PINCTRL_U300) += pinctrl-u300.o
obj-$(CONFIG_PINCTRL_COH901) += pinctrl-coh901.o
obj-$(CONFIG_PINCTRL_SAMSUNG) += pinctrl-samsung.o
+obj-$(CONFIG_PINCTRL_EXYNOS4) += pinctrl-exynos.o
obj-$(CONFIG_PLAT_SPEAR) += spear/
diff --git a/drivers/pinctrl/pinctrl-exynos.c b/drivers/pinctrl/pinctrl-exynos.c
new file mode 100644
index 000..f279506
--- /dev/null
+++ b/drivers/pinctrl/pinctrl-exynos.c
@@ -0,0 +1,555 @@
+/*
+ * Exynos specific support for Samsung pinctrl/gpiolib driver with eint
support.
+ *
+ * Copyright (c) 2012 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ * Copyright (c) 2012 Linaro Ltd
+ * http://www.linaro.org
+ *
+ * Author: Thomas Abraham
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This file contains the Samsung Exynos specific information required by the
+ * the Samsung pinctrl/gpiolib driver. It also includes the implementation of
+ * external gpio and wakeup interrupt support.
+ */
+
+#include
+#include
+#include
+#include
+
+#include
+
+#include "pinctrl-samsung.h"
+#include "pinctrl-exynos.h"
+
+/* list of external wakeup controllers supported */
+static const struct of_device_id exynos_wkup_irq_ids[] = {
+ { .compatible = "samsung,exynos4210-wakeup-eint", },
+};
+
+static void exynos_gpio_irq_unmask(struct irq_data *irqd)
+{
+ struct samsung_pinctrl_drv_data *d = irqd->domain->host_data;
+ struct exynos_geint_data *edata = irq_data_get_irq_handler_data(irqd);
+ unsigned long reg_mask = d->ctrl->geint_mask + edata->eint_offset;
+ unsigned long mask;
+
+ mask = readl(d->virt_base + reg_mask);
+ mask &= ~(1 << edata->pin);
+ writel(mask, d->virt_base + reg_mask);
+}
+
+static void exynos_gpio_irq_mask(struct irq_data *irqd)
+{
+ struct samsung_pinctrl_drv_data *d = irqd->domain->host_data;
+ struct exynos_geint_data *edata = irq_data_get_irq_handler_data(irqd);
+ unsigned long reg_mask = d->ctrl->geint_mask + edata->eint_offset;
+ unsigned long mask;
+
+ mask = readl(d->virt_base + reg_mask);
+ mask |= ~(1 << edata->pin);
+ writel(mask, d->virt_base + reg_mask);
+}
+
+static void exynos_gpio_irq_ack(struct irq_data *irqd)
+{
+ struct samsung_pinctrl_drv_data *d = irqd->domain->host_data;
+ struct exynos_geint_data *edata = irq_data_get_irq_handler_data(irqd);
+ unsigned long reg_pend = d->ctrl->geint_pend + edata->eint_offset;
+
+ writel(1 << edata->pin, d->virt_base + reg_pend);
+}
+
+static int exynos_gpio_irq_set_type(struct irq_data *irqd, unsigned int type)
+{
+ struct samsung_pinctrl_drv_data *d = irqd->domain->host_data;
+ struct samsung_pin_ctrl *ctrl = d->ctrl;
+ struct exynos_geint_data *edata = irq_data_get_irq_handler_data(irqd);
+ unsigned int shift = EXYNOS_EINT_CON_LEN * edata->pin;
+ unsigned int con, trig_type;
+ unsigned long reg_con = ctrl->geint_con + edata->eint_offset;
+
+ switch (type) {
+ case IRQ_TYPE_EDGE_RISING:
+ trig_type = EXYNOS_EINT_EDGE_RISING;
+ break;
+ case IRQ_TYPE_EDGE_FALLING:
+ trig_type = EXYNOS_EINT_EDGE_FALLING;
+ break;
+ case IRQ_TYPE_EDGE_BOTH:
+ trig_type = EXYNOS_EINT_EDGE_BOTH;
+ break;
+
[PATCH v2 4/4] ARM: EXYNOS: skip wakeup interrupt setup if pinctrl driver is used
Pinctrl driver includes support for configuring the external wakeup
interrupts. On exynos platforms that use pinctrl driver, the setup
of wakeup interrupts in the exynos platform code can be skipped.
Cc: Kukjin Kim
Signed-off-by: Thomas Abraham
---
arch/arm/mach-exynos/common.c | 26 ++
1 files changed, 26 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 4eb39cd..ea3a85a 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -980,6 +980,32 @@ static int __init exynos_init_irq_eint(void)
{
int irq;
+#ifdef CONFIG_OF
+ /*
+* The Samsung pinctrl driver provides an integrated gpio/pinmux/pinconf
+* functionality along with support for external gpio and wakeup
+* interrupts. If the samsung pinctrl driver is enabled and includes
+* the wakeup interrupt support, then the setting up external wakeup
+* interrupts here can be skipped. This check here is temporary to
+* allow exynos4 platforms that do not use Samsung pinctrl driver to
+* co-exist with platforms that do. When all of the Samsung Exynos4
+* platforms switch over to using the pinctrl driver, the wakeup
+* interrupt support code here can be completely removed.
+*/
+ struct device_node *pctrl_np, *wkup_np;
+ const char *pctrl_compat = "samsung,pinctrl-exynos4210";
+ const char *wkup_compat = "samsung,exynos4210-wakeup-eint";
+
+ for_each_compatible_node(pctrl_np, NULL, pctrl_compat) {
+ if (of_device_is_available(pctrl_np)) {
+ wkup_np = of_find_compatible_node(pctrl_np, NULL,
+ wkup_compat);
+ if (wkup_np)
+ return -ENODEV;
+ }
+ }
+#endif
+
if (soc_is_exynos5250())
exynos_eint_base = ioremap(EXYNOS5_PA_GPIO1, SZ_4K);
else
--
1.6.6.rc2
--
To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 3/4] gpio: exynos4: skip gpiolib registration if pinctrl driver is used
Pinctrl driver, when enabled, registers all the gpio pins and hence the
registration of gpio pins by this driver can be skipped.
Acked-by: Grant Likely
Acked-by: Linus Walleij
Signed-off-by: Thomas Abraham
---
drivers/gpio/gpio-samsung.c | 21 +
1 files changed, 21 insertions(+), 0 deletions(-)
diff --git a/drivers/gpio/gpio-samsung.c b/drivers/gpio/gpio-samsung.c
index 92f7b2b..8e61053 100644
--- a/drivers/gpio/gpio-samsung.c
+++ b/drivers/gpio/gpio-samsung.c
@@ -2734,6 +2734,27 @@ static __init void exynos4_gpiolib_init(void)
int group = 0;
void __iomem *gpx_base;
+#ifdef CONFIG_OF
+ /*
+* This gpio driver includes support for device tree support and
+* there are platforms using it. In order to maintain
+* compatibility with those platforms, and to allow non-dt
+* Exynos4210 platforms to use this gpiolib support, a check
+* is added to find out if there is a active pin-controller
+* driver support available. If it is available, this gpiolib
+* support is ignored and the gpiolib support available in
+* pin-controller driver is used. This is a temporary check and
+* will go away when all of the Exynos4210 platforms have
+* switched to using device tree and the pin-ctrl driver.
+*/
+ struct device_node *pctrl_np;
+ const char *pctrl_compat = "samsung,pinctrl-exynos4210";
+ pctrl_np = of_find_compatible_node(NULL, NULL, pctrl_compat);
+ if (pctrl_np)
+ if (of_device_is_available(pctrl_np))
+ return -ENODEV;
+#endif
+
/* gpio part1 */
gpio_base1 = ioremap(EXYNOS4_PA_GPIO1, SZ_4K);
if (gpio_base1 == NULL) {
--
1.6.6.rc2
--
To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 1/4] pinctrl: add samsung pinctrl and gpiolib driver
Add a new device tree enabled pinctrl and gpiolib driver for Samsung SoC's. This driver provides a common and extensible framework for all Samsung SoC's to interface with the pinctrl and gpiolib subsystems. This driver supports only device tree based instantiation and hence can be used only on those Samsung platforms that have device tree enabled. This driver is split into two parts: the pinctrl interface and the gpiolib interface. The pinctrl interface registers pinctrl devices with the pinctrl subsystem and gpiolib interface registers gpio chips with the gpiolib subsystem. The information about the pins, pin groups, pin functions and gpio chips, which are SoC specific, are parsed from device tree node. Cc: Linus Walleij Cc: Kukjin Kim Signed-off-by: Thomas Abraham --- .../bindings/pinctrl/samsung-pinctrl.txt | 176 drivers/pinctrl/Kconfig|4 + drivers/pinctrl/Makefile |1 + drivers/pinctrl/pinctrl-samsung.c | 873 drivers/pinctrl/pinctrl-samsung.h | 215 + 5 files changed, 1269 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt create mode 100644 drivers/pinctrl/pinctrl-samsung.c create mode 100644 drivers/pinctrl/pinctrl-samsung.h diff --git a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt new file mode 100644 index 000..c30ee88 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt @@ -0,0 +1,176 @@ +Samsung GPIO and Pin Mux/Config controller + +Samsung's ARM based SoC's integrates a GPIO and Pin mux/config hardware +controller. It controls the input/output settings on the available pads/pins +and also provides ability to multiplex and configure the output of various +on-chip controllers onto these pads. + +Required Properties: +- compatible: should be one of the following. + - "samsung,pinctrl-exynos4210": for Exynos4210 compatible pin-controller. + - "samsung,pinctrl-exynos5250": for Exynos5250 compatible pin-controller. + +- reg: Base address of the pin controller hardware module and length of + the address space it occupies. + +- interrupts: interrupt specifier for the controller. The format and value of + the interrupt specifier depends on the interrupt parent for the controller. + +- Pin mux/config groups as child nodes: The pin mux (selecting pin function + mode) and pin config (pull up/down, driver strength) settings are represented + as child nodes of the pin-controller node. There should be atleast one + child node and there is no limit on the count of these child nodes. + + The child node should contain a list of pin(s) on which a particular pin + function selection or pin configuration (or both) have to applied. This + list of pins is specified using the property name "samsung,pins". There + should be atleast one pin specfied for this property and there is no upper + limit on the count of pins that can be specified. The pins are specified + using pin names which are derived from the hardware manual of the SoC. As + an example, the pins in GPA0 bank of the pin controller can be represented + as "gpa0-0", "gpa0-1", "gpa0-2" and so on. The names should be in lower case. + The format of the pin names should be (as per the hardware manual) + "[pin bank name]-[pin number within the bank]". + + The pin function selection that should be applied on the pins listed in the + child node is specified using the "samsung,pin-function" property. The value + of this property that should be applied to each of the pins listed in the + "samsung,pins" property should be picked from the hardware manual of the SoC + for the specified pin group. This property is optional in the child node if + no specific function selection is desired for the pins listed in the child + node. The value of this property is used as-is to program the pin-controller + function selector register of the pin-bank. + + The child node can also optionally specify one or more of the pin + configuration that should be applied on all the pins listed in the + "samsung,pins" property of the child node. The following pin configuration + properties are supported. + + - samsung,pin-pud: Pull up/down configuration. + - samsung,pin-drv: Drive strength configuration. + - samsung,pin-pud-pdn: Pull up/down configuration in power down mode. + - samsung,pin-drv-pdn: Drive strength configuration in power down mode. + + The values specified by these config properties should be dervied from the + hardware manual and these values are programmed as-is into the pin + pull up/down and driver strength register of the pin-controller. + + Note: A child should include atleast a pin function selection property or + pin configuration property (one or more) or both. + + The client nodes that require a particular pin
[PATCH v2 0/4] pinctrl: add support for samsung pinctrl driver
Changes since v1: - Added support for external gpio and wakeup interrupts for Exynos4. This patch series adds a common pinctrl driver for all Samsung platforms and enables the pinctrl driver support for Exynos4210 based device tree enabled platforms. The scope of this driver is limited to only device tree enabled platforms. The intention of this driver is to replace the existing gpiolib driver and provide pinctrl subsystem interface to configure the pins/mux instead of existing platform callbacks. Note that, the Samsung pinctrl driver is usable only on device tree enabled Samsung platforms. Legacy platforms would still continue to use the older gpiolib driver and hence updates to device drivers to use the pinctrl api should ensure that support for legacy platforms is maintained. The first patch adds a new pinctrl driver for Samsung. It provides interfaces to the pinctrl and gpiolib subsystems. This driver provides a common framework for all Samsung SoC's to enable the pinctrl and gpiolib support. The driver accepts the information about pins, groups and functions from the device tree and the information about gpio banks is supplied using driver data. The second patch adds the driver data required to operate the pinctrl driver on Exynos4210 based platforms. It allows includes support for Exynos4210 specific external gpio and wakeup interrupts which are provides to the Samsung pinctrl driver as extensions. The third patch modifies the existing gpiolib driver to skip the gpio pin registrations if pinctrl driver support is found to be enabled. The fourth patch skips the external wakeup interrupt configuration process in the Exynos4 platform code if the external wakeup interrupt support is provided by the pin-control driver. Thomas Abraham (4): pinctrl: add samsung pinctrl and gpiolib driver pinctrl: add exynos4210 specific extensions for samsung pinctrl driver gpio: exynos4: skip gpiolib registration if pinctrl driver is used ARM: EXYNOS: skip wakeup interrupt setup if pinctrl driver is used .../bindings/pinctrl/samsung-pinctrl.txt | 176 arch/arm/mach-exynos/common.c | 26 + drivers/gpio/gpio-samsung.c| 21 + drivers/pinctrl/Kconfig| 11 + drivers/pinctrl/Makefile |2 + drivers/pinctrl/pinctrl-exynos.c | 555 + drivers/pinctrl/pinctrl-exynos.h | 213 + drivers/pinctrl/pinctrl-samsung.c | 873 drivers/pinctrl/pinctrl-samsung.h | 215 + 9 files changed, 2092 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt create mode 100644 drivers/pinctrl/pinctrl-exynos.c create mode 100644 drivers/pinctrl/pinctrl-exynos.h create mode 100644 drivers/pinctrl/pinctrl-samsung.c create mode 100644 drivers/pinctrl/pinctrl-samsung.h -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] ARM: SAMSUNG: use spin_lock_irqsave() in clk_set_parent
>From 0cdf3aff, "ARM: SAMSUNG: use spin_lock_irqsave() in
clk_{enable,disable}":
The clk_enable()and clk_disable() can be used process and ISR either.
And actually it is used for real product and other platforms use it
now. So spin_lock_irqsave() should be used instead.
We need to make a similar change in clk_set_parent(). Otherwise,
you can potentially get spinlock recursion:
BUG: spinlock recursion on CPU#0, kinteractive/68
lock: 807832a8, .magic: dead4ead, .owner: kinteractive/68, .owner_cpu: 0
[<80015f54>] (unwind_backtrace+0x0/0x128) from [<804f2914>]
(dump_stack+0x20/0x24)
[<804f2914>] (dump_stack+0x20/0x24) from [<804f57b8>] (spin_dump+0x80/0x94)
[<804f57b8>] (spin_dump+0x80/0x94) from [<804f57f8>] (spin_bug+0x2c/0x30)
[<804f57f8>] (spin_bug+0x2c/0x30) from [<80222730>]
(do_raw_spin_lock+0x54/0x150)
[<80222730>] (do_raw_spin_lock+0x54/0x150) from [<804f96ec>]
(_raw_spin_lock_irqsave+0x20/0x28)
[<804f96ec>] (_raw_spin_lock_irqsave+0x20/0x28) from [<80022ea4>]
(clk_enable+0x3c/0x84)
[<80022ea4>] (clk_enable+0x3c/0x84) from [<8038336c>]
(s5p_mfc_clock_on+0x60/0x74)
[<8038336c>] (s5p_mfc_clock_on+0x60/0x74) from [<8038645c>]
(s5p_mfc_read_info+0x20/0x38)
[<8038645c>] (s5p_mfc_read_info+0x20/0x38) from [<8037ca3c>]
(s5p_mfc_handle_frame+0x2e4/0x4bc)
[<8037ca3c>] (s5p_mfc_handle_frame+0x2e4/0x4bc) from [<8037d420>]
(s5p_mfc_irq+0x1ec/0x6cc)
[<8037d420>] (s5p_mfc_irq+0x1ec/0x6cc) from [<8007fc74>]
(handle_irq_event_percpu+0x8c/0x244)
[<8007fc74>] (handle_irq_event_percpu+0x8c/0x244) from [<8007fe78>]
(handle_irq_event+0x4c/0x6c)
[<8007fe78>] (handle_irq_event+0x4c/0x6c) from [<80082dd8>]
(handle_fasteoi_irq+0xe4/0x150)
[<80082dd8>] (handle_fasteoi_irq+0xe4/0x150) from [<8007f424>]
(generic_handle_irq+0x3c/0x50)
[<8007f424>] (generic_handle_irq+0x3c/0x50) from [<8000f7c4>]
(handle_IRQ+0x88/0xc8)
[<8000f7c4>] (handle_IRQ+0x88/0xc8) from [<80008564>] (gic_handle_irq+0x44/0x68)
[<80008564>] (gic_handle_irq+0x44/0x68) from [<8000e400>] (__irq_svc+0x40/0x60)
Exception stack(0xef3cbe68 to 0xef3cbeb0)
[<8000e400>] (__irq_svc+0x40/0x60) from [<80022cfc>] (clk_set_parent+0x30/0x74)
[<80022cfc>] (clk_set_parent+0x30/0x74) from [<803ac7f8>]
(set_apll.isra.0+0x28/0xb0)
[<803ac7f8>] (set_apll.isra.0+0x28/0xb0) from [<803ac8e4>]
(exynos5250_set_frequency+0x64/0xb8)
[<803ac8e4>] (exynos5250_set_frequency+0x64/0xb8) from [<803ac280>]
(exynos_target+0x1b0/0x220)
[<803ac280>] (exynos_target+0x1b0/0x220) from [<803a4a0c>]
(__cpufreq_driver_target+0xb0/0xd4)
[<803a4a0c>] (__cpufreq_driver_target+0xb0/0xd4) from [<803aab80>]
(cpufreq_interactive_updown_task+0x214/0x264)
[<803aab80>] (cpufreq_interactive_updown_task+0x214/0x264) from [<80047d04>]
(kthread+0x9c/0xa8)
[<80047d04>] (kthread+0x9c/0xa8) from [<8000fa48>] (kernel_thread_exit+0x0/0x8)
Signed-off-by: Mandeep Singh Baines
Suggested-by: Sunil Mazhavanchery
CC: linux-arm-ker...@lists.infradead.org
CC: linux-samsung-soc@vger.kernel.org
CC: Ben Dooks
CC: Kukjin Kim
CC: Russell King
CC: Minho Ban
CC: Jaecheol Lee
CC: Sunyoung Kang
CC: Kukjin Kim
CC: Olof Johansson
---
arch/arm/plat-samsung/clock.c |5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm/plat-samsung/clock.c b/arch/arm/plat-samsung/clock.c
index 65c5eca..80eacca 100644
--- a/arch/arm/plat-samsung/clock.c
+++ b/arch/arm/plat-samsung/clock.c
@@ -173,17 +173,18 @@ struct clk *clk_get_parent(struct clk *clk)
int clk_set_parent(struct clk *clk, struct clk *parent)
{
+ unsigned long flags;
int ret = 0;
if (IS_ERR(clk))
return -EINVAL;
- spin_lock(&clocks_lock);
+ spin_lock_irqsave(&clocks_lock, flags);
if (clk->ops && clk->ops->set_parent)
ret = (clk->ops->set_parent)(clk, parent);
- spin_unlock(&clocks_lock);
+ spin_unlock_irqrestore(&clocks_lock, flags);
return ret;
}
--
1.7.7.3
--
To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
