Re: [PATCH] mmc: dt: Add 'broken-cd' DT binding
On 22 August 2012 22:39, Mitch Bradley w...@firmworks.com wrote: Sorry to interject on a topic that seems to have already been decided, but I'm confused by one thing and would like clarification. I understand that you need to use a GPIO-style specifier as a surrogate for a pinmux specification - that much is clear. What is not clear is why it's necessary to (ab)use the name cd-gpios for it. Why not use a different property name, e.g. samsung,cd-pinmux-gpio = gpio-specifier for the cd-gpios + samsung,sdhci-cd-internal case? Then both samsung,sdhci-cdi-internal and samsung,sdhci-cd-external could go away. There would only be one system-dependent property samsung,cd-pinmux-gpio whose name would make it clear that it's conflating pinmuxing and gpios. Right, I agree. I will prepare the sdhci-s3c based on Chris's new generic binding patch and your suggestion. I think the scheme I propose would be clearer, less likely to confuse other people who try to use the driver as a model, require less hand-waving in the documentation, and easier to change to a proper pinmuxing scheme should that become available later. Thanks for your time. Regards, Thomas. -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH] ARM: EXYNOS: Add MFC device tree support
Arun Kumar K wrote:
Hi Thomas,
Thank you for the comments.
Please find my response inline.
--- Original Message ---
Sender : Thomas Abrahamthomas.abra...@linaro.org
Date : Aug 16, 2012 17:12 (GMT+05:30)
Title : Re: [PATCH] ARM: EXYNOS: Add MFC device tree support
On 16 August 2012 18:01, Arun Kumar K arun...@samsung.com wrote:
From: Naveen Krishna Chatradhi ch.nav...@samsung.com
This patch adds device tree entry for MFC in the Exynos
machines. Exynos4 SoCs support MFC v5 version and Exynos5 has
MFC v6.x version. So making the required changes in the clock
Since v6.1 is not used anywhere so just MFC v6 should be ok.
files and adds MFC to the DT device list.
Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
Signed-off-by: Arun Kumar K arun...@samsung.com
---
.../devicetree/bindings/media/s5p-mfc.txt | 24
arch/arm/boot/dts/exynos4210.dtsi | 10
arch/arm/boot/dts/exynos5250.dtsi | 10
arch/arm/mach-exynos/clock-exynos5.c |2 +-
arch/arm/mach-exynos/mach-exynos4-dt.c | 22
++
arch/arm/mach-exynos/mach-exynos5-dt.c | 22
++
6 files changed, 89 insertions(+), 1 deletions(-)
create mode 100644 Documentation/devicetree/bindings/media/s5p-mfc.txt
diff --git a/Documentation/devicetree/bindings/media/s5p-mfc.txt
b/Documentation/devicetree/bindings/media/s5p-mfc.txt
new file mode 100644
index 000..b9bd266
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/s5p-mfc.txt
@@ -0,0 +1,24 @@
+* Samsung Multi Format Codec (MFC)
+
+Mult Format Codec (MFC) is the IP present in Samsung SoCs which
+supports high resolution decoding and encoding functionalities.
In addition to this, specifying that mfc is used for video
encode/decode would be informative.
Ok. I will make it more descriptive.
+
+Required properties:
+ - compatible : value should be either one among the following
+ (a) samsung,s5p-mfc-v5 for MFC v5 present in Exynos4 SoCs
+ (b) samsung,s5p-mfc-v6 for MFC v6.x present in Exynos5 SoCs
s5p should be dropped from the compatible values. For example, it
should be samsung,mfc-v5, which is sufficient to identify the
version of the mfc controller.
Ok will remove s5p.
Yeah, I agree, just 'mfc-vX' is enough.
+
+ - reg : Physical base address of the IP registers and length of
memory
+ mapped region.
+
+ - interrupts : MFC interupt number to the CPU.
+
+ - samsung,mfc-r : Base address of the first memory bank used by MFC
+ for DMA contiguous memory allocation.
+
+ - samsung,mfc-r-size : Size of the first memory bank.
It is not allowed to pass buffer base address and size from device
tree. Device tree node should describe only the MFC controller
hardware. Any memory management related information should be handled
outside of device tree. This helps the bindings to be reusable across
multiple operating systems.
The mfc-l and mfc-r base address and size is board specific info which has
to
be passed to the driver. This is used for DMA contiguous allocation by
driver and this value
can change on a different board.
So in that case, i will pass it as platform data to the driver from mach-
exynos5-dt.c file.
I hope that would be ok.
I don't think so. The mach-exynos5-dt is for all EXYNOS5 SoCs not
platform_data. As I know, the addresses and sizes for buffer passed via
platform data before, so it can be passed via device tree for board(.dtsi)?
not SoC. In addition, it depends on board.
+
+ - samsung,mfc-l : Base address of the second memory bank used by MFC
+ for DMA contiguous memory allocation.
+
+ - samsung,mfc-l-size : Size of the second memory bank.
Same comment as above. And the bindings documentation is usually
included in the same patch that adds device tree support for the
driver.
Ok
diff --git a/arch/arm/boot/dts/exynos4210.dtsi
b/arch/arm/boot/dts/exynos4210.dtsi
index 02891fe..b5ee43d 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -56,6 +56,16 @@
interrupts = 0 43 0;
};
+ mfc {
+ compatible = samsung,s5p-mfc;
Maybe
+ compatible = samsung,mfc-v5; ?
+ reg = 0x1340 0x1;
+ interrupts = 0 94 0;
+ samsung,mfc-r = 0x4300;
+ samsung,mfc-r-size = 8388608;
+ samsung,mfc-l = 0x5100;
+ samsung,mfc-l-size = 8388608;
As I commented, the size depends on each board not SoC. So should be removed
here.
[...]
Thanks.
Best regards,
Kgene.
--
Kukjin Kim kgene@samsung.com, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
--
To unsubscribe from
RE: [PATCH 1/2] ARM: S3C64XX: Update configuration for WM5102 module on Cragganmore
Mark Brown wrote: On Sat, Aug 11, 2012 at 02:08:09PM +0900, Kukjin Kim wrote: BTW, don't you need to enable your Cragganmore board in the defconfig? Well, it doesn't really matter that much to us - it's more a question for whoever uses the defconfig. Yeah, actually SoC defconfig in mainline doesn't cover _real_ requirements for (mass) product. But I think, it's time we need to sort out the defconfigs so that we could use them efficiently on product. BTW, if enabling board in defconfig, at least, unexpected build breakages could be detected by testing defconfig before merge for mainline... Thanks. Best regards, Kgene. -- Kukjin Kim kgene@samsung.com, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd. -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH V2 0/5] arm: samsung: Move FIMD headers to include/video/
Florian Tobias Schandinat wrote: On 08/01/2012 02:28 AM, Kukjin Kim wrote: Leela Krishna Amudala wrote: This patchset moves the contents of regs-fb-v4.h and regs-fb.h from arch side to include/video/samsung_fimd.h This patchset is created and rebased against master branch of torvalds tree. Tested on smdk5250 board, build tested for other boards. (Cc'ed Florian Tobias Schandinat) Yeah, since it's merge window, this series could be created against on mainline. And IMO, would be helpful to us if this series could be sent to upstream via samsung tree after reviewing, because this touches too many files in samsung tree and just adds include/video/samsung_fimd.h. But I'm not sure the added inclusion will be used in other file of drivers/video. If so, I can provide some topic branch can be merged into Florian's tree. Florian, how about? Using a topic branch to merge it in both trees sounds like a good plan to me. Florian, Please pull following topic branch we talked. I already merged it into my -next. git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git v3.7-for-florian Note, I applied Leela's V4 patches not this V2 series. If any problems, please kindly let me know. Thanks. Best regards, Kgene. -- Kukjin Kim kgene@samsung.com, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd. The following changes since commit 0d7614f09c1ebdbaa1599a5aba7593f147bf96ee: Linux 3.6-rc1 (2012-08-02 16:38:10 -0700) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git v3.7-for-florian Leela Krishna Amudala (2): include/video: move fimd register headers from platform to include/video include/video: Add register offsets for FIMD version 8 arch/arm/mach-exynos/mach-nuri.c |2 +- arch/arm/mach-exynos/mach-origen.c |2 +- arch/arm/mach-exynos/mach-smdk4x12.c |2 +- arch/arm/mach-exynos/mach-smdkv310.c |2 +- arch/arm/mach-exynos/mach-universal_c210.c |2 +- arch/arm/mach-exynos/setup-fimd0.c |2 +- arch/arm/mach-s3c24xx/mach-smdk2416.c |2 +- arch/arm/mach-s3c64xx/mach-anw6410.c |2 +- arch/arm/mach-s3c64xx/mach-crag6410.c |2 +- arch/arm/mach-s3c64xx/mach-hmt.c |2 +- arch/arm/mach-s3c64xx/mach-mini6410.c |2 +- arch/arm/mach-s3c64xx/mach-ncp.c |2 +- arch/arm/mach-s3c64xx/mach-real6410.c |2 +- arch/arm/mach-s3c64xx/mach-smartq5.c |2 +- arch/arm/mach-s3c64xx/mach-smartq7.c |2 +- arch/arm/mach-s3c64xx/mach-smdk6410.c |2 +- arch/arm/mach-s5p64x0/mach-smdk6440.c |2 +- arch/arm/mach-s5p64x0/mach-smdk6450.c |2 +- arch/arm/mach-s5pc100/mach-smdkc100.c |2 +- arch/arm/mach-s5pv210/mach-aquila.c|2 +- arch/arm/mach-s5pv210/mach-goni.c |2 +- arch/arm/mach-s5pv210/mach-smdkv210.c |2 +- arch/arm/plat-samsung/include/plat/regs-fb-v4.h| 159 drivers/gpu/drm/exynos/exynos_drm_fimd.c |2 +- drivers/video/s3c-fb.c |2 +- .../plat/regs-fb.h = include/video/samsung_fimd.h | 152 +-- 26 files changed, 165 insertions(+), 194 deletions(-) delete mode 100644 arch/arm/plat-samsung/include/plat/regs-fb-v4.h rename arch/arm/plat-samsung/include/plat/regs-fb.h = include/video/samsung_fimd.h (73%) -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v3 0/4] pinctrl: add support for samsung pinctrl driver
Changes since v2: - Fixes as suggested by Linus Walleij linus.wall...@linaro.org Changes since v1: - Added support for external gpio and wakeup interrupts for Exynos4. This patch series adds a common pinctrl driver for all Samsung platforms and enables the pinctrl driver support for Exynos4210 based device tree enabled platforms. The scope of this driver is limited to only device tree enabled platforms. The intention of this driver is to replace the existing gpiolib driver and provide pinctrl subsystem interface to configure the pins/mux instead of existing platform callbacks. Note that, the Samsung pinctrl driver is usable only on device tree enabled Samsung platforms. Legacy platforms would still continue to use the older gpiolib driver and hence updates to device drivers to use the pinctrl api should ensure that support for legacy platforms is maintained. The first patch adds a new pinctrl driver for Samsung. It provides interfaces to the pinctrl and gpiolib subsystems. This driver provides a common framework for all Samsung SoC's to enable the pinctrl and gpiolib support. The driver accepts the information about pins, groups and functions from the device tree and the information about gpio banks is supplied using driver data. The second patch adds the driver data required to operate the pinctrl driver on Exynos4210 based platforms. It allows includes support for Exynos4210 specific external gpio and wakeup interrupts which are provides to the Samsung pinctrl driver as extensions. The third patch modifies the existing gpiolib driver to skip the gpio pin registrations if pinctrl driver support is found to be enabled. The fourth patch skips the external wakeup interrupt configuration process in the Exynos4 platform code if the external wakeup interrupt support is provided by the pin-control driver. Thomas Abraham (4): pinctrl: add samsung pinctrl and gpiolib driver pinctrl: add exynos4210 specific extensions for samsung pinctrl driver gpio: exynos4: skip gpiolib registration if pinctrl driver is used ARM: EXYNOS: skip wakeup interrupt setup if pinctrl driver is used .../bindings/pinctrl/samsung-pinctrl.txt | 196 + arch/arm/mach-exynos/common.c | 26 + drivers/gpio/gpio-samsung.c| 21 + drivers/pinctrl/Kconfig|9 + drivers/pinctrl/Makefile |2 + drivers/pinctrl/pinctrl-exynos.c | 560 drivers/pinctrl/pinctrl-exynos.h | 217 + drivers/pinctrl/pinctrl-samsung.c | 888 drivers/pinctrl/pinctrl-samsung.h | 239 ++ 9 files changed, 2158 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt create mode 100644 drivers/pinctrl/pinctrl-exynos.c create mode 100644 drivers/pinctrl/pinctrl-exynos.h create mode 100644 drivers/pinctrl/pinctrl-samsung.c create mode 100644 drivers/pinctrl/pinctrl-samsung.h -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v3 3/4] gpio: exynos4: skip gpiolib registration if pinctrl driver is used
Pinctrl driver, when enabled, registers all the gpio pins and hence the
registration of gpio pins by this driver can be skipped.
Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
Acked-by: Grant Likely grant.lik...@secretlab.ca
Acked-by: Linus Walleij linus.wall...@linaro.org
---
drivers/gpio/gpio-samsung.c | 21 +
1 files changed, 21 insertions(+), 0 deletions(-)
diff --git a/drivers/gpio/gpio-samsung.c b/drivers/gpio/gpio-samsung.c
index ba126cc..41ab7f6 100644
--- a/drivers/gpio/gpio-samsung.c
+++ b/drivers/gpio/gpio-samsung.c
@@ -2734,6 +2734,27 @@ static __init void exynos4_gpiolib_init(void)
int group = 0;
void __iomem *gpx_base;
+#ifdef CONFIG_PINCTRL_SAMSUNG
+ /*
+* This gpio driver includes support for device tree support and
+* there are platforms using it. In order to maintain
+* compatibility with those platforms, and to allow non-dt
+* Exynos4210 platforms to use this gpiolib support, a check
+* is added to find out if there is a active pin-controller
+* driver support available. If it is available, this gpiolib
+* support is ignored and the gpiolib support available in
+* pin-controller driver is used. This is a temporary check and
+* will go away when all of the Exynos4210 platforms have
+* switched to using device tree and the pin-ctrl driver.
+*/
+ struct device_node *pctrl_np;
+ const char *pctrl_compat = samsung,pinctrl-exynos4210;
+ pctrl_np = of_find_compatible_node(NULL, NULL, pctrl_compat);
+ if (pctrl_np)
+ if (of_device_is_available(pctrl_np))
+ return;
+#endif
+
/* gpio part1 */
gpio_base1 = ioremap(EXYNOS4_PA_GPIO1, SZ_4K);
if (gpio_base1 == NULL) {
--
1.6.6.rc2
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[PATCH v3 1/4] pinctrl: add samsung pinctrl and gpiolib driver
Add a new device tree enabled pinctrl and gpiolib driver for Samsung SoC's. This driver provides a common and extensible framework for all Samsung SoC's to interface with the pinctrl and gpiolib subsystems. This driver supports only device tree based instantiation and hence can be used only on those Samsung platforms that have device tree enabled. This driver is split into two parts: the pinctrl interface and the gpiolib interface. The pinctrl interface registers pinctrl devices with the pinctrl subsystem and gpiolib interface registers gpio chips with the gpiolib subsystem. The information about the pins, pin groups, pin functions and gpio chips, which are SoC specific, are parsed from device tree node. Cc: Linus Walleij linus.wall...@linaro.org Cc: Kukjin Kim kgene@samsung.com Signed-off-by: Thomas Abraham thomas.abra...@linaro.org --- .../bindings/pinctrl/samsung-pinctrl.txt | 196 + drivers/pinctrl/Kconfig|5 + drivers/pinctrl/Makefile |1 + drivers/pinctrl/pinctrl-samsung.c | 888 drivers/pinctrl/pinctrl-samsung.h | 239 ++ 5 files changed, 1329 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt create mode 100644 drivers/pinctrl/pinctrl-samsung.c create mode 100644 drivers/pinctrl/pinctrl-samsung.h diff --git a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt new file mode 100644 index 000..000ca20 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt @@ -0,0 +1,196 @@ +Samsung GPIO and Pin Mux/Config controller + +Samsung's ARM based SoC's integrates a GPIO and Pin mux/config hardware +controller. It controls the input/output settings on the available pads/pins +and also provides ability to multiplex and configure the output of various +on-chip controllers onto these pads. + +Required Properties: +- compatible: should be one of the following. + - samsung,pinctrl-exynos4210: for Exynos4210 compatible pin-controller. + - samsung,pinctrl-exynos5250: for Exynos5250 compatible pin-controller. + +- reg: Base address of the pin controller hardware module and length of + the address space it occupies. + +- interrupts: interrupt specifier for the controller. The format and value of + the interrupt specifier depends on the interrupt parent for the controller. + +- Pin mux/config groups as child nodes: The pin mux (selecting pin function + mode) and pin config (pull up/down, driver strength) settings are represented + as child nodes of the pin-controller node. There should be atleast one + child node and there is no limit on the count of these child nodes. + + The child node should contain a list of pin(s) on which a particular pin + function selection or pin configuration (or both) have to applied. This + list of pins is specified using the property name samsung,pins. There + should be atleast one pin specfied for this property and there is no upper + limit on the count of pins that can be specified. The pins are specified + using pin names which are derived from the hardware manual of the SoC. As + an example, the pins in GPA0 bank of the pin controller can be represented + as gpa0-0, gpa0-1, gpa0-2 and so on. The names should be in lower case. + The format of the pin names should be (as per the hardware manual) + [pin bank name]-[pin number within the bank]. + + The pin function selection that should be applied on the pins listed in the + child node is specified using the samsung,pin-function property. The value + of this property that should be applied to each of the pins listed in the + samsung,pins property should be picked from the hardware manual of the SoC + for the specified pin group. This property is optional in the child node if + no specific function selection is desired for the pins listed in the child + node. The value of this property is used as-is to program the pin-controller + function selector register of the pin-bank. + + The child node can also optionally specify one or more of the pin + configuration that should be applied on all the pins listed in the + samsung,pins property of the child node. The following pin configuration + properties are supported. + + - samsung,pin-pud: Pull up/down configuration. + - samsung,pin-drv: Drive strength configuration. + - samsung,pin-pud-pdn: Pull up/down configuration in power down mode. + - samsung,pin-drv-pdn: Drive strength configuration in power down mode. + + The values specified by these config properties should be dervied from the + hardware manual and these values are programmed as-is into the pin + pull up/down and driver strength register of the pin-controller. + + Note: A child should include atleast a pin function selection property or + pin configuration property (one or more) or both.
[PATCH v3 4/4] ARM: EXYNOS: skip wakeup interrupt setup if pinctrl driver is used
Pinctrl driver includes support for configuring the external wakeup
interrupts. On exynos platforms that use pinctrl driver, the setup
of wakeup interrupts in the exynos platform code can be skipped.
Cc: Kukjin Kim kgene@samsung.com
Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
---
arch/arm/mach-exynos/common.c | 26 ++
1 files changed, 26 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 4eb39cd..715b690 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -980,6 +980,32 @@ static int __init exynos_init_irq_eint(void)
{
int irq;
+#ifdef CONFIG_PINCTRL_SAMSUNG
+ /*
+* The Samsung pinctrl driver provides an integrated gpio/pinmux/pinconf
+* functionality along with support for external gpio and wakeup
+* interrupts. If the samsung pinctrl driver is enabled and includes
+* the wakeup interrupt support, then the setting up external wakeup
+* interrupts here can be skipped. This check here is temporary to
+* allow exynos4 platforms that do not use Samsung pinctrl driver to
+* co-exist with platforms that do. When all of the Samsung Exynos4
+* platforms switch over to using the pinctrl driver, the wakeup
+* interrupt support code here can be completely removed.
+*/
+ struct device_node *pctrl_np, *wkup_np;
+ const char *pctrl_compat = samsung,pinctrl-exynos4210;
+ const char *wkup_compat = samsung,exynos4210-wakeup-eint;
+
+ for_each_compatible_node(pctrl_np, NULL, pctrl_compat) {
+ if (of_device_is_available(pctrl_np)) {
+ wkup_np = of_find_compatible_node(pctrl_np, NULL,
+ wkup_compat);
+ if (wkup_np)
+ return -ENODEV;
+ }
+ }
+#endif
+
if (soc_is_exynos5250())
exynos_eint_base = ioremap(EXYNOS5_PA_GPIO1, SZ_4K);
else
--
1.6.6.rc2
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[PATCH v3 2/4] pinctrl: add exynos4210 specific extensions for samsung pinctrl driver
Add information about the Exynos4210 pin banks and driver data which is
used by the Samsung pinctrl driver. In addition to this, the support for
external gpio and wakeup interrupt support is included and hooked up with
the Samsung pinctrl driver.
Cc: Linus Walleij linus.wall...@linaro.org
Cc: Kukjin Kim kgene@samsung.com
Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
---
drivers/pinctrl/Kconfig |4 +
drivers/pinctrl/Makefile |1 +
drivers/pinctrl/pinctrl-exynos.c | 560 ++
drivers/pinctrl/pinctrl-exynos.h | 217 +++
4 files changed, 782 insertions(+), 0 deletions(-)
create mode 100644 drivers/pinctrl/pinctrl-exynos.c
create mode 100644 drivers/pinctrl/pinctrl-exynos.h
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index b4503cd..bcaf274 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -166,6 +166,10 @@ config PINCTRL_SAMSUNG
select PINMUX
select PINCONF
+config PINCTRL_EXYNOS4
+ bool Pinctrl driver data for Exynos4 SoC
+ select PINCTRL_SAMSUNG
+
source drivers/pinctrl/spear/Kconfig
endmenu
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index 7155301..9665411 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -33,5 +33,6 @@ obj-$(CONFIG_PINCTRL_TEGRA30) += pinctrl-tegra30.o
obj-$(CONFIG_PINCTRL_U300) += pinctrl-u300.o
obj-$(CONFIG_PINCTRL_COH901) += pinctrl-coh901.o
obj-$(CONFIG_PINCTRL_SAMSUNG) += pinctrl-samsung.o
+obj-$(CONFIG_PINCTRL_EXYNOS4) += pinctrl-exynos.o
obj-$(CONFIG_PLAT_SPEAR) += spear/
diff --git a/drivers/pinctrl/pinctrl-exynos.c b/drivers/pinctrl/pinctrl-exynos.c
new file mode 100644
index 000..447818d
--- /dev/null
+++ b/drivers/pinctrl/pinctrl-exynos.c
@@ -0,0 +1,560 @@
+/*
+ * Exynos specific support for Samsung pinctrl/gpiolib driver with eint
support.
+ *
+ * Copyright (c) 2012 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ * Copyright (c) 2012 Linaro Ltd
+ * http://www.linaro.org
+ *
+ * Author: Thomas Abraham thomas...@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This file contains the Samsung Exynos specific information required by the
+ * the Samsung pinctrl/gpiolib driver. It also includes the implementation of
+ * external gpio and wakeup interrupt support.
+ */
+
+#include linux/module.h
+#include linux/device.h
+#include linux/interrupt.h
+#include linux/irqdomain.h
+#include linux/irq.h
+#include linux/of_irq.h
+#include linux/io.h
+#include linux/slab.h
+#include linux/err.h
+
+#include asm/mach/irq.h
+
+#include pinctrl-samsung.h
+#include pinctrl-exynos.h
+
+/* list of external wakeup controllers supported */
+static const struct of_device_id exynos_wkup_irq_ids[] = {
+ { .compatible = samsung,exynos4210-wakeup-eint, },
+};
+
+static void exynos_gpio_irq_unmask(struct irq_data *irqd)
+{
+ struct samsung_pinctrl_drv_data *d = irqd-domain-host_data;
+ struct exynos_geint_data *edata = irq_data_get_irq_handler_data(irqd);
+ unsigned long reg_mask = d-ctrl-geint_mask + edata-eint_offset;
+ unsigned long mask;
+
+ mask = readl(d-virt_base + reg_mask);
+ mask = ~(1 edata-pin);
+ writel(mask, d-virt_base + reg_mask);
+}
+
+static void exynos_gpio_irq_mask(struct irq_data *irqd)
+{
+ struct samsung_pinctrl_drv_data *d = irqd-domain-host_data;
+ struct exynos_geint_data *edata = irq_data_get_irq_handler_data(irqd);
+ unsigned long reg_mask = d-ctrl-geint_mask + edata-eint_offset;
+ unsigned long mask;
+
+ mask = readl(d-virt_base + reg_mask);
+ mask |= ~(1 edata-pin);
+ writel(mask, d-virt_base + reg_mask);
+}
+
+static void exynos_gpio_irq_ack(struct irq_data *irqd)
+{
+ struct samsung_pinctrl_drv_data *d = irqd-domain-host_data;
+ struct exynos_geint_data *edata = irq_data_get_irq_handler_data(irqd);
+ unsigned long reg_pend = d-ctrl-geint_pend + edata-eint_offset;
+
+ writel(1 edata-pin, d-virt_base + reg_pend);
+}
+
+static int exynos_gpio_irq_set_type(struct irq_data *irqd, unsigned int type)
+{
+ struct samsung_pinctrl_drv_data *d = irqd-domain-host_data;
+ struct samsung_pin_ctrl *ctrl = d-ctrl;
+ struct exynos_geint_data *edata = irq_data_get_irq_handler_data(irqd);
+ unsigned int shift = EXYNOS_EINT_CON_LEN * edata-pin;
+ unsigned int con, trig_type;
+ unsigned long reg_con = ctrl-geint_con + edata-eint_offset;
+
+ switch (type) {
+ case IRQ_TYPE_EDGE_RISING:
+ trig_type = EXYNOS_EINT_EDGE_RISING;
+ break;
+ case IRQ_TYPE_EDGE_FALLING:
+ trig_type = EXYNOS_EINT_EDGE_FALLING;
[GIT PULL] Samsung fixes for v3.6
Hi Arnd, Olof, Here are Samsung fixes for v3.6 For HDMI, already HDMI support for EXYNOS in mainline kernel is broken because its configuration moved to platform data but regarding platform data didn't support yet. And others are for fix warnings. If any problems, please kindly let me know. Thanks. Best regards, Kgene. -- Kukjin Kim kgene@samsung.com, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd. The following changes since commit 0d7614f09c1ebdbaa1599a5aba7593f147bf96ee: Linux 3.6-rc1 (2012-08-02 16:38:10 -0700) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git v3.6-samsung-fixes-1 Heiko Stuebner (2): ARM: S3C24XX: Add missing DMACH_DT_PROP ARM: S3C24XX: Fix s3c2410_dma_enqueue parameters Sachin Kamat (3): ARM: Samsung: Make uart_save static in pm.c file ARM: SAMSUNG: Set HDMI platform data for Exynos4x12 SoCs ARM: EXYNOS: Set HDMI platform data in SMDKV310 Tushar Behera (2): ARM: SAMSUNG: Add API to set platform data for s5p-tv driver ARM: EXYNOS: Set HDMI platform data in Origen board arch/arm/mach-exynos/mach-origen.c|7 +++ arch/arm/mach-exynos/mach-smdkv310.c |7 +++ arch/arm/mach-s3c24xx/include/mach/dma.h |3 ++- arch/arm/plat-s3c24xx/dma.c |2 +- arch/arm/plat-samsung/devs.c | 29 - arch/arm/plat-samsung/include/plat/hdmi.h | 16 arch/arm/plat-samsung/pm.c|2 +- 7 files changed, 62 insertions(+), 4 deletions(-) create mode 100644 arch/arm/plat-samsung/include/plat/hdmi.h -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 0/2] ARM: Exynos4-DT: Enable pinctrl driver support
This patch series enables support for pin controller driver for Exynos4210 SoC based device tree enabled platforms. The first patch in this series adds the pin group nodes for each of the three pin controller instances, but it is not a exhaustive list of all possible pin group nodes. As the coverage of pinctrl driver is extended device drivers used on Exynos4210 platforms, additional pin group nodes can be added as required. Thomas Abraham (2): ARM: dts: Add pinctrl node entries for Samsung Exynos4210 SoC ARM: EXYNOS: Enable pinctrl driver support for Exynos4 device tree enabled platform arch/arm/boot/dts/exynos4210-pinctrl.dtsi | 457 + arch/arm/boot/dts/exynos4210.dtsi | 37 +++ arch/arm/mach-exynos/Kconfig |2 + 3 files changed, 496 insertions(+), 0 deletions(-) create mode 100644 arch/arm/boot/dts/exynos4210-pinctrl.dtsi -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 1/2] ARM: dts: Add pinctrl node entries for Samsung Exynos4210 SoC
Add pinctrl driver nodes for the three instances of pin controllers
in Samsung Exynos4210 SoC and add the pin group nodes available in the
each of those three instances.
Cc: Kukjin Kim kgene@samsung.com
Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
---
arch/arm/boot/dts/exynos4210-pinctrl.dtsi | 457 +
arch/arm/boot/dts/exynos4210.dtsi | 37 +++
2 files changed, 494 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/boot/dts/exynos4210-pinctrl.dtsi
diff --git a/arch/arm/boot/dts/exynos4210-pinctrl.dtsi
b/arch/arm/boot/dts/exynos4210-pinctrl.dtsi
new file mode 100644
index 000..b12cf27
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4210-pinctrl.dtsi
@@ -0,0 +1,457 @@
+/*
+ * Samsung's Exynos4210 SoC pin-mux and pin-config device tree source
+ *
+ * Copyright (c) 2011-2012 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ * Copyright (c) 2011-2012 Linaro Ltd.
+ * www.linaro.org
+ *
+ * Samsung's Exynos4210 SoC pin-mux and pin-config optiosn are listed as device
+ * tree nodes are listed in this file.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/ {
+ pinctrl@1140 {
+ uart0_data: uart0-data {
+ samsung,pins = gpa0-0, gpa0-1;
+ samsung,pin-function = 0x2;
+ samsung,pin-pud = 0;
+ samsung,pin-drv = 0;
+ };
+
+ uart0_fctl: uart0-fctl {
+ samsung,pins = gpa0-2, gpa0-3;
+ samsung,pin-function = 2;
+ samsung,pin-pud = 0;
+ samsung,pin-drv = 0;
+ };
+
+ uart1_data: uart1-data {
+ samsung,pins = gpa0-4, gpa0-5;
+ samsung,pin-function = 2;
+ samsung,pin-pud = 0;
+ samsung,pin-drv = 0;
+ };
+
+ uart1_fctl: uart1-fctl {
+ samsung,pins = gpa0-6, gpa0-7;
+ samsung,pin-function = 2;
+ samsung,pin-pud = 0;
+ samsung,pin-drv = 0;
+ };
+
+ i2c2_bus: i2c2-bus {
+ samsung,pins = gpa0-6, gpa0-7;
+ samsung,pin-function = 3;
+ samsung,pin-pud = 3;
+ samsung,pin-drv = 0;
+ };
+
+ uart2_data: uart2-data {
+ samsung,pins = gpa1-0, gpa1-1;
+ samsung,pin-function = 2;
+ samsung,pin-pud = 0;
+ samsung,pin-drv = 0;
+ };
+
+ uart2_fctl: uart2-fctl {
+ samsung,pins = gpa1-2, gpa1-3;
+ samsung,pin-function = 2;
+ samsung,pin-pud = 0;
+ samsung,pin-drv = 0;
+ };
+
+ uart_audio_a: uart-audio-a {
+ samsung,pins = gpa1-0, gpa1-1;
+ samsung,pin-function = 4;
+ samsung,pin-pud = 0;
+ samsung,pin-drv = 0;
+ };
+
+ i2c3_bus: i2c3-bus {
+ samsung,pins = gpa1-2, gpa1-3;
+ samsung,pin-function = 3;
+ samsung,pin-pud = 3;
+ samsung,pin-drv = 0;
+ };
+
+ uart3_data: uart3-data {
+ samsung,pins = gpa1-4, gpa1-5;
+ samsung,pin-function = 2;
+ samsung,pin-pud = 0;
+ samsung,pin-drv = 0;
+ };
+
+ uart_audio_b: uart-audio-b {
+ samsung,pins = gpa1-4, gpa1-5;
+ samsung,pin-function = 4;
+ samsung,pin-pud = 0;
+ samsung,pin-drv = 0;
+ };
+
+ spi0_bus: spi0-bus {
+ samsung,pins = gpb-0, gpb-2, gpb-3;
+ samsung,pin-function = 2;
+ samsung,pin-pud = 3;
+ samsung,pin-drv = 0;
+ };
+
+ i2c4_bus: i2c4-bus {
+ samsung,pins = gpb-2, gpb-3;
+ samsung,pin-function = 3;
+ samsung,pin-pud = 3;
+ samsung,pin-drv = 0;
+ };
+
+ spi1_bus: spi1-bus {
+ samsung,pins = gpb-4, gpb-6, gpb-7;
+ samsung,pin-function = 2;
+ samsung,pin-pud = 3;
+ samsung,pin-drv = 0;
+ };
+
+ i2c5_bus: i2c5-bus {
+
[PATCH v2 2/2] ARM: EXYNOS: Enable pinctrl driver support for Exynos4 device tree enabled platform
This enables support for Samsung and Exynos4 pinctrl driver for device tree enabled Exynos4 platforms. Cc: Kukjin Kim kgene@samsung.com Signed-off-by: Thomas Abraham thomas.abra...@linaro.org --- arch/arm/mach-exynos/Kconfig |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index b5b4c8c..195b50e 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig @@ -405,6 +405,8 @@ config MACH_EXYNOS4_DT select USE_OF select ARM_AMBA select HAVE_SAMSUNG_KEYPAD if INPUT_KEYBOARD + select PINCTRL + select PINCTRL_EXYNOS4 help Machine support for Samsung Exynos4 machine with device tree enabled. Select this if a fdt blob is available for the Exynos4 SoC based board. -- 1.6.6.rc2 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] spi/s3c64xx: Drop extra calls to spi_master_get in suspend/remove functions
On Thu, Aug 23, 2012 at 02:40:45PM +0900, Kukjin Kim wrote:
Guenter Roeck wrote:
Suspend and resume functions call spi_master_get() without matching
spi_master_put(). The extra references are unnecessary and cause
subsequent
module unload attempts to fail. Drop the calls.
Signed-off-by: Guenter Roeck li...@roeck-us.net
Acked-by: Kukjin Kim kgene@samsung.com
(Cc'ed Mark Brown who is handling spi now)
Guenter, maybe you need to re-send this patch to Mark so that he can apply
;-)
Guess you are right - and I did copy Mark on my later patches. Mark, I just
bounced the patch to you, so you should have it now.
Thanks,
Guenter
Thanks.
Best regards,
Kgene.
--
Kukjin Kim kgene@samsung.com, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
---
drivers/spi/spi-s3c64xx.c |8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
index 646a765..d7a87df 100644
--- a/drivers/spi/spi-s3c64xx.c
+++ b/drivers/spi/spi-s3c64xx.c
@@ -1409,7 +1409,7 @@ static int s3c64xx_spi_remove(struct platform_device
*pdev)
#ifdef CONFIG_PM
static int s3c64xx_spi_suspend(struct device *dev)
{
- struct spi_master *master = spi_master_get(dev_get_drvdata(dev));
+ struct spi_master *master = dev_get_drvdata(dev);
struct s3c64xx_spi_driver_data *sdd =
spi_master_get_devdata(master);
spi_master_suspend(master);
@@ -1428,7 +1428,7 @@ static int s3c64xx_spi_suspend(struct device *dev)
static int s3c64xx_spi_resume(struct device *dev)
{
- struct spi_master *master = spi_master_get(dev_get_drvdata(dev));
+ struct spi_master *master = dev_get_drvdata(dev);
struct s3c64xx_spi_driver_data *sdd =
spi_master_get_devdata(master);
struct s3c64xx_spi_info *sci = sdd-cntrlr_info;
@@ -1452,7 +1452,7 @@ static int s3c64xx_spi_resume(struct device *dev)
#ifdef CONFIG_PM_RUNTIME
static int s3c64xx_spi_runtime_suspend(struct device *dev)
{
- struct spi_master *master = spi_master_get(dev_get_drvdata(dev));
+ struct spi_master *master = dev_get_drvdata(dev);
struct s3c64xx_spi_driver_data *sdd =
spi_master_get_devdata(master);
clk_disable(sdd-clk);
@@ -1463,7 +1463,7 @@ static int s3c64xx_spi_runtime_suspend(struct device
*dev)
static int s3c64xx_spi_runtime_resume(struct device *dev)
{
- struct spi_master *master = spi_master_get(dev_get_drvdata(dev));
+ struct spi_master *master = dev_get_drvdata(dev);
struct s3c64xx_spi_driver_data *sdd =
spi_master_get_devdata(master);
clk_enable(sdd-src_clk);
--
1.7.9.7
--
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Re: [GIT PULL] Samsung fixes for v3.6
On Thursday 23 August 2012, Kukjin Kim wrote: For HDMI, already HDMI support for EXYNOS in mainline kernel is broken because its configuration moved to platform data but regarding platform data didn't support yet. And others are for fix warnings. Pulled into fixes branch. Thanks, Arnd -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/2] ARM: S3C64XX: Update configuration for WM5102 module on Cragganmore
On Thu, Aug 23, 2012 at 06:45:19PM +0900, Kukjin Kim wrote: Yeah, actually SoC defconfig in mainline doesn't cover _real_ requirements for (mass) product. But I think, it's time we need to sort out the defconfigs so that we could use them efficiently on product. BTW, if enabling board in defconfig, at least, unexpected build breakages could be detected by testing defconfig before merge for mainline... Right, sure. I guess the main thing I'm saying here is that I don't mind what happens here, it's certainly no problem for me turn them on in the build if that's what people wants. signature.asc Description: Digital signature
[PATCH v5] mmc: sdhci-s3c: Add device tree support
Add device tree based discovery support for Samsung's sdhci controller
Cc: Ben Dooks ben-li...@fluff.org
Cc: Kukjin Kim kgene@samsung.com
Cc: Chris Ball c...@laptop.org
Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
---
Changes since v4:
Adapted to new mmc core card detection bindings as specfied in the patch:
[PATCH] mmc: dt: Add card-detection properties to core binding
and extends it samsung,cd-pinmux-gpio property as suggested by
Mitch Bradley w...@firmworks.com
Changes since v3:
The patch series that adds device tree support for Samsung sdhci controller
had six patches in total, of which, the first five patches have been accepted.
The sixth patch in the series was dropped since it was using custom Samsung
properties for descrbing the bus-width and card-detect gpio, but had otherwise
addressed all the comments.
This patch reworks the sixth patch in v3 of the sdhci device tree support
patch series. The only change in this patch from the v3 version is the use of
generic mmc bindings for descrbing the bus-width and card-detect gpio.
.../devicetree/bindings/mmc/samsung-sdhci.txt | 53 +++
drivers/mmc/host/sdhci-s3c.c | 162 +++-
2 files changed, 209 insertions(+), 6 deletions(-)
create mode 100644 Documentation/devicetree/bindings/mmc/samsung-sdhci.txt
diff --git a/Documentation/devicetree/bindings/mmc/samsung-sdhci.txt
b/Documentation/devicetree/bindings/mmc/samsung-sdhci.txt
new file mode 100644
index 000..361c2ee
--- /dev/null
+++ b/Documentation/devicetree/bindings/mmc/samsung-sdhci.txt
@@ -0,0 +1,53 @@
+* Samsung's SDHCI Controller device tree bindings
+
+Samsung's SDHCI controller is used as a connectivity interface with external
+MMC, SD and eMMC storage mediums. This file documents differences between the
+core mmc properties described by mmc.txt and the properties used by the
+Samsung implmentation of the SDHCI controller.
+
+Note: The mmc core bindings documentation states that if none of the core
+card-detect bindings are used, then the standard sdhci card detect mechanism
+is used. The Samsung's SDHCI controller bindings extends this as listed below.
+
+[A] The property samsung,cd-pinmux-gpio can be used as stated in the
+Optional Board Specific Properties section below.
+
+[B] If core card-detect bindings and samsung,cd-pinmux-gpio property
+is not specified, it is assumed that there is no card detection
+mechanism used.
+
+Required SoC Specific Properties:
+- compatible: should be one of the following
+ - samsung,s3c6410-sdhci: For controllers compatible with s3c6410 sdhci
+controller.
+ - samsung,exynos4210-sdhci: For controllers compatible with Exynos4 sdhci
+controller.
+
+Required Board Specific Properties:
+- gpios: Should specify the gpios used for clock, command and data lines. The
+ gpio specifier format depends on the gpio controller.
+
+Optional Board Specific Properties:
+- samsung,cd-pinmux-gpio: Specifies the card detect line that is routed
+ through a pinmux to the card-detect pin of the card slot. This property
+ should be used only if none of the mmc core card-detect properties are
+ used.
+
+Example:
+ sdhci@1253 {
+ compatible = samsung,exynos4210-sdhci;
+ reg = 0x1253 0x100;
+ interrupts = 0 75 0;
+ bus-width = 4;
+ cd-gpios = gpk2 2 2 3 3;
+ gpios = gpk2 0 2 0 3, /* clock line */
+ gpk2 1 2 0 3, /* command line */
+ gpk2 3 2 3 3, /* data line 0 */
+ gpk2 4 2 3 3, /* data line 1 */
+ gpk2 5 2 3 3, /* data line 2 */
+ gpk2 6 2 3 3; /* data line 3 */
+ };
+
+ Note: This example shows both SoC specific and board specific properties
+ in a single device node. The properties can be actually be seperated
+ into SoC specific node and board specific node.
diff --git a/drivers/mmc/host/sdhci-s3c.c b/drivers/mmc/host/sdhci-s3c.c
index a50c205..445910e 100644
--- a/drivers/mmc/host/sdhci-s3c.c
+++ b/drivers/mmc/host/sdhci-s3c.c
@@ -34,6 +34,9 @@
#define MAX_BUS_CLK(4)
+/* Number of gpio's used is max data bus width + command and clock lines */
+#define NUM_GPIOS(x) (x + 2)
+
/**
* struct sdhci_s3c - S3C SDHCI instance
* @host: The SDHCI host created
@@ -41,6 +44,7 @@
* @ioarea: The resource created when we claimed the IO area.
* @pdata: The platform data for this controller.
* @cur_clk: The index of the current bus clock.
+ * @gpios: List of gpio numbers parsed from device tree.
* @clk_io: The clock for the internal bus interface.
* @clk_bus: The clocks that are available for the SD/MMC bus clock.
*/
@@ -52,6 +56,7 @@ struct sdhci_s3c {
unsigned intcur_clk;
int ext_cd_irq;
int ext_cd_gpio;
+ int *gpios;
struct
Re: [PATCH v3 1/4] pinctrl: add samsung pinctrl and gpiolib driver
On 08/23/2012 05:15 AM, Thomas Abraham wrote:
Add a new device tree enabled pinctrl and gpiolib driver for Samsung
SoC's. This driver provides a common and extensible framework for all
Samsung SoC's to interface with the pinctrl and gpiolib subsystems. This
driver supports only device tree based instantiation and hence can be
used only on those Samsung platforms that have device tree enabled.
This driver is split into two parts: the pinctrl interface and the gpiolib
interface. The pinctrl interface registers pinctrl devices with the pinctrl
subsystem and gpiolib interface registers gpio chips with the gpiolib
subsystem. The information about the pins, pin groups, pin functions and
gpio chips, which are SoC specific, are parsed from device tree node.
diff --git a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
BTW, this is a very nicely written and complete/precise binding
document. Well done.
+Samsung GPIO and Pin Mux/Config controller
+
+Samsung's ARM based SoC's integrates a GPIO and Pin mux/config hardware
+controller. It controls the input/output settings on the available pads/pins
+and also provides ability to multiplex and configure the output of various
+on-chip controllers onto these pads.
+
+Required Properties:
+- compatible: should be one of the following.
+ - samsung,pinctrl-exynos4210: for Exynos4210 compatible pin-controller.
+ - samsung,pinctrl-exynos5250: for Exynos5250 compatible pin-controller.
+
+- reg: Base address of the pin controller hardware module and length of
+ the address space it occupies.
+
+- interrupts: interrupt specifier for the controller. The format and value of
+ the interrupt specifier depends on the interrupt parent for the controller.
+
+- Pin mux/config groups as child nodes: The pin mux (selecting pin function
Direct child nodes of the pin-controller, not a second level?
While that's quite legal, it means that if you need a particular client
module to use 4 pins, 2 of which need one samsung,pin-function value and
2 of which need a different pin-function value, then the client device's
pinctrl-0 property has to have two entries.
i.e. a completely hypothetical example roughly based on yours below:
pinctrl_1: pinctrl@1100 {
uart0_rxd: uart0-rxd {
samsung,pins = gpa0-0;
samsung,pin-function = 2;
samsung,pin-pud = 0;
samsung,pin-drv = 0;
};
uart0_txd: uart0-txd {
samsung,pins = gpa0-1;
samsung,pin-function = 1;
samsung,pin-pud = 0;
samsung,pin-drv = 0;
};
};
uart@1380 {
pinctrl-names = default;
pinctrl-0 = uart0_rxd uart0_txd;
};
rather than:
pinctrl_1: pinctrl@1100 {
uart0_opt1: uart0-opt1 {
uart0_rxd: uart0-rxd {
samsung,pins = gpa0-0;
samsung,pin-function = 2;
samsung,pin-pud = 0;
samsung,pin-drv = 0;
};
uart0_txd: uart0-txd {
samsung,pins = gpa0-1;
samsung,pin-function = 1;
samsung,pin-pud = 0;
samsung,pin-drv = 0;
};
};
};
uart@1380 {
pinctrl-names = default;
pinctrl-0 = uart0_opt1;
};
The latter layout simplifies writing the client nodes, since all the
related settings can be grouped together by whoever writes the pinctrl
node, rather than every client author having to work out all the entries
to include in the list.
That all said, the way you've defined the binding is perfectly
legitimate, and I don't have any kind of issue with it; it's just
something you might want to consider.
Irrespective of whether you choose to keep the binding as-is, or change
it, please consider it:
Acked-by: Stephen Warren swar...@wwwdotorg.org
+ The values specified by these config properties should be dervied from the
s/dervied/derived/
+External GPIO and Wakeup Interrupts:
+
+The controller supports two types of external interrupts over gpio. The first
+is the external gpio interrupt and second is the external wakeup interrupts.
+The difference between the two is that the external wakeup interrupts can be
+used as system wakeup events.
+
+A. External GPIO Interrupts: For supporting external gpio interrupts, the
+ properties should be specified in the pin-controller device node.
s/the properties/the following properties/ ?
+Aliases:
+
+All the pin controller nodes
Re: [PATCH v5] mmc: sdhci-s3c: Add device tree support
On 08/24/2012 02:10 AM, Thomas Abraham wrote:
Add device tree based discovery support for Samsung's sdhci controller
Cc: Ben Dooks ben-li...@fluff.org
Cc: Kukjin Kim kgene@samsung.com
Cc: Chris Ball c...@laptop.org
Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
---
Changes since v4:
Adapted to new mmc core card detection bindings as specfied in the patch:
[PATCH] mmc: dt: Add card-detection properties to core binding
and extends it samsung,cd-pinmux-gpio property as suggested by
Mitch Bradley w...@firmworks.com
Changes since v3:
The patch series that adds device tree support for Samsung sdhci controller
had six patches in total, of which, the first five patches have been accepted.
The sixth patch in the series was dropped since it was using custom Samsung
properties for descrbing the bus-width and card-detect gpio, but had otherwise
addressed all the comments.
This patch reworks the sixth patch in v3 of the sdhci device tree support
patch series. The only change in this patch from the v3 version is the use of
generic mmc bindings for descrbing the bus-width and card-detect gpio.
.../devicetree/bindings/mmc/samsung-sdhci.txt | 53 +++
drivers/mmc/host/sdhci-s3c.c | 162
+++-
2 files changed, 209 insertions(+), 6 deletions(-)
create mode 100644 Documentation/devicetree/bindings/mmc/samsung-sdhci.txt
diff --git a/Documentation/devicetree/bindings/mmc/samsung-sdhci.txt
b/Documentation/devicetree/bindings/mmc/samsung-sdhci.txt
new file mode 100644
index 000..361c2ee
--- /dev/null
+++ b/Documentation/devicetree/bindings/mmc/samsung-sdhci.txt
@@ -0,0 +1,53 @@
+* Samsung's SDHCI Controller device tree bindings
+
+Samsung's SDHCI controller is used as a connectivity interface with external
+MMC, SD and eMMC storage mediums. This file documents differences between the
+core mmc properties described by mmc.txt and the properties used by the
+Samsung implmentation of the SDHCI controller.
+
+Note: The mmc core bindings documentation states that if none of the core
+card-detect bindings are used, then the standard sdhci card detect mechanism
+is used. The Samsung's SDHCI controller bindings extends this as listed
below.
+
+[A] The property samsung,cd-pinmux-gpio can be used as stated in the
+Optional Board Specific Properties section below.
+
+[B] If core card-detect bindings and samsung,cd-pinmux-gpio property
+is not specified, it is assumed that there is no card detection
+mechanism used.
+
+Required SoC Specific Properties:
+- compatible: should be one of the following
+ - samsung,s3c6410-sdhci: For controllers compatible with s3c6410 sdhci
+controller.
+ - samsung,exynos4210-sdhci: For controllers compatible with Exynos4 sdhci
+controller.
+
+Required Board Specific Properties:
+- gpios: Should specify the gpios used for clock, command and data lines. The
+ gpio specifier format depends on the gpio controller.
+
+Optional Board Specific Properties:
+- samsung,cd-pinmux-gpio: Specifies the card detect line that is routed
+ through a pinmux to the card-detect pin of the card slot. This property
+ should be used only if none of the mmc core card-detect properties are
+ used.
+
+Example:
+ sdhci@1253 {
+ compatible = samsung,exynos4210-sdhci;
+ reg = 0x1253 0x100;
+ interrupts = 0 75 0;
+ bus-width = 4;
+ cd-gpios = gpk2 2 2 3 3;
+ gpios = gpk2 0 2 0 3, /* clock line */
+ gpk2 1 2 0 3, /* command line */
+ gpk2 3 2 3 3, /* data line 0 */
+ gpk2 4 2 3 3, /* data line 1 */
+ gpk2 5 2 3 3, /* data line 2 */
+ gpk2 6 2 3 3; /* data line 3 */
+ };
+
+ Note: This example shows both SoC specific and board specific properties
+ in a single device node. The properties can be actually be seperated
+ into SoC specific node and board specific node.
diff --git a/drivers/mmc/host/sdhci-s3c.c b/drivers/mmc/host/sdhci-s3c.c
index a50c205..445910e 100644
--- a/drivers/mmc/host/sdhci-s3c.c
+++ b/drivers/mmc/host/sdhci-s3c.c
@@ -34,6 +34,9 @@
#define MAX_BUS_CLK (4)
+/* Number of gpio's used is max data bus width + command and clock lines */
+#define NUM_GPIOS(x) (x + 2)
+
/**
* struct sdhci_s3c - S3C SDHCI instance
* @host: The SDHCI host created
@@ -41,6 +44,7 @@
* @ioarea: The resource created when we claimed the IO area.
* @pdata: The platform data for this controller.
* @cur_clk: The index of the current bus clock.
+ * @gpios: List of gpio numbers parsed from device tree.
* @clk_io: The clock for the internal bus interface.
* @clk_bus: The clocks that are available for the SD/MMC bus clock.
*/
@@ -52,6 +56,7 @@ struct sdhci_s3c {
unsigned intcur_clk;
int
Re: [PATCH v5] mmc: sdhci-s3c: Add device tree support
On 24 August 2012 05:28, Jaehoon Chung jh80.ch...@samsung.com wrote:
On 08/24/2012 02:10 AM, Thomas Abraham wrote:
Add device tree based discovery support for Samsung's sdhci controller
Cc: Ben Dooks ben-li...@fluff.org
Cc: Kukjin Kim kgene@samsung.com
Cc: Chris Ball c...@laptop.org
Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
---
Changes since v4:
Adapted to new mmc core card detection bindings as specfied in the patch:
[PATCH] mmc: dt: Add card-detection properties to core binding
and extends it samsung,cd-pinmux-gpio property as suggested by
Mitch Bradley w...@firmworks.com
Changes since v3:
The patch series that adds device tree support for Samsung sdhci controller
had six patches in total, of which, the first five patches have been
accepted.
The sixth patch in the series was dropped since it was using custom Samsung
properties for descrbing the bus-width and card-detect gpio, but had
otherwise
addressed all the comments.
This patch reworks the sixth patch in v3 of the sdhci device tree support
patch series. The only change in this patch from the v3 version is the use of
generic mmc bindings for descrbing the bus-width and card-detect gpio.
.../devicetree/bindings/mmc/samsung-sdhci.txt | 53 +++
drivers/mmc/host/sdhci-s3c.c | 162
+++-
2 files changed, 209 insertions(+), 6 deletions(-)
create mode 100644 Documentation/devicetree/bindings/mmc/samsung-sdhci.txt
diff --git a/Documentation/devicetree/bindings/mmc/samsung-sdhci.txt
b/Documentation/devicetree/bindings/mmc/samsung-sdhci.txt
new file mode 100644
index 000..361c2ee
--- /dev/null
+++ b/Documentation/devicetree/bindings/mmc/samsung-sdhci.txt
@@ -0,0 +1,53 @@
+* Samsung's SDHCI Controller device tree bindings
+
+Samsung's SDHCI controller is used as a connectivity interface with external
+MMC, SD and eMMC storage mediums. This file documents differences between
the
+core mmc properties described by mmc.txt and the properties used by the
+Samsung implmentation of the SDHCI controller.
+
+Note: The mmc core bindings documentation states that if none of the core
+card-detect bindings are used, then the standard sdhci card detect mechanism
+is used. The Samsung's SDHCI controller bindings extends this as listed
below.
+
+[A] The property samsung,cd-pinmux-gpio can be used as stated in the
+Optional Board Specific Properties section below.
+
+[B] If core card-detect bindings and samsung,cd-pinmux-gpio property
+is not specified, it is assumed that there is no card detection
+mechanism used.
+
+Required SoC Specific Properties:
+- compatible: should be one of the following
+ - samsung,s3c6410-sdhci: For controllers compatible with s3c6410 sdhci
+controller.
+ - samsung,exynos4210-sdhci: For controllers compatible with Exynos4
sdhci
+controller.
+
+Required Board Specific Properties:
+- gpios: Should specify the gpios used for clock, command and data lines.
The
+ gpio specifier format depends on the gpio controller.
+
+Optional Board Specific Properties:
+- samsung,cd-pinmux-gpio: Specifies the card detect line that is routed
+ through a pinmux to the card-detect pin of the card slot. This property
+ should be used only if none of the mmc core card-detect properties are
+ used.
+
+Example:
+ sdhci@1253 {
+ compatible = samsung,exynos4210-sdhci;
+ reg = 0x1253 0x100;
+ interrupts = 0 75 0;
+ bus-width = 4;
+ cd-gpios = gpk2 2 2 3 3;
+ gpios = gpk2 0 2 0 3, /* clock line */
+ gpk2 1 2 0 3, /* command line */
+ gpk2 3 2 3 3, /* data line 0 */
+ gpk2 4 2 3 3, /* data line 1 */
+ gpk2 5 2 3 3, /* data line 2 */
+ gpk2 6 2 3 3; /* data line 3 */
+ };
+
+ Note: This example shows both SoC specific and board specific
properties
+ in a single device node. The properties can be actually be seperated
+ into SoC specific node and board specific node.
diff --git a/drivers/mmc/host/sdhci-s3c.c b/drivers/mmc/host/sdhci-s3c.c
index a50c205..445910e 100644
--- a/drivers/mmc/host/sdhci-s3c.c
+++ b/drivers/mmc/host/sdhci-s3c.c
@@ -34,6 +34,9 @@
#define MAX_BUS_CLK (4)
+/* Number of gpio's used is max data bus width + command and clock lines */
+#define NUM_GPIOS(x) (x + 2)
+
/**
* struct sdhci_s3c - S3C SDHCI instance
* @host: The SDHCI host created
@@ -41,6 +44,7 @@
* @ioarea: The resource created when we claimed the IO area.
* @pdata: The platform data for this controller.
* @cur_clk: The index of the current bus clock.
+ * @gpios: List of gpio numbers parsed from device tree.
* @clk_io: The clock for the internal bus interface.
* @clk_bus: The clocks that are available for the SD/MMC bus clock.
*/
@@ -52,6 +56,7 @@ struct
Re: [PATCH v3 1/4] pinctrl: add samsung pinctrl and gpiolib driver
On 24 August 2012 04:42, Stephen Warren swar...@wwwdotorg.org wrote:
On 08/23/2012 05:15 AM, Thomas Abraham wrote:
Add a new device tree enabled pinctrl and gpiolib driver for Samsung
SoC's. This driver provides a common and extensible framework for all
Samsung SoC's to interface with the pinctrl and gpiolib subsystems. This
driver supports only device tree based instantiation and hence can be
used only on those Samsung platforms that have device tree enabled.
This driver is split into two parts: the pinctrl interface and the gpiolib
interface. The pinctrl interface registers pinctrl devices with the pinctrl
subsystem and gpiolib interface registers gpio chips with the gpiolib
subsystem. The information about the pins, pin groups, pin functions and
gpio chips, which are SoC specific, are parsed from device tree node.
diff --git a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
BTW, this is a very nicely written and complete/precise binding
document. Well done.
Thank you!
+Samsung GPIO and Pin Mux/Config controller
+
+Samsung's ARM based SoC's integrates a GPIO and Pin mux/config hardware
+controller. It controls the input/output settings on the available pads/pins
+and also provides ability to multiplex and configure the output of various
+on-chip controllers onto these pads.
+
+Required Properties:
+- compatible: should be one of the following.
+ - samsung,pinctrl-exynos4210: for Exynos4210 compatible pin-controller.
+ - samsung,pinctrl-exynos5250: for Exynos5250 compatible pin-controller.
+
+- reg: Base address of the pin controller hardware module and length of
+ the address space it occupies.
+
+- interrupts: interrupt specifier for the controller. The format and value
of
+ the interrupt specifier depends on the interrupt parent for the
controller.
+
+- Pin mux/config groups as child nodes: The pin mux (selecting pin function
Direct child nodes of the pin-controller, not a second level?
The child nodes would be direct child nodes.
While that's quite legal, it means that if you need a particular client
module to use 4 pins, 2 of which need one samsung,pin-function value and
2 of which need a different pin-function value, then the client device's
pinctrl-0 property has to have two entries.
i.e. a completely hypothetical example roughly based on yours below:
pinctrl_1: pinctrl@1100 {
uart0_rxd: uart0-rxd {
samsung,pins = gpa0-0;
samsung,pin-function = 2;
samsung,pin-pud = 0;
samsung,pin-drv = 0;
};
uart0_txd: uart0-txd {
samsung,pins = gpa0-1;
samsung,pin-function = 1;
samsung,pin-pud = 0;
samsung,pin-drv = 0;
};
};
uart@1380 {
pinctrl-names = default;
pinctrl-0 = uart0_rxd uart0_txd;
};
rather than:
pinctrl_1: pinctrl@1100 {
uart0_opt1: uart0-opt1 {
uart0_rxd: uart0-rxd {
samsung,pins = gpa0-0;
samsung,pin-function = 2;
samsung,pin-pud = 0;
samsung,pin-drv = 0;
};
uart0_txd: uart0-txd {
samsung,pins = gpa0-1;
samsung,pin-function = 1;
samsung,pin-pud = 0;
samsung,pin-drv = 0;
};
};
};
uart@1380 {
pinctrl-names = default;
pinctrl-0 = uart0_opt1;
};
The latter layout simplifies writing the client nodes, since all the
related settings can be grouped together by whoever writes the pinctrl
node, rather than every client author having to work out all the entries
to include in the list.
That all said, the way you've defined the binding is perfectly
legitimate, and I don't have any kind of issue with it; it's just
something you might want to consider.
Thanks for suggesting this alternate method. I do agree with your
point. But, for now, I would prefer to stabilize this driver without
changing the dt parsing code and make it usable for client nodes. I
will revisit your suggested approach at a later point. I assume for
now that the author's of client nodes know which pin settings to
select.
Irrespective of whether you choose to keep the binding as-is, or change
it, please consider it:
Acked-by: Stephen Warren swar...@wwwdotorg.org
Thanks.
+ The values specified by these config properties should be dervied from the
s/dervied/derived/
Ok.
Re: [PATCH] mmc: dt: Add card-detection properties to core binding.
On Wed, Aug 22, 2012 at 02:05:35PM -0400, Chris Ball wrote: Signed-off-by: Chris Ball c...@laptop.org Acked-by: Shawn Guo shawn@linaro.org Will move sdhci-esdhc-imx driver to this soon. Regards, Shawn --- Documentation/devicetree/bindings/mmc/mmc.txt | 9 +++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/mmc/mmc.txt b/Documentation/devicetree/bindings/mmc/mmc.txt index 8a6811f..8e2e0ba 100644 --- a/Documentation/devicetree/bindings/mmc/mmc.txt +++ b/Documentation/devicetree/bindings/mmc/mmc.txt @@ -9,12 +9,17 @@ Interpreted by the OF core: Required properties: - bus-width: Number of data lines, can be 1, 4, or 8 +Card detection: +If no property below is supplied, standard SDHCI card detect is used. +Only one of the properties in this section should be supplied: + - broken-cd: There is no card detection available; polling must be used. + - cd-gpios: Specify GPIOs for card detection, see gpio binding + - non-removable: non-removable slot (like eMMC); assume always present. + Optional properties: -- cd-gpios: Specify GPIOs for card detection, see gpio binding - wp-gpios: Specify GPIOs for write protection, see gpio binding - cd-inverted: when present, polarity on the cd gpio line is inverted - wp-inverted: when present, polarity on the wp gpio line is inverted -- non-removable: non-removable slot (like eMMC) - max-frequency: maximum operating clock frequency Example: -- Chris Ball c...@laptop.org http://printf.net/ One Laptop Per Child -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
