Re: [RFC] i2c: Providing hooks for i2c multimaster bus arbitration.
Hi, > > At the moment perhaps the strongest argument for why this particular > > arbitration scheme is needed is that's what the EC (embedded > > controller) on the ARM Chromebook uses. There have been several > > arguments in-house about whether this was the most ideal way to > > structure things, but that's what we shipped with. Thus, if we want > > to be able to talk to i2c devices on this bus (contains the keyboard, > > battery, and a bunch of power switches) we need something in the > > system that implements this arbitration scheme. > > > > There was some discussion about using the built-in I2C multi-master > support but no one had had a good experience getting it to work > reliably in a real system so we ended up deciding not to rely on this. So, were there no experiences at all or bad experiences when trying? I am interested in hearing what I2C multi master restrictions might exist in practice. Thanks, Wolfram -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 12/12] clocksource: samsung-time: Add Device Tree support
Hi Tomasz,
[...]
> > > +Required properties:
> > > +- compatible : should be one of following:
> > > +samsung,s3c24xx-pwm-timer - for 16-bit timers present on S3C24xx
> > > +samsung,s3c64xx-pwm-timer - for 32-bit timers present on S3C64xx
> > > and newer +- reg: base address and size of register area
> > > +- interrupts: interrupt list for all five PWM timers.
> >
> > Is this a set of combined interrupts, or one per timer?
>
> It is one per timer, however the node represents a single PWM timer block
> that contains several timers (usually 5).
>
> > Which order are they in?
> >
> > Assuming they're one per timer, in order, how about something like:
> >
> > "- interrupts: one interrupt per timer, starting at timer 0".
>
> Sounds fine to me. I will modify the description in next version.
Great.
> > > +- samsung,source-timer: index of timer to be used as clocksource
> > > +- samsung,event-timer: index of timer to be used as clock event
> >
> > Is there any reason this needs to be specified in the dt?
>
> Yes. On some SoCs selected channels of PWM block can be used as PWM
> outputs and so thsoe cannot be used for system timers. This property makes
> it possible to specify channels used as system timers on particular
> platform (board).
>
> > Can the driver not just select two arbitrary timers from the hardware?
>
> In most cases I could statically choose channel 3 and 4 as it was done
> before my patches on S3C24xx and S3C64xx. I can make those channels
> default if others are not specified in properties.
That would be nice, it would mean we could have some less verbose dts :)
[...]
> > > - timer_base = ioremap_nocache(timer_variant.reg_base, SZ_4K);
> > > - if (!timer_base)
> > > - panic("failed to map timer registers");
> > > + if (!timer_base) {
> > > + timer_base = ioremap_nocache(timer_variant.reg_base, SZ_4K);
> > > + if (!timer_base)
> > > + panic("failed to map timer registers");
> > > + }
> >
> > You map 4K here, but the binding didn't mention that 4K is always the
> > expected size of the reg.
>
> This is a compatibility mapping for legacy (non-DT) platforms that will be
> removed once all platforms get moved to DT.
Sounds reasonable.
[...]
> > > + if (of_property_read_u32(np, "samsung,source-timer", &val))
> > > + panic("no samsung,source-timer property provided");
> > > + if (val > ARRAY_SIZE(timer_variant.irqs))
> > > + panic("samsung,source-timer property out of range");
> >
> > This check doesn't tell you if you actually had an irq in the dt for the
> > timer at that index.
>
> Hmm, this line is probably a bit confusing. I will add a define with
> maximum number of channels and use it here. This is only a check whether
> the index given is not out of range.
Ok.
> > Do you really need to panic here? Can you not just warn?
> >
> > What if a future platform has another timer driver that can at least get
> > the board to boot?
>
> It's rather unlikely that new platforms using samsung-time will show up.
> This clocksource is used only for non-SMP platforms based on S3C and S5P
> SoCs, where it is the only possible supported clocksource.
Ok.
[...]
> > > + if (!of_property_read_u32(np, "samsung,divisor", &val)) {
> > > + if (val > 16 || (1 << (fls(val) - 1)) != val)
> > > + panic("divsor must be 1, 2, 4, 8 or 16");
> > > + timer_variant.divisor = timer_variant.prescale * val;
> >
> > Maybe it's just me, but I find this somewhat difficult to read.
> >
> > How about something like:
> >
> > switch (val) {
> > case 1:
> > case 2:
> > case 4:
> > case 8:
> > case 16:
> > timer_variant.divisor = timer_variant.prescale * val;
> > break;
> > default:
> > warn("no divisor specified");
> > };
>
> It looks better indeed. I will change this part in next version.
Great.
Thanks,
Mark.
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Re: [PATCH V4 0/5] Add generic DMA DT binding support
On Mon, Feb 11, 2013 at 02:08:20PM +0530, Padmavathi Venna wrote: This looks fine, I have only question. The code seems to assume that pl330 dma controller always uses DT. But I dont see that as dependency for pl330. Something tells me withot OF the driver may not build, have you checked it? > This patch set adds support for generic dma device tree bindings for > Samsung platforms and is dependent on the following patches from > Vinod Koul next branch > 1)of: Add generic device tree DMA helpers > 2)dmaengine: add helper function to request a slave DMA channel > > This patch set is made based Mark Brown next branch Is this targetted for ASoC tree, if so why? It would fail to build if applied there -- ~Vinod > > Padmavathi Venna (5): > DMA: PL330: Add new pl330 filter for DT case. > DMA: PL330: Add xlate function > DMA: PL330: Register the DMA controller with the generic DMA helpers > ARM: dts: pl330: Add #dma-cells for generic dma binding support > ARM: SAMSUNG: dma: Remove unnecessary code > > .../devicetree/bindings/dma/arm-pl330.txt | 21 +-- > arch/arm/boot/dts/exynos5250.dtsi | 12 > arch/arm/mach-s3c24xx/include/mach/dma.h |1 - > arch/arm/mach-s3c64xx/include/mach/dma.h |1 - > arch/arm/plat-samsung/dma-ops.c| 10 +--- > arch/arm/plat-samsung/include/plat/dma-ops.h |1 - > arch/arm/plat-samsung/include/plat/dma-pl330.h |1 - > drivers/dma/pl330.c| 64 +++ > 8 files changed, 79 insertions(+), 32 deletions(-) > > -- > 1.7.4.4 > -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] ARM: S3C24XX: plat/common-smdk.h local
The header file plat/common-smdk.h is used only in mach-s3c24xx/,
so this patch moves it into mach-s3c24xx directory.
Signed-off-by: Kukjin Kim
---
arch/arm/mach-s3c24xx/common-smdk.c|3 ++-
arch/arm/{plat-samsung/include/plat => mach-s3c24xx}/common-smdk.h |3 +--
arch/arm/mach-s3c24xx/mach-qt2410.c|2 +-
arch/arm/mach-s3c24xx/mach-smdk2410.c |3 +--
arch/arm/mach-s3c24xx/mach-smdk2413.c |2 +-
arch/arm/mach-s3c24xx/mach-smdk2416.c |2 +-
arch/arm/mach-s3c24xx/mach-smdk2440.c |3 +--
arch/arm/mach-s3c24xx/mach-smdk2443.c |2 +-
8 files changed, 9 insertions(+), 11 deletions(-)
rename arch/arm/{plat-samsung/include/plat => mach-s3c24xx}/common-smdk.h (86%)
diff --git a/arch/arm/mach-s3c24xx/common-smdk.c
b/arch/arm/mach-s3c24xx/common-smdk.c
index 3b2cf6d..40d 100644
--- a/arch/arm/mach-s3c24xx/common-smdk.c
+++ b/arch/arm/mach-s3c24xx/common-smdk.c
@@ -41,11 +41,12 @@
#include
-#include
#include
#include
#include
+#include "common-smdk.h"
+
/* LED devices */
static struct s3c24xx_led_platdata smdk_pdata_led4 = {
diff --git a/arch/arm/plat-samsung/include/plat/common-smdk.h
b/arch/arm/mach-s3c24xx/common-smdk.h
similarity index 86%
rename from arch/arm/plat-samsung/include/plat/common-smdk.h
rename to arch/arm/mach-s3c24xx/common-smdk.h
index ba028f1..98f733e 100644
--- a/arch/arm/plat-samsung/include/plat/common-smdk.h
+++ b/arch/arm/mach-s3c24xx/common-smdk.h
@@ -1,5 +1,4 @@
-/* linux/arch/arm/plat-samsung/include/plat/common-smdk.h
- *
+/*
* Copyright (c) 2006 Simtec Electronics
* Ben Dooks
*
diff --git a/arch/arm/mach-s3c24xx/mach-qt2410.c
b/arch/arm/mach-s3c24xx/mach-qt2410.c
index 7b6ba13..c4ec809 100644
--- a/arch/arm/mach-s3c24xx/mach-qt2410.c
+++ b/arch/arm/mach-s3c24xx/mach-qt2410.c
@@ -55,13 +55,13 @@
#include
#include
-#include
#include
#include
#include
#include
#include "common.h"
+#include "common-smdk.h"
static struct map_desc qt2410_iodesc[] __initdata = {
{ 0xe000, __phys_to_pfn(S3C2410_CS3+0x0100), SZ_1M, MT_DEVICE }
diff --git a/arch/arm/mach-s3c24xx/mach-smdk2410.c
b/arch/arm/mach-s3c24xx/mach-smdk2410.c
index 82796b9..469ce31 100644
--- a/arch/arm/mach-s3c24xx/mach-smdk2410.c
+++ b/arch/arm/mach-s3c24xx/mach-smdk2410.c
@@ -52,9 +52,8 @@
#include
#include
-#include
-
#include "common.h"
+#include "common-smdk.h"
static struct map_desc smdk2410_iodesc[] __initdata = {
/* nothing here yet */
diff --git a/arch/arm/mach-s3c24xx/mach-smdk2413.c
b/arch/arm/mach-s3c24xx/mach-smdk2413.c
index b9d5703..64e4a9f 100644
--- a/arch/arm/mach-s3c24xx/mach-smdk2413.c
+++ b/arch/arm/mach-s3c24xx/mach-smdk2413.c
@@ -47,7 +47,7 @@
#include
#include
-#include
+#include "common-smdk.h"
static struct map_desc smdk2413_iodesc[] __initdata = {
};
diff --git a/arch/arm/mach-s3c24xx/mach-smdk2416.c
b/arch/arm/mach-s3c24xx/mach-smdk2416.c
index 2abb66f..eb3715f 100644
--- a/arch/arm/mach-s3c24xx/mach-smdk2416.c
+++ b/arch/arm/mach-s3c24xx/mach-smdk2416.c
@@ -54,7 +54,7 @@
#include
-#include
+#include "common-smdk.h"
static struct map_desc smdk2416_iodesc[] __initdata = {
/* ISA IO Space map (memory space selected by A24) */
diff --git a/arch/arm/mach-s3c24xx/mach-smdk2440.c
b/arch/arm/mach-s3c24xx/mach-smdk2440.c
index 0bba786..496bd4f 100644
--- a/arch/arm/mach-s3c24xx/mach-smdk2440.c
+++ b/arch/arm/mach-s3c24xx/mach-smdk2440.c
@@ -44,9 +44,8 @@
#include
#include
-#include
-
#include "common.h"
+#include "common-smdk.h"
static struct map_desc smdk2440_iodesc[] __initdata = {
/* ISA IO Space map (memory space selected by A24) */
diff --git a/arch/arm/mach-s3c24xx/mach-smdk2443.c
b/arch/arm/mach-s3c24xx/mach-smdk2443.c
index 8b65a54..9a3997b 100644
--- a/arch/arm/mach-s3c24xx/mach-smdk2443.c
+++ b/arch/arm/mach-s3c24xx/mach-smdk2443.c
@@ -44,7 +44,7 @@
#include
#include
-#include
+#include "common-smdk.h"
static struct map_desc smdk2443_iodesc[] __initdata = {
/* ISA IO Space map (memory space selected by A24) */
--
1.7.10.4
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RE: [PATCH 1/2] i2c: s3c2410: move mach/regs-iic.h into i2c-s3c2410 device driver
Heiko Stübner wrote: > > The register definitions are only used in the driver itself. > This also removes the last dependency on plat/ includes from the > i2c driver. > > Signed-off-by: Heiko Stuebner > --- > arch/arm/mach-s3c24xx/mach-rx1950.c |1 - > arch/arm/plat-samsung/devs.c |1 - > arch/arm/plat-samsung/include/plat/regs-iic.h | 56 > - > drivers/i2c/busses/i2c-s3c2410.c | 41 ++- > 4 files changed, 40 insertions(+), 59 deletions(-) > delete mode 100644 arch/arm/plat-samsung/include/plat/regs-iic.h > > diff --git a/arch/arm/mach-s3c24xx/mach-rx1950.c b/arch/arm/mach- > s3c24xx/mach-rx1950.c > index 799af43..64b52a9 100644 > --- a/arch/arm/mach-s3c24xx/mach-rx1950.c > +++ b/arch/arm/mach-s3c24xx/mach-rx1950.c > @@ -56,7 +56,6 @@ > #include > #include > #include > -#include > #include > #include > > diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c > index e1124d9..6317a9e 100644 > --- a/arch/arm/plat-samsung/devs.c > +++ b/arch/arm/plat-samsung/devs.c > @@ -62,7 +62,6 @@ > #include > #include > #include > -#include > #include > #include > #include > diff --git a/arch/arm/plat-samsung/include/plat/regs-iic.h b/arch/arm/plat- > samsung/include/plat/regs-iic.h > deleted file mode 100644 > index 2f7c17d..000 > --- a/arch/arm/plat-samsung/include/plat/regs-iic.h > +++ /dev/null > @@ -1,56 +0,0 @@ > -/* arch/arm/mach-s3c2410/include/mach/regs-iic.h > - * > - * Copyright (c) 2004 Simtec Electronics > - * http://www.simtec.co.uk/products/SWLINUX/ > - * > - * This program is free software; you can redistribute it and/or modify > - * it under the terms of the GNU General Public License version 2 as > - * published by the Free Software Foundation. > - * > - * S3C2410 I2C Controller > -*/ > - > -#ifndef __ASM_ARCH_REGS_IIC_H > -#define __ASM_ARCH_REGS_IIC_H __FILE__ > - > -/* see s3c2410x user guide, v1.1, section 9 (p447) for more info */ > - > -#define S3C2410_IICREG(x) (x) > - > -#define S3C2410_IICCONS3C2410_IICREG(0x00) > -#define S3C2410_IICSTAT S3C2410_IICREG(0x04) > -#define S3C2410_IICADDS3C2410_IICREG(0x08) > -#define S3C2410_IICDS S3C2410_IICREG(0x0C) > -#define S3C2440_IICLC S3C2410_IICREG(0x10) > - > -#define S3C2410_IICCON_ACKEN (1<<7) > -#define S3C2410_IICCON_TXDIV_16 (0<<6) > -#define S3C2410_IICCON_TXDIV_512 (1<<6) > -#define S3C2410_IICCON_IRQEN (1<<5) > -#define S3C2410_IICCON_IRQPEND (1<<4) > -#define S3C2410_IICCON_SCALE(x) ((x)&15) > -#define S3C2410_IICCON_SCALEMASK (0xf) > - > -#define S3C2410_IICSTAT_MASTER_RX(2<<6) > -#define S3C2410_IICSTAT_MASTER_TX(3<<6) > -#define S3C2410_IICSTAT_SLAVE_RX (0<<6) > -#define S3C2410_IICSTAT_SLAVE_TX (1<<6) > -#define S3C2410_IICSTAT_MODEMASK (3<<6) > - > -#define S3C2410_IICSTAT_START(1<<5) > -#define S3C2410_IICSTAT_BUSBUSY (1<<5) > -#define S3C2410_IICSTAT_TXRXEN (1<<4) > -#define S3C2410_IICSTAT_ARBITR (1<<3) > -#define S3C2410_IICSTAT_ASSLAVE (1<<2) > -#define S3C2410_IICSTAT_ADDR0(1<<1) > -#define S3C2410_IICSTAT_LASTBIT (1<<0) > - > -#define S3C2410_IICLC_SDA_DELAY0 (0 << 0) > -#define S3C2410_IICLC_SDA_DELAY5 (1 << 0) > -#define S3C2410_IICLC_SDA_DELAY10(2 << 0) > -#define S3C2410_IICLC_SDA_DELAY15(3 << 0) > -#define S3C2410_IICLC_SDA_DELAY_MASK (3 << 0) > - > -#define S3C2410_IICLC_FILTER_ON (1<<2) > - > -#endif /* __ASM_ARCH_REGS_IIC_H */ > diff --git a/drivers/i2c/busses/i2c-s3c2410.c b/drivers/i2c/busses/i2c- > s3c2410.c > index a290d08..5cc4f71 100644 > --- a/drivers/i2c/busses/i2c-s3c2410.c > +++ b/drivers/i2c/busses/i2c-s3c2410.c > @@ -42,9 +42,48 @@ > > #include > > -#include > #include > > +/* see s3c2410x user guide, v1.1, section 9 (p447) for more info */ > + > +#define S3C2410_IICREG(x) (x) > + > +#define S3C2410_IICCONS3C2410_IICREG(0x00) > +#define S3C2410_IICSTAT S3C2410_IICREG(0x04) > +#define S3C2410_IICADDS3C2410_IICREG(0x08) > +#define S3C2410_IICDS S3C2410_IICREG(0x0C) > +#define S3C2440_IICLC S3C2410_IICREG(0x10) > + > +#define S3C2410_IICCON_ACKEN (1<<7) > +#define S3C2410_IICCON_TXDIV_16 (0<<6) > +#define S3C2410_IICCON_TXDIV_512 (1<<6) > +#define S3C2410_IICCON_IRQEN (1<<5) > +#define S3C2410_IICCON_IRQPEND (1<<4) > +#define S3C2410_IICCON_SCALE(x) ((x)&15) > +#define S3C2410_IICCON_SCALEMASK (0xf) > + > +#define S3C2410_IICSTAT_MASTER_RX(2<<6) > +#define S3C2410_IICSTAT_MASTER_TX(3<<6) > +#define S3C2410_IICSTAT_SLAVE_RX (0<<6) > +#define S3C2410_IICSTAT_SLAVE_TX (1<<6) > +#define S3C2410_IICSTAT_MODEMASK (3<<6) > + > +#define S3C2410_IICSTAT_START(1<<5) > +#define S3C2410_IICSTAT_BUSBUSY
RE: [PATCH 1/2] i2c: s3c2410: move mach/regs-iic.h into i2c-s3c2410 device driver
Kukjin Kim wrote: > > Heiko Stübner wrote: > > > > The register definitions are only used in the driver itself. > > This also removes the last dependency on plat/ includes from the i2c > > driver. > > > > Signed-off-by: Heiko Stuebner > > --- > > arch/arm/mach-s3c24xx/mach-rx1950.c |1 - > > arch/arm/plat-samsung/devs.c |1 - > > arch/arm/plat-samsung/include/plat/regs-iic.h | 56 > > - > > drivers/i2c/busses/i2c-s3c2410.c | 41 ++- > > 4 files changed, 40 insertions(+), 59 deletions(-) delete mode > > 100644 arch/arm/plat-samsung/include/plat/regs-iic.h > > > > diff --git a/arch/arm/mach-s3c24xx/mach-rx1950.c b/arch/arm/mach- > > s3c24xx/mach-rx1950.c index 799af43..64b52a9 100644 > > --- a/arch/arm/mach-s3c24xx/mach-rx1950.c > > +++ b/arch/arm/mach-s3c24xx/mach-rx1950.c > > @@ -56,7 +56,6 @@ > > #include > > #include > > #include > > -#include > > #include > > #include > > > > diff --git a/arch/arm/plat-samsung/devs.c > > b/arch/arm/plat-samsung/devs.c index e1124d9..6317a9e 100644 > > --- a/arch/arm/plat-samsung/devs.c > > +++ b/arch/arm/plat-samsung/devs.c > > @@ -62,7 +62,6 @@ > > #include > > #include > > #include > > -#include > > #include > > #include > > #include > > diff --git a/arch/arm/plat-samsung/include/plat/regs-iic.h > > b/arch/arm/plat- samsung/include/plat/regs-iic.h deleted file mode > > 100644 index 2f7c17d..000 > > --- a/arch/arm/plat-samsung/include/plat/regs-iic.h > > +++ /dev/null > > @@ -1,56 +0,0 @@ > > -/* arch/arm/mach-s3c2410/include/mach/regs-iic.h > > - * > > - * Copyright (c) 2004 Simtec Electronics > > - * http://www.simtec.co.uk/products/SWLINUX/ > > - * > > - * This program is free software; you can redistribute it and/or > > modify > > - * it under the terms of the GNU General Public License version 2 as > > - * published by the Free Software Foundation. > > - * > > - * S3C2410 I2C Controller > > -*/ > > - > > -#ifndef __ASM_ARCH_REGS_IIC_H > > -#define __ASM_ARCH_REGS_IIC_H __FILE__ > > - > > -/* see s3c2410x user guide, v1.1, section 9 (p447) for more info */ > > - > > -#define S3C2410_IICREG(x) (x) > > - > > -#define S3C2410_IICCONS3C2410_IICREG(0x00) > > -#define S3C2410_IICSTAT S3C2410_IICREG(0x04) > > -#define S3C2410_IICADDS3C2410_IICREG(0x08) > > -#define S3C2410_IICDS S3C2410_IICREG(0x0C) > > -#define S3C2440_IICLCS3C2410_IICREG(0x10) > > - > > -#define S3C2410_IICCON_ACKEN (1<<7) > > -#define S3C2410_IICCON_TXDIV_16(0<<6) > > -#define S3C2410_IICCON_TXDIV_512 (1<<6) > > -#define S3C2410_IICCON_IRQEN (1<<5) > > -#define S3C2410_IICCON_IRQPEND (1<<4) > > -#define S3C2410_IICCON_SCALE(x)((x)&15) > > -#define S3C2410_IICCON_SCALEMASK (0xf) > > - > > -#define S3C2410_IICSTAT_MASTER_RX (2<<6) > > -#define S3C2410_IICSTAT_MASTER_TX (3<<6) > > -#define S3C2410_IICSTAT_SLAVE_RX (0<<6) > > -#define S3C2410_IICSTAT_SLAVE_TX (1<<6) > > -#define S3C2410_IICSTAT_MODEMASK (3<<6) > > - > > -#define S3C2410_IICSTAT_START (1<<5) > > -#define S3C2410_IICSTAT_BUSBUSY(1<<5) > > -#define S3C2410_IICSTAT_TXRXEN (1<<4) > > -#define S3C2410_IICSTAT_ARBITR (1<<3) > > -#define S3C2410_IICSTAT_ASSLAVE(1<<2) > > -#define S3C2410_IICSTAT_ADDR0 (1<<1) > > -#define S3C2410_IICSTAT_LASTBIT(1<<0) > > - > > -#define S3C2410_IICLC_SDA_DELAY0 (0 << 0) > > -#define S3C2410_IICLC_SDA_DELAY5 (1 << 0) > > -#define S3C2410_IICLC_SDA_DELAY10 (2 << 0) > > -#define S3C2410_IICLC_SDA_DELAY15 (3 << 0) > > -#define S3C2410_IICLC_SDA_DELAY_MASK (3 << 0) > > - > > -#define S3C2410_IICLC_FILTER_ON(1<<2) > > - > > -#endif /* __ASM_ARCH_REGS_IIC_H */ > > diff --git a/drivers/i2c/busses/i2c-s3c2410.c > > b/drivers/i2c/busses/i2c- s3c2410.c index a290d08..5cc4f71 100644 > > --- a/drivers/i2c/busses/i2c-s3c2410.c > > +++ b/drivers/i2c/busses/i2c-s3c2410.c > > @@ -42,9 +42,48 @@ > > > > #include > > > > -#include > > #include > > > > +/* see s3c2410x user guide, v1.1, section 9 (p447) for more info */ > > + > > +#define S3C2410_IICREG(x) (x) > > + > > +#define S3C2410_IICCONS3C2410_IICREG(0x00) > > +#define S3C2410_IICSTAT S3C2410_IICREG(0x04) > > +#define S3C2410_IICADDS3C2410_IICREG(0x08) > > +#define S3C2410_IICDS S3C2410_IICREG(0x0C) > > +#define S3C2440_IICLCS3C2410_IICREG(0x10) > > + > > +#define S3C2410_IICCON_ACKEN (1<<7) > > +#define S3C2410_IICCON_TXDIV_16(0<<6) > > +#define S3C2410_IICCON_TXDIV_512 (1<<6) > > +#define S3C2410_IICCON_IRQEN (1<<5) > > +#define S3C2410_IICCON_IRQPEND (1<<4) > > +#define S3C2410_IICCON_SCALE(x)((x)&15) > > +#define S3C2410_IICCON_SCALEMASK (0xf) > > + > > +#define S3C2410_IICSTAT_MASTER_RX (2<<6) > > +#define S3C2410_IICSTAT_MASTER_TX (3<<6) > >
RE: [PATCH] serial: samsung: remove the use of statically remapped controller address
Thomas Abraham wrote:
>
> The address S3C_VA_UART is a statically ioremapped address. The driver
> should not be using this. Instead, the driver should setup a mapping
> during probe.
>
> Cc: Kukjin Kim
Looks good to me:
Acked-by: Kukjin Kim
Greg, if you're ok on this, please pick this up in your tree :-)
Thanks.
- Kukjin
> Signed-off-by: Thomas Abraham
> ---
> drivers/tty/serial/samsung.c |8 ++--
> 1 files changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c
> index e514b3a..d6c4f659 100644
> --- a/drivers/tty/serial/samsung.c
> +++ b/drivers/tty/serial/samsung.c
> @@ -47,7 +47,6 @@
> #include
>
> #include
> -#include
>
> #include
> #include
> @@ -1143,8 +1142,13 @@ static int s3c24xx_serial_init_port(struct
> s3c24xx_uart_port *ourport,
>
> dbg("resource %p (%lx..%lx)\n", res, res->start, res->end);
>
> + port->membase = devm_ioremap(port->dev, res->start,
> resource_size(res));
> + if (!port->membase) {
> + dev_err(port->dev, "failed to remap controller address\n");
> + return -EBUSY;
> + }
> +
> port->mapbase = res->start;
> - port->membase = S3C_VA_UART + (res->start & 0xf);
> ret = platform_get_irq(platdev, 0);
> if (ret < 0)
> port->irq = 0;
> --
> 1.7.5.4
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RE: [PATCH 1/2] ARM: SAMSUNG: Silence empty switch warning in sdhci.h
Sachin Kamat wrote: > > Add 'default' case to silence the following warning: > arch/arm/plat-samsung/include/plat/sdhci.h:356:9: warning: switch with no > cases > > Signed-off-by: Sachin Kamat > --- > arch/arm/plat-samsung/include/plat/sdhci.h |2 ++ > 1 files changed, 2 insertions(+), 0 deletions(-) > > diff --git a/arch/arm/plat-samsung/include/plat/sdhci.h b/arch/arm/plat- > samsung/include/plat/sdhci.h > index 151cc91..9b87f38 100644 > --- a/arch/arm/plat-samsung/include/plat/sdhci.h > +++ b/arch/arm/plat-samsung/include/plat/sdhci.h > @@ -374,6 +374,8 @@ static inline void s3c_sdhci_setname(int id, char > *name) > s3c_device_hsmmc3.name = name; > break; > #endif > + default: > + break; > } > } > > -- > 1.7.4.1 Applied, this and second one. Thanks. - Kukjin -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH] ARM: dts: exynos4x12-pinctrl: Correct pin configuration of SD 4
Tomasz Figa wrote:
>
> On Monday 11 of February 2013 05:21:13 Shirish S wrote:
> > This patch corrects the pin function value of sd4_bus8 from 3
> > to 4.
> > This is verified on origen board for testing eMMC on
> > dw_mci controller.
> >
> > Signed-off-by: Shirish S
> > Signed-off-by: Alim Akhtar
> > ---
> > arch/arm/boot/dts/exynos4x12-pinctrl.dtsi | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi
> > b/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi index 8e6115a..099cec7
> > 100644
> > --- a/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi
> > +++ b/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi
> > @@ -661,7 +661,7 @@
> >
> > sd4_bus8: sd4-bus-width8 {
> > samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-
> 6";
> > - samsung,pin-function = <3>;
> > + samsung,pin-function = <4>;
> > samsung,pin-pud = <4>;
> > samsung,pin-drv = <3>;
> > };
>
> Reviewed-by: Tomasz Figa
>
Applied into next/fixes-samsung for v3.9 because this is not a critical bug
fix.
BTW, I'd preferred to use 'ARM: dts: for exynos4x12-pinctrl' in subject
because if we use the title like "ARM: dts: exynos4x12-pinctrl: ...", the
main description should be moved back and head of subject is a bit long. So
sometimes we cannot understand the title in the e-mail box before
checking/opening the patch. See below.
Shirish S [PATCH] ARM: dts: exynos4x12-pinctrl: Correct pin...
Mon/2/11/2013 ...
Shirish S [PATCH] ARM: dts: Correct pin configuration of SD...
Mon/2/11/2013 ...
Thanks.
- Kukjin
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RE: [PATCH V3 1/2] ARM: EXYNOS: Add AUXDATA for DP controller
Jingoo Han wrote:
>
> Use AUXDATA to set the device names for DP controller instance
> discovered from device tree.
>
> Signed-off-by: Ajay Kumar
> Signed-off-by: Jingoo Han
> ---
> Tested with SMDK5250 board
>
> Changes since v2:
> - rebase on linux-samsung for-next branch
>
> Changes since v1:
> - replace the definition with the value
>
> arch/arm/mach-exynos/mach-exynos5-dt.c |1 +
> 1 files changed, 1 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c b/arch/arm/mach-
> exynos/mach-exynos5-dt.c
> index e99d3d8..00ee732 100644
> --- a/arch/arm/mach-exynos/mach-exynos5-dt.c
> +++ b/arch/arm/mach-exynos/mach-exynos5-dt.c
> @@ -104,6 +104,7 @@ static const struct of_dev_auxdata
> exynos5250_auxdata_lookup[] __initconst = {
> OF_DEV_AUXDATA("samsung,mfc-v6", 0x1100, "s5p-mfc-v6",
> NULL),
> OF_DEV_AUXDATA("samsung,exynos5250-tmu", 0x1006,
> "exynos-tmu", NULL),
> + OF_DEV_AUXDATA("samsung,exynos5-dp", 0x145B, "exynos-
> dp", NULL),
> {},
> };
>
> --
> 1.7.2.5
OK, applied, this series.
Thanks.
- Kukjin
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RE: [PATCH v2 00/10] ARM: S3C24XX: irq rework for S3C2412, S3C2440 and S3C2442
Heiko Stübner wrote: > > This series finishes the irq rework by moving the irqs for s3c2412, s3c2440 > and s3c2442 into the new structure. > > Now the only open point is the different handling of the eint0 to eint3 > interrupts on the s3c2412. On this SoC these interrupts are represented > in both the main register and the eint register and also need to be handled > in both. > > As this should be handlable via the new structure, I'm still investigating > the right way to do it. Therefore the override of the eint0 to eint3 > interrupts will still remain for a bit. > > As I lack the relevant hardware, this series is compile tested only, but as > the used mechanisms are the same as with the s3c2416, there shouldn't be > any complications. > > This series applies on top of the moved s3c24XX.h headers into the > common.h > file in mach-s3c24xx. > > changes since v1: > - included the changes for the s3c2412 > > Heiko Stuebner (10): > ARM: S3C24XX: move s3c244x irq init to common irq code > ARM: S3C24XX: create dedicated irq init functions for s3c2440 and s3c2442 > ARM: S3C24XX: move s3c2440 irqs to common irq code > ARM: S3C24XX: integrate s3c2440 irqs into common init > ARM: S3C24XX: transform s3c2442 irqs into new structure > ARM: S3C24XX: transform s3c2440 irqs into new structure > ARM: S3C24XX: use samsung_sync_wakemask in s3c2412 pm > ARM: S3C24XX: move s3c2412 irq init to common code > ARM: S3C24XX: modify s3c2412 irq init to initialize all irqs > ARM: S3C24XX: transform s3c2412 irqs into new structure > > arch/arm/mach-s3c24xx/Kconfig |1 + > arch/arm/mach-s3c24xx/Makefile |6 +- > arch/arm/mach-s3c24xx/common.h |3 + > arch/arm/mach-s3c24xx/irq-s3c2412.c| 215 --- > arch/arm/mach-s3c24xx/irq-s3c2440.c| 128 -- > arch/arm/mach-s3c24xx/irq-s3c244x.c| 142 --- > arch/arm/mach-s3c24xx/irq.c| 299 > > arch/arm/mach-s3c24xx/mach-anubis.c|2 +- > arch/arm/mach-s3c24xx/mach-at2440evb.c |2 +- > arch/arm/mach-s3c24xx/mach-gta02.c |2 +- > arch/arm/mach-s3c24xx/mach-jive.c |2 +- > arch/arm/mach-s3c24xx/mach-mini2440.c |2 +- > arch/arm/mach-s3c24xx/mach-nexcoder.c |2 +- > arch/arm/mach-s3c24xx/mach-osiris.c|2 +- > arch/arm/mach-s3c24xx/mach-rx1950.c|2 +- > arch/arm/mach-s3c24xx/mach-rx3715.c|7 +- > arch/arm/mach-s3c24xx/mach-smdk2413.c |6 +- > arch/arm/mach-s3c24xx/mach-smdk2440.c |2 +- > arch/arm/mach-s3c24xx/mach-vstms.c |2 +- > arch/arm/mach-s3c24xx/pm-s3c2412.c |8 + > 20 files changed, 328 insertions(+), 507 deletions(-) > delete mode 100644 arch/arm/mach-s3c24xx/irq-s3c2412.c > delete mode 100644 arch/arm/mach-s3c24xx/irq-s3c2440.c > delete mode 100644 arch/arm/mach-s3c24xx/irq-s3c244x.c > > -- > 1.7.2.3 Applied, this whole series and integration 2412 eint handling. Thanks for your time and support. - Kukjin -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH] arm: plat-samsung: check soc ids before l2x0 cache restoration in resume
Inderpal Singh wrote:
>
> Only exynos4 based platforms have l2x0 cache controller. Hence check
> the same before restoring the cache in resume.
>
I think, the code can determine by checking ARM main ID cp15 register
instead of Chip ID. Because if so, we don't need to do something for ahother
EXYNOS4 SoCs next time.
> This is needed for single kernel image.
>
> Signed-off-by: Inderpal Singh
> ---
> arch/arm/mach-exynos/common.c |2 ++
> arch/arm/plat-samsung/include/plat/pm.h |1 +
> arch/arm/plat-samsung/s5p-sleep.S | 28
>
> 3 files changed, 31 insertions(+)
>
> diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-
> exynos/common.c
> index cdaa55f..ab7ca00 100644
> --- a/arch/arm/mach-exynos/common.c
> +++ b/arch/arm/mach-exynos/common.c
> @@ -796,6 +796,8 @@ static int __init exynos4_l2x0_cache_init(void)
> if (soc_is_exynos5250() || soc_is_exynos5440())
> return 0;
>
> + s5p_cpu = samsung_cpu_id & EXYNOS4_CPU_MASK;
> +
> ret = l2x0_of_init(L2_AUX_VAL, L2_AUX_MASK);
> if (!ret) {
> l2x0_regs_phys = virt_to_phys(&l2x0_saved_regs);
> diff --git a/arch/arm/plat-samsung/include/plat/pm.h b/arch/arm/plat-
> samsung/include/plat/pm.h
> index 887a0c9..285c8c8 100644
> --- a/arch/arm/plat-samsung/include/plat/pm.h
> +++ b/arch/arm/plat-samsung/include/plat/pm.h
> @@ -190,3 +190,4 @@ extern void samsung_pm_save_gpios(void);
>
> extern void s3c_pm_save_core(void);
> extern void s3c_pm_restore_core(void);
> +extern unsigned long s5p_cpu;
> diff --git a/arch/arm/plat-samsung/s5p-sleep.S b/arch/arm/plat-
> samsung/s5p-sleep.S
> index bdf6dad..006d35f 100644
> --- a/arch/arm/plat-samsung/s5p-sleep.S
> +++ b/arch/arm/plat-samsung/s5p-sleep.S
> @@ -25,6 +25,15 @@
> #include
> #include
>
> +#define EXYNOS4210_CPU_ID0x4321
> +#define EXYNOS4212_CPU_ID0x4322
> +#define EXYNOS4412_CPU_ID0xE4412200
> +#define EXYNOS4_CPU_MASK 0xFFFE
> +
> +#define EXYNOS4210_CPU (EXYNOS4210_CPU_ID &
> EXYNOS4_CPU_MASK)
> +#define EXYNOS4212_CPU (EXYNOS4212_CPU_ID &
> EXYNOS4_CPU_MASK)
> +#define EXYNOS4412_CPU (EXYNOS4412_CPU_ID &
> EXYNOS4_CPU_MASK)
> +
> /*
> *The following code is located into the .data section. This is to
> *allow l2x0_regs_phys to be accessed with a relative load while we
> @@ -51,6 +60,22 @@
>
> ENTRY(s3c_cpu_resume)
> #ifdef CONFIG_CACHE_L2X0
> + adr r0, s5p_cpu
> + ldr r1, [r0]
> +
> + ldr r0, =EXYNOS4210_CPU
> + cmp r1, r0
> + beq continue
> +
> + ldr r0, =EXYNOS4212_CPU
> + cmp r1, r0
> + beq continue
> +
> + ldr r0, =EXYNOS4412_CPU
> + cmp r1, r0
> + bne resume_l2on
> +
> +continue:
> adr r0, l2x0_regs_phys
> ldr r0, [r0]
> ldr r1, [r0, #L2X0_R_PHY_BASE]
> @@ -77,4 +102,7 @@ ENDPROC(s3c_cpu_resume)
> .globl l2x0_regs_phys
> l2x0_regs_phys:
> .long 0
> + .globl s5p_cpu
> +s5p_cpu:
> + .long 0
> #endif
> --
> 1.7.9.5
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[PATCH] ARM: S3C24XX: remove plat-samsung/irq.h
plat-samsung/irq.h did only contain functions for handling the spread out
subirqs on s3c24xx arches, which are not needed anymore.
Signed-off-by: Heiko Stuebner
---
Sorry for bringing this separate submission, but I just remembered
it this evening.
This applies on top of all the other s3c24xx irq changes and
I think this patch will mark the end of the irq-cleanup for now.
arch/arm/mach-s3c24xx/irq-pm.c |7 ++-
arch/arm/mach-s3c24xx/irq.c |8 +--
arch/arm/plat-samsung/include/plat/irq.h | 116 --
3 files changed, 9 insertions(+), 122 deletions(-)
delete mode 100644 arch/arm/plat-samsung/include/plat/irq.h
diff --git a/arch/arm/mach-s3c24xx/irq-pm.c b/arch/arm/mach-s3c24xx/irq-pm.c
index e119959..b91341e 100644
--- a/arch/arm/mach-s3c24xx/irq-pm.c
+++ b/arch/arm/mach-s3c24xx/irq-pm.c
@@ -16,10 +16,15 @@
#include
#include
#include
+#include
#include
#include
-#include
+#include
+#include
+
+#include
+#include
#include
diff --git a/arch/arm/mach-s3c24xx/irq.c b/arch/arm/mach-s3c24xx/irq.c
index debf606..3f3de74 100644
--- a/arch/arm/mach-s3c24xx/irq.c
+++ b/arch/arm/mach-s3c24xx/irq.c
@@ -34,7 +34,6 @@
#include
#include
#include
-#include
#define S3C_IRQTYPE_NONE 0
#define S3C_IRQTYPE_EINT 1
@@ -175,8 +174,7 @@ static int s3c_irqext_type_set(void __iomem *gpcon_reg,
return 0;
}
-/* FIXME: make static when it's out of plat-samsung/irq.h */
-int s3c_irqext_type(struct irq_data *data, unsigned int type)
+static int s3c_irqext_type(struct irq_data *data, unsigned int type)
{
void __iomem *extint_reg;
void __iomem *gpcon_reg;
@@ -224,7 +222,7 @@ static int s3c_irqext0_type(struct irq_data *data, unsigned
int type)
extint_offset, type);
}
-struct irq_chip s3c_irq_chip = {
+static struct irq_chip s3c_irq_chip = {
.name = "s3c",
.irq_ack= s3c_irq_ack,
.irq_mask = s3c_irq_mask,
@@ -232,7 +230,7 @@ struct irq_chip s3c_irq_chip = {
.irq_set_wake = s3c_irq_wake
};
-struct irq_chip s3c_irq_level_chip = {
+static struct irq_chip s3c_irq_level_chip = {
.name = "s3c-level",
.irq_mask = s3c_irq_mask,
.irq_unmask = s3c_irq_unmask,
diff --git a/arch/arm/plat-samsung/include/plat/irq.h
b/arch/arm/plat-samsung/include/plat/irq.h
deleted file mode 100644
index e21a89b..000
--- a/arch/arm/plat-samsung/include/plat/irq.h
+++ /dev/null
@@ -1,116 +0,0 @@
-/* linux/arch/arm/plat-samsung/include/plat/irq.h
- *
- * Copyright (c) 2004-2005 Simtec Electronics
- * Ben Dooks
- *
- * Header file for S3C24XX CPU IRQ support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include
-
-#include
-#include
-#include
-
-#define irqdbf(x...)
-#define irqdbf2(x...)
-
-#define EXTINT_OFF (IRQ_EINT4 - 4)
-
-/* these are exported for arch/arm/mach-* usage */
-extern struct irq_chip s3c_irq_level_chip;
-extern struct irq_chip s3c_irq_chip;
-
-static inline void s3c_irqsub_mask(unsigned int irqno,
- unsigned int parentbit,
- int subcheck)
-{
- unsigned long mask;
- unsigned long submask;
-
- submask = __raw_readl(S3C2410_INTSUBMSK);
- mask = __raw_readl(S3C2410_INTMSK);
-
- submask |= (1UL << (irqno - IRQ_S3CUART_RX0));
-
- /* check to see if we need to mask the parent IRQ */
-
- if ((submask & subcheck) == subcheck)
- __raw_writel(mask | parentbit, S3C2410_INTMSK);
-
- /* write back masks */
- __raw_writel(submask, S3C2410_INTSUBMSK);
-
-}
-
-static inline void s3c_irqsub_unmask(unsigned int irqno,
-unsigned int parentbit)
-{
- unsigned long mask;
- unsigned long submask;
-
- submask = __raw_readl(S3C2410_INTSUBMSK);
- mask = __raw_readl(S3C2410_INTMSK);
-
- submask &= ~(1UL << (irqno - IRQ_S3CUART_RX0));
- mask &= ~parentbit;
-
- /* write back masks */
- __raw_writel(submask, S3C2410_INTSUBMSK);
- __raw_writel(mask, S3C2410_INTMSK);
-}
-
-
-static inline void s3c_irqsub_maskack(unsigned int irqno,
- unsigned int parentmask,
- unsigned int group)
-{
- unsigned int bit = 1UL << (irqno - IRQ_S3CUART_RX0);
-
- s3c_irqsub_mask(irqno, parentmask, group);
-
- __raw_writel(bit, S3C2410_SUBSRCPND);
-
- /* only ack parent if we've got all the irqs (seems we must
-* ack, all and hope that the irq system retriggers ok when
-* the interrupt goes off again)
-*/
-
- if (1) {
- __raw_writel(parentmask, S3C2410_SRCPND);
- __raw_writel(parentmask, S3C2410_I
Re: iio: adc: add exynos5 adc driver under iio framwork
On Wed, Jan 23, 2013 at 04:58:06AM -, Naveen Krishna Chatradhi wrote:
> This patch add an ADC IP found on EXYNOS5 series socs from Samsung.
> Also adds the Documentation for device tree bindings.
>
> Signed-off-by: Naveen Krishna Chatradhi
>
> ---
> Changes since v1:
>
> 1. Fixed comments from Lars
> 2. Added support for ADC on EXYNOS5410
>
> Changes since v2:
>
> 1. Changed the instance name for (struct iio_dev *) to indio_dev
> 2. Changed devm_request_irq to request_irq
>
> Few doubts regarding the mappings and child device handling.
> Kindly, suggest me better methods.
>
> .../bindings/arm/samsung/exynos5-adc.txt | 37 ++
> drivers/iio/adc/Kconfig|7 +
> drivers/iio/adc/Makefile |1 +
> drivers/iio/adc/exynos5_adc.c | 464
>
> 4 files changed, 509 insertions(+)
> create mode 100644
> Documentation/devicetree/bindings/arm/samsung/exynos5-adc.txt
> create mode 100644 drivers/iio/adc/exynos5_adc.c
>
> diff --git a/Documentation/devicetree/bindings/arm/samsung/exynos5-adc.txt
> b/Documentation/devicetree/bindings/arm/samsung/exynos5-adc.txt
> new file mode 100644
> index 000..9a5b515
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/samsung/exynos5-adc.txt
> @@ -0,0 +1,37 @@
> +Samsung Exynos5 Analog to Digital Converter bindings
> +
> +Required properties:
> +- compatible:Must be "samsung,exynos5250-adc" for exynos5250
> controllers.
> +- reg: Contains ADC register address range (base
> address and
> + length).
> +- interrupts:Contains the interrupt information for the
> timer. The
> + format is being dependent on which interrupt controller
> + the Samsung device uses.
> +
> +Note: child nodes can be added for auto probing from device tree.
> +
> +Example: adding device info in dtsi file
> +
> +adc@12D1 {
> + compatible = "samsung,exynos5250-adc";
> + reg = <0x12D1 0x100>;
> + interrupts = <0 106 0>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> +};
> +
> +
> +Example: Adding child nodes in dts file
> +
> +adc@12D1 {
> +
> + /* NTC thermistor is a hwmon device */
> + ncp15wb473@0 {
> + compatible = "ntc,ncp15wb473";
> + reg = <0x0>;
> + pullup-uV = <180>;
> + pullup-ohm = <47000>;
> + pulldown-ohm = <0>;
> + };
> +};
How about:
adc: adc@12D1 {
compatible = "samsung,exynos5250-adc";
reg = <0x12D1 0x100>;
interrupts = <0 106 0>;
#io-channel-cells = <1>;
};
...
ncp15wb473@0 {
compatible = "ntc,ncp15wb473";
reg = <0x0>; /* is this needed ? */
io-channels = <&adc 0>;
io-channel-names = "adc";
pullup-uV = <180>; /* uV or uv ? */
pullup-ohm = <47000>;
pulldown-ohm = <0>;
};
The ncp15wb473 driver would then use either iio_channel_get_all() to get the iio
channel list or, if it only supports one adc channel per instance,
iio_channel_get().
In that context, it would probably make sense to rework the ntc_thermistor
driver to support both DT as well as direct instantiation using access functions
and platform data (as it does today).
Also see https://patchwork.kernel.org/patch/2112171/.
Thanks,
Guenter
> diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig
> index fe822a1..33ceabf 100644
> --- a/drivers/iio/adc/Kconfig
> +++ b/drivers/iio/adc/Kconfig
> @@ -91,6 +91,13 @@ config AT91_ADC
> help
> Say yes here to build support for Atmel AT91 ADC.
>
> +config EXYNOS5_ADC
> + bool "Exynos5 ADC driver support"
> + help
> + Core support for the ADC block found in the Samsung EXYNOS5 series
> + of SoCs for drivers such as the touchscreen and hwmon to use to share
> + this resource.
> +
> config LP8788_ADC
> bool "LP8788 ADC driver"
> depends on MFD_LP8788
> diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile
> index 2d5f100..5b4a4f6 100644
> --- a/drivers/iio/adc/Makefile
> +++ b/drivers/iio/adc/Makefile
> @@ -10,6 +10,7 @@ obj-$(CONFIG_AD7791) += ad7791.o
> obj-$(CONFIG_AD7793) += ad7793.o
> obj-$(CONFIG_AD7887) += ad7887.o
> obj-$(CONFIG_AT91_ADC) += at91_adc.o
> +obj-$(CONFIG_EXYNOS5_ADC) += exynos5_adc.o
> obj-$(CONFIG_LP8788_ADC) += lp8788_adc.o
> obj-$(CONFIG_MAX1363) += max1363.o
> obj-$(CONFIG_TI_ADC081C) += ti-adc081c.o
> diff --git a/drivers/iio/adc/exynos5_adc.c b/drivers/iio/adc/exynos5_adc.c
> new file mode 100644
> index 000..8982675
> --- /dev/null
> +++ b/drivers/iio/adc/exynos5_adc.c
> @@ -0,0 +1,464 @@
> +/*
> + * exynos5_adc.c - Support for ADC in EXYNOS5 SoCs
> + *
> + * 8 ~ 10 channel, 10/12
[PATCH] ARM: exynos: move exynos4210-combiner to drivers/irqchip
From: Rob Herring
Exynos boot is broken with commit 0529e315 (ARM: use common irqchip_init
for GIC init). This commit split the irqchip initialization into 2 calls
to of_irq_init. This does not work because of_irq_init requires interrupt
parents to be in the match list.
Rather than reverting exynos changes, make it do the proper thing by using
IRQCHIP_DECLARE. This requires moving the combiner code to drivers/irqchip.
Reported-by: Doug Anderson
Signed-off-by: Rob Herring
Cc: Kukjin Kim
Cc: Russell King
Cc: Thomas Gleixner
Cc: linux-samsung-soc@vger.kernel.org
---
I thought there may be other platforms broken in the same way, but I
checked and exynos is the only one.
This is based on my gic/vic irqchip branch in arm-soc.
Rob
arch/arm/mach-exynos/common.c | 218 +--
arch/arm/mach-exynos/common.h |3 +
drivers/irqchip/Makefile |1 +
drivers/irqchip/exynos-combiner.c | 230 +
4 files changed, 236 insertions(+), 216 deletions(-)
create mode 100644 drivers/irqchip/exynos-combiner.c
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 4ea80bc..50577b6 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -12,6 +12,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -439,218 +440,6 @@ static void __init exynos5_init_clocks(int xtal)
#endif
}
-#define COMBINER_ENABLE_SET0x0
-#define COMBINER_ENABLE_CLEAR 0x4
-#define COMBINER_INT_STATUS0xC
-
-static DEFINE_SPINLOCK(irq_controller_lock);
-
-struct combiner_chip_data {
- unsigned int irq_offset;
- unsigned int irq_mask;
- void __iomem *base;
-};
-
-static struct irq_domain *combiner_irq_domain;
-static struct combiner_chip_data combiner_data[MAX_COMBINER_NR];
-
-static inline void __iomem *combiner_base(struct irq_data *data)
-{
- struct combiner_chip_data *combiner_data =
- irq_data_get_irq_chip_data(data);
-
- return combiner_data->base;
-}
-
-static void combiner_mask_irq(struct irq_data *data)
-{
- u32 mask = 1 << (data->hwirq % 32);
-
- __raw_writel(mask, combiner_base(data) + COMBINER_ENABLE_CLEAR);
-}
-
-static void combiner_unmask_irq(struct irq_data *data)
-{
- u32 mask = 1 << (data->hwirq % 32);
-
- __raw_writel(mask, combiner_base(data) + COMBINER_ENABLE_SET);
-}
-
-static void combiner_handle_cascade_irq(unsigned int irq, struct irq_desc
*desc)
-{
- struct combiner_chip_data *chip_data = irq_get_handler_data(irq);
- struct irq_chip *chip = irq_get_chip(irq);
- unsigned int cascade_irq, combiner_irq;
- unsigned long status;
-
- chained_irq_enter(chip, desc);
-
- spin_lock(&irq_controller_lock);
- status = __raw_readl(chip_data->base + COMBINER_INT_STATUS);
- spin_unlock(&irq_controller_lock);
- status &= chip_data->irq_mask;
-
- if (status == 0)
- goto out;
-
- combiner_irq = __ffs(status);
-
- cascade_irq = combiner_irq + (chip_data->irq_offset & ~31);
- if (unlikely(cascade_irq >= NR_IRQS))
- do_bad_IRQ(cascade_irq, desc);
- else
- generic_handle_irq(cascade_irq);
-
- out:
- chained_irq_exit(chip, desc);
-}
-
-static struct irq_chip combiner_chip = {
- .name = "COMBINER",
- .irq_mask = combiner_mask_irq,
- .irq_unmask = combiner_unmask_irq,
-};
-
-static void __init combiner_cascade_irq(unsigned int combiner_nr, unsigned int
irq)
-{
- unsigned int max_nr;
-
- if (soc_is_exynos5250())
- max_nr = EXYNOS5_MAX_COMBINER_NR;
- else
- max_nr = EXYNOS4_MAX_COMBINER_NR;
-
- if (combiner_nr >= max_nr)
- BUG();
- if (irq_set_handler_data(irq, &combiner_data[combiner_nr]) != 0)
- BUG();
- irq_set_chained_handler(irq, combiner_handle_cascade_irq);
-}
-
-static void __init combiner_init_one(unsigned int combiner_nr,
-void __iomem *base)
-{
- combiner_data[combiner_nr].base = base;
- combiner_data[combiner_nr].irq_offset = irq_find_mapping(
- combiner_irq_domain, combiner_nr * MAX_IRQ_IN_COMBINER);
- combiner_data[combiner_nr].irq_mask = 0xff << ((combiner_nr % 4) << 3);
-
- /* Disable all interrupts */
- __raw_writel(combiner_data[combiner_nr].irq_mask,
-base + COMBINER_ENABLE_CLEAR);
-}
-
-#ifdef CONFIG_OF
-static int combiner_irq_domain_xlate(struct irq_domain *d,
-struct device_node *controller,
-const u32 *intspec, unsigned int intsize,
-unsigned long *out_hwirq,
-unsigned int *out_type)
-{
- if (d->of_node != controller)
- return -EINVAL;
-
- if (intsize < 2)
-
Re: [PATCH v4 02/10] s5p-fimc: Add device tree support for FIMC devices
On 02/11/2013 10:50 PM, Stephen Warren wrote: On 02/09/2013 03:29 PM, Sylwester Nawrocki wrote: On 02/09/2013 01:32 AM, Stephen Warren wrote: On 02/08/2013 05:05 PM, Sylwester Nawrocki wrote: On 02/09/2013 12:21 AM, Stephen Warren wrote: On 02/08/2013 04:16 PM, Sylwester Nawrocki wrote: On 02/07/2013 12:40 AM, Stephen Warren wrote: diff --git a/Documentation/devicetree/bindings/media/soc/samsung-fimc.txt b/Documentation/devicetree/bindings/media/soc/samsung-fimc.txt +Samsung S5P/EXYNOS SoC Camera Subsystem (FIMC) +-- ... +For every fimc node a numbered alias should be present in the aliases node. +Aliases are of the form fimc, where is an integer (0...N) specifying +the IP's instance index. ... Different compatible values might not work, when for example there are 3 IPs out of 4 of one type and the fourth one of another type. It wouldn't even by really different types, just quirks/little differences between them, e.g. no data path routed to one of other IPs. I was thinking of using feature-/quirk-oriented properties. For example, if there's a port on 3 of the 4 devices to connect to some other IP block, simply include a boolean property to indicate whether that port is present. It would be in 3 of the nodes but not the 4th. Yes, I could add several properties corresponding to all members of this [3] data structure. But still it is needed to clearly identify the IP block in a set of the hardware instances. Why? What decisions will be made based on the identify of the IP block instance that wouldn't be covered by DT properties that describe which features/bugs/... the IP block instance has? The whole subsystem topology is exposed to user space through the Media Controller API. Although the user space libraries/applications using this driver are not much concerned how the hardware is represented internally in the kernel, some properties of the media entities seen in user space are derived from the hardware details, e.g. the media entity names contain index of a corresponding IP block. Please see [1] for an example of a topology exposed by the driver. Since different H/W instances have different capabilities, user space libraries/plugins can be coded to e.g. use one instance for video playback post-processing and another for camera capture. The capabilities could be also discovered with the V4L2 API to some level of detail. But still assigning random entity names to the IP blocks has a potential of breaking user space or causing some malfunctions. Perhaps I should just use a custom properties like "samsung,fimc-id" ? I tried to represent some intra-soc data routing details with our common video interfaces bindings and it really looked like a lot of unnecessary nodes, with 11 camera sub-device nodes required to cover a front a rear facing camera. Some details can be just coded in the driver, especially that newer SoCs will get a new driver anyway, since there are huge differences between the media subsystem architecture across subsequent SoC revisions. [1] http://www.spinics.net/lists/linux-media/attachments/psPhA96YX70U.ps Then to connect e.g. MIPI-CSIS.0 to FIMC.2 at run time an index of the MIPI-CSIS needs to be written to the FIMC.2 data input control register. Even though MIPI-CSIS.N are same in terms of hardware structure they still need to be distinguished as separate instances. Oh, so you're using the alias ID as the value to write into the FIMC.2 register for that. I'm not 100% familiar with aliases, but they seem like a more user-oriented naming thing to me, whereas values for hooking up intra-SoC routing are an unrelated namespace semantically, even if the values happen to line up right now. Perhaps rather than a Boolean property I mentioned above, use a custom property to indicate the ID that the FIMC.2 object knows the MIPI-CSIS.0 object as? While this seems That could be 'reg' property in the MIPI-CSIS.0 'port' subnode that links it to the image sensor node ([4], line 165). Because MIPI-CSIS IP blocks are immutably connected to the SoC camera physical MIPI CSI-2 interfaces, and the physical camera ports have fixed assignment to the MIPI-CSIS devices.. This way we could drop alias ID for the MIPI-CSIS nodes. And their instance index that is required for the top level driver which exposes topology and the routing capabilities to user space could be restored from the reg property value by subtracting a fixed offset. I suppose that would work. It feels a little indirect, and I think means that the driver needs to go find some child node defining its end of some link, then find the node representing the other end of the link, then read properties out of that other node to find the value. That seems a little unusual, but I guess it would work. I'm not sure of the long-term implications of doing that kind of thing. You'd want to run the idea past some DT maintainers/experts. It's a bit simpler than that. We would need on
Re: [PATCH] ARM: exynos: move exynos4210-combiner to drivers/irqchip
On Tue, Feb 12, 2013 at 04:04:52PM -0600, Rob Herring wrote: > From: Rob Herring > > Exynos boot is broken with commit 0529e315 (ARM: use common irqchip_init > for GIC init). This commit split the irqchip initialization into 2 calls > to of_irq_init. This does not work because of_irq_init requires interrupt > parents to be in the match list. > > Rather than reverting exynos changes, make it do the proper thing by using > IRQCHIP_DECLARE. This requires moving the combiner code to drivers/irqchip. > > Reported-by: Doug Anderson > Signed-off-by: Rob Herring > Cc: Kukjin Kim > Cc: Russell King > Cc: Thomas Gleixner > Cc: linux-samsung-soc@vger.kernel.org > --- > > I thought there may be other platforms broken in the same way, but I > checked and exynos is the only one. > > This is based on my gic/vic irqchip branch in arm-soc. Applied to next/cleanup. I guess this answers whether anyone boots linux-next regularly on Exynos hardware. :( -Olof -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH] ARM: S3C24XX: remove plat-samsung/irq.h
Heiko Stübner wrote: > > plat-samsung/irq.h did only contain functions for handling the spread out > subirqs on s3c24xx arches, which are not needed anymore. > > Signed-off-by: Heiko Stuebner > --- > Sorry for bringing this separate submission, but I just remembered > it this evening. > > This applies on top of all the other s3c24xx irq changes and > I think this patch will mark the end of the irq-cleanup for now. > > arch/arm/mach-s3c24xx/irq-pm.c |7 ++- > arch/arm/mach-s3c24xx/irq.c |8 +-- > arch/arm/plat-samsung/include/plat/irq.h | 116 > -- > 3 files changed, 9 insertions(+), 122 deletions(-) > delete mode 100644 arch/arm/plat-samsung/include/plat/irq.h > Applied, thanks :-) - Kukjin -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[GIT PULL fixes] Samsung-fixes for v3.9
Hi Arnd and Olof, Here is Samsung fixes for v3.9 and it is not a critical fixes. Please pull from: git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git next/fixes-samsung Thanks. - Kukjin The following changes since commit 7d1f9aeff1ee4a20b1aeb377dd0f579fe9647619: Linux 3.8-rc4 (2013-01-17 19:25:45 -0800) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git next/fixes-samsung for you to fetch changes up to ebf4762812ebe77ed960543421ec894108315f2f: ARM: dts: Correct pin configuration of SD 4 for exynos4x12-pinctrl (2013-02-12 10:35:50 -0800) Abhilash Kesavan (1): ARM: SAMSUNG: Gracefully exit on suspend failure Alexander Shiyan (1): ARM: S3C24XX: Fix compile breakage for SMDK2410 Alexey Galakhov (1): ARM: S5PV210: Fix early uart output in fifo mode Chen Gang (1): ARM: SAMSUNG: using vsnprintf instead of vsprintf for the limit buffer length 256 Heiko Stuebner (2): ARM: S3C24XX: let S3C2412_PM select S3C2412_PM_SLEEP ARM: S3C24XX: add missing platform_device.h include for osiris Sachin Kamat (3): ARM: S3C24XX: Make 'clk_msysclk' static ARM: SAMSUNG: Silence empty switch warning in sdhci.h ARM: SAMSUNG: Silence empty switch warning in fimc-core.h Shirish S (1): ARM: dts: Correct pin configuration of SD 4 for exynos4x12-pinctrl arch/arm/boot/dts/exynos4x12-pinctrl.dtsi |2 +- arch/arm/mach-exynos/pm.c |6 -- arch/arm/mach-s3c24xx/Kconfig |2 ++ arch/arm/mach-s3c24xx/common-s3c2443.c |2 +- arch/arm/mach-s3c24xx/mach-osiris.c |1 + arch/arm/mach-s3c24xx/pm-s3c2412.c |3 ++- arch/arm/mach-s3c24xx/pm-s3c2416.c |3 ++- arch/arm/mach-s3c64xx/pm.c |3 ++- arch/arm/mach-s5p64x0/pm.c |4 ++-- arch/arm/mach-s5pv210/include/mach/uncompress.h |2 ++ arch/arm/mach-s5pv210/pm.c |4 ++-- arch/arm/plat-samsung/include/plat/fimc-core.h |2 ++ arch/arm/plat-samsung/include/plat/sdhci.h |2 ++ arch/arm/plat-samsung/pm.c |7 +-- 14 files changed, 30 insertions(+), 13 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[GIT PULL - cpufreq] Samsung eyxnos cpufreq for v3.9
Hi Rafael, Here is changes for Samsung exynos cpufreq for v3.9. Almost of them are changing exynos stuff in drivers/cpufreq, so should be fine for cpufreq tree. Please pull from: git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git next/cpufreq-exynos If any problems, please kindly let me know. Thanks. - Kukjin The following changes since commit a49f0d1ea3ec94fc7cf33a7c36a16343b74bd565: Linux 3.8-rc1 (2012-12-21 17:19:00 -0800) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git next/cpufreq-exynos for you to fetch changes up to c098ea74b268969bde5aaf1689b61d236abf82f5: cpufreq: exynos: Fix hang in pm handler due to frequency mismatch (2013-02-04 21:01:22 -0800) Inderpal Singh (1): cpufreq: exynos: Show list of available frequencies Jonghwan Choi (7): cpufreq: exynos: Remove unused variable & IS_ERR cpufreq: exynos: Check old & new frequency early cpufreq: exynos: Use APLL_FREQ macro for cpu divider value cpufreq: exynos: Split exynos_target function into two functions cpufreq: exynos: Add missing static cpufreq: exynos: Get booting freq value in exynos_cpufreq_init cpufreq: exynos: Fix hang in pm handler due to frequency mismatch Sachin Kamat (2): cpufreq: exynos: Fix unsigned variable being checked for negative value cpufreq: exynos: Initialize return variable arch/arm/mach-exynos/include/mach/cpufreq.h | 19 +- drivers/cpufreq/exynos-cpufreq.c| 174 +++- drivers/cpufreq/exynos4210-cpufreq.c| 152 ++- drivers/cpufreq/exynos4x12-cpufreq.c| 388 --- drivers/cpufreq/exynos5250-cpufreq.c| 178 +++- 5 files changed, 248 insertions(+), 663 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: iio: adc: add exynos5 adc driver under iio framwork
On 13 February 2013 02:37, Guenter Roeck wrote:
> On Wed, Jan 23, 2013 at 04:58:06AM -, Naveen Krishna Chatradhi wrote:
>> This patch add an ADC IP found on EXYNOS5 series socs from Samsung.
>> Also adds the Documentation for device tree bindings.
>>
>> Signed-off-by: Naveen Krishna Chatradhi
>>
>> ---
>> Changes since v1:
>>
>> 1. Fixed comments from Lars
>> 2. Added support for ADC on EXYNOS5410
>>
>> Changes since v2:
>>
>> 1. Changed the instance name for (struct iio_dev *) to indio_dev
>> 2. Changed devm_request_irq to request_irq
>>
>> Few doubts regarding the mappings and child device handling.
>> Kindly, suggest me better methods.
>>
>> .../bindings/arm/samsung/exynos5-adc.txt | 37 ++
>> drivers/iio/adc/Kconfig|7 +
>> drivers/iio/adc/Makefile |1 +
>> drivers/iio/adc/exynos5_adc.c | 464
>>
>> 4 files changed, 509 insertions(+)
>> create mode 100644
>> Documentation/devicetree/bindings/arm/samsung/exynos5-adc.txt
>> create mode 100644 drivers/iio/adc/exynos5_adc.c
>>
>> diff --git a/Documentation/devicetree/bindings/arm/samsung/exynos5-adc.txt
>> b/Documentation/devicetree/bindings/arm/samsung/exynos5-adc.txt
>> new file mode 100644
>> index 000..9a5b515
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/arm/samsung/exynos5-adc.txt
>> @@ -0,0 +1,37 @@
>> +Samsung Exynos5 Analog to Digital Converter bindings
>> +
>> +Required properties:
>> +- compatible:Must be "samsung,exynos5250-adc" for
>> exynos5250 controllers.
>> +- reg: Contains ADC register address range (base
>> address and
>> + length).
>> +- interrupts:Contains the interrupt information for the
>> timer. The
>> + format is being dependent on which interrupt controller
>> + the Samsung device uses.
>> +
>> +Note: child nodes can be added for auto probing from device tree.
>> +
>> +Example: adding device info in dtsi file
>> +
>> +adc@12D1 {
>> + compatible = "samsung,exynos5250-adc";
>> + reg = <0x12D1 0x100>;
>> + interrupts = <0 106 0>;
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + ranges;
>> +};
>> +
>> +
>> +Example: Adding child nodes in dts file
>> +
>> +adc@12D1 {
>> +
>> + /* NTC thermistor is a hwmon device */
>> + ncp15wb473@0 {
>> + compatible = "ntc,ncp15wb473";
>> + reg = <0x0>;
>> + pullup-uV = <180>;
>> + pullup-ohm = <47000>;
>> + pulldown-ohm = <0>;
>> + };
>> +};
>
> How about:
>
> adc: adc@12D1 {
> compatible = "samsung,exynos5250-adc";
> reg = <0x12D1 0x100>;
> interrupts = <0 106 0>;
> #io-channel-cells = <1>;
> };
>
> ...
>
> ncp15wb473@0 {
> compatible = "ntc,ncp15wb473";
> reg = <0x0>; /* is this needed ? */
> io-channels = <&adc 0>;
> io-channel-names = "adc";
> pullup-uV = <180>; /* uV or uv ? */
> pullup-ohm = <47000>;
> pulldown-ohm = <0>;
> };
>
> The ncp15wb473 driver would then use either iio_channel_get_all() to get the
> iio
> channel list or, if it only supports one adc channel per instance,
> iio_channel_get().
>
> In that context, it would probably make sense to rework the ntc_thermistor
> driver to support both DT as well as direct instantiation using access
> functions
> and platform data (as it does today).
>
> Also see https://patchwork.kernel.org/patch/2112171/.
>
> Thanks,
> Guenter
Yes Guenter, I will rebase and submit the ADC driver based on your patch set.
>
>> diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig
>> index fe822a1..33ceabf 100644
>> --- a/drivers/iio/adc/Kconfig
>> +++ b/drivers/iio/adc/Kconfig
>> @@ -91,6 +91,13 @@ config AT91_ADC
>> help
>> Say yes here to build support for Atmel AT91 ADC.
>>
>> +config EXYNOS5_ADC
>> + bool "Exynos5 ADC driver support"
>> + help
>> + Core support for the ADC block found in the Samsung EXYNOS5 series
>> + of SoCs for drivers such as the touchscreen and hwmon to use to share
>> + this resource.
>> +
>> config LP8788_ADC
>> bool "LP8788 ADC driver"
>> depends on MFD_LP8788
>> diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile
>> index 2d5f100..5b4a4f6 100644
>> --- a/drivers/iio/adc/Makefile
>> +++ b/drivers/iio/adc/Makefile
>> @@ -10,6 +10,7 @@ obj-$(CONFIG_AD7791) += ad7791.o
>> obj-$(CONFIG_AD7793) += ad7793.o
>> obj-$(CONFIG_AD7887) += ad7887.o
>> obj-$(CONFIG_AT91_ADC) += at91_adc.o
>> +obj-$(CONFIG_EXYNOS5_ADC) += exynos5_adc.o
>> obj-$(CONFIG_LP8788_ADC) += lp8788_adc.o
>> obj-$(CONFIG_MAX1363) += max1363.o
>> obj-$(CONFIG_TI_ADC081C) += ti-adc081c.o
>>
Re: [PATCH V6 0/4] [SCSI] ufs: Adds glue drivers to ufshcd
Hi James, look like these patches are fine. Can you please integrate these patches in your tree. On Tue, Feb 5, 2013 at 10:17 PM, wrote: > From: Vinayak Holikatti > > This patch set adds following features > - Seggregate PCI specific code in ufshcd.c and corrected copyright > - Adds PCI glue driver ufshcd-pci.c and ufshcd.c become core module > - Adds Platform glue driver ufshcd-pltfrm.c > - Update correct transfer size in Command UPIU > > Vinayak Holikatti (4): > [SCSI] drivers/scsi/ufs: Seggregate PCI Specific Code > [SCSI] drivers/scsi/ufs: Separate PCI code into glue driver > [SCSI] ufs: Add Platform glue driver for ufshcd > [SCSI] ufs: Correct the expected data transfersize > > drivers/scsi/ufs/Kconfig | 87 +--- > drivers/scsi/ufs/Makefile|2 + > drivers/scsi/ufs/ufs.h | 44 ++--- > drivers/scsi/ufs/ufshcd-pci.c| 211 +++ > drivers/scsi/ufs/ufshcd-pltfrm.c | 217 +++ > drivers/scsi/ufs/ufshcd.c| 426 > -- > drivers/scsi/ufs/ufshcd.h| 202 ++ > drivers/scsi/ufs/ufshci.h| 44 ++--- > 8 files changed, 811 insertions(+), 422 deletions(-) > create mode 100644 drivers/scsi/ufs/ufshcd-pci.c > create mode 100644 drivers/scsi/ufs/ufshcd-pltfrm.c > create mode 100644 drivers/scsi/ufs/ufshcd.h > > -- > 1.7.5.4 > -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3] ARM: DTS: CROS5250: Add max77686 device tree support
Adding Kukjin Kim who was accidentally missed out in the re-worked patches.
On Wed, Dec 5, 2012 at 8:51 AM, Abhilash Kesavan wrote:
> The exynos5250 based chromebooks have a max77686 pmic on i2c channel 0.
> Add support for the pmic in the common cros5250 dts file.
> Tested after enabling cpufreq support for exynos5250 SoC and varying the
> arm frequency/voltage using the userspace governer.
>
> Signed-off-by: Abhilash Kesavan
> Acked-by: Doug Anderson
> ---
> Changes since v1:
> * Used generic names for the regulators
> * Changed BUCK5 as being default "ON"
> Changes since v2:
> * Fixed the LDO7 name from "P1.0V_LDO_OUT7" to "P1.1V_LDO_OUT7"
>
> arch/arm/boot/dts/cros5250-common.dtsi | 138
>
> 1 files changed, 138 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/boot/dts/cros5250-common.dtsi
> b/arch/arm/boot/dts/cros5250-common.dtsi
> index fddd174..8ab8394 100644
> --- a/arch/arm/boot/dts/cros5250-common.dtsi
> +++ b/arch/arm/boot/dts/cros5250-common.dtsi
> @@ -24,6 +24,144 @@
> samsung,i2c-max-bus-freq = <378000>;
> gpios = <&gpb3 0 2 3 0>,
> <&gpb3 1 2 3 0>;
> +
> + max77686@09 {
> + compatible = "maxim,max77686";
> + reg = <0x09>;
> +
> + voltage-regulators {
> + ldo1_reg: LDO1 {
> + regulator-name = "P1.0V_LDO_OUT1";
> + regulator-min-microvolt = <100>;
> + regulator-max-microvolt = <100>;
> + regulator-always-on;
> + };
> +
> + ldo2_reg: LDO2 {
> + regulator-name = "P1.8V_LDO_OUT2";
> + regulator-min-microvolt = <180>;
> + regulator-max-microvolt = <180>;
> + regulator-always-on;
> + };
> +
> + ldo3_reg: LDO3 {
> + regulator-name = "P1.8V_LDO_OUT3";
> + regulator-min-microvolt = <180>;
> + regulator-max-microvolt = <180>;
> + regulator-always-on;
> + };
> +
> + ldo7_reg: LDO7 {
> + regulator-name = "P1.1V_LDO_OUT7";
> + regulator-min-microvolt = <110>;
> + regulator-max-microvolt = <110>;
> + regulator-always-on;
> + };
> +
> + ldo8_reg: LDO8 {
> + regulator-name = "P1.0V_LDO_OUT8";
> + regulator-min-microvolt = <100>;
> + regulator-max-microvolt = <100>;
> + regulator-always-on;
> + };
> +
> + ldo10_reg: LDO10 {
> + regulator-name = "P1.8V_LDO_OUT10";
> + regulator-min-microvolt = <180>;
> + regulator-max-microvolt = <180>;
> + regulator-always-on;
> + };
> +
> + ldo12_reg: LDO12 {
> + regulator-name = "P3.0V_LDO_OUT12";
> + regulator-min-microvolt = <300>;
> + regulator-max-microvolt = <300>;
> + regulator-always-on;
> + };
> +
> + ldo14_reg: LDO14 {
> + regulator-name = "P1.8V_LDO_OUT14";
> + regulator-min-microvolt = <180>;
> + regulator-max-microvolt = <180>;
> + regulator-always-on;
> + };
> +
> + ldo15_reg: LDO15 {
> + regulator-name = "P1.0V_LDO_OUT15";
> + regulator-min-microvolt = <100>;
> + regulator-max-microvolt = <100>;
> + regulator-always-on;
> + };
> +
> + ldo16_reg: LDO16 {
> + regulator-nam
Re: [PATCH V4 0/5] Add generic DMA DT binding support
Hi Vinod, On Tue, Feb 12, 2013 at 8:19 PM, Vinod Koul wrote: > On Mon, Feb 11, 2013 at 02:08:20PM +0530, Padmavathi Venna wrote: > > This looks fine, I have only question. The code seems to assume that pl330 dma > controller always uses DT. But I dont see that as dependency for pl330. > > Something tells me withot OF the driver may not build, have you checked it? > >> This patch set adds support for generic dma device tree bindings for >> Samsung platforms and is dependent on the following patches from >> Vinod Koul next branch >> 1)of: Add generic device tree DMA helpers >> 2)dmaengine: add helper function to request a slave DMA channel >> >> This patch set is made based Mark Brown next branch > Is this targetted for ASoC tree, if so why? It would fail to build if applied > there I have done this for my testing purpose (I expected all will directly apply in your branch). But 3rd patch is not applied directly. I will resend the patches after re-basing on your tree. 5th patch has to go in ASoC tree because it has dependency on "ARM: SAMSUNG: Make dma request compatible to generic dma bindings" which is there in ASoC tree. Hi Mark, Can you please take the 5th patch in your tree(if there is no issue) or should I resend it as a separate patch? > > -- > ~Vinod >> >> Padmavathi Venna (5): >> DMA: PL330: Add new pl330 filter for DT case. >> DMA: PL330: Add xlate function >> DMA: PL330: Register the DMA controller with the generic DMA helpers >> ARM: dts: pl330: Add #dma-cells for generic dma binding support >> ARM: SAMSUNG: dma: Remove unnecessary code >> >> .../devicetree/bindings/dma/arm-pl330.txt | 21 +-- >> arch/arm/boot/dts/exynos5250.dtsi | 12 >> arch/arm/mach-s3c24xx/include/mach/dma.h |1 - >> arch/arm/mach-s3c64xx/include/mach/dma.h |1 - >> arch/arm/plat-samsung/dma-ops.c| 10 +--- >> arch/arm/plat-samsung/include/plat/dma-ops.h |1 - >> arch/arm/plat-samsung/include/plat/dma-pl330.h |1 - >> drivers/dma/pl330.c| 64 >> +++ >> 8 files changed, 79 insertions(+), 32 deletions(-) >> >> -- >> 1.7.4.4 >> Thanks Padma -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] arm: plat-samsung: check soc ids before l2x0 cache restoration in resume
Hi Kukjin,
Thanks for reviewing the patch.
On 13 February 2013 00:57, Kukjin Kim wrote:
> Inderpal Singh wrote:
>>
>> Only exynos4 based platforms have l2x0 cache controller. Hence check
>> the same before restoring the cache in resume.
>>
> I think, the code can determine by checking ARM main ID cp15 register
> instead of Chip ID. Because if so, we don't need to do something for ahother
> EXYNOS4 SoCs next time.
>
Good point.
So the idea is that only cortex a9 based samsung platforms will have
l2x0 cache controller. Hence I should only check if its cortex a9 or
not from main ID reg.
Please confirm.
Thanks,
Inder
>> This is needed for single kernel image.
>>
>> Signed-off-by: Inderpal Singh
>> ---
>> arch/arm/mach-exynos/common.c |2 ++
>> arch/arm/plat-samsung/include/plat/pm.h |1 +
>> arch/arm/plat-samsung/s5p-sleep.S | 28
>>
>> 3 files changed, 31 insertions(+)
>>
>> diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-
>> exynos/common.c
>> index cdaa55f..ab7ca00 100644
>> --- a/arch/arm/mach-exynos/common.c
>> +++ b/arch/arm/mach-exynos/common.c
>> @@ -796,6 +796,8 @@ static int __init exynos4_l2x0_cache_init(void)
>> if (soc_is_exynos5250() || soc_is_exynos5440())
>> return 0;
>>
>> + s5p_cpu = samsung_cpu_id & EXYNOS4_CPU_MASK;
>> +
>> ret = l2x0_of_init(L2_AUX_VAL, L2_AUX_MASK);
>> if (!ret) {
>> l2x0_regs_phys = virt_to_phys(&l2x0_saved_regs);
>> diff --git a/arch/arm/plat-samsung/include/plat/pm.h b/arch/arm/plat-
>> samsung/include/plat/pm.h
>> index 887a0c9..285c8c8 100644
>> --- a/arch/arm/plat-samsung/include/plat/pm.h
>> +++ b/arch/arm/plat-samsung/include/plat/pm.h
>> @@ -190,3 +190,4 @@ extern void samsung_pm_save_gpios(void);
>>
>> extern void s3c_pm_save_core(void);
>> extern void s3c_pm_restore_core(void);
>> +extern unsigned long s5p_cpu;
>> diff --git a/arch/arm/plat-samsung/s5p-sleep.S b/arch/arm/plat-
>> samsung/s5p-sleep.S
>> index bdf6dad..006d35f 100644
>> --- a/arch/arm/plat-samsung/s5p-sleep.S
>> +++ b/arch/arm/plat-samsung/s5p-sleep.S
>> @@ -25,6 +25,15 @@
>> #include
>> #include
>>
>> +#define EXYNOS4210_CPU_ID0x4321
>> +#define EXYNOS4212_CPU_ID0x4322
>> +#define EXYNOS4412_CPU_ID0xE4412200
>> +#define EXYNOS4_CPU_MASK 0xFFFE
>> +
>> +#define EXYNOS4210_CPU (EXYNOS4210_CPU_ID &
>> EXYNOS4_CPU_MASK)
>> +#define EXYNOS4212_CPU (EXYNOS4212_CPU_ID &
>> EXYNOS4_CPU_MASK)
>> +#define EXYNOS4412_CPU (EXYNOS4412_CPU_ID &
>> EXYNOS4_CPU_MASK)
>> +
>> /*
>> *The following code is located into the .data section. This is to
>> *allow l2x0_regs_phys to be accessed with a relative load while we
>> @@ -51,6 +60,22 @@
>>
>> ENTRY(s3c_cpu_resume)
>> #ifdef CONFIG_CACHE_L2X0
>> + adr r0, s5p_cpu
>> + ldr r1, [r0]
>> +
>> + ldr r0, =EXYNOS4210_CPU
>> + cmp r1, r0
>> + beq continue
>> +
>> + ldr r0, =EXYNOS4212_CPU
>> + cmp r1, r0
>> + beq continue
>> +
>> + ldr r0, =EXYNOS4412_CPU
>> + cmp r1, r0
>> + bne resume_l2on
>> +
>> +continue:
>> adr r0, l2x0_regs_phys
>> ldr r0, [r0]
>> ldr r1, [r0, #L2X0_R_PHY_BASE]
>> @@ -77,4 +102,7 @@ ENDPROC(s3c_cpu_resume)
>> .globl l2x0_regs_phys
>> l2x0_regs_phys:
>> .long 0
>> + .globl s5p_cpu
>> +s5p_cpu:
>> + .long 0
>> #endif
>> --
>> 1.7.9.5
>
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RE: [PATCH] ARM: S3C24XX: remove plat-samsung/irq.h
Kukjin Kim wrote: > > Heiko Stübner wrote: > > > > plat-samsung/irq.h did only contain functions for handling the spread > > out subirqs on s3c24xx arches, which are not needed anymore. > > > > Signed-off-by: Heiko Stuebner > > --- > > Sorry for bringing this separate submission, but I just remembered it > > this evening. > > > > This applies on top of all the other s3c24xx irq changes and I think > > this patch will mark the end of the irq-cleanup for now. > > > > arch/arm/mach-s3c24xx/irq-pm.c |7 ++- > > arch/arm/mach-s3c24xx/irq.c |8 +-- > > arch/arm/plat-samsung/include/plat/irq.h | 116 > > -- > > 3 files changed, 9 insertions(+), 122 deletions(-) delete mode > > 100644 arch/arm/plat-samsung/include/plat/irq.h > > > Applied, thanks :-) > Just note, happens following error: arch/arm/mach-s3c24xx/bast-irq.c:37:22: fatal error: plat/irq.h: No such file or directory compilation terminated. ... make[2]: *** [arch/arm/mach-s3c24xx/bast-irq.o] Error 1 make[2]: *** Waiting for unfinished jobs CC crypto/testmgr.o CC lib/bsearch.o AS arch/arm/lib/memcpy.o AS arch/arm/lib/memmove.o make[1]: *** [arch/arm/mach-s3c24xx] Error 2 make[1]: *** Waiting for unfinished jobs I fixed when I applied. Thanks. - Kukjin -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] gpio: samsung: fixes build warning with s3c2410_defconfig
commit 7b45ed96 ("ARM: S3C24XX: handle s3c2412 eints using new
infrastructure") introduced build warning and this patch fixes
that:
drivers/gpio/gpio-samsung.c: In function 's3c24xx_gpiolib_fbank_to_irq':
drivers/gpio/gpio-samsung.c:1126:5: warning: suggest explicit braces to avoid
ambiguous 'else' [-Wparentheses]
Reported-by: kbuild test robot
Cc: Heiko Stuebner
Signed-off-by: Kukjin Kim
---
drivers/gpio/gpio-samsung.c |3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpio/gpio-samsung.c b/drivers/gpio/gpio-samsung.c
index df096dc..a811d0f 100644
--- a/drivers/gpio/gpio-samsung.c
+++ b/drivers/gpio/gpio-samsung.c
@@ -1123,11 +1123,12 @@ int samsung_gpiolib_to_irq(struct gpio_chip *chip,
unsigned int offset)
#ifdef CONFIG_PLAT_S3C24XX
static int s3c24xx_gpiolib_fbank_to_irq(struct gpio_chip *chip, unsigned
offset)
{
- if (offset < 4)
+ if (offset < 4) {
if (soc_is_s3c2412())
return IRQ_EINT0_2412 + offset;
else
return IRQ_EINT0 + offset;
+ }
if (offset < 8)
return IRQ_EINT4 + offset - 4;
--
1.7.10.4
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RE: [PATCH v3] ARM: DTS: CROS5250: Add max77686 device tree support
Abhilash Kesavan wrote:
>
> The exynos5250 based chromebooks have a max77686 pmic on i2c channel 0.
> Add support for the pmic in the common cros5250 dts file.
> Tested after enabling cpufreq support for exynos5250 SoC and varying the
> arm frequency/voltage using the userspace governer.
>
> Signed-off-by: Abhilash Kesavan
> Acked-by: Doug Anderson
> ---
> Changes since v1:
> * Used generic names for the regulators
> * Changed BUCK5 as being default "ON"
> Changes since v2:
> * Fixed the LDO7 name from "P1.0V_LDO_OUT7" to "P1.1V_LDO_OUT7"
>
> arch/arm/boot/dts/cros5250-common.dtsi | 138
>
> 1 files changed, 138 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/boot/dts/cros5250-common.dtsi
> b/arch/arm/boot/dts/cros5250-common.dtsi
> index fddd174..8ab8394 100644
> --- a/arch/arm/boot/dts/cros5250-common.dtsi
> +++ b/arch/arm/boot/dts/cros5250-common.dtsi
> @@ -24,6 +24,144 @@
> samsung,i2c-max-bus-freq = <378000>;
> gpios = <&gpb3 0 2 3 0>,
> <&gpb3 1 2 3 0>;
> +
> + max77686@09 {
> + compatible = "maxim,max77686";
> + reg = <0x09>;
> +
> + voltage-regulators {
> + ldo1_reg: LDO1 {
> + regulator-name =
> "P1.0V_LDO_OUT1";
> + regulator-min-microvolt = <100>;
> + regulator-max-microvolt = <100>;
> + regulator-always-on;
> + };
> +
> + ldo2_reg: LDO2 {
> + regulator-name =
> "P1.8V_LDO_OUT2";
> + regulator-min-microvolt = <180>;
> + regulator-max-microvolt = <180>;
> + regulator-always-on;
> + };
> +
> + ldo3_reg: LDO3 {
> + regulator-name =
> "P1.8V_LDO_OUT3";
> + regulator-min-microvolt = <180>;
> + regulator-max-microvolt = <180>;
> + regulator-always-on;
> + };
> +
> + ldo7_reg: LDO7 {
> + regulator-name =
> "P1.1V_LDO_OUT7";
> + regulator-min-microvolt = <110>;
> + regulator-max-microvolt = <110>;
> + regulator-always-on;
> + };
> +
> + ldo8_reg: LDO8 {
> + regulator-name =
> "P1.0V_LDO_OUT8";
> + regulator-min-microvolt = <100>;
> + regulator-max-microvolt = <100>;
> + regulator-always-on;
> + };
> +
> + ldo10_reg: LDO10 {
> + regulator-name =
> "P1.8V_LDO_OUT10";
> + regulator-min-microvolt = <180>;
> + regulator-max-microvolt = <180>;
> + regulator-always-on;
> + };
> +
> + ldo12_reg: LDO12 {
> + regulator-name =
> "P3.0V_LDO_OUT12";
> + regulator-min-microvolt = <300>;
> + regulator-max-microvolt = <300>;
> + regulator-always-on;
> + };
> +
> + ldo14_reg: LDO14 {
> + regulator-name =
> "P1.8V_LDO_OUT14";
> + regulator-min-microvolt = <180>;
> + regulator-max-microvolt = <180>;
> + regulator-always-on;
> + };
> +
> + ldo15_reg: LDO15 {
> + regulator-name =
> "P1.0V_LDO_OUT15";
> + regulator-min-microvolt = <100>;
> + regulator-max-microvolt = <100>;
> + regulator-always-on;
> + };
> +
> + ldo16_reg: LDO16 {
> + regulator-name =
> "P1.8V_LDO_OUT16";
> + regulator-min-microvolt = <180>;
> + regulator-max-microvolt = <180>;
> +
RE: [PATCH V3] ARM: EXYNOS: Add clocks for EXYNOS I2S and PCM I/F
Sangsu Park wrote: > > Audio Subsystem has own clocks for I2S0 and PCM0 in all EXYNOS series. > This patch add clocks for I2S0 and PCM0 I/F. > > Signed-off-by: Sangsu Park > --- > arch/arm/mach-exynos/Makefile |1 + > arch/arm/mach-exynos/clock-audss.c | 68 > > 2 files changed, 69 insertions(+), 0 deletions(-) > create mode 100644 arch/arm/mach-exynos/clock-audss.c > > diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach- > exynos/Makefile > index 7e53a3a..5b6c7c0 100644 > --- a/arch/arm/mach-exynos/Makefile > +++ b/arch/arm/mach-exynos/Makefile > @@ -13,6 +13,7 @@ obj-:= > # Core > > obj-$(CONFIG_ARCH_EXYNOS)+= common.o > +obj-$(CONFIG_ARCH_EXYNOS)+= clock-audss.o Sorry for late response. Basically, this should be implemented with common clock stuff but its posting was delayed due to some reason :-( I think, you can see the patches from Thomas P Abraham soon, so please re-work this based on that. If any updates, let you know. Thanks. - Kukjin -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH v6 05/12] iommu/exynos: support for device tree
KyongHo Cho wrote: > > On Fri, Feb 1, 2013 at 10:51 PM, Joerg Roedel wrote: > > Cho, > > > > On Wed, Jan 02, 2013 at 02:53:49PM +0900, KyongHo Cho wrote: > >> On Tuesday, January 1, 2013, Sylwester Nawrocki > > > > >> > Cc: devicetree-disc...@lists.ozlabs.org > > > > Since patch 7 of this set is already merged, do you mind to re-post the > > rest of this patch-set with the latest comments addressed? I can have a > > look at it again then and consider it for 3.9. > > > Thank you for your considerations. > > I also think that I need to post the patch set again with some fixes that are > addressed in the comments. > > Due to the heavy workload in my business I have hardly had a chance to > handle this patch-set. > As soon as the business lets me handle other pending issues, I will > work on this patchset. > I think I can start to it in the next 2 weeks. > OK, I see. Joerg, please hold this on until KyongHo's re-work, probably 3.10? Thanks. - Kukjin -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH v5 0/2] Adding USB 3.0 DRD-phy support for exynos5250
Vivek Gautam wrote: > > Based on 'usb-next' > > Changes from v4: > - Modifying function names and driver names to follow a common >naming convention. > "usb2phy" for samsung-usb2phy driver > "usb3phy" for samsung-usb3phy driver > - Changing file names "samsung-usb2.c" to "samsung-usb2phy.c" and, >"samsung-usb3.c" to "samsung-usb3phy.c" > - Removing dependencies for SAMSUNG_USB2PHY and > SAMSUNG_USB3PHY. > - Arranging SAMSUNG_USB2PHY and SAMSUNG_USB3PHY to select > SAMSUNG_USBPHY, >which is the usb-phy helper driver. > > Vivek Gautam (2): > usb: phy: samsung: Common out the generic stuff > usb: phy: samsung: Add PHY support for USB 3.0 controller > > drivers/usb/phy/Kconfig | 25 +- > drivers/usb/phy/Makefile |2 + > drivers/usb/phy/samsung-usb2phy.c | 511 > ++ > drivers/usb/phy/samsung-usb3phy.c | 349 ++ > drivers/usb/phy/samsung-usbphy.c | 717 + > drivers/usb/phy/samsung-usbphy.h | 328 + > 6 files changed, 1219 insertions(+), 713 deletions(-) > create mode 100644 drivers/usb/phy/samsung-usb2phy.c > create mode 100644 drivers/usb/phy/samsung-usb3phy.c > create mode 100644 drivers/usb/phy/samsung-usbphy.h > > -- > 1.7.6.5 For now, looks good to me, and if any enhancement is required, it can be done next time. Felipe, please go ahead with my ack :-) Acked-by: Kukjin Kim Thanks. - Kukjin -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
