Re: MFC decode failed in S5PV210 in kernel 3.8
于 2013/3/2 12:00, Lonsn 写道: Hi, I tested the MFC decode example v4l2_decode from http://git.infradead.org/users/kmpark/public-apps and meet some problems as following: # ./v4l2_decode -f /dev/video5 -m /dev/video9 -d /dev/fb0 -c mpeg4 -i shrek.m4v V4L2 Codec decoding example application Kamil Debski k.deb...@samsung.com Copyright 2012 Samsung Electronics Co., Ltd. (fb.c:fb_open:51): Framebuffer properties: xres=1024, yres=768, bpp=32 (fb.c:fb_open:53): Virtual resolution: vxres=1024 vyres=768 (fimc.c:fimc_open:56): FIMC Info (/dev/video5): driver=s5pv210-fimc bus_info= card=s5pv210-fimc fd=0x5 (mfc.c:mfc_open:57): MFC Info (/dev/video9): driver=s5p-mfc bus_info= card=s5p-mfc fd=0x6 (main.c:main:415): Successfully opened all necessary files and devices (mfc.c:mfc_dec_setup_output:101): Setup MFC decoding OUTPUT buffer size=1048576 (requested=1048576) (mfc.c:mfc_dec_setup_output:118): Number of MFC OUTPUT buffers is 2 (requested 2) (mfc.c:mfc_dec_setup_output:148): Succesfully mmapped 2 MFC OUTPUT buffers (main.c:extract_and_process_header:84): Extracted header of size 13089 (mfc.c:mfc_dec_queue_buf:178): Queued buffer on OUTPUT queue with index 0 (mfc.c:mfc_stream:236): Stream ON on OUTPUT queue (mfc.c:mfc_dec_setup_capture:277): MFC buffer parameters: 0x0 plane[0]=0 plane[1]=0 Error (mfc.c:mfc_dec_setup_capture:283): Failed to get crop information And kernel print: s5p_mfc_handle_error:420: Interrupt Error: 0035 vidioc_g_crop:782: Cannont set crop It seems MFC buffer parameters error first. The shrek.m4v comes from http://www.uky.edu/~drlane/com351/shrek.m4v and is H264 format. But if I use -c h264, then v4l2_decode will print: Error (parser.c:parse_h264_stream:337): Output buffer too small for current frame Error (main.c:extract_and_process_header:71): Failed to extract header from stream Any suggestions? Thanks. Maybe the up issue due to the input file format. Now I use a H264 ES file as input, failed with different output. #./v4l2_decode -f /dev/video5 -m /dev/video9 -d /dev/fb0 -c h264 -i c.h264 Kernel print: Unable to handle kernel NULL pointer dereference at virtual address pgd = afa78000 [] *pgd=4ea37831, *pte=, *ppte= Internal error: Oops: 17 [#1] PREEMPT ARM Modules linked in: CPU: 0Not tainted (3.8.0-dirty #26) PC is at dma_cache_maint_page+0x58/0xa8 LR is at 0x8000 pc : [80014f2c]lr : [8000]psr: a013 sp : ae939ac8 ip : 8050378c fp : aead2240 r10: r9 : 0001 r8 : 804aceec r7 : 0001 r6 : 804b5b70 r5 : fc03 r4 : r3 : 0001 r2 : 0006c000 r1 : r0 : fc03bc00 Flags: NzCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment user Control: 10c5387d Table: 4fa78019 DAC: 0015 Process v4l2_decode (pid: 2433, stack limit = 0xae938230) Stack: (0xae939ac8 to 0xae93a000) 9ac0: 0001 80778000 80015054 80019398 006c 9ae0: ace36e00 aead2b40 80015d34 0001 8050378c 9b00: ae939b54 aead2b40 804aceec 0001 0001 aead2240 804b5b70 9b20: 80245a4c 00d0 0001 802e41c8 0006c000 aead2280 9b40: 72601000 006c 805037a8 006c af9f8e00 0004306b 1020 acc3d400 9b60: ae939b98 accb9550 acc3d400 accb9550 805116c4 802411c8 9b80: afb1d900 acc3d400 805116c4 0006c000 0006c000 72601000 76f43000 9ba0: 0003 afa0ca98 1080 6193 803604cc ae939bdc 800480a8 9bc0: 804ba074 af907000 00036000 00036000 725cb000 0c36d194 80036da4 9be0: 2113 2193 0401 acd982b8 afb1d900 0003 af9f6144 802b8698 9c00: af9f6000 afb1d900 af9f6144 acd982b8 1080 802bc324 af9f6000 80342690 9c20: afb1d900 1088 af9f6000 afb1d900 1088 af9f6070 c802a8c0 9c40: 1088 802b5338 af9f6000 afb1d900 af9f6038 acf01ee4 8030bdcc 9c60: af9f6000 80360504 af9f6000 8030d39c afb1d900 0011 804d8988 804ab47c 9c80: acf01ee4 8030e5c0 4003 0002 804ab47c af989800 0002 afb1d918 9ca0: 109c 804d8988 acf03310 1402a8c0 c802a8c0 afb1d900 9cc0: 80387d54 804aab68 804d8988 804d8988 0011 0001 802e41c8 9ce0: afb1d900 acf03310 afb1d918 ae939d5c 009c3f49 009c3ecd 802e3da8 9d00: af989800 0084 0029 804ab4ec 804aa66c ae938000 ae939d5c 0008 9d20: af989800 afb1d900 804ab4ec 802c101c 804bbd74 804aa680 80512540 9d40: 804dde40 00400040 0140 80065fe8 804ba828 af817020 af817020 8035e09c 9d60: af817034 ae938000 accb9550 acc3d400 accb9550 9d80: acc3d400 000a afa07600 8037cf88 8024366c accb9550 ae939e58 9da0: acd2dc88 802437d0 0001 ae939e58 accb9400 8037cf88 ace36b3c 9dc0: 000f8335 8023dfc8 0001 afa07600 ae939e58 8023114c ae939e58 af817080 9de0: c044560f 804d3194 80233038 94f9da8f 0001 af85e930 ace7db00 9e00: ae939e58 ace36b3c 804ba828 800426c0 804acaec 9e20:
[PATCH 1/4] ARM: s3c24xx: Removed unneeded dependency on ARCH_S3C24XX for boards
Board options are already under if ARCH_S3C24XX condition, so additional dependencies on this symbol can be removed. Signed-off-by: Alexander Shiyan shc_w...@mail.ru --- arch/arm/mach-s3c24xx/Kconfig | 11 +++ 1 file changed, 3 insertions(+), 8 deletions(-) diff --git a/arch/arm/mach-s3c24xx/Kconfig b/arch/arm/mach-s3c24xx/Kconfig index 37f513d..567d77b 100644 --- a/arch/arm/mach-s3c24xx/Kconfig +++ b/arch/arm/mach-s3c24xx/Kconfig @@ -36,7 +36,6 @@ config CPU_S3C2410 config CPU_S3C2412 bool SAMSUNG S3C2412 - depends on ARCH_S3C24XX select CPU_ARM926T select CPU_LLSERIAL_S3C2440 select S3C2412_DMA if S3C24XX_DMA @@ -46,7 +45,6 @@ config CPU_S3C2412 config CPU_S3C2416 bool SAMSUNG S3C2416/S3C2450 - depends on ARCH_S3C24XX select CPU_ARM926T select CPU_LLSERIAL_S3C2440 select S3C2416_PM if PM @@ -81,7 +79,6 @@ config CPU_S3C244X config CPU_S3C2443 bool SAMSUNG S3C2443 - depends on ARCH_S3C24XX select CPU_ARM920T select CPU_LLSERIAL_S3C2440 select S3C2443_COMMON @@ -133,7 +130,6 @@ config S3C24XX_SETUP_TS config S3C24XX_DMA bool S3C2410 DMA support - depends on ARCH_S3C24XX select S3C_DMA help S3C2410 DMA support. This is needed for drivers like sound which @@ -142,7 +138,7 @@ config S3C24XX_DMA config S3C2410_DMA_DEBUG bool S3C2410 DMA support debug - depends on ARCH_S3C24XX S3C2410_DMA + depends on S3C2410_DMA help Enable debugging output for the DMA code. This option sends info to the kernel log, at priority KERN_DEBUG. @@ -380,9 +376,8 @@ if CPU_S3C2412 config CPU_S3C2412_ONLY bool - depends on ARCH_S3C24XX !CPU_S3C2410 \ - !CPU_S3C2416 !CPU_S3C2440 !CPU_S3C2442 \ - !CPU_S3C2443 CPU_S3C2412 + depends on !CPU_S3C2410 !CPU_S3C2416 !CPU_S3C2440 \ + !CPU_S3C2442 !CPU_S3C2443 CPU_S3C2412 default y config S3C2412_CPUFREQ -- 1.7.12.4 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 2/4] ARM: s3c24xx: Removed unneeded dependency on CPU_S3C2410
S3C2410 boards are already under if CPU_S3C2410 condition, so additional dependencies on this symbol can be removed. Signed-off-by: Alexander Shiyan shc_w...@mail.ru --- arch/arm/mach-s3c24xx/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-s3c24xx/Kconfig b/arch/arm/mach-s3c24xx/Kconfig index 567d77b..dddb49b 100644 --- a/arch/arm/mach-s3c24xx/Kconfig +++ b/arch/arm/mach-s3c24xx/Kconfig @@ -229,7 +229,7 @@ if CPU_S3C2410 config S3C2410_CPUFREQ bool - depends on CPU_FREQ_S3C24XX CPU_S3C2410 + depends on CPU_FREQ_S3C24XX select S3C2410_CPUFREQ_UTILS help CPU Frequency scaling support for S3C2410 -- 1.7.12.4 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 3/4] ARM: s3c24xx: Removed unneeded dependency on CPU_S3C2412
S3C2412 boards are already under if CPU_S3C2412 condition, so additional dependencies on this symbol can be removed. Signed-off-by: Alexander Shiyan shc_w...@mail.ru --- arch/arm/mach-s3c24xx/Kconfig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-s3c24xx/Kconfig b/arch/arm/mach-s3c24xx/Kconfig index dddb49b..e6f7d7c 100644 --- a/arch/arm/mach-s3c24xx/Kconfig +++ b/arch/arm/mach-s3c24xx/Kconfig @@ -377,12 +377,12 @@ if CPU_S3C2412 config CPU_S3C2412_ONLY bool depends on !CPU_S3C2410 !CPU_S3C2416 !CPU_S3C2440 \ - !CPU_S3C2442 !CPU_S3C2443 CPU_S3C2412 + !CPU_S3C2442 !CPU_S3C2443 default y config S3C2412_CPUFREQ bool - depends on CPU_FREQ_S3C24XX CPU_S3C2412 + depends on CPU_FREQ_S3C24XX default y select S3C2412_IOTIMING help -- 1.7.12.4 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH V2 2/4] cpufreq: exynos: Remove error return even if no soc is found
This patch helps to have single binary for exynos5440 and previous exynos soc's. This change is needed for adding exynos5440 cpufreq driver which does not uses exynos-cpufreq common file and adds it own driver. Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com --- drivers/cpufreq/exynos-cpufreq.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/cpufreq/exynos-cpufreq.c b/drivers/cpufreq/exynos-cpufreq.c index 78057a3..ee75997 100644 --- a/drivers/cpufreq/exynos-cpufreq.c +++ b/drivers/cpufreq/exynos-cpufreq.c @@ -297,7 +297,7 @@ static int __init exynos_cpufreq_init(void) else if (soc_is_exynos5250()) ret = exynos5250_cpufreq_init(exynos_info); else - pr_err(%s: CPU type not found\n, __func__); + return 0; if (ret) goto err_vdd_arm; -- 1.7.1 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH V2 3/4] arm: exynos: Enable OPP library support for exynos5440
The OPP library support is needed for exynos5440 cpu frequency dynamic scaling driver. Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com --- arch/arm/mach-exynos/Kconfig |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index 70f94c8..d5dde07 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig @@ -72,10 +72,12 @@ config SOC_EXYNOS5440 bool SAMSUNG EXYNOS5440 default y depends on ARCH_EXYNOS5 + select ARCH_HAS_OPP select ARM_ARCH_TIMER select AUTO_ZRELADDR select PINCTRL select PINCTRL_EXYNOS5440 + select PM_OPP help Enable EXYNOS5440 SoC support -- 1.7.1 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH V2 4/4] dts: Add cpufreq controller node for Exynos5440 SoC
Add cpufreq controller device node for Exynos5440 SoC for passing
parameters like controller base address, interrupt and cpufreq
table. This node is added inside cpu0 node as done in other cpufreq
drivers.
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
arch/arm/boot/dts/exynos5440.dtsi | 13 +
1 files changed, 13 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5440.dtsi
b/arch/arm/boot/dts/exynos5440.dtsi
index 5f3562a..fd0c811 100644
--- a/arch/arm/boot/dts/exynos5440.dtsi
+++ b/arch/arm/boot/dts/exynos5440.dtsi
@@ -31,6 +31,19 @@
interrupts = 1 13 0xf08;
clock-frequency = 100;
};
+
+ cpufreq@16 {
+ compatible = samsung,exynos5440-cpufreq;
+ reg = 0x16 0x1000;
+ interrupts = 0 57 0;
+ operating-points =
+ /* KHZuV */
+ 120 1025000
+ 100 975000
+ 80 925000
+ ;
+ clocks = clock 2;
+ };
};
cpu@1 {
compatible = arm,cortex-a15;
--
1.7.1
--
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[PATCH V2 1/4] cpufreq: exynos: Adding cpufreq driver for exynos5440
This patch adds dvfs support for exynos5440 SOC. This soc has 4 cores and
they run at same frequency. The nature of exynos5440 clock controller is
different from previous exynos controllers so not using the common exynos
cpufreq framework. The major difference being interrupt notfication for
frequency change. Also, OPP library is used for device tree parsing to get
different parameters like frequency, voltage etc. Since the opp library sorts
the frequency table in ascending order so they are again re-arranged in
descending order. This will have one-to-one mapping with the clock controller
state management logic.
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
Changes in V2:
* Added OPP library support to parse DT parameters.
* Removed a hack to handle interrupts in bootup.
* Added many review comments from Viresh and Inder.
All these patches are dependent on Thomas Abraham common clock patches.
http://www.mail-archive.com/linux-samsung-soc@vger.kernel.org/msg15860.html
.../bindings/cpufreq/cpufreq-exynos5440.txt| 32 ++
drivers/cpufreq/Kconfig.arm|9 +
drivers/cpufreq/Makefile |1 +
drivers/cpufreq/exynos5440-cpufreq.c | 450
4 files changed, 492 insertions(+), 0 deletions(-)
create mode 100644
Documentation/devicetree/bindings/cpufreq/cpufreq-exynos5440.txt
create mode 100644 drivers/cpufreq/exynos5440-cpufreq.c
diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-exynos5440.txt
b/Documentation/devicetree/bindings/cpufreq/cpufreq-exynos5440.txt
new file mode 100644
index 000..caa3f8d
--- /dev/null
+++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-exynos5440.txt
@@ -0,0 +1,32 @@
+
+Exynos5440 cpufreq driver
+---
+
+Exynos5440 SoC cpufreq driver for CPU frequency scaling.
+
+Required properties:
+- interrupts: Interrupt to know the completion of cpu frequency change.
+- operating-points: Table of frequencies and voltage CPU could be transitioned
into,
+ in the decreasing order. Frequency should be in KHZ units and voltage
+ should be in microvolts.
+- clocks: phandle of the clock from common clock binding. More description can
+ be found in Documentation/devicetree/bindings/clock/clock-bindings.txt.
+
+Optional properties:
+- clock-latency: Clock transition latency in microsecond.
+
+All the required listed above must be defined under node cpufreq.
+
+Example:
+
+ cpufreq@16 {
+ compatible = samsung,exynos5440-cpufreq;
+ reg = 0x16 0x1000;
+ interrupts = 0 57 0;
+ operating-points =
+ 100 975000
+ 80 925000;
+ clocks = clock 2;
+ clock-latency = 10;
+ };
+
diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm
index 030ddf6..7ed9c4a 100644
--- a/drivers/cpufreq/Kconfig.arm
+++ b/drivers/cpufreq/Kconfig.arm
@@ -77,6 +77,15 @@ config ARM_EXYNOS5250_CPUFREQ
This adds the CPUFreq driver for Samsung EXYNOS5250
SoC.
+config ARM_EXYNOS5440_CPUFREQ
+ def_bool SOC_EXYNOS5440
+ depends on HAVE_CLK PM_OPP OF
+ help
+ This adds the CPUFreq driver for Samsung EXYNOS5440
+ SoC. The nature of exynos5440 clock controller is
+ different than previous exynos controllers so not using
+ the common exynos framework.
+
config ARM_KIRKWOOD_CPUFREQ
def_bool ARCH_KIRKWOOD OF
help
diff --git a/drivers/cpufreq/Makefile b/drivers/cpufreq/Makefile
index 863fd18..c841438 100644
--- a/drivers/cpufreq/Makefile
+++ b/drivers/cpufreq/Makefile
@@ -52,6 +52,7 @@ obj-$(CONFIG_ARM_EXYNOS_CPUFREQ) += exynos-cpufreq.o
obj-$(CONFIG_ARM_EXYNOS4210_CPUFREQ) += exynos4210-cpufreq.o
obj-$(CONFIG_ARM_EXYNOS4X12_CPUFREQ) += exynos4x12-cpufreq.o
obj-$(CONFIG_ARM_EXYNOS5250_CPUFREQ) += exynos5250-cpufreq.o
+obj-$(CONFIG_ARM_EXYNOS5440_CPUFREQ) += exynos5440-cpufreq.o
obj-$(CONFIG_ARM_KIRKWOOD_CPUFREQ) += kirkwood-cpufreq.o
obj-$(CONFIG_ARM_OMAP2PLUS_CPUFREQ)+= omap-cpufreq.o
obj-$(CONFIG_ARM_SPEAR_CPUFREQ)+= spear-cpufreq.o
diff --git a/drivers/cpufreq/exynos5440-cpufreq.c
b/drivers/cpufreq/exynos5440-cpufreq.c
new file mode 100644
index 000..2dc43b1
--- /dev/null
+++ b/drivers/cpufreq/exynos5440-cpufreq.c
@@ -0,0 +1,450 @@
+/*
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * Amit Daniel Kachhap amit.dan...@samsung.com
+ *
+ * EXYNOS5440 - CPU frequency scaling support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include linux/clk.h
+#include linux/cpu.h
+#include linux/cpufreq.h
+#include linux/err.h
+#include linux/interrupt.h
[PATCH 4/4] ARM: s3c24xx: Fix switching FIFO in arch_enable_uart_fifo function
When CONFIG_S3C_BOOT_UART_FORCE_FIFO symbol is set, we should enable FIFO but actually switch command is missing in the code. This patch adds this switch. Signed-off-by: Alexander Shiyan shc_w...@mail.ru --- arch/arm/plat-samsung/include/plat/uncompress.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/plat-samsung/include/plat/uncompress.h b/arch/arm/plat-samsung/include/plat/uncompress.h index 438b248..30fedd9 100644 --- a/arch/arm/plat-samsung/include/plat/uncompress.h +++ b/arch/arm/plat-samsung/include/plat/uncompress.h @@ -130,6 +130,8 @@ static inline void arch_enable_uart_fifo(void) if (!(fifocon S3C2410_UFCON_RESETBOTH)) break; } + + uart_wr(S3C2410_UFCON, S3C2410_UFCON_FIFOMODE); } } #else -- 1.7.12.4 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/4] ARM: s3c24xx: Removed unneeded dependency on ARCH_S3C24XX for boards
On Saturday 02 March 2013, Alexander Shiyan wrote: Board options are already under if ARCH_S3C24XX condition, so additional dependencies on this symbol can be removed. Signed-off-by: Alexander Shiyan shc_w...@mail.ru Hi Alexander, Is this just a cosmetic change that has no other consequences, or do you have other follow-up patches that depend on patches 1-3? Arnd -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: State of pinctrl and exynos5250?
Hello Doug, On Friday 01 of March 2013 16:19:39 Doug Anderson wrote: Thomas and Tomasz, I'm trying to get my head wrapped around the state of pinctrl for exynos5250. I see various patches that have floated around at times but it doesn't look like anything has landed. It would be really nice to get this resolved since I think it blocks getting eint support landed for exynos5250 and that blocks getting many peripherals working on the ARM Chromebook. It's great that finally someone noticed the problem (despite my comments to patches adding more and more cruft using the GPIO specifier hack). I'm still a little new to the world on pinctrl so hopefully nothing below is too stupidly wrong... It's always better to ask than to get something completely wrong. Patches that seem to be relevant (NOTE: all of these need pinctrl-exynos5250 fixed to exynos5250-pinctrl): pinctrl: exynos: add exynos5250 SoC specific data - https://patchwork.kernel.org/patch/1871901/ gpio: samsung: skip gpiolib registration if pinctrl support is enabled for exynos5250 - https://patchwork.kernel.org/patch/1871911/ arm: exynos: skip wakeup interrupt registration for exynos5250 if pinctrl is enabled - https://patchwork.kernel.org/patch/1871921/ The 4 patches above are already merged in Kgene's for-next-next (for 3.10) branch. ARM: dts: add pinctrl nodes for Exynos5250 SoC - https://patchwork.kernel.org/patch/1871991/ This one is not merged yet. Since I do not know much about Exynos 5250, I could not verify any hardware-specific details in the patch, just the general correctness of the patch. -- NOTE: Appears to be missing pinctrl_1 and pinctrl_2. That prevents me from compiling with i2c arbitration patches landed since I need gpf0. Indeed. I would prefer adding all of them at once. -- NOTE: Appears (IIRC) to have incorrect interrupt for pinctrl_3. I believe that 45 is pinctrl_1. Maybe 3 is 47? I can't verify this, unfortunately. -- NIT NOTE: It appears sd0_busN is strangely specified. Specifically sd0_bus4 includes the pins for sd0_bus1 but sd0_bus8 doesn't. Yes, it is at least somewhat inconsitent. For now this is not really a problem, but eventually it will have to be sanitized. However, note that although sd0_bus8 has the same samsung,pin-function as sd0_bus4, this is no longer the case for sd2_bus8 and sd2_bus4. I would suggest making all the three separate from each other, so 1-bit bus node would just specify sd0_bus1, 4-bit would specify sd0_bus1 and sd0_bus4 and 8-bit all the three. --- I've got all of the above patches fixed up in my local tree (including adding really basic support for pinctrl_1 and pinctrl_2). ...but my machine doesn't boot all the way. I think that's because many of the peripherals don't yet understand pinctrl. Specifically I get delightful looking error messages at bootup that look like: [0.44] _gpio_request: gpio-36 (i2c-bus) status -16 [0.445000] s3c-i2c s3c2440-i2c.0: gpio [36] request failed I then replaced some of the muxing via GPIO with muxing via pinctrl for i2c parts, like: - gpios = gpb3 0 2 3 0, - gpb3 1 2 3 0; + pinctrl-0 = i2c0_bus; + pinctrl-names = default; ...and I got rid of those errors, but it looks like we're missing pinctrl support for the ever-important dw_mmc. [0.91] Synopsys Designware Multimedia Card Interface Driver [0.915000] dwmmc_exynos dw_mmc.0: Using internal DMA controller. [0.92] dwmmc_exynos dw_mmc.0: DW MMC controller at irq 107, 32 bit host data width, 128 deep fifo [0.93] of_get_named_gpio_flags exited with status 40 [0.935000] of_get_named_gpio_flags: can't parse gpios property [0.94] dwmmc_exynos dw_mmc.0: invalid gpio: -2 [0.945000] dwmmc_exynos: probe of dw_mmc.0 failed with error -22 We also need it for spi-s3c64xx.c but that's less of a critical component. [0.405000] of_get_named_gpio_flags exited with status 18 [0.41] /spi@12d3: could not get #gpio-cells for /pinctrl@1140/i2c0-bus [0.415000] of_get_named_gpio_flags: can't parse gpios property [0.42] s3c64xx-spi exynos4210-spi.1: invalid gpio[1]: -22 [0.425000] s3c64xx-spi: probe of exynos4210-spi.1 failed with error -16 Those are the drivers that have their muxing state defined using the old hacky samsung gpio descriptor. Hmmm, it also looks like I need to update other gpio references too (gpio-keys, i2c-arbitrator, hpd-gpio) since the GPIO specifier has changed now that it's based on pinmux. I guess you either need to move a whole architecture (all of exynos5250) at once since you can't mix and match. Correct. IMHO that means we've got the following work ahead of us: 1. Add pinctrl support to dw_mmc-exynos (with backward compability for GPIO specifier) 2. Add pinctrl support to spi-s3c64xx.c (with backward compability for GPIO
Re[2]: [PATCH 1/4] ARM: s3c24xx: Removed unneeded dependency on ARCH_S3C24XX for boards
On Saturday 02 March 2013, Alexander Shiyan wrote: Board options are already under if ARCH_S3C24XX condition, so additional dependencies on this symbol can be removed. Signed-off-by: Alexander Shiyan shc_w...@mail.ru Hi Alexander, Is this just a cosmetic change that has no other consequences, or do you have other follow-up patches that depend on patches 1-3? Hello Arnd. Nothing more yet. Perhaps I'll do a merging some parts of the code for different versions of the CPU into one unit and some future changes may remove some Kconfig symbols, so it is only initial Kconfig cleaning. Thanks. ---
[PATCH] ARM: S5PV210: Fix PL330 DMA controller clkdev entries
Since the DMA controller clocks are managed at amba bus level,
the PL330 device clocks handling has been removed from the driver
in commit 7c71b8eb268ee38235f7e924d943ea9d90e59469
DMA: PL330: Remove redundant runtime_suspend/resume functions
However, this left the S5PV210 platform with only clkdev entries
linking apb_pclk clock conn_id to a dummy clock, rather than
to corresponding platform PL330 DMAC clock.
As a result the DMA controller is now attempted to be used on
S5PV210 with the clock disabled and the driver fails with an
error:
dma-pl330 dma-pl330.0: PERIPH_ID 0x0, PCELL_ID 0x0 !
dma-pl330: probe of dma-pl330.0 failed with error -22
dma-pl330 dma-pl330.1: PERIPH_ID 0x0, PCELL_ID 0x0 !
dma-pl330: probe of dma-pl330.1 failed with error -22
Fix this by adding apb_pclk clkdev entries for the Peripheral
DMA controllers 0/1 and removing the dummy apb_pclk clock.
Reported-by: Lonsn lonsn2...@gmail.com
Cc: Inderpal Singh inderpal.si...@linaro.org
Cc: Boojin Kim boojin@samsung.com
Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
---
Lonsn, could you check if this patch solves the problem for you,
please ? Any Tested-by are welcome.
I didn't test this patch on any hardware yet. Once it is confirmed
I would resend it, also for stable kernels. It seems this issue is
present since v3.7.
Thanks.
---
arch/arm/mach-s5pv210/clock.c | 36 ++--
1 files changed, 18 insertions(+), 18 deletions(-)
diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c
index fcdf52d..f051f53 100644
--- a/arch/arm/mach-s5pv210/clock.c
+++ b/arch/arm/mach-s5pv210/clock.c
@@ -214,11 +214,6 @@ static struct clk clk_pcmcdclk2 = {
.name = pcmcdclk,
};
-static struct clk dummy_apb_pclk = {
- .name = apb_pclk,
- .id = -1,
-};
-
static struct clk *clkset_vpllsrc_list[] = {
[0] = clk_fin_vpll,
[1] = clk_sclk_hdmi27m,
@@ -305,18 +300,6 @@ static struct clk_ops clk_fout_apll_ops = {
static struct clk init_clocks_off[] = {
{
- .name = dma,
- .devname= dma-pl330.0,
- .parent = clk_hclk_psys.clk,
- .enable = s5pv210_clk_ip0_ctrl,
- .ctrlbit= (1 3),
- }, {
- .name = dma,
- .devname= dma-pl330.1,
- .parent = clk_hclk_psys.clk,
- .enable = s5pv210_clk_ip0_ctrl,
- .ctrlbit= (1 4),
- }, {
.name = rot,
.parent = clk_hclk_dsys.clk,
.enable = s5pv210_clk_ip0_ctrl,
@@ -573,6 +556,20 @@ static struct clk clk_hsmmc3 = {
.ctrlbit= (119),
};
+static struct clk clk_pdma0 = {
+ .name = pdma0,
+ .parent = clk_hclk_psys.clk,
+ .enable = s5pv210_clk_ip0_ctrl,
+ .ctrlbit= (1 3),
+};
+
+static struct clk clk_pdma1 = {
+ .name = pdma1,
+ .parent = clk_hclk_psys.clk,
+ .enable = s5pv210_clk_ip0_ctrl,
+ .ctrlbit= (1 4),
+};
+
static struct clk *clkset_uart_list[] = {
[6] = clk_mout_mpll.clk,
[7] = clk_mout_epll.clk,
@@ -1075,6 +1072,8 @@ static struct clk *clk_cdev[] = {
clk_hsmmc1,
clk_hsmmc2,
clk_hsmmc3,
+ clk_pdma0,
+ clk_pdma1,
};
/* Clock initialisation code */
@@ -1333,6 +1332,8 @@ static struct clk_lookup s5pv210_clk_lookup[] = {
CLKDEV_INIT(NULL, spi_busclk0, clk_p),
CLKDEV_INIT(s5pv210-spi.0, spi_busclk1, clk_sclk_spi0.clk),
CLKDEV_INIT(s5pv210-spi.1, spi_busclk1, clk_sclk_spi1.clk),
+ CLKDEV_INIT(dma-pl330.0, apb_pclk, clk_pdma0),
+ CLKDEV_INIT(dma-pl330.1, apb_pclk, clk_pdma1),
};
void __init s5pv210_register_clocks(void)
@@ -1361,6 +1362,5 @@ void __init s5pv210_register_clocks(void)
for (ptr = 0; ptr ARRAY_SIZE(clk_cdev); ptr++)
s3c_disable_clocks(clk_cdev[ptr], 1);
- s3c24xx_register_clock(dummy_apb_pclk);
s3c_pwmclk_init();
}
--
1.7.4.1
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[PATCH v2 03/10] usb: dwc3: Enable runtime pm only after PHYs are initialized
Allow dwc3 to enable auto power management only after its PHYs are initialized so that any further PHY handling by dwc3's runtime power management callbacks is fine. Signed-off-by: Vivek Gautam gautam.vi...@samsung.com --- drivers/usb/dwc3/core.c |8 1 files changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index 85914e0..2a77327 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -453,10 +453,6 @@ static int dwc3_probe(struct platform_device *pdev) dwc-needs_fifo_resize = of_property_read_bool(node, tx-fifo-resize); - pm_runtime_enable(dev); - pm_runtime_get_sync(dev); - pm_runtime_forbid(dev); - dwc3_cache_hwparams(dwc); ret = dwc3_alloc_event_buffers(dwc, DWC3_EVENT_BUFFERS_SIZE); @@ -478,6 +474,10 @@ static int dwc3_probe(struct platform_device *pdev) goto err1; } + pm_runtime_enable(dev); + pm_runtime_get_sync(dev); + pm_runtime_forbid(dev); + if (IS_ENABLED(CONFIG_USB_DWC3_HOST)) mode = DWC3_MODE_HOST; else if (IS_ENABLED(CONFIG_USB_DWC3_GADGET)) -- 1.7.6.5 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 07/10] usb: phy: samsung: Enable runtime power management on usb3phy
Enable autosuspending of Samsung usb3.0 PHY Signed-off-by: Vivek Gautam gautam.vi...@samsung.com --- drivers/usb/phy/samsung-usb3phy.c |7 +++ 1 files changed, 7 insertions(+), 0 deletions(-) diff --git a/drivers/usb/phy/samsung-usb3phy.c b/drivers/usb/phy/samsung-usb3phy.c index 70e2c7b..7594cc7 100644 --- a/drivers/usb/phy/samsung-usb3phy.c +++ b/drivers/usb/phy/samsung-usb3phy.c @@ -24,6 +24,7 @@ #include linux/err.h #include linux/io.h #include linux/of.h +#include linux/pm_runtime.h #include linux/usb/samsung_usb_phy.h #include linux/platform_data/samsung-usbphy.h @@ -287,6 +288,8 @@ static int samsung_usb3phy_probe(struct platform_device *pdev) platform_set_drvdata(pdev, sphy); + pm_runtime_enable(pdev-dev); + return usb_add_phy(sphy-phy, USB_PHY_TYPE_USB3); } @@ -296,6 +299,10 @@ static int samsung_usb3phy_remove(struct platform_device *pdev) usb_remove_phy(sphy-phy); + if (!pm_runtime_suspended(pdev-dev)) + pm_runtime_put(pdev-dev); + pm_runtime_disable(pdev-dev); + if (sphy-pmuregs) iounmap(sphy-pmuregs); if (sphy-sysreg) -- 1.7.6.5 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 09/10] usb: phy: samsung: Add support for PHY ref_clk gpio
Exynos5250 has external PLL (XusbXTI) for USB 3.0 PHY's
ref_pad_clk. So use this clock based on availability of
gpio to power control this PLL, otherwise use internal
clock only from XXTI.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
---
drivers/usb/phy/samsung-usb3phy.c | 14 ++
drivers/usb/phy/samsung-usbphy.c | 26 ++
drivers/usb/phy/samsung-usbphy.h |1 +
3 files changed, 37 insertions(+), 4 deletions(-)
diff --git a/drivers/usb/phy/samsung-usb3phy.c
b/drivers/usb/phy/samsung-usb3phy.c
index 46dd97c..16b024e 100644
--- a/drivers/usb/phy/samsung-usb3phy.c
+++ b/drivers/usb/phy/samsung-usb3phy.c
@@ -24,6 +24,7 @@
#include linux/err.h
#include linux/io.h
#include linux/of.h
+#include linux/gpio.h
#include linux/pm_runtime.h
#include linux/usb/samsung_usb_phy.h
#include linux/platform_data/samsung-usbphy.h
@@ -224,12 +225,17 @@ static int samsung_exynos5_usb3phy_init(struct usb_phy
*phy, bool use_ext_clk)
*/
static int samsung_usb3phy_init(struct usb_phy *phy)
{
+ struct samsung_usbphy *sphy = phy_to_sphy(phy);
+
/*
-* We start with using PHY refclk from external PLL,
-* once runtime suspend for the device is called this
-* will change to internal core clock
+* We check if we have a PHY ref_clk gpio available, then only
+* use XusbXTI (external PLL); otherwise use internal core clock
+* from XXTI.
*/
- return samsung_exynos5_usb3phy_init(phy, true);
+ if (gpio_is_valid(sphy-phyclk_gpio))
+ return samsung_exynos5_usb3phy_init(phy, true);
+ else
+ return samsung_exynos5_usb3phy_init(phy, false);
}
/*
diff --git a/drivers/usb/phy/samsung-usbphy.c b/drivers/usb/phy/samsung-usbphy.c
index ab4fa11..6968d12 100644
--- a/drivers/usb/phy/samsung-usbphy.c
+++ b/drivers/usb/phy/samsung-usbphy.c
@@ -27,6 +27,7 @@
#include linux/io.h
#include linux/of.h
#include linux/of_address.h
+#include linux/of_gpio.h
#include linux/usb/samsung_usb_phy.h
#include samsung-usbphy.h
@@ -34,6 +35,7 @@
int samsung_usbphy_parse_dt(struct samsung_usbphy *sphy)
{
struct device_node *usbphy_sys;
+ int ret;
/* Getting node for system controller interface for usb-phy */
usbphy_sys = of_get_child_by_name(sphy-dev-of_node, usbphy-sys);
@@ -58,6 +60,30 @@ int samsung_usbphy_parse_dt(struct samsung_usbphy *sphy)
if (sphy-sysreg == NULL)
dev_warn(sphy-dev, Can't get usb-phy sysreg cfg register\n);
+ /* Getting PHY clk gpio here to enable/disable PHY clock PLL, if any */
+ sphy-phyclk_gpio = of_get_named_gpio(sphy-dev-of_node,
+ samsung,phyclk-gpio, 0);
+ /*
+* We don't want to return error code here in case we don't get the
+* PHY clock gpio, some PHYs may not have it.
+*/
+ if (gpio_is_valid(sphy-phyclk_gpio)) {
+ ret = gpio_request_one(sphy-phyclk_gpio, GPIOF_INIT_HIGH,
+ samsung_usb_phy_clock_en);
+ if (ret) {
+ /*
+* We don't want to return error code here,
+* sometimes either of usb2 phy or usb3 phy may not
+* have the PHY clock gpio.
+*/
+ dev_err(sphy-dev, can't request phyclk gpio %d\n,
+ sphy-phyclk_gpio);
+ sphy-phyclk_gpio = -EINVAL;
+ }
+ } else {
+ dev_warn(sphy-dev, Can't get usb-phy clock gpio\n);
+ }
+
of_node_put(usbphy_sys);
return 0;
diff --git a/drivers/usb/phy/samsung-usbphy.h b/drivers/usb/phy/samsung-usbphy.h
index f7e657d..1921ab0 100644
--- a/drivers/usb/phy/samsung-usbphy.h
+++ b/drivers/usb/phy/samsung-usbphy.h
@@ -300,6 +300,7 @@ struct samsung_usbphy {
enum samsung_usb_phy_type phy_type;
atomic_tphy_usage;
spinlock_t lock;
+ int phyclk_gpio;
};
#define phy_to_sphy(x) container_of((x), struct samsung_usbphy, phy)
--
1.7.6.5
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[PATCH v2 05/10] usb: dwc3: exynos: Enable runtime power management
Enabling runtime power management on dwc3-exynos
letting dwc3 controller to be autosuspended on exynos
platform when not in use.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
---
drivers/usb/dwc3/dwc3-exynos.c | 13 +
1 files changed, 13 insertions(+), 0 deletions(-)
diff --git a/drivers/usb/dwc3/dwc3-exynos.c b/drivers/usb/dwc3/dwc3-exynos.c
index e6771d9..28b5f8a 100644
--- a/drivers/usb/dwc3/dwc3-exynos.c
+++ b/drivers/usb/dwc3/dwc3-exynos.c
@@ -19,6 +19,7 @@
#include linux/platform_data/dwc3-exynos.h
#include linux/dma-mapping.h
#include linux/clk.h
+#include linux/pm_runtime.h
#include linux/usb/otg.h
#include linux/usb/nop-usb-xceiv.h
#include linux/of.h
@@ -143,6 +144,10 @@ static int dwc3_exynos_probe(struct platform_device *pdev)
exynos-dev = dev;
exynos-clk = clk;
+ pm_runtime_enable(dev);
+ pm_runtime_get_sync(dev);
+ pm_runtime_forbid(dev);
+
clk_enable(exynos-clk);
ret = platform_device_add_resources(dwc3, pdev-resource,
@@ -158,10 +163,14 @@ static int dwc3_exynos_probe(struct platform_device *pdev)
goto err2;
}
+ pm_runtime_put_sync(dev);
+ pm_runtime_allow(dev);
+
return 0;
err2:
clk_disable(clk);
+ pm_runtime_disable(dev);
err1:
platform_device_put(dwc3);
@@ -172,6 +181,10 @@ static int dwc3_exynos_remove(struct platform_device *pdev)
{
struct dwc3_exynos *exynos = platform_get_drvdata(pdev);
+ if (!pm_runtime_suspended(pdev-dev))
+ pm_runtime_put(pdev-dev);
+ pm_runtime_disable(pdev-dev);
+
platform_device_unregister(exynos-dwc3);
platform_device_unregister(exynos-usb2_phy);
platform_device_unregister(exynos-usb3_phy);
--
1.7.6.5
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[PATCH v2 06/10] usb: xhci: Enable runtime pm in xhci-plat
By enabling runtime pm in this driver allows users of xhci-plat to enter into runtime pm. This is not full runtime pm support (AKA xhci-plat doesn't actually power anything off when in runtime suspend mode) but, just basic enablement. Signed-off-by: Vivek Gautam gautam.vi...@samsung.com CC: Doug Anderson diand...@chromium.org --- drivers/usb/host/xhci-plat.c |7 +++ 1 files changed, 7 insertions(+), 0 deletions(-) diff --git a/drivers/usb/host/xhci-plat.c b/drivers/usb/host/xhci-plat.c index c9c7e13..595cb52 100644 --- a/drivers/usb/host/xhci-plat.c +++ b/drivers/usb/host/xhci-plat.c @@ -12,6 +12,7 @@ */ #include linux/platform_device.h +#include linux/pm_runtime.h #include linux/module.h #include linux/slab.h @@ -149,6 +150,8 @@ static int xhci_plat_probe(struct platform_device *pdev) if (ret) goto put_usb3_hcd; + pm_runtime_enable(pdev-dev); + return 0; put_usb3_hcd: @@ -174,6 +177,10 @@ static int xhci_plat_remove(struct platform_device *dev) struct usb_hcd *hcd = platform_get_drvdata(dev); struct xhci_hcd *xhci = hcd_to_xhci(hcd); + if (!pm_runtime_suspended(dev-dev)) + pm_runtime_put(dev-dev); + pm_runtime_disable(dev-dev); + usb_remove_hcd(xhci-shared_hcd); usb_put_hcd(xhci-shared_hcd); -- 1.7.6.5 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 08/10] usb: phy: samsung: Add support for external reference clock
The PHY controller can choose between ref_pad_clk (XusbXTI-external PLL),
or EXTREFCLK (XXTI-internal clock crystal) to generate the required clock.
Adding the provision for ref_pad_clk here.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
---
drivers/usb/phy/samsung-usb3phy.c | 46 -
1 files changed, 40 insertions(+), 6 deletions(-)
diff --git a/drivers/usb/phy/samsung-usb3phy.c
b/drivers/usb/phy/samsung-usb3phy.c
index 7594cc7..46dd97c 100644
--- a/drivers/usb/phy/samsung-usb3phy.c
+++ b/drivers/usb/phy/samsung-usb3phy.c
@@ -33,7 +33,7 @@
/*
* Sets the phy clk as EXTREFCLK (XXTI) which is internal clock from clock
core.
*/
-static u32 samsung_usb3phy_set_refclk(struct samsung_usbphy *sphy)
+static u32 samsung_usb3phy_set_refclk_int(struct samsung_usbphy *sphy)
{
u32 reg;
u32 refclk;
@@ -66,7 +66,22 @@ static u32 samsung_usb3phy_set_refclk(struct samsung_usbphy
*sphy)
return reg;
}
-static int samsung_exynos5_usb3phy_enable(struct samsung_usbphy *sphy)
+/*
+ * Sets the phy clk as ref_pad_clk (XusbXTI) which is clock from external PLL.
+ */
+static u32 samsung_usb3phy_set_refclk_ext(void)
+{
+ u32 reg;
+
+ reg = PHYCLKRST_REFCLKSEL_PAD_REFCLK |
+ PHYCLKRST_FSEL_PAD_100MHZ |
+ PHYCLKRST_MPLL_MULTIPLIER_100MHZ_REF;
+
+ return reg;
+}
+
+static int samsung_exynos5_usb3phy_enable(struct samsung_usbphy *sphy,
+ bool use_ext_clk)
{
void __iomem *regs = sphy-regs;
u32 phyparam0;
@@ -81,7 +96,10 @@ static int samsung_exynos5_usb3phy_enable(struct
samsung_usbphy *sphy)
phyparam0 = readl(regs + EXYNOS5_DRD_PHYPARAM0);
/* Select PHY CLK source */
- phyparam0 = ~PHYPARAM0_REF_USE_PAD;
+ if (use_ext_clk)
+ phyparam0 |= PHYPARAM0_REF_USE_PAD;
+ else
+ phyparam0 = ~PHYPARAM0_REF_USE_PAD;
/* Set Loss-of-Signal Detector sensitivity */
phyparam0 = ~PHYPARAM0_REF_LOSLEVEL_MASK;
phyparam0 |= PHYPARAM0_REF_LOSLEVEL;
@@ -116,7 +134,10 @@ static int samsung_exynos5_usb3phy_enable(struct
samsung_usbphy *sphy)
/* UTMI Power Control */
writel(PHYUTMI_OTGDISABLE, regs + EXYNOS5_DRD_PHYUTMI);
- phyclkrst = samsung_usb3phy_set_refclk(sphy);
+ if (use_ext_clk)
+ phyclkrst = samsung_usb3phy_set_refclk_ext();
+ else
+ phyclkrst = samsung_usb3phy_set_refclk_int(sphy);
phyclkrst |= PHYCLKRST_PORTRESET |
/* Digital power supply in normal operating mode */
@@ -164,7 +185,7 @@ static void samsung_exynos5_usb3phy_disable(struct
samsung_usbphy *sphy)
writel(phytest, regs + EXYNOS5_DRD_PHYTEST);
}
-static int samsung_usb3phy_init(struct usb_phy *phy)
+static int samsung_exynos5_usb3phy_init(struct usb_phy *phy, bool use_ext_clk)
{
struct samsung_usbphy *sphy;
unsigned long flags;
@@ -188,7 +209,7 @@ static int samsung_usb3phy_init(struct usb_phy *phy)
samsung_usbphy_set_isolation(sphy, false);
/* Initialize usb phy registers */
- samsung_exynos5_usb3phy_enable(sphy);
+ samsung_exynos5_usb3phy_enable(sphy, use_ext_clk);
spin_unlock_irqrestore(sphy-lock, flags);
@@ -199,6 +220,19 @@ static int samsung_usb3phy_init(struct usb_phy *phy)
}
/*
+ * The function passed to the usb driver for phy initialization
+ */
+static int samsung_usb3phy_init(struct usb_phy *phy)
+{
+ /*
+* We start with using PHY refclk from external PLL,
+* once runtime suspend for the device is called this
+* will change to internal core clock
+*/
+ return samsung_exynos5_usb3phy_init(phy, true);
+}
+
+/*
* The function passed to the usb driver for phy shutdown
*/
static void samsung_usb3phy_shutdown(struct usb_phy *phy)
--
1.7.6.5
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[PATCH v2 01/10] usb: phy: Add APIs for runtime power management
Adding APIs to handle runtime power management on PHY
devices. PHY consumers may need to wake-up/suspend PHYs
when they work across autosuspend.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
---
include/linux/usb/phy.h | 26 ++
1 files changed, 26 insertions(+), 0 deletions(-)
diff --git a/include/linux/usb/phy.h b/include/linux/usb/phy.h
index 15847cb..0fe7cac 100644
--- a/include/linux/usb/phy.h
+++ b/include/linux/usb/phy.h
@@ -276,4 +276,30 @@ static inline const char *usb_phy_type_string(enum
usb_phy_type type)
return UNKNOWN PHY TYPE;
}
}
+
+#define USB_PHY_AUTOPM(function) \
+static inline int usb_phy_autopm_##function(struct usb_phy *x) \
+{ \
+ if (!x || !x-dev) {\
+ dev_err(x-dev, no PHY or attached device available\n); \
+ return -ENODEV; \
+ } \
+ \
+ pm_runtime_##function(x-dev); \
+ \
+ return 0; \
+}
+USB_PHY_AUTOPM(enable)
+USB_PHY_AUTOPM(disable)
+USB_PHY_AUTOPM(get)
+USB_PHY_AUTOPM(get_sync)
+USB_PHY_AUTOPM(put)
+USB_PHY_AUTOPM(put_sync)
+USB_PHY_AUTOPM(allow)
+USB_PHY_AUTOPM(forbid)
+USB_PHY_AUTOPM(suspend)
+USB_PHY_AUTOPM(autosuspend)
+USB_PHY_AUTOPM(resume)
+USB_PHY_AUTOPM(set_active)
+
#endif /* __LINUX_USB_PHY_H */
--
1.7.6.5
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[PATCH v2 04/10] usb: dwc3: Add runtime power management callbacks
Right now it doesn't handle full runtime suspend/resume
functionality. However it allows to handle PHYs' sleep
and wakeup across runtime suspend/resume.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
---
drivers/usb/dwc3/core.c | 27 +++
1 files changed, 27 insertions(+), 0 deletions(-)
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 2a77327..45e1aae 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -704,11 +704,38 @@ static int dwc3_resume(struct device *dev)
return 0;
}
+#ifdef CONFIG_PM_RUNTIME
+static int dwc3_runtime_suspend(struct device *dev)
+{
+ struct dwc3 *dwc = dev_get_drvdata(dev);
+
+ usb_phy_autopm_put_sync(dwc-usb2_phy);
+ usb_phy_autopm_put_sync(dwc-usb3_phy);
+
+ return 0;
+}
+
+static int dwc3_runtime_resume(struct device *dev)
+{
+ struct dwc3 *dwc = dev_get_drvdata(dev);
+
+ usb_phy_autopm_get_sync(dwc-usb2_phy);
+ usb_phy_autopm_get_sync(dwc-usb3_phy);
+
+ return 0;
+}
+#else
+#define dwc3_runtime_suspend NULL
+#define dwc3_runtime_resumeNULL
+#endif
+
static const struct dev_pm_ops dwc3_dev_pm_ops = {
.prepare= dwc3_prepare,
.complete = dwc3_complete,
SET_SYSTEM_SLEEP_PM_OPS(dwc3_suspend, dwc3_resume)
+ SET_RUNTIME_PM_OPS(dwc3_runtime_suspend,
+ dwc3_runtime_resume, NULL)
};
#define DWC3_PM_OPS(dwc3_dev_pm_ops)
--
1.7.6.5
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[PATCH] usb: dwc3: Set DWC3 context's mode based on selected mode.
Now that machines may select the mode of working of DWC3 (HOST only,
GADGET only or DUAL_ROLE), lets set DWC3 mode based on that
rather than fixing it to whatever DWC3 hardware says.
This way we can skip initializing Gadget/Host in case
we are using Host-only/Gadget-only mode respectively.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
---
Changes from RFC patch usb: dwc3: Set GCTL.PrtCapDir based on selected mode
- Setting the mode in dwc3 context structure based on
selected mode in machine, rather than programming PrtCapDir
drivers/usb/dwc3/core.c |7 ++-
1 files changed, 6 insertions(+), 1 deletions(-)
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 79f335f..be0672f 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -478,7 +478,12 @@ static int dwc3_probe(struct platform_device *pdev)
goto err1;
}
- mode = DWC3_MODE(dwc-hwparams.hwparams0);
+ if (IS_ENABLED(CONFIG_USB_DWC3_HOST))
+ mode = DWC3_MODE_HOST;
+ else if (IS_ENABLED(CONFIG_USB_DWC3_GADGET))
+ mode = DWC3_MODE_DEVICE;
+ else
+ mode = DWC3_MODE_DRD;
switch (mode) {
case DWC3_MODE_DEVICE:
--
1.7.6.5
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[PATCH v2 02/10] USB: dwc3: Adjust runtime pm to allow autosuspend
The current code in the dwc3 probe effectively disables runtime pm from ever working because it calls a get() that was never put() until device removal. Change the runtime pm code to match the standard formula and allow runtime pm to function. Signed-off-by: Vivek Gautam gautam.vi...@samsung.com CC: Doug Anderson diand...@chromium.org --- drivers/usb/dwc3/core.c |5 - 1 files changed, 4 insertions(+), 1 deletions(-) diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index be0672f..85914e0 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -528,6 +528,7 @@ static int dwc3_probe(struct platform_device *pdev) goto err3; } + pm_runtime_put_sync(dev); pm_runtime_allow(dev); return 0; @@ -557,6 +558,7 @@ err1: err0: dwc3_free_event_buffers(dwc); + pm_runtime_disable(pdev-dev); return ret; } @@ -568,7 +570,8 @@ static int dwc3_remove(struct platform_device *pdev) usb_phy_set_suspend(dwc-usb2_phy, 1); usb_phy_set_suspend(dwc-usb3_phy, 1); - pm_runtime_put(pdev-dev); + if (!pm_runtime_suspended(pdev-dev)) + pm_runtime_put(pdev-dev); pm_runtime_disable(pdev-dev); dwc3_debugfs_exit(dwc); -- 1.7.6.5 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] ARM: S5PV210: Fix PL330 DMA controller clkdev entries
于 2013/3/2 20:38, Sylwester Nawrocki 写道:
Since the DMA controller clocks are managed at amba bus level,
the PL330 device clocks handling has been removed from the driver
in commit 7c71b8eb268ee38235f7e924d943ea9d90e59469
DMA: PL330: Remove redundant runtime_suspend/resume functions
However, this left the S5PV210 platform with only clkdev entries
linking apb_pclk clock conn_id to a dummy clock, rather than
to corresponding platform PL330 DMAC clock.
As a result the DMA controller is now attempted to be used on
S5PV210 with the clock disabled and the driver fails with an
error:
dma-pl330 dma-pl330.0: PERIPH_ID 0x0, PCELL_ID 0x0 !
dma-pl330: probe of dma-pl330.0 failed with error -22
dma-pl330 dma-pl330.1: PERIPH_ID 0x0, PCELL_ID 0x0 !
dma-pl330: probe of dma-pl330.1 failed with error -22
Fix this by adding apb_pclk clkdev entries for the Peripheral
DMA controllers 0/1 and removing the dummy apb_pclk clock.
Reported-by: Lonsn lonsn2...@gmail.com
Cc: Inderpal Singh inderpal.si...@linaro.org
Cc: Boojin Kim boojin@samsung.com
Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
---
Lonsn, could you check if this patch solves the problem for you,
please ? Any Tested-by are welcome.
I didn't test this patch on any hardware yet. Once it is confirmed
I would resend it, also for stable kernels. It seems this issue is
present since v3.7.
Sylwester, I have tested this patch and confirmed it's OK in my S5PV210
platform.
Thanks.
---
arch/arm/mach-s5pv210/clock.c | 36 ++--
1 files changed, 18 insertions(+), 18 deletions(-)
diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c
index fcdf52d..f051f53 100644
--- a/arch/arm/mach-s5pv210/clock.c
+++ b/arch/arm/mach-s5pv210/clock.c
@@ -214,11 +214,6 @@ static struct clk clk_pcmcdclk2 = {
.name = pcmcdclk,
};
-static struct clk dummy_apb_pclk = {
- .name = apb_pclk,
- .id = -1,
-};
-
static struct clk *clkset_vpllsrc_list[] = {
[0] = clk_fin_vpll,
[1] = clk_sclk_hdmi27m,
@@ -305,18 +300,6 @@ static struct clk_ops clk_fout_apll_ops = {
static struct clk init_clocks_off[] = {
{
- .name = dma,
- .devname= dma-pl330.0,
- .parent = clk_hclk_psys.clk,
- .enable = s5pv210_clk_ip0_ctrl,
- .ctrlbit= (1 3),
- }, {
- .name = dma,
- .devname= dma-pl330.1,
- .parent = clk_hclk_psys.clk,
- .enable = s5pv210_clk_ip0_ctrl,
- .ctrlbit= (1 4),
- }, {
.name = rot,
.parent = clk_hclk_dsys.clk,
.enable = s5pv210_clk_ip0_ctrl,
@@ -573,6 +556,20 @@ static struct clk clk_hsmmc3 = {
.ctrlbit= (119),
};
+static struct clk clk_pdma0 = {
+ .name = pdma0,
+ .parent = clk_hclk_psys.clk,
+ .enable = s5pv210_clk_ip0_ctrl,
+ .ctrlbit= (1 3),
+};
+
+static struct clk clk_pdma1 = {
+ .name = pdma1,
+ .parent = clk_hclk_psys.clk,
+ .enable = s5pv210_clk_ip0_ctrl,
+ .ctrlbit= (1 4),
+};
+
static struct clk *clkset_uart_list[] = {
[6] = clk_mout_mpll.clk,
[7] = clk_mout_epll.clk,
@@ -1075,6 +1072,8 @@ static struct clk *clk_cdev[] = {
clk_hsmmc1,
clk_hsmmc2,
clk_hsmmc3,
+ clk_pdma0,
+ clk_pdma1,
};
/* Clock initialisation code */
@@ -1333,6 +1332,8 @@ static struct clk_lookup s5pv210_clk_lookup[] = {
CLKDEV_INIT(NULL, spi_busclk0, clk_p),
CLKDEV_INIT(s5pv210-spi.0, spi_busclk1, clk_sclk_spi0.clk),
CLKDEV_INIT(s5pv210-spi.1, spi_busclk1, clk_sclk_spi1.clk),
+ CLKDEV_INIT(dma-pl330.0, apb_pclk, clk_pdma0),
+ CLKDEV_INIT(dma-pl330.1, apb_pclk, clk_pdma1),
};
void __init s5pv210_register_clocks(void)
@@ -1361,6 +1362,5 @@ void __init s5pv210_register_clocks(void)
for (ptr = 0; ptr ARRAY_SIZE(clk_cdev); ptr++)
s3c_disable_clocks(clk_cdev[ptr], 1);
- s3c24xx_register_clock(dummy_apb_pclk);
s3c_pwmclk_init();
}
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Re: [PATCH v2 06/10] usb: xhci: Enable runtime pm in xhci-plat
On Sat, 2 Mar 2013, Vivek Gautam wrote: By enabling runtime pm in this driver allows users of xhci-plat to enter into runtime pm. This is not full runtime pm support (AKA xhci-plat doesn't actually power anything off when in runtime suspend mode) but, just basic enablement. Signed-off-by: Vivek Gautam gautam.vi...@samsung.com CC: Doug Anderson diand...@chromium.org --- drivers/usb/host/xhci-plat.c |7 +++ 1 files changed, 7 insertions(+), 0 deletions(-) diff --git a/drivers/usb/host/xhci-plat.c b/drivers/usb/host/xhci-plat.c index c9c7e13..595cb52 100644 --- a/drivers/usb/host/xhci-plat.c +++ b/drivers/usb/host/xhci-plat.c @@ -12,6 +12,7 @@ */ #include linux/platform_device.h +#include linux/pm_runtime.h #include linux/module.h #include linux/slab.h @@ -149,6 +150,8 @@ static int xhci_plat_probe(struct platform_device *pdev) if (ret) goto put_usb3_hcd; + pm_runtime_enable(pdev-dev); This is generally not a good idea. You shouldn't enable a device for runtime PM without first telling the PM core what state it is in. @@ -174,6 +177,10 @@ static int xhci_plat_remove(struct platform_device *dev) struct usb_hcd *hcd = platform_get_drvdata(dev); struct xhci_hcd *xhci = hcd_to_xhci(hcd); + if (!pm_runtime_suspended(dev-dev)) + pm_runtime_put(dev-dev); + pm_runtime_disable(dev-dev); + usb_remove_hcd(xhci-shared_hcd); usb_put_hcd(xhci-shared_hcd); This is very strange. Why have a pm_runtime_put with no balancing pm_runtime_get? And why use an async routine when you're about to unbind the driver? Don't you want the callback to occur before the unbinding? Alan Stern -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 06/10] usb: xhci: Enable runtime pm in xhci-plat
Hi, On Sat, Mar 02, 2013 at 10:53:16AM -0500, Alan Stern wrote: On Sat, 2 Mar 2013, Vivek Gautam wrote: By enabling runtime pm in this driver allows users of xhci-plat to enter into runtime pm. This is not full runtime pm support (AKA xhci-plat doesn't actually power anything off when in runtime suspend mode) but, just basic enablement. Signed-off-by: Vivek Gautam gautam.vi...@samsung.com CC: Doug Anderson diand...@chromium.org --- drivers/usb/host/xhci-plat.c |7 +++ 1 files changed, 7 insertions(+), 0 deletions(-) diff --git a/drivers/usb/host/xhci-plat.c b/drivers/usb/host/xhci-plat.c index c9c7e13..595cb52 100644 --- a/drivers/usb/host/xhci-plat.c +++ b/drivers/usb/host/xhci-plat.c @@ -12,6 +12,7 @@ */ #include linux/platform_device.h +#include linux/pm_runtime.h #include linux/module.h #include linux/slab.h @@ -149,6 +150,8 @@ static int xhci_plat_probe(struct platform_device *pdev) if (ret) goto put_usb3_hcd; + pm_runtime_enable(pdev-dev); This is generally not a good idea. You shouldn't enable a device for runtime PM without first telling the PM core what state it is in. @@ -174,6 +177,10 @@ static int xhci_plat_remove(struct platform_device *dev) struct usb_hcd *hcd = platform_get_drvdata(dev); struct xhci_hcd *xhci = hcd_to_xhci(hcd); + if (!pm_runtime_suspended(dev-dev)) + pm_runtime_put(dev-dev); + pm_runtime_disable(dev-dev); + usb_remove_hcd(xhci-shared_hcd); usb_put_hcd(xhci-shared_hcd); This is very strange. Why have a pm_runtime_put with no balancing pm_runtime_get? this is good point and, in fact, a doubt I have myself. How are we supposed to check if device is suspended ? In case it _is_ suspended we might not be able to read device's registers due to clocks possibly being gated. Also, considering that some drivers are used in multiple platforms and those might behave differently when it comes to clock handling, how do we do that ? Should we require drivers to explicitly clk_get(); clk_prepare_enable(); pm_runtime_set_active(); pm_runtime_enable() ? While that's doable, I don't see how that'd be doable for OMAP since they want to hide clock handling from drivers. Any tips ? -- balbi signature.asc Description: Digital signature
Re: [PATCH v2 06/10] usb: xhci: Enable runtime pm in xhci-plat
On Sat, 2 Mar 2013, Felipe Balbi wrote: @@ -174,6 +177,10 @@ static int xhci_plat_remove(struct platform_device *dev) struct usb_hcd *hcd = platform_get_drvdata(dev); struct xhci_hcd *xhci = hcd_to_xhci(hcd); + if (!pm_runtime_suspended(dev-dev)) + pm_runtime_put(dev-dev); + pm_runtime_disable(dev-dev); + usb_remove_hcd(xhci-shared_hcd); usb_put_hcd(xhci-shared_hcd); This is very strange. Why have a pm_runtime_put with no balancing pm_runtime_get? this is good point and, in fact, a doubt I have myself. How are we supposed to check if device is suspended ? In case it _is_ suspended we might not be able to read device's registers due to clocks possibly being gated. That's really a separate question. It has a simple answer, though: If you want to access a device's registers, call pm_runtime_get_sync() beforehand and pm_runtime_put() (or _put_sync()) afterward. Then it won't matter if the device was suspended originally. If you actually do want to tell whether or not a device is suspended and nothing more, call pm_runtime_status_suspended(). Of course, this is racy -- the power state might change right after you make the call. Also, considering that some drivers are used in multiple platforms and those might behave differently when it comes to clock handling, how do we do that ? Should we require drivers to explicitly clk_get(); clk_prepare_enable(); pm_runtime_set_active(); pm_runtime_enable() ? I don't know much about clock handling. In general, the pm_runtime_set_active() and pm_runtime_enable() parts should be done by the subsystem, not the driver, whenever possible. While that's doable, I don't see how that'd be doable for OMAP since they want to hide clock handling from drivers. Any tips ? Whichever piece of code is responsible for associating a clock with a device should also be responsible for making sure that neither is suspended when the driver's probe routine runs. I'm not sure how different platforms do this; using a PM domain could be one answer. All this is somewhat off the point of my original comment, however. Drivers must be sure to balance their pm_runtime_get() and _put() calls. Having an unbalanced _put() in the remove routine is almost certainly a mistake -- especially if it is conditional on the device's power state, because a device can remain unsuspended even after the driver does a pm_runtime_put(). For example, this will happen if the user wrote on to /sys/.../power/control. Alan Stern -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 06/10] usb: xhci: Enable runtime pm in xhci-plat
Hi, On Sat, Mar 02, 2013 at 05:02:13PM -0500, Alan Stern wrote: On Sat, 2 Mar 2013, Felipe Balbi wrote: @@ -174,6 +177,10 @@ static int xhci_plat_remove(struct platform_device *dev) struct usb_hcd *hcd = platform_get_drvdata(dev); struct xhci_hcd *xhci = hcd_to_xhci(hcd); + if (!pm_runtime_suspended(dev-dev)) + pm_runtime_put(dev-dev); + pm_runtime_disable(dev-dev); + usb_remove_hcd(xhci-shared_hcd); usb_put_hcd(xhci-shared_hcd); This is very strange. Why have a pm_runtime_put with no balancing pm_runtime_get? this is good point and, in fact, a doubt I have myself. How are we supposed to check if device is suspended ? In case it _is_ suspended we might not be able to read device's registers due to clocks possibly being gated. That's really a separate question. It has a simple answer, though: If you want to access a device's registers, call pm_runtime_get_sync() beforehand and pm_runtime_put() (or _put_sync()) afterward. Then it won't matter if the device was suspended originally. that's alright, but how do you want me to check if my device is enabled or not before pm_runtime_enable() ? If you actually do want to tell whether or not a device is suspended and nothing more, call pm_runtime_status_suspended(). Of course, this is racy -- the power state might change right after you make the call. right. Also, considering that some drivers are used in multiple platforms and those might behave differently when it comes to clock handling, how do we do that ? Should we require drivers to explicitly clk_get(); clk_prepare_enable(); pm_runtime_set_active(); pm_runtime_enable() ? I don't know much about clock handling. In general, the pm_runtime_set_active() and pm_runtime_enable() parts should be done by the subsystem, not the driver, whenever possible. good to know :-) Though I disagree with calling pm_runtime_enable() at the subsystem level. This means we can add pm_runtime_set_active() While that's doable, I don't see how that'd be doable for OMAP since they want to hide clock handling from drivers. Any tips ? Whichever piece of code is responsible for associating a clock with a device should also be responsible for making sure that neither is suspended when the driver's probe routine runs. I'm not sure how different platforms do this; using a PM domain could be one answer. that's alright, but it generates a different set of problems. That same piece of code which associates a device with its clock, doesn't really know if the driver is even available which means we could be enabling clocks for no reason and just wasting precious battery juice ;-) All this is somewhat off the point of my original comment, however. Drivers must be sure to balance their pm_runtime_get() and _put() calls. Having an unbalanced _put() in the remove routine is almost certainly a mistake -- especially if it is conditional on the device's power state, because a device can remain unsuspended even after the driver does a pm_runtime_put(). For example, this will happen if the user wrote on to /sys/.../power/control. indeed... Makes sense. I'll consider mailing linux-pm for the rest of the discussion, cheers. -- balbi signature.asc Description: Digital signature
Re: [PATCH v2 06/10] usb: xhci: Enable runtime pm in xhci-plat
Hi, On Sun, Mar 03, 2013 at 01:21:32AM +0200, Felipe Balbi wrote: I don't know much about clock handling. In general, the pm_runtime_set_active() and pm_runtime_enable() parts should be done by the subsystem, not the driver, whenever possible. good to know :-) Though I disagree with calling pm_runtime_enable() at the subsystem level. This means we can add pm_runtime_set_active() ignore this last line, forgot to delete it. -- balbi signature.asc Description: Digital signature
Re: [PATCH v6 01/16] clk: samsung: add common clock framework helper functions for Samsung platforms
Hi, Am Montag, 18. Februar 2013, 09:21:11 schrieb Thomas Abraham: All Samsung platforms include different types of clock including fixed-rate, mux, divider and gate clock types. There are typically hundreds of such clocks on each of the Samsung platforms. To enable Samsung platforms to register these clocks using the common clock framework, a bunch of utility functions are introduced here which simplify the clock registration process. The clocks are usually statically instantiated and registered with common clock framework. Cc: Mike Turquette mturque...@linaro.org Cc: Kukjin Kim kgene@samsung.com Reviewed-by: Sylwester Nawrocki s.nawro...@samsung.com Tested-by: Sylwester Nawrocki s.nawro...@samsung.com Reviewed-by: Tomasz Figa t.f...@samsung.com Tested-by: Tomasz Figa t.f...@samsung.com Signed-off-by: Thomas Abraham thomas.abra...@linaro.org I'm playing around with this on my s3c2416 platform and it works like a charm for the most part - and the system already comes sort of up again :-) . So, Tested-by: Heiko Stuebner he...@sntech.de But is there an easy way to define more than one alias? On the s3c2416 for example the hsmmc hclk is the hsmmc io-clock, as well as the source for the mmc_busclk.0. Same for the uart pclk, that is also a baud clock source. Thanks Heiko -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 03/14] MAINTAINERS: remove arch/arm/plat-s3c24xx/
This directory was removed by commit 09ec1d7 (ARM: S3C24XX: Remove plat-s3c24xx directory in arch/arm/). Cc: Kukjin Kim kgene@samsung.com Cc: Ben Dooks ben-li...@fluff.org Cc: Russell King rmk+ker...@arm.linux.org.uk Cc: linux-arm-ker...@lists.infradead.org Cc: linux-samsung-soc@vger.kernel.org Signed-off-by: Cesar Eduardo Barros ces...@cesarb.net --- MAINTAINERS | 1 - 1 file changed, 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index 3c074d5..5af82f9 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1119,7 +1119,6 @@ L:linux-samsung-soc@vger.kernel.org (moderated for non-subscribers) W: http://www.fluff.org/ben/linux/ S: Maintained F: arch/arm/plat-samsung/ -F: arch/arm/plat-s3c24xx/ F: arch/arm/mach-s3c24*/ F: arch/arm/mach-s3c64xx/ F: drivers/*/*s3c2410* -- 1.7.11.7 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: MFC decode failed in S5PV210 in kernel 3.8
Which firmware should be used for S5PV210 for kernel 3.8? Here: https://git.kernel.org/cgit/linux/kernel/git/firmware/linux-firmware.git/commit/?id=fb5cda9c70277f633ca0c1e81b6fa7b13007bbf6 It only says for Exynos4 series : for s5p-mfc.fw- For v5 firmware used in Exynos4 series Does the firmware have any relation with compiler armhf or armef? Thanks. 于 2013/3/2 17:19, Lonsn 写道: 于 2013/3/2 12:00, Lonsn 写道: Hi, I tested the MFC decode example v4l2_decode from http://git.infradead.org/users/kmpark/public-apps and meet some problems as following: # ./v4l2_decode -f /dev/video5 -m /dev/video9 -d /dev/fb0 -c mpeg4 -i shrek.m4v V4L2 Codec decoding example application Kamil Debski k.deb...@samsung.com Copyright 2012 Samsung Electronics Co., Ltd. (fb.c:fb_open:51): Framebuffer properties: xres=1024, yres=768, bpp=32 (fb.c:fb_open:53): Virtual resolution: vxres=1024 vyres=768 (fimc.c:fimc_open:56): FIMC Info (/dev/video5): driver=s5pv210-fimc bus_info= card=s5pv210-fimc fd=0x5 (mfc.c:mfc_open:57): MFC Info (/dev/video9): driver=s5p-mfc bus_info= card=s5p-mfc fd=0x6 (main.c:main:415): Successfully opened all necessary files and devices (mfc.c:mfc_dec_setup_output:101): Setup MFC decoding OUTPUT buffer size=1048576 (requested=1048576) (mfc.c:mfc_dec_setup_output:118): Number of MFC OUTPUT buffers is 2 (requested 2) (mfc.c:mfc_dec_setup_output:148): Succesfully mmapped 2 MFC OUTPUT buffers (main.c:extract_and_process_header:84): Extracted header of size 13089 (mfc.c:mfc_dec_queue_buf:178): Queued buffer on OUTPUT queue with index 0 (mfc.c:mfc_stream:236): Stream ON on OUTPUT queue (mfc.c:mfc_dec_setup_capture:277): MFC buffer parameters: 0x0 plane[0]=0 plane[1]=0 Error (mfc.c:mfc_dec_setup_capture:283): Failed to get crop information And kernel print: s5p_mfc_handle_error:420: Interrupt Error: 0035 vidioc_g_crop:782: Cannont set crop It seems MFC buffer parameters error first. The shrek.m4v comes from http://www.uky.edu/~drlane/com351/shrek.m4v and is H264 format. But if I use -c h264, then v4l2_decode will print: Error (parser.c:parse_h264_stream:337): Output buffer too small for current frame Error (main.c:extract_and_process_header:71): Failed to extract header from stream Any suggestions? Thanks. Maybe the up issue due to the input file format. Now I use a H264 ES file as input, failed with different output. #./v4l2_decode -f /dev/video5 -m /dev/video9 -d /dev/fb0 -c h264 -i c.h264 Kernel print: Unable to handle kernel NULL pointer dereference at virtual address pgd = afa78000 [] *pgd=4ea37831, *pte=, *ppte= Internal error: Oops: 17 [#1] PREEMPT ARM Modules linked in: CPU: 0Not tainted (3.8.0-dirty #26) PC is at dma_cache_maint_page+0x58/0xa8 LR is at 0x8000 pc : [80014f2c]lr : [8000]psr: a013 sp : ae939ac8 ip : 8050378c fp : aead2240 r10: r9 : 0001 r8 : 804aceec r7 : 0001 r6 : 804b5b70 r5 : fc03 r4 : r3 : 0001 r2 : 0006c000 r1 : r0 : fc03bc00 Flags: NzCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment user Control: 10c5387d Table: 4fa78019 DAC: 0015 Process v4l2_decode (pid: 2433, stack limit = 0xae938230) Stack: (0xae939ac8 to 0xae93a000) 9ac0: 0001 80778000 80015054 80019398 006c 9ae0: ace36e00 aead2b40 80015d34 0001 8050378c 9b00: ae939b54 aead2b40 804aceec 0001 0001 aead2240 804b5b70 9b20: 80245a4c 00d0 0001 802e41c8 0006c000 aead2280 9b40: 72601000 006c 805037a8 006c af9f8e00 0004306b 1020 acc3d400 9b60: ae939b98 accb9550 acc3d400 accb9550 805116c4 802411c8 9b80: afb1d900 acc3d400 805116c4 0006c000 0006c000 72601000 76f43000 9ba0: 0003 afa0ca98 1080 6193 803604cc ae939bdc 800480a8 9bc0: 804ba074 af907000 00036000 00036000 725cb000 0c36d194 80036da4 9be0: 2113 2193 0401 acd982b8 afb1d900 0003 af9f6144 802b8698 9c00: af9f6000 afb1d900 af9f6144 acd982b8 1080 802bc324 af9f6000 80342690 9c20: afb1d900 1088 af9f6000 afb1d900 1088 af9f6070 c802a8c0 9c40: 1088 802b5338 af9f6000 afb1d900 af9f6038 acf01ee4 8030bdcc 9c60: af9f6000 80360504 af9f6000 8030d39c afb1d900 0011 804d8988 804ab47c 9c80: acf01ee4 8030e5c0 4003 0002 804ab47c af989800 0002 afb1d918 9ca0: 109c 804d8988 acf03310 1402a8c0 c802a8c0 afb1d900 9cc0: 80387d54 804aab68 804d8988 804d8988 0011 0001 802e41c8 9ce0: afb1d900 acf03310 afb1d918 ae939d5c 009c3f49 009c3ecd 802e3da8 9d00: af989800 0084 0029 804ab4ec 804aa66c ae938000 ae939d5c 0008 9d20: af989800 afb1d900 804ab4ec 802c101c 804bbd74 804aa680 80512540 9d40: 804dde40 00400040 0140 80065fe8 804ba828 af817020 af817020 8035e09c 9d60: af817034 ae938000
