[PATCH 1/2] ARM: dts: Add MFC clock entries for exynos4
Added MFC related clock entries in exynos4.dtsi file. Signed-off-by: Sachin Kamat sachin.ka...@linaro.org --- Based on Kukjin's for-next. Dependent on the below patch: https://patchwork.kernel.org/patch/2349361/ --- arch/arm/boot/dts/exynos4.dtsi |2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi index 59e6730..4061f48 100644 --- a/arch/arm/boot/dts/exynos4.dtsi +++ b/arch/arm/boot/dts/exynos4.dtsi @@ -150,6 +150,8 @@ reg = 0x1340 0x1; interrupts = 0 94 0; samsung,power-domain = pd_mfc; + clocks = clock 170, clock 273; + clock-names = sclk_mfc, mfc; status = disabled; }; -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/3] ARM: dts: Remove keypad entries from exynos4x12-pinctrl.dtsi
Kukjin,
Please check this series.
On 13 March 2013 10:38, Sachin Kamat sachin.ka...@linaro.org wrote:
Keypad pins/lines are board specific and should be added to respective
board dts files.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
arch/arm/boot/dts/exynos4x12-pinctrl.dtsi | 56
-
1 files changed, 0 insertions(+), 56 deletions(-)
diff --git a/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi
b/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi
index 099cec7..704290f 100644
--- a/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi
+++ b/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi
@@ -778,62 +778,6 @@
samsung,pin-drv = 3;
};
- keypad_col0: keypad-col0 {
- samsung,pins = gpl2-0;
- samsung,pin-function = 3;
- samsung,pin-pud = 0;
- samsung,pin-drv = 0;
- };
-
- keypad_col1: keypad-col1 {
- samsung,pins = gpl2-1;
- samsung,pin-function = 3;
- samsung,pin-pud = 0;
- samsung,pin-drv = 0;
- };
-
- keypad_col2: keypad-col2 {
- samsung,pins = gpl2-2;
- samsung,pin-function = 3;
- samsung,pin-pud = 0;
- samsung,pin-drv = 0;
- };
-
- keypad_col3: keypad-col3 {
- samsung,pins = gpl2-3;
- samsung,pin-function = 3;
- samsung,pin-pud = 0;
- samsung,pin-drv = 0;
- };
-
- keypad_col4: keypad-col4 {
- samsung,pins = gpl2-4;
- samsung,pin-function = 3;
- samsung,pin-pud = 0;
- samsung,pin-drv = 0;
- };
-
- keypad_col5: keypad-col5 {
- samsung,pins = gpl2-5;
- samsung,pin-function = 3;
- samsung,pin-pud = 0;
- samsung,pin-drv = 0;
- };
-
- keypad_col6: keypad-col6 {
- samsung,pins = gpl2-6;
- samsung,pin-function = 3;
- samsung,pin-pud = 0;
- samsung,pin-drv = 0;
- };
-
- keypad_col7: keypad-col7 {
- samsung,pins = gpl2-7;
- samsung,pin-function = 3;
- samsung,pin-pud = 0;
- samsung,pin-drv = 0;
- };
-
cam_port_b: cam-port-b {
samsung,pins = gpm0-0, gpm0-1, gpm0-2, gpm0-3,
gpm0-4, gpm0-5, gpm0-6,
gpm0-7,
--
1.7.4.1
--
With warm regards,
Sachin
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Re: [PATCH v4 0/2] ARM: Exynos5250: Enabling samsung usb phy
Hi Kukjin, On Fri, Mar 15, 2013 at 1:26 PM, Vivek Gautam gautam.vi...@samsung.com wrote: Based on 'for-next' of linux-samsung tree with following patches from Doug on top: usb: Document clocks in samsung, exynos4210-ehci/ohci bindings ARM: dts: add usb 2.0 clock references to exynos5250 device tree Also depending upon following patch-series for Samsung-usb-phy driver: [PATCH v7 0/2] Adding USB 3.0 DRD-phy support for exynos5250 Changes from v3: Added 'clocks' and 'clock-names' entry also in device nodes, aligning with common clock framework for Samsung's SoCs. Vivek Gautam (2): ARM: Exynos5250: Enabling samsung-usb2phy driver ARM: Exynos5250: Enabling samsung-usb3phy driver arch/arm/boot/dts/exynos5250.dtsi | 29 + 1 files changed, 29 insertions(+), 0 deletions(-) Waiting for your review on this patch-set. :-) -- Thanks Regards Vivek -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v5 0/3] ARM: Exynos5250: Enabling dwc3-exynos driver
Hi Kukjin, On Fri, Mar 15, 2013 at 1:32 PM, Vivek Gautam gautam.vi...@samsung.com wrote: This patch-set is in continuation with patch-series: [PATCH v4 0/4] Enable ehci, ohci and dwc3 devices on exynos5250 out of which follwowing patches have been picked up: ARM: Exynos5250: Enabling ehci-s5p driver ARM: Exynos5250: Enabling ohci-exynos driver Based on following patch-set for Samsung's usb PHY enablement: [PATCH v4 0/2] ARM: Exynos5250: Enabling samsung usb phy and further depends on dwc3-exynos driver patch-set: [PATCH 0/2] dwc3: exynos: Device tree fixes Changes from v4: - Aligning with the recently merged common clock framework, thereby no place for clock file changes. ;-) - Adding proper binding documentation as per latest bindings changes in dwc3 driver (dwc3/core.c as well as for dwc3-exynos.c change reflected by above patch-set. - Bifurcating the patch to separate our Documentation, arch and dts changes. Vivek Gautam (3): usb: Add device tree bindings for dwc3-exynos ARM: exynos5250: dts: Enabling dwc3-exynos driver ARM: exynos5: Enable XHCI support on exynos5 .../devicetree/bindings/usb/exynos-usb.txt | 34 arch/arm/boot/dts/exynos5250.dtsi | 20 ++- arch/arm/mach-exynos/Kconfig |1 + 3 files changed, 53 insertions(+), 2 deletions(-) Waiting for your review on this patch-set. :-) -- Thanks Regards Vivek -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH 0/2] ARM: Exynos: Add DT based I/O mapping for Chip-ID controller
Thomas Abraham wrote: This patch series allows device tree enabled platforms to setup a runtime I/O mapping for the chip-id controller. This helps to remove statically defined I/O mapping for the Chip-ID controller. Thomas Abraham (2): ARM: Exynos: Create virtual I/O mapping for Chip-ID controller using device tree ARM: dts: Add chip-id controller node on Exynos4/5 SoC .../arm/samsung/samsung,exynos4210-chipid.txt | 15 ++ arch/arm/boot/dts/exynos4.dtsi |5 ++ arch/arm/boot/dts/exynos5250.dtsi |5 ++ arch/arm/mach-exynos/common.c | 53 +++- arch/arm/mach-exynos/include/mach/map.h|1 - 5 files changed, 55 insertions(+), 24 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/samsung/samsung,exynos4210- chipid.txt -- 1.7.5.4 Thomas, Can you update this series can support exynos5440 as well? It should be done together. - Kukjin -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 00/11] usb: dwc3/xhci/phy: Enable runtime power management
On Thu, Apr 04, 2013 at 10:34:57AM +0530, Vivek Gautam wrote: Hi Sarah, On Wed, Apr 3, 2013 at 10:57 PM, Sarah Sharp sarah.a.sh...@linux.intel.com wrote: Question: Do you still need this patch for 3.10? Felipe's 'next' is closed for 3.10, so this series won't be making it to 3.10 now, as a whole. :-( right, besides we're still discussing what to do with the whole PHY part, right ? -- balbi signature.asc Description: Digital signature
Re: [PATCH v3 01/11] usb: phy: Add APIs for runtime power management
Hi, On Wed, Apr 03, 2013 at 02:14:02PM -0400, Alan Stern wrote: Lets suppose DWC3 enables runtime_pm on USB 2 type phy, it will try to go into suspend state and thereby call runtime_suspend(), if any. And PHY will come to active state only when its consumer wakes it up, and this consumer is operational only when its related PHY is in fully functional state. So do we have a situation in which this PHY goes into low power state in its runtime_suspend(), resulting in non-detection of devices on further attach (since PHY is in low power state) ? Will the controller (like EHCI/OHCI) be functional now ? ehci/ohci need to cope with that by calling usb_phy_autopm_get_sync(), right ? (so does DWC3 :-) Maybe you guys have already got this all figured out -- if so, feel free to ignore this email. Some subsystems handle this issue by calling pm_runtime_get_sync() before probing a driver and pm_runtime_put_sync() after unbinding the driver. If the driver is runtime-PM-enabled, it then does its own put_sync near the end of its probe routine and get_sync in its release routine. sounds a bit 'fishy' to me... So a separate entity would call pm_runtime_get_sync(), even when we don't have registered dev_pm_ops, then drivers need to check if runtime_pm is enabled and call pm_runtime_put*() conditionally before returning from probe(). One remove, we might have another issue: device is already runtime_suspended (due to e.g. autosuspend) when module is removed, a call to pm_runtime_put_sync() will be unbalanced. No ? -- balbi signature.asc Description: Digital signature
Re: [PATCH v3 00/11] usb: dwc3/xhci/phy: Enable runtime power management
On Thu, Apr 4, 2013 at 12:40 PM, Felipe Balbi ba...@ti.com wrote: On Thu, Apr 04, 2013 at 10:34:57AM +0530, Vivek Gautam wrote: Hi Sarah, On Wed, Apr 3, 2013 at 10:57 PM, Sarah Sharp sarah.a.sh...@linux.intel.com wrote: Question: Do you still need this patch for 3.10? Felipe's 'next' is closed for 3.10, so this series won't be making it to 3.10 now, as a whole. :-( right, besides we're still discussing what to do with the whole PHY part, right ? Right ofcourse. :-) -- Thanks Regards Vivek -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 01/11] usb: phy: Add APIs for runtime power management
Hi, On Thu, Apr 4, 2013 at 12:48 PM, Felipe Balbi ba...@ti.com wrote: Hi, On Wed, Apr 03, 2013 at 02:14:02PM -0400, Alan Stern wrote: Lets suppose DWC3 enables runtime_pm on USB 2 type phy, it will try to go into suspend state and thereby call runtime_suspend(), if any. And PHY will come to active state only when its consumer wakes it up, and this consumer is operational only when its related PHY is in fully functional state. So do we have a situation in which this PHY goes into low power state in its runtime_suspend(), resulting in non-detection of devices on further attach (since PHY is in low power state) ? Will the controller (like EHCI/OHCI) be functional now ? ehci/ohci need to cope with that by calling usb_phy_autopm_get_sync(), right ? (so does DWC3 :-) Maybe you guys have already got this all figured out -- if so, feel free to ignore this email. Some subsystems handle this issue by calling pm_runtime_get_sync() before probing a driver and pm_runtime_put_sync() after unbinding the driver. If the driver is runtime-PM-enabled, it then does its own put_sync near the end of its probe routine and get_sync in its release routine. sounds a bit 'fishy' to me... So a separate entity would call pm_runtime_get_sync(), even when we don't have registered dev_pm_ops, then drivers need to check if runtime_pm is enabled and call pm_runtime_put*() conditionally before returning from probe(). One remove, we might have another issue: device is already runtime_suspended (due to e.g. autosuspend) when module is removed, a call to pm_runtime_put_sync() will be unbalanced. No ? May be i am misinterpreting !! If PHYs are runtime-PM enabled (PHY probe calls *runtime_enable*), then the consumers need to call pm_runtime_get_sync whever they want to access PHY. Besides PHYs also need to *put_sync* just before their probe is finishing, so that it's availbale for autosuspend. I, however didn't understand the need of PHY to *get_sync* itself in release routine. -- Thanks Regards Vivek -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 01/11] usb: phy: Add APIs for runtime power management
Hi, On Thu, Apr 04, 2013 at 02:26:51PM +0530, Vivek Gautam wrote: Lets suppose DWC3 enables runtime_pm on USB 2 type phy, it will try to go into suspend state and thereby call runtime_suspend(), if any. And PHY will come to active state only when its consumer wakes it up, and this consumer is operational only when its related PHY is in fully functional state. So do we have a situation in which this PHY goes into low power state in its runtime_suspend(), resulting in non-detection of devices on further attach (since PHY is in low power state) ? Will the controller (like EHCI/OHCI) be functional now ? ehci/ohci need to cope with that by calling usb_phy_autopm_get_sync(), right ? (so does DWC3 :-) Maybe you guys have already got this all figured out -- if so, feel free to ignore this email. Some subsystems handle this issue by calling pm_runtime_get_sync() before probing a driver and pm_runtime_put_sync() after unbinding the driver. If the driver is runtime-PM-enabled, it then does its own put_sync near the end of its probe routine and get_sync in its release routine. sounds a bit 'fishy' to me... So a separate entity would call pm_runtime_get_sync(), even when we don't have registered dev_pm_ops, then drivers need to check if runtime_pm is enabled and call pm_runtime_put*() conditionally before returning from probe(). One remove, we might have another issue: device is already runtime_suspended (due to e.g. autosuspend) when module is removed, a call to pm_runtime_put_sync() will be unbalanced. No ? May be i am misinterpreting !! If PHYs are runtime-PM enabled (PHY probe calls *runtime_enable*), then the consumers need to call pm_runtime_get_sync whever they want to access PHY. Alright, so here's my understanding: I suggested letting e.g. DWC3 enable the PHY's runtime_pm; Alan said that it could be done before that so that DWC3 sees an enabled PHY during probe. -- balbi signature.asc Description: Digital signature
[PATCH] ARM: EXYNOS: fix compilation error introduced due to common clock migration
From: Thomas Abraham thomas...@samsung.com
The functions exynos4_clk_init and exynos4_clk_register_fixed_ext are
applicable only on Exynos4 non-dt platforms. But when building Exynos5
platforms without including Exynos4 platforms, the following errors
show up.
arch/arm/mach-exynos/built-in.o: In function `exynos_init_time':
arch/arm/mach-exynos/common.c:446: undefined reference to `exynos4_clk_init'
arch/arm/mach-exynos/common.c:447: undefined reference to
`exynos4_clk_register_fixed_ext'
Fix this compilation errors by marking these calls as Exynos4 specific.
Signed-off-by: Thomas Abraham thomas...@samsung.com
Signed-off-by: Kukjin Kim kgene@samsung.com
---
arch/arm/mach-exynos/common.c |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 9cd857e..a8570bf 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -443,8 +443,10 @@ void __init exynos_init_time(void)
#endif
} else {
/* todo: remove after migrating legacy E4 platforms to dt */
+#ifdef CONFIG_ARCH_EXYNOS4
exynos4_clk_init(NULL);
exynos4_clk_register_fixed_ext(xxti_f, xusbxti_f);
+#endif
mct_init();
}
}
--
1.7.4.4
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[PATCH 0/3] pinctrl: exynos5440: add gpio interrupt
This patch updates supporting pinctrl for exynos5440 and based on top of for-next branch of samsung tree. arch/arm/boot/dts/exynos5440.dtsi|2 + drivers/pinctrl/pinctrl-exynos5440.c | 151 +- 2 files changed, 150 insertions(+), 3 deletions(-) [PATCH 1/3] pinctrl: exynos5440: fix probe failure due to missing [PATCH 2/3] pinctrl: exynos5440: add gpio interrupt support [PATCH 3/3] ARM: dts: list the interrupts generated by -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 3/3] ARM: dts: list the interrupts generated by pin-controller on Exynos5440
From: Thomas Abraham thomas...@samsung.com
Exynos5440 pin-controller generates eight interrupts to support gpio
interrupts. List those interrupt numbers in the pin-controller node.
Signed-off-by: Thomas Abraham thomas...@samsung.com
Cc: Linus Walleij linus.wall...@linaro.org
Signed-off-by: Kukjin Kim kgene@samsung.com
---
arch/arm/boot/dts/exynos5440.dtsi |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5440.dtsi
b/arch/arm/boot/dts/exynos5440.dtsi
index 25c6134..7132358 100644
--- a/arch/arm/boot/dts/exynos5440.dtsi
+++ b/arch/arm/boot/dts/exynos5440.dtsi
@@ -96,6 +96,8 @@
pinctrl {
compatible = samsung,exynos5440-pinctrl;
reg = 0xE 0x1000;
+ interrupts = 0 37 0, 0 38 0, 0 39 0, 0 40 0,
+0 41 0, 0 42 0, 0 43 0, 0 44 0;
interrupt-controller;
#interrupt-cells = 2;
#gpio-cells = 2;
--
1.7.4.4
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[PATCH 1/3] pinctrl: exynos5440: fix probe failure due to missing pin-list in config nodes
From: Thomas Abraham thomas...@samsung.com
The property 'samsung,exynos5440-pins' is optional in configuration nodes
which are included in the Exynos5440 pin-controller device node. Fix the
incorrect failure in driver probe if 'samsung,exynos5440-pins' property
is not found in the configuration nodes.
Signed-off-by: Thomas Abraham thomas...@samsung.com
Cc: Linus Walleij linus.wall...@linaro.org
Signed-off-by: Kukjin Kim kgene@samsung.com
---
drivers/pinctrl/pinctrl-exynos5440.c |9 ++---
1 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/pinctrl/pinctrl-exynos5440.c
b/drivers/pinctrl/pinctrl-exynos5440.c
index 1376eb7..96cb1e9 100644
--- a/drivers/pinctrl/pinctrl-exynos5440.c
+++ b/drivers/pinctrl/pinctrl-exynos5440.c
@@ -670,8 +670,10 @@ static int exynos5440_pinctrl_parse_dt(struct
platform_device *pdev,
ret = exynos5440_pinctrl_parse_dt_pins(pdev, cfg_np,
pin_list, npins);
- if (ret)
- return ret;
+ if (ret) {
+ gname = NULL;
+ goto skip_to_pin_function;
+ }
/* derive pin group name from the node name */
gname = devm_kzalloc(dev, strlen(cfg_np-name) + GSUFFIX_LEN,
@@ -687,6 +689,7 @@ static int exynos5440_pinctrl_parse_dt(struct
platform_device *pdev,
grp-num_pins = npins;
grp++;
+skip_to_pin_function:
ret = of_property_read_u32(cfg_np,
samsung,exynos5440-pin-function,
function);
if (ret)
@@ -709,7 +712,7 @@ static int exynos5440_pinctrl_parse_dt(struct
platform_device *pdev,
return -ENOMEM;
}
func-groups[0] = gname;
- func-num_groups = 1;
+ func-num_groups = gname ? 1 : 0;
func-function = function;
func++;
func_idx++;
--
1.7.4.4
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[PATCH 2/3] pinctrl: exynos5440: add gpio interrupt support
From: Thomas Abraham thomas...@samsung.com
Exynos5440 supports gpio interrupts on gpios 16 to 23. The eight interrupt lines
originating from the pin-controller are connected to the gic. Add irq-chip
support
for these interrupts.
Signed-off-by: Thomas Abraham thomas...@samsung.com
Cc: Linus Walleij linus.wall...@linaro.org
Signed-off-by: Kukjin Kim kgene@samsung.com
---
drivers/pinctrl/pinctrl-exynos5440.c | 142 ++
1 files changed, 142 insertions(+), 0 deletions(-)
diff --git a/drivers/pinctrl/pinctrl-exynos5440.c
b/drivers/pinctrl/pinctrl-exynos5440.c
index 96cb1e9..b5c5014 100644
--- a/drivers/pinctrl/pinctrl-exynos5440.c
+++ b/drivers/pinctrl/pinctrl-exynos5440.c
@@ -20,6 +20,9 @@
#include linux/pinctrl/pinctrl.h
#include linux/pinctrl/pinmux.h
#include linux/pinctrl/pinconf.h
+#include linux/interrupt.h
+#include linux/irqdomain.h
+#include linux/of_irq.h
#include core.h
/* EXYNOS5440 GPIO and Pinctrl register offsets */
@@ -37,6 +40,7 @@
#define GPIO_DS1 0x2C
#define EXYNOS5440_MAX_PINS23
+#define EXYNOS5440_MAX_GPIO_INT8
#define PIN_NAME_LENGTH10
#define GROUP_SUFFIX -grp
@@ -109,6 +113,7 @@ struct exynos5440_pmx_func {
struct exynos5440_pinctrl_priv_data {
void __iomem*reg_base;
struct gpio_chip*gc;
+ struct irq_domain *irq_domain;
const struct exynos5440_pin_group *pin_groups;
unsigned intnr_groups;
@@ -116,6 +121,16 @@ struct exynos5440_pinctrl_priv_data {
unsigned intnr_functions;
};
+/**
+ * struct exynos5440_gpio_intr_data: private data for gpio interrupts.
+ * @priv: driver's private runtime data.
+ * @gpio_int: gpio interrupt number.
+ */
+struct exynos5440_gpio_intr_data {
+ struct exynos5440_pinctrl_priv_data *priv;
+ unsigned intgpio_int;
+};
+
/* list of all possible config options supported */
static struct pin_config {
char*prop_cfg;
@@ -598,6 +613,22 @@ static int exynos5440_gpio_direction_output(struct
gpio_chip *gc, unsigned offse
return 0;
}
+/* gpiolib gpio_to_irq callback function */
+static int exynos5440_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
+{
+ struct exynos5440_pinctrl_priv_data *priv = dev_get_drvdata(gc-dev);
+ unsigned int virq;
+
+ if (offset 16 || offset 23)
+ return -ENXIO;
+
+ if (!priv-irq_domain)
+ return -ENXIO;
+
+ virq = irq_create_mapping(priv-irq_domain, offset - 16);
+ return virq ? : -ENXIO;
+}
+
/* parse the pin numbers listed in the 'samsung,exynos5440-pins' property */
static int exynos5440_pinctrl_parse_dt_pins(struct platform_device *pdev,
struct device_node *cfg_np, unsigned int **pin_list,
@@ -821,6 +852,7 @@ static int exynos5440_gpiolib_register(struct
platform_device *pdev,
gc-get = exynos5440_gpio_get;
gc-direction_input = exynos5440_gpio_direction_input;
gc-direction_output = exynos5440_gpio_direction_output;
+ gc-to_irq = exynos5440_gpio_to_irq;
gc-label = gpiolib-exynos5440;
gc-owner = THIS_MODULE;
ret = gpiochip_add(gc);
@@ -845,6 +877,110 @@ static int exynos5440_gpiolib_unregister(struct
platform_device *pdev,
return 0;
}
+static void exynos5440_gpio_irq_unmask(struct irq_data *irqd)
+{
+ struct exynos5440_pinctrl_priv_data *d;
+ unsigned long gpio_int;
+
+ d = irq_data_get_irq_chip_data(irqd);
+ gpio_int = readl(d-reg_base + GPIO_INT);
+ gpio_int |= 1 irqd-hwirq;
+ writel(gpio_int, d-reg_base + GPIO_INT);
+}
+
+static void exynos5440_gpio_irq_mask(struct irq_data *irqd)
+{
+ struct exynos5440_pinctrl_priv_data *d;
+ unsigned long gpio_int;
+
+ d = irq_data_get_irq_chip_data(irqd);
+ gpio_int = readl(d-reg_base + GPIO_INT);
+ gpio_int = ~(1 irqd-hwirq);
+ writel(gpio_int, d-reg_base + GPIO_INT);
+}
+
+/* irq_chip for gpio interrupts */
+static struct irq_chip exynos5440_gpio_irq_chip = {
+ .name = exynos5440_gpio_irq_chip,
+ .irq_unmask = exynos5440_gpio_irq_unmask,
+ .irq_mask = exynos5440_gpio_irq_mask,
+};
+
+/* interrupt handler for GPIO interrupts 0..7 */
+static irqreturn_t exynos5440_gpio_irq(int irq, void *data)
+{
+ struct exynos5440_gpio_intr_data *intd = data;
+ struct exynos5440_pinctrl_priv_data *d = intd-priv;
+ int virq;
+
+ virq = irq_linear_revmap(d-irq_domain, intd-gpio_int);
+ if (!virq)
+ return IRQ_NONE;
+ generic_handle_irq(virq);
+ return IRQ_HANDLED;
+}
+
+static int exynos5440_gpio_irq_map(struct irq_domain *h, unsigned int virq,
+ irq_hw_number_t hw)
+{
+ struct exynos5440_pinctrl_priv_data *d =
[PATCH 0/4] ARM: dts: update device tree for exynos5440
This patch updates device tree for exynos5440 including for PMU, PDMA0 and GMAC. arch/arm/boot/dts/exynos5440-ssdk5440.dts |6 + arch/arm/boot/dts/exynos5440.dtsi | 35 ++-- 2 files changed, 28 insertions(+), 13 deletions(-) [PATCH 1/4] ARM: dts: Add node for GMAC for exynos5440 [PATCH 2/4] ARM: dts: add PDMA0 changes for exynos5440 [PATCH 3/4] ARM: dts: add PMU support in exynos5440 [PATCH 4/4] ARM: dts: update bootargs to boot from sda2 for -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 2/4] ARM: dts: add PDMA0 changes for exynos5440
From: Subash Patel subash...@samsung.com
PDMA0@0x121000 changes are added into the architecture DTS file.
Signed-off-by: Subash Patel subash...@samsung.com
Signed-off-by: Kukjin Kim kgene@samsung.com
---
arch/arm/boot/dts/exynos5440.dtsi | 16
1 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5440.dtsi
b/arch/arm/boot/dts/exynos5440.dtsi
index 7bd1f3b..715ea15 100644
--- a/arch/arm/boot/dts/exynos5440.dtsi
+++ b/arch/arm/boot/dts/exynos5440.dtsi
@@ -165,22 +165,22 @@
interrupt-parent = gic;
ranges;
- pdma0: pdma@121A {
+ pdma0: pdma@00121000 {
compatible = arm,pl330, arm,primecell;
- reg = 0x12 0x1000;
- interrupts = 0 34 0;
- clocks = clock 21;
+ reg = 0x121000 0x1000;
+ interrupts = 0 46 0;
+ clocks = clock 8;
clock-names = apb_pclk;
#dma-cells = 1;
#dma-channels = 8;
#dma-requests = 32;
};
- pdma1: pdma@121B {
+ pdma1: pdma@0012 {
compatible = arm,pl330, arm,primecell;
- reg = 0x121000 0x1000;
- interrupts = 0 35 0;
- clocks = clock 21;
+ reg = 0x12 0x1000;
+ interrupts = 0 47 0;
+ clocks = clock 8;
clock-names = apb_pclk;
#dma-cells = 1;
#dma-channels = 8;
--
1.7.4.4
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[PATCH 3/4] ARM: dts: add PMU support in exynos5440
From: Subash Patel subash...@samsung.com
PMU in exynos5440 generates one interrupt per core and needs to
be passed from DT to GIC to register it.
Signed-off-by: Subash Patel subash...@samsung.com
Signed-off-by: Kukjin Kim kgene@samsung.com
---
arch/arm/boot/dts/exynos5440.dtsi |8
1 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5440.dtsi
b/arch/arm/boot/dts/exynos5440.dtsi
index 715ea15..5a339f0 100644
--- a/arch/arm/boot/dts/exynos5440.dtsi
+++ b/arch/arm/boot/dts/exynos5440.dtsi
@@ -55,6 +55,14 @@
};
};
+ arm-pmu {
+ compatible = arm,cortex-a15-pmu, arm,cortex-a9-pmu;
+ interrupts = 0 52 4,
+0 53 4,
+0 54 4,
+0 55 4;
+ };
+
timer {
compatible = arm,cortex-a15-timer,
arm,armv7-timer;
--
1.7.4.4
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[PATCH 4/4] ARM: dts: update bootargs to boot from sda2 for exynos5440-ssdk5440
From: Subash Patel subash...@samsung.com
Updated the bootargs to boot the system with rootfs in hard-disk
instead of ramdisk.
Signed-off-by: Subash Patel subash...@samsung.com
Signed-off-by: Kukjin Kim kgene@samsung.com
---
arch/arm/boot/dts/exynos5440-ssdk5440.dts |6 +-
1 files changed, 1 insertions(+), 5 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5440-ssdk5440.dts
b/arch/arm/boot/dts/exynos5440-ssdk5440.dts
index a21eb4c..d55042b 100644
--- a/arch/arm/boot/dts/exynos5440-ssdk5440.dts
+++ b/arch/arm/boot/dts/exynos5440-ssdk5440.dts
@@ -16,12 +16,8 @@
model = SAMSUNG SSDK5440 board based on EXYNOS5440;
compatible = samsung,ssdk5440, samsung,exynos5440;
- memory {
- reg = 0x8000 0x8000;
- };
-
chosen {
- bootargs = root=/dev/ram0 rw ramdisk=8192 initrd=0x8100,8M
console=ttySAC0,115200 init=/linuxrc;
+ bootargs = root=/dev/sda2 rw rootwait ignore_loglevel
early_printk no_console_suspend mem=2048M@0x8000 console=ttySAC0,115200;
};
spi {
--
1.7.4.4
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Re: [PATCH 1/2] ARM: dts: Add MFC clock entries for exynos4
On 04/04/2013 08:26 AM, Sachin Kamat wrote: Added MFC related clock entries in exynos4.dtsi file. Signed-off-by: Sachin Kamat sachin.ka...@linaro.org Reviewed-by: Sylwester Nawrocki s.nawro...@samsung.com --- Based on Kukjin's for-next. Dependent on the below patch: https://patchwork.kernel.org/patch/2349361/ --- arch/arm/boot/dts/exynos4.dtsi |2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi index 59e6730..4061f48 100644 --- a/arch/arm/boot/dts/exynos4.dtsi +++ b/arch/arm/boot/dts/exynos4.dtsi @@ -150,6 +150,8 @@ reg = 0x1340 0x1; interrupts = 0 94 0; samsung,power-domain = pd_mfc; + clocks = clock 170, clock 273; + clock-names = sclk_mfc, mfc; status = disabled; }; -- Sylwester Nawrocki 실베스터 나브로츠키 Samsung Poland RD Center -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 2/2] ARM: EXYNOS: force mac ip to 32bit dma
From: Girish K S ks.g...@samsung.com
The synopsys gigabit ethernet ip is compatible
with only 32 bit buffers. so restrict the driver
to use only 32 bit dma mapping.
Signed-off-by: Girish K S ks.g...@samsung.com
Signed-off-by: Siva Reddy siva.kal...@samsung.com
Signed-off-by: Kukjin Kim kgene@samsung.com
---
arch/arm/mach-exynos/mach-exynos5-dt.c |5 +
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c
b/arch/arm/mach-exynos/mach-exynos5-dt.c
index e47c2a5..9596861 100644
--- a/arch/arm/mach-exynos/mach-exynos5-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos5-dt.c
@@ -25,6 +25,7 @@
#include common.h
static u64 dma_mask64 = DMA_BIT_MASK(64);
+static u64 dma_mask32 = DMA_BIT_MASK(32);
static void __init exynos5_dt_map_io(void)
{
@@ -41,6 +42,10 @@ static int exynos5440_platform_notifier(struct
notifier_block *nb,
dev-dma_mask = dma_mask64;
dev-coherent_dma_mask = DMA_BIT_MASK(64);
+
+ if (of_device_is_compatible(dev-of_node, snps,dwmac-3.70a))
+ dev-dma_mask = dma_mask32;
+
return NOTIFY_OK;
}
--
1.7.4.4
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[PATCH 07/18] cpufreq: s3c24xx: move cpufreq driver to drivers/cpufreq
This patch moves cpufreq driver of Samsung's ARM based s3c24xx platform to
drivers/cpufreq.
Cc: Ben Dooks ben-li...@fluff.org
Cc: Kukjin Kim kgene@samsung.com
Cc: linux-samsung-soc@vger.kernel.org
Cc: linux-arm-ker...@lists.infradead.org
Signed-off-by: Viresh Kumar viresh.ku...@linaro.org
Acked-by: Arnd Bergmann a...@arndb.de
---
arch/arm/Kconfig | 46 ---
arch/arm/mach-s3c24xx/Kconfig | 66 +-
arch/arm/mach-s3c24xx/Makefile | 6 --
arch/arm/mach-s3c24xx/{ = include/mach}/s3c2412.h | 0
arch/arm/mach-s3c24xx/iotiming-s3c2412.c | 2 +-
arch/arm/plat-samsung/include/plat/cpu-freq-core.h | 10 ++--
arch/arm/plat-samsung/include/plat/cpu-freq.h | 6 +-
drivers/cpufreq/Kconfig.arm| 58 +++
drivers/cpufreq/Makefile | 5 ++
.../cpufreq/s3c2410-cpufreq.c | 0
.../cpufreq/s3c2412-cpufreq.c | 3 +-
.../cpufreq/s3c2440-cpufreq.c | 0
.../cpufreq/s3c24xx-cpufreq-debugfs.c | 0
.../cpufreq.c = drivers/cpufreq/s3c24xx-cpufreq.c | 0
14 files changed, 100 insertions(+), 102 deletions(-)
rename arch/arm/mach-s3c24xx/{ = include/mach}/s3c2412.h (100%)
rename arch/arm/mach-s3c24xx/cpufreq-s3c2410.c =
drivers/cpufreq/s3c2410-cpufreq.c (100%)
rename arch/arm/mach-s3c24xx/cpufreq-s3c2412.c =
drivers/cpufreq/s3c2412-cpufreq.c (99%)
rename arch/arm/mach-s3c24xx/cpufreq-s3c2440.c =
drivers/cpufreq/s3c2440-cpufreq.c (100%)
rename arch/arm/mach-s3c24xx/cpufreq-debugfs.c =
drivers/cpufreq/s3c24xx-cpufreq-debugfs.c (100%)
rename arch/arm/mach-s3c24xx/cpufreq.c = drivers/cpufreq/s3c24xx-cpufreq.c
(100%)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index c3563f6..70366b7 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -2166,52 +2166,6 @@ config CPU_FREQ_SA1100
config CPU_FREQ_SA1110
bool
-config CPU_FREQ_S3C
- bool
- help
- Internal configuration node for common cpufreq on Samsung SoC
-
-config CPU_FREQ_S3C24XX
- bool CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)
- depends on ARCH_S3C24XX CPU_FREQ
- select CPU_FREQ_S3C
- help
- This enables the CPUfreq driver for the Samsung S3C24XX family
- of CPUs.
-
- For details, take a look at file:Documentation/cpu-freq.
-
- If in doubt, say N.
-
-config CPU_FREQ_S3C24XX_PLL
- bool Support CPUfreq changing of PLL frequency (EXPERIMENTAL)
- depends on CPU_FREQ_S3C24XX
- help
- Compile in support for changing the PLL frequency from the
- S3C24XX series CPUfreq driver. The PLL takes time to settle
- after a frequency change, so by default it is not enabled.
-
- This also means that the PLL tables for the selected CPU(s) will
- be built which may increase the size of the kernel image.
-
-config CPU_FREQ_S3C24XX_DEBUG
- bool Debug CPUfreq Samsung driver core
- depends on CPU_FREQ_S3C24XX
- help
- Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
-
-config CPU_FREQ_S3C24XX_IODEBUG
- bool Debug CPUfreq Samsung driver IO timing
- depends on CPU_FREQ_S3C24XX
- help
- Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
-
-config CPU_FREQ_S3C24XX_DEBUGFS
- bool Export debugfs for CPUFreq
- depends on CPU_FREQ_S3C24XX DEBUG_FS
- help
- Export status information via debugfs.
-
endif
source drivers/cpuidle/Kconfig
diff --git a/arch/arm/mach-s3c24xx/Kconfig b/arch/arm/mach-s3c24xx/Kconfig
index 37f513d..81d2f3c 100644
--- a/arch/arm/mach-s3c24xx/Kconfig
+++ b/arch/arm/mach-s3c24xx/Kconfig
@@ -28,7 +28,7 @@ config CPU_S3C2410
select CPU_ARM920T
select CPU_LLSERIAL_S3C2410
select S3C2410_CLOCK
- select S3C2410_CPUFREQ if CPU_FREQ_S3C24XX
+ select ARM_S3C2410_CPUFREQ if ARM_S3C24XX_CPUFREQ
select S3C2410_PM if PM
help
Support for S3C2410 and S3C2410A family from the S3C24XX line
@@ -202,27 +202,38 @@ config S3C24XX_GPIO_EXTRA128
Add an extra 128 gpio numbers to the available GPIO pool. This is
available for boards that need extra gpios for external devices.
+config S3C24XX_PLL
+ bool Support CPUfreq changing of PLL frequency (EXPERIMENTAL)
+ depends on ARM_S3C24XX
+ help
+ Compile in support for changing the PLL frequency from the
+ S3C24XX series CPUfreq driver. The PLL takes time to settle
+ after a frequency change, so by default it is not enabled.
+
+ This also means that the PLL tables for the selected CPU(s) will
+ be built which may increase the size of the kernel image.
+
# cpu frequency items common between s3c2410 and s3c2440/s3c2442
config S3C2410_IOTIMING
bool
- depends on CPU_FREQ_S3C24XX
+
Re: [PATCH v3 01/11] usb: phy: Add APIs for runtime power management
On Thu, 4 Apr 2013, Felipe Balbi wrote: Some subsystems handle this issue by calling pm_runtime_get_sync() before probing a driver and pm_runtime_put_sync() after unbinding the driver. If the driver is runtime-PM-enabled, it then does its own put_sync near the end of its probe routine and get_sync in its release routine. sounds a bit 'fishy' to me... So a separate entity would call pm_runtime_get_sync(), even when we don't have registered dev_pm_ops, I don't know what you mean by separate entity. The PHY's subsystem would handle this. After all, the subsystem has to handle registering the PHY in the first place. If the PHY doesn't have a dev_pm_ops, why are you talking about doing runtime PM on it? That doesn't make any sense. then drivers need to check if runtime_pm is enabled and call pm_runtime_put*() conditionally before returning from probe(). One They don't have to check. If CONFIG_PM_RUNTIME isn't set or the target is runtime-PM-disabled then pm_runtime_put* is essentially a no-op (in the disabled case it decrements the usage counter but doesn't do anything else). One possible complication I did not mention: The scheme described above assumes the device that uses the PHY will always be registered on the same type of bus. If the device can be used on multiple bus types (and hence in multiple subsystems) then things aren't so simple, because some of the subsystems might support runtime PM and others might not. (You may very well run into this problem with USB controllers that are sometimes on a PCI bus and sometimes on a platform bus.) In this case, the driver needs to adapt to the subsystem's capabilities. Presumably the bus-glue part of the driver takes care of this. remove, we might have another issue: device is already runtime_suspended (due to e.g. autosuspend) when module is removed, a call to pm_runtime_put_sync() will be unbalanced. No ? No. I left out some of the details. For one thing, the subsystem is careful to do a runtime resume before calling the driver's remove method. (Also, if you look over my original description carefully, you'll see that there are no unbalanced calls -- even if the device is already runtime suspended when the driver is unbound.) For another, the subsystem needs to check before calling the driver's runtime-PM methods. There are two brief windows during which the driver isn't in charge of the device even though dev-driver is set. Those windows occur in the subsystem's probe routine (before it calls the driver's probe method) and in the subsystem's remove routine (after it calls the driver's remove method). At such times, the subsystem's runtime-PM handlers must be careful _not_ to call the driver's runtime-PM routines. May be i am misinterpreting !! If PHYs are runtime-PM enabled (PHY probe calls *runtime_enable*), then the consumers need to call pm_runtime_get_sync whever they want to access PHY. No, because in addition to being runtime-PM enabled, the PHY should automatically be runtime resumed when the consumer registers itself as a user of the PHY. Therefore the consumer doesn't need to do anything at all -- which is good for consumers that aren't runtime-PM aware. Alright, so here's my understanding: I suggested letting e.g. DWC3 enable the PHY's runtime_pm; Alan said that it could be done before that so that DWC3 sees an enabled PHY during probe. Basically right. Help me to understand the overall situation a little better: What code registers the PHY initially? What routine does the DWC3 driver call to register itself as a consumer of the PHY? Likewise, what routine does it call to unregister itself? Alan Stern -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 0/2] input: touchscreen: atmel_mxt_ts: Add Device Tree support
This series is an attempt to add Device Tree support to Atmel maXtouch touchscreen driver. First patch adds support for VDD voltage regulator to get operating voltage using regulator API instead of a driver specific field in platform data. Second patch implements Device Tree bindings for the driver and adds respective documentation. Tested on Universal C210 board. Tomasz Figa (2): input: touchscreen: atmel_mxt_ts: Add support for voltage regulator input: touchscreen: atmel_mxt_ts: Add support for Device Tree .../bindings/input/touchscreen/atmel_mxt_ts.txt| 51 arch/arm/mach-exynos/mach-nuri.c | 29 ++- arch/arm/mach-exynos/mach-universal_c210.c | 29 ++- arch/arm/mach-s5pv210/mach-goni.c | 28 ++- drivers/input/touchscreen/atmel_mxt_ts.c | 97 -- include/linux/i2c/atmel_mxt_ts.h | 1 - 6 files changed, 226 insertions(+), 9 deletions(-) create mode 100644 Documentation/devicetree/bindings/input/touchscreen/atmel_mxt_ts.txt -- 1.8.1.5 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/2] input: touchscreen: atmel_mxt_ts: Add support for voltage regulator
This patch removes the voltage field from platform data of the
atmel_mxt_ts driver and replaces it with regulator support.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/mach-exynos/mach-nuri.c | 29 -
arch/arm/mach-exynos/mach-universal_c210.c | 29 -
arch/arm/mach-s5pv210/mach-goni.c | 28 +++-
drivers/input/touchscreen/atmel_mxt_ts.c | 25 -
include/linux/i2c/atmel_mxt_ts.h | 1 -
5 files changed, 103 insertions(+), 9 deletions(-)
diff --git a/arch/arm/mach-exynos/mach-nuri.c b/arch/arm/mach-exynos/mach-nuri.c
index 1ea7973..98be36c 100644
--- a/arch/arm/mach-exynos/mach-nuri.c
+++ b/arch/arm/mach-exynos/mach-nuri.c
@@ -77,6 +77,7 @@ enum fixed_regulator_id {
FIXED_REG_ID_CAM_A28V,
FIXED_REG_ID_CAM_12V,
FIXED_REG_ID_CAM_VT_15V,
+ FIXED_REG_ID_TSP_2_8V,
};
static struct s3c2410_uartcfg nuri_uartcfgs[] __initdata = {
@@ -332,6 +333,32 @@ static struct i2c_board_info i2c1_devs[] __initdata = {
};
/* TSP */
+static struct regulator_consumer_supply tsp_fixed_consumer =
+ REGULATOR_SUPPLY(vdd, 3-004a);
+
+static struct regulator_init_data tsp_fixed_voltage_init_data = {
+ .constraints= {
+ .name = TSP_2.8V,
+ },
+ .num_consumer_supplies = 1,
+ .consumer_supplies = tsp_fixed_consumer,
+};
+
+static struct fixed_voltage_config tsp_fixed_voltage_config = {
+ .supply_name= TSP_VDD,
+ .microvolts = 280,
+ .gpio = -EINVAL,
+ .init_data = tsp_fixed_voltage_init_data,
+};
+
+static struct platform_device tsp_fixed_voltage = {
+ .name = reg-fixed-voltage,
+ .id = FIXED_REG_ID_TSP_2_8V,
+ .dev= {
+ .platform_data = tsp_fixed_voltage_config,
+ },
+};
+
static struct mxt_platform_data mxt_platform_data = {
.x_line = 18,
.y_line = 11,
@@ -339,7 +366,6 @@ static struct mxt_platform_data mxt_platform_data = {
.y_size = 600,
.blen = 0x1,
.threshold = 0x28,
- .voltage= 280, /* 2.8V */
.orient = MXT_DIAGONAL_COUNTER,
.irqflags = IRQF_TRIGGER_FALLING,
};
@@ -1303,6 +1329,7 @@ static struct platform_device *nuri_devices[] __initdata
= {
s3c_device_wdt,
s3c_device_timer[0],
s5p_device_ehci,
+ tsp_fixed_voltage,
s3c_device_i2c3,
i2c9_gpio,
s3c_device_adc,
diff --git a/arch/arm/mach-exynos/mach-universal_c210.c
b/arch/arm/mach-exynos/mach-universal_c210.c
index 497fcb7..2dbae3d 100644
--- a/arch/arm/mach-exynos/mach-universal_c210.c
+++ b/arch/arm/mach-exynos/mach-universal_c210.c
@@ -561,6 +561,7 @@ enum fixed_regulator_id {
FIXED_REG_ID_CAM_S_IF,
FIXED_REG_ID_CAM_I_CORE,
FIXED_REG_ID_CAM_VT_DIO,
+ FIXED_REG_ID_TSP_2_8V,
};
static struct regulator_consumer_supply hdmi_fixed_consumer =
@@ -603,6 +604,32 @@ static struct i2c_board_info i2c5_devs[] __initdata = {
};
/* I2C3 (TSP) */
+static struct regulator_consumer_supply tsp_fixed_consumer =
+ REGULATOR_SUPPLY(vdd, 3-004a);
+
+static struct regulator_init_data tsp_fixed_voltage_init_data = {
+ .constraints= {
+ .name = TSP_2.8V,
+ },
+ .num_consumer_supplies = 1,
+ .consumer_supplies = tsp_fixed_consumer,
+};
+
+static struct fixed_voltage_config tsp_fixed_voltage_config = {
+ .supply_name= TSP_VDD,
+ .microvolts = 280,
+ .gpio = -EINVAL,
+ .init_data = tsp_fixed_voltage_init_data,
+};
+
+static struct platform_device tsp_fixed_voltage = {
+ .name = reg-fixed-voltage,
+ .id = FIXED_REG_ID_TSP_2_8V,
+ .dev= {
+ .platform_data = tsp_fixed_voltage_config,
+ },
+};
+
static struct mxt_platform_data qt602240_platform_data = {
.x_line = 19,
.y_line = 11,
@@ -610,7 +637,6 @@ static struct mxt_platform_data qt602240_platform_data = {
.y_size = 480,
.blen = 0x11,
.threshold = 0x28,
- .voltage= 280, /* 2.8V */
.orient = MXT_DIAGONAL,
.irqflags = IRQF_TRIGGER_FALLING,
};
@@ -1065,6 +1091,7 @@ static struct platform_device *universal_devices[]
__initdata = {
s3c_device_hsmmc2,
s3c_device_hsmmc3,
s3c_device_i2c0,
+ tsp_fixed_voltage,
s3c_device_i2c3,
s3c_device_i2c5,
[PATCH 2/2] input: touchscreen: atmel_mxt_ts: Add support for Device Tree
This patch adds support for Device Tree-based instantation to the
atmel_mxt_ts driver.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
.../bindings/input/touchscreen/atmel_mxt_ts.txt| 51 +++
drivers/input/touchscreen/atmel_mxt_ts.c | 72 ++
2 files changed, 123 insertions(+)
create mode 100644
Documentation/devicetree/bindings/input/touchscreen/atmel_mxt_ts.txt
diff --git
a/Documentation/devicetree/bindings/input/touchscreen/atmel_mxt_ts.txt
b/Documentation/devicetree/bindings/input/touchscreen/atmel_mxt_ts.txt
new file mode 100644
index 000..d3149e1
--- /dev/null
+++ b/Documentation/devicetree/bindings/input/touchscreen/atmel_mxt_ts.txt
@@ -0,0 +1,51 @@
+* Atmel maXtouch touchscreen controller
+
+Required properties:
+- compatible: must be atmel,maxtouch
+- reg: I2C address of the chip
+- interrupt-parent: interrupt controller which provides the interrupt
+- interrupts: interrupt signal to which the chip is connected
+- atmel,x-line: horizonal line
+- atmel,y-line: vertical line
+- atmel,x-size: horizontal resolution of touchscreen
+- atmel,y-size: vertical resolution of touchscreen
+- atmel,burst-length: burst length
+- atmel,threshold: threshold
+- atmel,orientation: touchscreen orientation, must be one of following:
+- 0: normal
+- 1: diagonal
+- 2: horizonally flipped
+- 3: rotated by 90 degrees counter-clockwise
+- 4: vertically flipped
+- 5: rotated by 90 degress clockwise
+- 6: rotated by 180 degrees
+- 7: diagonal counter
+
+Optional properties:
+- vdd-supply: voltage regulator used for power control and reading
+ operating voltage
+
+Example:
+
+ i2c@ {
+ /* ... */
+
+ tsp@4a {
+ compatible = atmel,maxtouch;
+ reg = 0x4a;
+ interrupt-parent = gpe1;
+ interrupts = 7 2;
+
+ atmel,x-line = 19;
+ atmel,y-line = 11;
+ atmel,x-size = 800;
+ atmel,y-size = 480;
+ atmel,burst-length = 0x11;
+ atmel,threshold = 0x28;
+ atmel,orientation = 1;
+
+ vdd-supply = tsp_reg;
+ };
+
+ /* ... */
+ };
diff --git a/drivers/input/touchscreen/atmel_mxt_ts.c
b/drivers/input/touchscreen/atmel_mxt_ts.c
index de708ff..611ac6f 100644
--- a/drivers/input/touchscreen/atmel_mxt_ts.c
+++ b/drivers/input/touchscreen/atmel_mxt_ts.c
@@ -1130,6 +1130,74 @@ static void mxt_input_close(struct input_dev *dev)
mxt_stop(data);
}
+#ifdef CONFIG_OF
+static struct of_device_id mxt_dt_match[] = {
+ { .compatible = atmel,maxtouch },
+ {}
+};
+MODULE_DEVICE_TABLE(of, mxt_dt_match);
+
+static struct mxt_platform_data *mxt_parse_dt(struct device *dev)
+{
+ struct device_node *np = dev-of_node;
+ struct mxt_platform_data *pd;
+ u32 val;
+
+ pd = devm_kzalloc(dev, sizeof(*pd), GFP_KERNEL);
+ if (!pd) {
+ dev_err(dev, Failed to allocate platform data\n);
+ return NULL;
+ }
+
+ if (of_property_read_u32(np, atmel,x-line, pd-x_line)) {
+ dev_err(dev, failed to get atmel,x-line property\n);
+ return NULL;
+ }
+
+ if (of_property_read_u32(np, atmel,y-line, pd-y_line)) {
+ dev_err(dev, failed to get atmel,y-line property\n);
+ return NULL;
+ }
+
+ if (of_property_read_u32(np, atmel,x-size, pd-x_size)) {
+ dev_err(dev, failed to get atmel,x-size property\n);
+ return NULL;
+ }
+
+ if (of_property_read_u32(np, atmel,y-size, pd-y_size)) {
+ dev_err(dev, failed to get atmel,y-size property\n);
+ return NULL;
+ }
+
+ if (of_property_read_u32(np, atmel,burst-length, pd-blen)) {
+ dev_err(dev, failed to get atmel,burst-length property\n);
+ return NULL;
+ }
+
+ if (of_property_read_u32(np, atmel,threshold, pd-threshold)) {
+ dev_err(dev, failed to get atmel,threshold property\n);
+ return NULL;
+ }
+
+ if (of_property_read_u32(np, atmel,orientation, val)) {
+ dev_err(dev, failed to get atmel,orientation property\n);
+ return NULL;
+ }
+ if (val MXT_DIAGONAL_COUNTER) {
+ dev_err(dev, invalid value for atmel-orientation property\n);
+ return NULL;
+ }
+ pd-orient = val;
+
+ return pd;
+}
+#else
+static struct mxt_platform_data *mxt_parse_dt(struct device *dev)
+{
+ return NULL;
+}
+#endif
+
static int mxt_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
@@ -1139,6 +1207,9 @@ static int mxt_probe(struct i2c_client *client,
[PATCH 0/2] regulator: max8952: Add support for Device Tree
This series adds Device Tree support to max8952 voltage regulator driver. First patch prepares platform data structure to be generated at runtime from data parsed from device tree. Second patch implements Device Tree binding and adds necessary documentation. Tested on Universal C210 board. Tomasz Figa (2): regulator: max8952: Separate constraints from platform data struct regulator: max8952: Add Device Tree support .../devicetree/bindings/regulator/max8952.txt | 52 +++ arch/arm/mach-exynos/mach-universal_c210.c | 27 drivers/regulator/max8952.c| 74 +- include/linux/regulator/max8952.h | 10 +-- 4 files changed, 143 insertions(+), 20 deletions(-) create mode 100644 Documentation/devicetree/bindings/regulator/max8952.txt -- 1.8.1.5 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 2/2] regulator: max8952: Add Device Tree support
This patch adds Device Tree support to max8952 regulator driver.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
.../devicetree/bindings/regulator/max8952.txt | 52
drivers/regulator/max8952.c| 70 ++
include/linux/regulator/max8952.h | 8 +--
3 files changed, 126 insertions(+), 4 deletions(-)
create mode 100644 Documentation/devicetree/bindings/regulator/max8952.txt
diff --git a/Documentation/devicetree/bindings/regulator/max8952.txt
b/Documentation/devicetree/bindings/regulator/max8952.txt
new file mode 100644
index 000..866fcdd
--- /dev/null
+++ b/Documentation/devicetree/bindings/regulator/max8952.txt
@@ -0,0 +1,52 @@
+Maxim MAX8952 voltage regulator
+
+Required properties:
+- compatible: must be equal to maxim,max8952
+- reg: I2C slave address, usually 0x60
+- max8952,dvs-mode-microvolt: array of 4 integer values defining DVS voltages
+ in microvolts. All values must be from range 77, 140
+- any required generic properties defined in regulator.txt
+
+Optional properties:
+- max8952,vid-gpios: array of two GPIO pins used for DVS voltage selection
+- max8952,en-gpio: GPIO used to control enable status of regulator
+- max8952,default-mode: index of default DVS voltage, from 0, 3 range
+- max8952,sync-freq: sync frequency, must be one of following values:
+- 0: 26 MHz
+- 1: 13 MHz
+- 2: 19.2 MHz
+ Defaults to 26 MHz if not specified.
+- max8952,ramp-speed: voltage ramp speed, must be one of following values:
+- 0: 32mV/us
+- 1: 16mV/us
+- 2: 8mV/us
+- 3: 4mV/us
+- 4: 2mV/us
+- 5: 1mV/us
+- 6: 0.5mV/us
+- 7: 0.25mV/us
+ Defaults to 32mV/us if not specified.
+- any available generic properties defined in regulator.txt
+
+Example:
+
+ vdd_arm_reg: pmic@60 {
+ compatible = maxim,max8952;
+ reg = 0x60;
+
+ /* max8952-specific properties */
+ max8952,vid-gpios = gpx0 3 0, gpx0 4 0;
+ max8952,en-gpio = gpx0 1 0;
+ max8952,default-mode = 0;
+ max8952,dvs-mode-microvolt = 125, 120,
+ 105, 95;
+ max8952,sync-freq = 0;
+ max8952,ramp-speed = 0;
+
+ /* generic regulator properties */
+ regulator-name = vdd_arm;
+ regulator-min-microvolt = 77;
+ regulator-max-microvolt = 140;
+ regulator-always-on;
+ regulator-boot-on;
+ };
diff --git a/drivers/regulator/max8952.c b/drivers/regulator/max8952.c
index 100b917..4259c78 100644
--- a/drivers/regulator/max8952.c
+++ b/drivers/regulator/max8952.c
@@ -28,6 +28,9 @@
#include linux/regulator/max8952.h
#include linux/gpio.h
#include linux/io.h
+#include linux/of.h
+#include linux/of_gpio.h
+#include linux/regulator/of_regulator.h
#include linux/slab.h
/* Registers */
@@ -126,6 +129,69 @@ static const struct regulator_desc regulator = {
.owner = THIS_MODULE,
};
+#ifdef CONFIG_OF
+static struct of_device_id max8952_dt_match[] = {
+ { .compatible = maxim,max8952 },
+ {},
+};
+MODULE_DEVICE_TABLE(of, max8952_dt_match);
+
+static struct max8952_platform_data *max8952_parse_dt(struct device *dev)
+{
+ struct max8952_platform_data *pd;
+ struct device_node *np = dev-of_node;
+ int ret;
+ int i;
+
+ pd = devm_kzalloc(dev, sizeof(*pd), GFP_KERNEL);
+ if (!pd) {
+ dev_err(dev, Failed to allocate platform data\n);
+ return NULL;
+ }
+
+ pd-gpio_vid0 = of_get_named_gpio(np, max8952,vid-gpios, 0);
+ pd-gpio_vid1 = of_get_named_gpio(np, max8952,vid-gpios, 1);
+ pd-gpio_en = of_get_named_gpio(np, max8952,en-gpio, 0);
+
+ if (of_property_read_u32(np, max8952,default-mode, pd-default_mode))
+ dev_warn(dev, Default mode not specified, assuming 0\n);
+
+ ret = of_property_read_u32_array(np, max8952,dvs-mode-microvolt,
+ pd-dvs_mode, ARRAY_SIZE(pd-dvs_mode));
+ if (ret) {
+ dev_err(dev, max8952,dvs-mode-microvolt property not
specified);
+ return NULL;
+ }
+
+ for (i = 0; i ARRAY_SIZE(pd-dvs_mode); ++i) {
+ if (pd-dvs_mode[i] 77 || pd-dvs_mode[i] 140) {
+ dev_err(dev, DVS voltage %d out of range\n, i);
+ return NULL;
+ }
+ pd-dvs_mode[i] = (pd-dvs_mode[i] - 77) / 1;
+ }
+
+ if (of_property_read_u32(np, max8952,sync-freq, pd-sync_freq))
+ dev_warn(dev, max8952,sync-freq property not specified,
defaulting to 26MHz\n);
+
+ if (of_property_read_u32(np, max8952,ramp-speed, pd-ramp_speed))
+ dev_warn(dev, max8952,ramp-speed property
[PATCH 1/3] mfd: Add irq domain support for max8998 interrupts
This patch adds irq domain support for max8998 interrupts.
The reverse mapping method used is linear mapping since the sub-drivers
of max8998 such as regulator and charger drivers can use the max8998
irq_domain to get the virtual irq number for max8998 interrupts.
All uses of irq_base in platform data and max8997 driver private data
are removed.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
drivers/mfd/Kconfig | 1 +
drivers/mfd/max8998-irq.c | 61 ++---
drivers/mfd/max8998.c | 1 -
drivers/rtc/rtc-max8998.c | 15 +++--
include/linux/mfd/max8998-private.h | 4 ++-
include/linux/mfd/max8998.h | 2 --
6 files changed, 53 insertions(+), 31 deletions(-)
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index c346941..3ab3a11 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -585,6 +585,7 @@ config MFD_MAX8998
bool Maxim Semiconductor MAX8998/National LP3974 PMIC Support
depends on I2C=y GENERIC_HARDIRQS
select MFD_CORE
+ select IRQ_DOMAIN
help
Say yes here to support for Maxim Semiconductor MAX8998 and
National Semiconductor LP3974. This is a Power Management IC.
diff --git a/drivers/mfd/max8998-irq.c b/drivers/mfd/max8998-irq.c
index 5919710..f770abf 100644
--- a/drivers/mfd/max8998-irq.c
+++ b/drivers/mfd/max8998-irq.c
@@ -14,6 +14,7 @@
#include linux/device.h
#include linux/interrupt.h
#include linux/irq.h
+#include linux/irqdomain.h
#include linux/mfd/max8998-private.h
struct max8998_irq_data {
@@ -99,7 +100,8 @@ static struct max8998_irq_data max8998_irqs[] = {
static inline struct max8998_irq_data *
irq_to_max8998_irq(struct max8998_dev *max8998, int irq)
{
- return max8998_irqs[irq - max8998-irq_base];
+ struct irq_data *data = irq_get_irq_data(irq);
+ return max8998_irqs[data-hwirq];
}
static void max8998_irq_lock(struct irq_data *data)
@@ -176,8 +178,10 @@ static irqreturn_t max8998_irq_thread(int irq, void *data)
/* Report */
for (i = 0; i MAX8998_IRQ_NR; i++) {
- if (irq_reg[max8998_irqs[i].reg - 1] max8998_irqs[i].mask)
- handle_nested_irq(max8998-irq_base + i);
+ if (irq_reg[max8998_irqs[i].reg - 1] max8998_irqs[i].mask) {
+ irq = irq_linear_revmap(max8998-irq_domain, i);
+ handle_nested_irq(irq);
+ }
}
return IRQ_HANDLED;
@@ -185,27 +189,40 @@ static irqreturn_t max8998_irq_thread(int irq, void *data)
int max8998_irq_resume(struct max8998_dev *max8998)
{
- if (max8998-irq max8998-irq_base)
- max8998_irq_thread(max8998-irq_base, max8998);
+ if (max8998-irq max8998-irq_domain)
+ max8998_irq_thread(0, max8998);
+ return 0;
+}
+
+static int max8998_irq_domain_map(struct irq_domain *d, unsigned int irq,
+ irq_hw_number_t hw)
+{
+ struct max8997_dev *max8998 = d-host_data;
+
+ irq_set_chip_data(irq, max8998);
+ irq_set_chip_and_handler(irq, max8998_irq_chip, handle_edge_irq);
+ irq_set_nested_thread(irq, 1);
+#ifdef CONFIG_ARM
+ set_irq_flags(irq, IRQF_VALID);
+#else
+ irq_set_noprobe(irq);
+#endif
return 0;
}
+static struct irq_domain_ops max8998_irq_domain_ops = {
+ .map = max8998_irq_domain_map,
+};
+
int max8998_irq_init(struct max8998_dev *max8998)
{
int i;
- int cur_irq;
int ret;
+ struct irq_domain *domain;
if (!max8998-irq) {
dev_warn(max8998-dev,
No interrupt specified, no interrupts\n);
- max8998-irq_base = 0;
- return 0;
- }
-
- if (!max8998-irq_base) {
- dev_err(max8998-dev,
- No interrupt base specified, no interrupts\n);
return 0;
}
@@ -221,19 +238,13 @@ int max8998_irq_init(struct max8998_dev *max8998)
max8998_write_reg(max8998-i2c, MAX8998_REG_STATUSM1, 0xff);
max8998_write_reg(max8998-i2c, MAX8998_REG_STATUSM2, 0xff);
- /* register with genirq */
- for (i = 0; i MAX8998_IRQ_NR; i++) {
- cur_irq = i + max8998-irq_base;
- irq_set_chip_data(cur_irq, max8998);
- irq_set_chip_and_handler(cur_irq, max8998_irq_chip,
-handle_edge_irq);
- irq_set_nested_thread(cur_irq, 1);
-#ifdef CONFIG_ARM
- set_irq_flags(cur_irq, IRQF_VALID);
-#else
- irq_set_noprobe(cur_irq);
-#endif
+ domain = irq_domain_add_linear(NULL, MAX8998_IRQ_NR,
+ max8998_irq_domain_ops, max8998);
+ if (!domain) {
+ dev_err(max8998-dev, could not create irq domain\n);
+
[PATCH 0/3] regulator: max8998: Add support for Device Tree
This series adds Device Tree support to max8998 MFD driver. First patch reworks max8998-irq driver to use IRQ domains. Second patch prepares platform data structure to ease generating it at runtime from data parsed from device tree. Third patch implements Device Tree binding and adds necessary documentation. Tested on Universal C210 board. Tomasz Figa (3): mfd: Add irq domain support for max8998 interrupts regulator: max8998: Use arrays for specifying voltages in platform data mfd: max8998: Add support for Device Tree Documentation/devicetree/bindings/mfd/max8998.txt | 111 ++ arch/arm/mach-exynos/mach-universal_c210.c| 8 +- arch/arm/mach-s5pv210/mach-aquila.c | 8 +- arch/arm/mach-s5pv210/mach-goni.c | 8 +- drivers/mfd/Kconfig | 1 + drivers/mfd/max8998-irq.c | 61 +++--- drivers/mfd/max8998.c | 76 ++- drivers/regulator/max8998.c | 254 -- drivers/rtc/rtc-max8998.c | 17 +- include/linux/mfd/max8998-private.h | 6 +- include/linux/mfd/max8998.h | 20 +- 11 files changed, 435 insertions(+), 135 deletions(-) create mode 100644 Documentation/devicetree/bindings/mfd/max8998.txt -- 1.8.1.5 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 2/3] regulator: max8998: Use arrays for specifying voltages in platform data
This patch modifies the platform data of max8998 to use arrays for
specifying predefined voltages of buck1 and buck2 instead of separate
field for each voltage.
This allows to simplify the code a bit and will help in adding support
for Device Tree, which will be introduced in further patch.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/mach-exynos/mach-universal_c210.c | 8 +--
arch/arm/mach-s5pv210/mach-aquila.c| 8 +--
arch/arm/mach-s5pv210/mach-goni.c | 8 +--
drivers/regulator/max8998.c| 96 +-
include/linux/mfd/max8998.h| 16 ++---
5 files changed, 39 insertions(+), 97 deletions(-)
diff --git a/arch/arm/mach-exynos/mach-universal_c210.c
b/arch/arm/mach-exynos/mach-universal_c210.c
index 497fcb7..366abb3 100644
--- a/arch/arm/mach-exynos/mach-universal_c210.c
+++ b/arch/arm/mach-exynos/mach-universal_c210.c
@@ -540,15 +540,11 @@ static struct max8998_regulator_data lp3974_regulators[]
= {
static struct max8998_platform_data universal_lp3974_pdata = {
.num_regulators = ARRAY_SIZE(lp3974_regulators),
.regulators = lp3974_regulators,
- .buck1_voltage1 = 110, /* INT */
- .buck1_voltage2 = 100,
- .buck1_voltage3 = 110,
- .buck1_voltage4 = 100,
+ .buck1_voltage = { 110, 100, 110, 100 },
.buck1_set1 = EXYNOS4_GPX0(5),
.buck1_set2 = EXYNOS4_GPX0(6),
- .buck2_voltage1 = 120, /* G3D */
- .buck2_voltage2 = 110,
.buck1_default_idx = 0,
+ .buck2_voltage = { 120, 110 },
.buck2_set3 = EXYNOS4_GPE2(0),
.buck2_default_idx = 0,
.wakeup = true,
diff --git a/arch/arm/mach-s5pv210/mach-aquila.c
b/arch/arm/mach-s5pv210/mach-aquila.c
index 11900a8..7e6c718 100644
--- a/arch/arm/mach-s5pv210/mach-aquila.c
+++ b/arch/arm/mach-s5pv210/mach-aquila.c
@@ -377,12 +377,8 @@ static struct max8998_platform_data aquila_max8998_pdata =
{
.buck1_set1 = S5PV210_GPH0(3),
.buck1_set2 = S5PV210_GPH0(4),
.buck2_set3 = S5PV210_GPH0(5),
- .buck1_voltage1 = 120,
- .buck1_voltage2 = 120,
- .buck1_voltage3 = 120,
- .buck1_voltage4 = 120,
- .buck2_voltage1 = 120,
- .buck2_voltage2 = 120,
+ .buck1_voltage = { 120, 120, 120, 120 },
+ .buck2_voltage = { 120, 120 },
};
#endif
diff --git a/arch/arm/mach-s5pv210/mach-goni.c
b/arch/arm/mach-s5pv210/mach-goni.c
index e373de4..2ae61d4 100644
--- a/arch/arm/mach-s5pv210/mach-goni.c
+++ b/arch/arm/mach-s5pv210/mach-goni.c
@@ -580,12 +580,8 @@ static struct max8998_platform_data goni_max8998_pdata = {
.buck1_set1 = S5PV210_GPH0(3),
.buck1_set2 = S5PV210_GPH0(4),
.buck2_set3 = S5PV210_GPH0(5),
- .buck1_voltage1 = 120,
- .buck1_voltage2 = 120,
- .buck1_voltage3 = 120,
- .buck1_voltage4 = 120,
- .buck2_voltage1 = 120,
- .buck2_voltage2 = 120,
+ .buck1_voltage = { 120, 120, 120, 120 },
+ .buck2_voltage = { 120, 120 },
};
#endif
diff --git a/drivers/regulator/max8998.c b/drivers/regulator/max8998.c
index a57a1b1..8c45b93 100644
--- a/drivers/regulator/max8998.c
+++ b/drivers/regulator/max8998.c
@@ -630,6 +630,7 @@ static int max8998_pmic_probe(struct platform_device *pdev)
struct max8998_data *max8998;
struct i2c_client *i2c;
int i, ret, size;
+ unsigned int v;
if (!pdata) {
dev_err(pdev-dev.parent, No platform init data supplied\n);
@@ -688,53 +689,21 @@ static int max8998_pmic_probe(struct platform_device
*pdev)
gpio_request(pdata-buck1_set2, MAX8998 BUCK1_SET2);
gpio_direction_output(pdata-buck1_set2,
(max8998-buck1_idx 1) 0x1);
- /* Set predefined value for BUCK1 register 1 */
- i = 0;
- while (buck12_voltage_map_desc.min +
- buck12_voltage_map_desc.step*i
- pdata-buck1_voltage1)
- i++;
- max8998-buck1_vol[0] = i;
- ret = max8998_write_reg(i2c, MAX8998_REG_BUCK1_VOLTAGE1, i);
- if (ret)
- goto err_out;
-
- /* Set predefined value for BUCK1 register 2 */
- i = 0;
- while (buck12_voltage_map_desc.min +
- buck12_voltage_map_desc.step*i
- pdata-buck1_voltage2)
- i++;
-
- max8998-buck1_vol[1] = i;
- ret = max8998_write_reg(i2c,
[PATCH 3/3] mfd: max8998: Add support for Device Tree
This patch adds Device Tree support to max8998 driver.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
Documentation/devicetree/bindings/mfd/max8998.txt | 111 +++
drivers/mfd/max8998.c | 75 +-
drivers/regulator/max8998.c | 158 +-
drivers/rtc/rtc-max8998.c | 2 +-
include/linux/mfd/max8998-private.h | 2 +
include/linux/mfd/max8998.h | 2 +
6 files changed, 343 insertions(+), 7 deletions(-)
create mode 100644 Documentation/devicetree/bindings/mfd/max8998.txt
diff --git a/Documentation/devicetree/bindings/mfd/max8998.txt
b/Documentation/devicetree/bindings/mfd/max8998.txt
new file mode 100644
index 000..80ac378
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/max8998.txt
@@ -0,0 +1,111 @@
+* Maxim MAX8998, National/TI LP3974 Voltage and Current Regulator
+
+The Maxim MAX8998 is a multi-function device which includes volatage and
+current regulators, rtc, charger controller and other sub-blocks. It is
+interfaced to the host controller using a i2c interface. Each sub-block is
+addressed by the host system using different i2c slave address. This document
+describes the bindings for 'pmic' sub-block of max8998.
+
+Required properties:
+- compatible: Should be one of the following:
+- maxim,max8998 for Maxim MAX8998
+- national,lp3974 or ti,lp3974 for National/TI LP3974.
+- reg: Specifies the i2c slave address of the pmic block. It should be 0x66.
+
+Optional properties:
+- interrupt-parent: Specifies the phandle of the interrupt controller to which
+ the interrupts from max8998 are delivered to.
+- interrupts: Interrupt specifiers for two interrupt sources.
+ - First interrupt specifier is for 'irq1' interrupt.
+ - Second interrupt specifier is for 'alert' interrupt.
+- max8998,pmic-buck1-dvs-gpios: GPIO specifiers for two host gpios used
+ for buck 1 dvs. The format of the gpio specifier depends in the gpio
+ controller.
+- max8998,pmic-buck2-dvs-gpio: GPIO specifier for host gpio used
+ for buck 2 dvs. The format of the gpio specifier depends in the gpio
+ controller.
+- max8998,pmic-buck1-default-dvs-idx: Default voltage setting selected from
+ the possible 4 options selectable by the dvs gpios. The value of this
+ property should be between 0 and 3. If not specified or if out of range, the
+ default value of this property is set to 0.
+- max8998,pmic-buck2-default-dvs-idx: Default voltage setting selected from
+ the possible 2 options selectable by the dvs gpios. The value of this
+ property should be between 0 and 1. If not specified or if out of range, the
+ default value of this property is set to 0.
+- max8998,pmic-buck-voltage-lock: If present, disallows changing of
+ preprogrammed buck dvfs voltages.
+
+Additional properties required if max8998,pmic-buck1-dvs-gpios is defined:
+- max8998,pmic-buck1-dvs-voltage: A set of 4 voltage values in micro-volt (uV)
+ units for buck1 when changing voltage using gpio dvs.
+
+Additional properties required if max8998,pmic-buck2-dvs-gpio is defined:
+- max8998,pmic-buck2-dvs-voltage: A set of 2 voltage values in micro-volt (uV)
+ units for buck2 when changing voltage using gpio dvs.
+
+Regulators: The regulators of max8998 that have to be instantiated should be
+included in a sub-node named 'regulators'. Regulator nodes included in this
+sub-node should be of the format as listed below.
+
+ regulator_name {
+ standard regulator bindings here
+ };
+
+The following are the names of the regulators that the max8998 pmic block
+supports. Note: The 'n' in LDOn and BUCKn represents the LDO or BUCK number
+as per the datasheet of max8998.
+
+ - LDOn
+ - valid values for n are 2 to 17
+ - Example: LDO2, LDO10, LDO17
+ - BUCKn
+ - valid values for n are 1 to 4.
+ - Example: BUCK1, BUCK2, BUCK3, BUCK4
+
+ - ENVICHG: Battery Charging Current Monitor Output. This is a fixed
+ voltage type regulator
+
+ - ESAFEOUT1: (ldo19)
+ - ESAFEOUT2: (ld020)
+
+ - EN32KHz AP: 32KHz clock output for application processor
+ - EN32KHz CP: 32KHz clock output for call processor
+
+The bindings inside the regulator nodes use the standard regulator bindings
+which are documented elsewhere.
+
+Example:
+
+ max8998_pmic@66 {
+ compatible = maxim,max8998-pmic;
+ interrupt-parent = wakeup_eint;
+ reg = 0x66;
+ interrupts = 4 0, 3 0;
+
+ max8998,pmic-buck1-default-dvs-idx = 0;
+ max8998,pmic-buck1-dvs-gpios = gpx0 0 1 0 0, /* SET1 */
+gpx0 1 1 0 0; /* SET2 */
+ max8998,pmic-buck1-dvs-voltage = 135, 130,
+
[PATCH v4 01/14] ARM: SAMSUNG: Move samsung-time to drivers/clocksource
This patch moves the Samsung PWM-based high resolution timer support
code from arch/arm/plat-samsung to drivers/clocksource.
This is a prerequisite for further work on making the driver more
multiplatform and Device Tree friendly.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/plat-samsung/Kconfig| 8 -
arch/arm/plat-samsung/Makefile | 1 -
arch/arm/plat-samsung/samsung-time.c | 394 ---
drivers/clocksource/Kconfig | 7 +
drivers/clocksource/Makefile | 1 +
drivers/clocksource/samsung-time.c | 394 +++
6 files changed, 402 insertions(+), 403 deletions(-)
delete mode 100644 arch/arm/plat-samsung/samsung-time.c
create mode 100644 drivers/clocksource/samsung-time.c
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index 54d1861..6f632ba 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -60,14 +60,6 @@ config S3C_LOWLEVEL_UART_PORT
this configuration should be between zero and two. The port
must have been initialised by the boot-loader before use.
-# timer options
-
-config SAMSUNG_HRT
- bool
- select SAMSUNG_DEV_PWM
- help
- Use the High Resolution timer support
-
# clock options
config SAMSUNG_CLOCK
diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile
index a23c460..87494e1 100644
--- a/arch/arm/plat-samsung/Makefile
+++ b/arch/arm/plat-samsung/Makefile
@@ -12,7 +12,6 @@ obj- :=
# Objects we always build independent of SoC choice
obj-y += init.o cpu.o
-obj-$(CONFIG_SAMSUNG_HRT) += samsung-time.o
obj-$(CONFIG_SAMSUNG_CLOCK)+= clock.o
obj-$(CONFIG_SAMSUNG_CLOCK)+= pwm-clock.o
diff --git a/arch/arm/plat-samsung/samsung-time.c
b/arch/arm/plat-samsung/samsung-time.c
deleted file mode 100644
index f899cbc..000
--- a/arch/arm/plat-samsung/samsung-time.c
+++ /dev/null
@@ -1,394 +0,0 @@
-/*
- * Copyright (c) 2011 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
- *
- * samsung - Common hr-timer support (s3c and s5p)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include linux/interrupt.h
-#include linux/irq.h
-#include linux/err.h
-#include linux/clk.h
-#include linux/clockchips.h
-#include linux/platform_device.h
-
-#include asm/smp_twd.h
-#include asm/mach/time.h
-#include asm/mach/arch.h
-#include asm/mach/map.h
-#include asm/sched_clock.h
-
-#include mach/map.h
-#include plat/devs.h
-#include plat/regs-timer.h
-#include plat/samsung-time.h
-
-static struct clk *tin_event;
-static struct clk *tin_source;
-static struct clk *tdiv_event;
-static struct clk *tdiv_source;
-static struct clk *timerclk;
-static struct samsung_timer_source timer_source;
-static unsigned long clock_count_per_tick;
-static void samsung_timer_resume(void);
-
-static void samsung_time_stop(enum samsung_timer_mode mode)
-{
- unsigned long tcon;
-
- tcon = __raw_readl(S3C2410_TCON);
-
- switch (mode) {
- case SAMSUNG_PWM0:
- tcon = ~S3C2410_TCON_T0START;
- break;
-
- case SAMSUNG_PWM1:
- tcon = ~S3C2410_TCON_T1START;
- break;
-
- case SAMSUNG_PWM2:
- tcon = ~S3C2410_TCON_T2START;
- break;
-
- case SAMSUNG_PWM3:
- tcon = ~S3C2410_TCON_T3START;
- break;
-
- case SAMSUNG_PWM4:
- tcon = ~S3C2410_TCON_T4START;
- break;
-
- default:
- printk(KERN_ERR Invalid Timer %d\n, mode);
- break;
- }
- __raw_writel(tcon, S3C2410_TCON);
-}
-
-static void samsung_time_setup(enum samsung_timer_mode mode, unsigned long
tcnt)
-{
- unsigned long tcon;
-
- tcon = __raw_readl(S3C2410_TCON);
-
- tcnt--;
-
- switch (mode) {
- case SAMSUNG_PWM0:
- tcon = ~(0x0f 0);
- tcon |= S3C2410_TCON_T0MANUALUPD;
- break;
-
- case SAMSUNG_PWM1:
- tcon = ~(0x0f 8);
- tcon |= S3C2410_TCON_T1MANUALUPD;
- break;
-
- case SAMSUNG_PWM2:
- tcon = ~(0x0f 12);
- tcon |= S3C2410_TCON_T2MANUALUPD;
- break;
-
- case SAMSUNG_PWM3:
- tcon = ~(0x0f 16);
- tcon |= S3C2410_TCON_T3MANUALUPD;
- break;
-
- case SAMSUNG_PWM4:
- tcon = ~(0x07 20);
- tcon |= S3C2410_TCON_T4MANUALUPD;
- break;
-
- default:
- printk(KERN_ERR Invalid Timer %d\n, mode);
- break;
- }
-
- __raw_writel(tcnt, S3C2410_TCNTB(mode));
-
[PATCH v4 03/14] clocksource: samsung-time: Use local register definitions
This patch copies PWM timer register definitions to samsung-time.c. The original header in plat is being kept for now, since it is also used by other code that also needs to be reworked to be multiplatform-friendly. Signed-off-by: Tomasz Figa t.f...@samsung.com Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com --- drivers/clocksource/samsung-time.c | 36 +++- 1 file changed, 35 insertions(+), 1 deletion(-) diff --git a/drivers/clocksource/samsung-time.c b/drivers/clocksource/samsung-time.c index d4d7e3e..bccc291 100644 --- a/drivers/clocksource/samsung-time.c +++ b/drivers/clocksource/samsung-time.c @@ -24,9 +24,43 @@ #include mach/map.h #include plat/devs.h -#include plat/regs-timer.h #include plat/samsung-time.h +#define S3C_TIMERREG(x) (S3C_VA_TIMER + (x)) +#define S3C_TIMERREG2(tmr,reg) S3C_TIMERREG((reg)+0x0c+((tmr)*0x0c)) + +#define S3C2410_TCON S3C_TIMERREG(0x08) +#define S3C64XX_TINT_CSTATS3C_TIMERREG(0x44) + +/* for each timer, we have an count buffer, an compare buffer and + * an observation buffer +*/ + +/* WARNING - timer 4 has no buffer reg, and it's observation is at +4 */ + +#define S3C2410_TCNTB(tmr)S3C_TIMERREG2(tmr, 0x00) +#define S3C2410_TCMPB(tmr)S3C_TIMERREG2(tmr, 0x04) + +#define S3C2410_TCON_T4RELOAD(122) +#define S3C2410_TCON_T4MANUALUPD (121) +#define S3C2410_TCON_T4START (120) + +#define S3C2410_TCON_T3RELOAD(119) +#define S3C2410_TCON_T3MANUALUPD (117) +#define S3C2410_TCON_T3START (116) + +#define S3C2410_TCON_T2RELOAD(115) +#define S3C2410_TCON_T2MANUALUPD (113) +#define S3C2410_TCON_T2START (112) + +#define S3C2410_TCON_T1RELOAD(111) +#define S3C2410_TCON_T1MANUALUPD (19) +#define S3C2410_TCON_T1START (18) + +#define S3C2410_TCON_T0RELOAD(13) +#define S3C2410_TCON_T0MANUALUPD (11) +#define S3C2410_TCON_T0START (10) + static struct clk *tin_event; static struct clk *tin_source; static struct clk *tdiv_event; -- 1.8.1.5 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v4 06/14] ARM: SAMSUNG: Add new PWM platform device
This patch adds new samsung_device_pwm platform device that represents
the whole PWM/timer block and includes memory and IRQ resources.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/plat-samsung/devs.c | 16
arch/arm/plat-samsung/include/plat/devs.h | 1 +
2 files changed, 17 insertions(+)
diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c
index e1124d9..bfae4dd 100644
--- a/arch/arm/plat-samsung/devs.c
+++ b/arch/arm/plat-samsung/devs.c
@@ -1168,6 +1168,22 @@ struct platform_device s3c_device_timer[] = {
};
#endif /* CONFIG_SAMSUNG_DEV_PWM */
+static struct resource samsung_pwm_resource[] = {
+ DEFINE_RES_IRQ(IRQ_TIMER0),
+ DEFINE_RES_IRQ(IRQ_TIMER1),
+ DEFINE_RES_IRQ(IRQ_TIMER2),
+ DEFINE_RES_IRQ(IRQ_TIMER3),
+ DEFINE_RES_IRQ(IRQ_TIMER4),
+ DEFINE_RES_MEM(SAMSUNG_PA_TIMER, SZ_4K),
+};
+
+struct platform_device samsung_device_pwm = {
+ .name = samsung-pwm,
+ .id = -1,
+ .num_resources = ARRAY_SIZE(samsung_pwm_resource),
+ .resource = samsung_pwm_resource,
+};
+
/* RTC */
#ifdef CONFIG_PLAT_S3C24XX
diff --git a/arch/arm/plat-samsung/include/plat/devs.h
b/arch/arm/plat-samsung/include/plat/devs.h
index 87d501f..0dc4ac4 100644
--- a/arch/arm/plat-samsung/include/plat/devs.h
+++ b/arch/arm/plat-samsung/include/plat/devs.h
@@ -134,6 +134,7 @@ extern struct platform_device exynos4_device_spdif;
extern struct platform_device samsung_asoc_idma;
extern struct platform_device samsung_device_keypad;
+extern struct platform_device samsung_device_pwm;
/* s3c2440 specific devices */
--
1.8.1.5
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v4 07/14] ARM: SAMSUNG: Set PWM platform data
This patch adds PWM platform data needed for legacy (non-DT) platforms
to handle SoC-specific bits of the PWM/timer block.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/mach-exynos/common.c | 10 ++
arch/arm/mach-s3c24xx/common.c | 10 ++
arch/arm/mach-s3c64xx/common.c | 10 ++
arch/arm/mach-s5p64x0/common.c | 10 ++
arch/arm/mach-s5pc100/common.c | 10 ++
arch/arm/mach-s5pv210/common.c | 10 ++
6 files changed, 60 insertions(+)
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 9cd857e..2b1ef98 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -16,6 +16,7 @@
#include linux/io.h
#include linux/device.h
#include linux/gpio.h
+#include linux/platform_data/samsung-pwm.h
#include linux/sched.h
#include linux/serial_core.h
#include linux/of.h
@@ -378,6 +379,13 @@ void __init exynos_init_io(struct map_desc *mach_desc, int
size)
s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
}
+static struct samsung_pwm_variant exynos4_pwm_variant = {
+ .bits = 32,
+ .div_base = 0,
+ .has_tint_cstat = true,
+ .tclk_mask = (1 5),
+};
+
static void __init exynos4_map_io(void)
{
iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc));
@@ -419,6 +427,8 @@ static void __init exynos4_map_io(void)
s5p_hdmi_setname(exynos4-hdmi);
s3c64xx_spi_setname(exynos4210-spi);
+
+ samsung_device_pwm.dev.platform_data = exynos4_pwm_variant;
}
static void __init exynos5_map_io(void)
diff --git a/arch/arm/mach-s3c24xx/common.c b/arch/arm/mach-s3c24xx/common.c
index d97533d..c09c6ba 100644
--- a/arch/arm/mach-s3c24xx/common.c
+++ b/arch/arm/mach-s3c24xx/common.c
@@ -27,6 +27,7 @@
#include linux/interrupt.h
#include linux/ioport.h
#include linux/serial_core.h
+#include linux/platform_data/samsung-pwm.h
#include linux/platform_device.h
#include linux/delay.h
#include linux/io.h
@@ -216,6 +217,13 @@ static void s3c24xx_default_idle(void)
S3C2410_CLKCON);
}
+static struct samsung_pwm_variant s3c24xx_pwm_variant = {
+ .bits = 16,
+ .div_base = 1,
+ .has_tint_cstat = false,
+ .tclk_mask = (1 4),
+};
+
void __init s3c24xx_init_io(struct map_desc *mach_desc, int size)
{
arm_pm_idle = s3c24xx_default_idle;
@@ -232,6 +240,8 @@ void __init s3c24xx_init_io(struct map_desc *mach_desc, int
size)
s3c24xx_init_cpu();
s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
+
+ samsung_device_pwm.dev.platform_data = s3c24xx_pwm_variant;
}
/* Serial port registrations */
diff --git a/arch/arm/mach-s3c64xx/common.c b/arch/arm/mach-s3c64xx/common.c
index 0b9c0ba..526b45e 100644
--- a/arch/arm/mach-s3c64xx/common.c
+++ b/arch/arm/mach-s3c64xx/common.c
@@ -26,6 +26,7 @@
#include linux/irq.h
#include linux/gpio.h
#include linux/irqchip/arm-vic.h
+#include linux/platform_data/samsung-pwm.h
#include asm/mach/arch.h
#include asm/mach/map.h
@@ -148,6 +149,13 @@ static struct device s3c64xx_dev = {
.bus= s3c64xx_subsys,
};
+static struct samsung_pwm_variant s3c64xx_pwm_variant = {
+ .bits = 32,
+ .div_base = 0,
+ .has_tint_cstat = true,
+ .tclk_mask = (1 7) | (1 6) | (1 5),
+};
+
/* read cpu identification code */
void __init s3c64xx_init_io(struct map_desc *mach_desc, int size)
@@ -160,6 +168,8 @@ void __init s3c64xx_init_io(struct map_desc *mach_desc, int
size)
s3c64xx_init_cpu();
s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
+
+ samsung_device_pwm.dev.platform_data = s3c64xx_pwm_variant;
}
static __init int s3c64xx_dev_init(void)
diff --git a/arch/arm/mach-s5p64x0/common.c b/arch/arm/mach-s5p64x0/common.c
index 8ae5800..5cd3048 100644
--- a/arch/arm/mach-s5p64x0/common.c
+++ b/arch/arm/mach-s5p64x0/common.c
@@ -19,6 +19,7 @@
#include linux/io.h
#include linux/device.h
#include linux/serial_core.h
+#include linux/platform_data/samsung-pwm.h
#include linux/platform_device.h
#include linux/sched.h
#include linux/dma-mapping.h
@@ -156,6 +157,13 @@ static void s5p64x0_idle(void)
cpu_do_idle();
}
+static struct samsung_pwm_variant s5p64x0_pwm_variant = {
+ .bits = 32,
+ .div_base = 0,
+ .has_tint_cstat = true,
+ .tclk_mask = 0,
+};
+
/*
* s5p64x0_map_io
*
@@ -173,6 +181,8 @@ void __init s5p64x0_init_io(struct map_desc *mach_desc, int
size)
s5p_init_cpu(S5P64X0_SYS_ID);
s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
+
+ samsung_device_pwm.dev.platform_data = s5p64x0_pwm_variant;
}
void __init s5p6440_map_io(void)
diff --git a/arch/arm/mach-s5pc100/common.c b/arch/arm/mach-s5pc100/common.c
index cc6e561..d21938e 100644
---
[PATCH v4 08/14] clocksource: samsung-time: Use Samsung PWM/timer master driver
This patch modifies the samsung-time clocksource driver to use the
interface provided by Samsung PWM/timer master driver to get platform
data.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/plat-samsung/devs.c | 7
arch/arm/plat-samsung/include/plat/samsung-time.h | 17 +++--
drivers/clocksource/samsung-time.c| 44 ++-
include/linux/platform_data/samsung-pwm.h | 1 +
4 files changed, 51 insertions(+), 18 deletions(-)
diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c
index bfae4dd..747763d 100644
--- a/arch/arm/plat-samsung/devs.c
+++ b/arch/arm/plat-samsung/devs.c
@@ -57,6 +57,7 @@
#include plat/keypad.h
#include linux/platform_data/mmc-s3cmci.h
#include linux/platform_data/mtd-nand-s3c2410.h
+#include plat/samsung-time.h
#include plat/sdhci.h
#include linux/platform_data/touchscreen-s3c2410.h
#include linux/platform_data/usb-s3c2410_udc.h
@@ -1184,6 +1185,12 @@ struct platform_device samsung_device_pwm = {
.resource = samsung_pwm_resource,
};
+void samsung_timer_init(void)
+{
+ samsung_pwm_register(samsung_device_pwm);
+ samsung_time_init();
+}
+
/* RTC */
#ifdef CONFIG_PLAT_S3C24XX
diff --git a/arch/arm/plat-samsung/include/plat/samsung-time.h
b/arch/arm/plat-samsung/include/plat/samsung-time.h
index 5d098ef..c0f35cc 100644
--- a/arch/arm/plat-samsung/include/plat/samsung-time.h
+++ b/arch/arm/plat-samsung/include/plat/samsung-time.h
@@ -13,6 +13,10 @@
#ifndef __ASM_PLAT_SAMSUNG_TIME_H
#define __ASM_PLAT_SAMSUNG_TIME_H __FILE__
+#include linux/platform_data/samsung-pwm.h
+
+#include plat/devs.h
+
/* SAMSUNG HR-Timer Clock mode */
enum samsung_timer_mode {
SAMSUNG_PWM0,
@@ -39,8 +43,17 @@ struct samsung_timer_source {
#define TSIZE 32
#endif
-extern void __init samsung_set_timer_source(enum samsung_timer_mode event,
- enum samsung_timer_mode source);
+static inline void samsung_set_timer_source(enum samsung_timer_mode event,
+ enum samsung_timer_mode source)
+{
+ struct samsung_pwm_variant *variant;
+
+ variant = samsung_device_pwm.dev.platform_data;
+ BUG_ON(!variant);
+
+ variant-output_mask = (1 5) - 1;
+ variant-output_mask = ~((1 event) | (1 source));
+}
extern void __init samsung_timer_init(void);
diff --git a/drivers/clocksource/samsung-time.c
b/drivers/clocksource/samsung-time.c
index bccc291..11d7a54 100644
--- a/drivers/clocksource/samsung-time.c
+++ b/drivers/clocksource/samsung-time.c
@@ -14,19 +14,14 @@
#include linux/err.h
#include linux/clk.h
#include linux/clockchips.h
+#include linux/mfd/samsung-pwm.h
#include linux/platform_device.h
-#include asm/smp_twd.h
-#include asm/mach/time.h
-#include asm/mach/arch.h
-#include asm/mach/map.h
#include asm/sched_clock.h
-#include mach/map.h
#include plat/devs.h
#include plat/samsung-time.h
-
-#define S3C_TIMERREG(x) (S3C_VA_TIMER + (x))
+#define S3C_TIMERREG(x) (pwm-base + (x))
#define S3C_TIMERREG2(tmr,reg) S3C_TIMERREG((reg)+0x0c+((tmr)*0x0c))
#define S3C2410_TCON S3C_TIMERREG(0x08)
@@ -61,6 +56,7 @@
#define S3C2410_TCON_T0MANUALUPD (11)
#define S3C2410_TCON_T0START (10)
+static struct samsung_pwm *pwm;
static struct clk *tin_event;
static struct clk *tin_source;
static struct clk *tdiv_event;
@@ -256,16 +252,9 @@ static void samsung_timer_resume(void)
samsung_time_start(timer_source.source_id, true);
}
-void __init samsung_set_timer_source(enum samsung_timer_mode event,
-enum samsung_timer_mode source)
-{
s3c_device_timer[event].dev.bus = platform_bus_type;
s3c_device_timer[source].dev.bus = platform_bus_type;
- timer_source.event_id = event;
- timer_source.source_id = source;
-}
-
static struct clock_event_device time_event_device = {
.name = samsung_event_timer,
.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
@@ -311,7 +300,7 @@ static void __init samsung_clockevent_init(void)
time_event_device.cpumask = cpumask_of(0);
clockevents_config_and_register(time_event_device, clock_rate, 1, -1);
- irq_number = timer_source.event_id + IRQ_TIMER0;
+ irq_number = pwm-irq[timer_source.event_id];
setup_irq(irq_number, samsung_clock_event_irq);
}
@@ -420,8 +409,31 @@ static void __init samsung_timer_resources(void)
clk_enable(tin_source);
}
-void __init samsung_timer_init(void)
+void __init samsung_time_init(void)
{
+ u8 mask;
+ int channel;
+
+ pwm = samsung_pwm_get(NULL);
+ if (IS_ERR(pwm))
+ panic(failed to get PWM device);
+
+ mask = ~pwm-variant.output_mask ((1 SAMSUNG_PWM_NUM) - 1);
+ channel = fls(mask) - 1;
+ if (channel 0)
+
[PATCH v4 09/14] clocksource: samsung-time: Use variant data to get SoC-specific bits
This patch modifies the driver to calculate SoC-specific parameters from
variant data received from PWM/timer master driver.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/plat-samsung/include/plat/samsung-time.h | 17
drivers/clocksource/samsung-time.c| 51 ++-
2 files changed, 41 insertions(+), 27 deletions(-)
diff --git a/arch/arm/plat-samsung/include/plat/samsung-time.h
b/arch/arm/plat-samsung/include/plat/samsung-time.h
index c0f35cc..785c6b7 100644
--- a/arch/arm/plat-samsung/include/plat/samsung-time.h
+++ b/arch/arm/plat-samsung/include/plat/samsung-time.h
@@ -26,23 +26,6 @@ enum samsung_timer_mode {
SAMSUNG_PWM4,
};
-struct samsung_timer_source {
- unsigned int event_id;
- unsigned int source_id;
-};
-
-#if defined(CONFIG_ARCH_S3C24XX) || defined(CONFIG_ARCH_S5PC100)
-#define TCNT_MAX 0x
-#define TSCALER_DIV25
-#define TDIV 50
-#define TSIZE 16
-#else
-#define TCNT_MAX 0x
-#define TSCALER_DIV2
-#define TDIV 2
-#define TSIZE 32
-#endif
-
static inline void samsung_set_timer_source(enum samsung_timer_mode event,
enum samsung_timer_mode source)
{
diff --git a/drivers/clocksource/samsung-time.c
b/drivers/clocksource/samsung-time.c
index 11d7a54..4fa6f6f 100644
--- a/drivers/clocksource/samsung-time.c
+++ b/drivers/clocksource/samsung-time.c
@@ -20,7 +20,6 @@
#include asm/sched_clock.h
#include plat/devs.h
-#include plat/samsung-time.h
#define S3C_TIMERREG(x) (pwm-base + (x))
#define S3C_TIMERREG2(tmr,reg) S3C_TIMERREG((reg)+0x0c+((tmr)*0x0c))
@@ -56,6 +55,22 @@
#define S3C2410_TCON_T0MANUALUPD (11)
#define S3C2410_TCON_T0START (10)
+enum samsung_timer_mode {
+ SAMSUNG_PWM0,
+ SAMSUNG_PWM1,
+ SAMSUNG_PWM2,
+ SAMSUNG_PWM3,
+ SAMSUNG_PWM4,
+};
+
+struct samsung_timer_source {
+ unsigned int event_id;
+ unsigned int source_id;
+ u32 tcnt_max;
+ u16 tscaler_div;
+ u16 tdiv;
+};
+
static struct samsung_pwm *pwm;
static struct clk *tin_event;
static struct clk *tin_source;
@@ -248,7 +263,7 @@ static void samsung_timer_resume(void)
samsung_time_start(timer_source.event_id, true);
/* source timer restart */
- samsung_time_setup(timer_source.source_id, TCNT_MAX);
+ samsung_time_setup(timer_source.source_id, timer_source.tcnt_max);
samsung_time_start(timer_source.source_id, true);
}
@@ -290,15 +305,17 @@ static void __init samsung_clockevent_init(void)
tscaler = clk_get_parent(tdiv_event);
- clk_set_rate(tscaler, pclk / TSCALER_DIV);
- clk_set_rate(tdiv_event, pclk / TDIV);
+ clk_set_rate(tscaler, pclk / timer_source.tscaler_div);
+ clk_set_rate(tdiv_event,
+ pclk / (timer_source.tscaler_div * timer_source.tdiv));
clk_set_parent(tin_event, tdiv_event);
clock_rate = clk_get_rate(tin_event);
clock_count_per_tick = clock_rate / HZ;
time_event_device.cpumask = cpumask_of(0);
- clockevents_config_and_register(time_event_device, clock_rate, 1, -1);
+ clockevents_config_and_register(time_event_device, clock_rate,
+ 1, timer_source.tcnt_max);
irq_number = pwm-irq[timer_source.event_id];
setup_irq(irq_number, samsung_clock_event_irq);
@@ -349,21 +366,26 @@ static void __init samsung_clocksource_init(void)
{
unsigned long pclk;
unsigned long clock_rate;
+ int ret;
pclk = clk_get_rate(timerclk);
- clk_set_rate(tdiv_source, pclk / TDIV);
+ clk_set_rate(tdiv_source,
+ pclk / (timer_source.tscaler_div * timer_source.tdiv));
clk_set_parent(tin_source, tdiv_source);
clock_rate = clk_get_rate(tin_source);
- samsung_time_setup(timer_source.source_id, TCNT_MAX);
+ samsung_time_setup(timer_source.source_id, timer_source.tcnt_max);
samsung_time_start(timer_source.source_id, true);
- setup_sched_clock(samsung_read_sched_clock, TSIZE, clock_rate);
+ setup_sched_clock(samsung_read_sched_clock,
+ pwm-variant.bits, clock_rate);
- if (clocksource_mmio_init(samsung_timer_reg(),
samsung_clocksource_timer,
- clock_rate, 250, TSIZE, clocksource_mmio_readl_down))
+ ret = clocksource_mmio_init(samsung_timer_reg(),
+ samsung_clocksource_timer, clock_rate, 250,
+ pwm-variant.bits, clocksource_mmio_readl_down);
+ if (ret)
panic(samsung_clocksource_timer: can't register
clocksource\n);
}
@@ -407,6 +429,15 @@ static void __init samsung_timer_resources(void)
[PATCH v4 10/14] clocksource: samsung-time: Use master driver to configure dividers
This patch modifies the driver to use functions provided by master
driver to configure PWM frequency dividers.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
drivers/clocksource/samsung-time.c | 61 +-
1 file changed, 8 insertions(+), 53 deletions(-)
diff --git a/drivers/clocksource/samsung-time.c
b/drivers/clocksource/samsung-time.c
index 4fa6f6f..e617d37 100644
--- a/drivers/clocksource/samsung-time.c
+++ b/drivers/clocksource/samsung-time.c
@@ -19,7 +19,6 @@
#include asm/sched_clock.h
-#include plat/devs.h
#define S3C_TIMERREG(x) (pwm-base + (x))
#define S3C_TIMERREG2(tmr,reg) S3C_TIMERREG((reg)+0x0c+((tmr)*0x0c))
@@ -72,10 +71,6 @@ struct samsung_timer_source {
};
static struct samsung_pwm *pwm;
-static struct clk *tin_event;
-static struct clk *tin_source;
-static struct clk *tdiv_event;
-static struct clk *tdiv_source;
static struct clk *timerclk;
static struct samsung_timer_source timer_source;
static unsigned long clock_count_per_tick;
@@ -267,9 +262,6 @@ static void samsung_timer_resume(void)
samsung_time_start(timer_source.source_id, true);
}
- s3c_device_timer[event].dev.bus = platform_bus_type;
- s3c_device_timer[source].dev.bus = platform_bus_type;
-
static struct clock_event_device time_event_device = {
.name = samsung_event_timer,
.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
@@ -299,18 +291,14 @@ static void __init samsung_clockevent_init(void)
unsigned long pclk;
unsigned long clock_rate;
unsigned int irq_number;
- struct clk *tscaler;
pclk = clk_get_rate(timerclk);
- tscaler = clk_get_parent(tdiv_event);
-
- clk_set_rate(tscaler, pclk / timer_source.tscaler_div);
- clk_set_rate(tdiv_event,
- pclk / (timer_source.tscaler_div * timer_source.tdiv));
- clk_set_parent(tin_event, tdiv_event);
+ samsung_pwm_set_prescale(pwm, timer_source.event_id,
+ timer_source.tscaler_div);
+ samsung_pwm_set_divisor(pwm, timer_source.event_id, timer_source.tdiv);
- clock_rate = clk_get_rate(tin_event);
+ clock_rate = pclk / (timer_source.tscaler_div * timer_source.tdiv);
clock_count_per_tick = clock_rate / HZ;
time_event_device.cpumask = cpumask_of(0);
@@ -370,11 +358,11 @@ static void __init samsung_clocksource_init(void)
pclk = clk_get_rate(timerclk);
- clk_set_rate(tdiv_source,
- pclk / (timer_source.tscaler_div * timer_source.tdiv));
- clk_set_parent(tin_source, tdiv_source);
+ samsung_pwm_set_prescale(pwm, timer_source.source_id,
+ timer_source.tscaler_div);
+ samsung_pwm_set_divisor(pwm, timer_source.source_id, timer_source.tdiv);
- clock_rate = clk_get_rate(tin_source);
+ clock_rate = pclk / (timer_source.tscaler_div * timer_source.tdiv);
samsung_time_setup(timer_source.source_id, timer_source.tcnt_max);
samsung_time_start(timer_source.source_id, true);
@@ -391,43 +379,10 @@ static void __init samsung_clocksource_init(void)
static void __init samsung_timer_resources(void)
{
-
- unsigned long event_id = timer_source.event_id;
- unsigned long source_id = timer_source.source_id;
- char devname[15];
-
timerclk = clk_get(NULL, timers);
if (IS_ERR(timerclk))
panic(failed to get timers clock for timer);
- clk_enable(timerclk);
-
- sprintf(devname, s3c24xx-pwm.%lu, event_id);
- s3c_device_timer[event_id].id = event_id;
- s3c_device_timer[event_id].dev.init_name = devname;
-
- tin_event = clk_get(s3c_device_timer[event_id].dev, pwm-tin);
- if (IS_ERR(tin_event))
- panic(failed to get pwm-tin clock for event timer);
-
- tdiv_event = clk_get(s3c_device_timer[event_id].dev, pwm-tdiv);
- if (IS_ERR(tdiv_event))
- panic(failed to get pwm-tdiv clock for event timer);
-
- clk_enable(tin_event);
-
- sprintf(devname, s3c24xx-pwm.%lu, source_id);
- s3c_device_timer[source_id].id = source_id;
- s3c_device_timer[source_id].dev.init_name = devname;
-
- tin_source = clk_get(s3c_device_timer[source_id].dev, pwm-tin);
- if (IS_ERR(tin_source))
- panic(failed to get pwm-tin clock for source timer);
-
- tdiv_source = clk_get(s3c_device_timer[source_id].dev, pwm-tdiv);
- if (IS_ERR(tdiv_source))
- panic(failed to get pwm-tdiv clock for source timer);
-
clk_enable(tin_source);
timer_source.tcnt_max = (1UL pwm-variant.bits) - 1;
--
1.8.1.5
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[PATCH v4 11/14] clocksource: samsung-time: Use clk_prepare_enable
This patch modifies the driver to use clk_prepare_enable instead of
clk_enable, as required to be compliant with Common Clock Framework.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
drivers/clocksource/samsung-time.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clocksource/samsung-time.c
b/drivers/clocksource/samsung-time.c
index e617d37..7674882 100644
--- a/drivers/clocksource/samsung-time.c
+++ b/drivers/clocksource/samsung-time.c
@@ -383,7 +383,7 @@ static void __init samsung_timer_resources(void)
if (IS_ERR(timerclk))
panic(failed to get timers clock for timer);
- clk_enable(tin_source);
+ clk_prepare_enable(timerclk);
timer_source.tcnt_max = (1UL pwm-variant.bits) - 1;
if (pwm-variant.bits == 16) {
--
1.8.1.5
--
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[PATCH v4 12/14] clocksource: samsung-time: Use master driver to control PWM channels
This patch modifies the driver to use functions provided by the master
driver to control status of PWM channels instead of modifying shared
registers directly.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
drivers/clocksource/samsung-time.c | 168 -
1 file changed, 15 insertions(+), 153 deletions(-)
diff --git a/drivers/clocksource/samsung-time.c
b/drivers/clocksource/samsung-time.c
index 7674882..9425955 100644
--- a/drivers/clocksource/samsung-time.c
+++ b/drivers/clocksource/samsung-time.c
@@ -76,153 +76,11 @@ static struct samsung_timer_source timer_source;
static unsigned long clock_count_per_tick;
static void samsung_timer_resume(void);
-static void samsung_time_stop(enum samsung_timer_mode mode)
-{
- unsigned long tcon;
-
- tcon = __raw_readl(S3C2410_TCON);
-
- switch (mode) {
- case SAMSUNG_PWM0:
- tcon = ~S3C2410_TCON_T0START;
- break;
-
- case SAMSUNG_PWM1:
- tcon = ~S3C2410_TCON_T1START;
- break;
-
- case SAMSUNG_PWM2:
- tcon = ~S3C2410_TCON_T2START;
- break;
-
- case SAMSUNG_PWM3:
- tcon = ~S3C2410_TCON_T3START;
- break;
-
- case SAMSUNG_PWM4:
- tcon = ~S3C2410_TCON_T4START;
- break;
-
- default:
- printk(KERN_ERR Invalid Timer %d\n, mode);
- break;
- }
- __raw_writel(tcon, S3C2410_TCON);
-}
-
-static void samsung_time_setup(enum samsung_timer_mode mode, unsigned long
tcnt)
-{
- unsigned long tcon;
-
- tcon = __raw_readl(S3C2410_TCON);
-
- tcnt--;
-
- switch (mode) {
- case SAMSUNG_PWM0:
- tcon = ~(0x0f 0);
- tcon |= S3C2410_TCON_T0MANUALUPD;
- break;
-
- case SAMSUNG_PWM1:
- tcon = ~(0x0f 8);
- tcon |= S3C2410_TCON_T1MANUALUPD;
- break;
-
- case SAMSUNG_PWM2:
- tcon = ~(0x0f 12);
- tcon |= S3C2410_TCON_T2MANUALUPD;
- break;
-
- case SAMSUNG_PWM3:
- tcon = ~(0x0f 16);
- tcon |= S3C2410_TCON_T3MANUALUPD;
- break;
-
- case SAMSUNG_PWM4:
- tcon = ~(0x07 20);
- tcon |= S3C2410_TCON_T4MANUALUPD;
- break;
-
- default:
- printk(KERN_ERR Invalid Timer %d\n, mode);
- break;
- }
-
- __raw_writel(tcnt, S3C2410_TCNTB(mode));
- __raw_writel(tcnt, S3C2410_TCMPB(mode));
- __raw_writel(tcon, S3C2410_TCON);
-}
-
-static void samsung_time_start(enum samsung_timer_mode mode, bool periodic)
-{
- unsigned long tcon;
-
- tcon = __raw_readl(S3C2410_TCON);
-
- switch (mode) {
- case SAMSUNG_PWM0:
- tcon |= S3C2410_TCON_T0START;
- tcon = ~S3C2410_TCON_T0MANUALUPD;
-
- if (periodic)
- tcon |= S3C2410_TCON_T0RELOAD;
- else
- tcon = ~S3C2410_TCON_T0RELOAD;
- break;
-
- case SAMSUNG_PWM1:
- tcon |= S3C2410_TCON_T1START;
- tcon = ~S3C2410_TCON_T1MANUALUPD;
-
- if (periodic)
- tcon |= S3C2410_TCON_T1RELOAD;
- else
- tcon = ~S3C2410_TCON_T1RELOAD;
- break;
-
- case SAMSUNG_PWM2:
- tcon |= S3C2410_TCON_T2START;
- tcon = ~S3C2410_TCON_T2MANUALUPD;
-
- if (periodic)
- tcon |= S3C2410_TCON_T2RELOAD;
- else
- tcon = ~S3C2410_TCON_T2RELOAD;
- break;
-
- case SAMSUNG_PWM3:
- tcon |= S3C2410_TCON_T3START;
- tcon = ~S3C2410_TCON_T3MANUALUPD;
-
- if (periodic)
- tcon |= S3C2410_TCON_T3RELOAD;
- else
- tcon = ~S3C2410_TCON_T3RELOAD;
- break;
-
- case SAMSUNG_PWM4:
- tcon |= S3C2410_TCON_T4START;
- tcon = ~S3C2410_TCON_T4MANUALUPD;
-
- if (periodic)
- tcon |= S3C2410_TCON_T4RELOAD;
- else
- tcon = ~S3C2410_TCON_T4RELOAD;
- break;
-
- default:
- printk(KERN_ERR Invalid Timer %d\n, mode);
- break;
- }
- __raw_writel(tcon, S3C2410_TCON);
-}
-
static int samsung_set_next_event(unsigned long cycles,
struct clock_event_device *evt)
{
- samsung_time_setup(timer_source.event_id, cycles);
- samsung_time_start(timer_source.event_id, false);
+ samsung_pwm_setup(pwm, timer_source.event_id, cycles - 1, cycles - 1);
+ samsung_pwm_start(pwm, timer_source.event_id, false);
return
[PATCH v4 13/14] clocksource: samsung-time: Move IRQ mask/ack handling to the driver
Since the clocksource driver is the only user of PWM timer interrupts, there is no need to create an IRQ chip for handling them. This patch the way of PWM timer interrupt handling to use real VIC/GIC interrupt signals and handle PWM mask/ack register internally in samsung-time driver. Signed-off-by: Tomasz Figa t.f...@samsung.com Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com --- arch/arm/mach-exynos/include/mach/irqs.h | 3 +-- arch/arm/mach-s3c24xx/include/mach/irqs.h | 6 ++ arch/arm/mach-s3c64xx/common.c| 3 --- arch/arm/mach-s3c64xx/include/mach/irqs.h | 8 arch/arm/mach-s5p64x0/include/mach/irqs.h | 2 -- arch/arm/mach-s5pc100/include/mach/irqs.h | 2 -- arch/arm/mach-s5pv210/include/mach/irqs.h | 2 -- arch/arm/plat-samsung/devs.c | 20 ++-- arch/arm/plat-samsung/include/plat/irqs.h | 9 - arch/arm/plat-samsung/s5p-irq.c | 2 -- drivers/clocksource/samsung-time.c| 10 ++ 11 files changed, 27 insertions(+), 40 deletions(-) diff --git a/arch/arm/mach-exynos/include/mach/irqs.h b/arch/arm/mach-exynos/include/mach/irqs.h index 35fe6d5..6fbe229 100644 --- a/arch/arm/mach-exynos/include/mach/irqs.h +++ b/arch/arm/mach-exynos/include/mach/irqs.h @@ -464,10 +464,9 @@ #define S5P_EINT_BASE2 (S5P_EINT_BASE1 + 16) #define S5P_GPIOINT_BASE (S5P_EINT_BASE1 + 32) #define IRQ_GPIO_END (S5P_GPIOINT_BASE + S5P_GPIOINT_COUNT) -#define IRQ_TIMER_BASE (IRQ_GPIO_END + 64) /* Set the default NR_IRQS */ -#define NR_IRQS(IRQ_TIMER_BASE + IRQ_TIMER_COUNT) +#define NR_IRQS(IRQ_GPIO_END + 64) #endif /* __ASM_ARCH_IRQS_H */ diff --git a/arch/arm/mach-s3c24xx/include/mach/irqs.h b/arch/arm/mach-s3c24xx/include/mach/irqs.h index 43cada8..1ecbadb 100644 --- a/arch/arm/mach-s3c24xx/include/mach/irqs.h +++ b/arch/arm/mach-s3c24xx/include/mach/irqs.h @@ -207,6 +207,12 @@ #define IRQ_LCD_VSYNC IRQ_S3C2443_LCD3 #define IRQ_LCD_SYSTEM IRQ_S3C2443_LCD2 +#define IRQ_TIMER0_VIC IRQ_TIMER0 +#define IRQ_TIMER1_VIC IRQ_TIMER1 +#define IRQ_TIMER2_VIC IRQ_TIMER2 +#define IRQ_TIMER3_VIC IRQ_TIMER3 +#define IRQ_TIMER4_VIC IRQ_TIMER4 + #ifdef CONFIG_CPU_S3C2440 #define IRQ_S3C244X_AC97 IRQ_S3C2440_AC97 #else diff --git a/arch/arm/mach-s3c64xx/common.c b/arch/arm/mach-s3c64xx/common.c index 526b45e..5dca83a 100644 --- a/arch/arm/mach-s3c64xx/common.c +++ b/arch/arm/mach-s3c64xx/common.c @@ -198,9 +198,6 @@ void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid) /* initialise the pair of VICs */ vic_init(VA_VIC0, IRQ_VIC0_BASE, vic0_valid, IRQ_VIC0_RESUME); vic_init(VA_VIC1, IRQ_VIC1_BASE, vic1_valid, IRQ_VIC1_RESUME); - - /* add the timer sub-irqs */ - s3c_init_vic_timer_irq(5, IRQ_TIMER0); } #define eint_offset(irq) ((irq) - IRQ_EINT(0)) diff --git a/arch/arm/mach-s3c64xx/include/mach/irqs.h b/arch/arm/mach-s3c64xx/include/mach/irqs.h index 96d60e0..67bbd1d 100644 --- a/arch/arm/mach-s3c64xx/include/mach/irqs.h +++ b/arch/arm/mach-s3c64xx/include/mach/irqs.h @@ -107,14 +107,6 @@ #define IRQ_TC IRQ_PENDN #define IRQ_ADCS3C64XX_IRQ_VIC1(31) -#define S3C64XX_TIMER_IRQ(x) S3C_IRQ(64 + (x)) - -#define IRQ_TIMER0 S3C64XX_TIMER_IRQ(0) -#define IRQ_TIMER1 S3C64XX_TIMER_IRQ(1) -#define IRQ_TIMER2 S3C64XX_TIMER_IRQ(2) -#define IRQ_TIMER3 S3C64XX_TIMER_IRQ(3) -#define IRQ_TIMER4 S3C64XX_TIMER_IRQ(4) - /* compatibility for device defines */ #define IRQ_IIC1 IRQ_S3C6410_IIC1 diff --git a/arch/arm/mach-s5p64x0/include/mach/irqs.h b/arch/arm/mach-s5p64x0/include/mach/irqs.h index 5b845e8..53982db 100644 --- a/arch/arm/mach-s5p64x0/include/mach/irqs.h +++ b/arch/arm/mach-s5p64x0/include/mach/irqs.h @@ -141,8 +141,6 @@ #define IRQ_EINT_GROUP(grp, x) (IRQ_EINT_GROUP##grp##_BASE + (x)) -#define IRQ_TIMER_BASE (11) - /* Set the default NR_IRQS */ #define NR_IRQS(IRQ_EINT_GROUP8_BASE + IRQ_EINT_GROUP8_NR + 1) diff --git a/arch/arm/mach-s5pc100/include/mach/irqs.h b/arch/arm/mach-s5pc100/include/mach/irqs.h index 2870f12..d2eb475 100644 --- a/arch/arm/mach-s5pc100/include/mach/irqs.h +++ b/arch/arm/mach-s5pc100/include/mach/irqs.h @@ -97,8 +97,6 @@ #define IRQ_SDMFIQ S5P_IRQ_VIC2(31) #define IRQ_VIC_ENDS5P_IRQ_VIC2(31) -#define IRQ_TIMER_BASE (11) - #define S5P_EINT_BASE1 (S5P_IRQ_VIC0(0)) #define S5P_EINT_BASE2 (IRQ_VIC_END + 1) diff --git a/arch/arm/mach-s5pv210/include/mach/irqs.h b/arch/arm/mach-s5pv210/include/mach/irqs.h index e777e01..5e0de3a 100644 --- a/arch/arm/mach-s5pv210/include/mach/irqs.h +++ b/arch/arm/mach-s5pv210/include/mach/irqs.h @@ -118,8 +118,6 @@ #define
[PATCH v4 14/14] ARM: SAMSUNG: Remove unused PWM timer IRQ chip code
As the need for an IRQ chip handling PWM timer interrupt chaining is
gone now, this patch removes all the code made unnecessary.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/Kconfig | 1 -
arch/arm/mach-s3c64xx/common.c | 1 -
arch/arm/plat-samsung/Kconfig | 6 --
arch/arm/plat-samsung/Makefile | 1 -
arch/arm/plat-samsung/include/plat/irq-vic-timer.h | 13 ---
arch/arm/plat-samsung/irq-vic-timer.c | 98 --
arch/arm/plat-samsung/s5p-irq.c| 1 -
7 files changed, 121 deletions(-)
delete mode 100644 arch/arm/plat-samsung/include/plat/irq-vic-timer.h
delete mode 100644 arch/arm/plat-samsung/irq-vic-timer.c
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index dd68dec..ed584d4 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -806,7 +806,6 @@ config ARCH_S3C64XX
select S3C_GPIO_TRACK
select SAMSUNG_CLKSRC
select SAMSUNG_GPIOLIB_4BIT
- select SAMSUNG_IRQ_VIC_TIMER
select USB_ARCH_HAS_OHCI
help
Samsung S3C64XX series based systems
diff --git a/arch/arm/mach-s3c64xx/common.c b/arch/arm/mach-s3c64xx/common.c
index 5dca83a..e2134b0 100644
--- a/arch/arm/mach-s3c64xx/common.c
+++ b/arch/arm/mach-s3c64xx/common.c
@@ -42,7 +42,6 @@
#include plat/pm.h
#include plat/gpio-cfg.h
#include plat/irq-uart.h
-#include plat/irq-vic-timer.h
#include plat/regs-irqtype.h
#include plat/regs-serial.h
#include plat/watchdog-reset.h
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index 6f632ba..9951879 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -27,7 +27,6 @@ config PLAT_S5P
select S5P_GPIO_DRVSTR
select SAMSUNG_CLKSRC if !COMMON_CLK
select SAMSUNG_GPIOLIB_4BIT
- select SAMSUNG_IRQ_VIC_TIMER
help
Base platform code for Samsung's S5P series SoC.
@@ -79,11 +78,6 @@ config S5P_CLOCK
# options for IRQ support
-config SAMSUNG_IRQ_VIC_TIMER
- bool
- help
- Internal configuration to build the VIC timer interrupt code.
-
config S5P_IRQ
def_bool (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS)
help
diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile
index 87494e1..ae2a0fd 100644
--- a/arch/arm/plat-samsung/Makefile
+++ b/arch/arm/plat-samsung/Makefile
@@ -19,7 +19,6 @@ obj-$(CONFIG_SAMSUNG_CLOCK) += pwm-clock.o
obj-$(CONFIG_SAMSUNG_CLKSRC) += clock-clksrc.o
obj-$(CONFIG_S5P_CLOCK)+= s5p-clock.o
-obj-$(CONFIG_SAMSUNG_IRQ_VIC_TIMER) += irq-vic-timer.o
obj-$(CONFIG_S5P_IRQ) += s5p-irq.o
obj-$(CONFIG_S5P_EXT_INT) += s5p-irq-eint.o
obj-$(CONFIG_S5P_GPIO_INT) += s5p-irq-gpioint.o
diff --git a/arch/arm/plat-samsung/include/plat/irq-vic-timer.h
b/arch/arm/plat-samsung/include/plat/irq-vic-timer.h
deleted file mode 100644
index 5b9c42f..000
--- a/arch/arm/plat-samsung/include/plat/irq-vic-timer.h
+++ /dev/null
@@ -1,13 +0,0 @@
-/* arch/arm/plat-samsung/include/plat/irq-vic-timer.h
- *
- * Copyright (c) 2010 Simtec Electronics
- * Ben Dooks b...@simtec.co.uk
- *
- * Header file for Samsung SoC IRQ VIC timer
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-extern void s3c_init_vic_timer_irq(unsigned int num, unsigned int timer_irq);
diff --git a/arch/arm/plat-samsung/irq-vic-timer.c
b/arch/arm/plat-samsung/irq-vic-timer.c
deleted file mode 100644
index f980cf3..000
--- a/arch/arm/plat-samsung/irq-vic-timer.c
+++ /dev/null
@@ -1,98 +0,0 @@
-/* arch/arm/plat-samsung/irq-vic-timer.c
- * originally part of arch/arm/plat-s3c64xx/irq.c
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- * Ben Dooks b...@simtec.co.uk
- * http://armlinux.simtec.co.uk/
- *
- * S3C64XX - Interrupt handling
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include linux/kernel.h
-#include linux/interrupt.h
-#include linux/irq.h
-#include linux/io.h
-
-#include mach/map.h
-#include plat/cpu.h
-#include plat/irq-vic-timer.h
-#include plat/regs-timer.h
-
-#include asm/mach/irq.h
-
-static void s3c_irq_demux_vic_timer(unsigned int irq, struct irq_desc *desc)
-{
- struct irq_chip *chip = irq_get_chip(irq);
- chained_irq_enter(chip, desc);
- generic_handle_irq((int)desc-irq_data.handler_data);
- chained_irq_exit(chip, desc);
-}
-
-/* We assume the IRQ_TIMER0..IRQ_TIMER4 range is continuous. */
-static void s3c_irq_timer_ack(struct irq_data *d)
-{
- struct irq_chip_generic *gc =
Re: [PATCH v3 00/11] usb: dwc3/xhci/phy: Enable runtime power management
On Thu, Apr 04, 2013 at 01:02:45PM +0530, Vivek Gautam wrote: On Thu, Apr 4, 2013 at 12:40 PM, Felipe Balbi ba...@ti.com wrote: On Thu, Apr 04, 2013 at 10:34:57AM +0530, Vivek Gautam wrote: Hi Sarah, On Wed, Apr 3, 2013 at 10:57 PM, Sarah Sharp sarah.a.sh...@linux.intel.com wrote: Question: Do you still need this patch for 3.10? Felipe's 'next' is closed for 3.10, so this series won't be making it to 3.10 now, as a whole. :-( right, besides we're still discussing what to do with the whole PHY part, right ? Right ofcourse. :-) Ok, so it sounds like I shouldn't merge that patch for 3.10. Please include that patch in your next round of revisions instead. And now I'm glad I'm slow. :) Sarah Sharp -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 0/3] ARM: EXYNOS: DT-enabled support for Universal C210
This series intends to add support for Universal C210 board using Device Tree. Main difference from other boards based on Exynos 4210 is that hardware revision of the SoC used on Universal C210 does not support MCT timers and legacy PWM timers must be used instead. First patch adds device tree node for PWM block available on Exynos 4 SoCs, second patch adds support for Exynos4210 EVT0 SoC to mach-exynos4-dt and third patch introduces initial device tree for Universal C210 board. Depends on my series for PWM timers rework: [PATCH v4 00/14] ARM: samsung-time: Prepare for multiplatform support (http://thread.gmane.org/gmane.linux.kernel.samsung-soc/17464) Tested on Universal C210 board. Tomasz Figa (3): ARM: dts: exynos4: Add node for PWM device ARM: EXYNOS: Add support for Exynos4210 EVT0 SoC ARM: dts: exynos4210: Add basic dts file for universal_c210 board arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/exynos4.dtsi | 8 + arch/arm/boot/dts/exynos4210-universal_c210.dts | 353 arch/arm/mach-exynos/Kconfig| 9 + arch/arm/mach-exynos/mach-exynos4-dt.c | 33 +++ 5 files changed, 404 insertions(+) create mode 100644 arch/arm/boot/dts/exynos4210-universal_c210.dts -- 1.8.1.5 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/3] ARM: dts: exynos4: Add node for PWM device
This patch adds device tree node for PWM block present on Exynos 4 SoCs.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/boot/dts/exynos4.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index 800ff11..d1bedd4 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -331,6 +331,14 @@
status = disabled;
};
+ pwm@139D {
+ compatible = samsung,s5pc100-pwm;
+ reg = 0x139D 0x1000;
+ interrupts = 0 37 0, 0 38 0, 0 39 0, 0 40 0, 0 41 0;
+ #pwm-cells = 2;
+ status = disabled;
+ };
+
amba {
#address-cells = 1;
#size-cells = 1;
--
1.8.1.5
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[PATCH 2/3] ARM: EXYNOS: Add support for Exynos4210 EVT0 SoC
This patch extends mach-exynos4-dt generic board file with support for
Exynos4210 EVT0 SoC, which differs in availability of system timers and
needs different time initialization.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/mach-exynos/Kconfig | 9 +
arch/arm/mach-exynos/mach-exynos4-dt.c | 33 +
2 files changed, 42 insertions(+)
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index e538705..56920b3 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -39,6 +39,15 @@ config CPU_EXYNOS4210
help
Enable EXYNOS4210 CPU support
+config SOC_EXYNOS4210_EVT0
+ bool SAMSUNG EXYNOS4210 EVT0
+ default y
+ select SOC_EXYNOS4210
+ select CLKSRC_MMIO
+ select SAMSUNG_HRT
+ help
+ Enable EXYNOS4210 EVT0 SoC support
+
config SOC_EXYNOS4212
bool SAMSUNG EXYNOS4212
default y
diff --git a/arch/arm/mach-exynos/mach-exynos4-dt.c
b/arch/arm/mach-exynos/mach-exynos4-dt.c
index b9ed834..ec6dd17 100644
--- a/arch/arm/mach-exynos/mach-exynos4-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos4-dt.c
@@ -16,10 +16,12 @@
#include linux/of_fdt.h
#include linux/serial_core.h
#include linux/memblock.h
+#include linux/clk-provider.h
#include linux/clocksource.h
#include asm/mach/arch.h
#include plat/mfc.h
+#include plat/samsung-time.h
#include common.h
@@ -65,3 +67,34 @@ DT_MACHINE_START(EXYNOS4210_DT, Samsung Exynos4 (Flattened
Device Tree))
.restart= exynos4_restart,
.reserve= exynos4_reserve,
MACHINE_END
+
+#ifdef CONFIG_SOC_EXYNOS4210_EVT0
+static void __init exynos4210_evt0_init_time(void)
+{
+ of_clk_init(NULL);
+ samsung_time_init();
+}
+
+static void __init exynos4210_evt0_dt_map_io(void)
+{
+ exynos4_dt_map_io();
+}
+
+static char const *exynos4210_evt0_dt_compat[] __initdata = {
+ samsung,exynos4210-evt0,
+ NULL
+};
+
+DT_MACHINE_START(EXYNOS4210_EVT0_DT, Samsung Exynos4210 EVT0 (Device Tree))
+ .smp= smp_ops(exynos_smp_ops),
+ .init_irq = exynos4_init_irq,
+ .map_io = exynos4210_evt0_dt_map_io,
+ .init_early = exynos_firmware_init,
+ .init_machine = exynos4_dt_machine_init,
+ .init_late = exynos_init_late,
+ .init_time = exynos4210_evt0_init_time,
+ .dt_compat = exynos4210_evt0_dt_compat,
+ .restart= exynos4_restart,
+ .reserve= exynos4_reserve,
+MACHINE_END
+#endif
--
1.8.1.5
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Re: [PATCH 0/2] input: touchscreen: atmel_mxt_ts: Add Device Tree support
Hi Tomasz, On Thu, Apr 04, 2013 at 06:14:24PM +0200, Tomasz Figa wrote: This series is an attempt to add Device Tree support to Atmel maXtouch touchscreen driver. First patch adds support for VDD voltage regulator to get operating voltage using regulator API instead of a driver specific field in platform data. Second patch implements Device Tree bindings for the driver and adds respective documentation. Tested on Universal C210 board. Please coordinate this effort with Nick Dyer nick.d...@itdev.co.uk, Daniel Kurtz djku...@chromium.org and Benson Leung ble...@chromium.org as there is a big update to the atmel_mxt_ts in works and I would prefer not to disturb it. Thanks. -- Dmitry -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: GENERIC_GPIO considered deprecated
On Wed, Apr 3, 2013 at 5:35 PM, Kukjin Kim kgene@samsung.com wrote: could you amend the patches that adds them such as they get changed into select ARCH_REQUIRE_GPIOLIB instead? You can grep for select I can do it for my tree but the branch already included in arm-soc tree so I think, it should be fixed with another patch. And GENERIC_GPIO in arch/arm to find the offending lines. We are removing GENERIC_GPIO and this work cannot be merged until you do this since it would break ARM builds. Thanks! So how about following? If you are OK, let me take into samsung tree. 88 From: Kukjin Kim kgene@samsung.com Subject: [PATCH] ARM: SAMSUNG: change GENERIC_GPIO to ARCH_REQUIRE_GPIOLIB When I applied regarding samsung-time patches, the select GENERIC_GPIO has been added wrong, so this patch fixes that. And since the GENERIC_GPIO in arch/arm/ will be gone away, this adds ARCH_REQUIRE_GPIOLIB for S3C24XX and S5PC100 instead. Reported-by: Alexandre Courbot gnu...@gmail.com Cc: Romain Naour romain.na...@openwide.fr Signed-off-by: Kukjin Kim kgene@samsung.com --- arch/arm/Kconfig |4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 46fcfa8..a239c7e 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -770,10 +770,10 @@ config ARCH_SA1100 config ARCH_S3C24XX bool Samsung S3C24XX SoCs select ARCH_HAS_CPUFREQ + select ARCH_REQUIRE_GPIOLIB select CLKDEV_LOOKUP select CLKSRC_MMIO select GENERIC_CLOCKEVENTS - select GENERIC_GPIO select HAVE_CLK select HAVE_S3C2410_I2C if I2C select HAVE_S3C2410_WATCHDOG if WATCHDOG @@ -828,11 +828,11 @@ config ARCH_S5P64X0 config ARCH_S5PC100 bool Samsung S5PC100 + select ARCH_REQUIRE_GPIOLIB select CLKDEV_LOOKUP select CLKSRC_MMIO select CPU_V7 select GENERIC_CLOCKEVENTS - select GENERIC_GPIO select HAVE_CLK select HAVE_S3C2410_I2C if I2C select HAVE_S3C2410_WATCHDOG if WATCHDOG -- 1.7.10.4 Should do the trick, if we can make sure that your tree is merged prior to my patches. Can you put it into your tree for 3.10? Thanks! Alex. -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re[2]: [PATCH 4/4] ARM: s3c24xx: Fix switching FIFO in arch_enable_uart_fifo function
Hello. Alexander Shiyan wrote: When CONFIG_S3C_BOOT_UART_FORCE_FIFO symbol is set, we should enable FIFO but actually switch command is missing in the code. This patch adds this switch. Signed-off-by: Alexander Shiyan shc_w...@mail.ru --- arch/arm/plat-samsung/include/plat/uncompress.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/plat-samsung/include/plat/uncompress.h b/arch/arm/plat-samsung/include/plat/uncompress.h index 438b248..30fedd9 100644 --- a/arch/arm/plat-samsung/include/plat/uncompress.h +++ b/arch/arm/plat-samsung/include/plat/uncompress.h @@ -130,6 +130,8 @@ static inline void arch_enable_uart_fifo(void) if (!(fifocon S3C2410_UFCON_RESETBOTH)) break; } + + uart_wr(S3C2410_UFCON, S3C2410_UFCON_FIFOMODE); Well, I think, if required, this should be moved into 'if (!(fifocon S3C2410_UFCON_FIFOMODE))'. Already here. ---
Re: [PATCH] clk: exynos5250: Fix divider values for sclk_mmc{0,1,2,3}
Quoting Tushar Behera (2013-04-02 01:20:40)
In legacy setup, sclk_mmc{0,1,2,3} used PRE_RATIO bit-field (8-bit wide)
instead of RATIO bit-field (4-bit wide) for dividing clock rate.
With current common clock setup, we are using RATIO bit-field which
is creating FIFO read errors while accessing eMMC. Changing over to
use PRE_RATIO bit-field fixes this issue.
dwmmc_exynos 1220.dwmmc0: data FIFO error (status=8020)
mmcblk0: error -5 transferring data, sector 1, nr 7, cmd response 0x900, card
status 0x0
end_request: I/O error, dev mmcblk0, sector 1
Signed-off-by: Tushar Behera tushar.beh...@linaro.org
CC: Thomas Abraham thomas.abra...@linaro.org
I guess this will be applied through the samsung tree, so:
Acked-by: Mike Turquette mturque...@linaro.org
---
Based on Kukjin's for-next branch.
commit d58f6a153f40 (Merge branch 'next/clk-exynos-2' into for-next)
drivers/clk/samsung/clk-exynos5250.c |8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/clk/samsung/clk-exynos5250.c
b/drivers/clk/samsung/clk-exynos5250.c
index 1152125..2c46fbd 100644
--- a/drivers/clk/samsung/clk-exynos5250.c
+++ b/drivers/clk/samsung/clk-exynos5250.c
@@ -274,10 +274,10 @@ struct samsung_div_clock exynos5250_div_clks[]
__initdata = {
DIV(none, div_pcm0, sclk_audio0, DIV_MAU, 4, 8),
DIV(none, div_sata, mout_sata, DIV_FSYS0, 20, 4),
DIV(none, div_usb3, mout_usb3, DIV_FSYS0, 24, 4),
- DIV(none, div_mmc0, mout_mmc0, DIV_FSYS1, 0, 4),
- DIV(none, div_mmc1, mout_mmc1, DIV_FSYS1, 16, 4),
- DIV(none, div_mmc2, mout_mmc2, DIV_FSYS2, 0, 4),
- DIV(none, div_mmc3, mout_mmc3, DIV_FSYS2, 16, 4),
+ DIV(none, div_mmc0, mout_mmc0, DIV_FSYS1, 8, 8),
+ DIV(none, div_mmc1, mout_mmc1, DIV_FSYS1, 24, 8),
+ DIV(none, div_mmc2, mout_mmc2, DIV_FSYS2, 8, 8),
+ DIV(none, div_mmc3, mout_mmc3, DIV_FSYS2, 24, 8),
DIV(none, div_uart0, mout_uart0, DIV_PERIC0, 0, 4),
DIV(none, div_uart1, mout_uart1, DIV_PERIC0, 4, 4),
DIV(none, div_uart2, mout_uart2, DIV_PERIC0, 8, 4),
--
1.7.9.5
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Re: [PATCH v4 00/14] ARM: samsung-time: Prepare for multiplatform support
Am Donnerstag, 4. April 2013, 18:36:57 schrieb Tomasz Figa: This series is an attempt to make the samsung-time clocksource driver ready for multiplatform kernels. It moves the driver to drivers/clocksource, cleans it up from uses of static platform-specific definitions, simplifies timer interrupt handling and adds Device Tree support. Only samsung-time driver is reworked to use the master driver at this time, since the PWM driver can be already considered broken at the moment and needs separate series of several patches to fix and clean it up, which I am already working on. Tested on Universal C210 board with Device Tree. Not tested without Device Tree, since it has been already broken before this series. Compile tested for other related SoCs. Looks nice. On a non-DT S3C2416 board: Tested-by: Heiko Stuebner he...@sntech.de And just so I don't search myself silly, am I right in thinking that the driver does not use the generic clocksource registration yet and dt machines must still use samsung_timer_init at this point? Heiko -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v7] i2c: exynos5: add High Speed I2C controller driver
From: Naveen Krishna Chatradhi ch.nav...@samsung.com
Adds support for High Speed I2C driver found in Exynos5 and
later SoCs from Samsung.
This driver currently supports Auto mode.
Driver only supports Device Tree method.
Note: Added debugfs support for registers view, not tested.
Signed-off-by: Taekgyun Ko taeggyun...@samsung.com
Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
Reviewed-by: Simon Glass s...@google.com
Tested-by: Andrew Bresticker abres...@google.com
---
change since v6:
1. clock divisor function hs split to handle the error cases
2. Other irq types are handled
3. FIFO are handled more efficiently in TX and RX
4. More function description added
5. handled the return cases in xfer_msg function
.../devicetree/bindings/i2c/i2c-exynos5.txt| 50 ++
drivers/i2c/busses/Kconfig |7 +
drivers/i2c/busses/Makefile|1 +
drivers/i2c/busses/i2c-exynos5.c | 934
4 files changed, 992 insertions(+)
create mode 100644 Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
create mode 100644 drivers/i2c/busses/i2c-exynos5.c
diff --git a/Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
b/Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
new file mode 100644
index 000..0bc9347
--- /dev/null
+++ b/Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
@@ -0,0 +1,50 @@
+* Samsung's High Speed I2C controller
+
+The Samsung's High Speed I2C controller is used to interface with I2C devices
+at various speeds ranging from 100khz to 3.4Mhz.
+
+Required properties:
+ - compatible: value should be.
+ (a) samsung,exynos5-hsi2c, for i2c compatible with exynos5 hsi2c.
+ - reg: physical base address of the controller and length of memory mapped
+region.
+ - interrupts: interrupt number to the cpu.
+
+ - Samsung GPIO variant (deprecated):
+- gpios: The order of the gpios should be the following: SDA, SCL.
+ The gpio specifier depends on the gpio controller.
+ - Pinctrl variant (preferred, if available):
+- pinctrl-0: Pin control group to be used for this controller.
+- pinctrl-names: Should contain only one value - default.
+
+Optional properties:
+ - samsung,hs-mode: Mode of operation, High speed or Fast speed mode. If not
+specified, default value is 0.
+ - samsung,hs-clock-freq: Desired operating frequency in Hz of the bus.
+If not specified, the default value in Hz is 10.
+ - samsung,fs-clock-freq: Desired operarting frequency in Hz of the bus.
+If not specified, the default value in Hz is 10.
+
+Example:
+
+ hsi2c@12ca {
+ compatible = samsung,exynos5-hsi2c;
+ reg = 0x12ca 0x100;
+ interrupts = 56;
+ samsung,fs-clock-freq = 10;
+ /* Samsung GPIO variant begins here */
+ gpios = gpd1 2 0 /* SDA */
+gpd1 3 0 /* SCL */;
+ /* Samsung GPIO variant ends here */
+ /* Pinctrl variant begins here */
+ pinctrl-0 = i2c4_bus;
+ pinctrl-names = default;
+ /* Pinctrl variant ends here */
+ #address-cells = 1;
+ #size-cells = 0;
+
+ s2mps11_pmic@66 {
+ compatible = samsung,s2mps11-pmic;
+ reg = 0x66;
+ };
+ };
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index adfee98..9fbfa01 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -434,6 +434,13 @@ config I2C_EG20T
ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series.
ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH.
+config I2C_EXYNOS5
+ tristate Exynos5 high-speed I2C driver
+ depends on ARCH_EXYNOS5 OF
+ help
+ Say Y here to include support for High-speed I2C controller in the
+ Exynos5 based Samsung SoCs.
+
config I2C_GPIO
tristate GPIO-based bitbanging I2C
depends on GENERIC_GPIO
diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
index 8f4fc23..b19366c 100644
--- a/drivers/i2c/busses/Makefile
+++ b/drivers/i2c/busses/Makefile
@@ -42,6 +42,7 @@ i2c-designware-platform-objs := i2c-designware-platdrv.o
obj-$(CONFIG_I2C_DESIGNWARE_PCI) += i2c-designware-pci.o
i2c-designware-pci-objs := i2c-designware-pcidrv.o
obj-$(CONFIG_I2C_EG20T)+= i2c-eg20t.o
+obj-$(CONFIG_I2C_EXYNOS5) += i2c-exynos5.o
obj-$(CONFIG_I2C_GPIO) += i2c-gpio.o
obj-$(CONFIG_I2C_HIGHLANDER) += i2c-highlander.o
obj-$(CONFIG_I2C_IBM_IIC) += i2c-ibm_iic.o
diff --git a/drivers/i2c/busses/i2c-exynos5.c b/drivers/i2c/busses/i2c-exynos5.c
new file mode 100644
index 000..a38c616
--- /dev/null
+++ b/drivers/i2c/busses/i2c-exynos5.c
@@ -0,0 +1,934 @@
+/**
+ * i2c-exynos5.c - Samsung Exynos5 I2C Controller Driver
+ *
+ *
