Re: [PATCH 2/2] ARM: dts: Update MFC documentation for clock entries

2013-04-08 Thread Sachin Kamat
Hi Sylwester,

Thanks for your review.

On 4 April 2013 16:38, Sylwester Nawrocki s.nawro...@samsung.com wrote:
 On 04/04/2013 08:26 AM, Sachin Kamat wrote:
 Added clock entry definitions to MFC bindings document.

 Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
 ---
  .../devicetree/bindings/media/s5p-mfc.txt  |5 +
  1 file changed, 5 insertions(+)

 diff --git a/Documentation/devicetree/bindings/media/s5p-mfc.txt 
 b/Documentation/devicetree/bindings/media/s5p-mfc.txt
 index bf0182d..d7b991a 100644
 --- a/Documentation/devicetree/bindings/media/s5p-mfc.txt
 +++ b/Documentation/devicetree/bindings/media/s5p-mfc.txt
 @@ -15,6 +15,9 @@ Required properties:
 mapped region.

- interrupts : MFC interrupt number to the CPU.
 +  - clocks: from common clock binding: handle to mfc clocks.
 +  - clock-names: from common clock binding: Shall be sclk_mfc and mfc
 +  for samsung,mfc-v5.

 Not sure if we shouldn't be more specific about the fact the entries in
 the clocks property must be in same order as names in clock-names. Perhaps
 it's sufficient you mentioned the common clock binding which defines that.

Right.

 Also we should keep the clock names same, regardless which MFC IP version
 those apply to. At least as far as same driver is used for them and the
 number of clocks is same. Thus perhaps this could be:

Right. Since mfc-v6 currently took aclk_333 as second clk instead of
sclk_mfc, I made the description specific to mfc-v5.


 - clock-names : from common clock binding: must contain sclk_mfc and mfc,
 corresponding to entries in the clocks property.

I will update as above.


 Please note there is a white space before the first colon, that makes
 it really an important improvement...

Ok.


 Please feel free to add my

 Reviewed-by: Sylwester Nawrocki s.nawro...@samsung.com

 with those issues addressed.

Thanks.



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With warm regards,
Sachin
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[PATCH v2 1/2] ARM: dts: Add MFC clock entries for exynos4

2013-04-08 Thread Sachin Kamat
Added MFC related clock entries in exynos4.dtsi file.

Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
Reviewed-by: Sylwester Nawrocki s.nawro...@samsung.com
---
Based on Kukjin's for-next tree.
No change since v1 (except added reviewed-by tag).
---
 arch/arm/boot/dts/exynos4.dtsi |2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index 800ff11..74f18d2 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -155,6 +155,8 @@
reg = 0x1340 0x1;
interrupts = 0 94 0;
samsung,power-domain = pd_mfc;
+   clocks = clock 170, clock 273;
+   clock-names = sclk_mfc, mfc;
status = disabled;
};
 
-- 
1.7.9.5

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[PATCH v2 2/2] ARM: dts: Update MFC documentation for clock entries

2013-04-08 Thread Sachin Kamat
Added clock entry definitions to MFC bindings document.

Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
Reviewed-by: Sylwester Nawrocki s.nawro...@samsung.com
---
Changes since v1:
Updated clock-names description as suggested by
Sylwester Nawrocki s.nawro...@samsung.com
---
 .../devicetree/bindings/media/s5p-mfc.txt  |5 +
 1 file changed, 5 insertions(+)

diff --git a/Documentation/devicetree/bindings/media/s5p-mfc.txt 
b/Documentation/devicetree/bindings/media/s5p-mfc.txt
index bf0182d..df37b02 100644
--- a/Documentation/devicetree/bindings/media/s5p-mfc.txt
+++ b/Documentation/devicetree/bindings/media/s5p-mfc.txt
@@ -15,6 +15,9 @@ Required properties:
  mapped region.
 
   - interrupts : MFC interrupt number to the CPU.
+  - clocks : from common clock binding: handle to mfc clocks.
+  - clock-names : from common clock binding: must contain sclk_mfc and mfc,
+ corresponding to entries in the clocks property.
 
   - samsung,mfc-r : Base address of the first memory bank used by MFC
for DMA contiguous memory allocation and its size.
@@ -34,6 +37,8 @@ mfc: codec@1340 {
reg = 0x1340 0x1;
interrupts = 0 94 0;
samsung,power-domain = pd_mfc;
+   clocks = clock 170, clock 273;
+   clock-names = sclk_mfc, mfc;
 };
 
 Board specific DT entry:
-- 
1.7.9.5

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RE: [PATCH v2 0/7] Add G2D nodes to Exynos4 machines

2013-04-08 Thread Kukjin Kim
Sachin Kamat wrote:
 
 On 11 March 2013 12:24, Kukjin Kim kgene@samsung.com wrote:
  Sachin Kamat wrote:
 
  Hi Kukjin,
 
  Can you please look into this series as it is pending since quite some
 time.
 
  Applied, I have another opinion about the compatible string though...
 
 Couldn't find this series in your latest for-next. Please let me know
 which branch this is applied to.
 
Please check again then if any problems, let me know. I think, it should be
fine :-)

Thanks for your gentle reminder.

- Kukjin

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RE: [PATCH] clk: exynos4: export clocks required for fimc-is

2013-04-08 Thread Kukjin Kim
Mike Turquette wrote:
 
 Quoting Sylwester Nawrocki (2013-04-05 10:49:45)
  This patch adds clock indexes for ACLK_DIV0, ACLK_DIV1,
  ACLK_400_MCUISP, ACLK_MCUISP_DIV0, ACLK_MCUISP_DIV1,
  DIVACLK_400_MCUISP and DIVACLK_200 so these clocks are
  available to the consumers (Exynos4x12 FIMC-IS subsystem).
  While at it, indentation of the mux clocks table is
  corrected.
 
  Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
  Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
 
 Acked-by: Mike Turquette mturque...@linaro.org
 
Thanks, applied into next/clk-exynos.

- Kukjin

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RE: [PATCH] clk: exynos5250: Fix divider values for sclk_mmc{0,1,2,3}

2013-04-08 Thread Kukjin Kim
Mike Turquette wrote:
 
 Quoting Tushar Behera (2013-04-02 01:20:40)
  In legacy setup, sclk_mmc{0,1,2,3} used PRE_RATIO bit-field (8-bit wide)
  instead of RATIO bit-field (4-bit wide) for dividing clock rate.
 
  With current common clock setup, we are using RATIO bit-field which
  is creating FIFO read errors while accessing eMMC. Changing over to
  use PRE_RATIO bit-field fixes this issue.
 
  dwmmc_exynos 1220.dwmmc0: data FIFO error (status=8020)
  mmcblk0: error -5 transferring data, sector 1, nr 7, cmd response 0x900,
 card status 0x0
  end_request: I/O error, dev mmcblk0, sector 1
 
  Signed-off-by: Tushar Behera tushar.beh...@linaro.org
  CC: Thomas Abraham thomas.abra...@linaro.org
 
 I guess this will be applied through the samsung tree, so:
 
 Acked-by: Mike Turquette mturque...@linaro.org
 
Thanks, applied.

- Kukjin

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RE: [PATCH v11 0/3] Add DRM FIMD DT support for Exynos4 DT Machines

2013-04-08 Thread Kukjin Kim
Vikas Sajjan wrote:
 
 This patch series adds support for DRM FIMD DT for Exynos4 DT Machines,
 specifically for Exynos4412 SoC.
 
 changes since v10:
   - addressed comments from Sylwester Nawrocki
 sylvester.nawro...@gmail.com
 
 changes since v9:
   - dropped the patch ARM: dts: Add lcd pinctrl node entries for
 EXYNOS4412 SoC
   as the gpios in the newly added nodes lcd_en and lcd_sync in
 this patch
   were already PULLed high by existing lcd_clk node.
   - addressed comments from Sylwester Nawrocki
 sylvester.nawro...@gmail.com
   and Thomas Abraham thomas.abra...@linaro.org
 
 changes since v8:
   - addressed comments to add missing documentation for clock and
 clock-names
   properties as pointed out by Sachin Kamat sachin.ka...@linaro.org
 
 changes since v7:
   - rebased to kgene's for-next
   - Migrated to Common Clock Framework
   - removed the patch ARM: dts: Add FIMD AUXDATA node entry for
 exynos4 DT,
   as migration to Common Clock Framework will NOT need this.
   - addressed the comments raised by Sachin Kamat
 sachin.ka...@linaro.org
 
 changes since v6:
   - addressed comments and added interrupt-names = fifo, vsync,
 lcd_sys
   in exynos4.dtsi and re-ordered the interrupt numbering to match the
 order in
   interrupt combiner IP as suggested by Sylwester Nawrocki
 sylvester.nawro...@gmail.com.
 
 changes since v5:
   - renamed the fimd binding documentation file name as samsung-
 fimd.txt,
   since it not only talks about exynos display controller but also
 about
   previous samsung display controllers.
   - rephrased an abmigious statement about the interrupt combiner in
 the
   fimd binding documentation as pointed out by
   Sachin Kamat sachin.ka...@linaro.org
 
 changes since v4:
   - moved the fimd binding documentation to
 Documentation/devicetree/bindings/video/
   as suggested by Sylwester Nawrocki sylvester.nawro...@gmail.com
 
   - added more fimd compatiblity strings in fimd documentation as
   discussed at  https://patchwork.kernel.org/patch/2144861/ with
   Sylwester Nawrocki sylvester.nawro...@gmail.com and
   Tomasz Figa tomasz.f...@gmail.com
 
   - modified compatible string for exynos4 fimd as exynos4210-fimd
   exynos5 fimd as exynos5250-fimd to stick to the rule that
 compatible
   value should be named after first specific SoC model in which this
   particular IP version was included as discussed at
   https://patchwork.kernel.org/patch/2144861/
 
   - documented more about the interrupt combiner and their order as
   suggested by Sylwester Nawrocki sylvester.nawro...@gmail.com
 
 changes since v3:
   - rebased on
   http://git.kernel.org/?p=linux/kernel/git/kgene/linux-
 samsung.git;a=shortlog;h=refs/heads/for-next-next
 
 changes since v2:
   - added alias to 'fimd@11c0' node
   (reported by: Rahul Sharma r.sh.o...@gmail.com)
   - removed 'lcd0_data' node as there was already a similar node
 lcd_data24
   (reported by: Jingoo Han jg1@samsung.com
   - replaced spaces with tabs in display-timing node
 
 changes since v1:
   - added new patch to add FIMD DT binding Documentation
   - removed patch enabling SAMSUNG_DEV_BACKLIGHT and SAMSUNG_DEV_PMW
   for mach-exynos4 DT
   - added 'status' property to fimd DT node
 
 Is based on branch kgene's for-next
 https://git.kernel.org/cgit/linux/kernel/git/kgene/linux-
 samsung.git/log/?h=for-next
 
 Vikas Sajjan (3):
   ARM: dts: Add FIMD node to exynos4
   ARM: dts: Add FIMD node and display timing node to
 exynos4412-origen.dts
   ARM: dts: Add FIMD DT binding Documentation
 
  .../devicetree/bindings/video/samsung-fimd.txt |   65
 
  arch/arm/boot/dts/exynos4.dtsi |   12 
  arch/arm/boot/dts/exynos4412-origen.dts|   21 +++
  3 files changed, 98 insertions(+)
  create mode 100644 Documentation/devicetree/bindings/video/samsung-
 fimd.txt
 
 --
 1.7.9.5

Looks good to me, applied.

Thanks.

- Kukjin

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RE: [PATCH] ARM: SAMSUNG: Set clock parent if provided

2013-04-08 Thread Kukjin Kim
Sylwester Nawrocki wrote:
 
 Hi Shaik,
 
 On 03/15/2013 10:00 AM, Shaik Ameer Basha wrote:
  On Thu, Mar 7, 2013 at 9:05 PM, Sylwester Nawrocki
  s.nawro...@samsung.com wrote:
 ...
  May I ask what do you need this for ? This code won't be used for
  Exynos4 and Exynos5 SoCs starting from 3.10. And it is going to be
  removed once other platforms are converted to the new Samsung clocks
  driver.
 
  I had some issues in exynos5 with out this implementation.
  But yes... you are right, once we move to common clock framework (CCF)
  we don't require this change, as CCF doesn't use this (for exynos 4/5).
 
  What about all old non-dt based platforms?
  Cant they use this change until they move to DT and CCF?
 
 I have nothing against the patch, I was just curious if you need
 it for the new SOCs where the new clocks driver is supposed to be used.
 Of course other Samsung platforms could switch to CCF before having
 support for the device tree.
 
Sorry for late response on this...

Yes, I think, as many guys said, this is not required for now for exynos4/5.

But the reason is different, I think, because the parent clock should be set 
depends on each board. That's why there are many parent clocks hardware 
providing. Sometimes just one parent clock can be used as a default though.

- Kukjin

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[PATCH] ARM: dts: add device tree file for SD5v1 board

2013-04-08 Thread Kukjin Kim

This patch adds SD5v1.dts file for supporting SD5v1(Exynos5440) board.

Signed-off-by: Kukjin Kim kgene@samsung.com
---
 arch/arm/boot/dts/Makefile |1 +
 arch/arm/boot/dts/exynos5440-sd5v1.dts |   39 
 2 files changed, 40 insertions(+)
 create mode 100644 arch/arm/boot/dts/exynos5440-sd5v1.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index d3cd880..11fef62 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -46,6 +46,7 @@ dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \
exynos4412-smdk4412.dtb \
exynos4412-origen.dtb \
exynos5250-arndale.dtb \
+   exynos5440-sd5v1.dtb \
exynos5250-smdk5250.dtb \
exynos5250-snow.dtb \
exynos5440-ssdk5440.dtb
diff --git a/arch/arm/boot/dts/exynos5440-sd5v1.dts 
b/arch/arm/boot/dts/exynos5440-sd5v1.dts
new file mode 100644
index 000..ef747b5
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5440-sd5v1.dts
@@ -0,0 +1,39 @@
+/*
+ * SAMSUNG SD5v1 board device tree source
+ *
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/dts-v1/;
+/include/ exynos5440.dtsi
+
+/ {
+   model = SAMSUNG SD5v1 board based on EXYNOS5440;
+   compatible = samsung,sd5v1, samsung,exynos5440;
+
+   chosen {
+   bootargs = root=/dev/sda2 rw rootwait ignore_loglevel 
early_printk no_console_suspend mem=2048M@0x8000
console=ttySAC0,115200;
+   };
+
+   fixed-rate-clocks {
+   xtal {
+   compatible = samsung,clock-xtal;
+   clock-frequency = 5000;
+   };
+   };
+
+   gmac: ethernet@0023 {
+   fixed_phy;
+   phy_addr = 1;
+   };
+
+   spi {
+   status = disabled;
+   };
+
+};
-- 
1.7.10.4

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[PATCH] ARM: dts: Fix gmac clock ids due to changes in Exynos5440

2013-04-08 Thread Kukjin Kim
From: Thomas Abraham thomas...@samsung.com

The Exynos5440 common clock driver has changed the clock ID's for
some of the clocks. Fix the gmac clock entries in Exynos5440 dtsi
file accordingly.

Signed-off-by: Thomas Abraham thomas...@samsung.com
Signed-off-by: Kukjin Kim kgene@samsung.com
---
 arch/arm/boot/dts/exynos5440.dtsi |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/exynos5440.dtsi 
b/arch/arm/boot/dts/exynos5440.dtsi
index 5a339f0..7906d5f 100644
--- a/arch/arm/boot/dts/exynos5440.dtsi
+++ b/arch/arm/boot/dts/exynos5440.dtsi
@@ -162,7 +162,7 @@
interrupts = 0 31 4;
interrupt-names = macirq;
phy-mode = sgmii;
-   clocks = clock 12;
+   clocks = clock 25;
clock-names = stmmaceth;
};
 
-- 
1.7.10.4

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RE: GENERIC_GPIO considered deprecated

2013-04-08 Thread Kukjin Kim
Alexandre Courbot wrote:
 
 On Wed, Apr 3, 2013 at 5:35 PM, Kukjin Kim kgene@samsung.com wrote:
  could you amend the patches that adds them such as they get changed
  into select ARCH_REQUIRE_GPIOLIB instead? You can grep for select
 
  I can do it for my tree but the branch already included in arm-soc tree
 so I think, it should be fixed with another patch. And
 
  GENERIC_GPIO in arch/arm to find the offending lines. We are removing
  GENERIC_GPIO and this work cannot be merged until you do this since it
  would break ARM builds. Thanks!
 
  So how about following? If you are OK, let me take into samsung tree.
 
  88
  From: Kukjin Kim kgene@samsung.com
  Subject: [PATCH] ARM: SAMSUNG: change GENERIC_GPIO to
 ARCH_REQUIRE_GPIOLIB
 
  When I applied regarding samsung-time patches, the select GENERIC_GPIO
  has been added wrong, so this patch fixes that.
  And since the GENERIC_GPIO in arch/arm/ will be gone away, this adds
  ARCH_REQUIRE_GPIOLIB for S3C24XX and S5PC100 instead.
 
  Reported-by: Alexandre Courbot gnu...@gmail.com
  Cc: Romain Naour romain.na...@openwide.fr
  Signed-off-by: Kukjin Kim kgene@samsung.com
  ---
   arch/arm/Kconfig |4 ++--
   1 file changed, 2 insertions(+), 2 deletions(-)
 
  diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
  index 46fcfa8..a239c7e 100644
  --- a/arch/arm/Kconfig
  +++ b/arch/arm/Kconfig
  @@ -770,10 +770,10 @@ config ARCH_SA1100
   config ARCH_S3C24XX
  bool Samsung S3C24XX SoCs
  select ARCH_HAS_CPUFREQ
  +   select ARCH_REQUIRE_GPIOLIB
  select CLKDEV_LOOKUP
  select CLKSRC_MMIO
  select GENERIC_CLOCKEVENTS
  -   select GENERIC_GPIO
  select HAVE_CLK
  select HAVE_S3C2410_I2C if I2C
  select HAVE_S3C2410_WATCHDOG if WATCHDOG
  @@ -828,11 +828,11 @@ config ARCH_S5P64X0
 
   config ARCH_S5PC100
  bool Samsung S5PC100
  +   select ARCH_REQUIRE_GPIOLIB
  select CLKDEV_LOOKUP
  select CLKSRC_MMIO
  select CPU_V7
  select GENERIC_CLOCKEVENTS
  -   select GENERIC_GPIO
  select HAVE_CLK
  select HAVE_S3C2410_I2C if I2C
  select HAVE_S3C2410_WATCHDOG if WATCHDOG
  --
  1.7.10.4
 
 Should do the trick, if we can make sure that your tree is merged
 prior to my patches.

I'm not sure but I think, arm-soc tree should be merged into mainline before 
others...

 Can you put it into your tree for 3.10?
 
I did, so it should be fine.

Thanks.

- Kukjin

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[PATCH V6 1/4] cpufreq: exynos: Add cpufreq driver for exynos5440

2013-04-08 Thread Amit Daniel Kachhap
This patch adds dvfs support for exynos5440 SOC. This soc has 4 cores and
they scale at same frequency. The nature of exynos5440 clock controller is
different from previous exynos controllers so not using the common exynos
cpufreq framework. The major difference being interrupt notification for
frequency change. Also, OPP library is used for device tree parsing to get
different parameters like frequency, voltage etc. Since the opp library sorts
the frequency table in ascending order so they are again re-arranged in
descending order. This will have one-to-one mapping with the clock controller
state management logic.

Cc: Viresh Kumar viresh.ku...@linaro.org
Cc: Rafael J. Wysocki r...@sisk.pl
Cc: Kukjin Kim kgene@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 .../bindings/cpufreq/cpufreq-exynos5440.txt|   28 ++
 drivers/cpufreq/Kconfig.arm|9 +
 drivers/cpufreq/Makefile   |1 +
 drivers/cpufreq/exynos5440-cpufreq.c   |  479 
 4 files changed, 517 insertions(+), 0 deletions(-)
 create mode 100644 
Documentation/devicetree/bindings/cpufreq/cpufreq-exynos5440.txt
 create mode 100644 drivers/cpufreq/exynos5440-cpufreq.c

diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-exynos5440.txt 
b/Documentation/devicetree/bindings/cpufreq/cpufreq-exynos5440.txt
new file mode 100644
index 000..caff1a5
--- /dev/null
+++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-exynos5440.txt
@@ -0,0 +1,28 @@
+
+Exynos5440 cpufreq driver
+---
+
+Exynos5440 SoC cpufreq driver for CPU frequency scaling.
+
+Required properties:
+- interrupts: Interrupt to know the completion of cpu frequency change.
+- operating-points: Table of frequencies and voltage CPU could be transitioned 
into,
+   in the decreasing order. Frequency should be in KHz units and voltage
+   should be in microvolts.
+
+Optional properties:
+- clock-latency: Clock monitor latency in microsecond.
+
+All the required listed above must be defined under node cpufreq.
+
+Example:
+
+   cpufreq@16 {
+   compatible = samsung,exynos5440-cpufreq;
+   reg = 0x16 0x1000;
+   interrupts = 0 57 0;
+   operating-points = 
+   100 975000
+   80  925000;
+   clock-latency = 10;
+   };
diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm
index f3f3b14..bce2195 100644
--- a/drivers/cpufreq/Kconfig.arm
+++ b/drivers/cpufreq/Kconfig.arm
@@ -42,6 +42,15 @@ config ARM_EXYNOS5250_CPUFREQ
  This adds the CPUFreq driver for Samsung EXYNOS5250
  SoC.
 
+config ARM_EXYNOS5440_CPUFREQ
+   def_bool SOC_EXYNOS5440
+   depends on HAVE_CLK  PM_OPP  OF
+   help
+ This adds the CPUFreq driver for Samsung EXYNOS5440
+ SoC. The nature of exynos5440 clock controller is
+ different than previous exynos controllers so not using
+ the common exynos framework.
+
 config ARM_HIGHBANK_CPUFREQ
tristate Calxeda Highbank-based
depends on ARCH_HIGHBANK
diff --git a/drivers/cpufreq/Makefile b/drivers/cpufreq/Makefile
index 5db1f1f..6ad0b91 100644
--- a/drivers/cpufreq/Makefile
+++ b/drivers/cpufreq/Makefile
@@ -56,6 +56,7 @@ obj-$(CONFIG_ARM_EXYNOS_CPUFREQ)  += exynos-cpufreq.o
 obj-$(CONFIG_ARM_EXYNOS4210_CPUFREQ)   += exynos4210-cpufreq.o
 obj-$(CONFIG_ARM_EXYNOS4X12_CPUFREQ)   += exynos4x12-cpufreq.o
 obj-$(CONFIG_ARM_EXYNOS5250_CPUFREQ)   += exynos5250-cpufreq.o
+obj-$(CONFIG_ARM_EXYNOS5440_CPUFREQ)   += exynos5440-cpufreq.o
 obj-$(CONFIG_ARM_HIGHBANK_CPUFREQ) += highbank-cpufreq.o
 obj-$(CONFIG_ARM_IMX6Q_CPUFREQ)+= imx6q-cpufreq.o
 obj-$(CONFIG_ARM_INTEGRATOR)   += integrator-cpufreq.o
diff --git a/drivers/cpufreq/exynos5440-cpufreq.c 
b/drivers/cpufreq/exynos5440-cpufreq.c
new file mode 100644
index 000..9c37825
--- /dev/null
+++ b/drivers/cpufreq/exynos5440-cpufreq.c
@@ -0,0 +1,479 @@
+/*
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * Amit Daniel Kachhap amit.dan...@samsung.com
+ *
+ * EXYNOS5440 - CPU frequency scaling support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include linux/clk.h
+#include linux/cpu.h
+#include linux/cpufreq.h
+#include linux/err.h
+#include linux/interrupt.h
+#include linux/io.h
+#include linux/module.h
+#include linux/of_address.h
+#include linux/of_irq.h
+#include linux/opp.h
+#include linux/platform_device.h
+#include linux/slab.h
+
+/* Register definitions */
+#define XMU_DVFS_CTRL  0x0060
+#define XMU_PMU_P0_7   0x0064
+#define XMU_C0_3_PSTATE0x0090
+#define XMU_P_LIMIT0x00a0

[PATCH V6 4/4] arm: dts: Add cpufreq controller node for Exynos5440 SoC

2013-04-08 Thread Amit Daniel Kachhap
Add cpufreq controller device node for Exynos5440 SoC for passing
parameters like controller base address, interrupt and cpufreq
table. This node is added outside cpu0 as this driver is now a platform
driver and a new device structure is needed.

Cc: Viresh Kumar viresh.ku...@linaro.org
Cc: Rafael J. Wysocki r...@sisk.pl
Cc: Kukjin Kim kgene@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 arch/arm/boot/dts/exynos5440.dtsi |   12 
 1 files changed, 12 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boot/dts/exynos5440.dtsi 
b/arch/arm/boot/dts/exynos5440.dtsi
index 9a99755..94074ea 100644
--- a/arch/arm/boot/dts/exynos5440.dtsi
+++ b/arch/arm/boot/dts/exynos5440.dtsi
@@ -63,6 +63,18 @@
 
};
 
+   cpufreq@16 {
+   compatible = samsung,exynos5440-cpufreq;
+   reg = 0x16 0x1000;
+   interrupts = 0 57 0;
+   operating-points = 
+   /* KHzuV */
+   120 1025000
+   100 975000
+   80  925000
+   ;
+   };
+
serial@B {
compatible = samsung,exynos4210-uart;
reg = 0xB 0x1000;
-- 
1.7.1

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[PATCH V6 2/4] cpufreq: exynos: Remove error return even if no soc is found

2013-04-08 Thread Amit Daniel Kachhap
This patch helps to have single binary for exynos5440 and previous
exynos soc's. This change is needed for adding exynos5440 cpufreq driver
which does not uses exynos-cpufreq common file and adds it own driver.

Cc: Viresh Kumar viresh.ku...@linaro.org
Cc: Rafael J. Wysocki r...@sisk.pl
Cc: Kukjin Kim kgene@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 drivers/cpufreq/exynos-cpufreq.c |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/drivers/cpufreq/exynos-cpufreq.c b/drivers/cpufreq/exynos-cpufreq.c
index c0c4ce5..475b4f6 100644
--- a/drivers/cpufreq/exynos-cpufreq.c
+++ b/drivers/cpufreq/exynos-cpufreq.c
@@ -294,7 +294,7 @@ static int __init exynos_cpufreq_init(void)
else if (soc_is_exynos5250())
ret = exynos5250_cpufreq_init(exynos_info);
else
-   pr_err(%s: CPU type not found\n, __func__);
+   return 0;
 
if (ret)
goto err_vdd_arm;
-- 
1.7.1

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[PATCH V6 0/4] cpufreq: exynos5440: support for cpufreq driver

2013-04-08 Thread Amit Daniel Kachhap
Submitting the V6 version of exynos5440 cpufreq driver. This patchset addresses
all the coding and design concerns raised especially by Viresh.

Changes in V6:
* Used cpufreq post-change notifier call back in case of failure as pointed by
  Viresh.
* Called cpufreq_frequency_table_cpuinfo before calling
  cpufreq_frequency_table_get_attr as pointed by Viresh.
* Used modified API cpufreq_notify_transition.

Changes in V5:
* Removed the unnecessary DT look up entry from mach-exynos5-dt.c.
* Fixed all coding and comments issue raised by Viresh.

Changes in V4:
* Added dev_err logs instead of pr_err.
* Used the devm_ioremap_resource API.
* Implemented several coding guidelines and minor error comments from Sylwester,
  Russell and Viresh.

Changes in V3:
* Converted the driver to probe based as suggested by Viresh. This is also
  beneficial for multiplatform kernel.
* Other coding guidelines related changes.
* Moved the DT node outside cpu0 node as the driver is now a platform
  driver.

Changes in V2:
* Added OPP library support to parse DT parameters.
* Removed a hack to handle interrupts in bootup.
* Implemented other review comments from Viresh and Inder.

All these patches are dependent on Thomas Abraham common clock patches.
(http://www.mail-archive.com/linux-samsung-soc@vger.kernel.org/msg15860.html)
This whole patch series is based on Rafael tree.
git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git bleeding-edge

Amit Daniel Kachhap (4):
  cpufreq: exynos: Add cpufreq driver for exynos5440
  cpufreq: exynos: Remove error return even if no soc is found
  arm: exynos: Enable OPP library support for exynos5440
  arm: dts: Add cpufreq controller node for Exynos5440 SoC

 .../bindings/cpufreq/cpufreq-exynos5440.txt|   28 ++
 arch/arm/boot/dts/exynos5440.dtsi  |   12 +
 arch/arm/mach-exynos/Kconfig   |2 +
 drivers/cpufreq/Kconfig.arm|9 +
 drivers/cpufreq/Makefile   |1 +
 drivers/cpufreq/exynos-cpufreq.c   |2 +-
 drivers/cpufreq/exynos5440-cpufreq.c   |  479 
 7 files changed, 532 insertions(+), 1 deletions(-)
 create mode 100644 
Documentation/devicetree/bindings/cpufreq/cpufreq-exynos5440.txt
 create mode 100644 drivers/cpufreq/exynos5440-cpufreq.c

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[PATCH V6 3/4] arm: exynos: Enable OPP library support for exynos5440

2013-04-08 Thread Amit Daniel Kachhap
The OPP library support is needed for exynos5440 cpu frequency
dynamic scaling driver.

Cc: Viresh Kumar viresh.ku...@linaro.org
Cc: Rafael J. Wysocki r...@sisk.pl
Cc: Kukjin Kim kgene@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 arch/arm/mach-exynos/Kconfig |2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 70f94c8..d5dde07 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -72,10 +72,12 @@ config SOC_EXYNOS5440
bool SAMSUNG EXYNOS5440
default y
depends on ARCH_EXYNOS5
+   select ARCH_HAS_OPP
select ARM_ARCH_TIMER
select AUTO_ZRELADDR
select PINCTRL
select PINCTRL_EXYNOS5440
+   select PM_OPP
help
  Enable EXYNOS5440 SoC support
 
-- 
1.7.1

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Re: [PATCH V5 0/4] cpufreq: exynos5440: support for cpufreq driver

2013-04-08 Thread amit daniel kachhap
On Fri, Apr 5, 2013 at 6:08 PM, Rafael J. Wysocki r...@sisk.pl wrote:
 On Thursday, March 28, 2013 01:35:18 PM Amit Daniel Kachhap wrote:
 Submitting the V5 version of exynos5440 cpufreq driver. This patchset 
 addresses
 all the coding and design concerns raised especially by Viresh.

 Changes in V5:
 * Removed the unnecessary DT look up entry from mach-exynos5-dt.c.
 * Fixed all coding and comments issue raised by Viresh.

 Changes in V4:
 * Added dev_err logs instead of pr_err.
 * Used the devm_ioremap_resource API.
 * Implemented several coding guidelines and minor error comments from 
 Sylwester,
   Russell and Viresh.

 Changes in V3:
 * Converted the driver to probe based as suggested by Viresh. This is also
   beneficial for multiplatform kernel.
 * Other coding guidelines related changes.
 * Moved the DT node outside cpu0 node as the driver is now a platform
   driver.

 Changes in V2:
 * Added OPP library support to parse DT parameters.
 * Removed a hack to handle interrupts in bootup.
 * Implemented other review comments from Viresh and Inder.

 All these patches are dependent on Thomas Abraham common clock patches.
 (http://www.mail-archive.com/linux-samsung-soc@vger.kernel.org/msg15860.html)
 This whole patch series is based on 3.9-rc4.

 Amit Daniel Kachhap (4):
   cpufreq: exynos: Add cpufreq driver for exynos5440
   cpufreq: exynos: Remove error return even if no soc is found
   arm: exynos: Enable OPP library support for exynos5440
   arm: dts: Add cpufreq controller node for Exynos5440 SoC

  .../bindings/cpufreq/cpufreq-exynos5440.txt|   28 ++
  arch/arm/boot/dts/exynos5440.dtsi  |   12 +
  arch/arm/mach-exynos/Kconfig   |2 +
  drivers/cpufreq/Kconfig.arm|9 +
  drivers/cpufreq/Makefile   |1 +
  drivers/cpufreq/exynos-cpufreq.c   |2 +-
  drivers/cpufreq/exynos5440-cpufreq.c   |  474 
 
  7 files changed, 527 insertions(+), 1 deletions(-)
  create mode 100644 
 Documentation/devicetree/bindings/cpufreq/cpufreq-exynos5440.txt
  create mode 100644 drivers/cpufreq/exynos5440-cpufreq.c

 Is this for me or the Samsung tree?

 If it's for me, I need ACKs from the Samsung tree maintainers.  Also, please
 address the Viresh's comments.

 Thanks,
 Rafael

Hi Rafael,

I submitted the V6 version with all comments from Viresh addressed.

Hi Kukjin Kim,

Any suggestion on how this patch should be merged. In my opinion it
should go via Rafael's tree as this patch uses some fixes present in
Rafael's tree like modified cpufreq_notify_transition API.

Thanks,
Amit Daniel

 --
 I speak only for myself.
 Rafael J. Wysocki, Intel Open Source Technology Center.
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Re: [PATCH V6 1/4] cpufreq: exynos: Add cpufreq driver for exynos5440

2013-04-08 Thread Viresh Kumar
On 8 April 2013 13:47, Amit Daniel Kachhap amit.dan...@samsung.com wrote:

 diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm
 index f3f3b14..bce2195 100644
 --- a/drivers/cpufreq/Kconfig.arm
 +++ b/drivers/cpufreq/Kconfig.arm
 @@ -42,6 +42,15 @@ config ARM_EXYNOS5250_CPUFREQ
   This adds the CPUFreq driver for Samsung EXYNOS5250
   SoC.

 +config ARM_EXYNOS5440_CPUFREQ
 +   def_bool SOC_EXYNOS5440
 +   depends on HAVE_CLK  PM_OPP  OF

Don't you need a depend on your Soc or mach or arch? Don't send another
version for this now.. Just send a new patch over this patchset.

 diff --git a/drivers/cpufreq/exynos5440-cpufreq.c 
 b/drivers/cpufreq/exynos5440-cpufreq.c

 +static int exynos_target(struct cpufreq_policy *policy,
 + unsigned int target_freq,
 + unsigned int relation)
 +{
 +   unsigned int index, tmp;
 +   int ret = 0, i;
 +   struct cpufreq_frequency_table *freq_table = dvfs_info-freq_table;
 +
 +   mutex_lock(cpufreq_lock);
 +   freqs.old = dvfs_info-cur_frequency;
 +
 +   ret = cpufreq_frequency_table_target(policy, freq_table,
 +  target_freq, relation, index);
 +   if (ret)
 +   goto out;
 +

Move freqs.old = *** here.

 +   freqs.new = freq_table[index].frequency;
 +   freqs.cpu = policy-cpu;

You don't need this. Below call takes care of it.

Rest is fine.. Just resend this patch with all above issues fixed and i will Ack
it without any further reviews :)

Don't wait for few days for doing this, send it right now. :)
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Re: [PATCH 6/6] ARM: dts: Add pcie controller node for Samsung EXYNOS5440 SoC

2013-04-08 Thread Jingoo Han
On Saturday, March 23, 2013 1:09 PM, Jingoo Han wrote:
 
 Exynos5440 has two PCIe controllers which can be used as root complex
 for PCIe interface.
 
 Signed-off-by: Jingoo Han jg1@samsung.com
 ---
  arch/arm/boot/dts/exynos5440-ssdk5440.dts |8 +++
  arch/arm/boot/dts/exynos5440.dtsi |   32 
 +
  2 files changed, 40 insertions(+), 0 deletions(-)
 
 diff --git a/arch/arm/boot/dts/exynos5440-ssdk5440.dts 
 b/arch/arm/boot/dts/exynos5440-ssdk5440.dts
 index a21eb4c..746f9fc 100644
 --- a/arch/arm/boot/dts/exynos5440-ssdk5440.dts
 +++ b/arch/arm/boot/dts/exynos5440-ssdk5440.dts
 @@ -34,4 +34,12 @@
   clock-frequency = 5000;
   };
   };
 +
 + pcie0@4000 {
 + reset-gpio = 5;
 + };
 +
 + pcie1@6000 {
 + reset-gpio = 22;
 + };
  };
 diff --git a/arch/arm/boot/dts/exynos5440.dtsi 
 b/arch/arm/boot/dts/exynos5440.dtsi
 index c374a31..41b2d2c 100644
 --- a/arch/arm/boot/dts/exynos5440.dtsi
 +++ b/arch/arm/boot/dts/exynos5440.dtsi
 @@ -178,4 +178,36 @@
   clocks = clock 21;
   clock-names = rtc;
   };
 +
 + pcie0@4000 {
 + compatible = samsung,exynos5440-pcie;
 + reg = 0x4000 0x4000
 + 0x29 0x1000
 + 0x27 0x1000
 + 0x271000 0x40;
 + interrupts = 0 20 0, 0 21 0, 0 22 0;
 + #address-cells = 3;
 + #size-cells = 2;
 + device_type = pci;
 + bus-range = 0x0 0xf;
 + ranges = 0x0800 0 0x4000 0x4000 0 0x0020   /* 
 configuration space */
 +   0x8100 0 0  0x4020 0 0x4000   /* 
 downstream I/O */
 +   0x8200 0 0  0x40204000 0 0x1000; /* 
 non-prefetchable memory */
 + };
 +
 + pcie1@6000 {
 + compatible = samsung,exynos5440-pcie;
 + reg = 0x6000 0x4000
 + 0x2a 0x1000
 + 0x272000 0x1000
 + 0x271040 0x40;
 + interrupts = 0 23 0, 0 24 0, 0 25 0;
 + #address-cells = 3;
 + #size-cells = 2;
 + device_type = pci;
 + bus-range = 0x0 0xf;
 + ranges = 0x0800 0 0x6000 0x6000 0 0x0020   /* 
 configuration space */
 +   0x8100 0 0  0x6020 0 0x4000   /* 
 downstream I/O */
 +   0x8200 0 0  0x60204000 0 0x1000; /* 
 non-prefetchable memory */
 + };

Hi Jason,

I have a question.
Now, I am reviewing the Tegra PCIe, Marvell PCIe patchset.
However, in the case of Exynos PCIe,
'downstream I/O' and 'non-prefetchable memory' are different between PCIe0 and 
PCIe1.
These regions are not shared.

PCIe0:
ranges = 0x0800 0 0x4000 0x4000 0 0x0020   /* 
configuration space */
  0x8100 0 0  0x4020 0 0x4000   /* 
downstream I/O */
  0x8200 0 0  0x40204000 0 0x1000; /* 
non-prefetchable memory */

PCIe1:
ranges = 0x0800 0 0x4000 0x4000 0 0x0020   /* 
configuration space */
  0x8100 0 0  0x4020 0 0x4000   /* 
downstream I/O */
  0x8200 0 0  0x40204000 0 0x1000; /* 
non-prefetchable memory */

PCIe0 uses 0x4000~0x5fff, PCI1 uses 0x6000~0x7fff.

How can I handle this? :)
The following is right?

+   pcie-controller {
.
+   ranges = 0x8200 0 0x4000 0x4000 0 0x0020   /* 
port 0 registers */
+ 0x8200 0 0x6000 0x6000 0 0x0020   /* 
port 1 registers */
+ 0x8100 0 0  0x4020 0 0x4000   /* 
port 0 downstream I/O */
+ 0x8100 0 0  0x6020 0 0x4000   /* 
port 1 downstream I/O */
+ 0x8200 0 0x40204000 0x40204000 0 0x1000; /* 
port 0 non-prefetchable memory */
+ 0x8200 0 0x40204000 0x60204000 0 0x1000; /* 
port 1 non-prefetchable memory */
+
+   pci@1,0 {
+   device_type = pci;
+   assigned-addresses = 0x82000800 0 0x4000 0 
0x0020
+ 0x81000800 0 0x4020 0 
0x4000
+ 0x81000800 0 0x40204000 0 
0x1000;
.
+   pci@2,0 {
+   device_type = pci;
+   assigned-addresses = 0x82000800 0 0x6000 0 
0x0020
+ 0x81000800 0 0x6020 0 
0x4000
+ 0x81000800 0 0x60204000 0 
0x1000;

Best regards,
Jingoo Han


  };
 --
 

RE: [PATCH 07/18] cpufreq: s3c24xx: move cpufreq driver to drivers/cpufreq

2013-04-08 Thread Kukjin Kim
Rafael J. Wysocki wrote:
 
 On Friday, April 05, 2013 12:36:34 PM Viresh Kumar wrote:
  On 5 April 2013 12:18, Kukjin Kim kgene@samsung.com wrote:
   Basically, this moving looks good to me, but should be re-worked based
 on
   for-next of samsung tree because this touches too many samsung stuff
 so this
   should be sent to upstream via samsung tree.
 
  Hmm... Its already applied in Rafael's tree. But it doesn't mean that
  it can't be
  moved to your tree if there is a issue.
 
 Well, I'm dropping it.  Please merge via the Samsung tree.
 
OK, I will.

I got patch file from Viresh, and there is a sign from Rafael, but it should be 
ack. So Rafael, let me use your ack on this patch when I apply. If any 
problems, please let me know.

Thanks.

- Kukjin

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Re: [PATCH V6 1/4] cpufreq: exynos: Add cpufreq driver for exynos5440

2013-04-08 Thread Viresh Kumar
On 8 April 2013 14:17, Viresh Kumar viresh.ku...@linaro.org wrote:
 On 8 April 2013 13:47, Amit Daniel Kachhap amit.dan...@samsung.com wrote:

 diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm
 index f3f3b14..bce2195 100644
 --- a/drivers/cpufreq/Kconfig.arm
 +++ b/drivers/cpufreq/Kconfig.arm
 @@ -42,6 +42,15 @@ config ARM_EXYNOS5250_CPUFREQ
   This adds the CPUFreq driver for Samsung EXYNOS5250
   SoC.

 +config ARM_EXYNOS5440_CPUFREQ
 +   def_bool SOC_EXYNOS5440
 +   depends on HAVE_CLK  PM_OPP  OF

 Don't you need a depend on your Soc or mach or arch? Don't send another
 version for this now.. Just send a new patch over this patchset.

Sorry, i overlooked def_bool... This comments stands invalid.
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Re: [PATCH 07/18] cpufreq: s3c24xx: move cpufreq driver to drivers/cpufreq

2013-04-08 Thread Viresh Kumar
On 8 April 2013 14:45, Kukjin Kim kgene@samsung.com wrote:
 Rafael J. Wysocki wrote:
 Well, I'm dropping it.  Please merge via the Samsung tree.

 OK, I will.

 I got patch file from Viresh, and there is a sign from Rafael, but it should 
 be ack. So Rafael, let me use your ack on this patch when I apply. If any 
 problems, please let me know.

Ahh.. I forgot to remove it. I picked the initial patch from Rafael's tree.
But yes, you need it anyway :)
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RE: [PATCH] ARM: S3C24XX: Correct NR_IRQS definition for s3c2440

2013-04-08 Thread Kukjin Kim
Heiko Stübner wrote:
 
 Am Sonntag, 7. April 2013, 22:22:50 schrieb Sylwester Nawrocki:
  Due to NR_IRQS being incorrectly defined not all IRQ domains can
  be registered for S3C2440. It causes following errors on a s3c2440
  SoC based board:
 
  NR_IRQS:89
  S3C2440: IRQ Support
  irq: clearing pending status 0002
  [ cut here ]
  WARNING: at kernel/irq/irqdomain.c:234 0xc0056ed0()
  ...
  irq: could not create irq-domain
  ...
  s3c2410-wdt s3c2410-wdt: failed to install irq (-22)
  s3c2410-wdt: probe of s3c2410-wdt failed with error -22
  ...
  samsung-uart s3c2440-uart.0: cannot get irq 74
 
  Fix this by increasing NR_IRQS to at least (IRQ_S3C2443_AC97 + 1)
  if CPU_S3C2440 is selected, so the subintc IRQ domain gets properly
  registered.
 
  Cc: Heiko Stübner he...@sntech.de
  Signed-off-by: Tomasz Figa tomasz.f...@gmail.com
  Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
 
 Thanks for testing the irq changes on another subarchitecture and fixing
 the
 glitch.
 
 Acked-by: Heiko Stuebner he...@sntech.de
 
 
Thanks for you guys' effort.

Applied.

- Kukjin

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RE: [PATCH] ARM: Samsung: Select ARM_CPU_SUSPEND when required

2013-04-08 Thread Kukjin Kim
Sylwester Nawrocki wrote:
 
 The power management code of S3C24XX, S3C64XX, S5PV210 platform in
 arch/arm/plat-samsung/, arch/arm/mach-s3c24xx/, arch/arm/mach-s3c64xx/
 directories uses generic cpu_suspend routine. Make sure it is compiled
 in when building with power management support. Without this patch
 compilation fails with errors as below. It can be reproduced by using
 default config files with CONFIG_SUSPEND disabled and CONFIG_PM_RUNTIME
 enabled.
 
  - s5pv210_defconfig
  arch/arm/plat-samsung/built-in.o: In function `s3c_pm_enter':
  arch/arm/plat-samsung/pm.c:304: undefined reference to `cpu_suspend'
  arch/arm/plat-samsung/built-in.o: In function `s3c_cpu_resume':
  arch/arm/plat-samsung/s5p-sleep.S:74: undefined reference to `cpu_resume'
 
  - s3c24xx_defconfig
  arch/arm/mach-s3c24xx/built-in.o: In function `s3c_cpu_resume':
  arch/arm/mach-s3c24xx/sleep.S:83: undefined reference to `cpu_resume'
  arch/arm/plat-samsung/built-in.o: In function `s3c_pm_enter':
  arch/arm/plat-samsung/pm.c:304: undefined reference to `cpu_suspend'
 
  - s3c64xx_defconfig
  arch/arm/mach-s3c64xx/built-in.o: In function `s3c_cpu_resume':
  arch/arm/mach-s3c64xx/sleep.S:72: undefined reference to `cpu_resume'
  arch/arm/plat-samsung/built-in.o: In function `s3c_pm_enter':
  arch/arm/plat-samsung/pm.c:304: undefined reference to `cpu_suspend'
 
 To fix this issue select ARM_CPU_SUSPEND for PLAT_SAMSUNG when PM is set.
 
 The build break occurs for kernels at least back to v3.0, however this
 patch applies without conflicts only back to v3.7.
 
 Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
 Cc: sta...@vger.kernel.org
 ---
  arch/arm/plat-samsung/Kconfig |1 +
  1 files changed, 1 insertions(+), 0 deletions(-)
 
 diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
 index 54d1861..02355ba 100644
 --- a/arch/arm/plat-samsung/Kconfig
 +++ b/arch/arm/plat-samsung/Kconfig
 @@ -10,6 +10,7 @@ config PLAT_SAMSUNG
   default y
   select GENERIC_IRQ_CHIP
   select NO_IOPORT
 + select ARM_CPU_SUSPEND if PM
   help
 Base platform code for all Samsung SoC based systems
 
 --
 1.7.4.1

Yes, right. The pm.c in plat-samsung should be built with
arch/arm/kernel/sleep.S and suspend.c.

BTW it should be shown in alphabetical order and we don't need more
following in mach-exynos.

88
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 2f45906..bc0a8b2 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -31,7 +31,6 @@ config CPU_EXYNOS4210
bool SAMSUNG EXYNOS4210
default y
depends on ARCH_EXYNOS4
-   select ARM_CPU_SUSPEND if PM
select PM_GENERIC_DOMAINS
select S5P_PM if PM
select S5P_SLEEP if PM
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index b708b3e..30a976d 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -8,6 +8,7 @@ config PLAT_SAMSUNG
Bool
depends on PLAT_S3C24XX || ARCH_S3C64XX || PLAT_S5P
default y
+   select ARM_CPU_SUSPEND if PM
select GENERIC_IRQ_CHIP
select NO_IOPORT
help
88

If you have any objections, let me know.

Thanks.

- Kukjin

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[RESEND PATCH V6 1/4] cpufreq: exynos: Add cpufreq driver for exynos5440

2013-04-08 Thread Amit Daniel Kachhap
This patch adds dvfs support for exynos5440 SOC. This soc has 4 cores and
they scale at same frequency. The nature of exynos5440 clock controller is
different from previous exynos controllers so not using the common exynos
cpufreq framework. The major difference being interrupt notification for
frequency change. Also, OPP library is used for device tree parsing to get
different parameters like frequency, voltage etc. Since the opp library sorts
the frequency table in ascending order so they are again re-arranged in
descending order. This will have one-to-one mapping with the clock controller
state management logic.

Cc: Viresh Kumar viresh.ku...@linaro.org
Cc: Rafael J. Wysocki r...@sisk.pl
Cc: Kukjin Kim kgene@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---

Re-sending this patch with a minor comment from Viresh about the correct usage
of cpufreq_notify_transition API. 

 .../bindings/cpufreq/cpufreq-exynos5440.txt|   28 ++
 drivers/cpufreq/Kconfig.arm|9 +
 drivers/cpufreq/Makefile   |1 +
 drivers/cpufreq/exynos5440-cpufreq.c   |  478 
 4 files changed, 516 insertions(+), 0 deletions(-)
 create mode 100644 
Documentation/devicetree/bindings/cpufreq/cpufreq-exynos5440.txt
 create mode 100644 drivers/cpufreq/exynos5440-cpufreq.c

diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-exynos5440.txt 
b/Documentation/devicetree/bindings/cpufreq/cpufreq-exynos5440.txt
new file mode 100644
index 000..caff1a5
--- /dev/null
+++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-exynos5440.txt
@@ -0,0 +1,28 @@
+
+Exynos5440 cpufreq driver
+---
+
+Exynos5440 SoC cpufreq driver for CPU frequency scaling.
+
+Required properties:
+- interrupts: Interrupt to know the completion of cpu frequency change.
+- operating-points: Table of frequencies and voltage CPU could be transitioned 
into,
+   in the decreasing order. Frequency should be in KHz units and voltage
+   should be in microvolts.
+
+Optional properties:
+- clock-latency: Clock monitor latency in microsecond.
+
+All the required listed above must be defined under node cpufreq.
+
+Example:
+
+   cpufreq@16 {
+   compatible = samsung,exynos5440-cpufreq;
+   reg = 0x16 0x1000;
+   interrupts = 0 57 0;
+   operating-points = 
+   100 975000
+   80  925000;
+   clock-latency = 10;
+   };
diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm
index f3f3b14..bce2195 100644
--- a/drivers/cpufreq/Kconfig.arm
+++ b/drivers/cpufreq/Kconfig.arm
@@ -42,6 +42,15 @@ config ARM_EXYNOS5250_CPUFREQ
  This adds the CPUFreq driver for Samsung EXYNOS5250
  SoC.
 
+config ARM_EXYNOS5440_CPUFREQ
+   def_bool SOC_EXYNOS5440
+   depends on HAVE_CLK  PM_OPP  OF
+   help
+ This adds the CPUFreq driver for Samsung EXYNOS5440
+ SoC. The nature of exynos5440 clock controller is
+ different than previous exynos controllers so not using
+ the common exynos framework.
+
 config ARM_HIGHBANK_CPUFREQ
tristate Calxeda Highbank-based
depends on ARCH_HIGHBANK
diff --git a/drivers/cpufreq/Makefile b/drivers/cpufreq/Makefile
index 5db1f1f..6ad0b91 100644
--- a/drivers/cpufreq/Makefile
+++ b/drivers/cpufreq/Makefile
@@ -56,6 +56,7 @@ obj-$(CONFIG_ARM_EXYNOS_CPUFREQ)  += exynos-cpufreq.o
 obj-$(CONFIG_ARM_EXYNOS4210_CPUFREQ)   += exynos4210-cpufreq.o
 obj-$(CONFIG_ARM_EXYNOS4X12_CPUFREQ)   += exynos4x12-cpufreq.o
 obj-$(CONFIG_ARM_EXYNOS5250_CPUFREQ)   += exynos5250-cpufreq.o
+obj-$(CONFIG_ARM_EXYNOS5440_CPUFREQ)   += exynos5440-cpufreq.o
 obj-$(CONFIG_ARM_HIGHBANK_CPUFREQ) += highbank-cpufreq.o
 obj-$(CONFIG_ARM_IMX6Q_CPUFREQ)+= imx6q-cpufreq.o
 obj-$(CONFIG_ARM_INTEGRATOR)   += integrator-cpufreq.o
diff --git a/drivers/cpufreq/exynos5440-cpufreq.c 
b/drivers/cpufreq/exynos5440-cpufreq.c
new file mode 100644
index 000..ead7ed4
--- /dev/null
+++ b/drivers/cpufreq/exynos5440-cpufreq.c
@@ -0,0 +1,478 @@
+/*
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * Amit Daniel Kachhap amit.dan...@samsung.com
+ *
+ * EXYNOS5440 - CPU frequency scaling support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include linux/clk.h
+#include linux/cpu.h
+#include linux/cpufreq.h
+#include linux/err.h
+#include linux/interrupt.h
+#include linux/io.h
+#include linux/module.h
+#include linux/of_address.h
+#include linux/of_irq.h
+#include linux/opp.h
+#include linux/platform_device.h
+#include linux/slab.h
+
+/* Register definitions */
+#define XMU_DVFS_CTRL  0x0060
+#define 

Re: [PATCH V6 1/4] cpufreq: exynos: Add cpufreq driver for exynos5440

2013-04-08 Thread amit daniel kachhap
On Mon, Apr 8, 2013 at 2:46 PM, Viresh Kumar viresh.ku...@linaro.org wrote:
 On 8 April 2013 14:17, Viresh Kumar viresh.ku...@linaro.org wrote:
 On 8 April 2013 13:47, Amit Daniel Kachhap amit.dan...@samsung.com wrote:

 diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm
 index f3f3b14..bce2195 100644
 --- a/drivers/cpufreq/Kconfig.arm
 +++ b/drivers/cpufreq/Kconfig.arm
 @@ -42,6 +42,15 @@ config ARM_EXYNOS5250_CPUFREQ
   This adds the CPUFreq driver for Samsung EXYNOS5250
   SoC.

 +config ARM_EXYNOS5440_CPUFREQ
 +   def_bool SOC_EXYNOS5440
 +   depends on HAVE_CLK  PM_OPP  OF

 Don't you need a depend on your Soc or mach or arch? Don't send another
 version for this now.. Just send a new patch over this patchset.

 Sorry, i overlooked def_bool... This comments stands invalid.
Ok, I resend this patch addressing all comments.

Thanks,
Amit

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Re: [PATCH V6 0/4] cpufreq: exynos5440: support for cpufreq driver

2013-04-08 Thread Viresh Kumar
On 8 April 2013 13:47, Amit Daniel Kachhap amit.dan...@samsung.com wrote:
 Submitting the V6 version of exynos5440 cpufreq driver. This patchset 
 addresses
 all the coding and design concerns raised especially by Viresh.

 Changes in V6:
 * Used cpufreq post-change notifier call back in case of failure as pointed by
   Viresh.
 * Called cpufreq_frequency_table_cpuinfo before calling
   cpufreq_frequency_table_get_attr as pointed by Viresh.
 * Used modified API cpufreq_notify_transition.

 Changes in V5:
 * Removed the unnecessary DT look up entry from mach-exynos5-dt.c.
 * Fixed all coding and comments issue raised by Viresh.

 Changes in V4:
 * Added dev_err logs instead of pr_err.
 * Used the devm_ioremap_resource API.
 * Implemented several coding guidelines and minor error comments from 
 Sylwester,
   Russell and Viresh.

 Changes in V3:
 * Converted the driver to probe based as suggested by Viresh. This is also
   beneficial for multiplatform kernel.
 * Other coding guidelines related changes.
 * Moved the DT node outside cpu0 node as the driver is now a platform
   driver.

 Changes in V2:
 * Added OPP library support to parse DT parameters.
 * Removed a hack to handle interrupts in bootup.
 * Implemented other review comments from Viresh and Inder.

 All these patches are dependent on Thomas Abraham common clock patches.
 (http://www.mail-archive.com/linux-samsung-soc@vger.kernel.org/msg15860.html)
 This whole patch series is based on Rafael tree.
 git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git 
 bleeding-edge

 Amit Daniel Kachhap (4):
   cpufreq: exynos: Add cpufreq driver for exynos5440
   cpufreq: exynos: Remove error return even if no soc is found
   arm: exynos: Enable OPP library support for exynos5440
   arm: dts: Add cpufreq controller node for Exynos5440 SoC

  .../bindings/cpufreq/cpufreq-exynos5440.txt|   28 ++
  arch/arm/boot/dts/exynos5440.dtsi  |   12 +
  arch/arm/mach-exynos/Kconfig   |2 +
  drivers/cpufreq/Kconfig.arm|9 +
  drivers/cpufreq/Makefile   |1 +
  drivers/cpufreq/exynos-cpufreq.c   |2 +-
  drivers/cpufreq/exynos5440-cpufreq.c   |  479 
 
  7 files changed, 532 insertions(+), 1 deletions(-)
  create mode 100644 
 Documentation/devicetree/bindings/cpufreq/cpufreq-exynos5440.txt
  create mode 100644 drivers/cpufreq/exynos5440-cpufreq.c

With the resent of 1/4,

Acked-by: Viresh Kumar viresh.ku...@linaro.org
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RE: [PATCH] ARM: S3C24XX: Remove unused GPIO drive strength register definitions

2013-04-08 Thread Kukjin Kim
Sylwester Nawrocki wrote:
 
 There is currently no users of these definitions so remove them.
 
 Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
 ---
  arch/arm/mach-s3c24xx/regs-dsc.h |  203 +
 -
  1 files changed, 4 insertions(+), 199 deletions(-)
 
Thanks for your cleanup ;-)

Applied.

- Kukjin

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Re: [PATCH] ARM: Samsung: Select ARM_CPU_SUSPEND when required

2013-04-08 Thread Sylwester Nawrocki
On 04/08/2013 11:57 AM, Kukjin Kim wrote:
 Sylwester Nawrocki wrote:
[...]
 Yes, right. The pm.c in plat-samsung should be built with
 arch/arm/kernel/sleep.S and suspend.c.
 
 BTW it should be shown in alphabetical order and we don't need more
 following in mach-exynos.
 
 88
 diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
 index 2f45906..bc0a8b2 100644
 --- a/arch/arm/mach-exynos/Kconfig
 +++ b/arch/arm/mach-exynos/Kconfig
 @@ -31,7 +31,6 @@ config CPU_EXYNOS4210
   bool SAMSUNG EXYNOS4210
   default y
   depends on ARCH_EXYNOS4
 - select ARM_CPU_SUSPEND if PM
   select PM_GENERIC_DOMAINS
   select S5P_PM if PM
   select S5P_SLEEP if PM
 diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
 index b708b3e..30a976d 100644
 --- a/arch/arm/plat-samsung/Kconfig
 +++ b/arch/arm/plat-samsung/Kconfig
 @@ -8,6 +8,7 @@ config PLAT_SAMSUNG
   Bool
   depends on PLAT_S3C24XX || ARCH_S3C64XX || PLAT_S5P
   default y
 + select ARM_CPU_SUSPEND if PM
   select GENERIC_IRQ_CHIP
   select NO_IOPORT
   help
 88
 
 If you have any objections, let me know.

Yes, this looks better. However after posting this patch I noticed linker
errors in some builds due to undefined cpu_arm920_do_suspend,
cpu_arm920_do_resume routines.

It seems it is because various cpu_*_do_suspend routines are selected by
CONFIG_PM_SLEEP.  And the PM code in arch/arm/mach-s3c24xx, arch/arm/mach-
s3c64xx is selected by CONFIG_PM.

$ git grep -1 ENTRY(cpu_.*_do_suspend
arch/arm/mm/proc-arm920.S-#ifdef CONFIG_PM_SLEEP
arch/arm/mm/proc-arm920.S:ENTRY(cpu_arm920_do_suspend)
arch/arm/mm/proc-arm920.S-  stmfd   sp!, {r4 - r6, lr}
--
arch/arm/mm/proc-arm926.S-#ifdef CONFIG_PM_SLEEP
arch/arm/mm/proc-arm926.S:ENTRY(cpu_arm926_do_suspend)
arch/arm/mm/proc-arm926.S-  stmfd   sp!, {r4 - r6, lr}
--
arch/arm/mm/proc-mohawk.S-#ifdef CONFIG_PM_SLEEP
arch/arm/mm/proc-mohawk.S:ENTRY(cpu_mohawk_do_suspend)
arch/arm/mm/proc-mohawk.S-  stmfd   sp!, {r4 - r9, lr}
--
arch/arm/mm/proc-sa1100.S-#ifdef CONFIG_PM_SLEEP
arch/arm/mm/proc-sa1100.S:ENTRY(cpu_sa1100_do_suspend)
arch/arm/mm/proc-sa1100.S-  stmfd   sp!, {r4 - r6, lr}
--
arch/arm/mm/proc-v6.S-#ifdef CONFIG_PM_SLEEP
arch/arm/mm/proc-v6.S:ENTRY(cpu_v6_do_suspend)
arch/arm/mm/proc-v6.S-  stmfd   sp!, {r4 - r9, lr}
--
arch/arm/mm/proc-v7.S-#ifdef CONFIG_ARM_CPU_SUSPEND
arch/arm/mm/proc-v7.S:ENTRY(cpu_v7_do_suspend)
arch/arm/mm/proc-v7.S-  stmfd   sp!, {r4 - r10, lr}
--
arch/arm/mm/proc-xsc3.S-#ifdef CONFIG_PM_SLEEP
arch/arm/mm/proc-xsc3.S:ENTRY(cpu_xsc3_do_suspend)
arch/arm/mm/proc-xsc3.S-stmfd   sp!, {r4 - r9, lr}
--
arch/arm/mm/proc-xscale.S-#ifdef CONFIG_PM_SLEEP
arch/arm/mm/proc-xscale.S:ENTRY(cpu_xscale_do_suspend)
arch/arm/mm/proc-xscale.S-  stmfd   sp!, {r4 - r9, lr}

However I can't reproduce it now :-/ Anyway the $subject patch fixes
the main issue, which I can easily reproduce here as well. So I'll
prepare another patch if needed when I get back to this later.

Thanks,
Sylwester
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Re: [PATCH 07/18] cpufreq: s3c24xx: move cpufreq driver to drivers/cpufreq

2013-04-08 Thread Rafael J. Wysocki
On Monday, April 08, 2013 06:15:09 PM Kukjin Kim wrote:
 Rafael J. Wysocki wrote:
  
  On Friday, April 05, 2013 12:36:34 PM Viresh Kumar wrote:
   On 5 April 2013 12:18, Kukjin Kim kgene@samsung.com wrote:
Basically, this moving looks good to me, but should be re-worked based
  on
for-next of samsung tree because this touches too many samsung stuff
  so this
should be sent to upstream via samsung tree.
  
   Hmm... Its already applied in Rafael's tree. But it doesn't mean that
   it can't be
   moved to your tree if there is a issue.
  
  Well, I'm dropping it.  Please merge via the Samsung tree.
  
 OK, I will.
 
 I got patch file from Viresh, and there is a sign from Rafael,
 but it should be ack. So Rafael, let me use your ack on this patch when
 I apply. If any problems, please let me know.

Since it was signed-off by me before, you can assume it's been ACKed as well.

Thanks,
Rafael


-- 
I speak only for myself.
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RE: [PATCH 07/18] cpufreq: s3c24xx: move cpufreq driver to drivers/cpufreq

2013-04-08 Thread Kukjin Kim
Rafael J. Wysocki wrote:

[...]

  
   Well, I'm dropping it.  Please merge via the Samsung tree.
  
  OK, I will.
 
  I got patch file from Viresh, and there is a sign from Rafael,
  but it should be ack. So Rafael, let me use your ack on this patch when
  I apply. If any problems, please let me know.
 
 Since it was signed-off by me before, you can assume it's been ACKed as
 well.
 
Thanks.

- Kukjin

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Re: [PATCH 0/3] clk: Exynos: Register audio subsytem clocks using common clk framework

2013-04-08 Thread Sylwester Nawrocki
Hi,

On 04/06/2013 12:16 PM, Padma Venkat wrote:
 On Fri, Apr 5, 2013 at 6:24 PM, Sylwester Nawrocki
 s.nawro...@samsung.com wrote:

 From a brief look Exynos4 and Exynos5 Audio Subsystem CLKCON very similar.
 I've just found bit 2 of 0x0381_0008 register is not used on Exynos5250.
 
 I added bit 2 as i2s_bus gate clock or you are pointing to something else?

Sorry, I should have written bit 1.

 Additionally the Audio Subsystem Clock controller is present on S5PV210
 SoCs and IMO compatible property you used is too generic. I would propose
 to use at least:

 samsung,s5pv210-audss-clock- for S5PV210
 samsung,exynos4210-audss-clock - for Exynos4
 samsung,exynos5250-audss-clock - for Exynos5
 
 Different compatible names means different driver files for exynos4 and 5??

No, it would be same driver but with multiple entries in the of_match_table.

 I haven't seen any difference between Exynos4 and Exynos5 audio subsystem.
 Can't we maintain one for both? If any extra clock instance is added
 on newer SoCs
 anyway it gets added at the end of the list of clocks. Please correct
 me if I am wrong.

Sure, the differences between Exynos4 and Exynos5 audio subsystem are very
minor ones. So we could easily use one clock driver for those. Probably same
driver can be used for S5PV210, an any differences could be handled in the
driver based on the compatible property.


Thanks,
Sylwester

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Samsung Poland RD Center
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Re: [PATCH] ARM: Samsung: Select ARM_CPU_SUSPEND when required

2013-04-08 Thread Russell King - ARM Linux
On Mon, Apr 08, 2013 at 12:27:34PM +0200, Sylwester Nawrocki wrote:
 On 04/08/2013 11:57 AM, Kukjin Kim wrote:
 Yes, this looks better. However after posting this patch I noticed linker
 errors in some builds due to undefined cpu_arm920_do_suspend,
 cpu_arm920_do_resume routines.
 
 It seems it is because various cpu_*_do_suspend routines are selected by
 CONFIG_PM_SLEEP.  And the PM code in arch/arm/mach-s3c24xx, arch/arm/mach-
 s3c64xx is selected by CONFIG_PM.
 
 $ git grep -1 ENTRY(cpu_.*_do_suspend
 arch/arm/mm/proc-arm920.S-#ifdef CONFIG_PM_SLEEP
 arch/arm/mm/proc-arm920.S:ENTRY(cpu_arm920_do_suspend)
 arch/arm/mm/proc-arm920.S-  stmfd   sp!, {r4 - r6, lr}
 --
 arch/arm/mm/proc-arm926.S-#ifdef CONFIG_PM_SLEEP
 arch/arm/mm/proc-arm926.S:ENTRY(cpu_arm926_do_suspend)
 arch/arm/mm/proc-arm926.S-  stmfd   sp!, {r4 - r6, lr}
 --
 arch/arm/mm/proc-mohawk.S-#ifdef CONFIG_PM_SLEEP
 arch/arm/mm/proc-mohawk.S:ENTRY(cpu_mohawk_do_suspend)
 arch/arm/mm/proc-mohawk.S-  stmfd   sp!, {r4 - r9, lr}
 --
 arch/arm/mm/proc-sa1100.S-#ifdef CONFIG_PM_SLEEP
 arch/arm/mm/proc-sa1100.S:ENTRY(cpu_sa1100_do_suspend)
 arch/arm/mm/proc-sa1100.S-  stmfd   sp!, {r4 - r6, lr}
 --
 arch/arm/mm/proc-v6.S-#ifdef CONFIG_PM_SLEEP
 arch/arm/mm/proc-v6.S:ENTRY(cpu_v6_do_suspend)
 arch/arm/mm/proc-v6.S-  stmfd   sp!, {r4 - r9, lr}
 --
 arch/arm/mm/proc-v7.S-#ifdef CONFIG_ARM_CPU_SUSPEND
 arch/arm/mm/proc-v7.S:ENTRY(cpu_v7_do_suspend)
 arch/arm/mm/proc-v7.S-  stmfd   sp!, {r4 - r10, lr}
 --
 arch/arm/mm/proc-xsc3.S-#ifdef CONFIG_PM_SLEEP
 arch/arm/mm/proc-xsc3.S:ENTRY(cpu_xsc3_do_suspend)
 arch/arm/mm/proc-xsc3.S-stmfd   sp!, {r4 - r9, lr}
 --
 arch/arm/mm/proc-xscale.S-#ifdef CONFIG_PM_SLEEP
 arch/arm/mm/proc-xscale.S:ENTRY(cpu_xscale_do_suspend)
 arch/arm/mm/proc-xscale.S-  stmfd   sp!, {r4 - r9, lr}
 
 However I can't reproduce it now :-/ Anyway the $subject patch fixes
 the main issue, which I can easily reproduce here as well. So I'll
 prepare another patch if needed when I get back to this later.

Sigh.  This stuff looks rather screwed up now:

$ grep -B1 'ENTRY.*do_suspend' arch/arm/mm/proc*.S
arch/arm/mm/proc-arm920.S-#ifdef CONFIG_PM_SLEEP
arch/arm/mm/proc-arm920.S:ENTRY(cpu_arm920_do_suspend)
--
arch/arm/mm/proc-arm926.S-#ifdef CONFIG_PM_SLEEP
arch/arm/mm/proc-arm926.S:ENTRY(cpu_arm926_do_suspend)
--
arch/arm/mm/proc-mohawk.S-#ifdef CONFIG_PM_SLEEP
arch/arm/mm/proc-mohawk.S:ENTRY(cpu_mohawk_do_suspend)
--
arch/arm/mm/proc-sa1100.S-#ifdef CONFIG_PM_SLEEP
arch/arm/mm/proc-sa1100.S:ENTRY(cpu_sa1100_do_suspend)
--
arch/arm/mm/proc-v6.S-#ifdef CONFIG_PM_SLEEP
arch/arm/mm/proc-v6.S:ENTRY(cpu_v6_do_suspend)
--
arch/arm/mm/proc-v7.S-#ifdef CONFIG_ARM_CPU_SUSPEND
arch/arm/mm/proc-v7.S:ENTRY(cpu_v7_do_suspend)
--
arch/arm/mm/proc-xsc3.S-#ifdef CONFIG_PM_SLEEP
arch/arm/mm/proc-xsc3.S:ENTRY(cpu_xsc3_do_suspend)
--
arch/arm/mm/proc-xscale.S-#ifdef CONFIG_PM_SLEEP
arch/arm/mm/proc-xscale.S:ENTRY(cpu_xscale_do_suspend)

Now, CONFIG_PM_SLEEP is fine if this stuff only ever gets used when PM_SLEEP
is enabled - that's what it was designed for in the first place.  However,
as we can see from the earlier patches in this thread, the cpu_suspend
stuff is being selected when PM is enabled (which is arguably wrong), and
also in some cases when CPU_IDLE is enabled.

Therefore, making this code depend on ARM_CPU_SUSPEND seems sensible.
However, So, how did proc-v7.S and only that file end up doing something
different?

commit 15e0d9e37c7fe9711b60f47221c394d45553ad8c
Author: Arnd Bergmann a...@arndb.de
Date:   Sat Oct 1 21:09:39 2011 +0200

ARM: pm: let platforms select cpu_suspend support

Support for the cpu_suspend functions is only built-in
when CONFIG_PM_SLEEP is enabled, but omap3/4, exynos4
and pxa always call cpu_suspend when CONFIG_PM is enabled.

Signed-off-by: Arnd Bergmann a...@arndb.de

...
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index a30e785..591accd 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -217,7 +217,7 @@ ENDPROC(cpu_v7_set_pte_ext)
 /* Suspend/resume support: derived from arch/arm/mach-s5pv210/sleep.S */
 .globl cpu_v7_suspend_size
 .equ   cpu_v7_suspend_size, 4 * 9
-#ifdef CONFIG_PM_SLEEP
+#ifdef CONFIG_ARM_CPU_SUSPEND
 ENTRY(cpu_v7_do_suspend)
...

As far as this commit goes, it looks sane at the time that it was written,
but as soon as we have *any* other selections of ARM_CPU_SUSPEND, the
whole idea becomes extremely fragile - hence the reason for your build
errors.

Moreover, with the above commit, there is _no_ sense what so ever in not
applying the same change to all proc-*.S files, thereby entirely avoiding
this fragility.  I would argue that the original commit should have made
the same change to _all_ proc-*.S files.

Let's do the job properly - hence this is now queued for -rc:

8===
From: Russell King rmk+ker...@arm.linux.org.uk
Subject: [PATCH] ARM: Do 15e0d9e37c (ARM: pm: let platforms select cpu_suspend 
support) properly

Let's do 

[PATCH v4] drm/exynos: prepare FIMD clocks

2013-04-08 Thread Vikas Sajjan
While migrating to common clock framework (CCF), I found that the FIMD clocks
were pulled down by the CCF.
If CCF finds any clock(s) which has NOT been claimed by any of the
drivers, then such clock(s) are PULLed low by CCF.

Calling clk_prepare() for FIMD clocks fixes the issue.

This patch also replaces clk_disable() with clk_unprepare() during exit, since
clk_prepare() is called in fimd_probe().

Signed-off-by: Vikas Sajjan vikas.saj...@linaro.org
---
Changes since v3:
- added clk_prepare() in fimd_probe() and clk_unprepare() in 
fimd_remove()
 as suggested by Viresh Kumar viresh.ku...@linaro.org
Changes since v2:
- moved clk_prepare_enable() and clk_disable_unprepare() from 
fimd_probe() to fimd_clock() as suggested by Inki Dae 
inki@samsung.com
Changes since v1:
- added error checking for clk_prepare_enable() and also replaced 
clk_disable() with clk_disable_unprepare() during exit.
---
 drivers/gpu/drm/exynos/exynos_drm_fimd.c |   14 --
 1 file changed, 12 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c 
b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
index 9537761..aa22370 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
@@ -934,6 +934,16 @@ static int fimd_probe(struct platform_device *pdev)
return ret;
}
 
+   ret = clk_prepare(ctx-bus_clk);
+   if (ret  0)
+   return ret;
+
+   ret = clk_prepare(ctx-lcd_clk);
+   if  (ret  0) {
+   clk_unprepare(ctx-bus_clk);
+   return ret;
+   }
+
ctx-vidcon0 = pdata-vidcon0;
ctx-vidcon1 = pdata-vidcon1;
ctx-default_win = pdata-default_win;
@@ -981,8 +991,8 @@ static int fimd_remove(struct platform_device *pdev)
if (ctx-suspended)
goto out;
 
-   clk_disable(ctx-lcd_clk);
-   clk_disable(ctx-bus_clk);
+   clk_unprepare(ctx-lcd_clk);
+   clk_unprepare(ctx-bus_clk);
 
pm_runtime_set_suspended(dev);
pm_runtime_put_sync(dev);
-- 
1.7.9.5

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Re: [PATCH v4] drm/exynos: prepare FIMD clocks

2013-04-08 Thread Viresh Kumar
On 8 April 2013 16:37, Vikas Sajjan vikas.saj...@linaro.org wrote:
 While migrating to common clock framework (CCF), I found that the FIMD clocks
 were pulled down by the CCF.
 If CCF finds any clock(s) which has NOT been claimed by any of the
 drivers, then such clock(s) are PULLed low by CCF.

 Calling clk_prepare() for FIMD clocks fixes the issue.

 This patch also replaces clk_disable() with clk_unprepare() during exit, since
 clk_prepare() is called in fimd_probe().

I asked you about fixing your commit log too.. It still looks incorrect to me.

This patch doesn't have anything to do with CCF pulling clocks down, but
calling clk_prepare() before clk_enable() is must now.. that's it..
nothing more.

 Signed-off-by: Vikas Sajjan vikas.saj...@linaro.org
 ---
 Changes since v3:
 - added clk_prepare() in fimd_probe() and clk_unprepare() in 
 fimd_remove()
  as suggested by Viresh Kumar viresh.ku...@linaro.org
 Changes since v2:
 - moved clk_prepare_enable() and clk_disable_unprepare() from
 fimd_probe() to fimd_clock() as suggested by Inki Dae 
 inki@samsung.com
 Changes since v1:
 - added error checking for clk_prepare_enable() and also replaced
 clk_disable() with clk_disable_unprepare() during exit.
 ---
  drivers/gpu/drm/exynos/exynos_drm_fimd.c |   14 --
  1 file changed, 12 insertions(+), 2 deletions(-)

 diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c 
 b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
 index 9537761..aa22370 100644
 --- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
 +++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
 @@ -934,6 +934,16 @@ static int fimd_probe(struct platform_device *pdev)
 return ret;
 }

 +   ret = clk_prepare(ctx-bus_clk);
 +   if (ret  0)
 +   return ret;
 +
 +   ret = clk_prepare(ctx-lcd_clk);
 +   if  (ret  0) {
 +   clk_unprepare(ctx-bus_clk);
 +   return ret;
 +   }
 +
 ctx-vidcon0 = pdata-vidcon0;
 ctx-vidcon1 = pdata-vidcon1;
 ctx-default_win = pdata-default_win;
 @@ -981,8 +991,8 @@ static int fimd_remove(struct platform_device *pdev)
 if (ctx-suspended)
 goto out;

 -   clk_disable(ctx-lcd_clk);
 -   clk_disable(ctx-bus_clk);
 +   clk_unprepare(ctx-lcd_clk);
 +   clk_unprepare(ctx-bus_clk);

This looks wrong again.. You still need to call clk_disable() to make
clk enabled
count zero...
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RE: [PATCH V5 0/4] cpufreq: exynos5440: support for cpufreq driver

2013-04-08 Thread Kukjin Kim
amit daniel kachhap wrote:
 
 On Fri, Apr 5, 2013 at 6:08 PM, Rafael J. Wysocki r...@sisk.pl wrote:
  On Thursday, March 28, 2013 01:35:18 PM Amit Daniel Kachhap wrote:
  Submitting the V5 version of exynos5440 cpufreq driver. This patchset
 addresses
  all the coding and design concerns raised especially by Viresh.
 
  Changes in V5:
  * Removed the unnecessary DT look up entry from mach-exynos5-dt.c.
  * Fixed all coding and comments issue raised by Viresh.
 
  Changes in V4:
  * Added dev_err logs instead of pr_err.
  * Used the devm_ioremap_resource API.
  * Implemented several coding guidelines and minor error comments from
 Sylwester,
Russell and Viresh.
 
  Changes in V3:
  * Converted the driver to probe based as suggested by Viresh. This is
 also
beneficial for multiplatform kernel.
  * Other coding guidelines related changes.
  * Moved the DT node outside cpu0 node as the driver is now a platform
driver.
 
  Changes in V2:
  * Added OPP library support to parse DT parameters.
  * Removed a hack to handle interrupts in bootup.
  * Implemented other review comments from Viresh and Inder.
 
  All these patches are dependent on Thomas Abraham common clock patches.
  (http://www.mail-archive.com/linux-samsung-
 s...@vger.kernel.org/msg15860.html)
  This whole patch series is based on 3.9-rc4.
 
  Amit Daniel Kachhap (4):
cpufreq: exynos: Add cpufreq driver for exynos5440
cpufreq: exynos: Remove error return even if no soc is found
arm: exynos: Enable OPP library support for exynos5440
arm: dts: Add cpufreq controller node for Exynos5440 SoC
 
   .../bindings/cpufreq/cpufreq-exynos5440.txt|   28 ++
   arch/arm/boot/dts/exynos5440.dtsi  |   12 +
   arch/arm/mach-exynos/Kconfig   |2 +
   drivers/cpufreq/Kconfig.arm|9 +
   drivers/cpufreq/Makefile   |1 +
   drivers/cpufreq/exynos-cpufreq.c   |2 +-
   drivers/cpufreq/exynos5440-cpufreq.c   |  474
 
   7 files changed, 527 insertions(+), 1 deletions(-)
   create mode 100644 Documentation/devicetree/bindings/cpufreq/cpufreq-
 exynos5440.txt
   create mode 100644 drivers/cpufreq/exynos5440-cpufreq.c
 
  Is this for me or the Samsung tree?
 
  If it's for me, I need ACKs from the Samsung tree maintainers.  Also,
 please
  address the Viresh's comments.
 
  Thanks,
  Rafael
 
 Hi Rafael,
 
 I submitted the V6 version with all comments from Viresh addressed.
 
 Hi Kukjin Kim,
 
 Any suggestion on how this patch should be merged. In my opinion it
 should go via Rafael's tree as this patch uses some fixes present in
 Rafael's tree like modified cpufreq_notify_transition API.
 
Yes, I agree. The v6 series including resending 1/4 patch looks good to me.
But the patch V6 4/4 would be sent to upstream via samsung tree to avoid
useless merge conflicts and I think, it's possible.

So Rafael, please take 1/4 ~ 3/4 patches in your tree with my ack.

Acked-by: Kukjin Kim kgene@samsung.com

If any problems, please let me know.

Thanks.

- Kukjin

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RE: [PATCH v3] mmc: dw_mmc: let device core setup the default pin configuration

2013-04-08 Thread Seungwon Jeon
On Friday, April 05, 2013, Thomas Abraham wrote:
 With device core now able to setup the default pin configuration,
 the pin configuration code based on the deprecated Samsung specific
 gpio bindings is removed.
 
 Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
Acked-by: Seungwon Jeon tgih@samsung.com

I hope that your another patch is merged.
 ARM: dts: add pinctrl nodes for Exynos5250 SoC
I didn't check whether it is applied.

Thanks,
Seungwon Jeon

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RE: [PATCH 9/9] ARM: dts: Add device tree node for exynos5440 TMU controller

2013-04-08 Thread Kukjin Kim
Amit Daniel Kachhap wrote:
 
 This patch adds device node for TMU controller. There are 3
 instances of the controllers so 3 nodes are created.
 
 Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
 ---
  arch/arm/boot/dts/exynos5440.dtsi |   43
 +
  1 files changed, 43 insertions(+), 0 deletions(-)
 
 diff --git a/arch/arm/boot/dts/exynos5440.dtsi
 b/arch/arm/boot/dts/exynos5440.dtsi
 index 5f3562a..b74ce9f 100644
 --- a/arch/arm/boot/dts/exynos5440.dtsi
 +++ b/arch/arm/boot/dts/exynos5440.dtsi
 @@ -16,6 +16,12 @@
 
   interrupt-parent = gic;
 
 + aliases {
 + tmuctrl0 = tmuctrl_0;
 + tmuctrl1 = tmuctrl_1;
 + tmuctrl2 = tmuctrl_2;
 + };
 +
   gic:interrupt-controller@2E {
   compatible = arm,cortex-a15-gic;
   #interrupt-cells = 3;
 @@ -156,4 +162,41 @@
   reg = 0x13 0x1000;
   interrupts = 0 17 0, 0 16 0;
   };
 +
 + tmu_ctrl_info: tmu-ctrl-info {
 + gain = 5;
 + reference-voltage = 16;
 + noise-cancel-mode = 4;
 + cal-type = 2;
 + cal-mode = 0;
 + efuse-value = 0x5b2c;
 + threshold-falling = 5;
 + };
 +
 + tmuctrl_0: tmuctrl@160118 {
 + compatible = samsung,exynos5440-tmu;
 + reg = 0x160118 0x300;
 + interrupts = 0 58 0;
 + clocks = clock 8;

Should be:
+   clocks = clock 21;

 + clock-names = tmu_apbif;
 + tmu-ctrl-data = tmu_ctrl_info;
 + };
 +
 + tmuctrl_1: tmuctrl@16011C {
 + compatible = samsung,exynos5440-tmu;
 + reg = 0x16011C 0x300;
 + interrupts = 0 58 0;
 + clocks = clock 8;

+   clocks = clock 21;

 + clock-names = tmu_apbif;
 + tmu-ctrl-data = tmu_ctrl_info;
 + };
 +
 + tmuctrl_2: tmuctrl@160120 {
 + compatible = samsung,exynos5440-tmu;
 + reg = 0x160120 0x300;
 + interrupts = 0 58 0;
 + clocks = clock 8;

+   clocks = clock 21;

 + clock-names = tmu_apbif;
 + tmu-ctrl-data = tmu_ctrl_info;
 + };
  };
 --
 1.7.1

- Kukjin

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Re: [PATCH 1/3] clk: exynos: register audio subsystem clocks using common clock framework

2013-04-08 Thread Sylwester Nawrocki
Hi,

On 04/06/2013 12:13 PM, Padma Venkat wrote:
 On Fri, Apr 5, 2013 at 7:23 PM, Sylwester Nawrocki
 s.nawro...@samsung.com wrote:
 On 04/05/2013 08:23 AM, Padmavathi Venna wrote:
 Audio subsystem is introduced in exynos platforms. This has seperate
 clock controller which can control i2s0 and pcm0 clocks. This patch
 registers the audio subsystem clocks with the common clock framework.

 Signed-off-by: Padmavathi Venna padm...@samsung.com
 ---
  drivers/clk/samsung/Makefile   |1 +
  drivers/clk/samsung/clk-exynos-audss.c |  139 
 
  2 files changed, 140 insertions(+), 0 deletions(-)
  create mode 100644 drivers/clk/samsung/clk-exynos-audss.c
[...]
 diff --git a/drivers/clk/samsung/clk-exynos-audss.c 
 b/drivers/clk/samsung/clk-exynos-audss.c
 new file mode 100644
 index 000..d7f9aa8
 --- /dev/null
 +++ b/drivers/clk/samsung/clk-exynos-audss.c
[...]
 +/* register exynos_audss clocks */
 +void __init exynos_audss_clk_init(struct device_node *np)
 +{

 Isn't it better to just do

 if (np == NULL)
 return;

 i.e. just skip the initialization altogether ? panic() seems
 unreasonable here.
 
 Ok. I will change this.
 

 + if (np) {
 + reg_base = of_iomap(np, 0);
 + if (!reg_base)
 + panic(%s: failed to map registers\n, __func__);
 + } else
 + panic(%s: unable to determine soc\n, __func__);
 +
 + clk_table = kzalloc(sizeof(struct clk *) * nr_clks, GFP_KERNEL);
 + if (!clk_table)
 + panic(could not allocate clock lookup table\n);
 +
 + clk_data.clks = clk_table;
 + clk_data.clk_num = nr_clks;
 + of_clk_add_provider(np, of_clk_src_onecell_get, clk_data);
 +
 + clk_table[mout_audss] = clk_register_mux(NULL, mout_audss,
 + mout_audss_p, ARRAY_SIZE(mout_audss_p), 0,
 + reg_base + ASS_CLK_SRC, 0, 1, 0, lock);
 + clk_register_clkdev(clk_table[mout_audss], mout_audss, NULL);
 +
 + clk_table[mout_i2s] = clk_register_mux(NULL, mout_i2s, mout_i2s_p,
 + ARRAY_SIZE(mout_i2s_p), 0,
 + reg_base + ASS_CLK_SRC, 2, 2, 0, lock);
 + clk_register_clkdev(clk_table[mout_i2s], mout_i2s, NULL);
 +
 + clk_table[dout_srp] = clk_register_divider(NULL, dout_srp,
 + mout_audss, 0, reg_base + ASS_CLK_DIV, 0, 4,
 + 0, lock);
 +
 + clk_table[dout_bus] = clk_register_divider(NULL, dout_bus,
 + dout_srp, 0, reg_base + ASS_CLK_DIV, 4, 4, 
 0,
 + lock);
 +
 + clk_table[dout_i2s] = clk_register_divider(NULL, dout_i2s,
 + mout_i2s, 0, reg_base + ASS_CLK_DIV, 8, 4, 
 0,
 + lock);
 +
 + clk_table[srp_clk] = clk_register_gate(NULL, srp_clk, dout_srp,
 + CLK_SET_RATE_PARENT, reg_base + ASS_CLK_GATE, 
 0,
 + 0, lock);
 +
 + clk_table[i2s_bus] = clk_register_gate(NULL, i2s_bus, dout_bus,
 + CLK_SET_RATE_PARENT, reg_base + ASS_CLK_GATE, 
 2,

 Don't we need to handle also bit 3 of the ASS_CLK_GATE register ?
 
 Bit 3 is handled below as sclk_i2s0.

Oops, sorry, my fault.

 In some kernels I saw PCM special/PCM Bus and I2S special/I2S Bus bits
 associated with same clocks. So there were 2-bit wide masks for each clock.

 Tomasz had an idea to add a flag to the clock framework that would be passed
 to clk_register_gate() and would indicate that the sixth argument is a 
 bitmask,
 rather than a bit index.
 
 For I2S there are separate clock instances and bits in the clock
 controller named as busclk[bit:2] and i2s_clk[bit:3].

Indeed.

 But PCM case there are two bits available[bit 4 and 5] but I think
 only one clock instance available(need to check
 clk controller diagram). But anyway having the bitmask in the
 clk_register_gate may be useful.

Yes, from the diagram there seems to be only one clock (SCLK_PCM0) but there 
are 2 in the clock gate register (PCM Special, PCM bus). I guess it's best to
describe those as 2 clocks, and handle them in the driver this way. Instead 
of merging presumably two separate physical clocks in a single clock object.

I suppose PCM Special (SCLK_PCMx) is only shown on the Audio Subsystem
diagrams, since it's mostly related to the sound data flow. And the PCM bus
is the PCM IP block bus clock, which is important for inter-working of the
PCM bus with rest of the system.

One option would be to provide a dummy clock for the second PCM clock, for 
systems where it is not available. So the driver always handles two clocks.

 Perhaps we could just specify each bit of ASS_CLK_GATE as a separate clock.
 Then the drivers would need to be modified. I'm not sure what's best 
 approach.
 And if it is really necessary to be enabling/disabling both special/bus clock
 gate bits 

[PATCH v3] of/pci: Provide support for parsing PCI DT ranges property

2013-04-08 Thread Andrew Murray
This patch factors out common implementation patterns to reduce overall kernel
code and provide a means for host bridge drivers to directly obtain struct
resources from the DT's ranges property without relying on architecture specific
DT handling. This will make it easier to write archiecture independent host 
bridge
drivers and mitigate against further duplication of DT parsing code.

This patch can be used in the following way:

struct of_pci_range_parser parser;
struct of_pci_range range;

if (of_pci_range_parser(parser, np))
; //no ranges property

for_each_of_pci_range(parser, range) {

/*
directly access properties of the address range, e.g.:
range.pci_space, range.pci_addr, range.cpu_addr,
range.size, range.flags

alternatively obtain a struct resource, e.g.:
struct resource res;
of_pci_range_to_resource(range, np, res);
*/
}

Additionally the implementation takes care of adjacent ranges and merges them
into a single range (as was the case with powerpc and microblaze).

The modifications to microblaze, mips and powerpc have not been tested.

Signed-off-by: Andrew Murray andrew.mur...@arm.com
Signed-off-by: Liviu Dudau liviu.du...@arm.com
Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
---
Compared to the v3 sent by Andrew Murray, the following changes have
been made:

 * Unify and move duplicate pci_process_bridge_OF_ranges functions to
   drivers/of/of_pci.c as suggested by Rob Herring

 * Fix potential build errors with Microblaze/MIPS

Compared to [PATCH v5 01/17] of/pci: Provide support for parsing PCI DT
ranges property, the following changes have been made:

 * Correct use of IORESOURCE_* as suggested by Russell King

 * Improved interface and naming as suggested by Thierry Reding

Compared to the v2 sent by Andrew Murray, Thomas Petazzoni did:

 * Add a memset() on the struct of_pci_range_iter when starting the
   for loop in for_each_pci_range(). Otherwise, with an uninitialized
   of_pci_range_iter, of_pci_process_ranges() may crash.

 * Add parenthesis around 'res', 'np' and 'iter' in the
   for_each_of_pci_range macro definitions. Otherwise, passing
   something like foobar as 'res' didn't work.

 * Rebased on top of 3.9-rc2, which required fixing a few conflicts in
   the Microblaze code.

v2:
  This follows on from suggestions made by Grant Likely
  (marc.info/?l=linux-kernelm=136079602806328)
---
 arch/microblaze/include/asm/pci-bridge.h |5 +-
 arch/microblaze/pci/pci-common.c |  192 --
 arch/mips/pci/pci.c  |   50 +++--
 arch/powerpc/include/asm/pci-bridge.h|5 +-
 arch/powerpc/kernel/pci-common.c |  192 --
 drivers/of/address.c |   63 ++
 drivers/of/of_pci.c  |  168 ++
 include/linux/of_address.h   |   42 +++
 include/linux/of_pci.h   |3 +
 9 files changed, 294 insertions(+), 426 deletions(-)

diff --git a/arch/microblaze/include/asm/pci-bridge.h 
b/arch/microblaze/include/asm/pci-bridge.h
index cb5d397..5783cd6 100644
--- a/arch/microblaze/include/asm/pci-bridge.h
+++ b/arch/microblaze/include/asm/pci-bridge.h
@@ -10,6 +10,7 @@
 #include linux/pci.h
 #include linux/list.h
 #include linux/ioport.h
+#include linux/of_pci.h
 
 struct device_node;
 
@@ -132,10 +133,6 @@ extern void setup_indirect_pci(struct pci_controller *hose,
 extern struct pci_controller *pci_find_hose_for_OF_device(
struct device_node *node);
 
-/* Fill up host controller resources from the OF node */
-extern void pci_process_bridge_OF_ranges(struct pci_controller *hose,
-   struct device_node *dev, int primary);
-
 /* Allocate  free a PCI host bridge structure */
 extern struct pci_controller *pcibios_alloc_controller(struct device_node 
*dev);
 extern void pcibios_free_controller(struct pci_controller *phb);
diff --git a/arch/microblaze/pci/pci-common.c b/arch/microblaze/pci/pci-common.c
index 9ea521e..2735ad9 100644
--- a/arch/microblaze/pci/pci-common.c
+++ b/arch/microblaze/pci/pci-common.c
@@ -622,198 +622,6 @@ void pci_resource_to_user(const struct pci_dev *dev, int 
bar,
*end = rsrc-end - offset;
 }
 
-/**
- * pci_process_bridge_OF_ranges - Parse PCI bridge resources from device tree
- * @hose: newly allocated pci_controller to be setup
- * @dev: device node of the host bridge
- * @primary: set if primary bus (32 bits only, soon to be deprecated)
- *
- * This function will parse the ranges property of a PCI host bridge device
- * node and setup the resource mapping of a pci controller based on its
- * content.
- *
- * Life would be boring if it wasn't for a few issues that we have to deal
- * with 

[PATCH] ARM: EXYNOS: remove config EXYNOS_DEV_DRM

2013-04-08 Thread Paul Bolle
The only user of Kconfig symbol EXYNOS_DEV_DRM was removed in commit
0a9d5ac307aefbb2c772537d3fe7f75046d563ac (ARM: EXYNOS: removing
exynos-drm device registration from non-dt platforms). It is safe to
remove this symbol too.

Signed-off-by: Paul Bolle pebo...@tiscali.nl
---
Only git grep tested.

 arch/arm/mach-exynos/Kconfig | 10 --
 1 file changed, 10 deletions(-)

diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 70f94c8..99e7142 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -95,11 +95,6 @@ config EXYNOS4_DEV_AHCI
help
  Compile in platform device definitions for AHCI
 
-config EXYNOS_DEV_DRM
-   bool
-   help
- Compile in platform device definitions for core DRM device
-
 config EXYNOS4_SETUP_FIMD0
bool
help
@@ -199,7 +194,6 @@ config MACH_SMDKV310
select EXYNOS4_SETUP_SDHCI
select EXYNOS4_SETUP_USB_PHY
select EXYNOS_DEV_DMA
-   select EXYNOS_DEV_DRM
select EXYNOS_DEV_SYSMMU
select S3C24XX_PWM
select S3C_DEV_HSMMC
@@ -253,7 +247,6 @@ config MACH_UNIVERSAL_C210
select EXYNOS4_SETUP_SDHCI
select EXYNOS4_SETUP_USB_PHY
select EXYNOS_DEV_DMA
-   select EXYNOS_DEV_DRM
select EXYNOS_DEV_SYSMMU
select HAVE_SCHED_CLOCK
select S3C_DEV_HSMMC
@@ -294,7 +287,6 @@ config MACH_NURI
select EXYNOS4_SETUP_SDHCI
select EXYNOS4_SETUP_USB_PHY
select EXYNOS_DEV_DMA
-   select EXYNOS_DEV_DRM
select S3C_DEV_HSMMC
select S3C_DEV_HSMMC2
select S3C_DEV_HSMMC3
@@ -330,7 +322,6 @@ config MACH_ORIGEN
select EXYNOS4_SETUP_SDHCI
select EXYNOS4_SETUP_USB_PHY
select EXYNOS_DEV_DMA
-   select EXYNOS_DEV_DRM
select EXYNOS_DEV_SYSMMU
select S3C24XX_PWM
select S3C_DEV_HSMMC
@@ -366,7 +357,6 @@ config MACH_SMDK4212
select EXYNOS4_SETUP_SDHCI
select EXYNOS4_SETUP_USB_PHY
select EXYNOS_DEV_DMA
-   select EXYNOS_DEV_DRM
select EXYNOS_DEV_SYSMMU
select S3C24XX_PWM
select S3C_DEV_HSMMC2
-- 
1.7.11.7

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Re: [PATCH] ARM: Samsung: Select ARM_CPU_SUSPEND when required

2013-04-08 Thread Sylwester Nawrocki
On 04/08/2013 01:00 PM, Russell King - ARM Linux wrote:
 On Mon, Apr 08, 2013 at 12:27:34PM +0200, Sylwester Nawrocki wrote:
 On 04/08/2013 11:57 AM, Kukjin Kim wrote:
[...]
 
 Sigh.  This stuff looks rather screwed up now:
 
 $ grep -B1 'ENTRY.*do_suspend' arch/arm/mm/proc*.S
 arch/arm/mm/proc-arm920.S-#ifdef CONFIG_PM_SLEEP
 arch/arm/mm/proc-arm920.S:ENTRY(cpu_arm920_do_suspend)
 --
 arch/arm/mm/proc-arm926.S-#ifdef CONFIG_PM_SLEEP
 arch/arm/mm/proc-arm926.S:ENTRY(cpu_arm926_do_suspend)
 --
 arch/arm/mm/proc-mohawk.S-#ifdef CONFIG_PM_SLEEP
 arch/arm/mm/proc-mohawk.S:ENTRY(cpu_mohawk_do_suspend)
 --
 arch/arm/mm/proc-sa1100.S-#ifdef CONFIG_PM_SLEEP
 arch/arm/mm/proc-sa1100.S:ENTRY(cpu_sa1100_do_suspend)
 --
 arch/arm/mm/proc-v6.S-#ifdef CONFIG_PM_SLEEP
 arch/arm/mm/proc-v6.S:ENTRY(cpu_v6_do_suspend)
 --
 arch/arm/mm/proc-v7.S-#ifdef CONFIG_ARM_CPU_SUSPEND
 arch/arm/mm/proc-v7.S:ENTRY(cpu_v7_do_suspend)
 --
 arch/arm/mm/proc-xsc3.S-#ifdef CONFIG_PM_SLEEP
 arch/arm/mm/proc-xsc3.S:ENTRY(cpu_xsc3_do_suspend)
 --
 arch/arm/mm/proc-xscale.S-#ifdef CONFIG_PM_SLEEP
 arch/arm/mm/proc-xscale.S:ENTRY(cpu_xscale_do_suspend)
 
 Now, CONFIG_PM_SLEEP is fine if this stuff only ever gets used when PM_SLEEP
 is enabled - that's what it was designed for in the first place.  However,
 as we can see from the earlier patches in this thread, the cpu_suspend
 stuff is being selected when PM is enabled (which is arguably wrong), and

Yes, presumably this needs to be cleaned up. I was considering replacing
CONFIG_PM with CONFIG_PM_SLEEP, but that might involve some not trivial
changes. I'm going to have a look at it eventually.

 also in some cases when CPU_IDLE is enabled.
 
 Therefore, making this code depend on ARM_CPU_SUSPEND seems sensible.
 However, So, how did proc-v7.S and only that file end up doing something
 different?
 
 commit 15e0d9e37c7fe9711b60f47221c394d45553ad8c
 Author: Arnd Bergmann a...@arndb.de
 Date:   Sat Oct 1 21:09:39 2011 +0200
 
 ARM: pm: let platforms select cpu_suspend support
 
 Support for the cpu_suspend functions is only built-in
 when CONFIG_PM_SLEEP is enabled, but omap3/4, exynos4
 and pxa always call cpu_suspend when CONFIG_PM is enabled.
 
 Signed-off-by: Arnd Bergmann a...@arndb.de
 
 ...
 diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
 index a30e785..591accd 100644
 --- a/arch/arm/mm/proc-v7.S
 +++ b/arch/arm/mm/proc-v7.S
 @@ -217,7 +217,7 @@ ENDPROC(cpu_v7_set_pte_ext)
  /* Suspend/resume support: derived from arch/arm/mach-s5pv210/sleep.S */
  .globl cpu_v7_suspend_size
  .equ   cpu_v7_suspend_size, 4 * 9
 -#ifdef CONFIG_PM_SLEEP
 +#ifdef CONFIG_ARM_CPU_SUSPEND
  ENTRY(cpu_v7_do_suspend)
 ...
 
 As far as this commit goes, it looks sane at the time that it was written,
 but as soon as we have *any* other selections of ARM_CPU_SUSPEND, the
 whole idea becomes extremely fragile - hence the reason for your build
 errors.
 
 Moreover, with the above commit, there is _no_ sense what so ever in not
 applying the same change to all proc-*.S files, thereby entirely avoiding
 this fragility.  I would argue that the original commit should have made
 the same change to _all_ proc-*.S files.
 
 Let's do the job properly - hence this is now queued for -rc:

Thanks, that seems a most reasonable fix. I was considering something like
that, just was afraid a bit to do this wide change and that it might cause
some other issues. Anyway that looks fine.

 8===
 From: Russell King rmk+ker...@arm.linux.org.uk
 Subject: [PATCH] ARM: Do 15e0d9e37c (ARM: pm: let platforms select 
 cpu_suspend support) properly
 
 Let's do the changes properly and fix the same problem everywhere, not
 just for one case.
 
 Cc: sta...@vger.kernel.org # kernels containing 15e0d9e37c7fe or equivalent
 Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
 ---
  arch/arm/mm/proc-arm920.S |2 +-
  arch/arm/mm/proc-arm926.S |2 +-
  arch/arm/mm/proc-mohawk.S |2 +-
  arch/arm/mm/proc-sa1100.S |2 +-
  arch/arm/mm/proc-v6.S |2 +-
  arch/arm/mm/proc-xsc3.S   |2 +-
  arch/arm/mm/proc-xscale.S |2 +-
  7 files changed, 7 insertions(+), 7 deletions(-)
 
 diff --git a/arch/arm/mm/proc-arm920.S b/arch/arm/mm/proc-arm920.S
 index 2c3b942..2556cf1 100644
 --- a/arch/arm/mm/proc-arm920.S
 +++ b/arch/arm/mm/proc-arm920.S
 @@ -387,7 +387,7 @@ ENTRY(cpu_arm920_set_pte_ext)
  /* Suspend/resume support: taken from arch/arm/plat-s3c24xx/sleep.S */
  .globl   cpu_arm920_suspend_size
  .equ cpu_arm920_suspend_size, 4 * 3
 -#ifdef CONFIG_PM_SLEEP
 +#ifdef CONFIG_ARM_CPU_SUSPEND
  ENTRY(cpu_arm920_do_suspend)
   stmfd   sp!, {r4 - r6, lr}
   mrc p15, 0, r4, c13, c0, 0  @ PID
[...]
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Re: [PATCH v3] mmc: dw_mmc: let device core setup the default pin configuration

2013-04-08 Thread Doug Anderson
Thomas,

Since I commented on previous versions of this patch, I would have
loved to have been CCed on this new version.  ;)

On Fri, Apr 5, 2013 at 6:53 AM, Thomas Abraham
thomas.abra...@linaro.org wrote:
 With device core now able to setup the default pin configuration,
 the pin configuration code based on the deprecated Samsung specific
 gpio bindings is removed.

 Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
 ---
 Changes since v2:
 - Changed patch subject from mmc: dwmmc: let... to mmc: dw_mmc: let...
 - Rebased to Chris's latest mmc-next branch.

  drivers/mmc/host/dw_mmc-exynos.c |   38 
 --
  drivers/mmc/host/dw_mmc.c|   12 ++--
  drivers/mmc/host/dw_mmc.h|3 ---
  3 files changed, 2 insertions(+), 51 deletions(-)

This patch applies fine but fails to compile on linux-next
next-20130408.  You lost the race with:
   f2f942c mmc: dw_mmc: Check return value of regulator_enable

...that patch adds a goto err_setup_bus and you've renamed that
label.  I guess you get another fun rebase.

NOTE: this patch is even more urgent than it was before.  It looks
like pincontrol stuff has now landed in linux-next which means that
Exynos5 devices that need eMMC/SD will no longer boot until this patch
goes in.

-Doug
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Re: GENERIC_GPIO considered deprecated

2013-04-08 Thread Stephen Warren
On 04/08/2013 01:31 AM, Kukjin Kim wrote:
 Alexandre Courbot wrote:

 On Wed, Apr 3, 2013 at 5:35 PM, Kukjin Kim kgene@samsung.com wrote:
 could you amend the patches that adds them such as they get changed
 into select ARCH_REQUIRE_GPIOLIB instead? You can grep for select

 I can do it for my tree but the branch already included in arm-soc tree
 so I think, it should be fixed with another patch. And

 GENERIC_GPIO in arch/arm to find the offending lines. We are removing
 GENERIC_GPIO and this work cannot be merged until you do this since it
 would break ARM builds. Thanks!

 So how about following? If you are OK, let me take into samsung tree.

 88
 From: Kukjin Kim kgene@samsung.com
 Subject: [PATCH] ARM: SAMSUNG: change GENERIC_GPIO to
 ARCH_REQUIRE_GPIOLIB

 When I applied regarding samsung-time patches, the select GENERIC_GPIO
 has been added wrong, so this patch fixes that.
 And since the GENERIC_GPIO in arch/arm/ will be gone away, this adds
 ARCH_REQUIRE_GPIOLIB for S3C24XX and S5PC100 instead.

 Reported-by: Alexandre Courbot gnu...@gmail.com
 Cc: Romain Naour romain.na...@openwide.fr
 Signed-off-by: Kukjin Kim kgene@samsung.com
 ---
  arch/arm/Kconfig |4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)

 diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
 index 46fcfa8..a239c7e 100644
 --- a/arch/arm/Kconfig
 +++ b/arch/arm/Kconfig
 @@ -770,10 +770,10 @@ config ARCH_SA1100
  config ARCH_S3C24XX
 bool Samsung S3C24XX SoCs
 select ARCH_HAS_CPUFREQ
 +   select ARCH_REQUIRE_GPIOLIB
 select CLKDEV_LOOKUP
 select CLKSRC_MMIO
 select GENERIC_CLOCKEVENTS
 -   select GENERIC_GPIO
 select HAVE_CLK
 select HAVE_S3C2410_I2C if I2C
 select HAVE_S3C2410_WATCHDOG if WATCHDOG
 @@ -828,11 +828,11 @@ config ARCH_S5P64X0

  config ARCH_S5PC100
 bool Samsung S5PC100
 +   select ARCH_REQUIRE_GPIOLIB
 select CLKDEV_LOOKUP
 select CLKSRC_MMIO
 select CPU_V7
 select GENERIC_CLOCKEVENTS
 -   select GENERIC_GPIO
 select HAVE_CLK
 select HAVE_S3C2410_I2C if I2C
 select HAVE_S3C2410_WATCHDOG if WATCHDOG
 --
 1.7.10.4

 Should do the trick, if we can make sure that your tree is merged
 prior to my patches.
 
 I'm not sure but I think, arm-soc tree should be merged into mainline before 
 others...
 
 Can you put it into your tree for 3.10?

 I did, so it should be fine.
 
 Thanks.
 
 - Kukjin

You may want to discuss how to handle this dependency with the arm-soc
maintainers (CC'd).
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[PATCH] ARM: dts: fix bad merge of display timing node to exynos5250-smdk5250.dts

2013-04-08 Thread Doug Anderson
The display timing node was added:
  7ed2077 ARM: dts: Add display timing node to exynos5250-smdk5250.dts
...and looks OK there.  ...but it looks like we lost a }; in the
merge and it no longer compiles.  Fix it.

Signed-off-by: Doug Anderson diand...@chromium.org
---
 arch/arm/boot/dts/exynos5250-smdk5250.dts | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts 
b/arch/arm/boot/dts/exynos5250-smdk5250.dts
index 4be14df..26d856b 100644
--- a/arch/arm/boot/dts/exynos5250-smdk5250.dts
+++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
@@ -239,6 +239,7 @@
vback-porch = 4;
vfront-porch = 4;
vsync-len = 4;
+   };
};
 
fixed-rate-clocks {
-- 
1.8.1.3

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Re: [PATCH v4 04/14] mfd: Add Samsung PWM/timer master driver

2013-04-08 Thread Tomasz Figa
On Saturday 06 of April 2013 00:24:18 Tomasz Figa wrote:
 On Friday 05 of April 2013 21:54:21 Arnd Bergmann wrote:
  On Friday 05 April 2013, Tomasz Figa wrote:
I don't think anyone ever suggested using a private API though.
   
   I must have gotten the last paragraph of
   http://article.gmane.org/gmane.linux.kernel.samsung-soc/16638
   wrong then. For me it seemed like the timer driver would expose a
   private API to the PWM driver.
  
  Yes, sorry I wasn't clear enough. I meant a register-level interface
  exposed from the base driver, not a high-level interface like you
  did.
 
 I'm not sure what you mean by a register-level interface. Something like
 samsung_pwm_update_reg(reg, mask, val), which modifies bitfields
 according to the mask and value with appropriate synchronization? If
 yes, this solves only the problem of access to shared registers.
 
 The other problems that remain:
 
 - negotiation of PWM channels to use for clock source and clock events,
   because each board can use different channels for PWM outputs,
 
 - code duplication caused by both of the drivers doing mostly the same
   things and or having to parse the same data from device tree,
 
 - both non-DT and DT platforms must be supported,
 
 - how to keep the ability to load PWM driver as a module (or not load it
 at all when PWM is not used on particular board), while retaining
 everything that is needed for the clocksource driver in kernel,
 
 - some platforms can't use PWM timers as system clocksources, while on
   others this is the only timekeeping hardware available.
 

Hmm. Does anybody have an idea of a better way of implementing this PWM 
timer support, which solves the above problems?

This series is a dependency for moving Universal C210 board to DT-based 
description and it's already almost out of time to get this included for 
3.10...

Best regards,
Tomasz

I think
it's ok if the driver lives in drivers/mfd when it doesn't fit
anywhere
else easily, but you should really register it to the pwm
subsystem
to
expose that functionality, not export functions that can be used
by
a pwm shim driver, which even seems to be missing from the series.
   
   Anyway, using PWM API in a clocksource driver that needs to be
   running
   very early (before any initcalls get called) seems a bit weird for
   me, especially when PWM API doesn't provide such fine grained
   control
   over PWM timers that is required in the clocksource drivers.
  
  Exactly, that's why you should have a regular PWM driver that gets
  loaded at a convenient time and just uses an interface exported by the
  base driver to access the common registers.
 
 Well, this is basically what my patches do, except that the PWM driver
 isn't reworked to use the base driver yet.
 
 The private API exported to the samsung-time and pwm-samsung drivers
 isn't maybe the most fortunate one, but it clearly has the advantage of
 solving all the problems I mentioned before.
 
 Same goes for calling this an MFD driver. It doesn't even use the MFD
 core, but there seems to be no better place to put it. Maybe
 drivers/platform/arm would be better, if it existed, just as currently
 available drivers/platform/x86?
 
 Best regards,
 Tomasz
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Re: [PATCH 6/6] ARM: dts: Add pcie controller node for Samsung EXYNOS5440 SoC

2013-04-08 Thread Jason Gunthorpe
On Mon, Apr 08, 2013 at 06:08:53PM +0900, Jingoo Han wrote:

 I have a question.  Now, I am reviewing the Tegra PCIe, Marvell PCIe
 patchset.  However, in the case of Exynos PCIe, 'downstream I/O' and
 'non-prefetchable memory' are different between PCIe0 and PCIe1.
 These regions are not shared.
 
 PCIe0:
   ranges = 0x0800 0 0x4000 0x4000 0 0x0020   /* 
 configuration space */
 0x8100 0 0  0x4020 0 0x4000   /* 
 downstream I/O */
 0x8200 0 0  0x40204000 0 0x1000; /* 
 non-prefetchable memory */
 
 PCIe1:
   ranges = 0x0800 0 0x4000 0x4000 0 0x0020   /* 
 configuration space */
 0x8100 0 0  0x4020 0 0x4000   /* 
 downstream I/O */
 0x8200 0 0  0x40204000 0 0x1000; /* 
 non-prefetchable memory */
 
 PCIe0 uses 0x4000~0x5fff, PCI1 uses 0x6000~0x7fff.
 
 How can I handle this? :)

You need to dig into where this range restriction comes from, and how
it interacts with the PCI-E root bridge's window registers. Is there
another set of registers that control this? Is it hardwired into the
silicon? Do the root port window registers control this? 

I'm looking at functions like exynos_pcie_prog_viewport_mem_outbound
and wondering if the driver already controls this window.. But it
looks like there may be some restrictions.

Marvell also has unshared regions, but the driver arranges for those
ranges to be setup dynamically based on writes to the bridge's window
registers from the Linux PCI core, so the region is always in sync
with what the Linux PCI core is trying to do.

The desired perfect outcome is to have a single logical 'shared'
region for memory and I/O - give that region to the PCI core via
struct resources, then the PCI core tells the driver and HW what
portion of that region belongs to each root port via a write to the
root port bridge's window registers. The net result is still
non-overlapping regions, but the allocation of space between port 0
and port 1 is performed at run time.

I don't really know enough about your hardware to give you better
advice, sorry. The general guidance to try and follow the PCI-E spec
for a root complex is good, but if the HW can't do it, or it would
make the driver too complex, then one PCI domain per port will always
work (this is similar to your original driver, but with domains).

The main advantage to following the PCI-E specs and allowing for
dynamic allocation of address space is that it lets you reserve less
address space for PCI-E, and this in turn gives you more low mem
address space to use for DRAM.

 The following is right?
 
 +   pcie-controller {
   .
 +   ranges = 0x8200 0 0x4000 0x4000 0 0x0020   
 /* port 0 registers */
 + 0x8200 0 0x6000 0x6000 0 0x0020   
 /* port 1 registers */
 + 0x8100 0 0  0x4020 0 0x4000   
 /* port 0 downstream I/O */
 + 0x8100 0 0  0x6020 0 0x4000   
 /* port 1 downstream I/O */
 + 0x8200 0 0x40204000 0x40204000 0 0x1000; 
 /* port 0 non-prefetchable memory */
 + 0x8200 0 0x40204000 0x60204000 0 0x1000; 
 /* port 1 non-prefetchable memory */


 +
 +   pci@1,0 {
 +   device_type = pci;
 +   assigned-addresses = 0x82000800 0 0x4000 0 
 0x0020
 + 0x81000800 0 0x4020 0 
 0x4000
 + 0x81000800 0 0x40204000 0 
 0x1000;

Would be:

   ranges = 0x81000800 0 0x4020  0x81000800 0 
0x4020  0 0x4000
 0x81000800 0 0x40204000  0x81000800 0 
0x40204000  0 0x1000;
   assigned-addresses = 0x82000800 0 0x4000  0 
0x0020;

Jason
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[PATCH] ARM: dts: Disable the RTC by default on exynos5

2013-04-08 Thread Doug Anderson
This change makes the rtc on the exynos5250 and 5440 disabled by
default to match exynos4.

Ever since the common clock framework came in came in, exynos5250
boards have dumped lots of warnings in the boot log.  It turns out
that we don't see those on exynos4 since the rtc is disabled by
default.  While we need to get to the bottom of the problems with the
RTC, it still makes sense to have the default state of the RTC on
exynos boards match.

For the record, warnings look like this:
  [ cut here ]
  WARNING: at /.../drivers/clk/clk.c:771 __clk_enable+0x34/0xb0()
  Modules linked in:
  [80015bfc] (unwind_backtrace+0x0/0xec) from [804717f0] 
(dump_stack+0x20/0x24)
  [804717f0] (dump_stack+0x20/0x24) from [80023cd0] 
(warn_slowpath_common+0x5c/0x7c)
  [80023cd0] (warn_slowpath_common+0x5c/0x7c) from [80023d1c] 
(warn_slowpath_null+0x2c/0x34)
  [80023d1c] (warn_slowpath_null+0x2c/0x34) from [8035ddb0] 
(__clk_enable+0x34/0xb0)
  [8035ddb0] (__clk_enable+0x34/0xb0) from [8035de54] (clk_enable+0x28/0x3c)
  [8035de54] (clk_enable+0x28/0x3c) from [8031a160] 
(s3c_rtc_probe+0xf4/0x434)
  [8031a160] (s3c_rtc_probe+0xf4/0x434) from [8028e288] 
(platform_drv_probe+0x24/0x28)
  [8028e288] (platform_drv_probe+0x24/0x28) from [8028ce10] 
(driver_probe_device+0xbc/0x22c)
  [8028ce10] (driver_probe_device+0xbc/0x22c) from [8028cff8] 
(__driver_attach+0x78/0x9c)
  [8028cff8] (__driver_attach+0x78/0x9c) from [8028bdfc] 
(bus_for_each_dev+0x64/0xac)
  [8028bdfc] (bus_for_each_dev+0x64/0xac) from [8028c7e0] 
(driver_attach+0x28/0x30)
  [8028c7e0] (driver_attach+0x28/0x30) from [8028c43c] 
(bus_add_driver+0xe0/0x234)
  [8028c43c] (bus_add_driver+0xe0/0x234) from [8028d55c] 
(driver_register+0xac/0x13c)
  [8028d55c] (driver_register+0xac/0x13c) from [8028e4f4] 
(platform_driver_register+0x54/0x68)
  [8028e4f4] (platform_driver_register+0x54/0x68) from [8065c944] 
(s3c_rtc_driver_init+0x14/0x1c)
  [8065c944] (s3c_rtc_driver_init+0x14/0x1c) from [800086d8] 
(do_one_initcall+0x60/0x138)
  [800086d8] (do_one_initcall+0x60/0x138) from [80633a8c] 
(kernel_init_freeable+0x108/0x1d0)
  [80633a8c] (kernel_init_freeable+0x108/0x1d0) from [8046d2f8] 
(kernel_init+0x1c/0xf4)
  [8046d2f8] (kernel_init+0x1c/0xf4) from [8000e358] 
(ret_from_fork+0x14/0x20)
  ---[ end trace 4bcdc801c868d73f ]---

Signed-off-by: Doug Anderson diand...@chromium.org
---
 arch/arm/boot/dts/exynos5250.dtsi | 1 +
 arch/arm/boot/dts/exynos5440.dtsi | 1 +
 2 files changed, 2 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5250.dtsi 
b/arch/arm/boot/dts/exynos5250.dtsi
index dc55e33..892b724 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -183,6 +183,7 @@
interrupts = 0 43 0, 0 44 0;
clocks = clock 337;
clock-names = rtc;
+   status = disabled;
};
 
tmu@1006 {
diff --git a/arch/arm/boot/dts/exynos5440.dtsi 
b/arch/arm/boot/dts/exynos5440.dtsi
index 25c6134..a8ceef4 100644
--- a/arch/arm/boot/dts/exynos5440.dtsi
+++ b/arch/arm/boot/dts/exynos5440.dtsi
@@ -181,5 +181,6 @@
interrupts = 0 17 0, 0 16 0;
clocks = clock 21;
clock-names = rtc;
+   status = disabled;
};
 };
-- 
1.8.1.3

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Re: [PATCH v3] of/pci: Provide support for parsing PCI DT ranges property

2013-04-08 Thread Rob Herring
Adding PPC and Microblaze maintainers.

On 04/08/2013 09:33 AM, Andrew Murray wrote:
 This patch factors out common implementation patterns to reduce overall kernel
 code and provide a means for host bridge drivers to directly obtain struct
 resources from the DT's ranges property without relying on architecture 
 specific
 DT handling. This will make it easier to write archiecture independent host 
 bridge
 drivers and mitigate against further duplication of DT parsing code.
 
 This patch can be used in the following way:
 
   struct of_pci_range_parser parser;
   struct of_pci_range range;
 
   if (of_pci_range_parser(parser, np))
   ; //no ranges property
 
   for_each_of_pci_range(parser, range) {
 
   /*
   directly access properties of the address range, e.g.:
   range.pci_space, range.pci_addr, range.cpu_addr,
   range.size, range.flags
 
   alternatively obtain a struct resource, e.g.:
   struct resource res;
   of_pci_range_to_resource(range, np, res);
   */
   }
 
 Additionally the implementation takes care of adjacent ranges and merges them
 into a single range (as was the case with powerpc and microblaze).
 
 The modifications to microblaze, mips and powerpc have not been tested.
 
 Signed-off-by: Andrew Murray andrew.mur...@arm.com
 Signed-off-by: Liviu Dudau liviu.du...@arm.com
 Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
 ---
 Compared to the v3 sent by Andrew Murray, the following changes have
 been made:
 
  * Unify and move duplicate pci_process_bridge_OF_ranges functions to
drivers/of/of_pci.c as suggested by Rob Herring

This part should really be a separate patch with just the move and
should have acks from PPC and Microblaze maintainers.

Otherwise it looks okay to me.

Rob

  * Fix potential build errors with Microblaze/MIPS
 
 Compared to [PATCH v5 01/17] of/pci: Provide support for parsing PCI DT
 ranges property, the following changes have been made:
 
  * Correct use of IORESOURCE_* as suggested by Russell King
 
  * Improved interface and naming as suggested by Thierry Reding
 
 Compared to the v2 sent by Andrew Murray, Thomas Petazzoni did:
 
  * Add a memset() on the struct of_pci_range_iter when starting the
for loop in for_each_pci_range(). Otherwise, with an uninitialized
of_pci_range_iter, of_pci_process_ranges() may crash.
 
  * Add parenthesis around 'res', 'np' and 'iter' in the
for_each_of_pci_range macro definitions. Otherwise, passing
something like foobar as 'res' didn't work.
 
  * Rebased on top of 3.9-rc2, which required fixing a few conflicts in
the Microblaze code.
 
 v2:
   This follows on from suggestions made by Grant Likely
   (marc.info/?l=linux-kernelm=136079602806328)
 ---
  arch/microblaze/include/asm/pci-bridge.h |5 +-
  arch/microblaze/pci/pci-common.c |  192 
 --
  arch/mips/pci/pci.c  |   50 +++--
  arch/powerpc/include/asm/pci-bridge.h|5 +-
  arch/powerpc/kernel/pci-common.c |  192 
 --
  drivers/of/address.c |   63 ++
  drivers/of/of_pci.c  |  168 ++
  include/linux/of_address.h   |   42 +++
  include/linux/of_pci.h   |3 +
  9 files changed, 294 insertions(+), 426 deletions(-)
 
 diff --git a/arch/microblaze/include/asm/pci-bridge.h 
 b/arch/microblaze/include/asm/pci-bridge.h
 index cb5d397..5783cd6 100644
 --- a/arch/microblaze/include/asm/pci-bridge.h
 +++ b/arch/microblaze/include/asm/pci-bridge.h
 @@ -10,6 +10,7 @@
  #include linux/pci.h
  #include linux/list.h
  #include linux/ioport.h
 +#include linux/of_pci.h
  
  struct device_node;
  
 @@ -132,10 +133,6 @@ extern void setup_indirect_pci(struct pci_controller 
 *hose,
  extern struct pci_controller *pci_find_hose_for_OF_device(
   struct device_node *node);
  
 -/* Fill up host controller resources from the OF node */
 -extern void pci_process_bridge_OF_ranges(struct pci_controller *hose,
 - struct device_node *dev, int primary);
 -
  /* Allocate  free a PCI host bridge structure */
  extern struct pci_controller *pcibios_alloc_controller(struct device_node 
 *dev);
  extern void pcibios_free_controller(struct pci_controller *phb);
 diff --git a/arch/microblaze/pci/pci-common.c 
 b/arch/microblaze/pci/pci-common.c
 index 9ea521e..2735ad9 100644
 --- a/arch/microblaze/pci/pci-common.c
 +++ b/arch/microblaze/pci/pci-common.c
 @@ -622,198 +622,6 @@ void pci_resource_to_user(const struct pci_dev *dev, 
 int bar,
   *end = rsrc-end - offset;
  }
  
 -/**
 - * pci_process_bridge_OF_ranges - Parse PCI bridge resources from device tree
 - * @hose: newly allocated pci_controller to be setup
 - * @dev: device node of the 

[GIT PULL 0/10] Samsung stuff for v3.10

2013-04-08 Thread Kukjin Kim

Hi Arnd, Olof

This is 2nd pull-request for Samsung stuff for v3.10.

If any problems, please kindly let me know.


--
Thanks.

Best regards,
Kgene.
--
Kukjin Kim kgene@samsung.com, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.



The following changes since commit 347394370cbd68ab440564357eaf3d0a5b8bddeb:

  Merge branch 'next/pinctrl-exynos-1' into for-next-next (2013-04-09 
01:07:43 +0900)


are available in the git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git 
for-next


Abhilash Kesavan (1):
  ARM: dts: Add max77686 device tree support for CROS5250

Alexander Graf (2):
  ARM: dts: Declare the gic as a15 compatible for exynos5250
  ARM: dts: Add architected timer nodes for exynos5250

Alexander Shiyan (3):
  ARM: S3C24XX: Removed unneeded dependency on ARCH_S3C24XX for boards
  ARM: S3C24XX: Removed unneeded dependency on CPU_S3C2410
  ARM: S3C24XX: Removed unneeded dependency on CPU_S3C2412

Amit Daniel Kachhap (2):
  ARM: dts: Add PMIC node entry for Arndale board
  ARM: dts: Add cpufreq controller node for Exynos5440 SoC

Andrzej Hajda (1):
  clk: exynos4: Add missing CMU_TOP and ISP clocks

Axel Lin (1):
  clocksource: mct: Add terminating entry for exynos_mct_ids table

Byungho An (1):
  ARM: dts: Add node for GMAC for exynos5440

Chanho Park (5):
  irqchip: exynos-combiner: Add set_irq_affinity function for 
combiner_irq

  irqchip: exynos-combiner: Correct combined IRQs for exynos4
  ARM: EXYNOS: Enable PMUs for exynos4
  ARM: EXYNOS: Add arm-pmu DT binding for exynos5250
  ARM: EXYNOS: Add arm-pmu DT binding for exynos421x

Charles Keepax (2):
  ARM: S3C64XX: Clear DMA flags on channel request
  ARM: S3C64XX: Slow down mic detection rate for wm5102

Daniel Lezcano (3):
  ARM: EXYNOS: factor out the idle states
  ARM: EXYNOS: handle properly the return values
  ARM: EXYNOS: replace cpumask by the corresponding macro

Dongjin Kim (3):
  ARM: dts: Add board dts file for ODROID-X
  ARM: dts: Fix the timing property of MSHC controller for 
exynos4412-odroidx

  ARM: dts: enable RTC device node for exynos4412-odroidx

Doug Anderson (3):
  clocksource: mct: Add missing semicolons in exynos_mct.c
  ARM: dts: add usb 2.0 clock references to exynos5250 device tree
  ARM: dts: Document usb clocks in samsung,exynos4210-ehci/ohci 
bindings


Giridhar Maruthy (4):
  ARM: dts: remove disabled status from watchdog node for 
exynos5440-ssdk5440
  ARM: dts: remove disabled status from RTC node for 
exynos5440-ssdk5440

  ARM: dts: change compatible value for exynos5440 i2c
  ARM: dts: Add virtual GIC DT bindings for exynos5440

Girish K S (2):
  ARM: dts: Add initial board support file for exynos5250-arndale
  ARM: EXYNOS: force MAC ip to 32bit DMA

Heiko Stueber (1):
  clk: samsung: fix pm init on non-dt platforms

Heiko Stuebner (15):
  ARM: S3C24XX: fix redundant checks in the irq mapping function
  ARM: S3C24XX: fix irq parent check
  ARM: S3C24XX: move s3c24xx_init_irq to s3c2410_init_irq
  ARM: S3C24XX: make s3c24xx_init_intc static
  ARM: S3C24XX: add handle_irq function
  clk: samsung: register clk_div_tables for divider clocks
  clk: samsung: always allocate the clk_table
  clk: samsung: add infrastructure to add separate aliases
  ARM: S3C24XX: move irq driver to drivers/irqchip
  irqchip: s3c24xx: fix comments on some camera interrupts
  irqchip: s3c24xx: fix irqlist of second s3c2416 controller
  irqchip: s3c24xx: add irq_set_type callback for basic interrupt types
  irqchip: s3c24xx: globally keep track of the created intc instances
  irqchip: s3c24xx: make interrupt handling independent of 
irq_domain structure

  irqchip: s3c24xx: add devicetree support

Inderpal Singh (2):
  ARM: EXYNOS: Add support for rtc wakeup
  ARM: SAMSUNG: check processor type before cache restoration in resume

Jingoo Han (3):
  ARM: EXYNOS: Add AUXDATA for DP controller
  ARM: dts: Add device tree node for DP controller for exynos5250
  ARM: EXYNOS: change the name of USB ohci header

Jonathan Kliegman (2):
  ARM: EXYNOS: Remove hardcode wakeup unmask for EINT_0
  ARM: EXYNOS: Clear ENABLE_WAKEUP_SW bit when entering suspend

Kukjin Kim (17):
  ARM: dts: cleanup exynos5440.dtsi
  ARM: dts: re-organized cpu node for exynos5440
  Merge branch 'next/timer-samsung' into next/clk-exynos
  Merge branch 'next/mct-exynos' into next/clk-exynos
  ARM: SAMSUNG: change GENERIC_GPIO to ARCH_REQUIRE_GPIOLIB
  Merge branch 'next/cleanup-samsung' into for-next-next
  Merge branch 'next/irq-s3c24xx' into for-next-next
  Merge branch 'next/mct-exynos' into for-next-next
  Merge commit 'v3.9-rc5' into next/clk-exynos
  Merge branch 'next/clk-exynos' into for-next-next
  ARM: dts: add device tree 

[GIT PULL 01/10] cleanup-samsung for v3.10

2013-04-08 Thread Kukjin Kim

The following changes since commit a937538b868b8369b98967929045f1df54234323:

  Linux 3.9-rc3 (2013-03-17 15:59:32 -0700)

are available in the git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git 
tags/cleanup-samsung-for-v3.10


for you to fetch changes up to fe72e27368265a99f6a0a189a5d593aac320a59d:

  ARM: EXYNOS: remove config EXYNOS_DEV_DRM (2013-04-09 00:32:38 +0900)


cleanup unused codes for samsung


Alexander Shiyan (3):
  ARM: S3C24XX: Removed unneeded dependency on ARCH_S3C24XX for boards
  ARM: S3C24XX: Removed unneeded dependency on CPU_S3C2410
  ARM: S3C24XX: Removed unneeded dependency on CPU_S3C2412

Jingoo Han (1):
  ARM: EXYNOS: change the name of USB ohci header

Padmavathi Venna (1):
  ARM: SAMSUNG: Remove unnecessary code for dma

Paul Bolle (11):
  ARM: S3C24XX: drop select MACH_N35
  ARM: S3C24XX: drop select MACH_NEO1973
  ARM: EXYNOS: drop select HAVE_SCHED_CLOCK
  ARM: EXYNOS: change HAVE_SAMSUNG_KEYPAD to KEYBOARD_SAMSUNG
  ARM: SAMSUNG: remove config S3C_BOOT_WATCHDOG
  ARM: SAMSUNG: Remove useless Samsung GPIO related CONFIG
  ARM: S3C24XX: remove unneeded config SMDK2440_CPU2442
  ARM: S3C64XX: remove obsolete Makefile line
  ARM: S5P64X0: Fix typo CONFIG_S5P64X0_SETUP_SDHCI
  ARM: SAMSUNG: Fix typo CONFIG_SAMSUNG_DEV_RTC
  ARM: EXYNOS: remove config EXYNOS_DEV_DRM

Sylwester Nawrocki (1):
  ARM: S3C24XX: Remove unused GPIO drive strength register definitions

Wei Yongjun (1):
  ARM: EXYNOS: remove duplicated include from common.c

 arch/arm/Kconfig   |   1 -
 arch/arm/mach-exynos/Kconfig   |  13 +-
 arch/arm/mach-exynos/common.c  |   1 -
 arch/arm/mach-exynos/dev-ohci.c|   2 +-
 arch/arm/mach-exynos/mach-origen.c |   2 +-
 arch/arm/mach-exynos/mach-smdkv310.c   |   2 +-
 arch/arm/mach-s3c24xx/Kconfig  |  22 +--
 arch/arm/mach-s3c24xx/include/mach/dma.h   |   1 -
 arch/arm/mach-s3c24xx/regs-dsc.h   | 203 
+

 arch/arm/mach-s3c64xx/Makefile |   1 -
 arch/arm/mach-s3c64xx/include/mach/dma.h   |   1 -
 arch/arm/plat-samsung/Kconfig  |  14 --
 arch/arm/plat-samsung/dma-ops.c|  10 +-
 arch/arm/plat-samsung/include/plat/dma-ops.h   |   1 -
 arch/arm/plat-samsung/include/plat/dma-pl330.h |   1 -
 arch/arm/plat-samsung/include/plat/rtc-core.h  |   2 +-
 arch/arm/plat-samsung/include/plat/sdhci.h |   4 +-
 drivers/usb/host/ohci-exynos.c |   3 +-
 .../{usb-exynos.h = usb-ohci-exynos.h}|   0
 19 files changed, 20 insertions(+), 264 deletions(-)
 rename include/linux/platform_data/{usb-exynos.h = usb-ohci-exynos.h} 
(100%)

--
Thanks.

Best regards,
Kgene.
--
Kukjin Kim kgene@samsung.com, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
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[GIT PULL 02/10] 2nd irq-s3c24xx for v3.10

2013-04-08 Thread Kukjin Kim

The following changes since commit d98fedef912832611b668fa7ece8e8ff54a6a590:

  gpio: samsung: fixes build warning with s3c2410_defconfig (2013-03-05 
20:21:36 +0900)


are available in the git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git 
tags/irq-s3c24xx-for-v3.10


for you to fetch changes up to f0774d41da0e607b70e54ecc50aeb6684f54c2b1:

  irqchip: s3c24xx: add devicetree support (2013-04-04 14:56:30 +0900)


s3c24xx irq cleanup and move into drivers/irqchip


Heiko Stuebner (12):
  ARM: S3C24XX: fix redundant checks in the irq mapping function
  ARM: S3C24XX: fix irq parent check
  ARM: S3C24XX: move s3c24xx_init_irq to s3c2410_init_irq
  ARM: S3C24XX: make s3c24xx_init_intc static
  ARM: S3C24XX: add handle_irq function
  ARM: S3C24XX: move irq driver to drivers/irqchip
  irqchip: s3c24xx: fix comments on some camera interrupts
  irqchip: s3c24xx: fix irqlist of second s3c2416 controller
  irqchip: s3c24xx: add irq_set_type callback for basic interrupt types
  irqchip: s3c24xx: globally keep track of the created intc instances
  irqchip: s3c24xx: make interrupt handling independent of 
irq_domain structure

  irqchip: s3c24xx: add devicetree support

 .../interrupt-controller/samsung,s3c24xx-irq.txt   |  53 +++
 arch/arm/Kconfig   |   1 +
 arch/arm/mach-s3c24xx/Makefile |   2 +-
 arch/arm/mach-s3c24xx/common.h |   1 +
 arch/arm/mach-s3c24xx/include/mach/entry-macro.S   |  70 ---
 arch/arm/mach-s3c24xx/mach-amlm5900.c  |   2 +-
 arch/arm/mach-s3c24xx/mach-bast.c  |   2 +-
 arch/arm/mach-s3c24xx/mach-h1940.c |   7 +-
 arch/arm/mach-s3c24xx/mach-n30.c   |   4 +-
 arch/arm/mach-s3c24xx/mach-otom.c  |   2 +-
 arch/arm/mach-s3c24xx/mach-qt2410.c|   2 +-
 arch/arm/mach-s3c24xx/mach-smdk2410.c  |   2 +-
 arch/arm/mach-s3c24xx/mach-tct_hammer.c|   2 +-
 arch/arm/mach-s3c24xx/mach-vr1000.c|   2 +-
 arch/arm/plat-samsung/include/plat/cpu.h   |   1 -
 drivers/irqchip/Makefile   |   1 +
 .../irq.c = drivers/irqchip/irq-s3c24xx.c | 523 
-

 17 files changed, 472 insertions(+), 205 deletions(-)
 create mode 100644 
Documentation/devicetree/bindings/interrupt-controller/samsung,s3c24xx-irq.txt

 delete mode 100644 arch/arm/mach-s3c24xx/include/mach/entry-macro.S
 rename arch/arm/mach-s3c24xx/irq.c = drivers/irqchip/irq-s3c24xx.c (75%)

--
Thanks.

Best regards,
Kgene.
--
Kukjin Kim kgene@samsung.com, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
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[GIT PULL 03/10] mct-exynos for v3.10

2013-04-08 Thread Kukjin Kim

The following changes since commit 6dbe51c251a327e012439c4772097a13df43c5b8:

  Linux 3.9-rc1 (2013-03-03 15:11:05 -0800)

are available in the git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git 
tags/mct-exynos-for-v3.10


for you to fetch changes up to 354599f460ba79c9fb00f220e42de5a7509ceeb4:

  clocksource: mct: Add terminating entry for exynos_mct_ids table 
(2013-04-04 15:35:42 +0900)



add support exynos mct device tree and move into drivers/clocksource


Axel Lin (1):
  clocksource: mct: Add terminating entry for exynos_mct_ids table

Doug Anderson (1):
  clocksource: mct: Add missing semicolons in exynos_mct.c

Thomas Abraham (7):
  ARM: EXYNOS: add a register base address variable in mct 
controller driver

  ARM: EXYNOS: prepare an array of MCT interrupt numbers and use it
  ARM: EXYNOS: add device tree support for MCT controller driver
  ARM: EXYNOS: allow dt based discovery of mct controller using 
clocksource_of_init

  ARM: dts: add mct device tree node for all supported Exynos SoC's
  ARM: EXYNOS: remove static io-remapping of mct registers for Exynos5
  ARM: EXYNOS: move mct driver to drivers/clocksource

 .../bindings/timer/samsung,exynos4210-mct.txt  |  68 +++
 arch/arm/Kconfig   |   2 +-
 arch/arm/boot/dts/exynos4210.dtsi  |  22 +++
 arch/arm/boot/dts/exynos4212.dtsi  |  22 +++
 arch/arm/boot/dts/exynos4412.dtsi  |  24 +++
 arch/arm/boot/dts/exynos5250.dtsi  |  22 +++
 arch/arm/mach-exynos/Kconfig   |   8 +-
 arch/arm/mach-exynos/Makefile  |   2 -
 arch/arm/mach-exynos/common.c  |   5 -
 arch/arm/mach-exynos/common.h  |   2 +-
 arch/arm/mach-exynos/include/mach/irqs.h   |   6 -
 arch/arm/mach-exynos/include/mach/map.h|   1 -
 arch/arm/mach-exynos/include/mach/regs-mct.h   |  53 --
 arch/arm/mach-exynos/mach-armlex4210.c |   2 +-
 arch/arm/mach-exynos/mach-exynos4-dt.c |   3 +-
 arch/arm/mach-exynos/mach-exynos5-dt.c |   3 +-
 arch/arm/mach-exynos/mach-nuri.c   |   2 +-
 arch/arm/mach-exynos/mach-origen.c |   2 +-
 arch/arm/mach-exynos/mach-smdk4x12.c   |   4 +-
 arch/arm/mach-exynos/mach-smdkv310.c   |   4 +-
 drivers/clocksource/Kconfig|   5 +
 drivers/clocksource/Makefile   |   1 +
 .../mct.c = drivers/clocksource/exynos_mct.c  | 196 
++---

 23 files changed, 310 insertions(+), 149 deletions(-)
 create mode 100644 
Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt

 delete mode 100644 arch/arm/mach-exynos/include/mach/regs-mct.h
 rename arch/arm/mach-exynos/mct.c = drivers/clocksource/exynos_mct.c 
(67%)


--
Thanks.

Best regards,
Kgene.
--
Kukjin Kim kgene@samsung.com, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
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[GIT PULL 04/10] clk-exynos for v3.10

2013-04-08 Thread Kukjin Kim

The following changes since commit 07961ac7c0ee8b546658717034fe692fd12eefa9:

  Linux 3.9-rc5 (2013-03-31 15:12:43 -0700)

are available in the git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git 
tags/clk-exynos-for-v3.10


for you to fetch changes up to da821eb7d42935b0f7056d98c75fd1150f6636f4:

  Merge commit 'v3.9-rc5' into next/clk-exynos (2013-04-09 01:10:13 +0900)



add suppport common clock framework for exynos


Abhilash Kesavan (1):
  ARM: dts: Add max77686 device tree support for CROS5250

Andrzej Hajda (1):
  clk: exynos4: Add missing CMU_TOP and ISP clocks

Dongjin Kim (3):
  ARM: dts: Add board dts file for ODROID-X
  ARM: dts: Fix the timing property of MSHC controller for 
exynos4412-odroidx

  ARM: dts: enable RTC device node for exynos4412-odroidx

Giridhar Maruthy (3):
  ARM: dts: remove disabled status from watchdog node for 
exynos5440-ssdk5440
  ARM: dts: remove disabled status from RTC node for 
exynos5440-ssdk5440

  ARM: dts: change compatible value for exynos5440 i2c

Girish K S (1):
  ARM: dts: Add initial board support file for exynos5250-arndale

Heiko Stueber (1):
  clk: samsung: fix pm init on non-dt platforms

Heiko Stuebner (6):
  ARM: S3C24XX: remove plat/irq.h in plat-samsung
  ARM: S3C24XX: move plat-samsung/s3c24XX headers to local common.h
  ARM: S3C24XX: cleanup the included soc init functions in common.h
  clk: samsung: register clk_div_tables for divider clocks
  clk: samsung: always allocate the clk_table
  clk: samsung: add infrastructure to add separate aliases

Jingoo Han (2):
  ARM: EXYNOS: Add AUXDATA for DP controller
  ARM: dts: Add device tree node for DP controller for exynos5250

Kukjin Kim (7):
  mmc: s3cmci: moved mach/regs-sdi.h into s3cmci device driver
  ARM: S3C24XX: plat/common-smdk.h local
  ARM: dts: cleanup exynos5440.dtsi
  ARM: dts: re-organized cpu node for exynos5440
  Merge branch 'next/timer-samsung' into next/clk-exynos
  Merge branch 'next/mct-exynos' into next/clk-exynos
  Merge commit 'v3.9-rc5' into next/clk-exynos

Leela Krishna Amudala (1):
  clk: exynos5250: register display block gate clocks to common 
clock framework


Lukasz Majewski (1):
  clk: exynos4: Export clocks used by exynos cpufreq drivers

Prasanna Kumar (1):
  ARM: dts: Set up power domain for MFC and G-scaler for exynos5250

Romain Naour (5):
  ARM: SAMSUNG: Rename s5p-time to samsung-time
  ARM: S3C24XX: Add samsung-time support for s3c24xx
  ARM: S3C64XX: Add samsung-time support for s3c64xx
  ARM: S5PC100: Add samsung-time support for s5pc100
  ARM: SAMSUNG: Remove unused plat-samsung/time.c

Sachin Kamat (12):
  ARM: dts: Add vmmc regulator node in exynos4412-origen.dts
  ARM: dts: Add sdhci node for exynos4412-origen
  ARM: dts: Update MFC DT binding documentation
  ARM: dts: Add MFC codec support for EXYNOS4 DT machines
  ARM: dts: Add MFC codec support to SMDKV310 DT
  ARM: dts: Add MFC codec support to Origen DT
  ARM: dts: Add MFC codec entry to exynos4412-origen DT
  ARM: dts: Add MFC codec entry to exynos4412-smdk4412 DT
  ARM: dts: Add MSHC node for exynos4412-origen DT
  ARM: dts: Add s5m8767 PMIC node to exynos4412-origen DT
  ARM: dts: Add sdhci node for exynos4412-smdk4412
  clk: samsung: Fix compilation error

Sylwester Nawrocki (3):
  clk: exynos4: Correct sclk_mfc clock definition
  clk: exynos4: Add camera related clock definitions
  clk: exynos4: export clocks required for fimc-is

Thomas Abraham (25):
  ARM: dts: add board dts file for EXYNOS4412 based Origen board
  ARM: EXYNOS: add a register base address variable in mct 
controller driver

  ARM: EXYNOS: prepare an array of MCT interrupt numbers and use it
  ARM: EXYNOS: add device tree support for MCT controller driver
  ARM: EXYNOS: allow dt based discovery of mct controller using 
clocksource_of_init

  ARM: dts: add mct device tree node for all supported Exynos SoC's
  ARM: EXYNOS: remove static io-remapping of mct registers for Exynos5
  ARM: EXYNOS: move mct driver to drivers/clocksource
  clk: samsung: add common clock framework helper functions for 
Samsung platforms

  clk: samsung: add pll clock registration helper functions
  clk: exynos4: register clocks using common clock framework
  clk: exynos5250: register clocks using common clock framework
  clk: exynos5440: register clocks using common clock framework
  ARM: EXYNOS: Migrate clock support to common clock framework
  ARM: EXYNOS: Initialize the clocks prior to timer initialization
  ARM: EXYNOS: allow legacy board support to specify xxti and 
xusbxti clock speed

  ARM: EXYNOS: remove auxdata table from 

[GIT PULL 05/10] dt-exynos for v3.10

2013-04-08 Thread Kukjin Kim

The following changes since commit da821eb7d42935b0f7056d98c75fd1150f6636f4:

  Merge commit 'v3.9-rc5' into next/clk-exynos (2013-04-09 01:10:13 +0900)

are available in the git repository at:


  git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git 
tags/dt-exynos-for-v3.10


for you to fetch changes up to 58a7bbf75442ea439a4d3b7993ad87023e406063:

  ARM: dts: add PDMA0 changes for exynos5440 (2013-04-09 01:39:27 +0900)


update device tree for exynos4 and exynos5


Alexander Graf (2):
  ARM: dts: Declare the gic as a15 compatible for exynos5250
  ARM: dts: Add architected timer nodes for exynos5250

Amit Daniel Kachhap (2):
  ARM: dts: Add PMIC node entry for Arndale board
  ARM: dts: Add cpufreq controller node for Exynos5440 SoC

Byungho An (1):
  ARM: dts: Add node for GMAC for exynos5440

Doug Anderson (2):
  ARM: dts: add usb 2.0 clock references to exynos5250 device tree
  ARM: dts: Document usb clocks in samsung,exynos4210-ehci/ohci 
bindings


Giridhar Maruthy (1):
  ARM: dts: Add virtual GIC DT bindings for exynos5440

Kukjin Kim (1):
  ARM: dts: add device tree file for SD5v1 board

Leela Krishna Amudala (2):
  ARM: dts: Add FIMD node to exynos5
  ARM: dts: Add display timing node to exynos5250-smdk5250.dts

Sachin Kamat (11):
  ARM: dts: Add G2D node to exynos4210.dtsi
  ARM: dts: Add G2D node to SMDKV310
  ARM: dts: Add G2D node to exynos4210-origen
  ARM: dts: Add G2D node to exynos4x12.dtsi
  ARM: dts: Add G2D node to SMDK4412
  ARM: dts: Add G2D node to exynos4412-origen
  ARM: dts: Add Samsung G2D DT bindings documentation
  ARM: dts: Add disable-wp for card slot on exynos5250-arndale
  ARM: dts: Add vmmc regulator support for Arndale board
  ARM: dts: Add MFC codec support for Arndale board
  ARM: dts: Add HDMI HPD and regulator node for Arndale board

Subash Patel (3):
  ARM: dts: add PMU support in exynos5440
  ARM: dts: update bootargs to boot from sda2 for exynos5440-ssdk5440
  ARM: dts: add PDMA0 changes for exynos5440

Sylwester Nawrocki (1):
  ARM: dts: Add SYSREG block node for S5P/Exynos4 SoC series

Thomas Abraham (4):
  ARM: dts: add pin state information in client nodes for Exynos4 
platforms
  ARM: dts: add pin state information in client nodes for Exynos5 
platforms
  ARM: dts: list the interrupts generated by pin-controller on 
Exynos5440

  ARM: dts: Fix gmac clock ids due to changes in Exynos5440

Tushar Behera (2):
  ARM: dts: Add pin-control related changes for Arndale board
  ARM: dts: Add gpio-button entries for Arndale board

Vikas Sajjan (3):
  ARM: dts: Add FIMD node to exynos4
  ARM: dts: Add FIMD node and display timing node to 
exynos4412-origen.dts

  ARM: dts: Add FIMD DT binding Documentation

 .../devicetree/bindings/arm/samsung/sysreg.txt |   7 +
 .../devicetree/bindings/gpu/samsung-g2d.txt|  20 +
 .../devicetree/bindings/usb/exynos-usb.txt |  10 +
 .../devicetree/bindings/video/samsung-fimd.txt |  65 ++
 arch/arm/boot/dts/Makefile |   1 +
 arch/arm/boot/dts/cros5250-common.dtsi |  51 +-
 arch/arm/boot/dts/exynos4.dtsi |  27 +
 arch/arm/boot/dts/exynos4210-origen.dts|   4 +
 arch/arm/boot/dts/exynos4210-smdkv310.dts  |  57 +-
 arch/arm/boot/dts/exynos4210.dtsi  |   7 +
 arch/arm/boot/dts/exynos4412-origen.dts|  21 +
 arch/arm/boot/dts/exynos4412-smdk4412.dts  |   8 +
 arch/arm/boot/dts/exynos4x12.dtsi  |   7 +
 arch/arm/boot/dts/exynos5250-arndale.dts   | 343 -
 arch/arm/boot/dts/exynos5250-pinctrl.dtsi  | 783 
+

 arch/arm/boot/dts/exynos5250-smdk5250.dts  |  49 +-
 arch/arm/boot/dts/exynos5250-snow.dts  |  22 +-
 arch/arm/boot/dts/exynos5250.dtsi  | 343 +++--
 arch/arm/boot/dts/exynos5440-sd5v1.dts |  39 +
 arch/arm/boot/dts/exynos5440-ssdk5440.dts  |   6 +-
 arch/arm/boot/dts/exynos5440.dtsi  |  55 +-
 21 files changed, 1559 insertions(+), 366 deletions(-)
 create mode 100644 
Documentation/devicetree/bindings/arm/samsung/sysreg.txt

 create mode 100644 Documentation/devicetree/bindings/gpu/samsung-g2d.txt
 create mode 100644 
Documentation/devicetree/bindings/video/samsung-fimd.txt

 create mode 100644 arch/arm/boot/dts/exynos5250-pinctrl.dtsi
 create mode 100644 arch/arm/boot/dts/exynos5440-sd5v1.dts

--
Thanks.

Best regards,
Kgene.
--
Kukjin Kim kgene@samsung.com, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
--
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[GIT PULL 06/10] 2nd pinctrl-exynos for v3.10

2013-04-08 Thread Kukjin Kim

The following changes since commit 97916777d6904e24b86eac77da58ef7cb09d539d:

  ARM: EXYNOS: skip wakeup interrupt registration for exynos5250 if 
pinctrl is enabled (2013-03-05 20:59:12 +0900)


are available in the git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git 
tags/pinctrl-exynos-for-v3.10


for you to fetch changes up to 790af0a51bdcbf504814be2673f96facfdd74981:

  pinctrl: exynos5440: add gpio interrupt support (2013-04-08 23:55:41 
+0900)



add support gpio interrupt for exynos5440


Thomas Abraham (2):
  pinctrl: exynos5440: fix probe failure due to missing pin-list in 
config nodes

  pinctrl: exynos5440: add gpio interrupt support

 drivers/pinctrl/pinctrl-exynos5440.c | 151 
++-

 1 file changed, 148 insertions(+), 3 deletions(-)

--
Thanks.

Best regards,
Kgene.
--
Kukjin Kim kgene@samsung.com, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
--
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[GIT PULL 07/10] pmu-exynos for v3.10

2013-04-08 Thread Kukjin Kim

The following changes since commit da821eb7d42935b0f7056d98c75fd1150f6636f4:

  Merge commit 'v3.9-rc5' into next/clk-exynos (2013-04-09 01:10:13 +0900)

are available in the git repository at:


  git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git 
tags/pmu-exynos-for-v3.10


for you to fetch changes up to db35234ec7a7a10145cf472f68e1c73fbd48f79c:

  ARM: EXYNOS: Add arm-pmu DT binding for exynos421x (2013-04-09 
01:49:16 +0900)



add support arm-pmu for exynos4 and exynos5250


Chanho Park (5):
  irqchip: exynos-combiner: Add set_irq_affinity function for 
combiner_irq

  irqchip: exynos-combiner: Correct combined IRQs for exynos4
  ARM: EXYNOS: Enable PMUs for exynos4
  ARM: EXYNOS: Add arm-pmu DT binding for exynos5250
  ARM: EXYNOS: Add arm-pmu DT binding for exynos421x

 arch/arm/boot/dts/exynos4210.dtsi|  6 +++
 arch/arm/boot/dts/exynos5250.dtsi|  6 +++
 arch/arm/mach-exynos/common.c| 28 +++
 arch/arm/mach-exynos/include/mach/irqs.h | 13 --
 arch/arm/plat-samsung/devs.c |  2 +-
 drivers/irqchip/exynos-combiner.c| 80 
+---

 6 files changed, 113 insertions(+), 22 deletions(-)

--
Thanks.

Best regards,
Kgene.
--
Kukjin Kim kgene@samsung.com, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
--
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[GIT PULL 08/10] secure-exynos for v3.10

2013-04-08 Thread Kukjin Kim

The following changes since commit da821eb7d42935b0f7056d98c75fd1150f6636f4:

  Merge commit 'v3.9-rc5' into next/clk-exynos (2013-04-09 01:10:13 +0900)

are available in the git repository at:


  git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git 
tags/secure-exynos-for-v3.10


for you to fetch changes up to beddf63fc8e01f06799bd6d7a2dd879885bbc9c6:

  ARM: EXYNOS: Add secure firmware support to secondary CPU bring-up 
(2013-04-09 01:52:30 +0900)



add support secure firmware for exynos


Tomasz Figa (5):
  ARM: Add interface for registering and calling firmware-specific 
operations

  ARM: EXYNOS: Add support for secure monitor calls
  ARM: EXYNOS: Add support for Exynos secure firmware
  ARM: EXYNOS: Add IO mapping for non-secure SYSRAM.
  ARM: EXYNOS: Add secure firmware support to secondary CPU bring-up

 Documentation/arm/firmware.txt | 88 
++

 .../devicetree/bindings/arm/samsung-boards.txt | 10 +++
 arch/arm/common/Makefile   |  2 +
 arch/arm/common/firmware.c | 18 +
 arch/arm/include/asm/firmware.h| 66 
 arch/arm/mach-exynos/Makefile  |  6 ++
 arch/arm/mach-exynos/common.c  | 35 +
 arch/arm/mach-exynos/common.h  |  2 +
 arch/arm/mach-exynos/exynos-smc.S  | 22 ++
 arch/arm/mach-exynos/firmware.c| 70 +
 arch/arm/mach-exynos/include/mach/map.h|  3 +
 arch/arm/mach-exynos/mach-exynos4-dt.c |  1 +
 arch/arm/mach-exynos/platsmp.c | 32 ++--
 arch/arm/mach-exynos/smc.h | 31 
 arch/arm/plat-samsung/include/plat/map-s5p.h   |  1 +
 15 files changed, 382 insertions(+), 5 deletions(-)
 create mode 100644 Documentation/arm/firmware.txt
 create mode 100644 arch/arm/common/firmware.c
 create mode 100644 arch/arm/include/asm/firmware.h
 create mode 100644 arch/arm/mach-exynos/exynos-smc.S
 create mode 100644 arch/arm/mach-exynos/firmware.c
 create mode 100644 arch/arm/mach-exynos/smc.h

--
Thanks.

Best regards,
Kgene.
--
Kukjin Kim kgene@samsung.com, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
--
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[GIT PULL 09/10] 2nd timer-samsung for v3.10

2013-04-08 Thread Kukjin Kim

The following changes since commit ad38bdd15d5b97dcb1ffc46ea77c237e30312fbb:

  ARM: SAMSUNG: Remove unused plat-samsung/time.c (2013-03-05 20:19:54 
+0900)


are available in the git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git 
tags/timer-samsung-for-v3.10


for you to fetch changes up to 536504309c3c2da5a755263c7179ffe1b2e5b3dd:

  ARM: SAMSUNG: change GENERIC_GPIO to ARCH_REQUIRE_GPIOLIB (2013-04-04 
09:36:24 +0900)



including fix for GENERIC_GPIO based on previous pull-request for 
timer-samsung



Kukjin Kim (1):
  ARM: SAMSUNG: change GENERIC_GPIO to ARCH_REQUIRE_GPIOLIB

 arch/arm/Kconfig | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

--
Thanks.

Best regards,
Kgene.
--
Kukjin Kim kgene@samsung.com, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
--
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[GIT PULL 10/10] devel-samsung for v3.10

2013-04-08 Thread Kukjin Kim

The following changes since commit 6dbe51c251a327e012439c4772097a13df43c5b8:

  Linux 3.9-rc1 (2013-03-03 15:11:05 -0800)

are available in the git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git 
tags/devel-samsung-for-v3.10


for you to fetch changes up to 298591f89fd0f3f779a77e589ce2f1c28e9788ed:

  ARM: EXYNOS: replace cpumask by the corresponding macro (2013-04-09 
00:44:35 +0900)



including various development for samsung for v3.10


Charles Keepax (2):
  ARM: S3C64XX: Clear DMA flags on channel request
  ARM: S3C64XX: Slow down mic detection rate for wm5102

Daniel Lezcano (3):
  ARM: EXYNOS: factor out the idle states
  ARM: EXYNOS: handle properly the return values
  ARM: EXYNOS: replace cpumask by the corresponding macro

Inderpal Singh (2):
  ARM: EXYNOS: Add support for rtc wakeup
  ARM: SAMSUNG: check processor type before cache restoration in resume

Jonathan Kliegman (2):
  ARM: EXYNOS: Remove hardcode wakeup unmask for EINT_0
  ARM: EXYNOS: Clear ENABLE_WAKEUP_SW bit when entering suspend

Sylwester Nawrocki (2):
  ARM: SAMSUNG: Export MIPI CSIS/DSIM PHY control functions
  ARM: S3C24XX: Correct NR_IRQS definition for s3c2440

 arch/arm/mach-exynos/common.c|  2 +
 arch/arm/mach-exynos/cpuidle.c   | 58 
+---

 arch/arm/mach-exynos/include/mach/pm-core.h  |  9 +
 arch/arm/mach-s3c24xx/include/mach/irqs.h|  4 +-
 arch/arm/mach-s3c64xx/dma.c  |  1 +
 arch/arm/mach-s3c64xx/mach-crag6410-module.c |  1 +
 arch/arm/plat-samsung/s5p-sleep.S|  9 +
 arch/arm/plat-samsung/setup-mipiphy.c|  3 ++
 8 files changed, 45 insertions(+), 42 deletions(-)

--
Thanks.

Best regards,
Kgene.
--
Kukjin Kim kgene@samsung.com, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
--
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Re: [PATCH] ARM: EXYNOS: remove config EXYNOS_DEV_DRM

2013-04-08 Thread Kukjin Kim

On 04/08/13 23:55, Paul Bolle wrote:

The only user of Kconfig symbol EXYNOS_DEV_DRM was removed in commit
0a9d5ac307aefbb2c772537d3fe7f75046d563ac (ARM: EXYNOS: removing
exynos-drm device registration from non-dt platforms). It is safe to
remove this symbol too.

Signed-off-by: Paul Bollepebo...@tiscali.nl
---
Only git grep tested.

  arch/arm/mach-exynos/Kconfig | 10 --
  1 file changed, 10 deletions(-)

diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 70f94c8..99e7142 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -95,11 +95,6 @@ config EXYNOS4_DEV_AHCI
help
  Compile in platform device definitions for AHCI

-config EXYNOS_DEV_DRM
-   bool
-   help
- Compile in platform device definitions for core DRM device
-
  config EXYNOS4_SETUP_FIMD0
bool
help
@@ -199,7 +194,6 @@ config MACH_SMDKV310
select EXYNOS4_SETUP_SDHCI
select EXYNOS4_SETUP_USB_PHY
select EXYNOS_DEV_DMA
-   select EXYNOS_DEV_DRM
select EXYNOS_DEV_SYSMMU
select S3C24XX_PWM
select S3C_DEV_HSMMC
@@ -253,7 +247,6 @@ config MACH_UNIVERSAL_C210
select EXYNOS4_SETUP_SDHCI
select EXYNOS4_SETUP_USB_PHY
select EXYNOS_DEV_DMA
-   select EXYNOS_DEV_DRM
select EXYNOS_DEV_SYSMMU
select HAVE_SCHED_CLOCK
select S3C_DEV_HSMMC
@@ -294,7 +287,6 @@ config MACH_NURI
select EXYNOS4_SETUP_SDHCI
select EXYNOS4_SETUP_USB_PHY
select EXYNOS_DEV_DMA
-   select EXYNOS_DEV_DRM
select S3C_DEV_HSMMC
select S3C_DEV_HSMMC2
select S3C_DEV_HSMMC3
@@ -330,7 +322,6 @@ config MACH_ORIGEN
select EXYNOS4_SETUP_SDHCI
select EXYNOS4_SETUP_USB_PHY
select EXYNOS_DEV_DMA
-   select EXYNOS_DEV_DRM
select EXYNOS_DEV_SYSMMU
select S3C24XX_PWM
select S3C_DEV_HSMMC
@@ -366,7 +357,6 @@ config MACH_SMDK4212
select EXYNOS4_SETUP_SDHCI
select EXYNOS4_SETUP_USB_PHY
select EXYNOS_DEV_DMA
-   select EXYNOS_DEV_DRM
select EXYNOS_DEV_SYSMMU
select S3C24XX_PWM
select S3C_DEV_HSMMC2


Applied, thanks.

- Kukjin
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Re: [PATCH] ARM: dts: fix bad merge of display timing node to exynos5250-smdk5250.dts

2013-04-08 Thread Kukjin Kim

On 04/09/13 01:51, Doug Anderson wrote:

The display timing node was added:
   7ed2077 ARM: dts: Add display timing node to exynos5250-smdk5250.dts
...and looks OK there.  ...but it looks like we lost a }; in the
merge and it no longer compiles.  Fix it.

Signed-off-by: Doug Andersondiand...@chromium.org
---
  arch/arm/boot/dts/exynos5250-smdk5250.dts | 1 +
  1 file changed, 1 insertion(+)

diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts 
b/arch/arm/boot/dts/exynos5250-smdk5250.dts
index 4be14df..26d856b 100644
--- a/arch/arm/boot/dts/exynos5250-smdk5250.dts
+++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
@@ -239,6 +239,7 @@
vback-porch =4;
vfront-porch =4;
vsync-len =4;
+   };
};

fixed-rate-clocks {


Thanks for your pointing out. But it should be fixed with re-sorting out 
the branch.


If any problems, please let me know.

- Kukjin
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Re: [PATCH] ARM: dts: Disable the RTC by default on exynos5

2013-04-08 Thread Kukjin Kim

On 04/09/13 01:58, Doug Anderson wrote:

This change makes the rtc on the exynos5250 and 5440 disabled by
default to match exynos4.

Ever since the common clock framework came in came in, exynos5250
boards have dumped lots of warnings in the boot log.  It turns out
that we don't see those on exynos4 since the rtc is disabled by
default.  While we need to get to the bottom of the problems with the
RTC, it still makes sense to have the default state of the RTC on
exynos boards match.

For the record, warnings look like this:
   [ cut here ]
   WARNING: at /.../drivers/clk/clk.c:771 __clk_enable+0x34/0xb0()
   Modules linked in:
   [80015bfc] (unwind_backtrace+0x0/0xec) from [804717f0] 
(dump_stack+0x20/0x24)
   [804717f0] (dump_stack+0x20/0x24) from [80023cd0] 
(warn_slowpath_common+0x5c/0x7c)
   [80023cd0] (warn_slowpath_common+0x5c/0x7c) from [80023d1c] 
(warn_slowpath_null+0x2c/0x34)
   [80023d1c] (warn_slowpath_null+0x2c/0x34) from [8035ddb0] 
(__clk_enable+0x34/0xb0)
   [8035ddb0] (__clk_enable+0x34/0xb0) from [8035de54] 
(clk_enable+0x28/0x3c)
   [8035de54] (clk_enable+0x28/0x3c) from [8031a160] 
(s3c_rtc_probe+0xf4/0x434)
   [8031a160] (s3c_rtc_probe+0xf4/0x434) from [8028e288] 
(platform_drv_probe+0x24/0x28)
   [8028e288] (platform_drv_probe+0x24/0x28) from [8028ce10] 
(driver_probe_device+0xbc/0x22c)
   [8028ce10] (driver_probe_device+0xbc/0x22c) from [8028cff8] 
(__driver_attach+0x78/0x9c)
   [8028cff8] (__driver_attach+0x78/0x9c) from [8028bdfc] 
(bus_for_each_dev+0x64/0xac)
   [8028bdfc] (bus_for_each_dev+0x64/0xac) from [8028c7e0] 
(driver_attach+0x28/0x30)
   [8028c7e0] (driver_attach+0x28/0x30) from [8028c43c] 
(bus_add_driver+0xe0/0x234)
   [8028c43c] (bus_add_driver+0xe0/0x234) from [8028d55c] 
(driver_register+0xac/0x13c)
   [8028d55c] (driver_register+0xac/0x13c) from [8028e4f4] 
(platform_driver_register+0x54/0x68)
   [8028e4f4] (platform_driver_register+0x54/0x68) from [8065c944] 
(s3c_rtc_driver_init+0x14/0x1c)
   [8065c944] (s3c_rtc_driver_init+0x14/0x1c) from [800086d8] 
(do_one_initcall+0x60/0x138)
   [800086d8] (do_one_initcall+0x60/0x138) from [80633a8c] 
(kernel_init_freeable+0x108/0x1d0)
   [80633a8c] (kernel_init_freeable+0x108/0x1d0) from [8046d2f8] 
(kernel_init+0x1c/0xf4)
   [8046d2f8] (kernel_init+0x1c/0xf4) from [8000e358] 
(ret_from_fork+0x14/0x20)
   ---[ end trace 4bcdc801c868d73f ]---

Signed-off-by: Doug Andersondiand...@chromium.org
---
  arch/arm/boot/dts/exynos5250.dtsi | 1 +
  arch/arm/boot/dts/exynos5440.dtsi | 1 +
  2 files changed, 2 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5250.dtsi 
b/arch/arm/boot/dts/exynos5250.dtsi
index dc55e33..892b724 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -183,6 +183,7 @@
interrupts =0 43 0,0 44 0;
clocks =clock 337;
clock-names = rtc;
+   status = disabled;
};

tmu@1006 {
diff --git a/arch/arm/boot/dts/exynos5440.dtsi 
b/arch/arm/boot/dts/exynos5440.dtsi
index 25c6134..a8ceef4 100644
--- a/arch/arm/boot/dts/exynos5440.dtsi
+++ b/arch/arm/boot/dts/exynos5440.dtsi
@@ -181,5 +181,6 @@
interrupts =0 17 0,0 16 0;
clocks =clock 21;
clock-names = rtc;
+   status = disabled;
};
  };


Ooops, OK.

Applied, thanks.

- Kukjin
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Re: [PATCH] ARM: dts: fix bad merge of display timing node to exynos5250-smdk5250.dts

2013-04-08 Thread Doug Anderson
Kukjin,

On Mon, Apr 8, 2013 at 11:23 AM, Kukjin Kim kgene@samsung.com wrote:
 Thanks for your pointing out. But it should be fixed with re-sorting out the
 branch.

No problem with however you want to solve it.  ;)  Seemed that the
patch was the easiest way to report the problem in any case...

-Doug
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Re: [PATCH] ARM: dts: fix bad merge of display timing node to exynos5250-smdk5250.dts

2013-04-08 Thread Kukjin Kim

On 04/09/13 03:25, Doug Anderson wrote:

Kukjin,

On Mon, Apr 8, 2013 at 11:23 AM, Kukjin Kimkgene@samsung.com  wrote:

Thanks for your pointing out. But it should be fixed with re-sorting out the
branch.


No problem with however you want to solve it.  ;)  Seemed that the
patch was the easiest way to report the problem in any case...


Makes sense :-)

BTW, if any problems on current for-next, please kindly let me know.

Thanks.

- Kukjin
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Re: [PATCH] ARM: dts: Fix build error in exynos5250-smdk5250.dts

2013-04-08 Thread Kukjin Kim

On 04/08/13 14:01, Sachin Kamat wrote:

Fixes the following build error:
Error: arch/arm/boot/dts/exynos5250-smdk5250.dts:250.3-251.1 syntax error
FATAL ERROR: Unable to parse input tree
make[1]: *** [arch/arm/boot/dts/exynos5250-smdk5250.dtb] Error 1
make: *** [dtbs] Error 2

Signed-off-by: Sachin Kamatsachin.ka...@linaro.org
---
Based on Kukjin's for-next tree.
---
  arch/arm/boot/dts/exynos5250-smdk5250.dts |1 +
  1 file changed, 1 insertion(+)

diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts 
b/arch/arm/boot/dts/exynos5250-smdk5250.dts
index 4be14df..26d856b 100644
--- a/arch/arm/boot/dts/exynos5250-smdk5250.dts
+++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
@@ -239,6 +239,7 @@
vback-porch =4;
vfront-porch =4;
vsync-len =4;
+   };
};

fixed-rate-clocks {


Current for-next has no problem with re-sorting out the branch.

Anyway, thanks for your checking and if any problems, please let me know.

Thanks.

- Kukjin
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Re: [PATCH] ARM: dts: fix bad merge of display timing node to exynos5250-smdk5250.dts

2013-04-08 Thread Doug Anderson
Kukjin,

On Mon, Apr 8, 2013 at 11:29 AM, Kukjin Kim kgene@gmail.com wrote:
 BTW, if any problems on current for-next, please kindly let me know.

I usually try to check linux-next at least once a week, but sometimes
it's more or less often.  At the moment I'm trying to track something
weird down but it seems like it has some userspace component to it.
I'll post a separate thread if I find a kernel problem there.

Aside from the RTC, my biggest problem right now is that reboot
stopped working at the same time as the common clock.  The
exynos5_restart() function is essentially behaving as a no-op since
the clock to the IP block that handles reset has been gated.  :(  The
bit CLK_PMU_APBIF is gated in CLK_GATE_IP_PERIS. This used to be
ungated in exynos5_clk_ip_peris_ctrl().

I'm happy to test a patch that fixes this but I haven't yet had time
to try to fix it cleanly myself.


-Doug
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Re: [PATCH] ARM: dts: fix bad merge of display timing node to exynos5250-smdk5250.dts

2013-04-08 Thread Tomasz Figa
Hi Doug,

On Monday 08 of April 2013 12:21:32 Doug Anderson wrote:
 Kukjin,
 
 On Mon, Apr 8, 2013 at 11:29 AM, Kukjin Kim kgene@gmail.com wrote:
  BTW, if any problems on current for-next, please kindly let me know.
 
 I usually try to check linux-next at least once a week, but sometimes
 it's more or less often.  At the moment I'm trying to track something
 weird down but it seems like it has some userspace component to it.
 I'll post a separate thread if I find a kernel problem there.
 
 Aside from the RTC, my biggest problem right now is that reboot
 stopped working at the same time as the common clock.  The
 exynos5_restart() function is essentially behaving as a no-op since
 the clock to the IP block that handles reset has been gated.  :(  The
 bit CLK_PMU_APBIF is gated in CLK_GATE_IP_PERIS. This used to be
 ungated in exynos5_clk_ip_peris_ctrl().
 
 I'm happy to test a patch that fixes this but I haven't yet had time
 to try to fix it cleanly myself.

Common Clock Framework by default automatically gates unused clocks, just 
like regulator core does with unused regulators. Maybe this is the cause?

There is a CLK_IGNORE_UNUSED flag which disables this behavior for all 
clocks which have it set. Maybe it should be set for the problematic 
clock?

Best regards,
Tomasz

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Re: GENERIC_GPIO considered deprecated

2013-04-08 Thread Arnd Bergmann
On Monday 08 April 2013, Stephen Warren wrote:
 
  Should do the trick, if we can make sure that your tree is merged
  prior to my patches.
  
  I'm not sure but I think, arm-soc tree should be merged into mainline 
  before others...
  
  Can you put it into your tree for 3.10?
 
  I did, so it should be fine.
  
 
 You may want to discuss how to handle this dependency with the arm-soc
 maintainers (CC'd).

I'm fine with putting the same branch into arm-soc as well as the gpio tree
and anything else that might need it, that tends to be the least invasive
way.

Arnd
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Re: [PATCH] ARM: dts: fix bad merge of display timing node to exynos5250-smdk5250.dts

2013-04-08 Thread Doug Anderson
Tomasz,

On Mon, Apr 8, 2013 at 12:27 PM, Tomasz Figa tomasz.f...@gmail.com wrote:
 Common Clock Framework by default automatically gates unused clocks, just
 like regulator core does with unused regulators. Maybe this is the cause?

Yes, I'm nearly certain that's the case here.  The reset code doesn't
belong to any driver (it's in mach-exynos/common.c) it certainly
doesn't grab any clock.

I tried quickly to see if there was an easy clock to grab but got a
bit stuck.  In the old way of doing things clocks could be global and
grabbed without a dev node.  That may still be possible now, but in
the 15 minutes I spent I couldn't figure it out and so it went to the
back burner.  ...or we could make a real reset device, but that might
be overkill?

 There is a CLK_IGNORE_UNUSED flag which disables this behavior for all
 clocks which have it set. Maybe it should be set for the problematic
 clock?

Didn't know about that one, thanks!  It seems like a bit annoying that
we'd have to keep this clock all the time just to get reset working,
though.  I guess in 3.4 that's what we did, though I don't know if it
was intentional...

-Doug
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Re: [PATCH V5 0/4] cpufreq: exynos5440: support for cpufreq driver

2013-04-08 Thread Rafael J. Wysocki
On Monday, April 08, 2013 09:02:44 PM Kukjin Kim wrote:
 amit daniel kachhap wrote:
  
  On Fri, Apr 5, 2013 at 6:08 PM, Rafael J. Wysocki r...@sisk.pl wrote:
   On Thursday, March 28, 2013 01:35:18 PM Amit Daniel Kachhap wrote:
   Submitting the V5 version of exynos5440 cpufreq driver. This patchset
  addresses
   all the coding and design concerns raised especially by Viresh.
  
   Changes in V5:
   * Removed the unnecessary DT look up entry from mach-exynos5-dt.c.
   * Fixed all coding and comments issue raised by Viresh.
  
   Changes in V4:
   * Added dev_err logs instead of pr_err.
   * Used the devm_ioremap_resource API.
   * Implemented several coding guidelines and minor error comments from
  Sylwester,
 Russell and Viresh.
  
   Changes in V3:
   * Converted the driver to probe based as suggested by Viresh. This is
  also
 beneficial for multiplatform kernel.
   * Other coding guidelines related changes.
   * Moved the DT node outside cpu0 node as the driver is now a platform
 driver.
  
   Changes in V2:
   * Added OPP library support to parse DT parameters.
   * Removed a hack to handle interrupts in bootup.
   * Implemented other review comments from Viresh and Inder.
  
   All these patches are dependent on Thomas Abraham common clock patches.
   (http://www.mail-archive.com/linux-samsung-
  s...@vger.kernel.org/msg15860.html)
   This whole patch series is based on 3.9-rc4.
  
   Amit Daniel Kachhap (4):
 cpufreq: exynos: Add cpufreq driver for exynos5440
 cpufreq: exynos: Remove error return even if no soc is found
 arm: exynos: Enable OPP library support for exynos5440
 arm: dts: Add cpufreq controller node for Exynos5440 SoC
  
.../bindings/cpufreq/cpufreq-exynos5440.txt|   28 ++
arch/arm/boot/dts/exynos5440.dtsi  |   12 +
arch/arm/mach-exynos/Kconfig   |2 +
drivers/cpufreq/Kconfig.arm|9 +
drivers/cpufreq/Makefile   |1 +
drivers/cpufreq/exynos-cpufreq.c   |2 +-
drivers/cpufreq/exynos5440-cpufreq.c   |  474
  
7 files changed, 527 insertions(+), 1 deletions(-)
create mode 100644 Documentation/devicetree/bindings/cpufreq/cpufreq-
  exynos5440.txt
create mode 100644 drivers/cpufreq/exynos5440-cpufreq.c
  
   Is this for me or the Samsung tree?
  
   If it's for me, I need ACKs from the Samsung tree maintainers.  Also,
  please
   address the Viresh's comments.
  
   Thanks,
   Rafael
  
  Hi Rafael,
  
  I submitted the V6 version with all comments from Viresh addressed.
  
  Hi Kukjin Kim,
  
  Any suggestion on how this patch should be merged. In my opinion it
  should go via Rafael's tree as this patch uses some fixes present in
  Rafael's tree like modified cpufreq_notify_transition API.
  
 Yes, I agree. The v6 series including resending 1/4 patch looks good to me.
 But the patch V6 4/4 would be sent to upstream via samsung tree to avoid
 useless merge conflicts and I think, it's possible.
 
 So Rafael, please take 1/4 ~ 3/4 patches in your tree with my ack.
 
 Acked-by: Kukjin Kim kgene@samsung.com
 
 If any problems, please let me know.

I will, thank you!

Rafael


-- 
I speak only for myself.
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[PATCH] ARM: S3C24XX: Fix interrupt pending register offset of the EINT controller

2013-04-08 Thread Sylwester Nawrocki
The external pending interrupt register address (EINTPEND) offset is
0xa8, not 0x08. Without this patch the external interrupts are not
properly acknowledged, which may lead to an interrupt storm and the
system hang as soon as any external interrupt is requested.

Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
---

This patch is for _3.9_. I'm going to send a similar patch for 3.10-rc2
for drivers/irqchip/irq-s3c24xx.c.
---
 arch/arm/mach-s3c24xx/irq.c |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-s3c24xx/irq.c b/arch/arm/mach-s3c24xx/irq.c
index cb9f5e0..d8ba9be 100644
--- a/arch/arm/mach-s3c24xx/irq.c
+++ b/arch/arm/mach-s3c24xx/irq.c
@@ -500,7 +500,7 @@ struct s3c_irq_intc *s3c24xx_init_intc(struct device_node 
*np,
base = (void *)0xfd00;

intc-reg_mask = base + 0xa4;
-   intc-reg_pending = base + 0x08;
+   intc-reg_pending = base + 0xa8;
irq_num = 20;
irq_start = S3C2410_IRQ(32);
irq_offset = 4;
--
1.7.4.1

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Re: [GIT PULL 10/10] devel-samsung for v3.10

2013-04-08 Thread Sylwester Nawrocki

On 04/08/2013 08:20 PM, Kukjin Kim wrote:

The following changes since commit
6dbe51c251a327e012439c4772097a13df43c5b8:

Linux 3.9-rc1 (2013-03-03 15:11:05 -0800)

are available in the git repository at:

git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git
tags/devel-samsung-for-v3.10

for you to fetch changes up to 298591f89fd0f3f779a77e589ce2f1c28e9788ed:

ARM: EXYNOS: replace cpumask by the corresponding macro (2013-04-09
00:44:35 +0900)


including various development for samsung for v3.10


Charles Keepax (2):
ARM: S3C64XX: Clear DMA flags on channel request
ARM: S3C64XX: Slow down mic detection rate for wm5102

Daniel Lezcano (3):
ARM: EXYNOS: factor out the idle states
ARM: EXYNOS: handle properly the return values
ARM: EXYNOS: replace cpumask by the corresponding macro

Inderpal Singh (2):
ARM: EXYNOS: Add support for rtc wakeup
ARM: SAMSUNG: check processor type before cache restoration in resume

Jonathan Kliegman (2):
ARM: EXYNOS: Remove hardcode wakeup unmask for EINT_0
ARM: EXYNOS: Clear ENABLE_WAKEUP_SW bit when entering suspend

Sylwester Nawrocki (2):
ARM: SAMSUNG: Export MIPI CSIS/DSIM PHY control functions


This one was supposed to be a fix for 3.8-rc IIRC. But anyway the whole
file this patch touches is going to be removed in 3.11.


ARM: S3C24XX: Correct NR_IRQS definition for s3c2440


And this one is needed for 3.9, sorry for not mentioning it in the patch's
description. Together with [1] it makes my s3c2440 SoC based test board
booting again with 3.9-rc6.

[1] http://www.spinics.net/lists/arm-kernel/msg236643.html

Thanks,
Sylwester
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Re: [PATCH] ARM: S3C24XX: Fix interrupt pending register offset of the EINT controller

2013-04-08 Thread Heiko Stübner
Am Montag, 8. April 2013, 21:53:07 schrieb Sylwester Nawrocki:
 The external pending interrupt register address (EINTPEND) offset is
 0xa8, not 0x08. Without this patch the external interrupts are not
 properly acknowledged, which may lead to an interrupt storm and the
 system hang as soon as any external interrupt is requested.
 
 Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
yep, I unintentionally introduced a typo there and the register really is 
0xa8, so thanks (again) for the fix

Reviewed-by: Heiko Stuebner he...@sntech.de
 

 ---
 
 This patch is for _3.9_. I'm going to send a similar patch for 3.10-rc2
 for drivers/irqchip/irq-s3c24xx.c.
 ---
  arch/arm/mach-s3c24xx/irq.c |2 +-
  1 files changed, 1 insertions(+), 1 deletions(-)
 
 diff --git a/arch/arm/mach-s3c24xx/irq.c b/arch/arm/mach-s3c24xx/irq.c
 index cb9f5e0..d8ba9be 100644
 --- a/arch/arm/mach-s3c24xx/irq.c
 +++ b/arch/arm/mach-s3c24xx/irq.c
 @@ -500,7 +500,7 @@ struct s3c_irq_intc *s3c24xx_init_intc(struct
 device_node *np, base = (void *)0xfd00;
 
   intc-reg_mask = base + 0xa4;
 - intc-reg_pending = base + 0x08;
 + intc-reg_pending = base + 0xa8;
   irq_num = 20;
   irq_start = S3C2410_IRQ(32);
   irq_offset = 4;
 --
 1.7.4.1
 
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Hey

2013-04-08 Thread annalee
Gday !
I ended up seeing your main image on the net. I really like you a lot. 
Let's talk ! I can send you my image if you want. 
Just drop me a line at private email: tereas...@domainizmail.com

With hope and love..
tereasa
















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Re: GENERIC_GPIO considered deprecated

2013-04-08 Thread Stephen Rothwell
Hi all,

On Mon, 8 Apr 2013 21:36:44 +0200 Arnd Bergmann a...@arndb.de wrote:

 On Monday 08 April 2013, Stephen Warren wrote:
  
   Should do the trick, if we can make sure that your tree is merged
   prior to my patches.
   
   I'm not sure but I think, arm-soc tree should be merged into mainline 
   before others...
   
   Can you put it into your tree for 3.10?
  
   I did, so it should be fine.
   
  
  You may want to discuss how to handle this dependency with the arm-soc
  maintainers (CC'd).
 
 I'm fine with putting the same branch into arm-soc as well as the gpio tree
 and anything else that might need it, that tends to be the least invasive
 way.

Just a reminder: that had better be the exact same branch and that branch
had better never be rebased/rewritten ...

-- 
Cheers,
Stephen Rothwells...@canb.auug.org.au


pgpc7_fXlc6RM.pgp
Description: PGP signature


Re: GENERIC_GPIO considered deprecated

2013-04-08 Thread Alexandre Courbot
On Mon, Apr 8, 2013 at 4:38 PM, Stephen Rothwell s...@canb.auug.org.au wrote:
 Hi all,

 On Mon, 8 Apr 2013 21:36:44 +0200 Arnd Bergmann a...@arndb.de wrote:

 On Monday 08 April 2013, Stephen Warren wrote:
  
   Should do the trick, if we can make sure that your tree is merged
   prior to my patches.
  
   I'm not sure but I think, arm-soc tree should be merged into mainline 
   before others...
  
   Can you put it into your tree for 3.10?
  
   I did, so it should be fine.
  
 
  You may want to discuss how to handle this dependency with the arm-soc
  maintainers (CC'd).

 I'm fine with putting the same branch into arm-soc as well as the gpio tree
 and anything else that might need it, that tends to be the least invasive
 way.

 Just a reminder: that had better be the exact same branch and that branch
 had better never be rebased/rewritten ...

Sorry, which branch are we talking about - is it the one I published
for -next initially? If so wouldn't it be simpler to withdraw it and
have Grant integrate the patches in his branch? Since no one depends
on them for now anyway...

I remember rebasing it once some time ago to add Acked-bys, but it
hasn't changed since then.

Alex.
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Re: GENERIC_GPIO considered deprecated

2013-04-08 Thread Stephen Rothwell
Hi,

On Mon, 8 Apr 2013 17:07:54 -0700 Alexandre Courbot gnu...@gmail.com wrote:

 On Mon, Apr 8, 2013 at 4:38 PM, Stephen Rothwell s...@canb.auug.org.au 
 wrote:
 
  On Mon, 8 Apr 2013 21:36:44 +0200 Arnd Bergmann a...@arndb.de wrote:
 
  On Monday 08 April 2013, Stephen Warren wrote:
   
Should do the trick, if we can make sure that your tree is merged
prior to my patches.
   
I'm not sure but I think, arm-soc tree should be merged into mainline 
before others...
   
Can you put it into your tree for 3.10?
   
I did, so it should be fine.
   
  
   You may want to discuss how to handle this dependency with the arm-soc
   maintainers (CC'd).
 
  I'm fine with putting the same branch into arm-soc as well as the gpio tree
  and anything else that might need it, that tends to be the least invasive
  way.
 
  Just a reminder: that had better be the exact same branch and that branch
  had better never be rebased/rewritten ...
 
 Sorry, which branch are we talking about - is it the one I published
 for -next initially? If so wouldn't it be simpler to withdraw it and
 have Grant integrate the patches in his branch? Since no one depends
 on them for now anyway...
 
 I remember rebasing it once some time ago to add Acked-bys, but it
 hasn't changed since then.

I am talking about the branch that Arnd says should be merged into both
the arm-soc and gpio trees.

-- 
Cheers,
Stephen Rothwells...@canb.auug.org.au


pgpNoYZ2nO491.pgp
Description: PGP signature


RE: GENERIC_GPIO considered deprecated

2013-04-08 Thread Kukjin Kim
Stephen Rothwell wrote:
 
 Hi,
 
 On Mon, 8 Apr 2013 17:07:54 -0700 Alexandre Courbot gnu...@gmail.com
 wrote:
 
  On Mon, Apr 8, 2013 at 4:38 PM, Stephen Rothwell s...@canb.auug.org.au
 wrote:
  
   On Mon, 8 Apr 2013 21:36:44 +0200 Arnd Bergmann a...@arndb.de wrote:
  
   On Monday 08 April 2013, Stephen Warren wrote:

 Should do the trick, if we can make sure that your tree is
 merged
 prior to my patches.

 I'm not sure but I think, arm-soc tree should be merged into
 mainline before others...

 Can you put it into your tree for 3.10?

 I did, so it should be fine.

   
You may want to discuss how to handle this dependency with the arm-
 soc
maintainers (CC'd).
  
   I'm fine with putting the same branch into arm-soc as well as the
 gpio tree
   and anything else that might need it, that tends to be the least
 invasive
   way.
  
   Just a reminder: that had better be the exact same branch and that
 branch
   had better never be rebased/rewritten ...
 
  Sorry, which branch are we talking about - is it the one I published
  for -next initially? If so wouldn't it be simpler to withdraw it and
  have Grant integrate the patches in his branch? Since no one depends
  on them for now anyway...
 
  I remember rebasing it once some time ago to add Acked-bys, but it
  hasn't changed since then.
 
 I am talking about the branch that Arnd says should be merged into both
 the arm-soc and gpio trees.
 
Well, AFAIK, the problem including select GENERIC_GPIO happened only in
samsung tree so arm-soc tree is enough. If any problems, please let me know.

Arnd, just note, the fix is included in my pull-request [09/10].

Thanks.

- Kukjin

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Re: [PATCH 1/3] ARM: dts: Remove keypad entries from exynos4x12-pinctrl.dtsi

2013-04-08 Thread Sachin Kamat
Hi Kukjin,

You seem to have missed out this series from your pull request to arm-soc tree.



On 13 March 2013 10:38, Sachin Kamat sachin.ka...@linaro.org wrote:
 Keypad pins/lines are board specific and should be added to respective
 board dts files.

 Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
 ---
  arch/arm/boot/dts/exynos4x12-pinctrl.dtsi |   56 
 -
  1 files changed, 0 insertions(+), 56 deletions(-)

 diff --git a/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi 
 b/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi
 index 099cec7..704290f 100644
 --- a/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi
 +++ b/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi
 @@ -778,62 +778,6 @@
 samsung,pin-drv = 3;
 };

 -   keypad_col0: keypad-col0 {
 -   samsung,pins = gpl2-0;
 -   samsung,pin-function = 3;
 -   samsung,pin-pud = 0;
 -   samsung,pin-drv = 0;
 -   };
 -
 -   keypad_col1: keypad-col1 {
 -   samsung,pins = gpl2-1;
 -   samsung,pin-function = 3;
 -   samsung,pin-pud = 0;
 -   samsung,pin-drv = 0;
 -   };
 -
 -   keypad_col2: keypad-col2 {
 -   samsung,pins = gpl2-2;
 -   samsung,pin-function = 3;
 -   samsung,pin-pud = 0;
 -   samsung,pin-drv = 0;
 -   };
 -
 -   keypad_col3: keypad-col3 {
 -   samsung,pins = gpl2-3;
 -   samsung,pin-function = 3;
 -   samsung,pin-pud = 0;
 -   samsung,pin-drv = 0;
 -   };
 -
 -   keypad_col4: keypad-col4 {
 -   samsung,pins = gpl2-4;
 -   samsung,pin-function = 3;
 -   samsung,pin-pud = 0;
 -   samsung,pin-drv = 0;
 -   };
 -
 -   keypad_col5: keypad-col5 {
 -   samsung,pins = gpl2-5;
 -   samsung,pin-function = 3;
 -   samsung,pin-pud = 0;
 -   samsung,pin-drv = 0;
 -   };
 -
 -   keypad_col6: keypad-col6 {
 -   samsung,pins = gpl2-6;
 -   samsung,pin-function = 3;
 -   samsung,pin-pud = 0;
 -   samsung,pin-drv = 0;
 -   };
 -
 -   keypad_col7: keypad-col7 {
 -   samsung,pins = gpl2-7;
 -   samsung,pin-function = 3;
 -   samsung,pin-pud = 0;
 -   samsung,pin-drv = 0;
 -   };
 -
 cam_port_b: cam-port-b {
 samsung,pins = gpm0-0, gpm0-1, gpm0-2, gpm0-3,
 gpm0-4, gpm0-5, gpm0-6, 
 gpm0-7,
 --
 1.7.4.1




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With warm regards,
Sachin
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[PATCH RESEND] i2c: s3c2410: Add SMBus emulation for block read

2013-04-08 Thread Prasanna Kumar
From: Jaemin Yoo jmin@samsung.com

SMBus read and write are supported by the emulation layer of i2c
framework if the controller doesn't have SMBus features.

I2C_M_RECV_LEN flag is used to let i2c drivers know rx length is not
yet determined but will be read to the first byte in rx buffer.

s3c2410 doesn't handle this flag. So only one byte is read from slave.
There fore following two features are added to the driver code.

1. skip rx length check if I2C_M_RECV_LEN is set and the length is 1.
2. add actual bytes to the rx length after reading first bytes if
   I2C_M_RECV_LEN.

I2C_M_RECV_LEN is only set for SMBus command. So this code does not
affect legacy codes which only use i2c command for s3c2410.

Signed-off-by: Jaemin Yoo jmin@samsung.com
Signed-off-by: Prasanna Kumar prasanna...@samsung.com
---
 drivers/i2c/busses/i2c-s3c2410.c |9 +
 1 file changed, 9 insertions(+)

diff --git a/drivers/i2c/busses/i2c-s3c2410.c b/drivers/i2c/busses/i2c-s3c2410.c
index 17c5c37..e4ab9ea 100644
--- a/drivers/i2c/busses/i2c-s3c2410.c
+++ b/drivers/i2c/busses/i2c-s3c2410.c
@@ -309,6 +309,12 @@ static inline int is_lastmsg(struct s3c24xx_i2c *i2c)
 
 static inline int is_msglast(struct s3c24xx_i2c *i2c)
 {
+   /* msg-len is always 1 for the first byte of smbus block read.
+* Actual length will be read from slave. More bytes will be
+* read according to the length then. */
+   if (i2c-msg-flags  I2C_M_RECV_LEN  i2c-msg-len == 1)
+   return 0;
+
return i2c-msg_ptr == i2c-msg-len-1;
 }
 
@@ -448,6 +454,9 @@ static int i2c_s3c_irq_nextbyte(struct s3c24xx_i2c *i2c, 
unsigned long iicstat)
byte = readb(i2c-regs + S3C2410_IICDS);
i2c-msg-buf[i2c-msg_ptr++] = byte;
 
+   /* Add actual length to read for smbus block read */
+   if (i2c-msg-flags  I2C_M_RECV_LEN  i2c-msg-len == 1)
+   i2c-msg-len += byte;
  prepare_read:
if (is_msglast(i2c)) {
/* last byte of buffer */
-- 
1.7.10.4

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Re: [PATCH 0/9] thermal: exynos: Add thermal driver for exynos5440

2013-04-08 Thread amit daniel kachhap
Hi Rui,

On Tue, Apr 2, 2013 at 3:56 PM, Kukjin Kim kgene@samsung.com wrote:
 Amit Daniel Kachhap wrote:

 This patchset adds TMU(Thermal management Unit) driver support for
 exynos5440 platform. There are 3 instances of the TMU controllers so
 necessary cleanup is done to handle multiple thermal zone.

 Patch 1 [thermal: exynos: Adapt to temperature emulation core thermal]
 is a re-post of the earlier posted patch,
 https://patchwork.kernel.org/patch/2123131/.


 Looks OK to me on whole series, there is my ack only on 1st patch though.

 So if you want to add my ack, feel free:

 Acked-by: Kukjin Kim kgene@samsung.com

 Thanks.

 - Kukjin

Any comment on this patchset? I know this patch series involves quite
lot of changes but these are important for this merge window. Also
they are now acked by Samsung platform maintainer.

Regards,
Amit Daniel

 All these patches are based on thermal maintainers git tree,
 git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux.git next.

 Amit Daniel Kachhap (9):
   thermal: exynos: Adapt to temperature emulation core thermal
 framework
   thermal: exynos: Add support for instance based register/unregister
   thermal: exynos: Moving into samsung directory for easy maintenance.
   thermal: exynos: Bifurcate exynos thermal common and tmu controller
 code
   thermal: exynos: Make the zone handling dependent on trip count
   thermal: exynos: small cleanups to prepare for adding exynos5440
 driver
   thermal: exynos: Add support for exynos5440 TMU sensor.
   thermal: exynos: Parse the platform data from the device tree.
   ARM: dts: Add device tree node for exynos5440 TMU controller

  .../bindings/thermal/exynos5440-thermal.txt|   93 ++
  Documentation/thermal/exynos_thermal_emulation |8 +-
  arch/arm/boot/dts/exynos5440.dtsi  |   43 +
  drivers/thermal/Kconfig|   22 +-
  drivers/thermal/Makefile   |2 +-
  drivers/thermal/exynos_thermal.c   | 1112
 
  drivers/thermal/samsung/Kconfig|   32 +
  drivers/thermal/samsung/Makefile   |6 +
  drivers/thermal/samsung/exynos4210_thermal.c   |  658 
  drivers/thermal/samsung/exynos5440_thermal.c   |  712 +
  drivers/thermal/samsung/exynos_common.c|  515 +
  drivers/thermal/samsung/exynos_common.h|   74 ++
  include/linux/platform_data/exynos_thermal.h   |   37 +-
  13 files changed, 2163 insertions(+), 1151 deletions(-)
  create mode 100644 Documentation/devicetree/bindings/thermal/exynos5440-
 thermal.txt
  delete mode 100644 drivers/thermal/exynos_thermal.c
  create mode 100644 drivers/thermal/samsung/Kconfig
  create mode 100644 drivers/thermal/samsung/Makefile
  create mode 100644 drivers/thermal/samsung/exynos4210_thermal.c
  create mode 100644 drivers/thermal/samsung/exynos5440_thermal.c
  create mode 100644 drivers/thermal/samsung/exynos_common.c
  create mode 100644 drivers/thermal/samsung/exynos_common.h

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[PATCH v4] mmc: dw_mmc: let device core setup the default pin configuration

2013-04-08 Thread Thomas Abraham
With device core now able to setup the default pin configuration,
the pin configuration code based on the deprecated Samsung specific
gpio bindings is removed.

Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
Acked-by: Linus Walleij linus.wall...@linaro.org
Reviewed-by: Doug Anderson diand...@chromium.org
Tested-by: Doug Anderson diand...@chromium.org
Acked-by: Seungwon Jeon tgih@samsung.com
---
Changes since v3:
- Rebased to the latest mmc-next branch, resolving the compilation
  error with this patch due to changes in commit f2f942ce
  mmc: dw_mmc: Check return value of regulator_enable.
  Thanks to Doug for pointing out this issue with the v3 patch.

 drivers/mmc/host/dw_mmc-exynos.c |   38 --
 drivers/mmc/host/dw_mmc.c|   14 +++---
 drivers/mmc/host/dw_mmc.h|3 ---
 3 files changed, 3 insertions(+), 52 deletions(-)

diff --git a/drivers/mmc/host/dw_mmc-exynos.c b/drivers/mmc/host/dw_mmc-exynos.c
index c7f0976..f013e7e 100644
--- a/drivers/mmc/host/dw_mmc-exynos.c
+++ b/drivers/mmc/host/dw_mmc-exynos.c
@@ -152,43 +152,6 @@ static int dw_mci_exynos_parse_dt(struct dw_mci *host)
return 0;
 }
 
-static int dw_mci_exynos_setup_bus(struct dw_mci *host,
-   struct device_node *slot_np, u8 bus_width)
-{
-   int idx, gpio, ret;
-
-   if (!slot_np)
-   return -EINVAL;
-
-   /* cmd + clock + bus-width pins */
-   for (idx = 0; idx  NUM_PINS(bus_width); idx++) {
-   gpio = of_get_gpio(slot_np, idx);
-   if (!gpio_is_valid(gpio)) {
-   dev_err(host-dev, invalid gpio: %d\n, gpio);
-   return -EINVAL;
-   }
-
-   ret = devm_gpio_request(host-dev, gpio, dw-mci-bus);
-   if (ret) {
-   dev_err(host-dev, gpio [%d] request failed\n, gpio);
-   return -EBUSY;
-   }
-   }
-
-   if (host-pdata-quirks  DW_MCI_QUIRK_BROKEN_CARD_DETECTION)
-   return 0;
-
-   gpio = of_get_named_gpio(slot_np, samsung,cd-pinmux-gpio, 0);
-   if (gpio_is_valid(gpio)) {
-   if (devm_gpio_request(host-dev, gpio, dw-mci-cd))
-   dev_err(host-dev, gpio [%d] request failed\n, gpio);
-   } else {
-   dev_info(host-dev, cd gpio not available);
-   }
-
-   return 0;
-}
-
 /* Common capabilities of Exynos4/Exynos5 SoC */
 static unsigned long exynos_dwmmc_caps[4] = {
MMC_CAP_UHS_DDR50 | MMC_CAP_1_8V_DDR |
@@ -205,7 +168,6 @@ static const struct dw_mci_drv_data exynos_drv_data = {
.prepare_command= dw_mci_exynos_prepare_command,
.set_ios= dw_mci_exynos_set_ios,
.parse_dt   = dw_mci_exynos_parse_dt,
-   .setup_bus  = dw_mci_exynos_setup_bus,
 };
 
 static const struct of_device_id dw_mci_exynos_match[] = {
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index 45d9216..5dcef43 100644
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -1952,14 +1952,6 @@ static int dw_mci_init_slot(struct dw_mci *host, 
unsigned int id)
else
bus_width = 1;
 
-   if (drv_data  drv_data-setup_bus) {
-   struct device_node *slot_np;
-   slot_np = dw_mci_of_find_slot_node(host-dev, slot-id);
-   ret = drv_data-setup_bus(host, slot_np, bus_width);
-   if (ret)
-   goto err_setup_bus;
-   }
-
switch (bus_width) {
case 8:
mmc-caps |= MMC_CAP_8_BIT_DATA;
@@ -2002,7 +1994,7 @@ static int dw_mci_init_slot(struct dw_mci *host, unsigned 
int id)
if (ret) {
dev_err(host-dev,
failed to enable regulator: %d\n, ret);
-   goto err_setup_bus;
+   return ret;
}
}
 
@@ -2015,7 +2007,7 @@ static int dw_mci_init_slot(struct dw_mci *host, unsigned 
int id)
 
ret = mmc_add_host(mmc);
if (ret)
-   goto err_setup_bus;
+   goto err_add_host;
 
 #if defined(CONFIG_DEBUG_FS)
dw_mci_init_debugfs(slot);
@@ -2032,7 +2024,7 @@ static int dw_mci_init_slot(struct dw_mci *host, unsigned 
int id)
 
return 0;
 
-err_setup_bus:
+err_add_host:
mmc_free_host(mmc);
return -EINVAL;
 }
diff --git a/drivers/mmc/host/dw_mmc.h b/drivers/mmc/host/dw_mmc.h
index 53b8fd9..0b74189 100644
--- a/drivers/mmc/host/dw_mmc.h
+++ b/drivers/mmc/host/dw_mmc.h
@@ -190,7 +190,6 @@ extern int dw_mci_resume(struct dw_mci *host);
  * @prepare_command: handle CMD register extensions.
  * @set_ios: handle bus specific extensions.
  * @parse_dt: parse implementation specific device tree properties.
- * @setup_bus: initialize io-interface
  *
  * Provide controller implementation specific extensions. The usage of this
  *