Re: [PATCH v9] i2c: exynos5: add High Speed I2C controller driver
On 17 May 2013 15:40, Naveen Krishna Chatradhi wrote:
> Adds support for High Speed I2C driver found in Exynos5 and
> later SoCs from Samsung.
>
> Driver only supports Device Tree method.
>
> Changes since v1:
> 1. Added FIFO functionality
> 2. Added High speed mode functionality
> 3. Remove SMBUS_QUICK
> 4. Remove the debugfs functionality
> 5. Use devm_* functions where ever possible
> 6. Driver is free from GPIO configs (only supports pinctrl method)
> 7. Use OF data string "clock-frequency" to get the bus operating frequencies
> 8. Split the clock divisor calculation function
> 9. Add resets for the failed transacton cases
> 10. few other bug fixes and cosmetic changes
>
> Signed-off-by: Taekgyun Ko
> Signed-off-by: Naveen Krishna Chatradhi
> Reviewed-by: Simon Glass
> Tested-by: Andrew Bresticker
> Signed-off-by: Yuvaraj Kumar C D
> Signed-off-by: Andrew Bresticker
> ---
>
> Changes since v8
> 1. improved the device tree bindings description page for i2c-exynos5
> 2. fixed the return value check for devm_ioremap_resource
>
> .../devicetree/bindings/i2c/i2c-exynos5.txt| 45 +
> drivers/i2c/busses/Kconfig |7 +
> drivers/i2c/busses/Makefile|1 +
> drivers/i2c/busses/i2c-exynos5.c | 888
>
> 4 files changed, 941 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
> create mode 100644 drivers/i2c/busses/i2c-exynos5.c
>
> diff --git a/Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
> b/Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
> new file mode 100644
> index 000..29c01c0
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
> @@ -0,0 +1,45 @@
> +* Samsung's High Speed I2C controller
> +
> +The Samsung's High Speed I2C controller is used to interface with I2C devices
> +at various speeds ranging from 100khz to 3.4Mhz.
> +
> +Required properties:
> + - compatible: value should be.
> + -> "samsung,exynos5-hsi2c", for i2c compatible with exynos5 hsi2c.
> + - reg: physical base address of the controller and length of memory mapped
> +region.
> + - interrupts: interrupt number to the cpu.
> + - #address-cells: always 1 (for i2c addresses)
> + - #size-cells: always 0
> +
> + - Pinctrl:
> +- pinctrl-0: Pin control group to be used for this controller.
> +- pinctrl-names: Should contain only one value - "default".
> +
> +Optional properties:
> + - samsung,hs-mode: Mode of operation, High speed or Fast speed mode. If not
> +specified, default value is 0.
> + - clock-frequency: Desired operating frequency in Hz of the bus.
> +If not specified, the default value in Hz is 10.
> +
> +Example:
> +
> +hsi2c@12ca {
> + compatible = "samsung,exynos5-hsi2c";
> + reg = <0x12ca 0x100>;
> + interrupts = <56>;
> + clock-frequency = <10>;
> +
> + /* Pinctrl variant begins here */
> + pinctrl-0 = <&i2c4_bus>;
> + pinctrl-names = "default";
> + /* Pinctrl variant ends here */
> +
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + s2mps11_pmic@66 {
> + compatible = "samsung,s2mps11-pmic";
> + reg = <0x66>;
> + };
> +};
> diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
> index adfee98..49a665f 100644
> --- a/drivers/i2c/busses/Kconfig
> +++ b/drivers/i2c/busses/Kconfig
> @@ -434,6 +434,13 @@ config I2C_EG20T
> ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series.
> ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH.
>
> +config I2C_EXYNOS5
> + tristate "Exynos5 high-speed I2C driver"
> + depends on ARCH_EXYNOS5 && OF
> + help
> + Say Y here to include support for high-speed I2C controller in the
> + Exynos5 based Samsung SoCs.
> +
> config I2C_GPIO
> tristate "GPIO-based bitbanging I2C"
> depends on GENERIC_GPIO
> diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
> index 8f4fc23..b19366c 100644
> --- a/drivers/i2c/busses/Makefile
> +++ b/drivers/i2c/busses/Makefile
> @@ -42,6 +42,7 @@ i2c-designware-platform-objs := i2c-designware-platdrv.o
> obj-$(CONFIG_I2C_DESIGNWARE_PCI) += i2c-designware-pci.o
> i2c-designware-pci-objs := i2c-designware-pcidrv.o
> obj-$(CONFIG_I2C_EG20T)+= i2c-eg20t.o
> +obj-$(CONFIG_I2C_EXYNOS5) += i2c-exynos5.o
> obj-$(CONFIG_I2C_GPIO) += i2c-gpio.o
> obj-$(CONFIG_I2C_HIGHLANDER) += i2c-highlander.o
> obj-$(CONFIG_I2C_IBM_IIC) += i2c-ibm_iic.o
> diff --git a/drivers/i2c/busses/i2c-exynos5.c
> b/drivers/i2c/busses/i2c-exynos5.c
> new file mode 100644
> index 000..33c481d
> --- /dev/null
> +++ b/drivers/i2c/busses/i2c-exynos5.c
> @@ -0,0 +1,888 @@
> +/**
> + * i2c-exynos5.c - Samsung Exynos5 I2C Controller Driver
> + *
> + * Copyright (C) 2013 Samsung Electronics Co., Ltd.
Re: [PATCH] iio: exynos_adc: fix wrong structure extration in suspend and resume
On 23 May 2013 02:46, Jonathan Cameron wrote: > On 05/20/2013 06:09 PM, Doug Anderson wrote: >> Naveen, >> >> On Sun, May 19, 2013 at 11:34 PM, Naveen Krishna Chatradhi >> wrote: >>> The exynos_adc device structure was wrongly extracted from the dev* >>> correcting the same. >>> >>> Using the regular conversion of >>> struct device* -> struct platform_device* -> struct exynos_adc* seems wrong. >>> Instead we should be doing >>> struct device* -> struct iio_dev* -> struct exynos_adc* >>> >>> Signed-off-by: Naveen Krishna Chatradhi >>> --- >>> drivers/iio/adc/exynos_adc.c | 8 >>> 1 file changed, 4 insertions(+), 4 deletions(-) >> >> Reviewed-by: Doug Anderson > Applied to the fixes-togreg branch of iio.git > I'll hopefully send these on to Greg before the weekend. Jonathan, I would like to know any comments on https://patchwork.kernel.org/patch/2513361/ Its been pending for a while now. Thanks, Naveen >> -- >> To unsubscribe from this list: send the line "unsubscribe linux-iio" in >> the body of a message to majord...@vger.kernel.org >> More majordomo info at http://vger.kernel.org/majordomo-info.html >> -- Shine bright, (: Nav :) -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH] ARM: EXYNOS: Fix support of Exynos4210 rev0 SoC
Kukjin Kim wrote: > > Tomasz Figa wrote: > > > > Hi Kukjin, > > > Hi, > > > On Wednesday 15 of May 2013 17:08:04 Tomasz Figa wrote: > > > This patch extends exynos_init_time() function to handle Exynos4210 > rev0 > > > SoC, which differs in availability of system timers and needs > different > > > clocksource initialization. > > > > > > This makes it possible to use exynos_init_time() function as init_time > > > callback for all Exynos-based boards, including Universal_C210, which > > > originally had to use samsung_timer_init(). > > > > > > Signed-off-by: Tomasz Figa > > > Signed-off-by: Kyungmin Park > > > --- > > > arch/arm/mach-exynos/Kconfig | 3 ++- > > > arch/arm/mach-exynos/common.c | 30 > > > +- arch/arm/mach-exynos/common.h > > > | 2 ++ > > > arch/arm/mach-exynos/mach-universal_c210.c | 5 ++--- > > > 4 files changed, 35 insertions(+), 5 deletions(-) > > > > Could you pick this patch to your fixes branch? > > > Yeah, I will after looking at. > > > This is a fix of a regression in handling Exynos4210 rev0 SoC (e.g. > > Universal C210 board) introduced by patches merged to 3.10. > > > OK, I see but I didn't review yet and I will within a couple of days ;-) > OK, looks fine, this will be sent to upstream during -rc for v3.10. But, Tomasz, as you know, non-DT supporting files will be gone away in v3.11, just note. Thanks. - Kukjin -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] iio: exynos_adc: fix wrong structure extration in suspend and resume
On 05/20/2013 06:09 PM, Doug Anderson wrote: > Naveen, > > On Sun, May 19, 2013 at 11:34 PM, Naveen Krishna Chatradhi > wrote: >> The exynos_adc device structure was wrongly extracted from the dev* >> correcting the same. >> >> Using the regular conversion of >> struct device* -> struct platform_device* -> struct exynos_adc* seems wrong. >> Instead we should be doing >> struct device* -> struct iio_dev* -> struct exynos_adc* >> >> Signed-off-by: Naveen Krishna Chatradhi >> --- >> drivers/iio/adc/exynos_adc.c | 8 >> 1 file changed, 4 insertions(+), 4 deletions(-) > > Reviewed-by: Doug Anderson Applied to the fixes-togreg branch of iio.git I'll hopefully send these on to Greg before the weekend. > -- > To unsubscribe from this list: send the line "unsubscribe linux-iio" in > the body of a message to majord...@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html > -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 6/6] pinctrl: exynos: Handle suspend/resume of GPIO EINT registers
Tomasz,
On Wed, May 22, 2013 at 7:03 AM, Tomasz Figa wrote:
> Some GPIO EINT control registers needs to be preserved across
> suspend/resume cycle. This patch extends the driver to take care of
> this.
>
> Signed-off-by: Tomasz Figa
> Signed-off-by: Kyungmin Park
> ---
>
> Changes since v2:
> - Fixed error path
> Changes since v1:
> - Added optional debugging messages
> - Added proper error path in initialization
>
> drivers/pinctrl/pinctrl-exynos.c | 116
> ++-
> drivers/pinctrl/pinctrl-exynos.h | 1 +
> 2 files changed, 114 insertions(+), 3 deletions(-)
Looks good to me. Thanks!
Good thing I tried the printouts too--they pointed to the fact that
"git am" had somehow applied part 4 ("Add support for SoC-specific
suspend/resume callbacks") incorrectly and with no warning! It had
put the resume() call at the beginning of the suspend function.
Weird. I had to fall back to using "patch -p1 to apply". :-/
On exynos5250-snow (pinmux backported to 3.8):
Tested-by: Doug Anderson
Reviewed-by: Doug Anderson
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[PATCH v3 6/6] pinctrl: exynos: Handle suspend/resume of GPIO EINT registers
Some GPIO EINT control registers needs to be preserved across
suspend/resume cycle. This patch extends the driver to take care of
this.
Signed-off-by: Tomasz Figa
Signed-off-by: Kyungmin Park
---
Changes since v2:
- Fixed error path
Changes since v1:
- Added optional debugging messages
- Added proper error path in initialization
drivers/pinctrl/pinctrl-exynos.c | 116 ++-
drivers/pinctrl/pinctrl-exynos.h | 1 +
2 files changed, 114 insertions(+), 3 deletions(-)
diff --git a/drivers/pinctrl/pinctrl-exynos.c b/drivers/pinctrl/pinctrl-exynos.c
index 4f868e5..2d76f66 100644
--- a/drivers/pinctrl/pinctrl-exynos.c
+++ b/drivers/pinctrl/pinctrl-exynos.c
@@ -196,6 +196,12 @@ static irqreturn_t exynos_eint_gpio_irq(int irq, void
*data)
return IRQ_HANDLED;
}
+struct exynos_eint_gpio_save {
+ u32 eint_con;
+ u32 eint_fltcon0;
+ u32 eint_fltcon1;
+};
+
/*
* exynos_eint_gpio_init() - setup handling of external gpio interrupts.
* @d: driver data of samsung pinctrl driver.
@@ -204,8 +210,8 @@ static int exynos_eint_gpio_init(struct
samsung_pinctrl_drv_data *d)
{
struct samsung_pin_bank *bank;
struct device *dev = d->dev;
- unsigned int ret;
- unsigned int i;
+ int ret;
+ int i;
if (!d->irq) {
dev_err(dev, "irq number not available\n");
@@ -227,11 +233,29 @@ static int exynos_eint_gpio_init(struct
samsung_pinctrl_drv_data *d)
bank->nr_pins, &exynos_gpio_irqd_ops, bank);
if (!bank->irq_domain) {
dev_err(dev, "gpio irq domain add failed\n");
- return -ENXIO;
+ ret = -ENXIO;
+ goto err_domains;
+ }
+
+ bank->soc_priv = devm_kzalloc(d->dev,
+ sizeof(struct exynos_eint_gpio_save), GFP_KERNEL);
+ if (!bank->soc_priv) {
+ irq_domain_remove(bank->irq_domain);
+ ret = -ENOMEM;
+ goto err_domains;
}
}
return 0;
+
+err_domains:
+ for (--i, --bank; i >= 0; --i, --bank) {
+ if (bank->eint_type != EINT_TYPE_GPIO)
+ continue;
+ irq_domain_remove(bank->irq_domain);
+ }
+
+ return ret;
}
static void exynos_wkup_irq_unmask(struct irq_data *irqd)
@@ -528,6 +552,72 @@ static int exynos_eint_wkup_init(struct
samsung_pinctrl_drv_data *d)
return 0;
}
+static void exynos_pinctrl_suspend_bank(
+ struct samsung_pinctrl_drv_data *drvdata,
+ struct samsung_pin_bank *bank)
+{
+ struct exynos_eint_gpio_save *save = bank->soc_priv;
+ void __iomem *regs = drvdata->virt_base;
+
+ save->eint_con = readl(regs + EXYNOS_GPIO_ECON_OFFSET
+ + bank->eint_offset);
+ save->eint_fltcon0 = readl(regs + EXYNOS_GPIO_EFLTCON_OFFSET
+ + 2 * bank->eint_offset);
+ save->eint_fltcon1 = readl(regs + EXYNOS_GPIO_EFLTCON_OFFSET
+ + 2 * bank->eint_offset + 4);
+
+ pr_debug("%s: save con %#010x\n", bank->name, save->eint_con);
+ pr_debug("%s: save fltcon0 %#010x\n", bank->name, save->eint_fltcon0);
+ pr_debug("%s: save fltcon1 %#010x\n", bank->name, save->eint_fltcon1);
+}
+
+static void exynos_pinctrl_suspend(struct samsung_pinctrl_drv_data *drvdata)
+{
+ struct samsung_pin_ctrl *ctrl = drvdata->ctrl;
+ struct samsung_pin_bank *bank = ctrl->pin_banks;
+ int i;
+
+ for (i = 0; i < ctrl->nr_banks; ++i, ++bank)
+ if (bank->eint_type == EINT_TYPE_GPIO)
+ exynos_pinctrl_suspend_bank(drvdata, bank);
+}
+
+static void exynos_pinctrl_resume_bank(
+ struct samsung_pinctrl_drv_data *drvdata,
+ struct samsung_pin_bank *bank)
+{
+ struct exynos_eint_gpio_save *save = bank->soc_priv;
+ void __iomem *regs = drvdata->virt_base;
+
+ pr_debug("%s: con %#010x => %#010x\n", bank->name,
+ readl(regs + EXYNOS_GPIO_ECON_OFFSET
+ + bank->eint_offset), save->eint_con);
+ pr_debug("%s: fltcon0 %#010x => %#010x\n", bank->name,
+ readl(regs + EXYNOS_GPIO_EFLTCON_OFFSET
+ + 2 * bank->eint_offset), save->eint_fltcon0);
+ pr_debug("%s: fltcon1 %#010x => %#010x\n", bank->name,
+ readl(regs + EXYNOS_GPIO_EFLTCON_OFFSET
+ + 2 * bank->eint_offset + 4), save->eint_fltcon1);
+
+ writel(save->eint_con, regs + EXYNOS_GPIO_ECON_OFFSET
+ + bank->eint_offset);
+ writel(save->eint_fltcon0, regs + EXYNOS_GPI
Re: [PATCH v2 6/6] pinctrl: exynos: Handle suspend/resume of GPIO EINT registers
On Tuesday 21 of May 2013 21:46:35 Doug Anderson wrote:
> Tomasz,
>
> On Tue, May 21, 2013 at 10:05 AM, Tomasz Figa wrote:
> > return 0;
> >
> > +
> > +err_domains:
> > + bank = d->ctrl->pin_banks;
> > + for (undo = 0; undo < i; ++undo) {
>
> ++bank is missing, I think. This will free the same bank many times.
Shit, this is what happens when you post patches so late and in a hurry. Will
send something sane in a while.
> optional: could also avoid extra 'undo' variable and remove in reverse
> order by changing i to signed and counting down to 0.
Sure.
Best regards,
Tomasz
> -Doug
> --
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[PATCH] ARM: EXYNOS: add __cpuinit annotation to write_pen_release()
The variable __cpuinitdata pen_release is referenced by write_pen_release().
Also, write_pen_release() is called by exynos_secondary_init() which is
annotated with __cpuinit. Thus, __cpuinit should be added write_pen_release()
to fix section mismatch warning.
Fixed section mismatch warning as below:
WARNING: vmlinux.o(.text.unlikely+0x1f4): Section mismatch in reference from
the function write_pen_release() to the variable
.cpuinit.data:pen_release
The function write_pen_release() references the variable __cpuinitdata
pen_release.
This is often because write_pen_release lacks a __cpuinitdata annotation or
the annotation of pen_release is wrong.
Signed-off-by: Jingoo Han
---
arch/arm/mach-exynos/platsmp.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index a0e8ff7..9676af2 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -58,7 +58,7 @@ static inline void __iomem *cpu_boot_reg(int cpu)
* observers, irrespective of whether they're taking part in coherency
* or not. This is necessary for the hotplug code to work reliably.
*/
-static void write_pen_release(int val)
+static void __cpuinit write_pen_release(int val)
{
pen_release = val;
smp_wmb();
--
1.7.10.4
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