[PATCH V6 03/30] thermal: exynos: Remove un-necessary CPU_THERMAL dependency
This patch removes the dependency on CPU_THERMAL for compiling TMU driver. This is useful for cases when only TMU controller needs to be initialised without cpu cooling action. Acked-by: Kukjin Kim Acked-by: Jonghwa Lee Signed-off-by: Amit Daniel Kachhap --- drivers/thermal/samsung/Kconfig |1 - 1 files changed, 0 insertions(+), 1 deletions(-) diff --git a/drivers/thermal/samsung/Kconfig b/drivers/thermal/samsung/Kconfig index 883a8a8..2cf31ad 100644 --- a/drivers/thermal/samsung/Kconfig +++ b/drivers/thermal/samsung/Kconfig @@ -1,7 +1,6 @@ config EXYNOS_THERMAL tristate "Temperature sensor on Samsung EXYNOS" depends on ARCH_HAS_BANDGAP - depends on CPU_THERMAL help If you say yes here you get support for TMU (Thermal Management Unit) on SAMSUNG EXYNOS series of SoC. This helps in registering -- 1.7.1 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH V6 04/30] thermal: exynos: Bifurcate exynos thermal common and tmu controller code
This code bifurcates exynos thermal implementation into common and sensor
specific parts. The common thermal code interacts with core thermal layer and
core cpufreq cooling parts and is independent of SOC specific driver. This
change is needed to cleanly add support for new TMU sensors.
Acked-by: Kukjin Kim
Acked-by: Jonghwa Lee
Signed-off-by: Amit Daniel Kachhap
---
drivers/thermal/samsung/Kconfig | 19 +-
drivers/thermal/samsung/Makefile|4 +-
drivers/thermal/samsung/exynos_thermal.c| 419 +--
drivers/thermal/samsung/exynos_thermal_common.c | 384 +
drivers/thermal/samsung/exynos_thermal_common.h | 83 +
5 files changed, 490 insertions(+), 419 deletions(-)
create mode 100644 drivers/thermal/samsung/exynos_thermal_common.c
create mode 100644 drivers/thermal/samsung/exynos_thermal_common.h
diff --git a/drivers/thermal/samsung/Kconfig b/drivers/thermal/samsung/Kconfig
index 2cf31ad..f8100b1 100644
--- a/drivers/thermal/samsung/Kconfig
+++ b/drivers/thermal/samsung/Kconfig
@@ -1,8 +1,17 @@
config EXYNOS_THERMAL
- tristate "Temperature sensor on Samsung EXYNOS"
+ tristate "Exynos thermal management unit driver"
depends on ARCH_HAS_BANDGAP
help
- If you say yes here you get support for TMU (Thermal Management
- Unit) on SAMSUNG EXYNOS series of SoC. This helps in registering
- the exynos thermal driver with the core thermal layer and cpu
- cooling API's.
+ If you say yes here you get support for the TMU (Thermal Management
+ Unit) driver for SAMSUNG EXYNOS series of soc. This driver initialises
+ the TMU, reports temperature and handles cooling action if defined.
+ This driver uses the exynos core thermal API's.
+
+config EXYNOS_THERMAL_CORE
+ bool "Core thermal framework support for EXYNOS SOC's"
+ depends on EXYNOS_THERMAL
+ help
+ If you say yes here you get support for EXYNOS TMU
+ (Thermal Management Unit) common registration/unregistration
+ functions to the core thermal layer and also to use the generic
+ cpu cooling API's.
diff --git a/drivers/thermal/samsung/Makefile b/drivers/thermal/samsung/Makefile
index 1fe6d93..6227d4f 100644
--- a/drivers/thermal/samsung/Makefile
+++ b/drivers/thermal/samsung/Makefile
@@ -1,4 +1,6 @@
#
# Samsung thermal specific Makefile
#
-obj-$(CONFIG_EXYNOS_THERMAL) += exynos_thermal.o
+obj-$(CONFIG_EXYNOS_THERMAL) += exynos_soc_thermal.o
+exynos_soc_thermal-y := exynos_thermal.o
+exynos_soc_thermal-$(CONFIG_EXYNOS_THERMAL_CORE) += exynos_thermal_common.o
diff --git a/drivers/thermal/samsung/exynos_thermal.c
b/drivers/thermal/samsung/exynos_thermal.c
index 03e4bbc..5293849 100644
--- a/drivers/thermal/samsung/exynos_thermal.c
+++ b/drivers/thermal/samsung/exynos_thermal.c
@@ -21,23 +21,15 @@
*
*/
-#include
-#include
-#include
-#include
-#include
-#include
#include
-#include
-#include
-#include
#include
-#include
-#include
-#include
-#include
-#include
+#include
+#include
#include
+#include
+#include
+
+#include "exynos_thermal_common.h"
/* Exynos generic registers */
#define EXYNOS_TMU_REG_TRIMINFO0x0
@@ -88,16 +80,6 @@
#define EFUSE_MIN_VALUE 40
#define EFUSE_MAX_VALUE 100
-/* In-kernel thermal framework related macros & definations */
-#define SENSOR_NAME_LEN16
-#define MAX_TRIP_COUNT 8
-#define MAX_COOLING_DEVICE 4
-#define MAX_THRESHOLD_LEVS 4
-
-#define ACTIVE_INTERVAL 500
-#define IDLE_INTERVAL 1
-#define MCELSIUS 1000
-
#ifdef CONFIG_THERMAL_EMULATION
#define EXYNOS_EMUL_TIME 0x57F0
#define EXYNOS_EMUL_TIME_SHIFT 16
@@ -106,17 +88,6 @@
#define EXYNOS_EMUL_ENABLE 0x1
#endif /* CONFIG_THERMAL_EMULATION */
-/* CPU Zone information */
-#define PANIC_ZONE 4
-#define WARN_ZONE 3
-#define MONITOR_ZONE2
-#define SAFE_ZONE 1
-
-#define GET_ZONE(trip) (trip + 2)
-#define GET_TRIP(zone) (zone - 2)
-
-#define EXYNOS_ZONE_COUNT 3
-
struct exynos_tmu_data {
struct exynos_tmu_platform_data *pdata;
struct resource *mem;
@@ -129,384 +100,6 @@ struct exynos_tmu_data {
u8 temp_error1, temp_error2;
};
-struct thermal_trip_point_conf {
- int trip_val[MAX_TRIP_COUNT];
- int trip_count;
- u8 trigger_falling;
-};
-
-struct thermal_cooling_conf {
- struct freq_clip_table freq_data[MAX_TRIP_COUNT];
- int freq_clip_count;
-};
-
-struct thermal_sensor_conf {
- char name[SENSOR_NAME_LEN];
- int (*read_temperature)(void *data);
- int (*write_emul_temp)(void *drv_data, unsigned long temp);
- struct thermal_trip_point_conf trip_data;
- struct thermal_cooling_conf cooling_data;
- void *private_data;
-};
-
-struct exynos_thermal_zone {
- enum thermal_device_mode mode;
- struct thermal_zone_device
[PATCH V6 01/30] thermal: exynos: Moving exynos thermal files into samsung directory
This movement of files is done for easy maintenance and adding more
new sensor's support for exynos platform easily . This will also help in
bifurcating exynos common, sensor driver and sensor data related parts.
Acked-by: Kukjin Kim
Acked-by: Jonghwa Lee
Signed-off-by: Amit Daniel Kachhap
---
drivers/thermal/Kconfig| 13 +
drivers/thermal/Makefile |2 +-
drivers/thermal/samsung/Kconfig|9 +
drivers/thermal/samsung/Makefile |4
drivers/thermal/{ => samsung}/exynos_thermal.c |0
5 files changed, 19 insertions(+), 9 deletions(-)
create mode 100644 drivers/thermal/samsung/Kconfig
create mode 100644 drivers/thermal/samsung/Makefile
rename drivers/thermal/{ => samsung}/exynos_thermal.c (100%)
diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
index b13c2bc..ef10cf2 100644
--- a/drivers/thermal/Kconfig
+++ b/drivers/thermal/Kconfig
@@ -114,14 +114,6 @@ config KIRKWOOD_THERMAL
Support for the Kirkwood thermal sensor driver into the Linux thermal
framework. Only kirkwood 88F6282 and 88F6283 have this sensor.
-config EXYNOS_THERMAL
- tristate "Temperature sensor on Samsung EXYNOS"
- depends on (ARCH_EXYNOS4 || ARCH_EXYNOS5)
- depends on CPU_THERMAL
- help
- If you say yes here you get support for TMU (Thermal Management
- Unit) on SAMSUNG EXYNOS series of SoC.
-
config DOVE_THERMAL
tristate "Temperature sensor on Marvell Dove SoCs"
depends on ARCH_DOVE
@@ -185,4 +177,9 @@ menu "Texas Instruments thermal drivers"
source "drivers/thermal/ti-soc-thermal/Kconfig"
endmenu
+menu "Samsung thermal drivers"
+depends on PLAT_SAMSUNG
+source "drivers/thermal/samsung/Kconfig"
+endmenu
+
endif
diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
index 67184a2..1f27ada 100644
--- a/drivers/thermal/Makefile
+++ b/drivers/thermal/Makefile
@@ -17,7 +17,7 @@ thermal_sys-$(CONFIG_CPU_THERMAL) += cpu_cooling.o
obj-$(CONFIG_SPEAR_THERMAL)+= spear_thermal.o
obj-$(CONFIG_RCAR_THERMAL) += rcar_thermal.o
obj-$(CONFIG_KIRKWOOD_THERMAL) += kirkwood_thermal.o
-obj-$(CONFIG_EXYNOS_THERMAL) += exynos_thermal.o
+obj-y += samsung/
obj-$(CONFIG_DOVE_THERMAL) += dove_thermal.o
obj-$(CONFIG_DB8500_THERMAL) += db8500_thermal.o
obj-$(CONFIG_ARMADA_THERMAL) += armada_thermal.o
diff --git a/drivers/thermal/samsung/Kconfig b/drivers/thermal/samsung/Kconfig
new file mode 100644
index 000..2d3d9dc
--- /dev/null
+++ b/drivers/thermal/samsung/Kconfig
@@ -0,0 +1,9 @@
+config EXYNOS_THERMAL
+ tristate "Temperature sensor on Samsung EXYNOS"
+ depends on (ARCH_EXYNOS4 || ARCH_EXYNOS5)
+ depends on CPU_THERMAL
+ help
+ If you say yes here you get support for TMU (Thermal Management
+ Unit) on SAMSUNG EXYNOS series of SoC. This helps in registering
+ the exynos thermal driver with the core thermal layer and cpu
+ cooling API's.
diff --git a/drivers/thermal/samsung/Makefile b/drivers/thermal/samsung/Makefile
new file mode 100644
index 000..1fe6d93
--- /dev/null
+++ b/drivers/thermal/samsung/Makefile
@@ -0,0 +1,4 @@
+#
+# Samsung thermal specific Makefile
+#
+obj-$(CONFIG_EXYNOS_THERMAL) += exynos_thermal.o
diff --git a/drivers/thermal/exynos_thermal.c
b/drivers/thermal/samsung/exynos_thermal.c
similarity index 100%
rename from drivers/thermal/exynos_thermal.c
rename to drivers/thermal/samsung/exynos_thermal.c
--
1.7.1
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[PATCH V6 02/30] thermal: exynos: Use ARCH_HAS_BANDGAP config to know the supported soc's
This patch uses the recently added config sybmol ARCH_HAS_BANDGAP to enable the TMU driver. This will allow adding support for new soc easily as now it is the platform responsibility to enable this config symbol for a particular soc. Acked-by: Kukjin Kim Acked-by: Jonghwa Lee Signed-off-by: Amit Daniel Kachhap --- drivers/thermal/samsung/Kconfig |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/thermal/samsung/Kconfig b/drivers/thermal/samsung/Kconfig index 2d3d9dc..883a8a8 100644 --- a/drivers/thermal/samsung/Kconfig +++ b/drivers/thermal/samsung/Kconfig @@ -1,6 +1,6 @@ config EXYNOS_THERMAL tristate "Temperature sensor on Samsung EXYNOS" - depends on (ARCH_EXYNOS4 || ARCH_EXYNOS5) + depends on ARCH_HAS_BANDGAP depends on CPU_THERMAL help If you say yes here you get support for TMU (Thermal Management -- 1.7.1 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH V6 06/30] thermal: exynos: Move exynos_thermal.h from include/* to driver/* folder
This patch renames and moves include/linux/platform_data/exynos_thermal.h to
drivers/thermal/samsung/exynos_tmu.h. This file movement is needed as exynos
SOC's are not supporting non-DT based platforms and this file now just contains
exynos tmu driver related definations.
Also struct freq_clip_table is now moved to exynos_thermal_common.c as it fixes
the compilation issue occuring because now this new tmu header file is included
in tmu driver c file and not in the common thermal header file.
Acked-by: Kukjin Kim
Acked-by: Jonghwa Lee
Signed-off-by: Amit Daniel Kachhap
---
drivers/thermal/samsung/exynos_thermal_common.c|1 -
drivers/thermal/samsung/exynos_thermal_common.h| 15
drivers/thermal/samsung/exynos_tmu.c |2 +-
.../thermal/samsung/exynos_tmu.h | 24 ---
4 files changed, 21 insertions(+), 21 deletions(-)
rename include/linux/platform_data/exynos_thermal.h =>
drivers/thermal/samsung/exynos_tmu.h (84%)
diff --git a/drivers/thermal/samsung/exynos_thermal_common.c
b/drivers/thermal/samsung/exynos_thermal_common.c
index 92e50bc..dd49c9f 100644
--- a/drivers/thermal/samsung/exynos_thermal_common.c
+++ b/drivers/thermal/samsung/exynos_thermal_common.c
@@ -21,7 +21,6 @@
*/
#include
-#include
#include
#include
diff --git a/drivers/thermal/samsung/exynos_thermal_common.h
b/drivers/thermal/samsung/exynos_thermal_common.h
index 8df1848..068f56c 100644
--- a/drivers/thermal/samsung/exynos_thermal_common.h
+++ b/drivers/thermal/samsung/exynos_thermal_common.h
@@ -44,6 +44,21 @@
#define EXYNOS_ZONE_COUNT 3
+/**
+ * struct freq_clip_table
+ * @freq_clip_max: maximum frequency allowed for this cooling state.
+ * @temp_level: Temperature level at which the temperature clipping will
+ * happen.
+ * @mask_val: cpumask of the allowed cpu's where the clipping will take place.
+ *
+ * This structure is required to be filled and passed to the
+ * cpufreq_cooling_unregister function.
+ */
+struct freq_clip_table {
+ unsigned int freq_clip_max;
+ unsigned int temp_level;
+ const struct cpumask *mask_val;
+};
struct thermal_trip_point_conf {
int trip_val[MAX_TRIP_COUNT];
int trip_count;
diff --git a/drivers/thermal/samsung/exynos_tmu.c
b/drivers/thermal/samsung/exynos_tmu.c
index 22a8874..6aa2fd2 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -27,9 +27,9 @@
#include
#include
#include
-#include
#include "exynos_thermal_common.h"
+#include "exynos_tmu.h"
/* Exynos generic registers */
#define EXYNOS_TMU_REG_TRIMINFO0x0
diff --git a/include/linux/platform_data/exynos_thermal.h
b/drivers/thermal/samsung/exynos_tmu.h
similarity index 84%
rename from include/linux/platform_data/exynos_thermal.h
rename to drivers/thermal/samsung/exynos_tmu.h
index da7e627..9e0f887 100644
--- a/include/linux/platform_data/exynos_thermal.h
+++ b/drivers/thermal/samsung/exynos_tmu.h
@@ -1,8 +1,9 @@
/*
- * exynos_thermal.h - Samsung EXYNOS TMU (Thermal Management Unit)
+ * exynos_tmu.h - Samsung EXYNOS TMU (Thermal Management Unit)
*
* Copyright (C) 2011 Samsung Electronics
* Donggeun Kim
+ * Amit Daniel Kachhap
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -19,8 +20,8 @@
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
-#ifndef _LINUX_EXYNOS_THERMAL_H
-#define _LINUX_EXYNOS_THERMAL_H
+#ifndef _EXYNOS_TMU_H
+#define _EXYNOS_TMU_H
#include
enum calibration_type {
@@ -33,21 +34,6 @@ enum soc_type {
SOC_ARCH_EXYNOS4210 = 1,
SOC_ARCH_EXYNOS,
};
-/**
- * struct freq_clip_table
- * @freq_clip_max: maximum frequency allowed for this cooling state.
- * @temp_level: Temperature level at which the temperature clipping will
- * happen.
- * @mask_val: cpumask of the allowed cpu's where the clipping will take place.
- *
- * This structure is required to be filled and passed to the
- * cpufreq_cooling_unregister function.
- */
-struct freq_clip_table {
- unsigned int freq_clip_max;
- unsigned int temp_level;
- const struct cpumask *mask_val;
-};
/**
* struct exynos_tmu_platform_data
@@ -116,4 +102,4 @@ struct exynos_tmu_platform_data {
struct freq_clip_table freq_tab[4];
unsigned int freq_tab_count;
};
-#endif /* _LINUX_EXYNOS_THERMAL_H */
+#endif /* _EXYNOS_TMU_H */
--
1.7.1
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[PATCH V6 05/30] thermal: exynos: Rename exynos_thermal.c to exynos_tmu.c
This patch renames exynos_thermal.c to exynos_tmu.c. This change is needed as
this file now just contains exynos tmu driver related codes and thermal zone
or cpufreq cooling registration related changes are not there anymore.
Acked-by: Kukjin Kim
Acked-by: Eduardo Valentin
Acked-by: Jonghwa Lee
Signed-off-by: Amit Daniel Kachhap
---
drivers/thermal/samsung/Makefile |6 +++---
.../samsung/{exynos_thermal.c => exynos_tmu.c} |2 +-
2 files changed, 4 insertions(+), 4 deletions(-)
rename drivers/thermal/samsung/{exynos_thermal.c => exynos_tmu.c} (99%)
diff --git a/drivers/thermal/samsung/Makefile b/drivers/thermal/samsung/Makefile
index 6227d4f..22528d6 100644
--- a/drivers/thermal/samsung/Makefile
+++ b/drivers/thermal/samsung/Makefile
@@ -1,6 +1,6 @@
#
# Samsung thermal specific Makefile
#
-obj-$(CONFIG_EXYNOS_THERMAL) += exynos_soc_thermal.o
-exynos_soc_thermal-y := exynos_thermal.o
-exynos_soc_thermal-$(CONFIG_EXYNOS_THERMAL_CORE) += exynos_thermal_common.o
+obj-$(CONFIG_EXYNOS_THERMAL) += exynos_thermal.o
+exynos_thermal-y := exynos_tmu.o
+exynos_thermal-$(CONFIG_EXYNOS_THERMAL_CORE) += exynos_thermal_common.o
diff --git a/drivers/thermal/samsung/exynos_thermal.c
b/drivers/thermal/samsung/exynos_tmu.c
similarity index 99%
rename from drivers/thermal/samsung/exynos_thermal.c
rename to drivers/thermal/samsung/exynos_tmu.c
index 5293849..22a8874 100644
--- a/drivers/thermal/samsung/exynos_thermal.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -1,5 +1,5 @@
/*
- * exynos_thermal.c - Samsung EXYNOS TMU (Thermal Management Unit)
+ * exynos_tmu.c - Samsung EXYNOS TMU (Thermal Management Unit)
*
* Copyright (C) 2011 Samsung Electronics
* Donggeun Kim
--
1.7.1
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[PATCH V6 08/30] thermal: exynos: Add missing definations and code cleanup
This patch adds some extra register bitfield definations and cleans
up the code to prepare for moving register macros and definations inside
the TMU data section.
Acked-by: Kukjin Kim
Acked-by: Jonghwa Lee
Signed-off-by: Amit Daniel Kachhap
---
drivers/thermal/samsung/exynos_tmu.c | 62 +-
1 files changed, 46 insertions(+), 16 deletions(-)
diff --git a/drivers/thermal/samsung/exynos_tmu.c
b/drivers/thermal/samsung/exynos_tmu.c
index 5df04a1..fa33a48 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -43,9 +43,12 @@
#define EXYNOS_TMU_TRIM_TEMP_MASK 0xff
#define EXYNOS_TMU_GAIN_SHIFT 8
+#define EXYNOS_TMU_GAIN_MASK 0xf
#define EXYNOS_TMU_REF_VOLTAGE_SHIFT 24
-#define EXYNOS_TMU_CORE_ON 3
-#define EXYNOS_TMU_CORE_OFF2
+#define EXYNOS_TMU_REF_VOLTAGE_MASK0x1f
+#define EXYNOS_TMU_BUF_SLOPE_SEL_MASK 0xf
+#define EXYNOS_TMU_BUF_SLOPE_SEL_SHIFT 8
+#define EXYNOS_TMU_CORE_EN_SHIFT 0
#define EXYNOS_TMU_DEF_CODE_TO_TEMP_OFFSET 50
/* Exynos4210 specific registers */
@@ -63,6 +66,7 @@
#define EXYNOS4210_TMU_TRIG_LEVEL1_MASK0x10
#define EXYNOS4210_TMU_TRIG_LEVEL2_MASK0x100
#define EXYNOS4210_TMU_TRIG_LEVEL3_MASK0x1000
+#define EXYNOS4210_TMU_TRIG_LEVEL_MASK 0x
#define EXYNOS4210_TMU_INTCLEAR_VAL0x
/* Exynos5250 and Exynos4412 specific registers */
@@ -72,17 +76,30 @@
#define EXYNOS_EMUL_CON0x80
#define EXYNOS_TRIMINFO_RELOAD 0x1
+#define EXYNOS_TRIMINFO_SHIFT 0x0
+#define EXYNOS_TMU_RISE_INT_MASK 0x111
+#define EXYNOS_TMU_RISE_INT_SHIFT 0
+#define EXYNOS_TMU_FALL_INT_MASK 0x111
+#define EXYNOS_TMU_FALL_INT_SHIFT 12
#define EXYNOS_TMU_CLEAR_RISE_INT 0x111
#define EXYNOS_TMU_CLEAR_FALL_INT (0x111 << 12)
-#define EXYNOS_MUX_ADDR_VALUE 6
-#define EXYNOS_MUX_ADDR_SHIFT 20
#define EXYNOS_TMU_TRIP_MODE_SHIFT 13
+#define EXYNOS_TMU_TRIP_MODE_MASK 0x7
+
+#define EXYNOS_TMU_INTEN_RISE0_SHIFT 0
+#define EXYNOS_TMU_INTEN_RISE1_SHIFT 4
+#define EXYNOS_TMU_INTEN_RISE2_SHIFT 8
+#define EXYNOS_TMU_INTEN_RISE3_SHIFT 12
+#define EXYNOS_TMU_INTEN_FALL0_SHIFT 16
+#define EXYNOS_TMU_INTEN_FALL1_SHIFT 20
+#define EXYNOS_TMU_INTEN_FALL2_SHIFT 24
#define EFUSE_MIN_VALUE 40
#define EFUSE_MAX_VALUE 100
#ifdef CONFIG_THERMAL_EMULATION
#define EXYNOS_EMUL_TIME 0x57F0
+#define EXYNOS_EMUL_TIME_MASK 0x
#define EXYNOS_EMUL_TIME_SHIFT 16
#define EXYNOS_EMUL_DATA_SHIFT 8
#define EXYNOS_EMUL_DATA_MASK 0xFF
@@ -261,24 +278,37 @@ static void exynos_tmu_control(struct platform_device
*pdev, bool on)
mutex_lock(&data->lock);
clk_enable(data->clk);
- con = pdata->reference_voltage << EXYNOS_TMU_REF_VOLTAGE_SHIFT |
- pdata->gain << EXYNOS_TMU_GAIN_SHIFT;
+ con = readl(data->base + EXYNOS_TMU_REG_CONTROL);
- if (data->soc == SOC_ARCH_EXYNOS) {
- con |= pdata->noise_cancel_mode << EXYNOS_TMU_TRIP_MODE_SHIFT;
- con |= (EXYNOS_MUX_ADDR_VALUE << EXYNOS_MUX_ADDR_SHIFT);
+ if (pdata->reference_voltage) {
+ con &= ~(EXYNOS_TMU_REF_VOLTAGE_MASK <<
+ EXYNOS_TMU_REF_VOLTAGE_SHIFT);
+ con |= pdata->reference_voltage << EXYNOS_TMU_REF_VOLTAGE_SHIFT;
+ }
+
+ if (pdata->gain) {
+ con &= ~(EXYNOS_TMU_GAIN_MASK << EXYNOS_TMU_GAIN_SHIFT);
+ con |= (pdata->gain << EXYNOS_TMU_GAIN_SHIFT);
+ }
+
+ if (pdata->noise_cancel_mode) {
+ con &= ~(EXYNOS_TMU_TRIP_MODE_MASK <<
+ EXYNOS_TMU_TRIP_MODE_SHIFT);
+ con |= (pdata->noise_cancel_mode << EXYNOS_TMU_TRIP_MODE_SHIFT);
}
if (on) {
- con |= EXYNOS_TMU_CORE_ON;
- interrupt_en = pdata->trigger_level3_en << 12 |
- pdata->trigger_level2_en << 8 |
- pdata->trigger_level1_en << 4 |
- pdata->trigger_level0_en;
+ con |= (1 << EXYNOS_TMU_CORE_EN_SHIFT);
+ interrupt_en =
+ pdata->trigger_level3_en << EXYNOS_TMU_INTEN_RISE3_SHIFT |
+ pdata->trigger_level2_en << EXYNOS_TMU_INTEN_RISE2_SHIFT |
+ pdata->trigger_level1_en << EXYNOS_TMU_INTEN_RISE1_SHIFT |
+ pdata->trigger_level0_en << EXYNOS_TMU_INTEN_RISE0_SHIFT;
if (pdata->threshold_falling)
- interrupt_en |= interrupt_en << 16;
+ interrupt_en |=
+ interrupt_en << EXYNOS_TMU_INTEN_FALL0_SHIFT;
} else {
- con |= EXYNOS_TMU_CORE_OFF;
+ con &= ~(1 << EXYNOS_TMU_CORE_EN_SHIFT);
interrupt_en = 0; /* Disable all interrupts */
}
writel(interrupt_en, data->base + EXYN
[PATCH V6 10/30] thermal: exynos: Move register definitions from driver to data file
This patch migrates the TMU register definition/bitfields to data file. This
is needed to support SoC's which use the same TMU controller but register
validity, offsets or bitfield may slightly vary across SOC's.
Acked-by: Kukjin Kim
Acked-by: Jonghwa Lee
Signed-off-by: Amit Daniel Kachhap
---
drivers/thermal/samsung/exynos_tmu.c | 172 +---
drivers/thermal/samsung/exynos_tmu.h | 133 ++
drivers/thermal/samsung/exynos_tmu_data.c | 59 ++
drivers/thermal/samsung/exynos_tmu_data.h | 68 +++
4 files changed, 315 insertions(+), 117 deletions(-)
diff --git a/drivers/thermal/samsung/exynos_tmu.c
b/drivers/thermal/samsung/exynos_tmu.c
index 401ec98..6fd776f 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -32,76 +32,6 @@
#include "exynos_tmu.h"
#include "exynos_tmu_data.h"
-/* Exynos generic registers */
-#define EXYNOS_TMU_REG_TRIMINFO0x0
-#define EXYNOS_TMU_REG_CONTROL 0x20
-#define EXYNOS_TMU_REG_STATUS 0x28
-#define EXYNOS_TMU_REG_CURRENT_TEMP0x40
-#define EXYNOS_TMU_REG_INTEN 0x70
-#define EXYNOS_TMU_REG_INTSTAT 0x74
-#define EXYNOS_TMU_REG_INTCLEAR0x78
-
-#define EXYNOS_TMU_TRIM_TEMP_MASK 0xff
-#define EXYNOS_TMU_GAIN_SHIFT 8
-#define EXYNOS_TMU_GAIN_MASK 0xf
-#define EXYNOS_TMU_REF_VOLTAGE_SHIFT 24
-#define EXYNOS_TMU_REF_VOLTAGE_MASK0x1f
-#define EXYNOS_TMU_BUF_SLOPE_SEL_MASK 0xf
-#define EXYNOS_TMU_BUF_SLOPE_SEL_SHIFT 8
-#define EXYNOS_TMU_CORE_EN_SHIFT 0
-
-/* Exynos4210 specific registers */
-#define EXYNOS4210_TMU_REG_THRESHOLD_TEMP 0x44
-#define EXYNOS4210_TMU_REG_TRIG_LEVEL0 0x50
-#define EXYNOS4210_TMU_REG_TRIG_LEVEL1 0x54
-#define EXYNOS4210_TMU_REG_TRIG_LEVEL2 0x58
-#define EXYNOS4210_TMU_REG_TRIG_LEVEL3 0x5C
-#define EXYNOS4210_TMU_REG_PAST_TEMP0 0x60
-#define EXYNOS4210_TMU_REG_PAST_TEMP1 0x64
-#define EXYNOS4210_TMU_REG_PAST_TEMP2 0x68
-#define EXYNOS4210_TMU_REG_PAST_TEMP3 0x6C
-
-#define EXYNOS4210_TMU_TRIG_LEVEL0_MASK0x1
-#define EXYNOS4210_TMU_TRIG_LEVEL1_MASK0x10
-#define EXYNOS4210_TMU_TRIG_LEVEL2_MASK0x100
-#define EXYNOS4210_TMU_TRIG_LEVEL3_MASK0x1000
-#define EXYNOS4210_TMU_TRIG_LEVEL_MASK 0x
-#define EXYNOS4210_TMU_INTCLEAR_VAL0x
-
-/* Exynos5250 and Exynos4412 specific registers */
-#define EXYNOS_TMU_TRIMINFO_CON0x14
-#define EXYNOS_THD_TEMP_RISE 0x50
-#define EXYNOS_THD_TEMP_FALL 0x54
-#define EXYNOS_EMUL_CON0x80
-
-#define EXYNOS_TRIMINFO_RELOAD 0x1
-#define EXYNOS_TRIMINFO_SHIFT 0x0
-#define EXYNOS_TMU_RISE_INT_MASK 0x111
-#define EXYNOS_TMU_RISE_INT_SHIFT 0
-#define EXYNOS_TMU_FALL_INT_MASK 0x111
-#define EXYNOS_TMU_FALL_INT_SHIFT 12
-#define EXYNOS_TMU_CLEAR_RISE_INT 0x111
-#define EXYNOS_TMU_CLEAR_FALL_INT (0x111 << 12)
-#define EXYNOS_TMU_TRIP_MODE_SHIFT 13
-#define EXYNOS_TMU_TRIP_MODE_MASK 0x7
-
-#define EXYNOS_TMU_INTEN_RISE0_SHIFT 0
-#define EXYNOS_TMU_INTEN_RISE1_SHIFT 4
-#define EXYNOS_TMU_INTEN_RISE2_SHIFT 8
-#define EXYNOS_TMU_INTEN_RISE3_SHIFT 12
-#define EXYNOS_TMU_INTEN_FALL0_SHIFT 16
-#define EXYNOS_TMU_INTEN_FALL1_SHIFT 20
-#define EXYNOS_TMU_INTEN_FALL2_SHIFT 24
-
-#ifdef CONFIG_THERMAL_EMULATION
-#define EXYNOS_EMUL_TIME 0x57F0
-#define EXYNOS_EMUL_TIME_MASK 0x
-#define EXYNOS_EMUL_TIME_SHIFT 16
-#define EXYNOS_EMUL_DATA_SHIFT 8
-#define EXYNOS_EMUL_DATA_MASK 0xFF
-#define EXYNOS_EMUL_ENABLE 0x1
-#endif /* CONFIG_THERMAL_EMULATION */
-
struct exynos_tmu_data {
struct exynos_tmu_platform_data *pdata;
struct resource *mem;
@@ -186,6 +116,7 @@ static int exynos_tmu_initialize(struct platform_device
*pdev)
{
struct exynos_tmu_data *data = platform_get_drvdata(pdev);
struct exynos_tmu_platform_data *pdata = data->pdata;
+ const struct exynos_tmu_registers *reg = pdata->registers;
unsigned int status, trim_info;
unsigned int rising_threshold = 0, falling_threshold = 0;
int ret = 0, threshold_code, i, trigger_levs = 0;
@@ -193,20 +124,20 @@ static int exynos_tmu_initialize(struct platform_device
*pdev)
mutex_lock(&data->lock);
clk_enable(data->clk);
- status = readb(data->base + EXYNOS_TMU_REG_STATUS);
+ status = readb(data->base + reg->tmu_status);
if (!status) {
ret = -EBUSY;
goto out;
}
- if (data->soc == SOC_ARCH_EXYNOS) {
- __raw_writel(EXYNOS_TRIMINFO_RELOAD,
- data->base + EXYNOS_TMU_TRIMINFO_CON);
- }
+ if (data->soc == SOC_ARCH_EXYNOS)
+ __raw_writel(1, data->base + reg->triminfo_ctrl);
+
/* Save trimming info in order to perform calibration */
- trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO);
-
[PATCH V6 07/30] thermal: exynos: Bifurcate exynos tmu driver and configuration data
This code splits the exynos tmu driver code into SOC specific data parts.
This will simplify adding new SOC specific data to the same TMU controller.
Acked-by: Kukjin Kim
Acked-by: Jonghwa Lee
Signed-off-by: Amit Daniel Kachhap
---
drivers/thermal/samsung/Kconfig |3 +-
drivers/thermal/samsung/Makefile |1 +
drivers/thermal/samsung/exynos_tmu.c | 67 ++---
drivers/thermal/samsung/exynos_tmu_data.c | 78 +
drivers/thermal/samsung/exynos_tmu_data.h | 40 +++
5 files changed, 125 insertions(+), 64 deletions(-)
create mode 100644 drivers/thermal/samsung/exynos_tmu_data.c
create mode 100644 drivers/thermal/samsung/exynos_tmu_data.h
diff --git a/drivers/thermal/samsung/Kconfig b/drivers/thermal/samsung/Kconfig
index f8100b1..b653f15 100644
--- a/drivers/thermal/samsung/Kconfig
+++ b/drivers/thermal/samsung/Kconfig
@@ -5,7 +5,8 @@ config EXYNOS_THERMAL
If you say yes here you get support for the TMU (Thermal Management
Unit) driver for SAMSUNG EXYNOS series of soc. This driver initialises
the TMU, reports temperature and handles cooling action if defined.
- This driver uses the exynos core thermal API's.
+ This driver uses the exynos core thermal API's and TMU configuration
+ data from the supported soc's.
config EXYNOS_THERMAL_CORE
bool "Core thermal framework support for EXYNOS SOC's"
diff --git a/drivers/thermal/samsung/Makefile b/drivers/thermal/samsung/Makefile
index 22528d6..c09d830 100644
--- a/drivers/thermal/samsung/Makefile
+++ b/drivers/thermal/samsung/Makefile
@@ -3,4 +3,5 @@
#
obj-$(CONFIG_EXYNOS_THERMAL) += exynos_thermal.o
exynos_thermal-y := exynos_tmu.o
+exynos_thermal-y += exynos_tmu_data.o
exynos_thermal-$(CONFIG_EXYNOS_THERMAL_CORE) += exynos_thermal_common.o
diff --git a/drivers/thermal/samsung/exynos_tmu.c
b/drivers/thermal/samsung/exynos_tmu.c
index 6aa2fd2..5df04a1 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -30,6 +30,7 @@
#include "exynos_thermal_common.h"
#include "exynos_tmu.h"
+#include "exynos_tmu_data.h"
/* Exynos generic registers */
#define EXYNOS_TMU_REG_TRIMINFO0x0
@@ -381,66 +382,6 @@ static struct thermal_sensor_conf exynos_sensor_conf = {
.write_emul_temp= exynos_tmu_set_emulation,
};
-#if defined(CONFIG_CPU_EXYNOS4210)
-static struct exynos_tmu_platform_data const exynos4210_default_tmu_data = {
- .threshold = 80,
- .trigger_levels[0] = 5,
- .trigger_levels[1] = 20,
- .trigger_levels[2] = 30,
- .trigger_level0_en = 1,
- .trigger_level1_en = 1,
- .trigger_level2_en = 1,
- .trigger_level3_en = 0,
- .gain = 15,
- .reference_voltage = 7,
- .cal_type = TYPE_ONE_POINT_TRIMMING,
- .freq_tab[0] = {
- .freq_clip_max = 800 * 1000,
- .temp_level = 85,
- },
- .freq_tab[1] = {
- .freq_clip_max = 200 * 1000,
- .temp_level = 100,
- },
- .freq_tab_count = 2,
- .type = SOC_ARCH_EXYNOS4210,
-};
-#define EXYNOS4210_TMU_DRV_DATA (&exynos4210_default_tmu_data)
-#else
-#define EXYNOS4210_TMU_DRV_DATA (NULL)
-#endif
-
-#if defined(CONFIG_SOC_EXYNOS5250) || defined(CONFIG_SOC_EXYNOS4412)
-static struct exynos_tmu_platform_data const exynos_default_tmu_data = {
- .threshold_falling = 10,
- .trigger_levels[0] = 85,
- .trigger_levels[1] = 103,
- .trigger_levels[2] = 110,
- .trigger_level0_en = 1,
- .trigger_level1_en = 1,
- .trigger_level2_en = 1,
- .trigger_level3_en = 0,
- .gain = 8,
- .reference_voltage = 16,
- .noise_cancel_mode = 4,
- .cal_type = TYPE_ONE_POINT_TRIMMING,
- .efuse_value = 55,
- .freq_tab[0] = {
- .freq_clip_max = 800 * 1000,
- .temp_level = 85,
- },
- .freq_tab[1] = {
- .freq_clip_max = 200 * 1000,
- .temp_level = 103,
- },
- .freq_tab_count = 2,
- .type = SOC_ARCH_EXYNOS,
-};
-#define EXYNOS_TMU_DRV_DATA (&exynos_default_tmu_data)
-#else
-#define EXYNOS_TMU_DRV_DATA (NULL)
-#endif
-
#ifdef CONFIG_OF
static const struct of_device_id exynos_tmu_match[] = {
{
@@ -449,11 +390,11 @@ static const struct of_device_id exynos_tmu_match[] = {
},
{
.compatible = "samsung,exynos4412-tmu",
- .data = (void *)EXYNOS_TMU_DRV_DATA,
+ .data = (void *)EXYNOS5250_TMU_DRV_DATA,
},
{
.compatible = "samsung,exynos5250-tmu",
- .data = (void *)EXYNOS_TMU_DRV_DATA,
+ .data = (void *)EXYNOS5250_TMU_DRV_DATA,
},
{},
};
@@ -467,7 +408,7 @@ static struct platform_device_id exynos_tmu_driver_ids[] = {
[PATCH V6 12/30] thermal: exynos: Fix to clear only the generated interrupts
This patch uses the TMU status register to know the generated interrupts
and only clear them in the interrupt handler.
Acked-by: Kukjin Kim
Acked-by: Jonghwa Lee
Signed-off-by: Amit Daniel Kachhap
---
drivers/thermal/samsung/exynos_tmu.c | 11 +--
drivers/thermal/samsung/exynos_tmu_data.c |2 ++
2 files changed, 7 insertions(+), 6 deletions(-)
diff --git a/drivers/thermal/samsung/exynos_tmu.c
b/drivers/thermal/samsung/exynos_tmu.c
index 33f494e..f6f63ca 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -351,17 +351,16 @@ static void exynos_tmu_work(struct work_struct *work)
struct exynos_tmu_data, irq_work);
struct exynos_tmu_platform_data *pdata = data->pdata;
const struct exynos_tmu_registers *reg = pdata->registers;
+ unsigned int val_irq;
exynos_report_trigger();
mutex_lock(&data->lock);
clk_enable(data->clk);
- if (data->soc == SOC_ARCH_EXYNOS)
- writel((reg->inten_rise_mask << reg->inten_rise_shift) |
- (reg->inten_fall_mask << reg->inten_fall_shift),
- data->base + reg->tmu_intclear);
- else
- writel(reg->inten_rise_mask, data->base + reg->tmu_intclear);
+ /* TODO: take action based on particular interrupt */
+ val_irq = readl(data->base + reg->tmu_intstat);
+ /* clear the interrupts */
+ writel(val_irq, data->base + reg->tmu_intclear);
clk_disable(data->clk);
mutex_unlock(&data->lock);
diff --git a/drivers/thermal/samsung/exynos_tmu_data.c
b/drivers/thermal/samsung/exynos_tmu_data.c
index e7cb1cc..7fcf183 100644
--- a/drivers/thermal/samsung/exynos_tmu_data.c
+++ b/drivers/thermal/samsung/exynos_tmu_data.c
@@ -45,6 +45,7 @@ static const struct exynos_tmu_registers
exynos4210_tmu_registers = {
.inten_rise1_shift = EXYNOS_TMU_INTEN_RISE1_SHIFT,
.inten_rise2_shift = EXYNOS_TMU_INTEN_RISE2_SHIFT,
.inten_rise3_shift = EXYNOS_TMU_INTEN_RISE3_SHIFT,
+ .tmu_intstat = EXYNOS_TMU_REG_INTSTAT,
.tmu_intclear = EXYNOS_TMU_REG_INTCLEAR,
};
struct exynos_tmu_platform_data const exynos4210_default_tmu_data = {
@@ -112,6 +113,7 @@ static const struct exynos_tmu_registers
exynos5250_tmu_registers = {
.inten_rise2_shift = EXYNOS_TMU_INTEN_RISE2_SHIFT,
.inten_rise3_shift = EXYNOS_TMU_INTEN_RISE3_SHIFT,
.inten_fall0_shift = EXYNOS_TMU_INTEN_FALL0_SHIFT,
+ .tmu_intstat = EXYNOS_TMU_REG_INTSTAT,
.tmu_intclear = EXYNOS_TMU_REG_INTCLEAR,
.emul_con = EXYNOS_EMUL_CON,
.emul_temp_shift = EXYNOS_EMUL_DATA_SHIFT,
--
1.7.1
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[PATCH V6 09/30] thermal: exynos: Add extra entries in the tmu platform data
This patch adds entries min_efuse_value, max_efuse_value, default_temp_offset,
trigger_type, cal_type, trim_first_point, trim_second_point, max_trigger_level
trigger_enable in the TMU platform data structure. Also the driver is modified
to use the data passed by these new platform memebers instead of the constant
macros. All these changes helps in separating the SOC specific data part from
the TMU driver.
Acked-by: Kukjin Kim
Acked-by: Jonghwa Lee
Signed-off-by: Amit Daniel Kachhap
---
drivers/thermal/samsung/exynos_thermal_common.h |7 +++
drivers/thermal/samsung/exynos_tmu.c| 43 ++--
drivers/thermal/samsung/exynos_tmu.h| 49 ++
drivers/thermal/samsung/exynos_tmu_data.c | 35
4 files changed, 86 insertions(+), 48 deletions(-)
diff --git a/drivers/thermal/samsung/exynos_thermal_common.h
b/drivers/thermal/samsung/exynos_thermal_common.h
index 068f56c..fd789a5 100644
--- a/drivers/thermal/samsung/exynos_thermal_common.h
+++ b/drivers/thermal/samsung/exynos_thermal_common.h
@@ -44,6 +44,13 @@
#define EXYNOS_ZONE_COUNT 3
+enum trigger_type {
+ THROTTLE_ACTIVE = 1,
+ THROTTLE_PASSIVE,
+ SW_TRIP,
+ HW_TRIP,
+};
+
/**
* struct freq_clip_table
* @freq_clip_max: maximum frequency allowed for this cooling state.
diff --git a/drivers/thermal/samsung/exynos_tmu.c
b/drivers/thermal/samsung/exynos_tmu.c
index fa33a48..401ec98 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -49,7 +49,6 @@
#define EXYNOS_TMU_BUF_SLOPE_SEL_MASK 0xf
#define EXYNOS_TMU_BUF_SLOPE_SEL_SHIFT 8
#define EXYNOS_TMU_CORE_EN_SHIFT 0
-#define EXYNOS_TMU_DEF_CODE_TO_TEMP_OFFSET 50
/* Exynos4210 specific registers */
#define EXYNOS4210_TMU_REG_THRESHOLD_TEMP 0x44
@@ -94,9 +93,6 @@
#define EXYNOS_TMU_INTEN_FALL1_SHIFT 20
#define EXYNOS_TMU_INTEN_FALL2_SHIFT 24
-#define EFUSE_MIN_VALUE 40
-#define EFUSE_MAX_VALUE 100
-
#ifdef CONFIG_THERMAL_EMULATION
#define EXYNOS_EMUL_TIME 0x57F0
#define EXYNOS_EMUL_TIME_MASK 0x
@@ -136,15 +132,16 @@ static int temp_to_code(struct exynos_tmu_data *data, u8
temp)
switch (pdata->cal_type) {
case TYPE_TWO_POINT_TRIMMING:
- temp_code = (temp - 25) *
- (data->temp_error2 - data->temp_error1) /
- (85 - 25) + data->temp_error1;
+ temp_code = (temp - pdata->first_point_trim) *
+ (data->temp_error2 - data->temp_error1) /
+ (pdata->second_point_trim - pdata->first_point_trim) +
+ data->temp_error1;
break;
case TYPE_ONE_POINT_TRIMMING:
- temp_code = temp + data->temp_error1 - 25;
+ temp_code = temp + data->temp_error1 - pdata->first_point_trim;
break;
default:
- temp_code = temp + EXYNOS_TMU_DEF_CODE_TO_TEMP_OFFSET;
+ temp_code = temp + pdata->default_temp_offset;
break;
}
out:
@@ -169,14 +166,16 @@ static int code_to_temp(struct exynos_tmu_data *data, u8
temp_code)
switch (pdata->cal_type) {
case TYPE_TWO_POINT_TRIMMING:
- temp = (temp_code - data->temp_error1) * (85 - 25) /
- (data->temp_error2 - data->temp_error1) + 25;
+ temp = (temp_code - data->temp_error1) *
+ (pdata->second_point_trim - pdata->first_point_trim) /
+ (data->temp_error2 - data->temp_error1) +
+ pdata->first_point_trim;
break;
case TYPE_ONE_POINT_TRIMMING:
- temp = temp_code - data->temp_error1 + 25;
+ temp = temp_code - data->temp_error1 + pdata->first_point_trim;
break;
default:
- temp = temp_code - EXYNOS_TMU_DEF_CODE_TO_TEMP_OFFSET;
+ temp = temp_code - pdata->default_temp_offset;
break;
}
out:
@@ -209,8 +208,8 @@ static int exynos_tmu_initialize(struct platform_device
*pdev)
data->temp_error1 = trim_info & EXYNOS_TMU_TRIM_TEMP_MASK;
data->temp_error2 = ((trim_info >> 8) & EXYNOS_TMU_TRIM_TEMP_MASK);
- if ((EFUSE_MIN_VALUE > data->temp_error1) ||
- (data->temp_error1 > EFUSE_MAX_VALUE) ||
+ if ((pdata->min_efuse_value > data->temp_error1) ||
+ (data->temp_error1 > pdata->max_efuse_value) ||
(data->temp_error2 != 0))
data->temp_error1 = pdata->efuse_value;
@@ -300,10 +299,10 @@ static void exynos_tmu_control(struct platform_device
*pdev, bool on)
if (on) {
con |= (1 << EXYNOS_TMU_CORE_EN_SHIFT);
interrupt_en =
- pdata->trigger_level3_en << EXYNOS_TMU_INTEN_RISE3_SHIFT |
- pdata->trigger_level2_en << EXYNOS_TMU_INTEN_
[PATCH V6 18/30] thermal: exynos: Add support to handle many instances of TMU
This patch adds support to handle multiple instances of the TMU controllers.
This is done by removing the static structure to register with the core thermal
and creating it dynamically for each instance of the TMU controller. The
interrupt is made shared type to handle shared interrupts. Also
the identifier of the TMU controller is extracted from device tree alias.
Acked-by: Kukjin Kim
Acked-by: Jonghwa Lee
Signed-off-by: Amit Daniel Kachhap
---
drivers/thermal/samsung/exynos_thermal_common.h |1 +
drivers/thermal/samsung/exynos_tmu.c| 147 ---
drivers/thermal/samsung/exynos_tmu.h| 13 ++
drivers/thermal/samsung/exynos_tmu_data.c | 145 --
drivers/thermal/samsung/exynos_tmu_data.h |4 +-
5 files changed, 197 insertions(+), 113 deletions(-)
diff --git a/drivers/thermal/samsung/exynos_thermal_common.h
b/drivers/thermal/samsung/exynos_thermal_common.h
index dd0077e..0c189d6 100644
--- a/drivers/thermal/samsung/exynos_thermal_common.h
+++ b/drivers/thermal/samsung/exynos_thermal_common.h
@@ -84,6 +84,7 @@ struct thermal_sensor_conf {
struct thermal_cooling_conf cooling_data;
void *driver_data;
void *pzone_data;
+ struct device *dev;
};
/*Functions used exynos based thermal sensor driver*/
diff --git a/drivers/thermal/samsung/exynos_tmu.c
b/drivers/thermal/samsung/exynos_tmu.c
index 4356118..1880c4e 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -26,15 +26,32 @@
#include
#include
#include
+#include
+#include
#include
#include "exynos_thermal_common.h"
#include "exynos_tmu.h"
#include "exynos_tmu_data.h"
+/**
+ * struct exynos_tmu_data : A structure to hold the private data of the TMU
+ driver
+ * @id: identifier of the one instance of the TMU controller.
+ * @pdata: pointer to the tmu platform/configuration data
+ * @base: base address of the single instance of the TMU controller.
+ * @irq: irq number of the TMU controller.
+ * @soc: id of the SOC type.
+ * @irq_work: pointer to the irq work structure.
+ * @lock: lock to implement synchronization.
+ * @clk: pointer to the clock structure.
+ * @temp_error1: fused value of the first point trim.
+ * @temp_error2: fused value of the second point trim.
+ * @reg_conf: pointer to structure to register with core thermal.
+ */
struct exynos_tmu_data {
+ int id;
struct exynos_tmu_platform_data *pdata;
- struct resource *mem;
void __iomem *base;
int irq;
enum soc_type soc;
@@ -42,6 +59,7 @@ struct exynos_tmu_data {
struct mutex lock;
struct clk *clk;
u8 temp_error1, temp_error2;
+ struct thermal_sensor_conf *reg_conf;
};
/*
@@ -345,12 +363,6 @@ static int exynos_tmu_set_emulation(void *drv_data,
unsigned long temp)
{ return -EINVAL; }
#endif/*CONFIG_THERMAL_EMULATION*/
-static struct thermal_sensor_conf exynos_sensor_conf = {
- .name = "exynos-therm",
- .read_temperature = (int (*)(void *))exynos_tmu_read,
- .write_emul_temp= exynos_tmu_set_emulation,
-};
-
static void exynos_tmu_work(struct work_struct *work)
{
struct exynos_tmu_data *data = container_of(work,
@@ -359,7 +371,7 @@ static void exynos_tmu_work(struct work_struct *work)
const struct exynos_tmu_registers *reg = pdata->registers;
unsigned int val_irq;
- exynos_report_trigger(&exynos_sensor_conf);
+ exynos_report_trigger(data->reg_conf);
mutex_lock(&data->lock);
clk_enable(data->clk);
@@ -404,33 +416,73 @@ MODULE_DEVICE_TABLE(of, exynos_tmu_match);
#endif
static inline struct exynos_tmu_platform_data *exynos_get_driver_data(
- struct platform_device *pdev)
+ struct platform_device *pdev, int id)
{
+ struct exynos_tmu_init_data *data_table;
+ struct exynos_tmu_platform_data *tmu_data;
#ifdef CONFIG_OF
if (pdev->dev.of_node) {
const struct of_device_id *match;
match = of_match_node(exynos_tmu_match, pdev->dev.of_node);
if (!match)
return NULL;
- return (struct exynos_tmu_platform_data *) match->data;
+ data_table = (struct exynos_tmu_init_data *) match->data;
+ if (!data_table || id >= data_table->tmu_count)
+ return NULL;
+ tmu_data = data_table->tmu_data;
+ return (struct exynos_tmu_platform_data *) (tmu_data + id);
}
#endif
return NULL;
}
-static int exynos_tmu_probe(struct platform_device *pdev)
+static int exynos_map_dt_data(struct platform_device *pdev)
{
- struct exynos_tmu_data *data;
- struct exynos_tmu_platform_data *pdata = pdev->dev.platform_data;
- int ret, i;
+ struct exynos_tmu_data *data = platform_get_drvdata(pdev);
+
[PATCH V6 11/30] thermal: exynos: Support thermal tripping
TMU urgently sends active-high signal (thermal trip) to PMU, and thermal
tripping by hardware logic. Thermal tripping means that PMU cuts off the
whole power of SoC by controlling external voltage regulator.
Acked-by: Kukjin Kim
Acked-by: Jonghwa Lee
Signed-off-by: Jonghwan Choi
Signed-off-by: Amit Daniel Kachhap
---
drivers/thermal/samsung/exynos_tmu.c | 45 +---
drivers/thermal/samsung/exynos_tmu_data.c |2 +
drivers/thermal/samsung/exynos_tmu_data.h |2 +
3 files changed, 44 insertions(+), 5 deletions(-)
diff --git a/drivers/thermal/samsung/exynos_tmu.c
b/drivers/thermal/samsung/exynos_tmu.c
index 6fd776f..33f494e 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -117,7 +117,7 @@ static int exynos_tmu_initialize(struct platform_device
*pdev)
struct exynos_tmu_data *data = platform_get_drvdata(pdev);
struct exynos_tmu_platform_data *pdata = data->pdata;
const struct exynos_tmu_registers *reg = pdata->registers;
- unsigned int status, trim_info;
+ unsigned int status, trim_info = 0, con;
unsigned int rising_threshold = 0, falling_threshold = 0;
int ret = 0, threshold_code, i, trigger_levs = 0;
@@ -144,10 +144,26 @@ static int exynos_tmu_initialize(struct platform_device
*pdev)
(data->temp_error2 != 0))
data->temp_error1 = pdata->efuse_value;
- /* Count trigger levels to be enabled */
- for (i = 0; i < MAX_THRESHOLD_LEVS; i++)
- if (pdata->trigger_levels[i])
+ if (pdata->max_trigger_level > MAX_THRESHOLD_LEVS) {
+ dev_err(&pdev->dev, "Invalid max trigger level\n");
+ goto out;
+ }
+
+ for (i = 0; i < pdata->max_trigger_level; i++) {
+ if (!pdata->trigger_levels[i])
+ continue;
+
+ if ((pdata->trigger_type[i] == HW_TRIP) &&
+ (!pdata->trigger_levels[pdata->max_trigger_level - 1])) {
+ dev_err(&pdev->dev, "Invalid hw trigger level\n");
+ ret = -EINVAL;
+ goto out;
+ }
+
+ /* Count trigger levels except the HW trip*/
+ if (!(pdata->trigger_type[i] == HW_TRIP))
trigger_levs++;
+ }
if (data->soc == SOC_ARCH_EXYNOS4210) {
/* Write temperature code for threshold */
@@ -165,7 +181,8 @@ static int exynos_tmu_initialize(struct platform_device
*pdev)
writel(reg->inten_rise_mask, data->base + reg->tmu_intclear);
} else if (data->soc == SOC_ARCH_EXYNOS) {
/* Write temperature code for rising and falling threshold */
- for (i = 0; i < trigger_levs; i++) {
+ for (i = 0;
+ i < trigger_levs && i < EXYNOS_MAX_TRIGGER_PER_REG; i++) {
threshold_code = temp_to_code(data,
pdata->trigger_levels[i]);
if (threshold_code < 0) {
@@ -191,6 +208,24 @@ static int exynos_tmu_initialize(struct platform_device
*pdev)
writel((reg->inten_rise_mask << reg->inten_rise_shift) |
(reg->inten_fall_mask << reg->inten_fall_shift),
data->base + reg->tmu_intclear);
+
+ /* if last threshold limit is also present */
+ i = pdata->max_trigger_level - 1;
+ if (pdata->trigger_levels[i] &&
+ (pdata->trigger_type[i] == HW_TRIP)) {
+ threshold_code = temp_to_code(data,
+ pdata->trigger_levels[i]);
+ if (threshold_code < 0) {
+ ret = threshold_code;
+ goto out;
+ }
+ rising_threshold |= threshold_code << 8 * i;
+ writel(rising_threshold,
+ data->base + reg->threshold_th0);
+ con = readl(data->base + reg->tmu_ctrl);
+ con |= (1 << reg->therm_trip_en_shift);
+ writel(con, data->base + reg->tmu_ctrl);
+ }
}
out:
clk_disable(data->clk);
diff --git a/drivers/thermal/samsung/exynos_tmu_data.c
b/drivers/thermal/samsung/exynos_tmu_data.c
index 589a519..e7cb1cc 100644
--- a/drivers/thermal/samsung/exynos_tmu_data.c
+++ b/drivers/thermal/samsung/exynos_tmu_data.c
@@ -123,6 +123,7 @@ struct exynos_tmu_platform_data const
exynos5250_default_tmu_data = {
.trigger_levels[0] = 85,
.trigger_levels[1] = 103,
.trigger_levels[2] = 110,
+ .trigger_levels[3] = 120,
.trigger_enable[0] = 1,
.trigger_enable[1] = 1,
.trigger_enable[2] = 1,
@@ -130,6 +131,7 @@ struct exynos_tmu_platform_data con
[PATCH V6 13/30] thermal: exynos: Add support for instance based register/unregister
This code modifies the thermal driver to have multiple thermal zone
support by replacing the global thermal zone variable with device data
member of thermal_zone_device.
Acked-by: Kukjin Kim
Acked-by: Jonghwa Lee
Signed-off-by: Amit Daniel Kachhap
---
drivers/thermal/samsung/exynos_thermal_common.c | 36 ++
drivers/thermal/samsung/exynos_thermal_common.h |9 +++--
drivers/thermal/samsung/exynos_tmu.c| 15 +
3 files changed, 36 insertions(+), 24 deletions(-)
diff --git a/drivers/thermal/samsung/exynos_thermal_common.c
b/drivers/thermal/samsung/exynos_thermal_common.c
index dd49c9f..2af1e3b 100644
--- a/drivers/thermal/samsung/exynos_thermal_common.c
+++ b/drivers/thermal/samsung/exynos_thermal_common.c
@@ -36,12 +36,11 @@ struct exynos_thermal_zone {
bool bind;
};
-static struct exynos_thermal_zone *th_zone;
-
/* Get mode callback functions for thermal zone */
static int exynos_get_mode(struct thermal_zone_device *thermal,
enum thermal_device_mode *mode)
{
+ struct exynos_thermal_zone *th_zone = thermal->devdata;
if (th_zone)
*mode = th_zone->mode;
return 0;
@@ -51,25 +50,26 @@ static int exynos_get_mode(struct thermal_zone_device
*thermal,
static int exynos_set_mode(struct thermal_zone_device *thermal,
enum thermal_device_mode mode)
{
- if (!th_zone->therm_dev) {
+ struct exynos_thermal_zone *th_zone = thermal->devdata;
+ if (!th_zone) {
pr_notice("thermal zone not registered\n");
return 0;
}
- mutex_lock(&th_zone->therm_dev->lock);
+ mutex_lock(&thermal->lock);
if (mode == THERMAL_DEVICE_ENABLED &&
!th_zone->sensor_conf->trip_data.trigger_falling)
- th_zone->therm_dev->polling_delay = IDLE_INTERVAL;
+ thermal->polling_delay = IDLE_INTERVAL;
else
- th_zone->therm_dev->polling_delay = 0;
+ thermal->polling_delay = 0;
- mutex_unlock(&th_zone->therm_dev->lock);
+ mutex_unlock(&thermal->lock);
th_zone->mode = mode;
- thermal_zone_device_update(th_zone->therm_dev);
+ thermal_zone_device_update(thermal);
pr_info("thermal polling set for duration=%d msec\n",
- th_zone->therm_dev->polling_delay);
+ thermal->polling_delay);
return 0;
}
@@ -96,6 +96,8 @@ static int exynos_get_trip_type(struct thermal_zone_device
*thermal, int trip,
static int exynos_get_trip_temp(struct thermal_zone_device *thermal, int trip,
unsigned long *temp)
{
+ struct exynos_thermal_zone *th_zone = thermal->devdata;
+
if (trip < GET_TRIP(MONITOR_ZONE) || trip > GET_TRIP(PANIC_ZONE))
return -EINVAL;
@@ -122,6 +124,7 @@ static int exynos_bind(struct thermal_zone_device *thermal,
{
int ret = 0, i, tab_size, level;
struct freq_clip_table *tab_ptr, *clip_data;
+ struct exynos_thermal_zone *th_zone = thermal->devdata;
struct thermal_sensor_conf *data = th_zone->sensor_conf;
tab_ptr = (struct freq_clip_table *)data->cooling_data.freq_data;
@@ -168,6 +171,7 @@ static int exynos_unbind(struct thermal_zone_device
*thermal,
struct thermal_cooling_device *cdev)
{
int ret = 0, i, tab_size;
+ struct exynos_thermal_zone *th_zone = thermal->devdata;
struct thermal_sensor_conf *data = th_zone->sensor_conf;
if (th_zone->bind == false)
@@ -210,6 +214,7 @@ static int exynos_unbind(struct thermal_zone_device
*thermal,
static int exynos_get_temp(struct thermal_zone_device *thermal,
unsigned long *temp)
{
+ struct exynos_thermal_zone *th_zone = thermal->devdata;
void *data;
if (!th_zone->sensor_conf) {
@@ -229,6 +234,7 @@ static int exynos_set_emul_temp(struct thermal_zone_device
*thermal,
{
void *data;
int ret = -EINVAL;
+ struct exynos_thermal_zone *th_zone = thermal->devdata;
if (!th_zone->sensor_conf) {
pr_info("Temperature sensor not initialised\n");
@@ -276,11 +282,12 @@ static struct thermal_zone_device_ops const
exynos_dev_ops = {
* This function may be called from interrupt based temperature sensor
* when threshold is changed.
*/
-void exynos_report_trigger(void)
+void exynos_report_trigger(struct thermal_sensor_conf *conf)
{
unsigned int i;
char data[10];
char *envp[] = { data, NULL };
+ struct exynos_thermal_zone *th_zone = conf->pzone_data;
if (!th_zone || !th_zone->therm_dev)
return;
@@ -321,6 +328,7 @@ int exynos_register_thermal(struct thermal_sensor_conf
*sensor_conf)
{
int ret;
struct cpumask mask_val;
+ struct exynos_thermal_zone *th_zone;
if (!sensor_conf || !sen
[PATCH V6 15/30] thermal: exynos: Return success even if no cooling data supplied
This patch removes the error return in the bind/unbind routine as the platform may not register any cpufreq cooling data. Acked-by: Kukjin Kim Acked-by: Jonghwa Lee Signed-off-by: Amit Daniel Kachhap --- drivers/thermal/samsung/exynos_thermal_common.c |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/thermal/samsung/exynos_thermal_common.c b/drivers/thermal/samsung/exynos_thermal_common.c index 7064eb7..86d39aa 100644 --- a/drivers/thermal/samsung/exynos_thermal_common.c +++ b/drivers/thermal/samsung/exynos_thermal_common.c @@ -131,7 +131,7 @@ static int exynos_bind(struct thermal_zone_device *thermal, tab_size = data->cooling_data.freq_clip_count; if (tab_ptr == NULL || tab_size == 0) - return -EINVAL; + return 0; /* find the cooling device registered*/ for (i = 0; i < th_zone->cool_dev_size; i++) @@ -180,7 +180,7 @@ static int exynos_unbind(struct thermal_zone_device *thermal, tab_size = data->cooling_data.freq_clip_count; if (tab_size == 0) - return -EINVAL; + return 0; /* find the cooling device registered*/ for (i = 0; i < th_zone->cool_dev_size; i++) -- 1.7.1 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH V6 14/30] thermal: exynos: Modify private_data to appropriate name driver_data
This patch renames member private_data to driver_data of the thermal
zone registration structure as this item stores the driver related
data and uses it to call the driver related callbacks.
Acked-by: Kukjin Kim
Acked-by: Jonghwa Lee
Signed-off-by: Amit Daniel Kachhap
---
drivers/thermal/samsung/exynos_thermal_common.c |4 ++--
drivers/thermal/samsung/exynos_thermal_common.h |2 +-
drivers/thermal/samsung/exynos_tmu.c|2 +-
3 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/thermal/samsung/exynos_thermal_common.c
b/drivers/thermal/samsung/exynos_thermal_common.c
index 2af1e3b..7064eb7 100644
--- a/drivers/thermal/samsung/exynos_thermal_common.c
+++ b/drivers/thermal/samsung/exynos_thermal_common.c
@@ -221,7 +221,7 @@ static int exynos_get_temp(struct thermal_zone_device
*thermal,
pr_info("Temperature sensor not initialised\n");
return -EINVAL;
}
- data = th_zone->sensor_conf->private_data;
+ data = th_zone->sensor_conf->driver_data;
*temp = th_zone->sensor_conf->read_temperature(data);
/* convert the temperature into millicelsius */
*temp = *temp * MCELSIUS;
@@ -240,7 +240,7 @@ static int exynos_set_emul_temp(struct thermal_zone_device
*thermal,
pr_info("Temperature sensor not initialised\n");
return -EINVAL;
}
- data = th_zone->sensor_conf->private_data;
+ data = th_zone->sensor_conf->driver_data;
if (th_zone->sensor_conf->write_emul_temp)
ret = th_zone->sensor_conf->write_emul_temp(data, temp);
return ret;
diff --git a/drivers/thermal/samsung/exynos_thermal_common.h
b/drivers/thermal/samsung/exynos_thermal_common.h
index a845c2d..1e9a326 100644
--- a/drivers/thermal/samsung/exynos_thermal_common.h
+++ b/drivers/thermal/samsung/exynos_thermal_common.h
@@ -83,7 +83,7 @@ struct thermal_sensor_conf {
int (*write_emul_temp)(void *drv_data, unsigned long temp);
struct thermal_trip_point_conf trip_data;
struct thermal_cooling_conf cooling_data;
- void *private_data;
+ void *driver_data;
void *pzone_data;
};
diff --git a/drivers/thermal/samsung/exynos_tmu.c
b/drivers/thermal/samsung/exynos_tmu.c
index a7bba69..40e0cfd 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -504,7 +504,7 @@ static int exynos_tmu_probe(struct platform_device *pdev)
exynos_tmu_control(pdev, true);
/* Register the sensor with thermal management interface */
- (&exynos_sensor_conf)->private_data = data;
+ (&exynos_sensor_conf)->driver_data = data;
exynos_sensor_conf.trip_data.trip_count = pdata->trigger_enable[0] +
pdata->trigger_enable[1] + pdata->trigger_enable[2]+
pdata->trigger_enable[3];
--
1.7.1
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[PATCH V6 21/30] ARM: dts: thermal: exynos4: Add documentation for Exynos SoC thermal bindings
From: Lukasz Majewski
Proper description for Exynos4 bindings added to Documentation/devicetree/
bindings
Acked-by: Jonghwa Lee
Signed-off-by: Lukasz Majewski
Signed-off-by: Kyungmin Park
Signed-off-by: Amit Daniel Kachhap
---
.../devicetree/bindings/thermal/exynos-thermal.txt | 25
1 files changed, 25 insertions(+), 0 deletions(-)
create mode 100644 Documentation/devicetree/bindings/thermal/exynos-thermal.txt
diff --git a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
new file mode 100644
index 000..535fd0e
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
@@ -0,0 +1,25 @@
+* Exynos Thermal Management Unit (TMU)
+
+** Required properties:
+
+- compatible : One of the following:
+ "samsung,exynos4412-tmu"
+ "samsung,exynos4210-tmu"
+ "samsung,exynos5250-tmu"
+- interrupt-parent : The phandle for the interrupt controller
+- reg : Address range of the thermal registers
+- interrupts : Should contain interrupt for thermal system
+- clocks : The main clock for TMU device
+- clock-names : Thermal system clock name
+
+Example:
+
+ tmu@100C {
+ compatible = "samsung,exynos4412-tmu";
+ interrupt-parent = <&combiner>;
+ reg = <0x100C 0x100>;
+ interrupts = <2 4>;
+ clocks = <&clock 383>;
+ clock-names = "tmu_apbif";
+ status = "disabled";
+ };
--
1.7.1
--
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[PATCH V6 22/30] thermal: exynos: Add support to access common register for multistance
This patch adds support to parse one more common set of TMU register. First
set of register belongs to each instance of TMU and second set belongs to
common TMU registers.
Acked-by: Jonghwa Lee
Acked-by: Kukjin Kim
Signed-off-by: Amit Daniel Kachhap
---
.../devicetree/bindings/thermal/exynos-thermal.txt |6 +-
drivers/thermal/samsung/exynos_tmu.c | 20
2 files changed, 25 insertions(+), 1 deletions(-)
diff --git a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
index 535fd0e..0ea33f7 100644
--- a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
+++ b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
@@ -7,7 +7,11 @@
"samsung,exynos4210-tmu"
"samsung,exynos5250-tmu"
- interrupt-parent : The phandle for the interrupt controller
-- reg : Address range of the thermal registers
+- reg : Address range of the thermal registers. For soc's which has multiple
+ instances of TMU and some registers are shared across all TMU's like
+ interrupt related then 2 set of register has to supplied. First set
+ belongs to each instance of TMU and second set belongs to common TMU
+ registers.
- interrupts : Should contain interrupt for thermal system
- clocks : The main clock for TMU device
- clock-names : Thermal system clock name
diff --git a/drivers/thermal/samsung/exynos_tmu.c
b/drivers/thermal/samsung/exynos_tmu.c
index 877dab8..150a869 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -40,6 +40,7 @@
* @id: identifier of the one instance of the TMU controller.
* @pdata: pointer to the tmu platform/configuration data
* @base: base address of the single instance of the TMU controller.
+ * @base_common: base address of the common registers of the TMU controller.
* @irq: irq number of the TMU controller.
* @soc: id of the SOC type.
* @irq_work: pointer to the irq work structure.
@@ -53,6 +54,7 @@ struct exynos_tmu_data {
int id;
struct exynos_tmu_platform_data *pdata;
void __iomem *base;
+ void __iomem *base_common;
int irq;
enum soc_type soc;
struct work_struct irq_work;
@@ -478,6 +480,24 @@ static int exynos_map_dt_data(struct platform_device *pdev)
return -ENODEV;
}
data->pdata = pdata;
+ /*
+* Check if the TMU shares some registers and then try to map the
+* memory of common registers.
+*/
+ if (!TMU_SUPPORTS(pdata, SHARED_MEMORY))
+ return 0;
+
+ if (of_address_to_resource(pdev->dev.of_node, 1, &res)) {
+ dev_err(&pdev->dev, "failed to get Resource 1\n");
+ return -ENODEV;
+ }
+
+ data->base_common = devm_ioremap(&pdev->dev, res.start,
+ resource_size(&res));
+ if (!data->base) {
+ dev_err(&pdev->dev, "Failed to ioremap memory\n");
+ return -ENOMEM;
+ }
return 0;
}
--
1.7.1
--
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[PATCH V6 24/30] thermal: exynos: Add thermal configuration data for exynos5440 TMU sensor
This patch adds configuration data for exynos5440 soc. Also register
definations for the controller are added.
Acked-by: Jonghwa Lee
Acked-by: Kukjin Kim
Signed-off-by: Amit Daniel Kachhap
---
drivers/thermal/samsung/exynos_tmu.c |4 ++
drivers/thermal/samsung/exynos_tmu_data.c | 71 +
drivers/thermal/samsung/exynos_tmu_data.h |7 +++
3 files changed, 82 insertions(+), 0 deletions(-)
diff --git a/drivers/thermal/samsung/exynos_tmu.c
b/drivers/thermal/samsung/exynos_tmu.c
index db4035d..a4dbc84 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -455,6 +455,10 @@ static const struct of_device_id exynos_tmu_match[] = {
.compatible = "samsung,exynos5250-tmu",
.data = (void *)EXYNOS5250_TMU_DRV_DATA,
},
+ {
+ .compatible = "samsung,exynos5440-tmu",
+ .data = (void *)EXYNOS5440_TMU_DRV_DATA,
+ },
{},
};
MODULE_DEVICE_TABLE(of, exynos_tmu_match);
diff --git a/drivers/thermal/samsung/exynos_tmu_data.c
b/drivers/thermal/samsung/exynos_tmu_data.c
index 694557e..b34e726 100644
--- a/drivers/thermal/samsung/exynos_tmu_data.c
+++ b/drivers/thermal/samsung/exynos_tmu_data.c
@@ -175,3 +175,74 @@ struct exynos_tmu_init_data const
exynos5250_default_tmu_data = {
.tmu_count = 1,
};
#endif
+
+#if defined(CONFIG_SOC_EXYNOS5440)
+static const struct exynos_tmu_registers exynos5440_tmu_registers = {
+ .triminfo_data = EXYNOS5440_TMU_S0_7_TRIM,
+ .triminfo_25_shift = EXYNOS_TRIMINFO_25_SHIFT,
+ .triminfo_85_shift = EXYNOS_TRIMINFO_85_SHIFT,
+ .tmu_ctrl = EXYNOS5440_TMU_S0_7_CTRL,
+ .buf_vref_sel_shift = EXYNOS_TMU_REF_VOLTAGE_SHIFT,
+ .buf_vref_sel_mask = EXYNOS_TMU_REF_VOLTAGE_MASK,
+ .therm_trip_mode_shift = EXYNOS_TMU_TRIP_MODE_SHIFT,
+ .therm_trip_mode_mask = EXYNOS_TMU_TRIP_MODE_MASK,
+ .therm_trip_en_shift = EXYNOS_TMU_THERM_TRIP_EN_SHIFT,
+ .buf_slope_sel_shift = EXYNOS_TMU_BUF_SLOPE_SEL_SHIFT,
+ .buf_slope_sel_mask = EXYNOS_TMU_BUF_SLOPE_SEL_MASK,
+ .core_en_shift = EXYNOS_TMU_CORE_EN_SHIFT,
+ .tmu_status = EXYNOS5440_TMU_S0_7_STATUS,
+ .tmu_cur_temp = EXYNOS5440_TMU_S0_7_TEMP,
+ .threshold_th0 = EXYNOS5440_TMU_S0_7_TH0,
+ .threshold_th1 = EXYNOS5440_TMU_S0_7_TH1,
+ .threshold_th2 = EXYNOS5440_TMU_S0_7_TH2,
+ .threshold_th3_l0_shift = EXYNOS5440_TMU_TH_RISE4_SHIFT,
+ .tmu_inten = EXYNOS5440_TMU_S0_7_IRQEN,
+ .inten_rise_mask = EXYNOS5440_TMU_RISE_INT_MASK,
+ .inten_rise_shift = EXYNOS5440_TMU_RISE_INT_SHIFT,
+ .inten_fall_mask = EXYNOS5440_TMU_FALL_INT_MASK,
+ .inten_fall_shift = EXYNOS5440_TMU_FALL_INT_SHIFT,
+ .inten_rise0_shift = EXYNOS5440_TMU_INTEN_RISE0_SHIFT,
+ .inten_rise1_shift = EXYNOS5440_TMU_INTEN_RISE1_SHIFT,
+ .inten_rise2_shift = EXYNOS5440_TMU_INTEN_RISE2_SHIFT,
+ .inten_rise3_shift = EXYNOS5440_TMU_INTEN_RISE3_SHIFT,
+ .inten_fall0_shift = EXYNOS5440_TMU_INTEN_FALL0_SHIFT,
+ .tmu_intstat = EXYNOS5440_TMU_S0_7_IRQ,
+ .tmu_intclear = EXYNOS5440_TMU_S0_7_IRQ,
+ .tmu_irqstatus = EXYNOS5440_TMU_IRQ_STATUS,
+ .emul_con = EXYNOS5440_TMU_S0_7_DEBUG,
+ .emul_temp_shift = EXYNOS_EMUL_DATA_SHIFT,
+ .tmu_pmin = EXYNOS5440_TMU_PMIN,
+};
+
+#define EXYNOS5440_TMU_DATA \
+ .trigger_levels[0] = 100, \
+ .trigger_levels[4] = 105, \
+ .trigger_enable[0] = 1, \
+ .trigger_type[0] = SW_TRIP, \
+ .trigger_type[4] = HW_TRIP, \
+ .max_trigger_level = 5, \
+ .gain = 5, \
+ .reference_voltage = 16, \
+ .noise_cancel_mode = 4, \
+ .cal_type = TYPE_ONE_POINT_TRIMMING, \
+ .cal_mode = 0, \
+ .efuse_value = 0x5b2d, \
+ .min_efuse_value = 16, \
+ .max_efuse_value = 76, \
+ .first_point_trim = 25, \
+ .second_point_trim = 70, \
+ .default_temp_offset = 25, \
+ .type = SOC_ARCH_EXYNOS5440, \
+ .registers = &exynos5440_tmu_registers, \
+ .features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_FALLING_TRIP | \
+ TMU_SUPPORT_MULTI_INST | TMU_SUPPORT_SHARED_MEMORY),
+
+struct exynos_tmu_init_data const exynos5440_default_tmu_data = {
+ .tmu_data = {
+ { EXYNOS5440_TMU_DATA } ,
+ { EXYNOS5440_TMU_DATA } ,
+ { EXYNOS5440_TMU_DATA } ,
+ },
+ .tmu_count = 3,
+};
+#endif
diff --git a/drivers/thermal/samsung/exynos_tmu_data.h
b/drivers/thermal/samsung/exynos_tmu_data.h
index ad263e9..43ce5fb 100644
--- a/drivers/thermal/samsung/exynos_tmu_data.h
+++ b/drivers/thermal/samsung/exynos_tmu_data.h
@@ -143,4 +143,11 @@ extern struct exynos_tmu_init_data const
exynos5250_default_tmu_data;
#define EXYNOS5250_TMU_DRV_DATA (NULL)
#endif
+#if defined(CONFIG_SOC_EXYNOS5440)
+extern struct exynos_tmu_init_data const exynos5440_default_tmu_data;
+#define EXYNOS5440_TMU
[PATCH V6 26/30] thermal: exynos: Add hardware mode thermal calibration support
This patch adds support for h/w mode calibration in the TMU controller.
soc's like 5440 support this features.
Acked-by: Jonghwa Lee
Acked-by: Kukjin Kim
Signed-off-by: Amit Daniel Kachhap
---
drivers/thermal/samsung/exynos_tmu.c | 15 +++
drivers/thermal/samsung/exynos_tmu.h |6 ++
drivers/thermal/samsung/exynos_tmu_data.c |2 ++
drivers/thermal/samsung/exynos_tmu_data.h |2 ++
4 files changed, 25 insertions(+), 0 deletions(-)
diff --git a/drivers/thermal/samsung/exynos_tmu.c
b/drivers/thermal/samsung/exynos_tmu.c
index af0e6ca..7a259f4 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -73,6 +73,9 @@ static int temp_to_code(struct exynos_tmu_data *data, u8 temp)
struct exynos_tmu_platform_data *pdata = data->pdata;
int temp_code;
+ if (pdata->cal_mode == HW_MODE)
+ return temp;
+
if (data->soc == SOC_ARCH_EXYNOS4210)
/* temp should range between 25 and 125 */
if (temp < 25 || temp > 125) {
@@ -107,6 +110,9 @@ static int code_to_temp(struct exynos_tmu_data *data, u8
temp_code)
struct exynos_tmu_platform_data *pdata = data->pdata;
int temp;
+ if (pdata->cal_mode == HW_MODE)
+ return temp_code;
+
if (data->soc == SOC_ARCH_EXYNOS4210)
/* temp_code should range between 75 and 175 */
if (temp_code < 75 || temp_code > 175) {
@@ -155,6 +161,9 @@ static int exynos_tmu_initialize(struct platform_device
*pdev)
if (TMU_SUPPORTS(pdata, TRIM_RELOAD))
__raw_writel(1, data->base + reg->triminfo_ctrl);
+ if (pdata->cal_mode == HW_MODE)
+ goto skip_calib_data;
+
/* Save trimming info in order to perform calibration */
if (data->soc == SOC_ARCH_EXYNOS5440) {
/*
@@ -190,6 +199,7 @@ static int exynos_tmu_initialize(struct platform_device
*pdev)
(pdata->efuse_value >> reg->triminfo_85_shift) &
EXYNOS_TMU_TEMP_MASK;
+skip_calib_data:
if (pdata->max_trigger_level > MAX_THRESHOLD_LEVS) {
dev_err(&pdev->dev, "Invalid max trigger level\n");
goto out;
@@ -319,6 +329,11 @@ static void exynos_tmu_control(struct platform_device
*pdev, bool on)
con |= (pdata->noise_cancel_mode << reg->therm_trip_mode_shift);
}
+ if (pdata->cal_mode == HW_MODE) {
+ con &= ~(reg->calib_mode_mask << reg->calib_mode_shift);
+ con |= pdata->cal_type << reg->calib_mode_shift;
+ }
+
if (on) {
con |= (1 << reg->core_en_shift);
interrupt_en =
diff --git a/drivers/thermal/samsung/exynos_tmu.h
b/drivers/thermal/samsung/exynos_tmu.h
index 73aaed7..abfa1eb 100644
--- a/drivers/thermal/samsung/exynos_tmu.h
+++ b/drivers/thermal/samsung/exynos_tmu.h
@@ -88,6 +88,10 @@ enum soc_type {
* @buf_slope_sel_shift: shift bits of amplifier gain value in tmu_ctrl
register.
* @buf_slope_sel_mask: mask bits of amplifier gain value in tmu_ctrl register.
+ * @calib_mode_shift: shift bits of calibration mode value in tmu_ctrl
+ register.
+ * @calib_mode_mask: mask bits of calibration mode value in tmu_ctrl
+ register.
* @therm_trip_tq_en_shift: shift bits of thermal trip enable by TQ pin in
tmu_ctrl register.
* @core_en_shift: shift bits of TMU core enable bit in tmu_ctrl register.
@@ -149,6 +153,8 @@ struct exynos_tmu_registers {
u32 therm_trip_en_shift;
u32 buf_slope_sel_shift;
u32 buf_slope_sel_mask;
+ u32 calib_mode_shift;
+ u32 calib_mode_mask;
u32 therm_trip_tq_en_shift;
u32 core_en_shift;
diff --git a/drivers/thermal/samsung/exynos_tmu_data.c
b/drivers/thermal/samsung/exynos_tmu_data.c
index b34e726..47c5d6b 100644
--- a/drivers/thermal/samsung/exynos_tmu_data.c
+++ b/drivers/thermal/samsung/exynos_tmu_data.c
@@ -189,6 +189,8 @@ static const struct exynos_tmu_registers
exynos5440_tmu_registers = {
.therm_trip_en_shift = EXYNOS_TMU_THERM_TRIP_EN_SHIFT,
.buf_slope_sel_shift = EXYNOS_TMU_BUF_SLOPE_SEL_SHIFT,
.buf_slope_sel_mask = EXYNOS_TMU_BUF_SLOPE_SEL_MASK,
+ .calib_mode_shift = EXYNOS_TMU_CALIB_MODE_SHIFT,
+ .calib_mode_mask = EXYNOS_TMU_CALIB_MODE_MASK,
.core_en_shift = EXYNOS_TMU_CORE_EN_SHIFT,
.tmu_status = EXYNOS5440_TMU_S0_7_STATUS,
.tmu_cur_temp = EXYNOS5440_TMU_S0_7_TEMP,
diff --git a/drivers/thermal/samsung/exynos_tmu_data.h
b/drivers/thermal/samsung/exynos_tmu_data.h
index 43ce5fb..dc7feb5 100644
--- a/drivers/thermal/samsung/exynos_tmu_data.h
+++ b/drivers/thermal/samsung/exynos_tmu_data.h
@@ -75,6 +75,8 @@
#define EXYNOS_TMU_TRIP_MODE_SHIFT 13
#define EXYNOS_TMU_TRIP_MODE_MASK 0x7
#define EXYNOS_TMU_THERM_TRIP_EN_SHIFT 12
+#define EXYNOS_TMU_CALIB_MODE_SHIF
[PATCH V6 23/30] thermal: exynos: Add driver support for exynos5440 TMU sensor
This patch modifies TMU controller to add changes needed to work with
exynos5440 platform. This sensor registers 3 instance of the tmu controller
with the thermal zone and hence reports 3 temperature output. This controller
supports upto five trip points. For critical threshold the driver uses the
core driver thermal framework for shutdown.
Acked-by: Jonghwa Lee
Acked-by: Kukjin Kim
Signed-off-by: Jungseok Lee
Signed-off-by: Amit Daniel Kachhap
---
.../devicetree/bindings/thermal/exynos-thermal.txt | 24 -
drivers/thermal/samsung/exynos_thermal_common.h|2 +-
drivers/thermal/samsung/exynos_tmu.c | 54 +---
drivers/thermal/samsung/exynos_tmu.h |6 ++
drivers/thermal/samsung/exynos_tmu_data.h | 36 +
5 files changed, 112 insertions(+), 10 deletions(-)
diff --git a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
index 0ea33f7..e6386ea 100644
--- a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
+++ b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
@@ -6,6 +6,7 @@
"samsung,exynos4412-tmu"
"samsung,exynos4210-tmu"
"samsung,exynos5250-tmu"
+ "samsung,exynos5440-tmu"
- interrupt-parent : The phandle for the interrupt controller
- reg : Address range of the thermal registers. For soc's which has multiple
instances of TMU and some registers are shared across all TMU's like
@@ -16,7 +17,7 @@
- clocks : The main clock for TMU device
- clock-names : Thermal system clock name
-Example:
+Example 1):
tmu@100C {
compatible = "samsung,exynos4412-tmu";
@@ -27,3 +28,24 @@ Example:
clock-names = "tmu_apbif";
status = "disabled";
};
+
+Example 2):
+
+ tmuctrl_0: tmuctrl@160118 {
+ compatible = "samsung,exynos5440-tmu";
+ reg = <0x160118 0x230>, <0x160368 0x10>;
+ interrupts = <0 58 0>;
+ clocks = <&clock 21>;
+ clock-names = "tmu_apbif";
+ };
+
+Note: For multi-instance tmu each instance should have an alias correctly
+numbered in "aliases" node.
+
+Example:
+
+aliases {
+ tmuctrl0 = &tmuctrl_0;
+ tmuctrl1 = &tmuctrl_1;
+ tmuctrl2 = &tmuctrl_2;
+};
diff --git a/drivers/thermal/samsung/exynos_thermal_common.h
b/drivers/thermal/samsung/exynos_thermal_common.h
index 0c189d6..7d7c29a 100644
--- a/drivers/thermal/samsung/exynos_thermal_common.h
+++ b/drivers/thermal/samsung/exynos_thermal_common.h
@@ -27,7 +27,7 @@
#define SENSOR_NAME_LEN16
#define MAX_TRIP_COUNT 8
#define MAX_COOLING_DEVICE 4
-#define MAX_THRESHOLD_LEVS 4
+#define MAX_THRESHOLD_LEVS 5
#define ACTIVE_INTERVAL 500
#define IDLE_INTERVAL 1
diff --git a/drivers/thermal/samsung/exynos_tmu.c
b/drivers/thermal/samsung/exynos_tmu.c
index 150a869..db4035d 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -156,7 +156,26 @@ static int exynos_tmu_initialize(struct platform_device
*pdev)
__raw_writel(1, data->base + reg->triminfo_ctrl);
/* Save trimming info in order to perform calibration */
- trim_info = readl(data->base + reg->triminfo_data);
+ if (data->soc == SOC_ARCH_EXYNOS5440) {
+ /*
+* For exynos5440 soc triminfo value is swapped between TMU0 and
+* TMU2, so the below logic is needed.
+*/
+ switch (data->id) {
+ case 0:
+ trim_info = readl(data->base +
+ EXYNOS5440_EFUSE_SWAP_OFFSET + reg->triminfo_data);
+ break;
+ case 1:
+ trim_info = readl(data->base + reg->triminfo_data);
+ break;
+ case 2:
+ trim_info = readl(data->base -
+ EXYNOS5440_EFUSE_SWAP_OFFSET + reg->triminfo_data);
+ }
+ } else {
+ trim_info = readl(data->base + reg->triminfo_data);
+ }
data->temp_error1 = trim_info & EXYNOS_TMU_TEMP_MASK;
data->temp_error2 = ((trim_info >> reg->triminfo_85_shift) &
EXYNOS_TMU_TEMP_MASK);
@@ -201,7 +220,8 @@ static int exynos_tmu_initialize(struct platform_device
*pdev)
reg->threshold_th0 + i * sizeof(reg->threshold_th0));
writel(reg->inten_rise_mask, data->base + reg->tmu_intclear);
- } else if (data->soc == SOC_ARCH_EXYNOS) {
+ } else if (data->soc == SOC_ARCH_EXYNOS ||
+ data->soc == SOC_ARCH_EXYNOS5440) {
/* Write temperature code for rising and falling threshold */
for (i = 0;
i < trigger_levs && i < EXYNOS_MAX_TRIGGER_PER_REG; i++) {
@@ -241,14 +261,
[PATCH V6 25/30] thermal: exynos: Fix to set the second point correction value
This patch sets the second point trimming value according to the platform
data if the register value is 0.
Acked-by: Jonghwa Lee
Acked-by: Kukjin Kim
Signed-off-by: Amit Daniel Kachhap
---
drivers/thermal/samsung/exynos_tmu.c | 13 +
1 files changed, 9 insertions(+), 4 deletions(-)
diff --git a/drivers/thermal/samsung/exynos_tmu.c
b/drivers/thermal/samsung/exynos_tmu.c
index a4dbc84..af0e6ca 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -180,10 +180,15 @@ static int exynos_tmu_initialize(struct platform_device
*pdev)
data->temp_error2 = ((trim_info >> reg->triminfo_85_shift) &
EXYNOS_TMU_TEMP_MASK);
- if ((pdata->min_efuse_value > data->temp_error1) ||
- (data->temp_error1 > pdata->max_efuse_value) ||
- (data->temp_error2 != 0))
- data->temp_error1 = pdata->efuse_value;
+ if (!data->temp_error1 ||
+ (pdata->min_efuse_value > data->temp_error1) ||
+ (data->temp_error1 > pdata->max_efuse_value))
+ data->temp_error1 = pdata->efuse_value & EXYNOS_TMU_TEMP_MASK;
+
+ if (!data->temp_error2)
+ data->temp_error2 =
+ (pdata->efuse_value >> reg->triminfo_85_shift) &
+ EXYNOS_TMU_TEMP_MASK;
if (pdata->max_trigger_level > MAX_THRESHOLD_LEVS) {
dev_err(&pdev->dev, "Invalid max trigger level\n");
--
1.7.1
--
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[PATCH V6 27/30] Documentation: thermal: Explain the exynos thermal driver model
This patch updates the documentation to explain the driver model and file layout. Acked-by: Jonghwa Lee Acked-by: Kukjin Kim Signed-off-by: Amit Daniel Kachhap --- Documentation/thermal/exynos_thermal | 43 ++--- 1 files changed, 34 insertions(+), 9 deletions(-) diff --git a/Documentation/thermal/exynos_thermal b/Documentation/thermal/exynos_thermal index 2b46f67..9010c44 100644 --- a/Documentation/thermal/exynos_thermal +++ b/Documentation/thermal/exynos_thermal @@ -1,17 +1,17 @@ -Kernel driver exynos4_tmu +Kernel driver exynos_tmu = Supported chips: -* ARM SAMSUNG EXYNOS4 series of SoC - Prefix: 'exynos4-tmu' +* ARM SAMSUNG EXYNOS4, EXYNOS5 series of SoC Datasheet: Not publicly available Authors: Donggeun Kim +Authors: Amit Daniel -Description +TMU controller Description: +--- -This driver allows to read temperature inside SAMSUNG EXYNOS4 series of SoC. +This driver allows to read temperature inside SAMSUNG EXYNOS4/5 series of SoC. The chip only exposes the measured 8-bit temperature code value through a register. @@ -34,9 +34,9 @@ The three equations are: TI2: Trimming info for 85 degree Celsius (stored at TRIMINFO register) Temperature code measured at 85 degree Celsius which is unchanged -TMU(Thermal Management Unit) in EXYNOS4 generates interrupt +TMU(Thermal Management Unit) in EXYNOS4/5 generates interrupt when temperature exceeds pre-defined levels. -The maximum number of configurable threshold is four. +The maximum number of configurable threshold is five. The threshold levels are defined as follows: Level_0: current temperature > trigger_level_0 + threshold Level_1: current temperature > trigger_level_1 + threshold @@ -47,6 +47,31 @@ The threshold levels are defined as follows: through the corresponding registers. When an interrupt occurs, this driver notify kernel thermal framework -with the function exynos4_report_trigger. +with the function exynos_report_trigger. Although an interrupt condition for level_0 can be set, it can be used to synchronize the cooling action. + +TMU driver description: +--- + +The exynos thermal driver is structured as, + + Kernel Core thermal framework + (thermal_core.c, step_wise.c, cpu_cooling.c) + ^ + | + | +TMU configuration data ---> TMU Driver <--> Exynos Core thermal wrapper +(exynos_tmu_data.c) (exynos_tmu.c) (exynos_thermal_common.c) +(exynos_tmu_data.h) (exynos_tmu.h) (exynos_thermal_common.h) + +a) TMU configuration data: This consist of TMU register offsets/bitfields + described through structure exynos_tmu_registers. Also several + other platform data (struct exynos_tmu_platform_data) members + are used to configure the TMU. +b) TMU driver: This component initialises the TMU controller and sets different + thresholds. It invokes core thermal implementation with the call + exynos_report_trigger. +c) Exynos Core thermal wrapper: This provides 3 wrapper function to use the + Kernel core thermal framework. They are exynos_unregister_thermal, + exynos_register_thermal and exynos_report_trigger. -- 1.7.1 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH V6 30/30] arm: exynos: enable ARCH_HAS_BANDGAP
This patch enables ARCH_HAS_BANDGAP config for exynos4210, 4212, 4412, 5250 and 5440 SOC. This config symbol is recently added to allow the platforms to enable bandgap based temperature sensor. Acked-by: Jonghwa Lee Signed-off-by: Amit Daniel Kachhap --- arch/arm/mach-exynos/Kconfig |5 + 1 files changed, 5 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index d19edff..d3cb5c7 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig @@ -33,6 +33,7 @@ config CPU_EXYNOS4210 bool "SAMSUNG EXYNOS4210" default y depends on ARCH_EXYNOS4 + select ARCH_HAS_BANDGAP select ARM_CPU_SUSPEND if PM select PM_GENERIC_DOMAINS select S5P_PM if PM @@ -45,6 +46,7 @@ config SOC_EXYNOS4212 bool "SAMSUNG EXYNOS4212" default y depends on ARCH_EXYNOS4 + select ARCH_HAS_BANDGAP select S5P_PM if PM select S5P_SLEEP if PM select SAMSUNG_DMADEV @@ -55,6 +57,7 @@ config SOC_EXYNOS4412 bool "SAMSUNG EXYNOS4412" default y depends on ARCH_EXYNOS4 + select ARCH_HAS_BANDGAP select SAMSUNG_DMADEV help Enable EXYNOS4412 SoC support @@ -63,6 +66,7 @@ config SOC_EXYNOS5250 bool "SAMSUNG EXYNOS5250" default y depends on ARCH_EXYNOS5 + select ARCH_HAS_BANDGAP select PM_GENERIC_DOMAINS if PM select S5P_PM if PM select S5P_SLEEP if PM @@ -76,6 +80,7 @@ config SOC_EXYNOS5440 default y depends on ARCH_EXYNOS5 select ARCH_HAS_OPP + select ARCH_HAS_BANDGAP select ARM_ARCH_TIMER select AUTO_ZRELADDR select PINCTRL -- 1.7.1 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH V6 28/30] thermal: exynos: Support for TMU regulator defined at device tree
TMU probe function now checks for a device tree defined regulator.
For compatibility reasons it is allowed to probe driver even without
this regulator defined.
Acked-by: Jonghwa Lee
Signed-off-by: Lukasz Majewski
Signed-off-by: Kyungmin Park
Signed-off-by: Amit Daniel Kachhap
---
.../devicetree/bindings/thermal/exynos-thermal.txt |4 +++
drivers/thermal/samsung/exynos_tmu.c | 23
2 files changed, 27 insertions(+), 0 deletions(-)
diff --git a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
index e6386ea..284f530 100644
--- a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
+++ b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
@@ -16,6 +16,9 @@
- interrupts : Should contain interrupt for thermal system
- clocks : The main clock for TMU device
- clock-names : Thermal system clock name
+- vtmu-supply: This entry is optional and provides the regulator node supplying
+ voltage to TMU. If needed this entry can be placed inside
+ board/platform specific dts file.
Example 1):
@@ -27,6 +30,7 @@ Example 1):
clocks = <&clock 383>;
clock-names = "tmu_apbif";
status = "disabled";
+ vtmu-supply = <&tmu_regulator_node>;
};
Example 2):
diff --git a/drivers/thermal/samsung/exynos_tmu.c
b/drivers/thermal/samsung/exynos_tmu.c
index 7a259f4..441efd5 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -29,6 +29,7 @@
#include
#include
#include
+#include
#include "exynos_thermal_common.h"
#include "exynos_tmu.h"
@@ -48,6 +49,7 @@
* @clk: pointer to the clock structure.
* @temp_error1: fused value of the first point trim.
* @temp_error2: fused value of the second point trim.
+ * @regulator: pointer to the TMU regulator structure.
* @reg_conf: pointer to structure to register with core thermal.
*/
struct exynos_tmu_data {
@@ -61,6 +63,7 @@ struct exynos_tmu_data {
struct mutex lock;
struct clk *clk;
u8 temp_error1, temp_error2;
+ struct regulator *regulator;
struct thermal_sensor_conf *reg_conf;
};
@@ -510,10 +513,27 @@ static int exynos_map_dt_data(struct platform_device
*pdev)
struct exynos_tmu_data *data = platform_get_drvdata(pdev);
struct exynos_tmu_platform_data *pdata;
struct resource res;
+ int ret;
if (!data)
return -ENODEV;
+ /*
+* Try enabling the regulator if found
+* TODO: Add regulator as an SOC feature, so that regulator enable
+* is a compulsory call.
+*/
+ data->regulator = devm_regulator_get(&pdev->dev, "vtmu");
+ if (!IS_ERR(data->regulator)) {
+ ret = regulator_enable(data->regulator);
+ if (ret) {
+ dev_err(&pdev->dev, "failed to enable vtmu\n");
+ return ret;
+ }
+ } else {
+ dev_info(&pdev->dev, "Regulator node (vtmu) not found\n");
+ }
+
data->id = of_alias_get_id(pdev->dev.of_node, "tmuctrl");
if (data->id < 0)
data->id = 0;
@@ -680,6 +700,9 @@ static int exynos_tmu_remove(struct platform_device *pdev)
clk_unprepare(data->clk);
+ if (!IS_ERR(data->regulator))
+ regulator_disable(data->regulator);
+
return 0;
}
--
1.7.1
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[PATCH V6 29/30] ARM: dts: Add device tree node for exynos5440 TMU controller
This patch adds device node for TMU controller. There are 3
instances of the controllers so 3 nodes are created.
Acked-by: Jonghwa Lee
Acked-by: Kukjin Kim
Signed-off-by: Amit Daniel Kachhap
---
arch/arm/boot/dts/exynos5440.dtsi | 30 ++
1 files changed, 30 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5440.dtsi
b/arch/arm/boot/dts/exynos5440.dtsi
index f6b1c89..716e90c 100644
--- a/arch/arm/boot/dts/exynos5440.dtsi
+++ b/arch/arm/boot/dts/exynos5440.dtsi
@@ -16,6 +16,12 @@
interrupt-parent = <&gic>;
+ aliases {
+ tmuctrl0 = &tmuctrl_0;
+ tmuctrl1 = &tmuctrl_1;
+ tmuctrl2 = &tmuctrl_2;
+ };
+
clock: clock-controller@0x16 {
compatible = "samsung,exynos5440-clock";
reg = <0x16 0x1000>;
@@ -216,4 +222,28 @@
clock-names = "rtc";
status = "disabled";
};
+
+ tmuctrl_0: tmuctrl@160118 {
+ compatible = "samsung,exynos5440-tmu";
+ reg = <0x160118 0x230>, <0x160368 0x10>;
+ interrupts = <0 58 0>;
+ clocks = <&clock 21>;
+ clock-names = "tmu_apbif";
+ };
+
+ tmuctrl_1: tmuctrl@16011C {
+ compatible = "samsung,exynos5440-tmu";
+ reg = <0x16011C 0x230>, <0x160368 0x10>;
+ interrupts = <0 58 0>;
+ clocks = <&clock 21>;
+ clock-names = "tmu_apbif";
+ };
+
+ tmuctrl_2: tmuctrl@160120 {
+ compatible = "samsung,exynos5440-tmu";
+ reg = <0x160120 0x230>, <0x160368 0x10>;
+ interrupts = <0 58 0>;
+ clocks = <&clock 21>;
+ clock-names = "tmu_apbif";
+ };
};
--
1.7.1
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[PATCH V6 16/30] thermal: exynos: Make the zone handling use trip information
This code simplifies the zone handling to use the trip information passed
by the TMU driver and not the hardcoded macros. This also helps in adding
more zone support.
Acked-by: Kukjin Kim
Acked-by: Jonghwa Lee
Signed-off-by: Amit Daniel Kachhap
---
drivers/thermal/samsung/exynos_thermal_common.c | 61 +--
drivers/thermal/samsung/exynos_thermal_common.h |3 +-
drivers/thermal/samsung/exynos_tmu.c|5 ++-
3 files changed, 40 insertions(+), 29 deletions(-)
diff --git a/drivers/thermal/samsung/exynos_thermal_common.c
b/drivers/thermal/samsung/exynos_thermal_common.c
index 86d39aa..2873ca3 100644
--- a/drivers/thermal/samsung/exynos_thermal_common.c
+++ b/drivers/thermal/samsung/exynos_thermal_common.c
@@ -78,17 +78,22 @@ static int exynos_set_mode(struct thermal_zone_device
*thermal,
static int exynos_get_trip_type(struct thermal_zone_device *thermal, int trip,
enum thermal_trip_type *type)
{
- switch (GET_ZONE(trip)) {
- case MONITOR_ZONE:
- case WARN_ZONE:
- *type = THERMAL_TRIP_ACTIVE;
- break;
- case PANIC_ZONE:
- *type = THERMAL_TRIP_CRITICAL;
- break;
- default:
+ struct exynos_thermal_zone *th_zone = thermal->devdata;
+ int max_trip = th_zone->sensor_conf->trip_data.trip_count;
+ int trip_type;
+
+ if (trip < 0 || trip >= max_trip)
return -EINVAL;
- }
+
+ trip_type = th_zone->sensor_conf->trip_data.trip_type[trip];
+
+ if (trip_type == SW_TRIP)
+ *type = THERMAL_TRIP_CRITICAL;
+ else if (trip_type == THROTTLE_ACTIVE)
+ *type = THERMAL_TRIP_ACTIVE;
+ else if (trip_type == THROTTLE_PASSIVE)
+ *type = THERMAL_TRIP_PASSIVE;
+
return 0;
}
@@ -97,8 +102,9 @@ static int exynos_get_trip_temp(struct thermal_zone_device
*thermal, int trip,
unsigned long *temp)
{
struct exynos_thermal_zone *th_zone = thermal->devdata;
+ int max_trip = th_zone->sensor_conf->trip_data.trip_count;
- if (trip < GET_TRIP(MONITOR_ZONE) || trip > GET_TRIP(PANIC_ZONE))
+ if (trip < 0 || trip >= max_trip)
return -EINVAL;
*temp = th_zone->sensor_conf->trip_data.trip_val[trip];
@@ -112,10 +118,10 @@ static int exynos_get_trip_temp(struct
thermal_zone_device *thermal, int trip,
static int exynos_get_crit_temp(struct thermal_zone_device *thermal,
unsigned long *temp)
{
- int ret;
- /* Panic zone */
- ret = exynos_get_trip_temp(thermal, GET_TRIP(PANIC_ZONE), temp);
- return ret;
+ struct exynos_thermal_zone *th_zone = thermal->devdata;
+ int max_trip = th_zone->sensor_conf->trip_data.trip_count;
+ /* Get the temp of highest trip*/
+ return exynos_get_trip_temp(thermal, max_trip - 1, temp);
}
/* Bind callback functions for thermal zone */
@@ -340,19 +346,22 @@ int exynos_register_thermal(struct thermal_sensor_conf
*sensor_conf)
return -ENOMEM;
th_zone->sensor_conf = sensor_conf;
- cpumask_set_cpu(0, &mask_val);
- th_zone->cool_dev[0] = cpufreq_cooling_register(&mask_val);
- if (IS_ERR(th_zone->cool_dev[0])) {
- pr_err("Failed to register cpufreq cooling device\n");
- ret = -EINVAL;
- goto err_unregister;
+ if (sensor_conf->cooling_data.freq_clip_count > 0) {
+ cpumask_set_cpu(0, &mask_val);
+ th_zone->cool_dev[0] = cpufreq_cooling_register(&mask_val);
+ if (IS_ERR(th_zone->cool_dev[0])) {
+ pr_err("Failed to register cpufreq cooling device\n");
+ ret = -EINVAL;
+ goto err_unregister;
+ }
+ th_zone->cool_dev_size++;
}
- th_zone->cool_dev_size++;
- th_zone->therm_dev = thermal_zone_device_register(sensor_conf->name,
- EXYNOS_ZONE_COUNT, 0, th_zone, &exynos_dev_ops, NULL, 0,
- sensor_conf->trip_data.trigger_falling ?
- 0 : IDLE_INTERVAL);
+ th_zone->therm_dev = thermal_zone_device_register(
+ sensor_conf->name, sensor_conf->trip_data.trip_count,
+ 0, th_zone, &exynos_dev_ops, NULL, 0,
+ sensor_conf->trip_data.trigger_falling ? 0 :
+ IDLE_INTERVAL);
if (IS_ERR(th_zone->therm_dev)) {
pr_err("Failed to register thermal zone device\n");
diff --git a/drivers/thermal/samsung/exynos_thermal_common.h
b/drivers/thermal/samsung/exynos_thermal_common.h
index 1e9a326..dd0077e 100644
--- a/drivers/thermal/samsung/exynos_thermal_common.h
+++ b/drivers/thermal/samsung/exynos_thermal_common.h
@@ -42,8 +42,6 @@
#define GET_ZONE(trip) (trip + 2)
#define GET_TRIP(zone) (zone -
[PATCH V6 20/30] thermal: exynos: use device resource management infrastructure
This patch uses the device pointer stored in the configuration structure
and converts to dev_* prints and devm API's.
Acked-by: Kukjin Kim
Acked-by: Jonghwa Lee
Signed-off-by: Amit Daniel Kachhap
---
drivers/thermal/samsung/exynos_thermal_common.c | 39 ++
1 files changed, 25 insertions(+), 14 deletions(-)
diff --git a/drivers/thermal/samsung/exynos_thermal_common.c
b/drivers/thermal/samsung/exynos_thermal_common.c
index 2873ca3..59b47e3 100644
--- a/drivers/thermal/samsung/exynos_thermal_common.c
+++ b/drivers/thermal/samsung/exynos_thermal_common.c
@@ -52,7 +52,8 @@ static int exynos_set_mode(struct thermal_zone_device
*thermal,
{
struct exynos_thermal_zone *th_zone = thermal->devdata;
if (!th_zone) {
- pr_notice("thermal zone not registered\n");
+ dev_err(th_zone->sensor_conf->dev,
+ "thermal zone not registered\n");
return 0;
}
@@ -68,8 +69,9 @@ static int exynos_set_mode(struct thermal_zone_device
*thermal,
th_zone->mode = mode;
thermal_zone_device_update(thermal);
- pr_info("thermal polling set for duration=%d msec\n",
- thermal->polling_delay);
+ dev_dbg(th_zone->sensor_conf->dev,
+ "thermal polling set for duration=%d msec\n",
+ thermal->polling_delay);
return 0;
}
@@ -159,7 +161,8 @@ static int exynos_bind(struct thermal_zone_device *thermal,
case WARN_ZONE:
if (thermal_zone_bind_cooling_device(thermal, i, cdev,
level, 0)) {
- pr_err("error binding cdev inst %d\n", i);
+ dev_err(data->dev,
+ "error unbinding cdev inst=%d\n", i);
ret = -EINVAL;
}
th_zone->bind = true;
@@ -204,7 +207,8 @@ static int exynos_unbind(struct thermal_zone_device
*thermal,
case WARN_ZONE:
if (thermal_zone_unbind_cooling_device(thermal, i,
cdev)) {
- pr_err("error unbinding cdev inst=%d\n", i);
+ dev_err(data->dev,
+ "error unbinding cdev inst=%d\n", i);
ret = -EINVAL;
}
th_zone->bind = false;
@@ -224,7 +228,8 @@ static int exynos_get_temp(struct thermal_zone_device
*thermal,
void *data;
if (!th_zone->sensor_conf) {
- pr_info("Temperature sensor not initialised\n");
+ dev_err(th_zone->sensor_conf->dev,
+ "Temperature sensor not initialised\n");
return -EINVAL;
}
data = th_zone->sensor_conf->driver_data;
@@ -243,7 +248,8 @@ static int exynos_set_emul_temp(struct thermal_zone_device
*thermal,
struct exynos_thermal_zone *th_zone = thermal->devdata;
if (!th_zone->sensor_conf) {
- pr_info("Temperature sensor not initialised\n");
+ dev_err(th_zone->sensor_conf->dev,
+ "Temperature sensor not initialised\n");
return -EINVAL;
}
data = th_zone->sensor_conf->driver_data;
@@ -337,11 +343,13 @@ int exynos_register_thermal(struct thermal_sensor_conf
*sensor_conf)
struct exynos_thermal_zone *th_zone;
if (!sensor_conf || !sensor_conf->read_temperature) {
- pr_err("Temperature sensor not initialised\n");
+ dev_err(sensor_conf->dev,
+ "Temperature sensor not initialised\n");
return -EINVAL;
}
- th_zone = kzalloc(sizeof(struct exynos_thermal_zone), GFP_KERNEL);
+ th_zone = devm_kzalloc(sensor_conf->dev,
+ sizeof(struct exynos_thermal_zone), GFP_KERNEL);
if (!th_zone)
return -ENOMEM;
@@ -350,7 +358,8 @@ int exynos_register_thermal(struct thermal_sensor_conf
*sensor_conf)
cpumask_set_cpu(0, &mask_val);
th_zone->cool_dev[0] = cpufreq_cooling_register(&mask_val);
if (IS_ERR(th_zone->cool_dev[0])) {
- pr_err("Failed to register cpufreq cooling device\n");
+ dev_err(sensor_conf->dev,
+ "Failed to register cpufreq cooling device\n");
ret = -EINVAL;
goto err_unregister;
}
@@ -364,14 +373,16 @@ int exynos_register_thermal(struct thermal_sensor_conf
*sensor_conf)
IDLE_INTERVAL);
if (IS_ERR(th_zone->therm_dev)) {
- pr_err("Failed to register thermal zone device\n");
+
[PATCH V6 19/30] thermal: exynos: Add TMU features to check instead of using SOC type
This patch adds several features supported by TMU as bitfields.
This features varies across different SOC type and comparing
the features present in the TMU is more logical than comparing
the soc itself.
Acked-by: Kukjin Kim
Acked-by: Jonghwa Lee
Signed-off-by: Amit Daniel Kachhap
---
drivers/thermal/samsung/exynos_tmu.c | 26 +++-
drivers/thermal/samsung/exynos_tmu.h | 31 +
drivers/thermal/samsung/exynos_tmu_data.c |6 -
3 files changed, 52 insertions(+), 11 deletions(-)
diff --git a/drivers/thermal/samsung/exynos_tmu.c
b/drivers/thermal/samsung/exynos_tmu.c
index 1880c4e..877dab8 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -142,13 +142,15 @@ static int exynos_tmu_initialize(struct platform_device
*pdev)
mutex_lock(&data->lock);
clk_enable(data->clk);
- status = readb(data->base + reg->tmu_status);
- if (!status) {
- ret = -EBUSY;
- goto out;
+ if (TMU_SUPPORTS(pdata, READY_STATUS)) {
+ status = readb(data->base + reg->tmu_status);
+ if (!status) {
+ ret = -EBUSY;
+ goto out;
+ }
}
- if (data->soc == SOC_ARCH_EXYNOS)
+ if (TMU_SUPPORTS(pdata, TRIM_RELOAD))
__raw_writel(1, data->base + reg->triminfo_ctrl);
/* Save trimming info in order to perform calibration */
@@ -287,7 +289,7 @@ static void exynos_tmu_control(struct platform_device
*pdev, bool on)
pdata->trigger_enable[2] << reg->inten_rise2_shift |
pdata->trigger_enable[1] << reg->inten_rise1_shift |
pdata->trigger_enable[0] << reg->inten_rise0_shift;
- if (pdata->threshold_falling)
+ if (TMU_SUPPORTS(pdata, FALLING_TRIP))
interrupt_en |=
interrupt_en << reg->inten_fall0_shift;
} else {
@@ -329,7 +331,7 @@ static int exynos_tmu_set_emulation(void *drv_data,
unsigned long temp)
unsigned int val;
int ret = -EINVAL;
- if (data->soc == SOC_ARCH_EXYNOS4210)
+ if (!TMU_SUPPORTS(pdata, EMULATION))
goto out;
if (temp && temp < MCELSIUS)
@@ -343,9 +345,13 @@ static int exynos_tmu_set_emulation(void *drv_data,
unsigned long temp)
if (temp) {
temp /= MCELSIUS;
- val = (EXYNOS_EMUL_TIME << reg->emul_time_shift) |
- (temp_to_code(data, temp)
-<< reg->emul_temp_shift) | EXYNOS_EMUL_ENABLE;
+ if (TMU_SUPPORTS(pdata, EMUL_TIME)) {
+ val &= ~(EXYNOS_EMUL_TIME_MASK << reg->emul_time_shift);
+ val |= (EXYNOS_EMUL_TIME << reg->emul_time_shift);
+ }
+ val &= ~(EXYNOS_EMUL_DATA_MASK << reg->emul_temp_shift);
+ val |= (temp_to_code(data, temp) << reg->emul_temp_shift) |
+ EXYNOS_EMUL_ENABLE;
} else {
val &= ~EXYNOS_EMUL_ENABLE;
}
diff --git a/drivers/thermal/samsung/exynos_tmu.h
b/drivers/thermal/samsung/exynos_tmu.h
index b614407..6f55673 100644
--- a/drivers/thermal/samsung/exynos_tmu.h
+++ b/drivers/thermal/samsung/exynos_tmu.h
@@ -41,6 +41,34 @@ enum soc_type {
};
/**
+ * EXYNOS TMU supported features.
+ * TMU_SUPPORT_EMULATION - This features is used to set user defined
+ * temperature to the TMU controller.
+ * TMU_SUPPORT_MULTI_INST - This features denotes that the soc
+ * has many instances of TMU.
+ * TMU_SUPPORT_TRIM_RELOAD - This features shows that trimming can
+ * be reloaded.
+ * TMU_SUPPORT_FALLING_TRIP - This features shows that interrupt can
+ * be registered for falling trips also.
+ * TMU_SUPPORT_READY_STATUS - This feature tells that the TMU current
+ * state(active/idle) can be checked.
+ * TMU_SUPPORT_EMUL_TIME - This features allows to set next temp emulation
+ * sample time.
+ * TMU_SUPPORT_SHARED_MEMORY - This feature tells that the different TMU
+ * sensors shares some common registers.
+ * TMU_SUPPORT - macro to compare the above features with the supplied.
+ */
+#define TMU_SUPPORT_EMULATION BIT(0)
+#define TMU_SUPPORT_MULTI_INST BIT(1)
+#define TMU_SUPPORT_TRIM_RELOADBIT(2)
+#define TMU_SUPPORT_FALLING_TRIP BIT(3)
+#define TMU_SUPPORT_READY_STATUS BIT(4)
+#define TMU_SUPPORT_EMUL_TIME BIT(5)
+#define TMU_SUPPORT_SHARED_MEMORY BIT(6)
+
+#define TMU_SUPPORTS(a, b) (a->features & TMU_SUPPORT_ ## b)
+
+/**
* struct exynos_tmu_register - register descriptors to access registers and
* bitfields. The register vali
[PATCH V6 17/30] thermal: exynos: Remove non DT based support
Recently non DT support from Exynos platform is removed and hence
removing non DT support from the driver also. This will help in easy
maintainence.
Acked-by: Jonghwa Lee
Signed-off-by: Amit Daniel Kachhap
---
drivers/thermal/samsung/exynos_tmu.c | 17 +
1 files changed, 1 insertions(+), 16 deletions(-)
diff --git a/drivers/thermal/samsung/exynos_tmu.c
b/drivers/thermal/samsung/exynos_tmu.c
index acbd295..4356118 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -403,19 +403,6 @@ static const struct of_device_id exynos_tmu_match[] = {
MODULE_DEVICE_TABLE(of, exynos_tmu_match);
#endif
-static struct platform_device_id exynos_tmu_driver_ids[] = {
- {
- .name = "exynos4210-tmu",
- .driver_data= (kernel_ulong_t)EXYNOS4210_TMU_DRV_DATA,
- },
- {
- .name = "exynos5250-tmu",
- .driver_data= (kernel_ulong_t)EXYNOS5250_TMU_DRV_DATA,
- },
- { },
-};
-MODULE_DEVICE_TABLE(platform, exynos_tmu_driver_ids);
-
static inline struct exynos_tmu_platform_data *exynos_get_driver_data(
struct platform_device *pdev)
{
@@ -428,8 +415,7 @@ static inline struct exynos_tmu_platform_data
*exynos_get_driver_data(
return (struct exynos_tmu_platform_data *) match->data;
}
#endif
- return (struct exynos_tmu_platform_data *)
- platform_get_device_id(pdev)->driver_data;
+ return NULL;
}
static int exynos_tmu_probe(struct platform_device *pdev)
@@ -586,7 +572,6 @@ static struct platform_driver exynos_tmu_driver = {
},
.probe = exynos_tmu_probe,
.remove = exynos_tmu_remove,
- .id_table = exynos_tmu_driver_ids,
};
module_platform_driver(exynos_tmu_driver);
--
1.7.1
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[PATCH V6 00/30] thermal: exynos: Re-structure driver and add support for exynos5440
Hi Rui/Eduardo, Submitting V6 version with all comments fixed. It is good if these patches gets merged in this merge window. If any comments please let me know. Thanks, Amit Daniel Changes in V6: * Uses ARCH_HAS_BANDGAP config flag which is merged now in arm tree. (http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=7758/1). * In this version patches 1, 2, 3, 4 and 30 are modified. Others are same as V5. * Added acked by from Jonghwa Lee. * Rebased against Thermal Maintainer next tree. Changes in V5: * Most of the changes in this version is as per suggestion from Jonghwa Lee. I have retained one to one mapping of platform data with TMU instances as the TMU's are different devices. In exynos5440 soc there is some register sharing across multiple TMU's but in exynos5420 there is no register between multiple TMU's, so the current implementation is useful to support both of the above. This patch uses localized ARCH_HAS_TMU Kconfig option and is a temporary solution until a more generic macro ARCH_HAS_BANDGAP is introduced as per discussion in the link https://patchwork.kernel.org/patch/2659001/. * trip type is passed as platform data. * HW trip is allowed only for maximum level. * Platform data structure is now abstracted inside 1 more structure to support multiple sensor TMU data. Changes in V4: Almost all the changes in this version is as per suggestion from Eduardo.The major ones are listed below, * Added kconfig symbol ARCH_HAS_TMU which needs to be enabled by platform. With this change existing symbol EXYNOS_TMU_DATA is not needed. * Movement of freq_clip_table from exynos_tmu.h to exynos_thermal_common.h is explained in the commit logs. * Wrote all register description documentation. * Split 5440 TMU support patch into controller change, configuration data and feature addition patches. * Remove all *LINUX_* in the header files. * Still regulator enable is kept optional but a TODO: comment is added to fix it later. Changes in V3: * Added proper dependency of different exynos thermal Kconfig symbols. Basically 3 Kconfig can be enabled now and corresponds to tmu driver. exynos common part and exynos configuration data. This issue was raised by Rui Zhang. Changes in V2: * Separated SOC data from TMU driver. This is as per suggestion from Eduardo. * Merged the new file created for exynos5440 TMU controller with the existing TMU controller code. * Removed the DT parsing code as now the SOC specific data are cleanly put inside the data specific file. * Even the register definations/bitfields are treated as data as there is some variation across SOC's. This patchset adds TMU(Thermal management Unit) driver support for exynos5440 platform. There are 3 instances of the TMU controllers so necessary cleanup/re-structure is done to handle multiple thermal zone. Patch (exynos4: Add documentation for Exynos SoC thermal bindings) from Lukasz Majewski is already posted to mainline. Adding it here for completeness. (http://www.mail-archive.com/linux-samsung-soc@vger.kernel.org/msg17817.html) Patch (thermal: exynos: Support thermal tripping ) from Jonghwan Choi is added here with some changes. (https://patchwork.kernel.org/patch/1668371/) Patch (thermal: exynos: Support for TMU regulator defined at device tree) is a repost of my earlier patch(https://patchwork-mail1.kernel.org/patch/2510771/) and adds regulator support. Patch (ARM: dts: Add device tree node for exynos5440 TMU controller) and patch (arm: exynos: enable ARCH_HAS_TMU) can be merged through exynos platform maintainer as this can cause merge conflict. All these patches are based on thermal maintainers git tree, git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux.git next. Amit Daniel Kachhap (29): thermal: exynos: Moving exynos thermal files into samsung directory thermal: exynos: Use ARCH_HAS_BANDGAP config to know the supported soc's thermal: exynos: Remove un-necessary CPU_THERMAL dependency thermal: exynos: Bifurcate exynos thermal common and tmu controller code thermal: exynos: Rename exynos_thermal.c to exynos_tmu.c thermal: exynos: Move exynos_thermal.h from include/* to driver/* folder thermal: exynos: Bifurcate exynos tmu driver and configuration data thermal: exynos: Add missing definations and code cleanup thermal: exynos: Add extra entries in the tmu platform data thermal: exynos: Move register definitions from driver to data file thermal: exynos: Support thermal tripping thermal: exynos: Fix to clear only the generated interrupts thermal: exynos: Add support for instance based register/unregister thermal: exynos: Modify private_data to appropriate name driver_data thermal: exynos: Return success even if no cooling data supplied thermal: exynos: Make the zone handling use trip information thermal: exynos: Remove non DT based support thermal: exynos: Add support to handle many instances of TMU thermal: exynos: Add TMU features to check inst
Re: [PATCH 1/2] ARM: EXYNOS: Add a platform bus notifier to set dma masks for Exynos5440
On 18 April 2013 21:00, Russell King - ARM Linux wrote:
> On Thu, Apr 04, 2013 at 07:51:43PM +0900, Kukjin Kim wrote:
>> +static u64 dma_mask64 = DMA_BIT_MASK(64);
> ...
>> + if (event != BUS_NOTIFY_ADD_DEVICE)
>> + return NOTIFY_DONE;
>> +
>> + dev->dma_mask = &dma_mask64;
>
> Sharing the dma mask in this way is a potential issue should you have a
> device driver use dma_set_mask() - which can write to this value.
Hi Russell,
Okay, I missed this point.
>
> A better solution would be:
>
> diff --git a/arch/arm/include/asm/device.h b/arch/arm/include/asm/device.h
> index dc662fc..51bb740 100644
> --- a/arch/arm/include/asm/device.h
> +++ b/arch/arm/include/asm/device.h
> @@ -22,6 +22,7 @@ struct dev_archdata {
> struct omap_device;
>
> struct pdev_archdata {
> + u64 dma_mask;
> #ifdef CONFIG_ARCH_OMAP
> struct omap_device *od;
> #endif
>
> and then in your function do:
>
> struct platform_device *pdev = to_platform_device(dev);
> ...
> pdev->dev.dma_mask = &pdev->arch_data.dma_mask;
> pdev->arch_data.dma_mask = DMA_BIT_MASK(64);
We could add a new u64 member into pdev_archdata structure, but that
would use an additional u64 for all platform_device which do not need
it. Adding a #ifdef around the u64 might not be ideal.
>
> However... are all your devices really DMA capable? Normally on a SoC,
> it's only the DMA engine which is DMA capable and everything else is not,
> and in that case you really only want to set the DMA masks up for the
> DMA capable devices.
Yes, true. Not all devices in Exynos5440 are DMA capable and only the
OHCI, EHCI and SATA controllers need 64-bit dma transfer capability.
I have reworked this patch based on your comments, would the following
patch be acceptable? The u64 data is still in the machine file.
Sorry for the delay in replaying to your review comments.
Thanks,
Thomas.
diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c
b/arch/arm/mach-exynos/mach-exynos5-dt.c
index 753b94f..8fdcd78 100644
--- a/arch/arm/mach-exynos/mach-exynos5-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos5-dt.c
@@ -14,6 +14,7 @@
#include
#include
#include
+#include
#include
#include
@@ -23,11 +24,39 @@
#include "common.h"
+static u64 dma_mask64 = DMA_BIT_MASK(64);
+static const struct of_device_id exynos5440_ctrl64bit_ids[] = {
+{ .compatible = "samsung,exynos5440-ohci", },
+{ .compatible = "samsung,exynos5440-ehci", },
+{ .compatible = "samsung,exynos5440-ahci", },
+};
+
static void __init exynos5_dt_map_io(void)
{
exynos_init_io(NULL, 0);
}
+static int exynos5440_platform_notifier(struct notifier_block *nb,
+ unsigned long event, void *__dev)
+{
+struct device *dev = __dev;
+
+if (event != BUS_NOTIFY_ADD_DEVICE)
+ return NOTIFY_DONE;
+
+if (dev && dev->of_node &&
+ of_match_node(exynos5440_ctrl64bit_ids, dev->of_node)) {
+ dev->dma_mask = &dma_mask64;
+ dev->coherent_dma_mask = DMA_BIT_MASK(64);
+}
+
+return NOTIFY_OK;
+}
+
+static struct notifier_block exynos5440_platform_nb = {
+.notifier_call = exynos5440_platform_notifier,
+};
+
static void __init exynos5_dt_machine_init(void)
{
struct device_node *i2c_np;
@@ -52,6 +81,9 @@ static void __init exynos5_dt_machine_init(void)
}
}
+ if (of_machine_is_compatible("samsung,exynos5440"))
+ bus_register_notifier(&platform_bus_type, &exynos5440_platform_nb);
+
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
}
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Re: [PATCH V6 6/6] clk: exynos5250: Add enum entries for divider clock of i2s1 and i2s2
Hi Mike,
On Thu, Jun 13, 2013 at 8:32 AM, Padma Venkat wrote:
> Hi Mike,
>
> On Wed, Jun 12, 2013 at 10:15 PM, Mike Turquette
> wrote:
>> Quoting Padmavathi Venna (2013-06-12 01:07:43)
>>> This patch adds enum entries for div_i2s1 and div_i2s2 which are
>>> required for i2s1 and i2s2 controllers.
>>>
>>> Signed-off-by: Padmavathi Venna
>>
>> Looks good. Did you want me to take the clk patches or just gathering
>> Acks?
>
> Please take the patches :).
>
> Thanks
> Padma
clk related patches in this set has some dependency on arch side
patches because one of the patch replaces all '/include's with
'#include's and adds a header file in
arch/arm/boot/include/dt-bindings/. So all these patches required to
go into one tree.
Hi Kukjin,
Can you please take all these patches into samsung-tree?
Thanks
Padma
>
>>
>> Regards,
>> Mike
>>
>>> ---
>>> drivers/clk/samsung/clk-exynos5250.c |5 +++--
>>> 1 files changed, 3 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/drivers/clk/samsung/clk-exynos5250.c
>>> b/drivers/clk/samsung/clk-exynos5250.c
>>> index 5c97e75..7c68850 100644
>>> --- a/drivers/clk/samsung/clk-exynos5250.c
>>> +++ b/drivers/clk/samsung/clk-exynos5250.c
>>> @@ -87,6 +87,7 @@ enum exynos5250_clks {
>>> sclk_mmc0, sclk_mmc1, sclk_mmc2, sclk_mmc3, sclk_sata, sclk_usb3,
>>> sclk_jpeg, sclk_uart0, sclk_uart1, sclk_uart2, sclk_uart3, sclk_pwm,
>>> sclk_audio1, sclk_audio2, sclk_spdif, sclk_spi0, sclk_spi1,
>>> sclk_spi2,
>>> + div_i2s1, div_i2s2,
>>>
>>> /* gate clocks */
>>> gscl0 = 256, gscl1, gscl2, gscl3, gscl_wa, gscl_wb, smmu_gscl0,
>>> @@ -291,8 +292,8 @@ struct samsung_div_clock exynos5250_div_clks[]
>>> __initdata = {
>>> DIV(none, "div_pcm1", "sclk_audio1", DIV_PERIC4, 4, 8),
>>> DIV(none, "div_audio2", "mout_audio2", DIV_PERIC4, 16, 4),
>>> DIV(none, "div_pcm2", "sclk_audio2", DIV_PERIC4, 20, 8),
>>> - DIV(none, "div_i2s1", "sclk_audio1", DIV_PERIC5, 0, 6),
>>> - DIV(none, "div_i2s2", "sclk_audio2", DIV_PERIC5, 8, 6),
>>> + DIV(div_i2s1, "div_i2s1", "sclk_audio1", DIV_PERIC5, 0, 6),
>>> + DIV(div_i2s2, "div_i2s2", "sclk_audio2", DIV_PERIC5, 8, 6),
>>> DIV(sclk_pixel, "div_hdmi_pixel", "sclk_vpll", DIV_DISP1_0, 28, 4),
>>> DIV_A(none, "armclk", "div_arm", DIV_CPU0, 28, 3, "armclk"),
>>> DIV_F(none, "div_mipi1_pre", "div_mipi1",
>>> --
>>> 1.7.4.4
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Re: [PATCH 2/2] clk: exynos4: Add alias for cpufreq related clocks
On 06/11/2013 12:23 AM, Tomasz Figa wrote: > On Monday 10 of June 2013 09:13:11 Tushar Behera wrote: >> On 06/08/2013 05:20 PM, Tomasz Figa wrote: >>> On Thursday 06 of June 2013 16:52:28 Tushar Behera wrote: [ ... ] MUX_A(mout_core, "mout_core", mout_core_p4210, - SRC_CPU, 16, 1, "mout_core"), + SRC_CPU, 16, 1, "moutcore"), >>> >>> IMHO those typo corrections are not part of this patch. >> >> But the older drivers (before migration to CCF) were using the clock >> "moutcore" (not "mout_core"). > > I mean, this should be placed in a separate patch, as this change is not > "adding alias for cpufreq related clocks", but rather fixing a typo. > Is it ok if I split this patch into 2, one adding clock alias 'mout_apll' and another one fixing the alias names 'mout_mpll', 'moutcore' and 'armclk'? [ ... ] >>> Basically I don't like the idea of those global aliases, which IMHO >>> should be completely dropped. Someone might not like it, but I'd go >>> with the conversion of our cpufreq drivers to platform drivers >>> instead, which could receive things like clocks and regulators using >>> DT-based lookups. >> I agree. Migration of exynos-cpufreq driver as a platform driver is the >> best solution. But unless someone picks up that work, cpufreq support >> for EXYNOS4 based systems is broken because of the incorrect clock >> aliases. > > We have patches for this in our internal tree. I will clean them up a bit > and submit soon. > If you are going to submit the cpufreq driver patches for v3.11, then we can ignore this patchset. Otherwise, I would prefer to get these patches merged for v3.11 to get cpufreq working. Once the driver changes are incorporated, we can very well modify these later. Thanks. -- Tushar Behera -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/2] ARM: exynos_defconfig: Enable GPIO buttons driver
Many of the boards use GPIO-mapped buttons for generic input. For Arndale board, these buttons also serve as wakeup source. Signed-off-by: Tushar Behera --- arch/arm/configs/exynos_defconfig |1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/configs/exynos_defconfig b/arch/arm/configs/exynos_defconfig index 227abf9..9ab979a 100644 --- a/arch/arm/configs/exynos_defconfig +++ b/arch/arm/configs/exynos_defconfig @@ -50,6 +50,7 @@ CONFIG_USB_USBNET=y CONFIG_USB_NET_SMSC75XX=y CONFIG_USB_NET_SMSC95XX=y CONFIG_INPUT_EVDEV=y +CONFIG_KEYBOARD_GPIO=y CONFIG_KEYBOARD_CROS_EC=y # CONFIG_MOUSE_PS2 is not set CONFIG_MOUSE_CYAPA=y -- 1.7.9.5 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 0/2] Enable config options to enable S2R wakeup
RTC source is very useful in testing S2R wakeup. Also enable gpio-keys driver in case someone wants wakeup the board using the buttons. S2R wakeup feature on Arndale depends on following two additional patches. 1. [PATCH 1/8] ARM: EXYNOS: use generic cpu idle function for wfi http://permalink.gmane.org/gmane.linux.linaro.devel/15871 2. [PATCH V2] ARM: dts: Enable RTC node for Arndale (Posted a couple of minutes back, link not available yet) S2R wakeup tested on Arndale board with an initramfs through both RTC wakeup alarm and GPIO button interrupt. Tushar Behera (2): ARM: exynos_defconfig: Enable GPIO buttons driver ARM: exynos_defconfig: Enable RTC driver arch/arm/configs/exynos_defconfig |3 +++ 1 file changed, 3 insertions(+) -- 1.7.9.5 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 2/2] ARM: exynos_defconfig: Enable RTC driver
The issues reported in commit 522ccdb6fd0e ("ARM: dts: Disable the RTC
by default on exynos5") are no longer reproduced on EXYNOS5250 based
systems.
Hence it would be better to re-enable RTC support for EXYNOS5250.
Signed-off-by: Tushar Behera
---
arch/arm/configs/exynos_defconfig |2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/configs/exynos_defconfig
b/arch/arm/configs/exynos_defconfig
index 9ab979a..ad7dfbb 100644
--- a/arch/arm/configs/exynos_defconfig
+++ b/arch/arm/configs/exynos_defconfig
@@ -105,6 +105,8 @@ CONFIG_MMC_SDHCI_S3C=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_IDMAC=y
CONFIG_MMC_DW_EXYNOS=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_S3C=y
CONFIG_COMMON_CLK_MAX77686=y
CONFIG_EXT2_FS=y
CONFIG_EXT3_FS=y
--
1.7.9.5
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[PATCH V2] ARM: dts: Enable RTC node for Arndale
The issues reported in commit 522ccdb6fd0e ("ARM: dts: Disable the RTC
by default on exynos5") are no longer reproduced on EXYNOS5250 based
Arndale board. Hence re-enabling RTC support for Arndale board.
This is helpful for testing S2R on Arndale board.
Signed-off-by: Tushar Behera
---
Changes for V2:
* RTC node is enabled only for Arndale board. Earlier it was enabled
in exynos5250.dtsi.
arch/arm/boot/dts/exynos5250-arndale.dts |4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts
b/arch/arm/boot/dts/exynos5250-arndale.dts
index 02cfc76..b38080a 100644
--- a/arch/arm/boot/dts/exynos5250-arndale.dts
+++ b/arch/arm/boot/dts/exynos5250-arndale.dts
@@ -449,4 +449,8 @@
clock-frequency = <2400>;
};
};
+
+ rtc {
+ status = "okay";
+ };
};
--
1.7.9.5
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Re: [PATCH V5 02/30] thermal: exynos: Add ARCH_HAS_TMU config to know the supported soc's
Hi Eduardo, On Mon, Jun 17, 2013 at 8:35 AM, Eduardo Valentin wrote: > Hey Amit, > > On 11-06-2013 08:53, Amit Daniel Kachhap wrote: >> This patch adds config sybmol ARCH_HAS_TMU to enable the TMU driver. >> This will allow adding support for new soc easily as now it is the >> platform responsibility to enable this config symbol. >> >> Acked-by: Kukjin Kim >> Signed-off-by: Amit Daniel Kachhap >> --- >> drivers/thermal/samsung/Kconfig |5 - >> 1 files changed, 4 insertions(+), 1 deletions(-) >> >> diff --git a/drivers/thermal/samsung/Kconfig >> b/drivers/thermal/samsung/Kconfig >> index 2d3d9dc..145a55d 100644 >> --- a/drivers/thermal/samsung/Kconfig >> +++ b/drivers/thermal/samsung/Kconfig >> @@ -1,6 +1,9 @@ >> +config ARCH_HAS_TMU >> + bool >> + >> config EXYNOS_THERMAL >> tristate "Temperature sensor on Samsung EXYNOS" >> - depends on (ARCH_EXYNOS4 || ARCH_EXYNOS5) >> + depends on ARCH_HAS_TMU > > I would rather use ARCH_HAS_BANDGAP as discussed and agreed during your > v4 review. I managed push this patch through RMK's system: > http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=7758/1 Agreed I will post my TMU re-structured patches with this config flag. Thanks, Amit Daniel > >> depends on CPU_THERMAL >> help >> If you say yes here you get support for TMU (Thermal Management >> > > > -- > You have got to be excited about what you are doing. (L. Lamport) > > Eduardo Valentin > -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 1/2] MAINTAINERS: Add Samsung pinctrl entries
Kyungmin Park skrev: >On Mon, Jun 17, 2013 at 7:17 AM, Doug Anderson >wrote: >> It's convenient if get_maintainer suggests sending samsung/exynos >> pinctrl changes to linux-samsung-soc and to Tomasz and Thomas. >> >> Signed-off-by: Doug Anderson >Acked-by: Kyungmin Park Acked-by: Olof Johansson -- Skickat från min Android-telefon med K-9 E-post. Ursäkta min fåordighet. -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 1/2] MAINTAINERS: Add Samsung pinctrl entries
On Mon, Jun 17, 2013 at 7:17 AM, Doug Anderson wrote: > It's convenient if get_maintainer suggests sending samsung/exynos > pinctrl changes to linux-samsung-soc and to Tomasz and Thomas. > > Signed-off-by: Doug Anderson Acked-by: Kyungmin Park > --- > Changes in v2: > - Updated with Thomas and Tomasz; removed Linus since he's already > there as part of the general pinctrl match. > > MAINTAINERS | 10 ++ > 1 file changed, 10 insertions(+) > > diff --git a/MAINTAINERS b/MAINTAINERS > index 8d97b3e..f55e3c7 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -6284,6 +6284,16 @@ L: linux-arm-ker...@lists.infradead.org > (moderated for non-subscribers) > S: Maintained > F: drivers/pinctrl/pinctrl-at91.c > > +PIN CONTROLLER - SAMSUNG > +M: Tomasz Figa > +M: Thomas Abraham > +L: linux-arm-ker...@lists.infradead.org (moderated for non-subscribers) > +L: linux-samsung-soc@vger.kernel.org (moderated for non-subscribers) > +S: Maintained > +F: drivers/pinctrl/pinctrl-exynos.* > +F: drivers/pinctrl/pinctrl-s3c* > +F: drivers/pinctrl/pinctrl-samsung.* > + > PIN CONTROLLER - ST SPEAR > M: Viresh Kumar > L: spear-de...@list.st.com > -- > 1.8.3 > > -- > To unsubscribe from this list: send the line "unsubscribe linux-kernel" in > the body of a message to majord...@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html > Please read the FAQ at http://www.tux.org/lkml/ -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/3] clk: exynos4: Staticize local symbols
On 13 June 2013 21:06, Sachin Kamat wrote:
> On 11 June 2013 09:46, Sachin Kamat wrote:
>> On 5 June 2013 17:44, Kukjin Kim wrote:
>>> Sachin Kamat wrote:
These symbols are used only in this file and hence should be
static.
Signed-off-by: Sachin Kamat
---
drivers/clk/samsung/clk-exynos4.c | 26 ++
1 file changed, 14 insertions(+), 12 deletions(-)
diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-
exynos4.c
index 7104669..26f2a85 100644
--- a/drivers/clk/samsung/clk-exynos4.c
+++ b/drivers/clk/samsung/clk-exynos4.c
@@ -339,24 +339,26 @@ PNAME(mout_user_aclk200_p4x12) = {"fin_pll",
"div_aclk200", };
PNAME(mout_user_aclk266_gps_p4x12) = {"fin_pll", "div_aclk266_gps", };
/* fixed rate clocks generated outside the soc */
-struct samsung_fixed_rate_clock exynos4_fixed_rate_ext_clks[] __initdata
= {
+static struct
+samsung_fixed_rate_clock exynos4_fixed_rate_ext_clks[] __initdata = {
>>>
>>> Any reason to use double lines?
>>
>> This is one of the ways to avoid exceeding 80 column limit.
>>
>>>
FRATE(xxti, "xxti", NULL, CLK_IS_ROOT, 0),
FRATE(xusbxti, "xusbxti", NULL, CLK_IS_ROOT, 0),
};
>>>
>>> [...]
>>>
-struct samsung_fixed_rate_clock exynos4210_fixed_rate_clks[] __initdata =
{
+static struct
+samsung_fixed_rate_clock exynos4210_fixed_rate_clks[] __initdata = {
>>>
>>> Same as above.
>>>
FRATE(none, "sclk_usbphy1", NULL, CLK_IS_ROOT, 4800),
};
>>> [...]
>>>
>>> Others look good to me,
>>> Acked-by: Kukjin Kim
>>>
>>> Mike, please pick this into the clk tree if you're ok.
>>>
>>
>> Mike,
>> If you are taking this through your tree, please also take the below
>> patch [1] as it is dependent on this series.
>> [1] https://patchwork.kernel.org/patch/2469891/
>
>
> Ping Mike..
Kukjin,
Haven't heard back from Mike regarding this. Can you please take this
through your tree?
--
With warm regards,
Sachin
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Re: [PATCH v2] clk: exynos4: Add clock entries for TMU
On 10 June 2013 14:21, Sachin Kamat wrote: > Hi Kukjin, > > On 29 April 2013 22:30, Mike Turquette wrote: >> Quoting Sachin Kamat (2013-04-21 20:55:46) >>> Added clock entries for thermal management unit (TMU) for >>> Exynos4 SoCs. >>> >>> Signed-off-by: Sachin Kamat >>> Cc: Thomas Abraham >>> Cc: Mike Turquette >> >> This has my Ack if you plan to take it through the Samsung tree. >> If you want it to go through the clk tree then I can take it in after >> 3.10-rc1. > > Can you apply this one too to Samsung tree? > Thanks. Kukjin, Can you please take this through your tree? This alreday has MIke's Ack. -- With warm regards, Sachin -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] ARM: dts: Enable RTC node for exynos5250
On 14 June 2013 20:31, Doug Anderson wrote:
> Tushar,
>
> On Thu, Jun 13, 2013 at 10:56 PM, Tushar Behera
> wrote:
>> The kernel dump produced by s3c-rtc driver as reported by
>> commit 522ccdb6fd0e ("ARM: dts: Disable the RTC by default on exynos5")
>> are no longer reproducible in latest kernel.
>>
>> Hence it would be good to re-enable RTC support for EXYNOS5250.
>>
>> Signed-off-by: Tushar Behera
>> ---
>> arch/arm/boot/dts/exynos5250.dtsi |1 -
>> 1 file changed, 1 deletion(-)
>
> I would prefer we not commit this.
>
> The original commit wasn't just about avoiding the bug (though that
I thought the intention of the original commit was just that. :-)
> was a nice side effect). My understanding is that the SoC dtsi file
> ought to have most peripherals disabled by default and individual
> board dts files should enable the peripherals that they want. I think
> exynos5250 is particularly bad about this right now (it starts with
> most peripherals enabled) but that should probably be fixed...
>
I agree, all the peripherals should be fixed for this, not just RTC.
> If my understanding is wrong, others on the list should definitely speak up!
> :)
>
Let me know if you still prefer to keep RTC node disabled on exynos5250.dtsi.
In that case, I would enable it only for Arndale.
> -Doug
Thanks.
--
Tushar Behera
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Re: [PATCH V5 02/30] thermal: exynos: Add ARCH_HAS_TMU config to know the supported soc's
Hey Amit, On 11-06-2013 08:53, Amit Daniel Kachhap wrote: > This patch adds config sybmol ARCH_HAS_TMU to enable the TMU driver. > This will allow adding support for new soc easily as now it is the > platform responsibility to enable this config symbol. > > Acked-by: Kukjin Kim > Signed-off-by: Amit Daniel Kachhap > --- > drivers/thermal/samsung/Kconfig |5 - > 1 files changed, 4 insertions(+), 1 deletions(-) > > diff --git a/drivers/thermal/samsung/Kconfig b/drivers/thermal/samsung/Kconfig > index 2d3d9dc..145a55d 100644 > --- a/drivers/thermal/samsung/Kconfig > +++ b/drivers/thermal/samsung/Kconfig > @@ -1,6 +1,9 @@ > +config ARCH_HAS_TMU > + bool > + > config EXYNOS_THERMAL > tristate "Temperature sensor on Samsung EXYNOS" > - depends on (ARCH_EXYNOS4 || ARCH_EXYNOS5) > + depends on ARCH_HAS_TMU I would rather use ARCH_HAS_BANDGAP as discussed and agreed during your v4 review. I managed push this patch through RMK's system: http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=7758/1 > depends on CPU_THERMAL > help > If you say yes here you get support for TMU (Thermal Management > -- You have got to be excited about what you are doing. (L. Lamport) Eduardo Valentin signature.asc Description: OpenPGP digital signature
Re: [PATCH 1/9] drm/exynos: use SoC name to identify hdmi version
Thanks Seung-Woo,
On Fri, Jun 14, 2013 at 12:23 PM, 김승우 wrote:
> Hello Rahul,
>
> On 2013년 06월 11일 23:11, Rahul Sharma wrote:
>> Exynos hdmi IP version is named after hdmi specification version i.e.
>> 1.3 and 1.4. This versioning mechanism is not sufficient to handle
>> the diversity in the hdmi/phy IPs which are present across the exynos
>> SoC family.
>>
>> This patch changes the hdmi version to the name of the SoC in which
>> the IP was introduced for the first time. Same version is applicable
>> to all subsequent SoCs having the same IP version.
>>
>> Exynos4210 has 1.3 HDMI, i2c mapped phy with configuration set.
>> Exynos5250 has 1.4 HDMI, i2c mapped phy with configuration set.
>> Exynos5420 has 1.4 HDMI, Platform Bus mapped phy with configuration set.
>>
>> Based on the HDMI IP version we cannot decide to pick Exynos5250 phy conf
>> and use i2c for data transfer or Exynos5420 phy confs and platform bus
>> calls for communication.
>
> Considering your other patch to divide hdmi and hdmiphy, how do you
> think using hdmiphy version parsed from hdmiphy dt binding from phy code
> instead of using hdmi version for both hdmi and hdmiphy? If that, this
> SoC identifying hdmi version is not necessary because there is no change
> at least in hdmi side.
>
> And IMO, it seems easy to merge hdmiphy related patch first before
> merging patch for exynos5420.
>
You are right. If we isolate hdmiphy first from hdmi IP driver, we
dont need this
patch. I will revive the hdmiphy separation patch and get that merge first.
regards,
Rahul Sharma.
>>
>> Signed-off-by: Rahul Sharma
>> ---
>> drivers/gpu/drm/exynos/exynos_hdmi.c | 249
>> +-
>> drivers/gpu/drm/exynos/regs-hdmi.h | 78 +--
>> 2 files changed, 164 insertions(+), 163 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c
>> b/drivers/gpu/drm/exynos/exynos_hdmi.c
>> index 75a6bf3..9384ffc 100644
>> --- a/drivers/gpu/drm/exynos/exynos_hdmi.c
>> +++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
>> @@ -73,9 +73,9 @@ enum HDMI_PACKET_TYPE {
>> HDMI_PACKET_TYPE_AUI = HDMI_PACKET_TYPE_INFOFRAME + 4
>> };
>>
>> -enum hdmi_type {
>> - HDMI_TYPE13,
>> - HDMI_TYPE14,
>> +enum hdmi_version {
>> + HDMI_VER_EXYNOS4210,
>> + HDMI_VER_EXYNOS4212,
>> };
>
>
>
> --
> Seung-Woo Kim
> Samsung Software R&D Center
> --
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc"
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[PATCH v2 2/2] MAINTAINERS: Add exynos filename match to ARM/S5P EXYNOS ARM ARCHITECTURES
This will help direct patches related to exynos to the linux-samsung-soc mailing list for discussion. Suggested by Joe Perches. Signed-off-by: Doug Anderson --- Changes in v2: - New for this version. MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index f55e3c7..2e95fd8 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1140,6 +1140,7 @@ L:linux-samsung-soc@vger.kernel.org (moderated for non-subscribers) S: Maintained F: arch/arm/mach-s5p*/ F: arch/arm/mach-exynos*/ +N: exynos ARM/SAMSUNG MOBILE MACHINE SUPPORT M: Kyungmin Park -- 1.8.3 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 1/2] MAINTAINERS: Add Samsung pinctrl entries
It's convenient if get_maintainer suggests sending samsung/exynos pinctrl changes to linux-samsung-soc and to Tomasz and Thomas. Signed-off-by: Doug Anderson --- Changes in v2: - Updated with Thomas and Tomasz; removed Linus since he's already there as part of the general pinctrl match. MAINTAINERS | 10 ++ 1 file changed, 10 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 8d97b3e..f55e3c7 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -6284,6 +6284,16 @@ L: linux-arm-ker...@lists.infradead.org (moderated for non-subscribers) S: Maintained F: drivers/pinctrl/pinctrl-at91.c +PIN CONTROLLER - SAMSUNG +M: Tomasz Figa +M: Thomas Abraham +L: linux-arm-ker...@lists.infradead.org (moderated for non-subscribers) +L: linux-samsung-soc@vger.kernel.org (moderated for non-subscribers) +S: Maintained +F: drivers/pinctrl/pinctrl-exynos.* +F: drivers/pinctrl/pinctrl-s3c* +F: drivers/pinctrl/pinctrl-samsung.* + PIN CONTROLLER - ST SPEAR M: Viresh Kumar L: spear-de...@list.st.com -- 1.8.3 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [RFC PATCH 3/5] video: exynos_dsi: Use generic PHY driver
On Friday 14 of June 2013 19:45:49 Sylwester Nawrocki wrote:
> Use the generic PHY API instead of the platform callback to control
> the MIPI DSIM DPHY.
>
> Signed-off-by: Sylwester Nawrocki
> Signed-off-by: Kyungmin Park
> ---
> drivers/video/display/source-exynos_dsi.c | 36
> + include/video/exynos_dsi.h
> |5
> 2 files changed, 11 insertions(+), 30 deletions(-)
Yes, this is what I was really missing a lot while developing this driver.
Definitely looks good! It's a shame we don't have this driver in mainline
yet ;) ,
Best regards,
Tomasz
> diff --git a/drivers/video/display/source-exynos_dsi.c
> b/drivers/video/display/source-exynos_dsi.c index 145d57b..dfab790
> 100644
> --- a/drivers/video/display/source-exynos_dsi.c
> +++ b/drivers/video/display/source-exynos_dsi.c
> @@ -24,6 +24,7 @@
> #include
> #include
> #include
> +#include
> #include
> #include
> #include
> @@ -219,6 +220,7 @@ struct exynos_dsi {
> bool enabled;
>
> struct platform_device *pdev;
> + struct phy *phy;
> struct device *dev;
> struct resource *res;
> struct clk *pll_clk;
> @@ -816,6 +818,7 @@ again:
>
> static bool exynos_dsi_transfer_finish(struct exynos_dsi *dsi)
> {
> + static unsigned long j;
> struct exynos_dsi_transfer *xfer;
> unsigned long flags;
> bool start = true;
> @@ -824,7 +827,8 @@ static bool exynos_dsi_transfer_finish(struct
> exynos_dsi *dsi)
>
> if (list_empty(&dsi->transfer_list)) {
> spin_unlock_irqrestore(&dsi->transfer_lock, flags);
> - dev_warn(dsi->dev, "unexpected TX/RX interrupt\n");
> + if (printk_timed_ratelimit(&j, 500))
> + dev_warn(dsi->dev, "unexpected TX/RX
interrupt\n");
> return false;
> }
>
> @@ -994,8 +998,7 @@ static int exynos_dsi_enable(struct video_source
> *src) clk_prepare_enable(dsi->bus_clk);
> clk_prepare_enable(dsi->pll_clk);
>
> - if (dsi->pd->phy_enable)
> - dsi->pd->phy_enable(dsi->pdev, true);
> + phy_power_on(dsi->phy);
>
> exynos_dsi_reset(dsi);
> exynos_dsi_init_link(dsi);
> @@ -1019,8 +1022,7 @@ static int exynos_dsi_disable(struct video_source
> *src)
>
> exynos_dsi_disable_clock(dsi);
>
> - if (dsi->pd->phy_enable)
> - dsi->pd->phy_enable(dsi->pdev, false);
> + phy_power_off(dsi->phy);
>
> clk_disable_unprepare(dsi->pll_clk);
> clk_disable_unprepare(dsi->bus_clk);
> @@ -1099,12 +1101,6 @@ static const struct dsi_video_source_ops
> exynos_dsi_ops = { * Device Tree
> */
>
> -static int (* const of_phy_enables[])(struct platform_device *, bool) =
> { -#ifdef CONFIG_S5P_SETUP_MIPIPHY
> - [0] = s5p_dsim_phy_enable,
> -#endif
> -};
> -
> static struct exynos_dsi_platform_data *exynos_dsi_parse_dt(
> struct platform_device
*pdev)
> {
> @@ -1112,7 +1108,6 @@ static struct exynos_dsi_platform_data
> *exynos_dsi_parse_dt( struct exynos_dsi_platform_data *dsi_pd;
> struct device *dev = &pdev->dev;
> const __be32 *prop_data;
> - u32 val;
>
> dsi_pd = kzalloc(sizeof(*dsi_pd), GFP_KERNEL);
> if (!dsi_pd) {
> @@ -1120,19 +1115,6 @@ static struct exynos_dsi_platform_data
> *exynos_dsi_parse_dt( return NULL;
> }
>
> - prop_data = of_get_property(node, "samsung,phy-type", NULL);
> - if (!prop_data) {
> - dev_err(dev, "failed to get phy-type property\n");
> - goto err_free_pd;
> - }
> -
> - val = be32_to_cpu(*prop_data);
> - if (val >= ARRAY_SIZE(of_phy_enables) || !of_phy_enables[val]) {
> - dev_err(dev, "Invalid phy-type %u\n", val);
> - goto err_free_pd;
> - }
> - dsi_pd->phy_enable = of_phy_enables[val];
> -
> prop_data = of_get_property(node, "samsung,pll-stable-time",
NULL);
> if (!prop_data) {
> dev_err(dev, "failed to get pll-stable-time property\n");
> @@ -1254,6 +1236,10 @@ static int exynos_dsi_probe(struct
> platform_device *pdev) return -ENOMEM;
> }
>
> + dsi->phy = devm_phy_get(&pdev->dev, "dsim");
> + if (IS_ERR(dsi->phy))
> + return PTR_ERR(dsi->phy);
> +
> platform_set_drvdata(pdev, dsi);
>
> dsi->irq = platform_get_irq(pdev, 0);
> diff --git a/include/video/exynos_dsi.h b/include/video/exynos_dsi.h
> index 95e1568..5c062c7 100644
> --- a/include/video/exynos_dsi.h
> +++ b/include/video/exynos_dsi.h
> @@ -25,9 +25,6 @@
> */
> struct exynos_dsi_platform_data {
> unsigned int enabled;
> -
> - int (*phy_enable)(struct platform_device *pdev, bool on);
> -
> unsigned int pll_stable_time;
> unsigned long pll_clk_rate;
> unsigned long esc_clk_rate;
> @@ -36,6 +33,4 @@ struct exynos_dsi_platform_data {
> unsigned short rx_timeout;
> };
>
> -int s5p_dsim_phy_enable(struct platform_device *pdev, bool on);
> -
> #endif /
Re: [RFC PATCH 2/5] ARM: dts: Add MIPI PHY node to exynos4.dtsi
On Friday 14 of June 2013 19:45:48 Sylwester Nawrocki wrote:
> Add PHY provider node for the MIPI CSIS and MIPI DSIM PHYs.
>
> Signed-off-by: Sylwester Nawrocki
> Signed-off-by: Kyungmin Park
> ---
> arch/arm/boot/dts/exynos4.dtsi | 12
> 1 file changed, 12 insertions(+)
>
> diff --git a/arch/arm/boot/dts/exynos4.dtsi
> b/arch/arm/boot/dts/exynos4.dtsi index d505ece..4b7ce52 100644
> --- a/arch/arm/boot/dts/exynos4.dtsi
> +++ b/arch/arm/boot/dts/exynos4.dtsi
> @@ -120,12 +120,20 @@
> reg = <0x1001 0x400>;
> };
>
> + mipi_phy: video-phy {
nit: video-phy@10020710
Best regards,
Tomasz
> + compatible = "samsung,s5pv210-video-phy";
> + reg = <0x10020710 8>;
> + #phy-cells = <1>;
> + };
> +
> dsi_0: dsi@11C8 {
> compatible = "samsung,exynos4210-mipi-dsi";
> reg = <0x11C8 0x1>;
> interrupts = <0 79 0>;
> samsung,phy-type = <0>;
> samsung,power-domain = <&pd_lcd0>;
> + phys = <&mipi_phy 1>;
> + phy-names = "dsim";
> clocks = <&clock 286>, <&clock 143>;
> clock-names = "bus_clk", "pll_clk";
> status = "disabled";
> @@ -181,6 +189,8 @@
> interrupts = <0 78 0>;
> bus-width = <4>;
> samsung,power-domain = <&pd_cam>;
> + phys = <&mipi_phy 0>;
> + phy-names = "csis";
> status = "disabled";
> };
>
> @@ -190,6 +200,8 @@
> interrupts = <0 80 0>;
> bus-width = <2>;
> samsung,power-domain = <&pd_cam>;
> + phys = <&mipi_phy 2>;
> + phy-names = "csis";
> status = "disabled";
> };
> };
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Re: [RFC PATCH 1/5] phy: Add driver for Exynos MIPI CSIS/DSIM DPHYs
Hi Sylwester,
Looks good, but I added some nitpicks inline.
On Friday 14 of June 2013 19:45:47 Sylwester Nawrocki wrote:
> Add a PHY provider driver for the Samsung S5P/Exynos SoC MIPI CSI-2
> receiver and MIPI DSI transmitter DPHYs.
>
> Signed-off-by: Sylwester Nawrocki
> Signed-off-by: Kyungmin Park
> ---
> .../bindings/phy/exynos-video-mipi-phy.txt | 16 ++
> drivers/phy/Kconfig| 10 ++
> drivers/phy/Makefile |3 +-
> drivers/phy/exynos_video_mipi_phy.c| 166
> 4 files changed, 194 insertions(+), 1 deletion(-)
> create mode 100644
> Documentation/devicetree/bindings/phy/exynos-video-mipi-phy.txt create
> mode 100644 drivers/phy/exynos_video_mipi_phy.c
>
> diff --git
> a/Documentation/devicetree/bindings/phy/exynos-video-mipi-phy.txt
> b/Documentation/devicetree/bindings/phy/exynos-video-mipi-phy.txt new
> file mode 100644
> index 000..32311c89
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/exynos-video-mipi-phy.txt
> @@ -0,0 +1,16 @@
> +Samsung S5P/EXYNOS SoC series MIPI CSIS/DSIM DPHY
> +-
> +
> +Required properties:
> +- compatible : "samsung,-video-phy", currently most SoCs can
I don't like this here. It sounds like any SoC name can be put
here. IMHO just listing all supported compatible values should be enough.
> claim + compatibility with the S5PV210 MIPI CSIS/DSIM PHY and thus
> should use + "samsung,s5pv210-video-phy";
> +- reg : offset and length of the MIPI DPHY register set;
> +- #phy-cells : from the generic phy bindings, must be 1;
> +
> +For "samsung,s5pv210-video-phy" compatible DPHYs the second cell in the
> PHY +specifier identifies the DPHY and its meaning is as follows:
> + 0 - MIPI CSIS 0,
> + 1 - MIPI DSIM 0,
> + 2 - MIPI CSIS 1,
> + 3 - MIPI DSIM 1.
> diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
> index 0764a54..d234e99 100644
> --- a/drivers/phy/Kconfig
> +++ b/drivers/phy/Kconfig
> @@ -11,3 +11,13 @@ menuconfig GENERIC_PHY
> devices present in the kernel. This layer will have the generic
> API by which phy drivers can create PHY using the phy framework
and
> phy users can obtain reference to the PHY.
> +
> +if GENERIC_PHY
> +
> +config EXYNOS_VIDEO_MIPI_PHY
> + bool "S5P/EXYNOS MIPI CSI-2/DSI PHY driver"
> + depends on OF
Hmm. Is this driver designed only for OF-enabled boards?
> + help
> + Support for MIPI CSI-2 and MIPI DSI DPHY found on Samsung
> + S5P and EXYNOS SoCs.
> +endif
> diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
> index 9e9560f..b16f2c1 100644
> --- a/drivers/phy/Makefile
> +++ b/drivers/phy/Makefile
> @@ -2,4 +2,5 @@
> # Makefile for the phy drivers.
> #
>
> -obj-$(CONFIG_GENERIC_PHY)+= phy-core.o
> +obj-$(CONFIG_GENERIC_PHY)+= phy-core.o
> +obj-$(CONFIG_EXYNOS_VIDEO_MIPI_PHY) += exynos_video_mipi_phy.o
> diff --git a/drivers/phy/exynos_video_mipi_phy.c
> b/drivers/phy/exynos_video_mipi_phy.c new file mode 100644
> index 000..8d4976f
> --- /dev/null
> +++ b/drivers/phy/exynos_video_mipi_phy.c
> @@ -0,0 +1,166 @@
> +/*
> + * Samsung S5P/EXYNOS SoC series MIPI CSIS/DSIM DPHY driver
> + *
> + * Copyright (C) 2013 Samsung Electronics Co., Ltd.
> + * Author: Sylwester Nawrocki
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as +
> * published by the Free Software Foundation.
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +/* MIPI_PHYn_CONTROL register bit definitions */
> +#define EXYNOS_MIPI_PHY_ENABLE (1 << 0)
> +#define EXYNOS_MIPI_PHY_SRESETN (1 << 1)
> +#define EXYNOS_MIPI_PHY_MRESETN (1 << 2)
> +#define EXYNOS_MIPI_PHY_RESET_MASK (3 << 1)
> +
> +#define EXYNOS_MAX_VIDEO_PHYS4
> +
> +struct exynos_video_phy {
> + spinlock_t slock;
> + struct phy *phys[EXYNOS_MAX_VIDEO_PHYS];
> + void __iomem *regs;
> +};
> +
> +/*
> + * The @id argument specifies MIPI CSIS or DSIM PHY as follows:
> + * 0 - MIPI CSIS 0
> + * 1 - MIPI DSIM 0
> + * 2 - MIPI CSIS 1
> + * 3 - MIPI DSIM 1
> + */
> +static int set_phy_state(struct exynos_video_phy *state,
> + unsigned int id, int on)
> +{
> + void __iomem *addr = id < 2 ? state->regs : state->regs + 4;
I don't find this statement too readable. What about:
void __iomem *addr = state->regs;
and below:
/* CSIS 1 and DSIM 1 PHYs have separate register */
if (id >= 2)
addr += 4;
> + unsigned long flags;
> + u32 reg, reset;
> +
> + pr_debug("%s(): id: %d, on: %d, addr: %#x, base: %#x\n",
> + __func__, id, on, (u32)addr, (u32)state->regs);
> +
> + if (WARN_ON(id > EXYNOS_MAX_VIDEO_PH
Re: [PATCH v2 2/3] ARM: SAMSUNG: Consolidate uncompress subroutine
On 06/13/13 15:04, Tushar Behera wrote: On 06/04/2013 09:49 AM, Tushar Behera wrote: For mach-exynos, uart_base is a pointer and the value is calculated in the machine folder. For other machines, uart_base is defined as a macro in platform directory. For symmetry, the uart_base macro definition is removed and the uart_base calculation is moved to specific machine folders. This would help us consolidating uncompress subroutine for s5p64x0. Signed-off-by: Tushar Behera --- Changes for v2: * Remove ifdef's while calculating uart_base value. Kukjin, Would you please queue this up for 3.11? Sure, applied this and 3rd for 3.11. Thanks, - Kukjin -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[RFC PATCH 03/11] dma: amba-pl08x: Add support for different offset of CONFIG register
Some variants of PL08x (namely PL080S, found in Samsung S3C64xx SoCs)
have CONFIG register at different offset. This patch makes the driver
use offset from vendor data struct.
Signed-off-by: Tomasz Figa
---
drivers/dma/amba-pl08x.c | 51
1 file changed, 30 insertions(+), 21 deletions(-)
diff --git a/drivers/dma/amba-pl08x.c b/drivers/dma/amba-pl08x.c
index 1e57ded..93913b4 100644
--- a/drivers/dma/amba-pl08x.c
+++ b/drivers/dma/amba-pl08x.c
@@ -107,6 +107,7 @@ struct pl08x_driver_data;
* @flags: Vendor-specific flags, see PL08X_IS_*
*/
struct vendor_data {
+ u8 config_offset;
u8 channels;
u32 flags;
};
@@ -334,11 +335,12 @@ static void pl08x_release_mux(struct pl08x_dma_chan
*plchan)
*/
/* Whether a certain channel is busy or not */
-static int pl08x_phy_channel_busy(struct pl08x_phy_chan *ch)
+static int pl08x_phy_channel_busy(struct pl08x_driver_data *pl08x,
+ struct pl08x_phy_chan *ch)
{
unsigned int val;
- val = readl(ch->base + PL080_CH_CONFIG);
+ val = readl(ch->base + pl08x->vd->config_offset);
return val & PL080_CONFIG_ACTIVE;
}
@@ -362,7 +364,7 @@ static void pl08x_start_next_txd(struct pl08x_dma_chan
*plchan)
plchan->at = txd;
/* Wait for channel inactive */
- while (pl08x_phy_channel_busy(phychan))
+ while (pl08x_phy_channel_busy(pl08x, phychan))
cpu_relax();
lli = &txd->llis_va[0];
@@ -377,7 +379,7 @@ static void pl08x_start_next_txd(struct pl08x_dma_chan
*plchan)
writel(lli->dst, phychan->base + PL080_CH_DST_ADDR);
writel(lli->lli, phychan->base + PL080_CH_LLI);
writel(lli->cctl, phychan->base + PL080_CH_CONTROL);
- writel(txd->ccfg, phychan->base + PL080_CH_CONFIG);
+ writel(txd->ccfg, phychan->base + pl08x->vd->config_offset);
/* Enable the DMA channel */
/* Do not access config register until channel shows as disabled */
@@ -385,11 +387,13 @@ static void pl08x_start_next_txd(struct pl08x_dma_chan
*plchan)
cpu_relax();
/* Do not access config register until channel shows as inactive */
- val = readl(phychan->base + PL080_CH_CONFIG);
+
+ val = readl(phychan->base + pl08x->vd->config_offset);
while ((val & PL080_CONFIG_ACTIVE) || (val & PL080_CONFIG_ENABLE))
- val = readl(phychan->base + PL080_CH_CONFIG);
+ val = readl(phychan->base + pl08x->vd->config_offset);
- writel(val | PL080_CONFIG_ENABLE, phychan->base + PL080_CH_CONFIG);
+ writel(val | PL080_CONFIG_ENABLE,
+ phychan->base + pl08x->vd->config_offset);
}
/*
@@ -402,34 +406,36 @@ static void pl08x_start_next_txd(struct pl08x_dma_chan
*plchan)
* For P->M transfers, disable the peripheral first to stop it filling
* the DMAC FIFO, and then pause the DMAC.
*/
-static void pl08x_pause_phy_chan(struct pl08x_phy_chan *ch)
+static void pl08x_pause_phy_chan(struct pl08x_driver_data *pl08x,
+ struct pl08x_phy_chan *ch)
{
u32 val;
int timeout;
/* Set the HALT bit and wait for the FIFO to drain */
- val = readl(ch->base + PL080_CH_CONFIG);
+ val = readl(ch->base + pl08x->vd->config_offset);
val |= PL080_CONFIG_HALT;
- writel(val, ch->base + PL080_CH_CONFIG);
+ writel(val, ch->base + pl08x->vd->config_offset);
/* Wait for channel inactive */
for (timeout = 1000; timeout; timeout--) {
- if (!pl08x_phy_channel_busy(ch))
+ if (!pl08x_phy_channel_busy(pl08x, ch))
break;
udelay(1);
}
- if (pl08x_phy_channel_busy(ch))
+ if (pl08x_phy_channel_busy(pl08x, ch))
pr_err("pl08x: channel%u timeout waiting for pause\n", ch->id);
}
-static void pl08x_resume_phy_chan(struct pl08x_phy_chan *ch)
+static void pl08x_resume_phy_chan(struct pl08x_driver_data *pl08x,
+ struct pl08x_phy_chan *ch)
{
u32 val;
/* Clear the HALT bit */
- val = readl(ch->base + PL080_CH_CONFIG);
+ val = readl(ch->base + pl08x->vd->config_offset);
val &= ~PL080_CONFIG_HALT;
- writel(val, ch->base + PL080_CH_CONFIG);
+ writel(val, ch->base + pl08x->vd->config_offset);
}
/*
@@ -441,12 +447,12 @@ static void pl08x_resume_phy_chan(struct pl08x_phy_chan
*ch)
static void pl08x_terminate_phy_chan(struct pl08x_driver_data *pl08x,
struct pl08x_phy_chan *ch)
{
- u32 val = readl(ch->base + PL080_CH_CONFIG);
+ u32 val = readl(ch->base + pl08x->vd->config_offset);
val &= ~(PL080_CONFIG_ENABLE | PL080_CONFIG_ERR_IRQ_MASK |
PL080_CONFIG_TC_IRQ_MASK);
- writel(val, ch->base + PL080_CH_CONFIG);
+ writel(val, ch->base + pl08x
[RFC PATCH 01/11] dma: amba-pl08x: Use bitmap to pass variant specific quirks
Instead of defining new bool field in vendor_data struct for each quirk,
it is more reasonable to use a single flags field and make each quirk
use single bits.
Signed-off-by: Tomasz Figa
---
drivers/dma/amba-pl08x.c | 31 +--
1 file changed, 17 insertions(+), 14 deletions(-)
diff --git a/drivers/dma/amba-pl08x.c b/drivers/dma/amba-pl08x.c
index 8bad254..d443a68 100644
--- a/drivers/dma/amba-pl08x.c
+++ b/drivers/dma/amba-pl08x.c
@@ -93,18 +93,22 @@
static struct amba_driver pl08x_amba_driver;
struct pl08x_driver_data;
+/** Controller supports dual AHB masters. */
+#define PL08X_IS_DUALMASTER(1 << 0)
+/**
+ * Controller has Nomadik security extension bits that need to be checked
+ * for permission before use and some registers are missing.
+ */
+#define PL08X_IS_NOMADIK (1 << 1)
+
/**
* struct vendor_data - vendor-specific config parameters for PL08x derivatives
* @channels: the number of channels available in this variant
- * @dualmaster: whether this version supports dual AHB masters or not.
- * @nomadik: whether the channels have Nomadik security extension bits
- * that need to be checked for permission before use and some registers are
- * missing
+ * @flags: Vendor-specific flags, see PL08X_IS_*
*/
struct vendor_data {
u8 channels;
- bool dualmaster;
- bool nomadik;
+ u32 flags;
};
/*
@@ -1391,7 +1395,7 @@ static struct dma_async_tx_descriptor
*pl08x_prep_dma_memcpy(
/* Both to be incremented or the code will break */
txd->cctl |= PL080_CONTROL_SRC_INCR | PL080_CONTROL_DST_INCR;
- if (pl08x->vd->dualmaster)
+ if (pl08x->vd->flags & PL08X_IS_DUALMASTER)
txd->cctl |= pl08x_select_bus(pl08x->mem_buses,
pl08x->mem_buses);
@@ -1612,7 +1616,7 @@ bool pl08x_filter_id(struct dma_chan *chan, void *chan_id)
static void pl08x_ensure_on(struct pl08x_driver_data *pl08x)
{
/* The Nomadik variant does not have the config register */
- if (pl08x->vd->nomadik)
+ if (pl08x->vd->flags & PL08X_IS_NOMADIK)
return;
writel(PL080_CONFIG_ENABLE, pl08x->base + PL080_CONFIG);
}
@@ -1897,7 +1901,7 @@ static int pl08x_probe(struct amba_device *adev, const
struct amba_id *id)
/* By default, AHB1 only. If dualmaster, from platform */
pl08x->lli_buses = PL08X_AHB1;
pl08x->mem_buses = PL08X_AHB1;
- if (pl08x->vd->dualmaster) {
+ if (pl08x->vd->flags & PL08X_IS_DUALMASTER) {
pl08x->lli_buses = pl08x->pd->lli_buses;
pl08x->mem_buses = pl08x->pd->mem_buses;
}
@@ -1954,7 +1958,7 @@ static int pl08x_probe(struct amba_device *adev, const
struct amba_id *id)
* down for the secure world only. Lock up these channels
* by perpetually serving a dummy virtual channel.
*/
- if (vd->nomadik) {
+ if (vd->flags & PL08X_IS_NOMADIK) {
u32 val;
val = readl(ch->base + PL080_CH_CONFIG);
@@ -2039,18 +2043,17 @@ out_no_pl08x:
/* PL080 has 8 channels and the PL080 have just 2 */
static struct vendor_data vendor_pl080 = {
.channels = 8,
- .dualmaster = true,
+ .flags = PL08X_IS_DUALMASTER,
};
static struct vendor_data vendor_nomadik = {
.channels = 8,
- .dualmaster = true,
- .nomadik = true,
+ .flags = PL08X_IS_DUALMASTER | PL08X_IS_NOMADIK,
};
static struct vendor_data vendor_pl081 = {
.channels = 2,
- .dualmaster = false,
+ .flags = 0,
};
static struct amba_id pl08x_ids[] = {
--
1.8.2.1
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[RFC PATCH 02/11] dma: amba-pl08x: Refactor pl08x_getbytes_chan() to lower indentation
Further patch will introduce support for PL080S, which requires some
things to be done conditionally, thus increasing indentation level of
some functions even more.
This patch reduces indentation level of pl08x_getbytes_chan() function
by inverting several conditions and returning from function wherever
possible.
Signed-off-by: Tomasz Figa
---
drivers/dma/amba-pl08x.c | 51 ++--
1 file changed, 28 insertions(+), 23 deletions(-)
diff --git a/drivers/dma/amba-pl08x.c b/drivers/dma/amba-pl08x.c
index d443a68..1e57ded 100644
--- a/drivers/dma/amba-pl08x.c
+++ b/drivers/dma/amba-pl08x.c
@@ -473,47 +473,52 @@ static inline u32 get_bytes_in_cctl(u32 cctl)
/* The channel should be paused when calling this */
static u32 pl08x_getbytes_chan(struct pl08x_dma_chan *plchan)
{
+ struct pl08x_lli *llis_va;
struct pl08x_phy_chan *ch;
+ dma_addr_t llis_bus;
struct pl08x_txd *txd;
size_t bytes = 0;
+ int index;
+ u32 clli;
ch = plchan->phychan;
txd = plchan->at;
+ if (!ch || !txd)
+ return bytes;
+
/*
* Follow the LLIs to get the number of remaining
* bytes in the currently active transaction.
*/
- if (ch && txd) {
- u32 clli = readl(ch->base + PL080_CH_LLI) & ~PL080_LLI_LM_AHB2;
+ clli = readl(ch->base + PL080_CH_LLI) & ~PL080_LLI_LM_AHB2;
+
+ /* First get the remaining bytes in the active transfer */
+ bytes = get_bytes_in_cctl(readl(ch->base + PL080_CH_CONTROL));
- /* First get the remaining bytes in the active transfer */
- bytes = get_bytes_in_cctl(readl(ch->base + PL080_CH_CONTROL));
+ if (!clli)
+ return bytes;
- if (clli) {
- struct pl08x_lli *llis_va = txd->llis_va;
- dma_addr_t llis_bus = txd->llis_bus;
- int index;
+ llis_va = txd->llis_va;
+ llis_bus = txd->llis_bus;
- BUG_ON(clli < llis_bus || clli >= llis_bus +
+ BUG_ON(clli < llis_bus || clli >= llis_bus +
sizeof(struct pl08x_lli) * MAX_NUM_TSFR_LLIS);
- /*
-* Locate the next LLI - as this is an array,
-* it's simple maths to find.
-*/
- index = (clli - llis_bus) / sizeof(struct pl08x_lli);
+ /*
+* Locate the next LLI - as this is an array,
+* it's simple maths to find.
+*/
+ index = (clli - llis_bus) / sizeof(struct pl08x_lli);
- for (; index < MAX_NUM_TSFR_LLIS; index++) {
- bytes += get_bytes_in_cctl(llis_va[index].cctl);
+ for (; index < MAX_NUM_TSFR_LLIS; index++) {
+ bytes += get_bytes_in_cctl(llis_va[index].cctl);
- /*
-* A LLI pointer of 0 terminates the LLI list
-*/
- if (!llis_va[index].lli)
- break;
- }
- }
+ /*
+* A LLI pointer of 0 terminates the LLI list
+*/
+ if (!llis_va[index].lli)
+ break;
}
return bytes;
--
1.8.2.1
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[RFC PATCH 05/11] dma: amba-pl08x: Add support for different maximum transfer size
PL080S has separate register to store transfer size in, allowing single
transfer to be much larger than in standard PL080.
This patch makes the amba-pl08x driver aware of this and removes writing
transfer size to reserved bits of CH_CONTROL register on PL080S, which
was not a problem witn transfer sizes fitting the original bitfield
of PL080, but now would overwrite other fields.
Signed-off-by: Tomasz Figa
---
drivers/dma/amba-pl08x.c | 22 ++
1 file changed, 18 insertions(+), 4 deletions(-)
diff --git a/drivers/dma/amba-pl08x.c b/drivers/dma/amba-pl08x.c
index d1f1333..eb10eb8 100644
--- a/drivers/dma/amba-pl08x.c
+++ b/drivers/dma/amba-pl08x.c
@@ -112,6 +112,7 @@ struct vendor_data {
u8 config_offset;
u8 channels;
u32 flags;
+ u32 max_transfer_size;
};
/*
@@ -843,7 +844,10 @@ static inline void prep_byte_width_lli(struct
pl08x_driver_data *pl08x,
struct pl08x_lli_build_data *bd,
u32 *cctl, u32 len, int num_llis, size_t *total_bytes)
{
- *cctl = pl08x_cctl_bits(*cctl, 1, 1, len);
+ if (pl08x->vd->flags & PL08X_IS_PL080S)
+ *cctl = pl08x_cctl_bits(*cctl, 1, 1, 0);
+ else
+ *cctl = pl08x_cctl_bits(*cctl, 1, 1, len);
pl08x_fill_lli_for_desc(bd, num_llis, len, *cctl, len);
(*total_bytes) += len;
}
@@ -992,7 +996,7 @@ static int pl08x_fill_llis_for_desc(struct
pl08x_driver_data *pl08x,
* MIN(buswidths)
*/
max_bytes_per_lli = bd.srcbus.buswidth *
- PL080_CONTROL_TRANSFER_SIZE_MASK;
+ pl08x->vd->max_transfer_size;
dev_vdbg(&pl08x->adev->dev,
"%s max bytes per lli = %zu\n",
__func__, max_bytes_per_lli);
@@ -1025,8 +1029,14 @@ static int pl08x_fill_llis_for_desc(struct
pl08x_driver_data *pl08x,
"size 0x%08zx (remainder 0x%08zx)\n",
__func__, lli_len, bd.remainder);
- cctl = pl08x_cctl_bits(cctl, bd.srcbus.buswidth,
- bd.dstbus.buswidth, tsize);
+ if (pl08x->vd->flags & PL08X_IS_PL080S)
+ cctl = pl08x_cctl_bits(cctl,
+ bd.srcbus.buswidth,
+ bd.dstbus.buswidth, 0);
+ else
+ cctl = pl08x_cctl_bits(cctl,
+ bd.srcbus.buswidth,
+ bd.dstbus.buswidth, tsize);
pl08x_fill_lli_for_desc(&bd, num_llis++,
lli_len, cctl, tsize);
total_bytes += lli_len;
@@ -2092,24 +2102,28 @@ static struct vendor_data vendor_pl080 = {
.channels = 8,
.flags = PL08X_IS_DUALMASTER,
.config_offset = PL080_CH_CONFIG,
+ .max_transfer_size = PL080_CONTROL_TRANSFER_SIZE_MASK,
};
static struct vendor_data vendor_nomadik = {
.channels = 8,
.flags = PL08X_IS_DUALMASTER | PL08X_IS_NOMADIK,
.config_offset = PL080_CH_CONFIG,
+ .max_transfer_size = PL080_CONTROL_TRANSFER_SIZE_MASK,
};
static struct vendor_data vendor_pl080s = {
.channels = 8,
.flags = PL08X_IS_DUALMASTER | PL08X_IS_PL080S,
.config_offset = PL080S_CH_CONFIG,
+ .max_transfer_size = PL080S_CONTROL_TRANSFER_SIZE_MASK,
};
static struct vendor_data vendor_pl081 = {
.channels = 2,
.flags = 0,
.config_offset = PL080_CH_CONFIG,
+ .max_transfer_size = PL080_CONTROL_TRANSFER_SIZE_MASK,
};
static struct amba_id pl08x_ids[] = {
--
1.8.2.1
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[RFC PATCH 06/11] dma: amba-pl08x: Keep LLIs aligned to 4-word boundary
PL080 reference manual states that to LLI entries should be aligned
to 4-word boundary to make LLI fetches more efficient. This patch adds
a 3-word padding to the LLi struct to make this condition true.
Signed-off-by: Tomasz Figa
---
drivers/dma/amba-pl08x.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/dma/amba-pl08x.c b/drivers/dma/amba-pl08x.c
index eb10eb8..0da5539 100644
--- a/drivers/dma/amba-pl08x.c
+++ b/drivers/dma/amba-pl08x.c
@@ -127,6 +127,7 @@ struct pl08x_lli {
u32 lli;
u32 cctl;
u32 cctl1;
+ u32 dummy[3];
};
/**
--
1.8.2.1
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[RFC PATCH 04/11] dma: amba-pl08x: Add support for PL080S variant
PL080S is a modified version of PL080 that can be found on Samsung SoCs,
such as S3C6400 and S3C6410.
It has different offset of CONFIG register, separate CONTROL1 register
that holds transfer size and larger maximum transfer size.
Signed-off-by: Tomasz Figa
---
drivers/dma/amba-pl08x.c | 68 +++---
include/linux/amba/pl080.h | 1 +
2 files changed, 59 insertions(+), 10 deletions(-)
diff --git a/drivers/dma/amba-pl08x.c b/drivers/dma/amba-pl08x.c
index 93913b4..d1f1333 100644
--- a/drivers/dma/amba-pl08x.c
+++ b/drivers/dma/amba-pl08x.c
@@ -100,6 +100,8 @@ struct pl08x_driver_data;
* for permission before use and some registers are missing.
*/
#define PL08X_IS_NOMADIK (1 << 1)
+/** Controller is PL080S (PL080 modified by Samsung) */
+#define PL08X_IS_PL080S(1 << 2)
/**
* struct vendor_data - vendor-specific config parameters for PL08x derivatives
@@ -123,6 +125,7 @@ struct pl08x_lli {
u32 dst;
u32 lli;
u32 cctl;
+ u32 cctl1;
};
/**
@@ -381,6 +384,9 @@ static void pl08x_start_next_txd(struct pl08x_dma_chan
*plchan)
writel(lli->cctl, phychan->base + PL080_CH_CONTROL);
writel(txd->ccfg, phychan->base + pl08x->vd->config_offset);
+ if (pl08x->vd->flags & PL08X_IS_PL080S)
+ writel(lli->cctl1, phychan->base + PL080S_CH_CONTROL2);
+
/* Enable the DMA channel */
/* Do not access config register until channel shows as disabled */
while (readl(pl08x->base + PL080_EN_CHAN) & (1 << phychan->id))
@@ -476,9 +482,28 @@ static inline u32 get_bytes_in_cctl(u32 cctl)
return bytes;
}
+static inline u32 get_bytes_in_cctl_pl080s(u32 cctl, u32 cctl1)
+{
+ /* The source width defines the number of bytes */
+ u32 bytes = cctl1 & PL080S_CONTROL_TRANSFER_SIZE_MASK;
+
+ switch (cctl >> PL080_CONTROL_SWIDTH_SHIFT) {
+ case PL080_WIDTH_8BIT:
+ break;
+ case PL080_WIDTH_16BIT:
+ bytes *= 2;
+ break;
+ case PL080_WIDTH_32BIT:
+ bytes *= 4;
+ break;
+ }
+ return bytes;
+}
+
/* The channel should be paused when calling this */
static u32 pl08x_getbytes_chan(struct pl08x_dma_chan *plchan)
{
+ struct pl08x_driver_data *pl08x = plchan->host;
struct pl08x_lli *llis_va;
struct pl08x_phy_chan *ch;
dma_addr_t llis_bus;
@@ -500,7 +525,12 @@ static u32 pl08x_getbytes_chan(struct pl08x_dma_chan
*plchan)
clli = readl(ch->base + PL080_CH_LLI) & ~PL080_LLI_LM_AHB2;
/* First get the remaining bytes in the active transfer */
- bytes = get_bytes_in_cctl(readl(ch->base + PL080_CH_CONTROL));
+ if (pl08x->vd->flags & PL08X_IS_PL080S)
+ bytes = get_bytes_in_cctl_pl080s(
+ readl(ch->base + PL080_CH_CONTROL),
+ readl(ch->base + PL080S_CH_CONTROL2));
+ else
+ bytes = get_bytes_in_cctl(readl(ch->base + PL080_CH_CONTROL));
if (!clli)
return bytes;
@@ -518,7 +548,11 @@ static u32 pl08x_getbytes_chan(struct pl08x_dma_chan
*plchan)
index = (clli - llis_bus) / sizeof(struct pl08x_lli);
for (; index < MAX_NUM_TSFR_LLIS; index++) {
- bytes += get_bytes_in_cctl(llis_va[index].cctl);
+ if (pl08x->vd->flags & PL08X_IS_PL080S)
+ bytes += get_bytes_in_cctl_pl080s(llis_va[index].cctl,
+ llis_va[index].cctl1);
+ else
+ bytes += get_bytes_in_cctl(llis_va[index].cctl);
/*
* A LLI pointer of 0 terminates the LLI list
@@ -780,7 +814,7 @@ static void pl08x_choose_master_bus(struct
pl08x_lli_build_data *bd,
* Fills in one LLI for a certain transfer descriptor and advance the counter
*/
static void pl08x_fill_lli_for_desc(struct pl08x_lli_build_data *bd,
- int num_llis, int len, u32 cctl)
+ int num_llis, int len, u32 cctl, u32 cctl1)
{
struct pl08x_lli *llis_va = bd->txd->llis_va;
dma_addr_t llis_bus = bd->txd->llis_bus;
@@ -788,6 +822,7 @@ static void pl08x_fill_lli_for_desc(struct
pl08x_lli_build_data *bd,
BUG_ON(num_llis >= MAX_NUM_TSFR_LLIS);
llis_va[num_llis].cctl = cctl;
+ llis_va[num_llis].cctl1 = cctl1;
llis_va[num_llis].src = bd->srcbus.addr;
llis_va[num_llis].dst = bd->dstbus.addr;
llis_va[num_llis].lli = llis_bus + (num_llis + 1) *
@@ -804,11 +839,12 @@ static void pl08x_fill_lli_for_desc(struct
pl08x_lli_build_data *bd,
bd->remainder -= len;
}
-static inline void prep_byte_width_lli(struct pl08x_lli_build_data *bd,
+static inline void prep_byte_width_lli(struct pl08x_driver_data *pl08x,
+ struct pl08x_lli_build_data *bd,
u32 *cctl, u32 len, int num_llis, size_t *total_bytes)
{
[RFC PATCH 08/11] dmaengine: PL08x: Add cyclic transfer support
From: Alban Bedel
Many audio interface drivers require support of cyclic transfers to work
correctly, for example Samsung ASoC DMA driver. This patch adds support
for cyclic transfers to the amba-pl08x driver.
Signed-off-by: Alban Bedel
Signed-off-by: Tomasz Figa
---
drivers/dma/amba-pl08x.c | 181 +++
1 file changed, 136 insertions(+), 45 deletions(-)
diff --git a/drivers/dma/amba-pl08x.c b/drivers/dma/amba-pl08x.c
index bb3b36b..210a893 100644
--- a/drivers/dma/amba-pl08x.c
+++ b/drivers/dma/amba-pl08x.c
@@ -184,6 +184,7 @@ struct pl08x_sg {
* @ccfg: config reg values for current txd
* @done: this marks completed descriptors, which should not have their
* mux released.
+ * @cyclic: indicate cyclic transfers
*/
struct pl08x_txd {
struct virt_dma_desc vd;
@@ -198,6 +199,8 @@ struct pl08x_txd {
*/
u32 ccfg;
bool done;
+
+ bool cyclic;
};
/**
@@ -561,9 +564,9 @@ static u32 pl08x_getbytes_chan(struct pl08x_dma_chan
*plchan)
bytes += get_bytes_in_cctl(llis_va[index].cctl);
/*
-* A LLI pointer of 0 terminates the LLI list
++ * A LLI pointer going backward terminates the LLI list
*/
- if (!llis_va[index].lli)
+ if (llis_va[index].lli <= clli)
break;
}
@@ -1075,10 +1078,14 @@ static int pl08x_fill_llis_for_desc(struct
pl08x_driver_data *pl08x,
}
llis_va = txd->llis_va;
- /* The final LLI terminates the LLI. */
- llis_va[num_llis - 1].lli = 0;
- /* The final LLI element shall also fire an interrupt. */
- llis_va[num_llis - 1].cctl |= PL080_CONTROL_TC_IRQ_EN;
+ if (txd->cyclic) {
+ /* Link back to the first LLI. */
+ llis_va[num_llis - 1].lli = txd->llis_bus | bd.lli_bus;
+ } else {
+ /* The final LLI terminates the LLI. */
+ llis_va[num_llis - 1].lli = 0;
+ llis_va[num_llis - 1].cctl |= PL080_CONTROL_TC_IRQ_EN;
+ }
#ifdef VERBOSE_DEBUG
{
@@ -1470,25 +1477,19 @@ static struct dma_async_tx_descriptor
*pl08x_prep_dma_memcpy(
return vchan_tx_prep(&plchan->vc, &txd->vd, flags);
}
-static struct dma_async_tx_descriptor *pl08x_prep_slave_sg(
- struct dma_chan *chan, struct scatterlist *sgl,
- unsigned int sg_len, enum dma_transfer_direction direction,
- unsigned long flags, void *context)
+static struct pl08x_txd *pl08x_init_txd(
+ struct dma_chan *chan,
+ enum dma_transfer_direction direction,
+ dma_addr_t *slave_addr)
{
struct pl08x_dma_chan *plchan = to_pl08x_chan(chan);
struct pl08x_driver_data *pl08x = plchan->host;
struct pl08x_txd *txd;
- struct pl08x_sg *dsg;
- struct scatterlist *sg;
enum dma_slave_buswidth addr_width;
- dma_addr_t slave_addr;
int ret, tmp;
u8 src_buses, dst_buses;
u32 maxburst, cctl;
- dev_dbg(&pl08x->adev->dev, "%s prepare transaction of %d bytes from
%s\n",
- __func__, sg_dma_len(sgl), plchan->name);
-
txd = pl08x_get_txd(plchan);
if (!txd) {
dev_err(&pl08x->adev->dev, "%s no txd\n", __func__);
@@ -1502,14 +1503,14 @@ static struct dma_async_tx_descriptor
*pl08x_prep_slave_sg(
*/
if (direction == DMA_MEM_TO_DEV) {
cctl = PL080_CONTROL_SRC_INCR;
- slave_addr = plchan->cfg.dst_addr;
+ *slave_addr = plchan->cfg.dst_addr;
addr_width = plchan->cfg.dst_addr_width;
maxburst = plchan->cfg.dst_maxburst;
src_buses = pl08x->mem_buses;
dst_buses = plchan->cd->periph_buses;
} else if (direction == DMA_DEV_TO_MEM) {
cctl = PL080_CONTROL_DST_INCR;
- slave_addr = plchan->cfg.src_addr;
+ *slave_addr = plchan->cfg.src_addr;
addr_width = plchan->cfg.src_addr_width;
maxburst = plchan->cfg.src_maxburst;
src_buses = plchan->cd->periph_buses;
@@ -1558,24 +1559,107 @@ static struct dma_async_tx_descriptor
*pl08x_prep_slave_sg(
else
txd->ccfg |= plchan->signal << PL080_CONFIG_SRC_SEL_SHIFT;
+ return txd;
+}
+
+static int pl08x_tx_add_sg(struct pl08x_txd *txd,
+ enum dma_transfer_direction direction,
+ dma_addr_t slave_addr,
+ dma_addr_t buf_addr,
+ unsigned int len)
+{
+ struct pl08x_sg *dsg;
+
+ dsg = kzalloc(sizeof(struct pl08x_sg), GFP_NOWAIT);
+ if (!dsg)
+ return -ENOMEM;
+
+ list_add_tail(&dsg->node, &txd->dsg_list);
+
+ dsg->len = len;
+ if (direction == DMA_MEM_TO_DEV) {
+
[RFC PATCH 10/11] ASoC: samsung: Do not require legacy DMA API in case of S3C64XX
With support for amba-pl08x driver, on S3C64xx the generic DMA engine API can be used instead of the private s3c-dma interface. Signed-off-by: Tomasz Figa --- sound/soc/samsung/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/samsung/Kconfig b/sound/soc/samsung/Kconfig index ae0ea87..dbced1e 100644 --- a/sound/soc/samsung/Kconfig +++ b/sound/soc/samsung/Kconfig @@ -1,7 +1,7 @@ config SND_SOC_SAMSUNG tristate "ASoC support for Samsung" depends on PLAT_SAMSUNG - select S3C64XX_DMA if ARCH_S3C64XX + select S3C64XX_DMA if ARCH_S3C64XX && !S3C64XX_PL080 select S3C2410_DMA if ARCH_S3C24XX help Say Y or M if you want to add support for codecs attached to -- 1.8.2.1 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[RFC PATCH 09/11] spi: s3c64xx: Do not require legacy DMA API in case of S3C64XX
With support for amba-pl08x driver, on S3C64xx the generic DMA engine API can be used instead of the private s3c-dma interface. Signed-off-by: Tomasz Figa --- drivers/spi/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 2015897..8da1c22 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -366,7 +366,7 @@ config SPI_S3C24XX_FIQ config SPI_S3C64XX tristate "Samsung S3C64XX series type SPI" depends on (ARCH_S3C24XX || ARCH_S3C64XX || ARCH_S5P64X0 || ARCH_EXYNOS) - select S3C64XX_DMA if ARCH_S3C64XX + select S3C64XX_DMA if ARCH_S3C64XX && !S3C64XX_PL080 help SPI driver for Samsung S3C64XX and newer SoCs. -- 1.8.2.1 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[RFC PATCH 11/11] ARM: s3c64xx: Add support for DMA using generic amba-pl08x driver
This patch adds all required platform-specific data and initialization
code to support the generic amba-pl08x driver on S3C64xx SoCs.
Also some compatibility definitions are added to make the transition from
legacy API to DMA engine easier. The biggest hack here is passing const
char * pointers through DMA resource, casted to unsigned long, but this
is how Samsung DMA wrappers (used to support both s3c-dma and DMA engine
in drivers) is designed.
Signed-off-by: Tomasz Figa
---
arch/arm/Kconfig | 1 +
arch/arm/mach-s3c64xx/Kconfig| 8 +-
arch/arm/mach-s3c64xx/Makefile | 1 +
arch/arm/mach-s3c64xx/common.h | 5 +
arch/arm/mach-s3c64xx/include/mach/dma.h | 65
arch/arm/mach-s3c64xx/pl080.c| 244 +++
6 files changed, 323 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/mach-s3c64xx/pl080.c
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 42d6ea2..fab8f3c 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -714,6 +714,7 @@ config ARCH_S3C64XX
bool "Samsung S3C64XX"
select ARCH_HAS_CPUFREQ
select ARCH_REQUIRE_GPIOLIB
+ select ARM_AMBA
select ARM_VIC
select CLKDEV_LOOKUP
select CLKSRC_MMIO
diff --git a/arch/arm/mach-s3c64xx/Kconfig b/arch/arm/mach-s3c64xx/Kconfig
index 2057853..704c5e4 100644
--- a/arch/arm/mach-s3c64xx/Kconfig
+++ b/arch/arm/mach-s3c64xx/Kconfig
@@ -28,9 +28,15 @@ config CPU_S3C6410
help
Enable S3C6410 CPU support
+config S3C64XX_PL080
+ bool "S3C64XX DMA using generic PL08x driver"
+ select AMBA_PL08X
+ select SAMSUNG_DMADEV
+
config S3C64XX_DMA
- bool "S3C64XX DMA"
+ bool "S3C64XX DMA using legacy S3C DMA API"
select S3C_DMA
+ depends on !S3C64XX_PL080
config S3C64XX_SETUP_SDHCI
bool
diff --git a/arch/arm/mach-s3c64xx/Makefile b/arch/arm/mach-s3c64xx/Makefile
index 31d0c91..4e3326a 100644
--- a/arch/arm/mach-s3c64xx/Makefile
+++ b/arch/arm/mach-s3c64xx/Makefile
@@ -27,6 +27,7 @@ obj-$(CONFIG_CPU_IDLE)+= cpuidle.o
# DMA support
obj-$(CONFIG_S3C64XX_DMA) += dma.o
+obj-$(CONFIG_S3C64XX_PL080)+= pl080.o
# Device support
diff --git a/arch/arm/mach-s3c64xx/common.h b/arch/arm/mach-s3c64xx/common.h
index 6cfc99b..60a667a 100644
--- a/arch/arm/mach-s3c64xx/common.h
+++ b/arch/arm/mach-s3c64xx/common.h
@@ -58,4 +58,9 @@ int __init s3c64xx_pm_late_initcall(void);
static inline int s3c64xx_pm_late_initcall(void) { return 0; }
#endif
+#ifdef CONFIG_S3C64XX_PL080
+extern struct pl08x_platform_data s3c64xx_dma0_plat_data;
+extern struct pl08x_platform_data s3c64xx_dma1_plat_data;
+#endif
+
#endif /* __ARCH_ARM_MACH_S3C64XX_COMMON_H */
diff --git a/arch/arm/mach-s3c64xx/include/mach/dma.h
b/arch/arm/mach-s3c64xx/include/mach/dma.h
index fe1a98c..6f88965 100644
--- a/arch/arm/mach-s3c64xx/include/mach/dma.h
+++ b/arch/arm/mach-s3c64xx/include/mach/dma.h
@@ -11,6 +11,8 @@
#ifndef __ASM_ARCH_DMA_H
#define __ASM_ARCH_DMA_H __FILE__
+#ifdef CONFIG_S3C64XX_DMA
+
#define S3C_DMA_CHANNELS (16)
/* see mach-s3c2410/dma.h for notes on dma channel numbers */
@@ -128,4 +130,67 @@ struct s3c2410_dma_chan {
#include
+#else
+
+#define S3C64XX_DMA_CHAN(name) ((unsigned long)(name))
+
+/* DMA0/SDMA0 */
+#define DMACH_UART0S3C64XX_DMA_CHAN("uart0_tx")
+#define DMACH_UART0_SRC2 S3C64XX_DMA_CHAN("uart0_rx")
+#define DMACH_UART1S3C64XX_DMA_CHAN("uart1_tx")
+#define DMACH_UART1_SRC2 S3C64XX_DMA_CHAN("uart1_rx")
+#define DMACH_UART2S3C64XX_DMA_CHAN("uart2_tx")
+#define DMACH_UART2_SRC2 S3C64XX_DMA_CHAN("uart2_rx")
+#define DMACH_UART3S3C64XX_DMA_CHAN("uart3_tx")
+#define DMACH_UART3_SRC2 S3C64XX_DMA_CHAN("uart3_rx")
+#define DMACH_PCM0_TX S3C64XX_DMA_CHAN("pcm0_tx")
+#define DMACH_PCM0_RX S3C64XX_DMA_CHAN("pcm0_rx")
+#define DMACH_I2S0_OUT S3C64XX_DMA_CHAN("i2s0_tx")
+#define DMACH_I2S0_IN S3C64XX_DMA_CHAN("i2s0_rx")
+#define DMACH_SPI0_TX S3C64XX_DMA_CHAN("spi0_tx")
+#define DMACH_SPI0_RX S3C64XX_DMA_CHAN("spi0_rx")
+#define DMACH_HSI_I2SV40_TXS3C64XX_DMA_CHAN("i2s2_tx")
+#define DMACH_HSI_I2SV40_RXS3C64XX_DMA_CHAN("i2s2_rx")
+
+/* DMA1/SDMA1 */
+#define DMACH_PCM1_TX S3C64XX_DMA_CHAN("pcm1_tx")
+#define DMACH_PCM1_RX S3C64XX_DMA_CHAN("pcm1_rx")
+#define DMACH_I2S1_OUT S3C64XX_DMA_CHAN("i2s1_tx")
+#define DMACH_I2S1_IN S3C64XX_DMA_CHAN("i2s1_rx")
+#define DMACH_SPI1_TX S3C64XX_DMA_CHAN("spi1_tx")
+#define DMACH_SPI1_RX S3C64XX_DMA_CHAN("spi1_rx")
+#define DMACH_AC97_PCMOUT S3C64XX_DMA_CHAN("ac97_out")
+#define DMACH_AC97_PCMIN S3C64XX_DMA_CHAN("ac97_in")
+#define DMACH_AC97_MICIN S3C64XX_DMA_CHAN("ac97_mic")
+#define DMACH_PWM S3C64XX_DMA_CHAN("pwm")
+#define DMACH_IRDA S3C64XX_
[RFC PATCH 00/11] ARM: s3c64xx: Let amba-pl08x driver handle DMA
One of the biggest roadblocks on the way of S3C64xx to DeviceTree support is its DMA driver, which is completely platform-specific and provides private API (s3c-dma), not even saying that its design is completely against multiplatform-awareness. The DMA controller present on this SoC series is a custom variant of ARM PrimeCell PL080 modified by Samsung to add some extra features. It is mostly compatible with original PL080, except: - CH_CONTROL2 register is added between CH_CONTROL and CH_CONFIG, - offset of CH_CONFIG register is different, - transfer size field is moved from CH_CONTROL to CH_CONTROL2, - transfer size field is extended to 24 bits, allowing much bigger single transfer, - LLI consists of one more word, to account for CH_CONTROL2 register. Since all the rest is fully compatible with standard PL080 there is no point in having separate driver just for this single variant, so I decided to look into adding support for it to the amba-pl08x driver. There was already some attempt to achieve this before, but this was before Russel's big rework of the driver to use virtual channels, making the old patches being not much of use. This RFC series is a proof of concept that I managed to make during last days of hacking. Except one patch adding clkdev lookup to clock driver (which is being replaced with a CCF-compliant driver ATM), this is enough to get memcpy and slave transfers to work on S3C64xx. I have tested this on Mini6410 and SMDK6410 boards using dmatest for memcpy and Samsung I2S with madplay/aplay for slave transfers. Unfortunately I do not have access to other platforms with PL08x so I could not test for any regressions introduced on them. Credits for two patches go to Alban Bedel, who made a series fixing this driver to make it usable with audio drivers. I rebased his patches on top of mine and corrected coding style a bit. OK, that's all. Any comments are welcome. Feel free to start throwing eggs and tomatoes if you find this awful, but I won't be upset if I get some Tested-by or Acked-by as well. ;) Alban Bedel (2): dmaengine: PL08x: Fix reading the byte count in cctl dmaengine: PL08x: Add cyclic transfer support Tomasz Figa (9): dma: amba-pl08x: Use bitmap to pass variant specific quirks dma: amba-pl08x: Refactor pl08x_getbytes_chan() to lower indentation dma: amba-pl08x: Add support for different offset of CONFIG register dma: amba-pl08x: Add support for PL080S variant dma: amba-pl08x: Add support for different maximum transfer size dma: amba-pl08x: Keep LLIs aligned to 4-word boundary spi: s3c64xx: Do not require legacy DMA API in case of S3C64XX ASoC: samsung: Do not require legacy DMA API in case of S3C64XX ARM: s3c64xx: Add support for DMA using generic amba-pl08x driver arch/arm/Kconfig | 1 + arch/arm/mach-s3c64xx/Kconfig| 8 +- arch/arm/mach-s3c64xx/Makefile | 1 + arch/arm/mach-s3c64xx/common.h | 5 + arch/arm/mach-s3c64xx/include/mach/dma.h | 65 + arch/arm/mach-s3c64xx/pl080.c| 244 +++ drivers/dma/amba-pl08x.c | 399 ++- drivers/spi/Kconfig | 2 +- include/linux/amba/pl080.h | 1 + sound/soc/samsung/Kconfig| 2 +- 10 files changed, 613 insertions(+), 115 deletions(-) create mode 100644 arch/arm/mach-s3c64xx/pl080.c -- 1.8.2.1 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[RFC PATCH 07/11] dmaengine: PL08x: Fix reading the byte count in cctl
From: Alban Bedel
There are more fields than just SWIDTH in CH_CONTROL register, so read
register value must be masked in addition to shifting.
Signed-off-by: Alban Bedel
Signed-off-by: Tomasz Figa
---
drivers/dma/amba-pl08x.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/dma/amba-pl08x.c b/drivers/dma/amba-pl08x.c
index 0da5539..bb3b36b 100644
--- a/drivers/dma/amba-pl08x.c
+++ b/drivers/dma/amba-pl08x.c
@@ -471,6 +471,8 @@ static inline u32 get_bytes_in_cctl(u32 cctl)
/* The source width defines the number of bytes */
u32 bytes = cctl & PL080_CONTROL_TRANSFER_SIZE_MASK;
+ cctl &= PL080_CONTROL_SWIDTH_MASK;
+
switch (cctl >> PL080_CONTROL_SWIDTH_SHIFT) {
case PL080_WIDTH_8BIT:
break;
@@ -489,6 +491,8 @@ static inline u32 get_bytes_in_cctl_pl080s(u32 cctl, u32
cctl1)
/* The source width defines the number of bytes */
u32 bytes = cctl1 & PL080S_CONTROL_TRANSFER_SIZE_MASK;
+ cctl &= PL080_CONTROL_SWIDTH_MASK;
+
switch (cctl >> PL080_CONTROL_SWIDTH_SHIFT) {
case PL080_WIDTH_8BIT:
break;
--
1.8.2.1
--
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Re: [RFC PATCH 5/5] ARM: Samsung: Remove MIPI PHY setup code
On 06/15/13 02:45, Sylwester Nawrocki wrote: Generic PHY drivers are used to handle the MIPI CSIS and MIPI DSIM DPHYs so we can remove now unused code at arch/arm/plat-samsung. If so, sounds good :) In case there is any board file for S5PV210 platforms using MIPI CSIS/DSIM (not any upstream currently) it should use the generic PHY API to bind the PHYs to respective PHY consumer drivers. To be honest, I didn't test this on boards but if the working is fine, please go ahead without RFC. Thanks, - Kukjin -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 08/15] pwm: Add new pwm-samsung driver
On 06/17/13 02:19, Tomasz Figa wrote: Hi Kukjin, On Wednesday 05 of June 2013 23:18:13 Tomasz Figa wrote: This patch introduces new Samsung PWM driver, which uses Samsung PWM/timer master driver to control shared parts of the hardware. Signed-off-by: Tomasz Figa --- drivers/pwm/Makefile | 1 + drivers/pwm/pwm-samsung.c | 528 ++ 2 files changed, 529 insertions(+) create mode 100644 drivers/pwm/pwm-samsung.c I you haven't yet merged this patch, please let me send v2 of this series, addressing Heiko's comments and adjustments to my understanding of the PWM hardware after getting access to SMDK6410 board, which uses PWM to control LCD backlight. Sure, let me hold on until getting your updated series. Thanks, - Kukjin -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 08/15] pwm: Add new pwm-samsung driver
Hi Kukjin,
On Wednesday 05 of June 2013 23:18:13 Tomasz Figa wrote:
> This patch introduces new Samsung PWM driver, which uses Samsung
> PWM/timer master driver to control shared parts of the hardware.
>
> Signed-off-by: Tomasz Figa
> ---
> drivers/pwm/Makefile | 1 +
> drivers/pwm/pwm-samsung.c | 528
> ++ 2 files changed, 529
> insertions(+)
> create mode 100644 drivers/pwm/pwm-samsung.c
I you haven't yet merged this patch, please let me send v2 of this series,
addressing Heiko's comments and adjustments to my understanding of the PWM
hardware after getting access to SMDK6410 board, which uses PWM to control
LCD backlight.
Best regards,
Tomasz
> diff --git a/drivers/pwm/Makefile b/drivers/pwm/Makefile
> index 229a599..833c3ac 100644
> --- a/drivers/pwm/Makefile
> +++ b/drivers/pwm/Makefile
> @@ -9,6 +9,7 @@ obj-$(CONFIG_PWM_MXS) += pwm-mxs.o
> obj-$(CONFIG_PWM_PUV3) += pwm-puv3.o
> obj-$(CONFIG_PWM_PXA)+= pwm-pxa.o
> obj-$(CONFIG_PWM_SAMSUNG)+= pwm-samsung-legacy.o
> +obj-$(CONFIG_PWM_SAMSUNG)+= pwm-samsung.o
> obj-$(CONFIG_PWM_SPEAR) += pwm-spear.o
> obj-$(CONFIG_PWM_TEGRA) += pwm-tegra.o
> obj-$(CONFIG_PWM_TIECAP) += pwm-tiecap.o
> diff --git a/drivers/pwm/pwm-samsung.c b/drivers/pwm/pwm-samsung.c
> new file mode 100644
> index 000..61bed3d
> --- /dev/null
> +++ b/drivers/pwm/pwm-samsung.c
> @@ -0,0 +1,528 @@
> +/* drivers/pwm/pwm-samsung.c
> + *
> + * Copyright (c) 2007 Ben Dooks
> + * Copyright (c) 2008 Simtec Electronics
> + * Ben Dooks ,
> + * Copyright (c) 2013 Tomasz Figa
> + *
> + * PWM driver for Samsung SoCs
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published
> by + * the Free Software Foundation; either version 2 of the License.
> +*/
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#include
> +
> +#define REG_TCFG00x00
> +#define REG_TCFG10x04
> +#define REG_TCON 0x08
> +
> +#define REG_TCNTB(tmr) (0x0c + ((tmr) * 0xc))
> +#define REG_TCMPB(tmr) (0x10 + ((tmr) * 0xc))
> +
> +#define TCFG0_PRESCALER_MASK 0xff
> +#define TCFG0_PRESCALER1_SHIFT 8
> +
> +#define TCFG1_MUX_MASK 0xf
> +#define TCFG1_SHIFT(x) ((x) * 4)
> +
> +#define TCON_START(chan) (1 << (4 * (chan) + 0))
> +#define TCON_MANUALUPDATE(chan) (1 << (4 * (chan) + 1))
> +#define TCON_INVERT(chan)(1 << (4 * (chan) + 2))
> +#define TCON_AUTORELOAD(chan)(1 << (4 * (chan) + 3))
> +
> +struct samsung_pwm_channel {
> + unsigned long period_ns;
> + unsigned long duty_ns;
> + unsigned long tin_ns;
> +};
> +
> +struct samsung_pwm_chip {
> + struct pwm_chip chip;
> + struct samsung_pwm_variant variant;
> + struct samsung_pwm_channel channels[SAMSUNG_PWM_NUM];
> +
> + void __iomem *base;
> + struct clk *base_clk;
> + struct clk *tclk0;
> + struct clk *tclk1;
> +};
> +#define to_samsung_pwm_chip(chip)\
> + container_of(chip, struct samsung_pwm_chip, chip)
> +
> +#ifndef CONFIG_CLKSRC_SAMSUNG_PWM
> +static DEFINE_SPINLOCK(samsung_pwm_lock);
> +#endif
> +
> +static void pwm_samsung_set_divisor(struct samsung_pwm_chip *pwm,
> + unsigned int channel, u8 divisor)
> +{
> + u8 shift = TCFG1_SHIFT(channel);
> + unsigned long flags;
> + u32 reg;
> + u8 bits;
> +
> + bits = (fls(divisor) - 1) - pwm->variant.div_base;
> +
> + spin_lock_irqsave(&samsung_pwm_lock, flags);
> +
> + reg = readl(pwm->base + REG_TCFG1);
> + reg &= ~(TCFG1_MUX_MASK << shift);
> + reg |= bits << shift;
> + writel(reg, pwm->base + REG_TCFG1);
> +
> + spin_unlock_irqrestore(&samsung_pwm_lock, flags);
> +}
> +
> +static inline int pwm_samsung_is_tdiv(struct samsung_pwm_chip *chip,
> + unsigned int chan)
> +{
> + struct samsung_pwm_variant *variant = &chip->variant;
> + u32 reg;
> +
> + reg = readl(chip->base + REG_TCFG1);
> + reg >>= TCFG1_SHIFT(chan);
> + reg &= TCFG1_MUX_MASK;
> +
> + return ((1 << reg) & variant->tclk_mask) == 0;
> +}
> +
> +static unsigned long pwm_samsung_get_tin_rate(struct samsung_pwm_chip
> *chip, + unsigned
int chan)
> +{
> + unsigned long rate;
> + u32 reg;
> +
> + rate = clk_get_rate(chip->base_clk);
> +
> + reg = readl(chip->base + REG_TCFG0);
> + if (chan >= 2)
> + reg >>= TCFG0_PRESCALER1_SHIFT;
> + reg &= TCFG0_PRESCALER_MASK;
> +
> + return rate / (reg + 1);
> +}
> +
> +sta
Re: [PATCH] MAINTAINERS: Add Samsung pinctrl entries
On Fri, Jun 14, 2013 at 1:03 AM, Tomasz Figa wrote: > On Friday 14 of June 2013 07:47:15 Kukjin Kim wrote: >> Tomasz Figa wrote: >> > On Thursday 13 of June 2013 10:05:44 Doug Anderson wrote: >> > > It's convenient if get_maintainer suggests sending samsung/exynos >> > > pinctrl changes to linux-samsung-soc and to Kukjin. Add an entry >> > > for >> > > that. >> > >> > Well, if we are already at it, we could list the actual maintainers of >> > the driver. >> > >> > The original maintainer was Thomas Abraham >> >> Should be original author?! I think, original maintainer was/is Linus >> Walleij. > > Linus is the maintainer of the pin control subsystem. In addition drivers > can have their own maintainers, but of course they are lower in the > hierarchy than subsystem maintainers. Well I don't really like hiearchies, as I'm basically anarchist :-P Anyway, as long as the get-mainater script output both Thomas and my name I don't really care, the only practical intent with this file is to be able to mail the right people. Yours, Linus Walleij -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
