Re: [PATCH 2/3] clk: exynos5420: Add alias names for cpu clocks
Quoting Arun Kumar K (2013-12-06 01:48:03)
Adds alias names for cpu clocks to be used in the cpufreq driver.
Signed-off-by: Arun Kumar K arun...@samsung.com
Acked-by: Mike Turquette mturque...@linaro.org
---
drivers/clk/samsung/clk-exynos5420.c |9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/clk/samsung/clk-exynos5420.c
b/drivers/clk/samsung/clk-exynos5420.c
index 48c4a93..c65c040 100644
--- a/drivers/clk/samsung/clk-exynos5420.c
+++ b/drivers/clk/samsung/clk-exynos5420.c
@@ -316,9 +316,10 @@ static struct samsung_fixed_factor_clock
exynos5420_fixed_factor_clks[] __initda
static struct samsung_mux_clock exynos5420_mux_clks[] __initdata = {
MUX(none, mout_mspll_kfc, mspll_cpu_p, SRC_TOP7, 8, 2),
- MUX(none, mout_mspll_cpu, mspll_cpu_p, SRC_TOP7, 12, 2),
- MUX(none, mout_apll, apll_p, SRC_CPU, 0, 1),
- MUX(none, mout_cpu, cpu_p, SRC_CPU, 16, 1),
+ MUX_A(none, mout_mspll_cpu, mspll_cpu_p, SRC_TOP7, 12, 2,
+ mout_mspll_cpu),
+ MUX_A(none, mout_apll, apll_p, SRC_CPU, 0, 1, mout_apll),
+ MUX_A(none, mout_cpu, cpu_p, SRC_CPU, 16, 1, mout_cpu),
MUX(none, mout_kpll, kpll_p, SRC_KFC, 0, 1),
MUX(none, mout_cpu_kfc, kfc_p, SRC_KFC, 16, 1),
@@ -373,7 +374,7 @@ static struct samsung_mux_clock exynos5420_mux_clks[]
__initdata = {
MUX(none, sclk_mpll, mpll_p, SRC_TOP6, 0, 1),
MUX(none, sclk_vpll, vpll_p, SRC_TOP6, 4, 1),
- MUX(none, sclk_spll, spll_p, SRC_TOP6, 8, 1),
+ MUX_A(none, sclk_spll, spll_p, SRC_TOP6, 8, 1, mout_spll),
MUX(none, sclk_ipll, ipll_p, SRC_TOP6, 12, 1),
MUX(none, sclk_rpll, rpll_p, SRC_TOP6, 16, 1),
MUX(none, sclk_epll, epll_p, SRC_TOP6, 20, 1),
--
1.7.9.5
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH Resend 1/1] clk: exynos5250: Add CLK_SET_RATE_PARENT flag to mout_apll
Add CLK_SET_RATE_PARENT flag to mout_apll clock. This will let us set the
clock rate in the cpufreq driver.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
drivers/clk/samsung/clk-exynos5250.c |3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/samsung/clk-exynos5250.c
b/drivers/clk/samsung/clk-exynos5250.c
index 80f652053cb5..11178b1ad735 100644
--- a/drivers/clk/samsung/clk-exynos5250.c
+++ b/drivers/clk/samsung/clk-exynos5250.c
@@ -303,7 +303,8 @@ static struct samsung_mux_clock exynos5250_mux_clks[]
__initdata = {
/*
* CMU_CPU
*/
- MUX_A(none, mout_apll, mout_apll_p, SRC_CPU, 0, 1, mout_apll),
+ MUX_FA(none, mout_apll, mout_apll_p, SRC_CPU, 0, 1,
+ CLK_SET_RATE_PARENT, 0, mout_apll),
MUX_A(none, mout_cpu, mout_cpu_p, SRC_CPU, 16, 1, mout_cpu),
/*
--
1.7.9.5
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v12 3/4] thermal: samsung: Add TMU support for Exynos5420 SoCs
On Thursday 19 of December 2013 11:36:31 Naveen Krishna Chatradhi wrote: Exynos5420 has 5 TMU channels, the TRIMINFO register is misplaced for TMU channels 2, 3 and 4 TRIMINFO at 0x1006c000 contains data for TMU channel 3 TRIMINFO at 0x100a contains data for TMU channel 4 TRIMINFO at 0x10068000 contains data for TMU channel 2 This patch 1 Adds the neccessary register changes and arch information to support Exynos5420 SoCs. 2. Handles the gate clock for misplaced TRIMINFO register 3. Updates the Documentation at Documentation/devicetree/bindings/thermal/exynos-thermal.txt Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com Signed-off-by: Andrew Bresticker abres...@chromium.org Acked-by: Amit Daniel Kachhap amit.dan...@samsung.com Reviewed-by: Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com --- Changes since v11: 1. Added description for clocks in the Documentation 2. corrected the clock name in clk_get() function as per description Changes since v10: 1. using renamed compatible samsung,exynos5420-tmu-ext-triminfo and passing same clock as triminfo_apbif clock for channel 2 2. removed the exynos5420-tmu-triminfo-clk compatible .../devicetree/bindings/thermal/exynos-thermal.txt | 45 - drivers/thermal/samsung/exynos_tmu.c | 52 +- drivers/thermal/samsung/exynos_tmu.h |1 + drivers/thermal/samsung/exynos_tmu_data.c | 99 drivers/thermal/samsung/exynos_tmu_data.h |8 ++ 5 files changed, 200 insertions(+), 5 deletions(-) Reviewed-by: Tomasz Figa t.f...@samsung.com Best regards, Tomasz -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v12 4/4] ARM: dts: Exynos5420: Add device nodes for TMU blocks
Hi Naveen,
On Thursday 19 of December 2013 11:37:02 Naveen Krishna Chatradhi wrote:
Exynos5420 SoC has per core thermal management unit.
5 TMU channels 4 for CPUs and 5th for GPU.
This patch adds the device tree nodes to the DT device list.
Nodes carry the misplaced second base address and the second
clock to access the misplaced base address.
[snip]
samsung,power-domain = gsc_pd;
};
+
+ tmu_cpu0:tmu@1006 {
CodingStyle: Missing space after colon.
+ all the nodes below.
Since it's just a minor fixup, I think you could just reply to this
thread with corrected version of this single patch instead of
respinning the whole series.
Best regards,
Tomasz
+ compatible = samsung,exynos5420-tmu;
+ reg = 0x1006 0x100;
+ interrupts = 0 65 0;
+ clocks = clock 318;
+ clock-names = tmu_apbif;
+ };
+
+ tmu_cpu1:tmu@10064000 {
+ compatible = samsung,exynos5420-tmu;
+ reg = 0x10064000 0x100;
+ interrupts = 0 183 0;
+ clocks = clock 318;
+ clock-names = tmu_apbif;
+ };
+
+ tmu_cpu2:tmu@10068000 {
+ compatible = samsung,exynos5420-tmu-ext-triminfo;
+ reg = 0x10068000 0x100, 0x1006c000 0x4;
+ interrupts = 0 184 0;
+ clocks = clock 318, clock 318;
+ clock-names = tmu_apbif, tmu_triminfo_apbif;
+ };
+
+ tmu_cpu3:tmu@1006c000 {
+ compatible = samsung,exynos5420-tmu-ext-triminfo;
+ reg = 0x1006c000 0x100, 0x100a 0x4;
+ interrupts = 0 185 0;
+ clocks = clock 318, clock 319;
+ clock-names = tmu_apbif, tmu_triminfo_apbif;
+ };
+
+ tmu_gpu:tmu@100a {
+ compatible = samsung,exynos5420-tmu-ext-triminfo;
+ reg = 0x100a 0x100, 0x10068000 0x4;
+ interrupts = 0 215 0;
+ clocks = clock 319, clock 318;
+ clock-names = tmu_apbif, tmu_triminfo_apbif;
+ };
};
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] ARM: dts: Add missing GPIO entries for sd_bus in
Hi Tomasz, Leela, On 19 December 2013 00:13, Tomasz Figa tomasz.f...@gmail.com wrote: Hi Sachin, This is inconsistent: - for 1-bit bus you would have to specify just sdX_bus1, - for 4-bit just sdX_bus4, but - for 8-bit you need to specify both sdX_bus4 and sdX_bus8. The change Leela mentioned was about making this consistent, so you need to always specify all possible working widths on given board. Other Exynos SoCs should be changed to use the same convention as well. With the above explanation, it makes more sense now to specify all possible bus widths. I will drop this patch and change it in other places (SoCs) to make it consistent. -- With warm regards, Sachin -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 6/7] clk/samsung: add support for pll2650xx
Hi Rahul, On Friday 06 of December 2013 21:26:30 Rahul Sharma wrote: Add support for pll2650xx in samsung pll file. This pll variant is close to pll36xx but uses CON2 registers instead of CON1. If the ops are otherwise idential, why not reuse the ops for pll36xx and use CON1 or CON2 register conditionally based on pll-type field? (Just as it is already done for pll4600, 4650 and 4650c.) Best regards, Tomasz -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 5/7] clk/samsung: add support for pll2550xx
Hi Pankaj, Rahul, Arun,
On Friday 06 of December 2013 21:26:29 Rahul Sharma wrote:
From: Pankaj Dubey pankaj.du...@samsung.com
exynos5260 use pll2520xx and it has different bitfields
for P,M,S values as compared to pll2550xx. Support for
pll2520xx is added here.
Signed-off-by: Pankaj Dubey pankaj.du...@samsung.com
Signed-off-by: Rahul Sharma rahul.sha...@samsung.com
Signed-off-by: Arun Kumar K arun...@samsung.com
---
drivers/clk/samsung/clk-pll.c | 107
+
drivers/clk/samsung/clk-pll.h |1 +
2 files changed, 108 insertions(+)
diff --git a/drivers/clk/samsung/clk-pll.c b/drivers/clk/samsung/clk-pll.c
index e8e8953..237a889 100644
--- a/drivers/clk/samsung/clk-pll.c
+++ b/drivers/clk/samsung/clk-pll.c
@@ -710,6 +710,107 @@ struct clk * __init samsung_clk_register_pll2550x(const
char *name,
return clk;
}
+/*
+ * PLL2550xx Clock Type
+ */
+
+/* Maximum lock time can be 270 * PDIV cycles */
+#define PLL2550XX_LOCK_FACTOR (270)
+
+#define PLL2550XX_MDIV_MASK (0x3FF)
+#define PLL2550XX_PDIV_MASK (0x3F)
+#define PLL2550XX_SDIV_MASK (0x7)
+#define PLL2550XX_LOCK_STAT_MASK (0x1)
+#define PLL2550XX_MDIV_SHIFT (9)
+#define PLL2550XX_PDIV_SHIFT (3)
+#define PLL2550XX_SDIV_SHIFT (0)
+#define PLL2550XX_LOCK_STAT_SHIFT(21)
+
+static unsigned long samsung_pll2550xx_recalc_rate(struct clk_hw *hw,
+ unsigned long parent_rate)
+{
+ struct samsung_clk_pll *pll = to_clk_pll(hw);
+ u32 mdiv, pdiv, sdiv, pll_con;
+ u64 fvco = parent_rate;
+
+ pll_con = __raw_readl(pll-con_reg);
+ mdiv = (pll_con PLL2550XX_MDIV_SHIFT) PLL2550XX_MDIV_MASK;
+ pdiv = (pll_con PLL2550XX_PDIV_SHIFT) PLL2550XX_PDIV_MASK;
+ sdiv = (pll_con PLL2550XX_SDIV_SHIFT) PLL2550XX_SDIV_MASK;
+
+ fvco *= mdiv;
+ do_div(fvco, (pdiv sdiv));
+
+ return (unsigned long)fvco;
+}
+
+static inline bool samsung_pll2550xx_mp_change(u32 mdiv, u32 pdiv, u32
pll_con)
+{
+ if ((mdiv != ((pll_con PLL2550XX_MDIV_SHIFT)
+ PLL2550XX_MDIV_MASK)) ||
+ (pdiv != ((pll_con PLL2550XX_PDIV_SHIFT)
+ PLL2550XX_PDIV_MASK)))
+ return 1;
+ else
+ return 0;
This doesn't look too good. Can you make this consistent with
implementations of this helper for other PLLs, such as
samsung_pll35xx_mp_change()?
+}
+
+static int samsung_pll2550xx_set_rate(struct clk_hw *hw, unsigned long drate,
+ unsigned long prate)
+{
+ struct samsung_clk_pll *pll = to_clk_pll(hw);
+ const struct samsung_pll_rate_table *rate;
+ u32 tmp;
+
+ /* Get required rate settings from table */
+ rate = samsung_get_pll_settings(pll, drate);
+ if (!rate) {
+ pr_err(%s: Invalid rate : %lu for pll clk %s\n, __func__,
+ drate, __clk_get_name(hw-clk));
+ return -EINVAL;
+ }
+
+ tmp = __raw_readl(pll-con_reg);
+
+ if (!(samsung_pll2550xx_mp_change(rate-mdiv, rate-pdiv, tmp))) {
+ /* If only s change, change just s value only*/
+ tmp = ~(PLL2550XX_SDIV_MASK PLL2550XX_SDIV_SHIFT);
+ tmp |= rate-sdiv PLL2550XX_SDIV_SHIFT;
+ __raw_writel(tmp, pll-con_reg);
+ } else {
Please make coding style of this function consistent with implementations
of this operation for other PLLs, such as samsung_pll35xx_set_rate().
Otherwise the patch looks fine.
Best regards,
Tomasz
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 4/4] drm: exynos: hdmi: Add dt support for hdmiphy settings
+ linux-samsung-soc mailing list.
On Wed, Dec 4, 2013 at 10:05 AM, Shirish S shir...@chromium.org wrote:
Hi Tomasz,
Thanks for the reivew, please see my replies inline.
On Fri, Nov 29, 2013 at 10:56 PM, Tomasz Figa t.f...@samsung.com wrote:
Hi Shirish,
Please see my comments inline.
On Monday 25 of November 2013 14:24:39 Shirish S wrote:
This patch adds dt support to hdmiphy config settings
as it is board specific and depends on the signal pattern
of board.
Signed-off-by: Shirish S s.shir...@samsung.com
---
.../devicetree/bindings/video/exynos_hdmi.txt | 31
drivers/gpu/drm/exynos/exynos_hdmi.c | 77
+++-
2 files changed, 104 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/video/exynos_hdmi.txt
b/Documentation/devicetree/bindings/video/exynos_hdmi.txt
index 323983b..6eeb333 100644
--- a/Documentation/devicetree/bindings/video/exynos_hdmi.txt
+++ b/Documentation/devicetree/bindings/video/exynos_hdmi.txt
@@ -13,6 +13,30 @@ Required properties:
b) pin number within the gpio controller.
c) optional flags and pull up/down.
+- hdmiphy-configs: following information about the hdmiphy config settings.
Is this node required or optional? If it's required, then it breaks
compatibility with already existing DTBs, which is not desirable.
Yes its an Optional-but-recommended node, and i have mentioned the same
in this document in next patch set(v9).
+ a) configN: configN specifies the phy configuration settings,
+ where 'N' denotes the number of configuration, since every
+ pixel clock can have its unique configuration.
Node names should not have any semantic meaning for parsing code. I know
that there are already existing bindings which rely on presence of
particularly named nodes, but that's not right and new bindings should
not follow that.
I referred Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
for the implementation, am not clear with what you want me to do here, however
the requirement seems similar as pinctrl, can u kindly suggest any
existing newer
implementations to refer.
Also what do you need the label of each config node for?
Each label here is a different pixel clock and corresponding phy setting, and
it may vary from one pixel clock to other hence i need one for each config
node.
Generally from parsing perspective you shouldn't really care about node
names. All you seem to do in the driver is iterating over all specified
nodes and matching them with internal driver data using pixel clock
frequency.
True, that is what i intended to do.I think for the requirement
at hand, this should be fine.
+ pixel-clock specifies the pixel clock
Vendor-specific properties should have vendor prefix, so this one should
be called samsung,pixel-clock.
Agreed, updated in the next patch set(v9).
+ conifig-de-emphasis-level provides fine control of TMDS data
Typo: s/conifig/config
Also it should be called samsung,de-emphasis-level.
Agreed, updated in the next patch set(v9).
+ pre emphasis, below shown is example for
+ data de-emphasis register at address 0x145D0040.
+ hdmiphy@38[16] for bits[3:0] permitted values are in
+ the range of 760 mVdiff to 1400 mVdiff at 20mVdiff
+ increments for every LSB
+ hdmiphy@38[16] for bits[7:4] permitted values are in
+ the range of 0dB to -7.45dB at increments of -0.45dB
+ for every LSB.
+ config-clock-level provides fine control of TMDS data
samsung,clock-level
Agreed, updated in the next patch set(v9).
+ amplitude for each channel,
+ for example if 0x145D005C is the address of clock level
[snip]
diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c
b/drivers/gpu/drm/exynos/exynos_hdmi.c
index 32ce9a6..5f599e3 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmi.c
+++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
[snip]
+static int drm_hdmi_dt_parse_phy_conf(struct platform_device *pdev,
+ struct hdmi_context *hdata)
+{
+ struct device *dev = pdev-dev;
+ struct device_node *dev_np = dev-of_node;
+ struct device_node *phy_conf, *cfg_np;
+ int i, pixel_clock = 0;
+
+ /* Initialize with default config */
+ hdata-confs = hdmiphy_v14_configs;
+ hdata-nr_confs = ARRAY_SIZE(hdmiphy_v14_configs);
+
+ phy_conf = of_find_node_by_name(dev_np, hdmiphy-configs);
of_find_node_by_name() does not do what you need here. Please refer to
its implementation to learn why.
What you need here is of_get_child_by_name().
Agreed, updated in the next patch set(v9).
+ if (phy_conf == NULL) {
+ hdata-nr_confs = ARRAY_SIZE(hdmiphy_v14_configs);
+ DRM_ERROR(Did not find
[PATCH 2/4] ARM: dts: arndale: Add hdmi phy settings
This patch moves the hdmi phy setting to arndale dts,
as its more of a per board configuration and also
shall be easier for supporting future chipsets.
Signed-off-by: Shirish S s.shir...@samsung.com
---
arch/arm/boot/dts/exynos5250-arndale.dts | 74 ++
1 file changed, 74 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts
b/arch/arm/boot/dts/exynos5250-arndale.dts
index cee55fa..6bc562c 100644
--- a/arch/arm/boot/dts/exynos5250-arndale.dts
+++ b/arch/arm/boot/dts/exynos5250-arndale.dts
@@ -475,6 +475,80 @@
vdd_osc-supply = ldo10_reg;
vdd_pll-supply = ldo8_reg;
vdd-supply = ldo8_reg;
+ hdmiphy-configs {
+ /*
+ * Eye diagram test passed for:
+ * Data de-emphasis: -0.7dB Data Level: 880mV
+ * i.e., 0010 0110 = 0x26
+ * and Clock level of 515mV and diff 1030mV
+ * i.e., 0x66
+ */
+ config0: config0 {
+ samsung,pixel-clock = 2520;
+ samsung,de-emphasis-level = /bits/ 8 0x26;
+ samsung,clock-level = /bits/ 8 0x66;
+ };
+ config1: config1 {
+ samsung,pixel-clock = 2700;
+ samsung,de-emphasis-level = /bits/ 8 0x26;
+ samsung,clock-level = /bits/ 8 0x66;
+ };
+ config2: config2 {
+ samsung,pixel-clock = 27027000;
+ samsung,de-emphasis-level = /bits/ 8 0x26;
+ samsung,clock-level = /bits/ 8 0x66;
+ };
+ config3: config3 {
+ samsung,pixel-clock = 3600;
+ samsung,de-emphasis-level = /bits/ 8 0x26;
+ samsung,clock-level = /bits/ 8 0x66;
+ };
+ config4: config4 {
+ samsung,pixel-clock = 4000;
+ samsung,de-emphasis-level = /bits/ 8 0x26;
+ samsung,clock-level = /bits/ 8 0x66;
+ };
+ config5: config5 {
+ samsung,pixel-clock = 6500;
+ samsung,de-emphasis-level = /bits/ 8 0x26;
+ samsung,clock-level = /bits/ 8 0x66;
+ };
+ config6: config6 {
+ samsung,pixel-clock = 74176000;
+ samsung,de-emphasis-level = /bits/ 8 0x26;
+ samsung,clock-level = /bits/ 8 0x66;
+ };
+ config7: config7 {
+ samsung,pixel-clock = 7425;
+ samsung,de-emphasis-level = /bits/ 8 0x26;
+ samsung,clock-level = /bits/ 8 0x66;
+ };
+ config8: config8 {
+ samsung,pixel-clock = 8350;
+ samsung,de-emphasis-level = /bits/ 8 0x26;
+ samsung,clock-level = /bits/ 8 0x66;
+ };
+ config9: config9 {
+ samsung,pixel-clock = 10650;
+ samsung,de-emphasis-level = /bits/ 8 0x26;
+ samsung,clock-level = /bits/ 8 0x66;
+ };
+ config10: config10 {
+ samsung,pixel-clock = 10800;
+ samsung,de-emphasis-level = /bits/ 8 0x26;
+ samsung,clock-level = /bits/ 8 0x66;
+ };
+ config11: config11 {
+ samsung,pixel-clock = 14625;
+ samsung,de-emphasis-level = /bits/ 8 0x26;
+ samsung,clock-level = /bits/ 8 0x66;
+ };
+ config12: config12 {
+ samsung,pixel-clock = 14850;
+ samsung,de-emphasis-level = /bits/ 8 0x26;
+ samsung,clock-level = /bits/ 8 0x66;
+ };
+ };
};
regulators {
--
1.7.9.5
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 4/4] drm: exynos: hdmi: Add dt support for hdmiphy settings
This patch adds dt support to hdmiphy config settings
as it is board specific and depends on the signal pattern
of board.
Signed-off-by: Shirish S s.shir...@samsung.com
---
.../devicetree/bindings/video/exynos_hdmi.txt | 34
drivers/gpu/drm/exynos/exynos_hdmi.c | 89
2 files changed, 105 insertions(+), 18 deletions(-)
diff --git a/Documentation/devicetree/bindings/video/exynos_hdmi.txt
b/Documentation/devicetree/bindings/video/exynos_hdmi.txt
index 323983b..0766e6e 100644
--- a/Documentation/devicetree/bindings/video/exynos_hdmi.txt
+++ b/Documentation/devicetree/bindings/video/exynos_hdmi.txt
@@ -13,6 +13,31 @@ Required properties:
b) pin number within the gpio controller.
c) optional flags and pull up/down.
+Optional-but-recommended properties:
+- hdmiphy-configs: following information about the hdmiphy config settings.
+ a) configN: configN specifies the phy configuration settings,
+ where 'N' denotes the number of configuration, since every
+ pixel clock can have its unique configuration.
+ samsung,pixel-clock specifies the pixel clock
+ samsung,de-emphasis-level provides fine control of TMDS data
+pre emphasis, below shown is example for
+ data de-emphasis register at address 0x145D0040.
+ hdmiphy@38[16] for bits[3:0] permitted values are in
+ the range of 760 mVdiff to 1400 mVdiff at 20mVdiff
+ increments for every LSB
+ hdmiphy@38[16] for bits[7:4] permitted values are in
+ the range of 0dB to -7.45dB at increments of -0.45dB
+ for every LSB.
+ samsung,clock-level provides fine control of TMDS data
+ amplitude for each channel,
+ for example if 0x145D005C is the address of clock level
+ register then,
+ hdmiphy@38[23] for bits [1:0] permitted values are in
+ the range of 0 mVdiff 60 mVdiff for each channel at
+ increments 20 mVdiff of amplitude levels for every LSB,
+ hdmiphy@38[23] for bits [7:3] permitted values are in
+ the range of 790 and 1430 mV at 20mV increments for
+ every LSB.
Example:
hdmi {
@@ -20,4 +45,13 @@ Example:
reg = 0x1453 0x10;
interrupts = 0 95 0;
hpd-gpio = gpx3 7 1;
+ hdmiphy-configs {
+ config0: config0 {
+ samsung,pixel-clock = 2520;
+ samsung,de-emphasis-level = /bits/ 8 0x26;
+ samsung,clock-level = /bits/ 8 0x66;
+ };
+
+ /* ... */
+ }
};
diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c
b/drivers/gpu/drm/exynos/exynos_hdmi.c
index a0e10ae..2fa0074 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmi.c
+++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
@@ -200,6 +200,9 @@ struct hdmi_context {
struct hdmi_resources res;
+ struct hdmiphy_config *confs;
+ int nr_confs;
+
int hpd_gpio;
enum hdmi_type type;
@@ -259,7 +262,7 @@ static const struct hdmiphy_config hdmiphy_v13_configs[] = {
},
};
-static const struct hdmiphy_config hdmiphy_v14_configs[] = {
+static struct hdmiphy_config hdmiphy_v14_configs[] = {
{
.pixel_clock = 2520,
.conf = {
@@ -771,20 +774,10 @@ static struct edid *hdmi_get_edid(void *ctx, struct
drm_connector *connector)
static int hdmi_find_phy_conf(struct hdmi_context *hdata, u32 pixel_clock)
{
- const struct hdmiphy_config *confs;
- int count, i;
-
- if (hdata-type == HDMI_TYPE13) {
- confs = hdmiphy_v13_configs;
- count = ARRAY_SIZE(hdmiphy_v13_configs);
- } else if (hdata-type == HDMI_TYPE14) {
- confs = hdmiphy_v14_configs;
- count = ARRAY_SIZE(hdmiphy_v14_configs);
- } else
- return -EINVAL;
+ int i;
- for (i = 0; i count; i++)
- if (confs[i].pixel_clock == pixel_clock)
+ for (i = 0; i hdata-nr_confs; i++)
+ if (hdata-confs[i].pixel_clock == pixel_clock)
return i;
DRM_DEBUG_KMS(Could not find phy config for %d\n, pixel_clock);
@@ -1363,10 +1356,7 @@ static void hdmiphy_conf_apply(struct hdmi_context
*hdata)
return;
}
- if (hdata-type == HDMI_TYPE13)
- hdmiphy_data = hdmiphy_v13_configs[i].conf;
- else
- hdmiphy_data = hdmiphy_v14_configs[i].conf;
+ hdmiphy_data =
[PATCH 0/4] Add dt support for exynos hdmiphy settings
For various revisions of a chipset if the signal pattern is changed for every revision, then the phy setting need to be updated correspondingly by measuring the signal. For getting correct signals the clock level and data de-emphasis levels needs to be adjusted. Since only these 2 values matter,we can move the same to dt, wherein we can have different dt files for every revision. This is an initial patchset towards achieving the same for exynos 5250 and can be later extended to future chipsets. V2: replaced moving of entire phy config structure with only required and justifiable conf registers. V3: Incorporated Mark Rutland's comments. V4: Rebased and included cros5250-common.dtsi. V5: removed nr-configs feild and also the constraint of having the exact number of configs in the dt file as in the driver, the programmer can add only the pixel clock that needs to be updated. V6: V7: removed nr-configs form the dtsi files. V8: Fixed build error V9: rebased and incorporated Tomasz comments. Shirish S (4): ARM: dts: smdk5250: Add hdmi phy settings ARM: dts: arndale: Add hdmi phy settings ARM: exynos: dts: cros5250: Add hdmi phy settings drm: exynos: hdmi: Add dt support for hdmiphy settings .../devicetree/bindings/video/exynos_hdmi.txt | 34 arch/arm/boot/dts/cros5250-common.dtsi | 74 arch/arm/boot/dts/exynos5250-arndale.dts | 74 arch/arm/boot/dts/exynos5250-smdk5250.dts | 74 drivers/gpu/drm/exynos/exynos_hdmi.c | 89 5 files changed, 327 insertions(+), 18 deletions(-) -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/4] ARM: dts: smdk5250: Add hdmi phy settings
This patch moves the hdmi phy setting to smdk5250
dts,as its more of a per board configuration and
also shall be easier for supporting future chipsets.
Signed-off-by: Shirish S s.shir...@samsung.com
---
arch/arm/boot/dts/exynos5250-smdk5250.dts | 74 +
1 file changed, 74 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts
b/arch/arm/boot/dts/exynos5250-smdk5250.dts
index 2538b32..10da02f 100644
--- a/arch/arm/boot/dts/exynos5250-smdk5250.dts
+++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
@@ -220,6 +220,80 @@
hdmi {
hpd-gpio = gpx3 7 0;
+ hdmiphy-configs {
+ /*
+ * Eye diagram test passed for:
+ * Data de-emphasis: -0.7dB Data Level: 880mV
+ * i.e., 0010 0110 = 0x26
+ * and Clock level of 515mV and diff 1030mV
+ * i.e., 0x66
+ */
+ config0: config0 {
+ samsung,pixel-clock = 2520;
+ samsung,de-emphasis-level = /bits/ 8 0x26;
+ samsung,clock-level = /bits/ 8 0x66;
+ };
+ config1: config1 {
+ samsung,pixel-clock = 2700;
+ samsung,de-emphasis-level = /bits/ 8 0x26;
+ samsung,clock-level = /bits/ 8 0x66;
+ };
+ config2: config2 {
+ samsung,pixel-clock = 27027000;
+ samsung,de-emphasis-level = /bits/ 8 0x26;
+ samsung,clock-level = /bits/ 8 0x66;
+ };
+ config3: config3 {
+ samsung,pixel-clock = 3600;
+ samsung,de-emphasis-level = /bits/ 8 0x26;
+ samsung,clock-level = /bits/ 8 0x66;
+ };
+ config4: config4 {
+ samsung,pixel-clock = 4000;
+ samsung,de-emphasis-level = /bits/ 8 0x26;
+ samsung,clock-level = /bits/ 8 0x66;
+ };
+ config5: config5 {
+ samsung,pixel-clock = 6500;
+ samsung,de-emphasis-level = /bits/ 8 0x26;
+ samsung,clock-level = /bits/ 8 0x66;
+ };
+ config6: config6 {
+ samsung,pixel-clock = 74176000;
+ samsung,de-emphasis-level = /bits/ 8 0x26;
+ samsung,clock-level = /bits/ 8 0x66;
+ };
+ config7: config7 {
+ samsung,pixel-clock = 7425;
+ samsung,de-emphasis-level = /bits/ 8 0x26;
+ samsung,clock-level = /bits/ 8 0x66;
+ };
+ config8: config8 {
+ samsung,pixel-clock = 8350;
+ samsung,de-emphasis-level = /bits/ 8 0x26;
+ samsung,clock-level = /bits/ 8 0x66;
+ };
+ config9: config9 {
+ samsung,pixel-clock = 10650;
+ samsung,de-emphasis-level = /bits/ 8 0x26;
+ samsung,clock-level = /bits/ 8 0x66;
+ };
+ config10: config10 {
+ samsung,pixel-clock = 10800;
+ samsung,de-emphasis-level = /bits/ 8 0x26;
+ samsung,clock-level = /bits/ 8 0x66;
+ };
+ config11: config11 {
+ samsung,pixel-clock = 14625;
+ samsung,de-emphasis-level = /bits/ 8 0x26;
+ samsung,clock-level = /bits/ 8 0x66;
+ };
+ config12: config12 {
+ samsung,pixel-clock = 14850;
+ samsung,de-emphasis-level = /bits/ 8 0x26;
+ samsung,clock-level = /bits/ 8 0x66;
+ };
+ };
};
codec@1100 {
--
1.7.9.5
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 4/4] drm: exynos: hdmi: Add dt support for hdmiphy settings
On Thursday 19 of December 2013 17:42:28 Shirish S wrote:
This patch adds dt support to hdmiphy config settings
as it is board specific and depends on the signal pattern
of board.
Signed-off-by: Shirish S s.shir...@samsung.com
---
.../devicetree/bindings/video/exynos_hdmi.txt | 34
drivers/gpu/drm/exynos/exynos_hdmi.c | 89
2 files changed, 105 insertions(+), 18 deletions(-)
diff --git a/Documentation/devicetree/bindings/video/exynos_hdmi.txt
b/Documentation/devicetree/bindings/video/exynos_hdmi.txt
index 323983b..0766e6e 100644
--- a/Documentation/devicetree/bindings/video/exynos_hdmi.txt
+++ b/Documentation/devicetree/bindings/video/exynos_hdmi.txt
@@ -13,6 +13,31 @@ Required properties:
b) pin number within the gpio controller.
c) optional flags and pull up/down.
+Optional-but-recommended properties:
+- hdmiphy-configs: following information about the hdmiphy config settings.
+ a) configN: configN specifies the phy configuration settings,
Why do you need this configN: part? (This is called label in DT
terminology by the way and can be used to reference the node from
properties of other nodes, by so called phandle.)
+ where 'N' denotes the number of configuration, since every
+ pixel clock can have its unique configuration.
+ samsung,pixel-clock specifies the pixel clock
+ samsung,de-emphasis-level provides fine control of TMDS data
+ pre emphasis, below shown is example for
+ data de-emphasis register at address 0x145D0040.
+ hdmiphy@38[16] for bits[3:0] permitted values are in
+ the range of 760 mVdiff to 1400 mVdiff at 20mVdiff
+ increments for every LSB
+ hdmiphy@38[16] for bits[7:4] permitted values are in
+ the range of 0dB to -7.45dB at increments of -0.45dB
+ for every LSB.
+ samsung,clock-level provides fine control of TMDS data
+ amplitude for each channel,
+ for example if 0x145D005C is the address of clock level
+ register then,
+ hdmiphy@38[23] for bits [1:0] permitted values are in
+ the range of 0 mVdiff 60 mVdiff for each channel at
+ increments 20 mVdiff of amplitude levels for every LSB,
+ hdmiphy@38[23] for bits [7:3] permitted values are in
+ the range of 790 and 1430 mV at 20mV increments for
+ every LSB.
Example:
hdmi {
@@ -20,4 +45,13 @@ Example:
reg = 0x1453 0x10;
interrupts = 0 95 0;
hpd-gpio = gpx3 7 1;
+ hdmiphy-configs {
+ config0: config0 {
+ samsung,pixel-clock = 2520;
+ samsung,de-emphasis-level = /bits/ 8 0x26;
nit: Two spaces before /bits/.
+ samsung,clock-level = /bits/ 8 0x66;
nit: Two spaces before /bits/ and incorrect space after .
Generally the list of configurations should look like below:
phy-configs {
#address-cells = 1;
#size-cells = 0;
config@0 {
reg = 0;
/* other properties... */
};
config@1 {
reg = 1;
/* other properties... */
};
/* ... */
};
This is how bus-like structures should be represented in device tree.
Also, since this is HDMI node, maybe it's enough to call the node simply
phy-configs. Please rework the patches to use this correct representation.
+
+ /* ... */
+ }
};
[snip]
+ for_each_child_of_node(phy_conf, cfg_np) {
+ if (of_property_read_u32(cfg_np, samsung,pixel-clock,
+ pixel_clock))
+ continue;
+
+ for (i = 0; i ARRAY_SIZE(hdata-nr_confs); i++) {
+ if (hdata-confs[i].pixel_clock == pixel_clock)
Can you have more than one config with the same pixel clock?
Even if not, the code could be made more readable if the code
below is moved outside the if and continue keyword is used instead.
Best regards,
Tomasz
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 2/3] clk: exynos5250: fix sysmmu_mfc{l,r} gate clocks
Hi Sachin, Andrew, On Wednesday 18 of December 2013 23:39:58 Sachin Kamat wrote: Hi Tomasz, On 10 November 2013 22:38, Tomasz Figa tomasz.f...@gmail.com wrote: Hi Sachin, Andrew, On Friday 08 of November 2013 15:44:07 Sachin Kamat wrote: From: Andrew Bresticker abres...@chromium.org The gate clocks for the MFC sysmmus appear to be flipped, i.e. GATE_IP_MFC[2] gates sysmmu_mfcl and GATE_IP_MFC[1] gates sysmmu_mfcr. Fix this so that the MFC will start up. Wow, this means that there is a mistake in the documentation. Not that I'm surprised, though. I guess you are sure about this, so: Reviewed-by: Tomasz Figa t.f...@samsung.com I believe you are going to take this through your tree along with a few others which you have already reviewed? This patch seems to depend on my Exynos 5250 clock clean-up series, which will be merged for 3.14. Are you okay with this patch being merged for 3.14 as well or this fix is needed for earlier kernel versions too? (It is not a regression introduced in 3.13, though.) Best regards, Tomasz -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v11 7/7] thermal:exynos:boost: Automatic enable/disable of BOOST feature (at Exynos4412)
On 13-12-2013 12:38, Lukasz Majewski wrote:
This patch provides auto disable/enable operation for boost. It uses already
present thermal infrastructure to provide boost hysteresis.
The TMU data has been modified to work properly with or without boost.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
Signed-off-by: Myungjoo Ham myungjoo@samsung.com
Acked-by: Eduardo Valentin eduardo.valen...@ti.com
Looks better to me now. You might consider refactoring this driver to be
frequency independent, if possible. But that is a different subject
other than this patch.
---
Changes for v11:
- Use only one thermal data set
- Adjust Exynos4412 thermal data to work with or without BOOST
Changes for v10:
- Remove boost related code from thermal_core.c
- Use already present thermal infrastructure to provide thermal hysteresis
- Introduce special set of TMU data for BOOST
Changes for v9:
- None
Changes for v8:
- Move cpufreq_boost_* stub functions definition (needed when cpufreq
is not compiled in) to cpufreq.h at cpufreq core support commit
Changes for v7:
- None
Changes for v6:
- Disable boost only when supported and enabled
- Protect boost related thermal_zone_device struct fields with mutex
- Evaluate temperature trend during boost enable decision
- Create separate methods to handle boost enable/disable
(thermal_boost_{enable|disable}) operations
- Boost is disabled at any trip point passage (not only the non critical
one)
- Add stub definitions for cpufreq boost functions used when
CONFIG_CPU_FREQ is NOT defined.
Changes for v5:
- Move boost disable code from cpu_cooling.c to thermal_core.c
(to handle_non_critical_trips)
- Extent struct thermal_zone_device by adding overheated bool flag
- Implement auto enable of boost after device cools down
- Introduce boost_polling flag, which indicates if thermal uses it's
predefined
pool delay or has woken up thermal workqueue only to wait until device
cools down.
Changes for v4:
- New patch
drivers/thermal/samsung/exynos_tmu_data.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/thermal/samsung/exynos_tmu_data.c
b/drivers/thermal/samsung/exynos_tmu_data.c
index 073c292..476b768 100644
--- a/drivers/thermal/samsung/exynos_tmu_data.c
+++ b/drivers/thermal/samsung/exynos_tmu_data.c
@@ -131,8 +131,8 @@ static const struct exynos_tmu_registers
exynos4412_tmu_registers = {
#define EXYNOS4412_TMU_DATA \
.threshold_falling = 10, \
- .trigger_levels[0] = 85, \
- .trigger_levels[1] = 103, \
+ .trigger_levels[0] = 70, \
+ .trigger_levels[1] = 95, \
.trigger_levels[2] = 110, \
.trigger_levels[3] = 120, \
.trigger_enable[0] = true, \
@@ -155,12 +155,12 @@ static const struct exynos_tmu_registers
exynos4412_tmu_registers = {
.second_point_trim = 85, \
.default_temp_offset = 50, \
.freq_tab[0] = { \
- .freq_clip_max = 800 * 1000, \
- .temp_level = 85, \
+ .freq_clip_max = 1400 * 1000, \
+ .temp_level = 70, \
}, \
.freq_tab[1] = { \
- .freq_clip_max = 200 * 1000, \
- .temp_level = 103, \
+ .freq_clip_max = 400 * 1000, \
+ .temp_level = 95, \
}, \
.freq_tab_count = 2, \
.registers = exynos4412_tmu_registers, \
--
You have got to be excited about what you are doing. (L. Lamport)
Eduardo Valentin
signature.asc
Description: OpenPGP digital signature
[PATCH 12/38] arm: s5pv210: add missing put_device call
This is required so that give up the last reference to the device.
Signed-off-by: Levente Kurusa le...@linux.com
---
arch/arm/mach-s5pv210/common.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-s5pv210/common.c b/arch/arm/mach-s5pv210/common.c
index 26027a2..81f43ae 100644
--- a/arch/arm/mach-s5pv210/common.c
+++ b/arch/arm/mach-s5pv210/common.c
@@ -267,8 +267,14 @@ core_initcall(s5pv210_core_init);
int __init s5pv210_init(void)
{
+ int rc = 0;
+
printk(KERN_INFO S5PV210: Initializing architecture\n);
- return device_register(s5pv210_dev);
+ rc = device_register(s5pv210_dev);
+ if (rc)
+ put_device(s5pv210_dev);
+
+ return rc;
}
/* uart registration process */
--
1.8.3.1
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 10/38] arm: exynos: add missing put_device call
This is required so that we give up the last reference to the device.
Signed-off-by: Levente Kurusa le...@linux.com
---
arch/arm/mach-exynos/common.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 61d2906..8b58829 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -407,7 +407,13 @@ early_initcall(exynos4_l2x0_cache_init);
static int __init exynos_init(void)
{
+ int rc = 0;
+
printk(KERN_INFO EXYNOS: Initializing architecture\n);
- return device_register(exynos4_dev);
+ rc = device_register(exynos4_dev);
+ if (rc)
+ put_device(exynos4_dev);
+
+ return rc;
}
--
1.8.3.1
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 06/38] arm: mach-s3c64: add missing put_device call
This is required so that we give up the last reference to the device.
Signed-off-by: Levente Kurusa le...@linux.com
---
arch/arm/mach-s3c64xx/dma.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-s3c64xx/dma.c b/arch/arm/mach-s3c64xx/dma.c
index 7e22c21..090852d 100644
--- a/arch/arm/mach-s3c64xx/dma.c
+++ b/arch/arm/mach-s3c64xx/dma.c
@@ -663,6 +663,7 @@ static int s3c64xx_dma_init1(int chno, enum dma_ch chbase,
err = device_register(dmac-dev);
if (err) {
printk(KERN_ERR %s: failed to register device\n, __func__);
+ put_device(dmac-dev);
goto err_alloc;
}
--
1.8.3.1
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 2/3] clk: exynos5250: fix sysmmu_mfc{l,r} gate clocks
Hi Tomasz, On 19 December 2013 19:40, Tomasz Figa t.f...@samsung.com wrote: Hi Sachin, Andrew, On Wednesday 18 of December 2013 23:39:58 Sachin Kamat wrote: Hi Tomasz, On 10 November 2013 22:38, Tomasz Figa tomasz.f...@gmail.com wrote: Hi Sachin, Andrew, On Friday 08 of November 2013 15:44:07 Sachin Kamat wrote: From: Andrew Bresticker abres...@chromium.org The gate clocks for the MFC sysmmus appear to be flipped, i.e. GATE_IP_MFC[2] gates sysmmu_mfcl and GATE_IP_MFC[1] gates sysmmu_mfcr. Fix this so that the MFC will start up. Wow, this means that there is a mistake in the documentation. Not that I'm surprised, though. I guess you are sure about this, so: Reviewed-by: Tomasz Figa t.f...@samsung.com I believe you are going to take this through your tree along with a few others which you have already reviewed? This patch seems to depend on my Exynos 5250 clock clean-up series, which will be merged for 3.14. Are you okay with this patch being merged for 3.14 as well or this fix is needed for earlier kernel versions too? (It is not a regression introduced in 3.13, though.) Yes, I did rebase it on top of your series along with other patches. Though not a regression introduced in 3.13, I think it makes sense to have this sent as a fix during this release (3.13) itself. Let me know if you want me to base it on top of 3.13-rc4 and re-send. -- With warm regards, Sachin -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v10 1/2] s5k5baf: add camera sensor driver
Hi Sylwester, On Thursday 19 December 2013 14:54:44 Sylwester Nawrocki wrote: On 05/12/13 12:38, Andrzej Hajda wrote: Driver for Samsung S5K5BAF UXGA 1/5 2M CMOS Image Sensor with embedded SoC ISP. The driver exposes the sensor as two V4L2 subdevices: - S5K5BAF-CIS - pure CMOS Image Sensor, fixed 1600x1200 format, no controls. - S5K5BAF-ISP - Image Signal Processor, formats up to 1600x1200, pre/post ISP cropping, downscaling via selection API, controls. Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com Signed-off-by: Andrzej Hajda a.ha...@samsung.com Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com Hi Laurent, Does this driver look sane to you, at its 10'th version? :) If so I could send a pull request including it this week. Yes, it does. Sorry for the delay. Please send the pull request. -- Regards, Laurent Pinchart -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH Resend 1/1] clk: exynos5250: Add CLK_SET_RATE_PARENT flag to mout_apll
Quoting Sachin Kamat (2013-12-19 00:33:39)
Add CLK_SET_RATE_PARENT flag to mout_apll clock. This will let us set the
clock rate in the cpufreq driver.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
Ack.
Regards,
Mike
---
drivers/clk/samsung/clk-exynos5250.c |3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/samsung/clk-exynos5250.c
b/drivers/clk/samsung/clk-exynos5250.c
index 80f652053cb5..11178b1ad735 100644
--- a/drivers/clk/samsung/clk-exynos5250.c
+++ b/drivers/clk/samsung/clk-exynos5250.c
@@ -303,7 +303,8 @@ static struct samsung_mux_clock exynos5250_mux_clks[]
__initdata = {
/*
* CMU_CPU
*/
- MUX_A(none, mout_apll, mout_apll_p, SRC_CPU, 0, 1, mout_apll),
+ MUX_FA(none, mout_apll, mout_apll_p, SRC_CPU, 0, 1,
+ CLK_SET_RATE_PARENT, 0, mout_apll),
MUX_A(none, mout_cpu, mout_cpu_p, SRC_CPU, 16, 1, mout_cpu),
/*
--
1.7.9.5
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 1/1] ARM: dts: add board dts file for EXYNOS4412 based TINY4412 board
On 12/19/13 00:01, Tomasz Figa wrote: Hi Alex, Hi, On Wednesday 18 of December 2013 21:23:59 Alex Ling wrote: Add a minimal board dts file for EXYNOS4412 based FriendlyARM's TINY4412 board. This patch including support peripherals like UART, SD card on SDMMC2 port and GPIO connected LEDs. Signed-off-by: Alex Lingkasiml...@gmail.com --- Changes for v2: - Clean up patch description - Fix LED labels as Tomasz's suggested - Fix style issues arch/arm/boot/dts/Makefile|1 + arch/arm/boot/dts/exynos4412-tiny4412.dts | 93 + 2 files changed, 94 insertions(+) create mode 100644 arch/arm/boot/dts/exynos4412-tiny4412.dts Reviewed-by: Tomasz Figat.f...@samsung.com Thanks, applied. - Kukjin -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 2/3] ARM: dts: Add the missing \ key in non-US keyboards for exynos5250-snow
When the exynos5250 device tree was sent upstream the keyboard mapping was missing the 2nd instance of the \ key. There are two copies of the \ because it simply has a different row and column on US and non-US keyboards. For more details, see the previous patch in this series: (mkbp: Fix problems with backslash). Signed-off-by: Doug Anderson diand...@chromium.org --- arch/arm/boot/dts/exynos5250-snow.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/exynos5250-snow.dts b/arch/arm/boot/dts/exynos5250-snow.dts index fd711e2..28fe2e2 100644 --- a/arch/arm/boot/dts/exynos5250-snow.dts +++ b/arch/arm/boot/dts/exynos5250-snow.dts @@ -130,6 +130,7 @@ 0x04060024 /* J */ 0x04080027 /* ; */ 0x04090026 /* L */ + 0x040a002b /* \ */ 0x040b001c /* ENTER */ 0x0501002c /* Z */ -- 1.8.5.1 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 3/3] ARM: dts: Fix exynos5250-snow's search key to be L_META
The device tree sent upstream for exynos5250-snow encoded the search key as CAPSLK. However in all ChromeOS kernels it is L_META. One can certainly have long debates about which it ought to be, but I'm proposing setting it to L_META because: * That's how _all_ ChromeOS kernels do it and will do it. * There is no L_META key on the board, so it's nice to have. * For those people who really want it to be caps lock, they can use xmodmap or somesuch. Signed-off-by: Doug Anderson diand...@chromium.org --- arch/arm/boot/dts/exynos5250-snow.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/exynos5250-snow.dts b/arch/arm/boot/dts/exynos5250-snow.dts index 28fe2e2..c65f52a 100644 --- a/arch/arm/boot/dts/exynos5250-snow.dts +++ b/arch/arm/boot/dts/exynos5250-snow.dts @@ -85,7 +85,7 @@ keypad,num-rows = 8; keypad,num-columns = 13; google,needs-ghost-filter; - linux,keymap = 0x0001003a /* CAPSLK */ + linux,keymap = 0x0001007d /* L_META */ 0x0002003b /* F1 */ 0x00030030 /* B */ 0x00040044 /* F10 */ -- 1.8.5.1 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hello dear
Hello dear I will be very happy to be your friend. My name is miss. Ann Stokes. Please i will like you to write me through my email address ( ann...@yahoo.fr ) . I will send my pictures to you and also tell you more about myself when i receive your email. I will be waiting for your mail in my mail box. Your new friend. Ann -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH -next] spi: spi-s3c24xx: remove redundant return value check of platform_get_resource()
From: Wei Yongjun yongjun_...@trendmicro.com.cn
Remove unneeded error handling on the result of a call
to platform_get_resource() when the value is passed to
devm_ioremap_resource().
Signed-off-by: Wei Yongjun yongjun_...@trendmicro.com.cn
---
drivers/spi/spi-s3c24xx.c | 7 ---
1 file changed, 7 deletions(-)
diff --git a/drivers/spi/spi-s3c24xx.c b/drivers/spi/spi-s3c24xx.c
index ebf80bb..2ccb28d 100644
--- a/drivers/spi/spi-s3c24xx.c
+++ b/drivers/spi/spi-s3c24xx.c
@@ -560,14 +560,7 @@ static int s3c24xx_spi_probe(struct platform_device *pdev)
dev_dbg(hw-dev, bitbang at %p\n, hw-bitbang);
/* find and map our resources */
-
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- if (res == NULL) {
- dev_err(pdev-dev, Cannot get IORESOURCE_MEM\n);
- err = -ENOENT;
- goto err_no_pdata;
- }
-
hw-regs = devm_ioremap_resource(pdev-dev, res);
if (IS_ERR(hw-regs)) {
err = PTR_ERR(hw-regs);
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH -next] spi: spi-s3c24xx: remove redundant return value check of platform_get_resource()
On Friday, December 20, 2013 11:22 AM, Wei Yongjun wrote: From: Wei Yongjun yongjun_...@trendmicro.com.cn Remove unneeded error handling on the result of a call to platform_get_resource() when the value is passed to devm_ioremap_resource(). Signed-off-by: Wei Yongjun yongjun_...@trendmicro.com.cn Reviewed-by: Jingoo Han jg1@samsung.com Best regards, Jingoo Han --- drivers/spi/spi-s3c24xx.c | 7 --- 1 file changed, 7 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v12 4/4] ARM: dts: Exynos5420: Add device nodes for TMU blocks
Exynos5420 SoC has per core thermal management unit.
5 TMU channels 4 for CPUs and 5th for GPU.
This patch adds the device tree nodes to the DT device list.
Nodes carry the misplaced second base address and the second
clock to access the misplaced base address.
Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
Signed-off-by: Andrew Bresticker abres...@chromium.org
---
Changes since v11:
changed the secondary clock name to tmu_triminfo_apbif
from tmu_apbif_triminfo
Changes since previous version:
1. used lables instead of comment lines
2. pass the same clock as trimfo_apbif clock for TMU channel 2
3. Fixed a coding style problem pointed by Tomasz
arch/arm/boot/dts/exynos5420.dtsi | 40 +
1 file changed, 40 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5420.dtsi
b/arch/arm/boot/dts/exynos5420.dtsi
index b1fa334..c62cde6 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -402,4 +402,44 @@
clock-names = gscl;
samsung,power-domain = gsc_pd;
};
+
+ tmu_cpu0: tmu@1006 {
+ compatible = samsung,exynos5420-tmu;
+ reg = 0x1006 0x100;
+ interrupts = 0 65 0;
+ clocks = clock 318;
+ clock-names = tmu_apbif;
+ };
+
+ tmu_cpu1: tmu@10064000 {
+ compatible = samsung,exynos5420-tmu;
+ reg = 0x10064000 0x100;
+ interrupts = 0 183 0;
+ clocks = clock 318;
+ clock-names = tmu_apbif;
+ };
+
+ tmu_cpu2: tmu@10068000 {
+ compatible = samsung,exynos5420-tmu-ext-triminfo;
+ reg = 0x10068000 0x100, 0x1006c000 0x4;
+ interrupts = 0 184 0;
+ clocks = clock 318, clock 318;
+ clock-names = tmu_apbif, tmu_triminfo_apbif;
+ };
+
+ tmu_cpu3: tmu@1006c000 {
+ compatible = samsung,exynos5420-tmu-ext-triminfo;
+ reg = 0x1006c000 0x100, 0x100a 0x4;
+ interrupts = 0 185 0;
+ clocks = clock 318, clock 319;
+ clock-names = tmu_apbif, tmu_triminfo_apbif;
+ };
+
+ tmu_gpu: tmu@100a {
+ compatible = samsung,exynos5420-tmu-ext-triminfo;
+ reg = 0x100a 0x100, 0x10068000 0x4;
+ interrupts = 0 215 0;
+ clocks = clock 319, clock 318;
+ clock-names = tmu_apbif, tmu_triminfo_apbif;
+ };
};
--
1.7.10.4
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
