exynos-drm HDMI PHY configuration values
Hi Sean, In your commit "drm/exynos: hdmi: support extra resolutions using drm_display_mode timings" you added several more HDMI PHY configs to exynos-drm. Thanks for that. Can you explain where these magic numbers came from? I'm interested in adding 85.5MHz for 1366x768 support. Thanks, Daniel -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH V14 0/7] add new Samsung SXGBE driver
Hi all,
This is 14th posting for SAMSUNG SXGBE driver.
Changes since v1:
- changed name of driver to SXGbE as per Ben's comment
- squashed Joe's neatening for many stuff in original patches
Changes since v2:
- updated and split binding document as per Mark's comment
- clean up codes as per Joe's comment
- removed unused fields and clean up codes as per Francois's comment
- removed module parameters as per Dave's comment
- moved driver directory to samsung/sxgbe/
Changes since v3:
- fixed Missing a blank line after declarations as per Dave's comment
- clean up codes as per Joe's comment
- removed reference of net_device.{irq, base_addr} as per Francois's comment
Changes since v4:
- updated binding document and DT related function as per Mark's comment
Changes since v5:
- updated binding document and DT related function as per Florian's comment
- fixed typo and shortened code as per Joe's comment
Changes since v6:
- updated TSO related functions as per Rayagond's comment
- updated binding document as per Mark's comment
- removed WoL patch from this patch set
Changes since v7:
- updated TSO related functions as per Rayagond's comment
Changes since v8:
- removed select and depends statement from vendor sub-section as per
Dave's comment
Changes since v9:
- removed adv-add-map, force-sf-dma-modei and force-thresh-dma-mode from
binding documnet as per Mark's comment
Changes since v10:
- clean up codes as per Francois's comment
Changes since v11:
- clean up mdio_read/write codes as per Francois's comment
- changed irq acquisition error path as per Francois's comment
- updated mdio and platform related codes as per Tomasz'comment
- clean up dma related codes as per Vince's comment
Changes since v12:
- fixed typo
Changes since v13:
- clean up error path codes for irqs as per Francois's comment
- removed unsupported functions for ehttoolirq as per Ben's comment
Byungho An (1):
MAINTAINERS: add maintainer for Samsung sxgbe driver
Girish K S (1):
net: sxgbe: add EEE(Energy Efficient Ethernet) for Samsung sxgbe
Siva Reddy (2):
sxgbe: Add device-tree binding support document
net: sxgbe: add basic framework for Samsung 10Gb ethernet driver
Vipul Pandya (3):
net: sxgbe: add TSO support for Samsung sxgbe
net: sxgbe: add Checksum offload support for Samsung sxgbe
net: sxgbe: add ethtool related functions support Samsung sxgbe
.../devicetree/bindings/net/samsung-sxgbe.txt | 52 +
MAINTAINERS|9 +
drivers/net/ethernet/Kconfig |1 +
drivers/net/ethernet/Makefile |1 +
drivers/net/ethernet/samsung/Kconfig | 16 +
drivers/net/ethernet/samsung/Makefile |5 +
drivers/net/ethernet/samsung/sxgbe/Kconfig |9 +
drivers/net/ethernet/samsung/sxgbe/Makefile|4 +
drivers/net/ethernet/samsung/sxgbe/sxgbe_common.h | 538 +
drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c| 262 +++
drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c| 515 +
drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.h| 298 +++
drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c | 382
drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.h | 50 +
drivers/net/ethernet/samsung/sxgbe/sxgbe_ethtool.c | 524 +
drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c| 2310
drivers/net/ethernet/samsung/sxgbe/sxgbe_mdio.c| 251 +++
drivers/net/ethernet/samsung/sxgbe/sxgbe_mtl.c | 254 +++
drivers/net/ethernet/samsung/sxgbe/sxgbe_mtl.h | 104 +
.../net/ethernet/samsung/sxgbe/sxgbe_platform.c| 259 +++
drivers/net/ethernet/samsung/sxgbe/sxgbe_reg.h | 488 +
drivers/net/ethernet/samsung/sxgbe/sxgbe_xpcs.c| 91 +
drivers/net/ethernet/samsung/sxgbe/sxgbe_xpcs.h| 38 +
include/linux/sxgbe_platform.h | 54 +
24 files changed, 6515 insertions(+)
Thanks,
Byungho An
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[PATCH V14 4/7] net: sxgbe: add EEE(Energy Efficient Ethernet) for Samsung sxgbe
From: Girish K S
Added support for the EEE(Energy Efficient Ethernet) in 10G ethernet driver.
Signed-off-by: Girish K S
Neatening-by: Joe Perches
Signed-off-by: Byungho An
---
drivers/net/ethernet/samsung/sxgbe/sxgbe_common.h | 53 +++
drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c| 86 +-
drivers/net/ethernet/samsung/sxgbe/sxgbe_ethtool.c | 47 ++
drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c| 165 +++-
.../net/ethernet/samsung/sxgbe/sxgbe_platform.c|6 +
drivers/net/ethernet/samsung/sxgbe/sxgbe_reg.h |5 +
6 files changed, 360 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/samsung/sxgbe/sxgbe_common.h
b/drivers/net/ethernet/samsung/sxgbe/sxgbe_common.h
index cf7ed07..7293c4c 100644
--- a/drivers/net/ethernet/samsung/sxgbe/sxgbe_common.h
+++ b/drivers/net/ethernet/samsung/sxgbe/sxgbe_common.h
@@ -118,6 +118,33 @@ struct sxgbe_mtl_ops;
#define RX_PTP_SIGNAL 0x0A
#define RX_PTP_RESV_MSG0x0F
+/* EEE-LPI mode flags*/
+#define TX_ENTRY_LPI_MODE 0x10
+#define TX_EXIT_LPI_MODE 0x20
+#define RX_ENTRY_LPI_MODE 0x40
+#define RX_EXIT_LPI_MODE 0x80
+
+/* EEE-LPI Interrupt status flag */
+#define LPI_INT_STATUS BIT(5)
+
+/* EEE-LPI Default timer values */
+#define LPI_LINK_STATUS_TIMER 0x3E8
+#define LPI_MAC_WAIT_TIMER 0x00
+
+/* EEE-LPI Control and status definitions */
+#define LPI_CTRL_STATUS_TXABIT(19)
+#define LPI_CTRL_STATUS_PLSDIS BIT(18)
+#define LPI_CTRL_STATUS_PLSBIT(17)
+#define LPI_CTRL_STATUS_LPIEN BIT(16)
+#define LPI_CTRL_STATUS_TXRSTP BIT(11)
+#define LPI_CTRL_STATUS_RXRSTP BIT(10)
+#define LPI_CTRL_STATUS_RLPIST BIT(9)
+#define LPI_CTRL_STATUS_TLPIST BIT(8)
+#define LPI_CTRL_STATUS_RLPIEX BIT(3)
+#define LPI_CTRL_STATUS_RLPIEN BIT(2)
+#define LPI_CTRL_STATUS_TLPIEX BIT(1)
+#define LPI_CTRL_STATUS_TLPIEN BIT(0)
+
enum dma_irq_status {
tx_hard_error = BIT(0),
tx_bump_tc = BIT(1),
@@ -202,6 +229,13 @@ struct sxgbe_extra_stats {
unsigned long rx_buffer_access_err;
unsigned long rx_data_transfer_err;
+ /* EEE-LPI stats */
+ unsigned long tx_lpi_entry_n;
+ unsigned long tx_lpi_exit_n;
+ unsigned long rx_lpi_entry_n;
+ unsigned long rx_lpi_exit_n;
+ unsigned long eee_wakeup_error_n;
+
/* RX specific */
/* L2 error */
unsigned long rx_code_gmii_err;
@@ -299,6 +333,13 @@ struct sxgbe_core_ops {
unsigned char feature_index);
/* adjust SXGBE speed */
void (*set_speed)(void __iomem *ioaddr, unsigned char speed);
+
+ /* EEE-LPI specific operations */
+ void (*set_eee_mode)(void __iomem *ioaddr);
+ void (*reset_eee_mode)(void __iomem *ioaddr);
+ void (*set_eee_timer)(void __iomem *ioaddr, const int ls,
+ const int tw);
+ void (*set_eee_pls)(void __iomem *ioaddr, const int link);
};
const struct sxgbe_core_ops *sxgbe_get_core_ops(void);
@@ -355,6 +396,8 @@ struct sxgbe_hw_features {
/* IEEE 1588-2008 */
unsigned int atime_stamp;
+ unsigned int eee;
+
unsigned int tx_csum_offload;
unsigned int rx_csum_offload;
unsigned int multi_macaddr;
@@ -438,6 +481,13 @@ struct sxgbe_priv_data {
/* tc control */
int tx_tc;
int rx_tc;
+ /* EEE-LPI specific members */
+ struct timer_list eee_ctrl_timer;
+ bool tx_path_in_lpi_mode;
+ int lpi_irq;
+ int eee_enabled;
+ int eee_active;
+ int tx_lpi_timer;
};
/* Function prototypes */
@@ -460,4 +510,7 @@ int sxgbe_restore(struct net_device *ndev);
const struct sxgbe_mtl_ops *sxgbe_get_mtl_ops(void);
+void sxgbe_disable_eee_mode(struct sxgbe_priv_data * const priv);
+bool sxgbe_eee_init(struct sxgbe_priv_data * const priv);
+
#endif /* __SXGBE_COMMON_H__ */
diff --git a/drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c
b/drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c
index 4ad31bb..0164790 100644
--- a/drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c
+++ b/drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c
@@ -48,11 +48,38 @@ static void sxgbe_core_dump_regs(void __iomem *ioaddr)
{
}
+static int sxgbe_get_lpi_status(void __iomem *ioaddr, const u32 irq_status)
+{
+ int status = 0;
+ int lpi_status;
+
+ /* Reading this register shall clear all the LPI status bits */
+ lpi_status = readl(ioaddr + SXGBE_CORE_LPI_CTRL_STATUS);
+
+ if (lpi_status & LPI_CTRL_STATUS_TLPIEN)
+ status |= TX_ENTRY_LPI_MODE;
+ if (lpi_status & LPI_CTRL_STATUS_TLPIEX)
+ status |= TX_EXIT_LPI_MODE;
+ if (lpi_status & LPI_CTRL_STATUS_RLPIEN)
+ status |= RX_ENTRY_LPI_MODE;
+ if (lpi_status & LPI_CTRL_STATUS_RLPIEX)
+ status |= RX_EXIT_LPI_MODE;
+
+ return status;
+}
+
/* Handle extra events on specific interrup
[PATCH V14 1/7] sxgbe: Add device-tree binding support document
From: Siva Reddy
This patch adds binding document for SXGBE ethernet driver via device-tree.
Signed-off-by: Siva Reddy Kallam
Signed-off-by: Byungho An
---
.../devicetree/bindings/net/samsung-sxgbe.txt | 52
1 file changed, 52 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/samsung-sxgbe.txt
diff --git a/Documentation/devicetree/bindings/net/samsung-sxgbe.txt
b/Documentation/devicetree/bindings/net/samsung-sxgbe.txt
new file mode 100644
index 000..989f6c9
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/samsung-sxgbe.txt
@@ -0,0 +1,52 @@
+* Samsung 10G Ethernet driver (SXGBE)
+
+Required properties:
+- compatible: Should be "samsung,sxgbe-v2.0a"
+- reg: Address and length of the register set for the device
+- interrupt-parent: Should be the phandle for the interrupt controller
+ that services interrupts for this device
+- interrupts: Should contain the SXGBE interrupts
+ These interrupts are ordered by fixed and follows variable
+ trasmit DMA interrupts, receive DMA interrupts and lpi interrupt.
+ index 0 - this is fixed common interrupt of SXGBE and it is always
+ available.
+ index 1 to 25 - 8 variable trasmit interrupts, variable 16 receive interrupts
+ and 1 optional lpi interrupt.
+- phy-mode: String, operation mode of the PHY interface.
+ Supported values are: "sgmii", "xgmii".
+- samsung,pbl: Integer, Programmable Burst Length.
+ Supported values are 1, 2, 4, 8, 16, or 32.
+- samsung,burst-map: Integer, Program the possible bursts supported by sxgbe
+ This is an interger and represents allowable DMA bursts when fixed burst.
+ Allowable range is 0x01-0x3F. When this field is set fixed burst is enabled.
+ When fixed length is needed for burst mode, it can be set within allowable
+ range.
+
+Optional properties:
+- mac-address: 6 bytes, mac address
+- max-frame-size: Maximum Transfer Unit (IEEE defined MTU), rather
+ than the maximum frame size.
+
+Example:
+
+ aliases {
+ ethernet0 = <&sxgbe0>;
+ };
+
+ sxgbe0: ethernet@1a04 {
+ compatible = "samsung,sxgbe-v2.0a";
+ reg = <0 0x1a04 0 0x1>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 209 4>, <0 185 4>, <0 186 4>, <0 187 4>,
+<0 188 4>, <0 189 4>, <0 190 4>, <0 191 4>,
+<0 192 4>, <0 193 4>, <0 194 4>, <0 195 4>,
+<0 196 4>, <0 197 4>, <0 198 4>, <0 199 4>,
+<0 200 4>, <0 201 4>, <0 202 4>, <0 203 4>,
+<0 204 4>, <0 205 4>, <0 206 4>, <0 207 4>,
+<0 208 4>, <0 210 4>;
+ samsung,pbl = <0x08>
+ samsung,burst-map = <0x20>
+ mac-address = [ 00 11 22 33 44 55 ]; /* Filled in by U-Boot */
+ max-frame-size = <9000>;
+ phy-mode = "xgmii";
+ };
--
1.7.10.4
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[PATCH V14 6/7] net: sxgbe: add ethtool related functions support Samsung sxgbe
From: Vipul Pandya
This patch adds ethtool related functions.
Signed-off-by: Vipul Pandya
Neatening-by: Joe Perches
Signed-off-by: Byungho An
---
drivers/net/ethernet/samsung/sxgbe/sxgbe_common.h | 16 +-
drivers/net/ethernet/samsung/sxgbe/sxgbe_ethtool.c | 433
drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c|4 +
drivers/net/ethernet/samsung/sxgbe/sxgbe_reg.h |6 +
4 files changed, 458 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/samsung/sxgbe/sxgbe_common.h
b/drivers/net/ethernet/samsung/sxgbe/sxgbe_common.h
index 4893cfd..6203c7d 100644
--- a/drivers/net/ethernet/samsung/sxgbe/sxgbe_common.h
+++ b/drivers/net/ethernet/samsung/sxgbe/sxgbe_common.h
@@ -197,6 +197,20 @@ enum dma_irq_status {
#define SXGBE_FOR_EACH_QUEUE(max_queues, queue_num)\
for (queue_num = 0; queue_num < max_queues; queue_num++)
+#define DRV_VERSION "1.0.0"
+
+#define SXGBE_MAX_RX_CHANNELS 16
+#define SXGBE_MAX_TX_CHANNELS 16
+
+#define START_MAC_REG_OFFSET 0x
+#define MAX_MAC_REG_OFFSET 0x0DFC
+#define START_MTL_REG_OFFSET 0x1000
+#define MAX_MTL_REG_OFFSET 0x18FC
+#define START_DMA_REG_OFFSET 0x3000
+#define MAX_DMA_REG_OFFSET 0x38FC
+
+#define REG_SPACE_SIZE 0x2000
+
/* sxgbe statistics counters */
struct sxgbe_extra_stats {
/* TX/RX IRQ events */
@@ -482,6 +496,7 @@ struct sxgbe_priv_data {
/* advanced time stamp support */
u32 adv_ts;
int use_riwt;
+ struct ptp_clock *ptp_clock;
/* tc control */
int tx_tc;
@@ -517,5 +532,4 @@ const struct sxgbe_mtl_ops *sxgbe_get_mtl_ops(void);
void sxgbe_disable_eee_mode(struct sxgbe_priv_data * const priv);
bool sxgbe_eee_init(struct sxgbe_priv_data * const priv);
-
#endif /* __SXGBE_COMMON_H__ */
diff --git a/drivers/net/ethernet/samsung/sxgbe/sxgbe_ethtool.c
b/drivers/net/ethernet/samsung/sxgbe/sxgbe_ethtool.c
index ca95f1d..0415fa5 100644
--- a/drivers/net/ethernet/samsung/sxgbe/sxgbe_ethtool.c
+++ b/drivers/net/ethernet/samsung/sxgbe/sxgbe_ethtool.c
@@ -12,11 +12,17 @@
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+#include
+#include
#include
#include
+#include
#include
+#include
#include "sxgbe_common.h"
+#include "sxgbe_reg.h"
+#include "sxgbe_dma.h"
struct sxgbe_stats {
char stat_string[ETH_GSTRING_LEN];
@@ -32,11 +38,100 @@ struct sxgbe_stats {
}
static const struct sxgbe_stats sxgbe_gstrings_stats[] = {
+ /* TX/RX IRQ events */
+ SXGBE_STAT(tx_process_stopped_irq),
+ SXGBE_STAT(tx_ctxt_desc_err),
+ SXGBE_STAT(tx_threshold),
+ SXGBE_STAT(rx_threshold),
+ SXGBE_STAT(tx_pkt_n),
+ SXGBE_STAT(rx_pkt_n),
+ SXGBE_STAT(normal_irq_n),
+ SXGBE_STAT(tx_normal_irq_n),
+ SXGBE_STAT(rx_normal_irq_n),
+ SXGBE_STAT(napi_poll),
+ SXGBE_STAT(tx_clean),
+ SXGBE_STAT(tx_reset_ic_bit),
+ SXGBE_STAT(rx_process_stopped_irq),
+ SXGBE_STAT(rx_underflow_irq),
+
+ /* Bus access errors */
+ SXGBE_STAT(fatal_bus_error_irq),
+ SXGBE_STAT(tx_read_transfer_err),
+ SXGBE_STAT(tx_write_transfer_err),
+ SXGBE_STAT(tx_desc_access_err),
+ SXGBE_STAT(tx_buffer_access_err),
+ SXGBE_STAT(tx_data_transfer_err),
+ SXGBE_STAT(rx_read_transfer_err),
+ SXGBE_STAT(rx_write_transfer_err),
+ SXGBE_STAT(rx_desc_access_err),
+ SXGBE_STAT(rx_buffer_access_err),
+ SXGBE_STAT(rx_data_transfer_err),
+
+ /* EEE-LPI stats */
SXGBE_STAT(tx_lpi_entry_n),
SXGBE_STAT(tx_lpi_exit_n),
SXGBE_STAT(rx_lpi_entry_n),
SXGBE_STAT(rx_lpi_exit_n),
SXGBE_STAT(eee_wakeup_error_n),
+
+ /* RX specific */
+ /* L2 error */
+ SXGBE_STAT(rx_code_gmii_err),
+ SXGBE_STAT(rx_watchdog_err),
+ SXGBE_STAT(rx_crc_err),
+ SXGBE_STAT(rx_gaint_pkt_err),
+ SXGBE_STAT(ip_hdr_err),
+ SXGBE_STAT(ip_payload_err),
+ SXGBE_STAT(overflow_error),
+
+ /* L2 Pkt type */
+ SXGBE_STAT(len_pkt),
+ SXGBE_STAT(mac_ctl_pkt),
+ SXGBE_STAT(dcb_ctl_pkt),
+ SXGBE_STAT(arp_pkt),
+ SXGBE_STAT(oam_pkt),
+ SXGBE_STAT(untag_okt),
+ SXGBE_STAT(other_pkt),
+ SXGBE_STAT(svlan_tag_pkt),
+ SXGBE_STAT(cvlan_tag_pkt),
+ SXGBE_STAT(dvlan_ocvlan_icvlan_pkt),
+ SXGBE_STAT(dvlan_osvlan_isvlan_pkt),
+ SXGBE_STAT(dvlan_osvlan_icvlan_pkt),
+ SXGBE_STAT(dvan_ocvlan_icvlan_pkt),
+
+ /* L3/L4 Pkt type */
+ SXGBE_STAT(not_ip_pkt),
+ SXGBE_STAT(ip4_tcp_pkt),
+ SXGBE_STAT(ip4_udp_pkt),
+ SXGBE_STAT(ip4_icmp_pkt),
+ SXGBE_STAT(ip4_unknown_pkt),
+ SXGBE_STAT(ip6_tcp_pkt),
+ SXGBE_STAT(ip6_udp_pkt),
+ SXGBE_STAT(ip6_icmp_pkt),
+ SXGBE_STAT(ip6_unknown_pkt),
+
+ /* Filter specific */
+ SXGBE_STAT(vlan_filter_match),
+ SXGBE_STAT(sa_filter_fail),
+ SXGBE_STAT(da_filter_fail),
+
[PATCH V14 5/7] net: sxgbe: add Checksum offload support for Samsung sxgbe
From: Vipul Pandya
This patch adds TX and RX checksum offload support.
Signed-off-by: Vipul Pandya
Neatening-by: Joe Perches
Signed-off-by: Byungho An
---
drivers/net/ethernet/samsung/sxgbe/sxgbe_common.h |5 +++
drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c | 20 +
drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.h |2 +-
drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c | 46 -
4 files changed, 61 insertions(+), 12 deletions(-)
diff --git a/drivers/net/ethernet/samsung/sxgbe/sxgbe_common.h
b/drivers/net/ethernet/samsung/sxgbe/sxgbe_common.h
index 7293c4c..4893cfd 100644
--- a/drivers/net/ethernet/samsung/sxgbe/sxgbe_common.h
+++ b/drivers/net/ethernet/samsung/sxgbe/sxgbe_common.h
@@ -340,6 +340,10 @@ struct sxgbe_core_ops {
void (*set_eee_timer)(void __iomem *ioaddr, const int ls,
const int tw);
void (*set_eee_pls)(void __iomem *ioaddr, const int link);
+
+ /* Enable disable checksum offload operations */
+ void (*enable_rx_csum)(void __iomem *ioaddr);
+ void (*disable_rx_csum)(void __iomem *ioaddr);
};
const struct sxgbe_core_ops *sxgbe_get_core_ops(void);
@@ -452,6 +456,7 @@ struct sxgbe_priv_data {
struct sxgbe_ops *hw; /* sxgbe specific ops */
int no_csum_insertion;
int irq;
+ int rxcsum_insertion;
spinlock_t stats_lock; /* lock for tx/rx statatics */
struct phy_device *phydev;
diff --git a/drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c
b/drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c
index 0164790..66d4a74 100644
--- a/drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c
+++ b/drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c
@@ -218,6 +218,24 @@ static void sxgbe_set_eee_timer(void __iomem *ioaddr,
writel(value, ioaddr + SXGBE_CORE_LPI_TIMER_CTRL);
}
+static void sxgbe_enable_rx_csum(void __iomem *ioaddr)
+{
+ u32 ctrl;
+
+ ctrl = readl(ioaddr + SXGBE_CORE_RX_CONFIG_REG);
+ ctrl |= SXGBE_RX_CSUMOFFLOAD_ENABLE;
+ writel(ctrl, ioaddr + SXGBE_CORE_RX_CONFIG_REG);
+}
+
+static void sxgbe_disable_rx_csum(void __iomem *ioaddr)
+{
+ u32 ctrl;
+
+ ctrl = readl(ioaddr + SXGBE_CORE_RX_CONFIG_REG);
+ ctrl &= ~SXGBE_RX_CSUMOFFLOAD_ENABLE;
+ writel(ctrl, ioaddr + SXGBE_CORE_RX_CONFIG_REG);
+}
+
const struct sxgbe_core_ops core_ops = {
.core_init = sxgbe_core_init,
.dump_regs = sxgbe_core_dump_regs,
@@ -234,6 +252,8 @@ const struct sxgbe_core_ops core_ops = {
.reset_eee_mode = sxgbe_reset_eee_mode,
.set_eee_timer = sxgbe_set_eee_timer,
.set_eee_pls= sxgbe_set_eee_pls,
+ .enable_rx_csum = sxgbe_enable_rx_csum,
+ .disable_rx_csum= sxgbe_disable_rx_csum,
};
const struct sxgbe_core_ops *sxgbe_get_core_ops(void)
diff --git a/drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.h
b/drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.h
index 6d44b9f..838cb9f 100644
--- a/drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.h
+++ b/drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.h
@@ -113,7 +113,7 @@ struct sxgbe_rx_norm_desc {
/* WB RDES3 */
u32 pkt_len:14;
u32 rdes3_reserved:1;
- u32 err_summary:15;
+ u32 err_summary:1;
u32 err_l2_type:4;
u32 layer34_pkt_type:4;
u32 no_coagulation_pkt:1;
diff --git a/drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c
b/drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c
index dc0249b..96b4b2c 100644
--- a/drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c
+++ b/drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c
@@ -1252,6 +1252,7 @@ void sxgbe_tso_prepare(struct sxgbe_priv_data *priv,
static netdev_tx_t sxgbe_xmit(struct sk_buff *skb, struct net_device *dev)
{
unsigned int entry, frag_num;
+ int cksum_flag = 0;
struct netdev_queue *dev_txq;
unsigned txq_index = skb_get_queue_mapping(skb);
struct sxgbe_priv_data *priv = netdev_priv(dev);
@@ -1332,7 +1333,7 @@ static netdev_tx_t sxgbe_xmit(struct sk_buff *skb, struct
net_device *dev)
__func__);
priv->hw->desc->prepare_tx_desc(tx_desc, 1, no_pagedlen,
- no_pagedlen, 0);
+ no_pagedlen,
cksum_flag);
}
}
@@ -1350,7 +1351,7 @@ static netdev_tx_t sxgbe_xmit(struct sk_buff *skb, struct
net_device *dev)
/* prepare the descriptor */
priv->hw->desc->prepare_tx_desc(tx_desc, 0, len,
- len, 0);
+ len, cksum_flag);
/* memory barrier to flush descriptor */
[PATCH V14 7/7] MAINTAINERS: add maintainer for Samsung sxgbe driver
From: Byungho An Signed-off-by: Byungho An --- MAINTAINERS |9 + 1 file changed, 9 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index b7befe7..aeb81f2 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -7536,6 +7536,15 @@ S: Supported L: linux-samsung-soc@vger.kernel.org (moderated for non-subscribers) F: drivers/clk/samsung/ +SAMSUNG SXGBE DRIVERS +M: Byungho An +M: Girish K S +M: Siva Reddy Kallam +M: Vipul Pandya +S: Supported +L: net...@vger.kernel.org +F: drivers/net/ethernet/samsung/sxgbe/ + SERIAL DRIVERS M: Greg Kroah-Hartman L: linux-ser...@vger.kernel.org -- 1.7.10.4 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH V14 3/7] net: sxgbe: add TSO support for Samsung sxgbe
From: Vipul Pandya
Enable TSO during initialization for each DMA channels
Signed-off-by: Vipul Pandya
Neatening-by: Joe Perches
Signed-off-by: Byungho An
---
drivers/net/ethernet/samsung/sxgbe/sxgbe_common.h |1 +
drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c |2 +-
drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.h |4 +-
drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c| 10 +++
drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.h|2 +
drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c | 84 +++--
6 files changed, 92 insertions(+), 11 deletions(-)
diff --git a/drivers/net/ethernet/samsung/sxgbe/sxgbe_common.h
b/drivers/net/ethernet/samsung/sxgbe/sxgbe_common.h
index c7803f1..cf7ed07 100644
--- a/drivers/net/ethernet/samsung/sxgbe/sxgbe_common.h
+++ b/drivers/net/ethernet/samsung/sxgbe/sxgbe_common.h
@@ -330,6 +330,7 @@ struct sxgbe_tx_queue {
u32 tx_coal_frames;
u32 tx_coal_timer;
int hwts_tx_en;
+ u16 prev_mss;
u8 queue_no;
};
diff --git a/drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c
b/drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c
index 7cb5520..e896dbb 100644
--- a/drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c
+++ b/drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c
@@ -133,7 +133,7 @@ static int sxgbe_tx_ctxt_desc_get_owner(struct
sxgbe_tx_ctxt_desc *p)
}
/* Set TX mss in TX context Descriptor */
-static void sxgbe_tx_ctxt_desc_set_mss(struct sxgbe_tx_ctxt_desc *p, int mss)
+static void sxgbe_tx_ctxt_desc_set_mss(struct sxgbe_tx_ctxt_desc *p, u16 mss)
{
p->maxseg_size = mss;
}
diff --git a/drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.h
b/drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.h
index 2caef1a..6d44b9f 100644
--- a/drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.h
+++ b/drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.h
@@ -168,7 +168,7 @@ struct sxgbe_desc_ops {
/* Invoked by the xmit function to prepare the tx descriptor */
void (*tx_desc_enable_tse)(struct sxgbe_tx_norm_desc *p, u8 is_tse,
- u32 total_hdr_len, u32 payload_len,
+ u32 total_hdr_len, u32 tcp_hdr_len,
u32 tcp_payload_len);
/* Assign buffer lengths for descriptor */
@@ -217,7 +217,7 @@ struct sxgbe_desc_ops {
int (*get_tx_ctxt_owner)(struct sxgbe_tx_ctxt_desc *p);
/* Set TX mss */
- void (*tx_ctxt_desc_set_mss)(struct sxgbe_tx_ctxt_desc *p, int mss);
+ void (*tx_ctxt_desc_set_mss)(struct sxgbe_tx_ctxt_desc *p, u16 mss);
/* Set TX mss */
int (*tx_ctxt_desc_get_mss)(struct sxgbe_tx_ctxt_desc *p);
diff --git a/drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c
b/drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c
index 59d2d39..28f89c4 100644
--- a/drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c
+++ b/drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c
@@ -349,6 +349,15 @@ static void sxgbe_dma_rx_watchdog(void __iomem *ioaddr,
u32 riwt)
}
}
+static void sxgbe_enable_tso(void __iomem *ioaddr, u8 chan_num)
+{
+ u32 ctrl;
+
+ ctrl = readl(ioaddr + SXGBE_DMA_CHA_TXCTL_REG(chan_num));
+ ctrl |= SXGBE_DMA_CHA_TXCTL_TSE_ENABLE;
+ writel(ctrl, ioaddr + SXGBE_DMA_CHA_TXCTL_REG(chan_num));
+}
+
static const struct sxgbe_dma_ops sxgbe_dma_ops = {
.init = sxgbe_dma_init,
.cha_init = sxgbe_dma_channel_init,
@@ -364,6 +373,7 @@ static const struct sxgbe_dma_ops sxgbe_dma_ops = {
.tx_dma_int_status = sxgbe_tx_dma_int_status,
.rx_dma_int_status = sxgbe_rx_dma_int_status,
.rx_watchdog= sxgbe_dma_rx_watchdog,
+ .enable_tso = sxgbe_enable_tso,
};
const struct sxgbe_dma_ops *sxgbe_get_dma_ops(void)
diff --git a/drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.h
b/drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.h
index bbf167e..1607b54 100644
--- a/drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.h
+++ b/drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.h
@@ -41,6 +41,8 @@ struct sxgbe_dma_ops {
struct sxgbe_extra_stats *x);
/* Program the HW RX Watchdog */
void (*rx_watchdog)(void __iomem *ioaddr, u32 riwt);
+ /* Enable TSO for each DMA channel */
+ void (*enable_tso)(void __iomem *ioaddr, u8 chan_num);
};
const struct sxgbe_dma_ops *sxgbe_get_dma_ops(void);
diff --git a/drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c
b/drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c
index 75ba57c..20b9b2b 100644
--- a/drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c
+++ b/drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c
@@ -1096,6 +1096,28 @@ static int sxgbe_release(struct net_device *dev)
return 0;
}
+/* Prepare first Tx descriptor for doing TSO operation */
+void sxgbe_tso_prepare(struct sxgbe_priv_data *priv,
+ struct sxgbe_tx
Re: [RESEND: RFC PATCH 3/3] pcie: keystone: add pcie driver based on designware core driver
On Tue, Mar 25, 2014 at 08:44:36AM +0100, Arnd Bergmann wrote:
> I have no idea how this would work with the standard interrupt-map property,
> since the legacy interrupt host is now the same device as the pci host.
>
> Maybe it's better to move the legacy irqchip handling entirely out of
> the driver and use a separate device node for the registers so it can
> come with its own #interrupt-cells, and then refer to this irqchip from
> the interrupt-map.
The other DW PCI-E drivers are being fixed to use interrupt-map, so I
think this driver should be fixed before it goes in as well.
Other PCI-E hosts have handled this particular problem with a
construction like this:
pcie@2180 {
compatible = "ti,keystone2-pcie";
device_type = "pci";
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
reg = ..
pcie_intc: interrupt-controller {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <1>;
}
interrupts = ... enough to decode INTx;
interrtup-map = <0 0 0 1 &pcie_intc 1>, // INT A
<0 0 0 2 &pcie_intc 2>, // INT B
<0 0 0 3 &pcie_intc 3>, // INT C
<0 0 0 4 &pcie_intc 4>; // INT D
}
When the legacy irq domain is created it should be bound to the
pcie_intc node, not to pcie node.
ks_pcie_map_irq should be removed.
> > +#ifdef CONFIG_PCIE_KEYSTONE
> > +/*
> > + * The KeyStone PCIe controller has maximum read request size of 256 bytes.
> > + * Force this configuration for all EP including bridges.
> > + */
> > +static void quirk_limit_readrequest(struct pci_dev *dev)
> > +{
> > + pcie_set_readrq(dev, 256);
> > +}
> > +DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, quirk_limit_readrequest);
> > +#endif /* CONFIG_TI_KEYSTONE_PCIE */
>
> You can't do this:
>
> A quirk for a specific hardware must not be enabled by compile-time options.
> You have to find a different way to do this.
This configuration should happen automatically by the PCI core if the
config spaces are correct. See pcie_write_mrrs, pcie_write_mps,
pcie_bus_configure_settings, etc.
Your host will need to conform to the PCI spec and provide a root
port bridge header for this to work.
Also, even in the keystone case the MRRS should not be globally forced
like this, there may be other bridges in the system with a 128 byte
MPS.
Jason
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RE: [PATCH V13 2/7] net: sxgbe: add basic framework for Samsung 10Gb ethernet driver
Francois Romieu :
> Byungho An :
> [...]
> > How about below ?
>
> The for loops should be unrolled.
>
> (style: no need to join before branching)
>
> I must go to work, so you'll have to fill the dots in the code below:
>
> priv = sxgbe_drv_probe(&(pdev->dev), plat_dat, addr);
> if (!priv) {
> pr_err("%s: main driver probe failed\n", __func__);
> goto err_something;
> }
>
> /* Get the SXGBE common INT information */
> priv->irq = irq_of_parse_and_map(node, 0);
> if (priv->irq <= 0) {
> dev_err(dev, "sxgbe common irq parsing failed\n");
> goto err_drv_remove;
> }
>
> /* Get the TX/RX IRQ numbers */
> for (i = 0, chan = 1; i < SXGBE_TX_QUEUES; i++) {
> priv->txq[i]->irq_no = irq_of_parse_and_map(node, chan++);
> if (priv->txq[i]->irq_no <= 0) {
> dev_err(dev, "sxgbe tx irq parsing failed\n");
> goto err_tx_irq_unmap;
> }
> }
>
> for (i = 0; i < SXGBE_RX_QUEUES; i++) {
> priv->rxq[i]->irq_no = irq_of_parse_and_map(node, chan++);
> if (priv->rxq[i]->irq_no <= 0) {
> dev_err(dev, "sxgbe rx irq parsing failed\n");
> goto err_rx_irq_unmap;
> }
> }
>
> platform_set_drvdata(pdev, priv->dev);
>
> pr_debug("platform driver registration completed\n");
>
> return 0;
>
> err_rx_irq_unmap:
> /* TODO: check that 'i' isn't unsigned. */
> while (i--)
> irq_dispose_mapping(priv->rx[i]->irq_no);
> i = SXGBE_TX_QUEUES;
> err_tx_irq_unmap:
> while (i--)
> irq_dispose_mapping(priv->tx[i]->irq_no);
> irq_dispose_mapping(priv->irq);
> err_drv_remove:
> sxgbe_drv_remove(ndev);
> err_something:
> ...
>
OK, thanks
> --
> Ueimor
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[PATCH v2 2/3] drm/panel: add ld9040 driver
The patch adds LD9040 parallel RGB panel driver with SPI control interface.
The driver uses drm_panel framework.
Signed-off-by: Andrzej Hajda
---
v2: removed useless include
---
drivers/gpu/drm/panel/Kconfig| 6 +
drivers/gpu/drm/panel/Makefile | 1 +
drivers/gpu/drm/panel/panel-ld9040.c | 376 +++
3 files changed, 383 insertions(+)
create mode 100644 drivers/gpu/drm/panel/panel-ld9040.c
diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index 3e0f13d..94cc0c7 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -16,4 +16,10 @@ config DRM_PANEL_SIMPLE
that it can be automatically turned off when the panel goes into a
low power state.
+config DRM_PANEL_LD9040
+ tristate "LD9040 RGB/SPI panel"
+ depends on DRM && DRM_PANEL
+ depends on OF
+ select VIDEOMODE_HELPERS
+
endmenu
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index af9dfa2..4f7dfce 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -1 +1,2 @@
obj-$(CONFIG_DRM_PANEL_SIMPLE) += panel-simple.o
+obj-$(CONFIG_DRM_PANEL_LD9040) += panel-ld9040.o
diff --git a/drivers/gpu/drm/panel/panel-ld9040.c
b/drivers/gpu/drm/panel/panel-ld9040.c
new file mode 100644
index 000..1f1f837
--- /dev/null
+++ b/drivers/gpu/drm/panel/panel-ld9040.c
@@ -0,0 +1,376 @@
+/*
+ * ld9040 AMOLED LCD drm_panel driver.
+ *
+ * Copyright (c) 2014 Samsung Electronics Co., Ltd
+ * Derived from drivers/video/backlight/ld9040.c
+ *
+ * Andrzej Hajda
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include
+#include
+
+#include
+#include
+#include
+
+#include
+#include
+#include
+
+/* Manufacturer Command Set */
+#define MCS_MANPWR 0xb0
+#define MCS_ELVSS_ON 0xb1
+#define MCS_USER_SETTING 0xf0
+#define MCS_DISPCTL0xf2
+#define MCS_GTCON 0xf7
+#define MCS_PANEL_CONDITION0xf8
+#define MCS_GAMMA_SET1 0xf9
+#define MCS_GAMMA_CTRL 0xfb
+
+/* array of gamma tables for gamma value 2.2 */
+static u8 const ld9040_gammas[25][22] = {
+ { 0xf9, 0x00, 0x13, 0xb2, 0xba, 0xd2, 0x00, 0x30, 0x00, 0xaf, 0xc0,
+ 0xb8, 0xcd, 0x00, 0x3d, 0x00, 0xa8, 0xb8, 0xb7, 0xcd, 0x00, 0x44 },
+ { 0xf9, 0x00, 0x13, 0xb9, 0xb9, 0xd0, 0x00, 0x3c, 0x00, 0xaf, 0xbf,
+ 0xb6, 0xcb, 0x00, 0x4b, 0x00, 0xa8, 0xb9, 0xb5, 0xcc, 0x00, 0x52 },
+ { 0xf9, 0x00, 0x13, 0xba, 0xb9, 0xcd, 0x00, 0x41, 0x00, 0xb0, 0xbe,
+ 0xb5, 0xc9, 0x00, 0x51, 0x00, 0xa9, 0xb9, 0xb5, 0xca, 0x00, 0x57 },
+ { 0xf9, 0x00, 0x13, 0xb9, 0xb8, 0xcd, 0x00, 0x46, 0x00, 0xb1, 0xbc,
+ 0xb5, 0xc8, 0x00, 0x56, 0x00, 0xaa, 0xb8, 0xb4, 0xc9, 0x00, 0x5d },
+ { 0xf9, 0x00, 0x13, 0xba, 0xb8, 0xcb, 0x00, 0x4b, 0x00, 0xb3, 0xbc,
+ 0xb4, 0xc7, 0x00, 0x5c, 0x00, 0xac, 0xb8, 0xb4, 0xc8, 0x00, 0x62 },
+ { 0xf9, 0x00, 0x13, 0xbb, 0xb7, 0xca, 0x00, 0x4f, 0x00, 0xb4, 0xbb,
+ 0xb3, 0xc7, 0x00, 0x60, 0x00, 0xad, 0xb8, 0xb4, 0xc7, 0x00, 0x67 },
+ { 0xf9, 0x00, 0x47, 0xba, 0xb6, 0xca, 0x00, 0x53, 0x00, 0xb5, 0xbb,
+ 0xb3, 0xc6, 0x00, 0x65, 0x00, 0xae, 0xb8, 0xb3, 0xc7, 0x00, 0x6c },
+ { 0xf9, 0x00, 0x71, 0xbb, 0xb5, 0xc8, 0x00, 0x57, 0x00, 0xb5, 0xbb,
+ 0xb0, 0xc5, 0x00, 0x6a, 0x00, 0xae, 0xb9, 0xb1, 0xc6, 0x00, 0x70 },
+ { 0xf9, 0x00, 0x7b, 0xbb, 0xb4, 0xc8, 0x00, 0x5b, 0x00, 0xb5, 0xba,
+ 0xb1, 0xc4, 0x00, 0x6e, 0x00, 0xae, 0xb9, 0xb0, 0xc5, 0x00, 0x75 },
+ { 0xf9, 0x00, 0x82, 0xba, 0xb4, 0xc7, 0x00, 0x5f, 0x00, 0xb5, 0xba,
+ 0xb0, 0xc3, 0x00, 0x72, 0x00, 0xae, 0xb8, 0xb0, 0xc3, 0x00, 0x7a },
+ { 0xf9, 0x00, 0x89, 0xba, 0xb3, 0xc8, 0x00, 0x62, 0x00, 0xb6, 0xba,
+ 0xaf, 0xc3, 0x00, 0x76, 0x00, 0xaf, 0xb7, 0xae, 0xc4, 0x00, 0x7e },
+ { 0xf9, 0x00, 0x8b, 0xb9, 0xb3, 0xc7, 0x00, 0x65, 0x00, 0xb7, 0xb8,
+ 0xaf, 0xc3, 0x00, 0x7a, 0x00, 0x80, 0xb6, 0xae, 0xc4, 0x00, 0x81 },
+ { 0xf9, 0x00, 0x93, 0xba, 0xb3, 0xc5, 0x00, 0x69, 0x00, 0xb8, 0xb9,
+ 0xae, 0xc1, 0x00, 0x7f, 0x00, 0xb0, 0xb6, 0xae, 0xc3, 0x00, 0x85 },
+ { 0xf9, 0x00, 0x97, 0xba, 0xb2, 0xc5, 0x00, 0x6c, 0x00, 0xb8, 0xb8,
+ 0xae, 0xc1, 0x00, 0x82, 0x00, 0xb0, 0xb6, 0xae, 0xc2, 0x00, 0x89 },
+ { 0xf9, 0x00, 0x9a, 0xba, 0xb1, 0xc4, 0x00, 0x6f, 0x00, 0xb8, 0xb8,
+ 0xad, 0xc0, 0x00, 0x86, 0x00, 0xb0, 0xb7, 0xad, 0xc0, 0x00, 0x8d },
+ { 0xf9, 0x00, 0x9c, 0xb9, 0xb0, 0xc4, 0x00, 0x72, 0x00, 0xb8, 0xb8,
+ 0xac, 0xbf, 0x00, 0x8a, 0x00, 0xb0, 0xb6, 0xac, 0xc0, 0x00, 0x91 },
+ { 0xf9, 0x00, 0x9e, 0xba, 0xb0, 0xc2, 0x00, 0x75, 0x00, 0xb9, 0xb8,
+ 0xab, 0xbe, 0x00, 0x8e, 0x00, 0xb0, 0xb6, 0xac, 0xbf, 0x00, 0x94 },
+ { 0xf9, 0x00, 0xa0, 0xb9, 0xaf, 0xc3, 0x0
Re: [PATCH] clocksource: exynos_mct: Fix stall after CPU hotplugging
On Tue, 2014-03-25 at 12:32 +0100, Tomasz Figa wrote:
> Hi Krzysztof,
>
> Two comments inline.
>
> On 25.03.2014 11:41, Krzysztof Kozlowski wrote:
>
> [snip]
>
> > diff --git a/drivers/clocksource/exynos_mct.c
> > b/drivers/clocksource/exynos_mct.c
> > index 48f76bc05da0..0b49b09dd1a9 100644
> > --- a/drivers/clocksource/exynos_mct.c
> > +++ b/drivers/clocksource/exynos_mct.c
> > @@ -339,7 +339,14 @@ static void exynos4_mct_tick_start(unsigned long
> > cycles,
> > static int exynos4_tick_set_next_event(unsigned long cycles,
> >struct clock_event_device *evt)
> > {
> > - struct mct_clock_event_device *mevt = this_cpu_ptr(&percpu_mct_tick);
> > + /*
> > +* In case of hotplugging non-boot CPU, the set_next_event could be
> > +* called on CPU0 by ISR before IRQ affinity is set to proper CPU.
>
> Hmm, is this a desired behavior? I guess this is a question for Thomas
> and Daniel.
>
> > +* Thus for accessing proper MCT Lx timer, 'per_cpu' for cpumask
> > +* in event must be used instead of 'this_cpu_ptr'.
> > +*/
> > + struct mct_clock_event_device *mevt = &per_cpu(percpu_mct_tick,
> > + cpumask_first(evt->cpumask));
> >
> > exynos4_mct_tick_start(cycles, mevt);
> >
> > @@ -371,23 +378,13 @@ static inline void exynos4_tick_set_mode(enum
> > clock_event_mode mode,
> >
> > static int exynos4_mct_tick_clear(struct mct_clock_event_device *mevt)
> > {
> > - struct clock_event_device *evt = &mevt->evt;
> > -
> > - /*
> > -* This is for supporting oneshot mode.
> > -* Mct would generate interrupt periodically
> > -* without explicit stopping.
> > -*/
> > - if (evt->mode != CLOCK_EVT_MODE_PERIODIC)
> > - exynos4_mct_tick_stop(mevt);
> > -
> > /* Clear the MCT tick interrupt */
> > if (__raw_readl(reg_base + mevt->base + MCT_L_INT_CSTAT_OFFSET) & 1) {
> > exynos4_mct_write(0x1, mevt->base + MCT_L_INT_CSTAT_OFFSET);
> > return 1;
> > - } else {
> > - return 0;
> > }
> > +
> > + return 0;
>
> Nobody seems to be checking return value of this function (and I don't
> see what it could be used for anyway), so I guess it could be simply
> made void.
I'll send a another patch for it.
Best regards,
Krzysztof
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[PATCH 3/3] ARM: dts: exynos4210-universal_c210: add proper panel node
This patch replaces panel bindings for panel initialized by boot loader
with bindings to proper ld9040 panel.
Signed-off-by: Andrzej Hajda
---
arch/arm/boot/dts/exynos4210-universal_c210.dts | 71 +++--
1 file changed, 54 insertions(+), 17 deletions(-)
diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts
b/arch/arm/boot/dts/exynos4210-universal_c210.dts
index 477208d..0a80a72 100644
--- a/arch/arm/boot/dts/exynos4210-universal_c210.dts
+++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts
@@ -225,7 +225,6 @@
regulator-name = "VLCD+VMIPI_1.8V";
regulator-min-microvolt = <180>;
regulator-max-microvolt = <180>;
- regulator-always-on;
};
ldo8_reg: LDO8 {
@@ -289,7 +288,6 @@
regulator-name = "VCC_3.0V_LCD";
regulator-min-microvolt = <300>;
regulator-max-microvolt = <300>;
- regulator-always-on;
};
buck1_reg: BUCK1 {
@@ -347,27 +345,66 @@
};
};
+ spi-lcd {
+ compatible = "spi-gpio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ gpio-sck = <&gpy3 1 0>;
+ gpio-mosi = <&gpy3 3 0>;
+ num-chipselects = <1>;
+ cs-gpios = <&gpy4 3 0>;
+
+ lcd@0 {
+ compatible = "samsung,ld9040";
+ reg = <0>;
+ vdd3-supply = <&ldo7_reg>;
+ vci-supply = <&ldo17_reg>;
+ reset-gpios = <&gpy4 5 0>;
+ spi-max-frequency = <120>;
+ spi-cpol;
+ spi-cpha;
+ power-on-delay = <10>;
+ reset-delay = <10>;
+ panel-width-mm = <90>;
+ panel-height-mm = <154>;
+ display-timings {
+ timing {
+ clock-frequency = <23492370>;
+ hactive = <480>;
+ vactive = <800>;
+ hback-porch = <16>;
+ hfront-porch = <16>;
+ vback-porch = <2>;
+ vfront-porch = <28>;
+ hsync-len = <2>;
+ vsync-len = <1>;
+ hsync-active = <0>;
+ vsync-active = <0>;
+ de-active = <0>;
+ pixelclk-active = <0>;
+ };
+ };
+ port {
+ lcd_ep: endpoint {
+ remote-endpoint = <&fimd_dpi_ep>;
+ };
+ };
+ };
+ };
+
fimd: fimd@11c0 {
pinctrl-0 = <&lcd_clk>, <&lcd_data24>;
pinctrl-names = "default";
status = "okay";
samsung,invert-vden;
samsung,invert-vclk;
- display-timings {
- timing {
- clock-frequency = <23492370>;
- hactive = <480>;
- vactive = <800>;
- hback-porch = <16>;
- hfront-porch = <16>;
- vback-porch = <2>;
- vfront-porch = <28>;
- hsync-len = <2>;
- vsync-len = <1>;
- hsync-active = <0>;
- vsync-active = <0>;
- de-active = <0>;
- pixelclk-active = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port@3 {
+ reg = <3>;
+ fimd_dpi_ep: endpoint {
+ remote-endpoint = <&lcd_ep>;
};
};
};
--
1.8.3.2
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[PATCH 0/3] DRM: Add LD9040 panel support
Hi, This patchset adds LD9040 panel support with DT bindings. It also adds support for this panel to Exynos4210-universal_c210 board. Regards Andrzej Andrzej Hajda (3): panel/ld9040: add DT bindings drm/panel: add ld9040 driver ARM: dts: exynos4210-universal_c210: add proper panel node .../devicetree/bindings/panel/samsung,ld9040.txt | 66 arch/arm/boot/dts/exynos4210-universal_c210.dts| 71 +++- drivers/gpu/drm/panel/Kconfig | 6 + drivers/gpu/drm/panel/Makefile | 1 + drivers/gpu/drm/panel/panel-ld9040.c | 377 + 5 files changed, 504 insertions(+), 17 deletions(-) create mode 100644 Documentation/devicetree/bindings/panel/samsung,ld9040.txt create mode 100644 drivers/gpu/drm/panel/panel-ld9040.c -- 1.8.3.2 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 2/3] drm/panel: add ld9040 driver
The patch adds LD9040 parallel RGB panel driver with SPI control interface.
The driver uses drm_panel framework.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/panel/Kconfig| 6 +
drivers/gpu/drm/panel/Makefile | 1 +
drivers/gpu/drm/panel/panel-ld9040.c | 377 +++
3 files changed, 384 insertions(+)
create mode 100644 drivers/gpu/drm/panel/panel-ld9040.c
diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index 3e0f13d..94cc0c7 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -16,4 +16,10 @@ config DRM_PANEL_SIMPLE
that it can be automatically turned off when the panel goes into a
low power state.
+config DRM_PANEL_LD9040
+ tristate "LD9040 RGB/SPI panel"
+ depends on DRM && DRM_PANEL
+ depends on OF
+ select VIDEOMODE_HELPERS
+
endmenu
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index af9dfa2..4f7dfce 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -1 +1,2 @@
obj-$(CONFIG_DRM_PANEL_SIMPLE) += panel-simple.o
+obj-$(CONFIG_DRM_PANEL_LD9040) += panel-ld9040.o
diff --git a/drivers/gpu/drm/panel/panel-ld9040.c
b/drivers/gpu/drm/panel/panel-ld9040.c
new file mode 100644
index 000..b278677
--- /dev/null
+++ b/drivers/gpu/drm/panel/panel-ld9040.c
@@ -0,0 +1,377 @@
+/*
+ * ld9040 AMOLED LCD drm_panel driver.
+ *
+ * Copyright (c) 2014 Samsung Electronics Co., Ltd
+ * Derived from drivers/video/backlight/ld9040.c
+ *
+ * Andrzej Hajda
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include
+#include
+#include
+
+#include
+#include
+#include
+
+#include
+#include
+#include
+
+/* Manufacturer Command Set */
+#define MCS_MANPWR 0xb0
+#define MCS_ELVSS_ON 0xb1
+#define MCS_USER_SETTING 0xf0
+#define MCS_DISPCTL0xf2
+#define MCS_GTCON 0xf7
+#define MCS_PANEL_CONDITION0xf8
+#define MCS_GAMMA_SET1 0xf9
+#define MCS_GAMMA_CTRL 0xfb
+
+/* array of gamma tables for gamma value 2.2 */
+static u8 const ld9040_gammas[25][22] = {
+ { 0xf9, 0x00, 0x13, 0xb2, 0xba, 0xd2, 0x00, 0x30, 0x00, 0xaf, 0xc0,
+ 0xb8, 0xcd, 0x00, 0x3d, 0x00, 0xa8, 0xb8, 0xb7, 0xcd, 0x00, 0x44 },
+ { 0xf9, 0x00, 0x13, 0xb9, 0xb9, 0xd0, 0x00, 0x3c, 0x00, 0xaf, 0xbf,
+ 0xb6, 0xcb, 0x00, 0x4b, 0x00, 0xa8, 0xb9, 0xb5, 0xcc, 0x00, 0x52 },
+ { 0xf9, 0x00, 0x13, 0xba, 0xb9, 0xcd, 0x00, 0x41, 0x00, 0xb0, 0xbe,
+ 0xb5, 0xc9, 0x00, 0x51, 0x00, 0xa9, 0xb9, 0xb5, 0xca, 0x00, 0x57 },
+ { 0xf9, 0x00, 0x13, 0xb9, 0xb8, 0xcd, 0x00, 0x46, 0x00, 0xb1, 0xbc,
+ 0xb5, 0xc8, 0x00, 0x56, 0x00, 0xaa, 0xb8, 0xb4, 0xc9, 0x00, 0x5d },
+ { 0xf9, 0x00, 0x13, 0xba, 0xb8, 0xcb, 0x00, 0x4b, 0x00, 0xb3, 0xbc,
+ 0xb4, 0xc7, 0x00, 0x5c, 0x00, 0xac, 0xb8, 0xb4, 0xc8, 0x00, 0x62 },
+ { 0xf9, 0x00, 0x13, 0xbb, 0xb7, 0xca, 0x00, 0x4f, 0x00, 0xb4, 0xbb,
+ 0xb3, 0xc7, 0x00, 0x60, 0x00, 0xad, 0xb8, 0xb4, 0xc7, 0x00, 0x67 },
+ { 0xf9, 0x00, 0x47, 0xba, 0xb6, 0xca, 0x00, 0x53, 0x00, 0xb5, 0xbb,
+ 0xb3, 0xc6, 0x00, 0x65, 0x00, 0xae, 0xb8, 0xb3, 0xc7, 0x00, 0x6c },
+ { 0xf9, 0x00, 0x71, 0xbb, 0xb5, 0xc8, 0x00, 0x57, 0x00, 0xb5, 0xbb,
+ 0xb0, 0xc5, 0x00, 0x6a, 0x00, 0xae, 0xb9, 0xb1, 0xc6, 0x00, 0x70 },
+ { 0xf9, 0x00, 0x7b, 0xbb, 0xb4, 0xc8, 0x00, 0x5b, 0x00, 0xb5, 0xba,
+ 0xb1, 0xc4, 0x00, 0x6e, 0x00, 0xae, 0xb9, 0xb0, 0xc5, 0x00, 0x75 },
+ { 0xf9, 0x00, 0x82, 0xba, 0xb4, 0xc7, 0x00, 0x5f, 0x00, 0xb5, 0xba,
+ 0xb0, 0xc3, 0x00, 0x72, 0x00, 0xae, 0xb8, 0xb0, 0xc3, 0x00, 0x7a },
+ { 0xf9, 0x00, 0x89, 0xba, 0xb3, 0xc8, 0x00, 0x62, 0x00, 0xb6, 0xba,
+ 0xaf, 0xc3, 0x00, 0x76, 0x00, 0xaf, 0xb7, 0xae, 0xc4, 0x00, 0x7e },
+ { 0xf9, 0x00, 0x8b, 0xb9, 0xb3, 0xc7, 0x00, 0x65, 0x00, 0xb7, 0xb8,
+ 0xaf, 0xc3, 0x00, 0x7a, 0x00, 0x80, 0xb6, 0xae, 0xc4, 0x00, 0x81 },
+ { 0xf9, 0x00, 0x93, 0xba, 0xb3, 0xc5, 0x00, 0x69, 0x00, 0xb8, 0xb9,
+ 0xae, 0xc1, 0x00, 0x7f, 0x00, 0xb0, 0xb6, 0xae, 0xc3, 0x00, 0x85 },
+ { 0xf9, 0x00, 0x97, 0xba, 0xb2, 0xc5, 0x00, 0x6c, 0x00, 0xb8, 0xb8,
+ 0xae, 0xc1, 0x00, 0x82, 0x00, 0xb0, 0xb6, 0xae, 0xc2, 0x00, 0x89 },
+ { 0xf9, 0x00, 0x9a, 0xba, 0xb1, 0xc4, 0x00, 0x6f, 0x00, 0xb8, 0xb8,
+ 0xad, 0xc0, 0x00, 0x86, 0x00, 0xb0, 0xb7, 0xad, 0xc0, 0x00, 0x8d },
+ { 0xf9, 0x00, 0x9c, 0xb9, 0xb0, 0xc4, 0x00, 0x72, 0x00, 0xb8, 0xb8,
+ 0xac, 0xbf, 0x00, 0x8a, 0x00, 0xb0, 0xb6, 0xac, 0xc0, 0x00, 0x91 },
+ { 0xf9, 0x00, 0x9e, 0xba, 0xb0, 0xc2, 0x00, 0x75, 0x00, 0xb9, 0xb8,
+ 0xab, 0xbe, 0x00, 0x8e, 0x00, 0xb0, 0xb6, 0xac, 0xbf, 0x00, 0x94 },
+ { 0xf9, 0x00, 0xa0, 0xb9, 0xaf, 0xc3, 0x00, 0x77, 0x00, 0xb9,
[PATCH 1/3] panel/ld9040: add DT bindings
The patch adds bindings for ld9040 panel.
Bindings describe panel resources, boot delays,
display timings and physical size.
Signed-off-by: Andrzej Hajda
---
.../devicetree/bindings/panel/samsung,ld9040.txt | 66 ++
1 file changed, 66 insertions(+)
create mode 100644 Documentation/devicetree/bindings/panel/samsung,ld9040.txt
diff --git a/Documentation/devicetree/bindings/panel/samsung,ld9040.txt
b/Documentation/devicetree/bindings/panel/samsung,ld9040.txt
new file mode 100644
index 000..07c36c3
--- /dev/null
+++ b/Documentation/devicetree/bindings/panel/samsung,ld9040.txt
@@ -0,0 +1,66 @@
+Samsung LD9040 AMOLED LCD parallel RGB panel with SPI control bus
+
+Required properties:
+ - compatible: "samsung,ld9040"
+ - reg: address of the panel on SPI bus
+ - vdd3-supply: core voltage supply
+ - vci-supply: voltage supply for analog circuits
+ - reset-gpios: a GPIO spec for the reset pin
+ - display-timings: timings for the connected panel according to [1]
+
+The panel must obey rules for SPI slave device specified in document [2].
+
+Optional properties:
+ - power-on-delay: delay after turning regulators on [ms]
+ - reset-delay: delay after reset sequence [ms]
+ - panel-width-mm: physical panel width [mm]
+ - panel-height-mm: physical panel height [mm]
+
+The device node can contain one 'port' child node with one child
+'endpoint' node, according to the bindings defined in [3]. This
+node should describe panel's video bus.
+
+[1]: Documentation/devicetree/bindings/video/display-timing.txt
+[2]: Documentation/devicetree/bindings/spi/spi-bus.txt
+[3]: Documentation/devicetree/bindings/media/video-interfaces.txt
+
+Example:
+
+ lcd@0 {
+ compatible = "samsung,ld9040";
+ reg = <0>;
+ vdd3-supply = <&ldo7_reg>;
+ vci-supply = <&ldo17_reg>;
+ reset-gpios = <&gpy4 5 0>;
+ spi-max-frequency = <120>;
+ spi-cpol;
+ spi-cpha;
+ power-on-delay = <10>;
+ reset-delay = <10>;
+ panel-width-mm = <90>;
+ panel-height-mm = <154>;
+
+ display-timings {
+ timing {
+ clock-frequency = <23492370>;
+ hactive = <480>;
+ vactive = <800>;
+ hback-porch = <16>;
+ hfront-porch = <16>;
+ vback-porch = <2>;
+ vfront-porch = <28>;
+ hsync-len = <2>;
+ vsync-len = <1>;
+ hsync-active = <0>;
+ vsync-active = <0>;
+ de-active = <0>;
+ pixelclk-active = <0>;
+ };
+ };
+
+ port {
+ lcd_ep: endpoint {
+ remote-endpoint = <&fimd_dpi_ep>;
+ };
+ };
+ };
--
1.8.3.2
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Re: [RESEND: RFC PATCH 3/3] pcie: keystone: add pcie driver based on designware core driver
On 25 March 2014 10:35, Thierry Reding wrote:
> On Tue, Mar 25, 2014 at 08:44:36AM +0100, Arnd Bergmann wrote:
>> On Monday 24 March 2014 20:35:26 Murali Karicheri wrote:
> [...]
>> > +/* Keystone PCIe driver does not allow module unload */
>> > +static int __init ks_pcie_init(void)
>> > +{
>> > + return platform_driver_probe(&ks_pcie_driver, ks_pcie_probe);
>> > +}
>> > +subsys_initcall(ks_pcie_init);
>>
>> Why subsys_initcall?
>>
>> We should probably try to fix unloading soon.
>
> I did some work on this a few months ago but never got around to
> cleaning up the patches. Let me see if I can resurrect that work.
I think there may be merit in these drivers using subsys_init. I've
not had time to investigate, but as far as I can remember this causes
issues with piceport.
For ARM32 host drivers, pci_fixup_irqs (arch/arm/kernel/bios32.c) must
be called before init_service_irqs (portdrv_core.c) otherwise pcieport
acts on invalid information in dev->irq and breaks. It seems that its
possible for the portbus driver to pick up new devices before bios32
has been able to fixup the irqs. Making the host bridge drivers subsys
will overcome this. I guess this hasn't been an issue in the past as
host bridge drivers were always in the arch/ directories.
In any case it may be worth testing this driver with PCIEPORTBUS enabled.
Andrew Murray
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Re: [PATCH] clocksource: exynos_mct: Fix stall after CPU hotplugging
Hi Krzysztof,
Two comments inline.
On 25.03.2014 11:41, Krzysztof Kozlowski wrote:
[snip]
diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c
index 48f76bc05da0..0b49b09dd1a9 100644
--- a/drivers/clocksource/exynos_mct.c
+++ b/drivers/clocksource/exynos_mct.c
@@ -339,7 +339,14 @@ static void exynos4_mct_tick_start(unsigned long cycles,
static int exynos4_tick_set_next_event(unsigned long cycles,
struct clock_event_device *evt)
{
- struct mct_clock_event_device *mevt = this_cpu_ptr(&percpu_mct_tick);
+ /*
+* In case of hotplugging non-boot CPU, the set_next_event could be
+* called on CPU0 by ISR before IRQ affinity is set to proper CPU.
Hmm, is this a desired behavior? I guess this is a question for Thomas
and Daniel.
+* Thus for accessing proper MCT Lx timer, 'per_cpu' for cpumask
+* in event must be used instead of 'this_cpu_ptr'.
+*/
+ struct mct_clock_event_device *mevt = &per_cpu(percpu_mct_tick,
+ cpumask_first(evt->cpumask));
exynos4_mct_tick_start(cycles, mevt);
@@ -371,23 +378,13 @@ static inline void exynos4_tick_set_mode(enum
clock_event_mode mode,
static int exynos4_mct_tick_clear(struct mct_clock_event_device *mevt)
{
- struct clock_event_device *evt = &mevt->evt;
-
- /*
-* This is for supporting oneshot mode.
-* Mct would generate interrupt periodically
-* without explicit stopping.
-*/
- if (evt->mode != CLOCK_EVT_MODE_PERIODIC)
- exynos4_mct_tick_stop(mevt);
-
/* Clear the MCT tick interrupt */
if (__raw_readl(reg_base + mevt->base + MCT_L_INT_CSTAT_OFFSET) & 1) {
exynos4_mct_write(0x1, mevt->base + MCT_L_INT_CSTAT_OFFSET);
return 1;
- } else {
- return 0;
}
+
+ return 0;
Nobody seems to be checking return value of this function (and I don't
see what it could be used for anyway), so I guess it could be simply
made void.
Best regards,
Tomasz
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[PATCH] clocksource: exynos_mct: Fix stall after CPU hotplugging
Fix stall after hotplugging CPU1. The stall was a result of starting the
CPU1 local timer not in L1 timer but in L0 (which is used by CPU0).
Trigger:
$ echo 0 > /sys/bus/cpu/devices/cpu1/online && echo 1 >
/sys/bus/cpu/devices/cpu1/online
Stall information:
[ 530.045259] INFO: rcu_preempt detected stalls on CPUs/tasks:
[ 530.045618] 1: (6 GPs behind) idle=6d0/0/0 softirq=369/369
[ 530.050987] (detected by 0, t=6589 jiffies, g=33, c=32, q=0)
[ 530.056721] Task dump for CPU 1:
[ 530.059928] swapper/1 R running 0 0 1 0x1000
[ 530.066377] [] (__schedule+0x414/0x9b4) from []
(rcu_idle_enter+0x18/0x38)
[ 530.074955] [] (rcu_idle_enter+0x18/0x38) from []
(cpu_startup_entry+0x60/0x3bc)
[ 530.084069] [] (cpu_startup_entry+0x60/0x3bc) from []
(secondary_start_kernel+0x164/0x1a0)
[ 530.094029] [] (secondary_start_kernel+0x164/0x1a0) from
[<40517244>] (0x40517244)
The timers for CPU1 were missed:
[ 591.668436] cpu: 1
[ 591.670430] clock 0:
[ 591.672691] .base: c0ab7750
[ 591.676160] .index: 0
[ 591.679025] .resolution: 1 nsecs
[ 591.682404] .get_time: ktime_get
[ 591.685970] .offset: 0 nsecs
[ 591.689349] active timers:
[ 591.692045] #0: , hrtimer_wakeup, S:01
[ 591.696759] # expires at 454687834257-454687884257 nsecs [in -136770537232
to -136770487232 nsecs]
And the event_handler for next event was wrong:
[ 591.917120] Tick Device: mode: 1
[ 591.920676] Per CPU device: 0
[ 591.923621] Clock Event Device: mct_tick0
[ 591.927623] max_delta_ns: 178956969027
[ 591.931613] min_delta_ns: 1249
[ 591.934913] mult: 51539608
[ 591.938557] shift: 32
[ 591.941681] mode: 3
[ 591.944724] next_event: 59502500 nsecs
[ 591.949227] set_next_event: exynos4_tick_set_next_event
[ 591.954522] set_mode: exynos4_tick_set_mode
[ 591.959296] event_handler: hrtimer_interrupt
[ 591.963730] retries:0
[ 591.966761]
[ 591.968245] Tick Device: mode: 0
[ 591.971801] Per CPU device: 1
[ 591.974746] Clock Event Device: mct_tick1
[ 591.978750] max_delta_ns: 178956969027
[ 591.982739] min_delta_ns: 1249
[ 591.986037] mult: 51539608
[ 591.989681] shift: 32
[ 591.992806] mode: 3
[ 591.995848] next_event: 45368500 nsecs
[ 592.000353] set_next_event: exynos4_tick_set_next_event
[ 592.005648] set_mode: exynos4_tick_set_mode
[ 592.010421] event_handler: tick_handle_periodic
[ 592.015115] retries:0
[ 592.018145]
After turning off the CPU1, the MCT L1 local timer was disabled but the
interrupt was not cleared. Turning on the CPU1 enabled the IRQ
with setup_irq() but, before setting affinity to CPU1, the pending L1 timer
interrupt was processed by CPU0 in exynos4_mct_tick_isr().
The ISR then called event handler which set up the next timer event for
current CPU (CPU0). Therefore the MCT L1 timer wasn't actually started.
Fix the stall by:
1. Setting next timer event not on current CPU but on the CPU indicated
by cpumask in 'clock_event_device'.
2. Clearing the timer interrupt upon stopping the local timer.
The patch also moves around the call to exynos4_mct_tick_stop() but this
is done only for the code readability as it is not essential for the fix.
Signed-off-by: Krzysztof Kozlowski
---
drivers/clocksource/exynos_mct.c | 33 -
1 file changed, 20 insertions(+), 13 deletions(-)
diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c
index 48f76bc05da0..0b49b09dd1a9 100644
--- a/drivers/clocksource/exynos_mct.c
+++ b/drivers/clocksource/exynos_mct.c
@@ -339,7 +339,14 @@ static void exynos4_mct_tick_start(unsigned long cycles,
static int exynos4_tick_set_next_event(unsigned long cycles,
struct clock_event_device *evt)
{
- struct mct_clock_event_device *mevt = this_cpu_ptr(&percpu_mct_tick);
+ /*
+* In case of hotplugging non-boot CPU, the set_next_event could be
+* called on CPU0 by ISR before IRQ affinity is set to proper CPU.
+* Thus for accessing proper MCT Lx timer, 'per_cpu' for cpumask
+* in event must be used instead of 'this_cpu_ptr'.
+*/
+ struct mct_clock_event_device *mevt = &per_cpu(percpu_mct_tick,
+ cpumask_first(evt->cpumask));
exynos4_mct_tick_start(cycles, mevt);
@@ -371,23 +378,13 @@ static inline void exynos4_tick_set_mode(enum
clock_event_mode mode,
static int exynos4_mct_tick_clear(struct mct_clock_event_device *mevt)
{
- struct clock_event_device *evt = &mevt->evt;
-
- /*
-* This is for supporting oneshot mode.
-* Mct would generate interrupt periodically
-* without explicit stopping.
-*/
- if (evt->mode != CLOCK_EVT_MODE_PERIODIC)
- exynos4_mct_tick_stop(mevt);
-
/* Clear the MCT tick interrupt */
if (__raw_read
Re: [RESEND: RFC PATCH 3/3] pcie: keystone: add pcie driver based on designware core driver
On Tue, Mar 25, 2014 at 08:44:36AM +0100, Arnd Bergmann wrote:
> On Monday 24 March 2014 20:35:26 Murali Karicheri wrote:
[...]
> > +/* Keystone PCIe driver does not allow module unload */
> > +static int __init ks_pcie_init(void)
> > +{
> > + return platform_driver_probe(&ks_pcie_driver, ks_pcie_probe);
> > +}
> > +subsys_initcall(ks_pcie_init);
>
> Why subsys_initcall?
>
> We should probably try to fix unloading soon.
I did some work on this a few months ago but never got around to
cleaning up the patches. Let me see if I can resurrect that work.
Thierry
pgpi7xZnYmh8s.pgp
Description: PGP signature
Re: [PATCH V12 6/7] net: sxgbe: add ethtool related functions support
From: Vipul Pandya
--
> Sorry I didn't look over this earlier.
>
> On Sat, 2014-03-22 at 21:04 -0700, Byungho An wrote:
> [...]
> > --- a/drivers/net/ethernet/samsung/sxgbe/sxgbe_common.h
> > +++ b/drivers/net/ethernet/samsung/sxgbe/sxgbe_common.h
> > @@ -42,8 +42,12 @@ struct sxgbe_mtl_ops;
> > #define SXGBE_RX_QUEUES 16
> >
> > /* Max/Min RI Watchdog Timer count value */
> > -#define SXGBE_MAX_DMA_RIWT 0xff
> > -#define SXGBE_MIN_DMA_RIWT 0x20
> > +/* Calculated based how much time does it take to fill 256KB Rx memory
> > + * at 10Gb speed at 156MHz clock rate and considered little less then
> > + * the actual value.
> > + */
> > +#define SXGBE_MAX_DMA_RIWT 0x70
> > +#define SXGBE_MIN_DMA_RIWT 0x01
>
> This change should be folded into patch 2/7.
Ok.
> [...]
> > --- a/drivers/net/ethernet/samsung/sxgbe/sxgbe_ethtool.c
> > +++ b/drivers/net/ethernet/samsung/sxgbe/sxgbe_ethtool.c
> [...]
> > -static int sxgbe_ethtool_get_eee(struct net_device *dev,
> > -struct ethtool_eee *edata)
> > +static int sxgbe_get_eee(struct net_device *dev,
> > +struct ethtool_eee *edata)
> > {
> > struct sxgbe_priv_data *priv = netdev_priv(dev);
> >
> > @@ -55,8 +150,8 @@ static int sxgbe_ethtool_get_eee(struct net_device *dev,
> > return phy_ethtool_get_eee(priv->phydev, edata);
> > }
> >
> > -static int sxgbe_ethtool_set_eee(struct net_device *dev,
> > -struct ethtool_eee *edata)
> > +static int sxgbe_set_eee(struct net_device *dev,
> > +struct ethtool_eee *edata)
> > {
> > struct sxgbe_priv_data *priv = netdev_priv(dev);
> >
>
> These name changes should be folded into patch 2/7.
Ok.
> [...]
> > +static int sxgbe_getsettings(struct net_device *dev,
> > +struct ethtool_cmd *cmd)
> > +{
> > + struct sxgbe_priv_data *priv = netdev_priv(dev);
> > +
> > + if (priv->phydev)
> > + return phy_ethtool_gset(priv->phydev, cmd);
> > +
> > + return -ENODEV;
> > +}
> > +
> > +static int sxgbe_setsettings(struct net_device *dev, struct ethtool_cmd
> > *cmd)
> > +{
> > + struct sxgbe_priv_data *priv = netdev_priv(dev);
> > +
> > + if (priv->phydev)
> > + return phy_ethtool_sset(priv->phydev, cmd);
> > +
> > + return -ENODEV;
> > +}
>
> I think these two operations should return -EOPNOTSUPP if there is no
> PHY.
Ok.
> [...]
> > +static int sxgbe_get_ts_info(struct net_device *dev,
> > +struct ethtool_ts_info *info)
> > +{
> > + struct sxgbe_priv_data *priv = netdev_priv(dev);
> > +
> > + if (!priv->hw_cap.atime_stamp)
> > + return ethtool_op_get_ts_info(dev, info);
> > +
> > + info->so_timestamping = (SOF_TIMESTAMPING_TX_SOFTWARE |
> > +SOF_TIMESTAMPING_RX_SOFTWARE |
> > +SOF_TIMESTAMPING_SOFTWARE |
> > +SOF_TIMESTAMPING_TX_HARDWARE |
> > +SOF_TIMESTAMPING_RX_HARDWARE |
> > +SOF_TIMESTAMPING_RAW_HARDWARE);
> > +
> > + if (priv->ptp_clock)
> > + info->phc_index = ptp_clock_index(priv->ptp_clock);
>
> priv->ptp_clock doesn't appear to be set anywhere; nor does the driver
> implement SIOCSHWTSTAMP. So this function should not advertise any
> hardware timestamping features yet.
We already have in our plan to implement above things. However we will remove
this feature from this submission. We will submit this later along with other
required implementations.
> > + info->tx_types = ((1 << HWTSTAMP_TX_OFF) |
> > + (1 << HWTSTAMP_TX_ON) |
> > + (1 << HWTSTAMP_TX_ONESTEP_SYNC));
> > +
> > + info->rx_filters = ((1 << HWTSTAMP_FILTER_NONE) |
> > + (1 << HWTSTAMP_FILTER_PTP_V1_L4_EVENT) |
> > + (1 << HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
> > + (1 << HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
> > + (1 << HWTSTAMP_FILTER_PTP_V2_L4_EVENT) |
> > + (1 << HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |
> > + (1 << HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ) |
> > + (1 << HWTSTAMP_FILTER_PTP_V2_L2_EVENT) |
> > + (1 << HWTSTAMP_FILTER_PTP_V2_L2_SYNC) |
> > + (1 << HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ) |
> > + (1 << HWTSTAMP_FILTER_PTP_V2_EVENT) |
> > + (1 << HWTSTAMP_FILTER_PTP_V2_SYNC) |
> > + (1 << HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) |
> > + (1 << HWTSTAMP_FILTER_ALL));
> > + return 0;
> > +}
> > +
> > +int sxgbe_set_flow_ctrl(struct sxgbe_priv_data *priv, int rx, int tx)
> > +{
> > + return 0;
> > +}
> > +
> > +static void sxgbe_get_pauseparam(struct net_device *netdev,
> > +struct ethtool_pauseparam *pause)
> > +{
> > + struct sxgbe_priv_data *priv = netdev_priv
Re: [RESEND: RFC PATCH 3/3] pcie: keystone: add pcie driver based on designware core driver
On Monday 24 March 2014 20:35:26 Murali Karicheri wrote:
> +
> +int k2_pcie_platform_setup(struct platform_device *pdev)
> +{
> + struct resource *phy_base_r, *devstat_r;
> + void __iomem *phy_base, *devstat;
> + u32 val;
> + int i;
> +
> + devstat_r = platform_get_resource_byname(pdev, IORESOURCE_MEM,
> + "reg_devcfg");
> + if (!devstat_r)
> + return -ENODEV;
It seems you have a distinct register set for the PHY that you are
driving here. Why not make this part generic PHY API driver?
> +static int ks_pcie_establish_link(struct keystone_pcie *ks_pcie)
> +{
> + struct pcie_port *pp = &ks_pcie->pp;
> + int count = 0;
> +
> + dw_pcie_setup_rc(pp);
> +
> + /* check if the link is up or not */
> + while (!dw_pcie_link_up(pp)) {
> + mdelay(100);
> + count++;
> + if (count == 10)
> + return -EINVAL;
> + }
> + return 0;
> +}
You are blocking the CPU for up to one second here, which is really
nasty. Please find a way to move the code into a context where you
can sleep and use msleep() instead, or better use an interrupt if the
hardware supports that and use wait_for_completion().
> +
> +static void ks_pcie_msi_irq_handler(unsigned int irq, struct irq_desc *desc)
> +{
> + struct keystone_pcie *ks_pcie = irq_desc_get_handler_data(desc);
> + u32 offset = irq - ks_pcie->msi_host_irqs[0], pending, vector;
> + struct pcie_port *pp = &ks_pcie->pp;
> + struct irq_chip *chip = irq_desc_get_chip(desc);
> + int src, virq;
Did I understand this right that the MSI implementation can be used
by any dw-pcie hardware of the same version? If so, it would be good
to move it into an extra file so it can be shared with the next host
driver that uses this version.
> +/**
> + * ks_pcie_set_outbound_trans() - Set PHYADDR <-> BUSADDR
> + * mapping for outbound
> + */
> +static void ks_pcie_set_outbound_trans(struct keystone_pcie *ks_pcie)
> +static void ks_pcie_set_inbound_trans(struct pcie_port *pp)
Why do you need to set this up from the kernel? Please move the
translation window setup into the boot loader if you can.
> +static struct hw_pci keystone_pcie_hw = {
> + .nr_controllers = 1,
> + .setup = dw_pcie_setup,
> + .scan = ks_pcie_scan_bus,
> + .swizzle= pci_common_swizzle,
> + .add_bus= dw_pcie_add_bus,
> + .map_irq= ks_pcie_map_irq,
> +};
This can just be a local variable in the probe function.
> +
> +static int ks_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
> +{
> + struct pcie_port *pp = sys_to_pcie(dev->bus->sysdata);
> + struct keystone_pcie *ks_pcie = to_keystone_pcie(pp);
> +
> + dev_info(pp->dev, "ks_pcie_map_irq: pin %d\n", pin);
> +
> + if (!pin || pin > ks_pcie->num_legacy_host_irqs) {
> + dev_err(pp->dev, "pci irq pin out of range\n");
> + return -1;
> + }
> +
> + /* pin has values from 1-4 */
> + return (ks_pcie->virqs[pin - 1] >= 0) ?
> + ks_pcie->virqs[pin - 1] : -1;
> +}
> +
> +
> +static void ack_irq(struct irq_data *d)
> +{
> +}
> +
> +static void mask_irq(struct irq_data *d)
> +{
> +}
> +
> +static void unmask_irq(struct irq_data *d)
> +{
> +}
> +
> +static struct irq_chip ks_pcie_legacy_irq_chip = {
> + .name = "PCIe-LEGACY-IRQ",
> + .irq_ack = ack_irq,
> + .irq_mask = mask_irq,
> + .irq_unmask = unmask_irq,
> +};
Can you use the generic irqchip code here?
> + /*
> + * support upto MAX_LEGACY_HOST_IRQS host and legacy IRQs.
> + * In dt from index 0 to 3
> + */
> + for (i = 0; i < MAX_LEGACY_HOST_IRQS; i++) {
> + ks_pcie->legacy_host_irqs[i] = irq_of_parse_and_map(np, i);
> + if (ks_pcie->legacy_host_irqs[i] < 0)
> + break;
> + ks_pcie->num_legacy_host_irqs++;
> + }
> +
> + if (ks_pcie->num_legacy_host_irqs) {
> + ks_pcie->legacy_irqd = irq_domain_add_linear(np,
> + ks_pcie->num_legacy_host_irqs,
> + &irq_domain_simple_ops, NULL);
> +
> + if (!ks_pcie->legacy_irqd) {
> + dev_err(dev,
> + "Failed to add irq domain for legacy irqs\n");
> + return -EINVAL;
> + }
> + }
> +
> + for (i = 0; i < ks_pcie->num_legacy_host_irqs; i++) {
> + ks_pcie->virqs[i] =
> + irq_create_mapping(ks_pcie->legacy_irqd, i);
> + irq_set_chip_and_handler(ks_pcie->virqs[i],
> + &ks_pcie_legacy_irq_chip, handle_level_irq);
> + irq_set_chip_data(ks_pcie->virqs[i], ks_pcie);
> + set_irq_flags(ks_pcie->virqs[i], IRQF_VALID);
> +
> + if (ks_pcie->legacy_host_irqs[i] >= 0) {
> + irq_set_handler_data(ks_pcie->legac
Re: [PATCH V13 2/7] net: sxgbe: add basic framework for Samsung 10Gb ethernet driver
Byungho An :
[...]
> How about below ?
The for loops should be unrolled.
(style: no need to join before branching)
I must go to work, so you'll have to fill the dots in the code below:
priv = sxgbe_drv_probe(&(pdev->dev), plat_dat, addr);
if (!priv) {
pr_err("%s: main driver probe failed\n", __func__);
goto err_something;
}
/* Get the SXGBE common INT information */
priv->irq = irq_of_parse_and_map(node, 0);
if (priv->irq <= 0) {
dev_err(dev, "sxgbe common irq parsing failed\n");
goto err_drv_remove;
}
/* Get the TX/RX IRQ numbers */
for (i = 0, chan = 1; i < SXGBE_TX_QUEUES; i++) {
priv->txq[i]->irq_no = irq_of_parse_and_map(node, chan++);
if (priv->txq[i]->irq_no <= 0) {
dev_err(dev, "sxgbe tx irq parsing failed\n");
goto err_tx_irq_unmap;
}
}
for (i = 0; i < SXGBE_RX_QUEUES; i++) {
priv->rxq[i]->irq_no = irq_of_parse_and_map(node, chan++);
if (priv->rxq[i]->irq_no <= 0) {
dev_err(dev, "sxgbe rx irq parsing failed\n");
goto err_rx_irq_unmap;
}
}
platform_set_drvdata(pdev, priv->dev);
pr_debug("platform driver registration completed\n");
return 0;
err_rx_irq_unmap:
/* TODO: check that 'i' isn't unsigned. */
while (i--)
irq_dispose_mapping(priv->rx[i]->irq_no);
i = SXGBE_TX_QUEUES;
err_tx_irq_unmap:
while (i--)
irq_dispose_mapping(priv->tx[i]->irq_no);
irq_dispose_mapping(priv->irq);
err_drv_remove:
sxgbe_drv_remove(ndev);
err_something:
...
--
Ueimor
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