Re: [PATCH v2 0/4] Add Exynos4412 based Odroid X2 and U2/U3/U3+ support
Hello, On 2014-06-25 15:26, Marek Szyprowski wrote: Hello, This is the second version of the initial patch series adding support for Exynos 4412 based Odroid X2 and U2/U3/U3+ boards and improving support for Odroid X. Complete USB support for Odroid U2/U3/U3+ still requires some fixes in Exynos4 USB2 Phy driver and clock driver for CLKOUT: http://thread.gmane.org/gmane.linux.kernel/1731843/ http://www.spinics.net/lists/linux-usb/msg109587.html The above changes however don't affect Odroid DTS files, but without them, usb3503 hub is not yet functional. Support for audio codec will be posted separately by Sylwester Nawrocki soon. Support for HDMI video output will be also posted separately together with the required ExynosDRM-HDMI fixes. If one is interested in more complete and open-source Odroid board support, there are also patches for u-boot project: http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/188295/focus=188610 Just to let everyone knows - updated Odroid patches for uboot has been posted in the following thread: http://www.mail-archive.com/u-boot@lists.denx.de/msg141234.html You can also download them here: http://patchwork.ozlabs.org/project/uboot/list/?submitter=23519 Best regards -- Marek Szyprowski, PhD Samsung R&D Institute Poland -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH V3 1/7] drm/exynos: Support DP CLKCON register in FIMD driver
On 06/30/2014 03:14 AM, Jingoo Han wrote:
> On Friday, June 27, 2014 10:03 PM, Ajay kumar wrote:
>> On Fri, Jun 27, 2014 at 6:14 PM, Andrzej Hajda wrote:
>>> On 06/27/2014 01:48 PM, Ajay kumar wrote:
On Fri, Jun 27, 2014 at 4:52 PM, Andrzej Hajda wrote:
> +CC DT
>
> On 06/27/2014 12:12 PM, Ajay Kumar wrote:
>> Add the missing setting for DP CLKCON register.
>>
>> This register is present on Exynos5 based FIMD controllers,
>> and needs to be set if we are using DP.
>>
>> Signed-off-by: Ajay Kumar
>> ---
>> .../devicetree/bindings/video/samsung-fimd.txt |1 +
>> drivers/gpu/drm/exynos/exynos_drm_fimd.c | 23
>>
>> include/video/samsung_fimd.h |4
>> 3 files changed, 28 insertions(+)
> [.]
>
>> static const struct of_device_id fimd_driver_dt_match[] = {
>> @@ -331,6 +341,10 @@ static void fimd_commit(struct exynos_drm_manager
>> *mgr)
>> if (clkdiv > 1)
>> val |= VIDCON0_CLKVAL_F(clkdiv - 1) | VIDCON0_CLKDIR;
>>
>> + if (ctx->driver_data->has_dp_clkcon &&
>> + ctx->exynos_fimd_output_type == EXYNOS_FIMD_OUTPUT_DP)
>> + writel(DP_CLK_ENABLE, ctx->regs + DP_CLKCON);
>> +
>> writel(val, ctx->regs + VIDCON0);
>>> New code should not split VIDCON0 related code.It should be moved few
>>> lines above or few lines below.
>> Ok, for better readability.
>>
>>> Anyway this code should be rather placed in power related functions of
>>> dp encoder, as it enables dp. The only question
>>> is if DP_CLKCON update can be performed after VIDCON0 update. If yes the
>>> solution of the whole problem
>> I will check this.
>>
>>> seems to be simple:
>>> - fimd should provide function fimd_set_dp_clk_gate or sth similar,
>>> - this function should be called in exynos_dp_poweron/exynos_dp_poweroff.
>>> I hope I have not missed anything this time.
>> But, it won't look good to export a FIMD function which sets a FIMD register,
>> and call it in DP driver!
>> What does Inki/Jingoo have to say about this?
> I agree with Ajay Kumar's opinion.
> It doesn't look good to export the function to set FIMD register
> and call it by DP driver.
DP_CLKCON HW register shows clearly there is direct hardware dependency
between DP and FIMD.
Reflecting this dependency in drivers is just a consequence of HW design.
Moreover the register gates also clock for MDNIE, this solution can be
used there as well.
Anyway the most important is that we should avoid adding DT bindings for
things we can evaluate in drivers.
Regards
Andrzej
>
> Best regards,
> Jingoo Han
>> Regards,
>> Ajay
>>
> []
>
>
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Re: [PATCH v5 05/14] clk: Add generic driver for Maxim PMIC clocks
Hi Javier,
On Thu, Jun 26, 2014 at 11:45 PM, Javier Martinez Canillas
wrote:
> Maxim Integrated Power Management ICs are very similar with
> regard to their clock outputs. Most of the clock drivers for
> these chips are duplicating code and are simpler enough that
> can be converted to use a generic driver to consolidate code
> and avoid duplication.
>
> Signed-off-by: Javier Martinez Canillas
> Reviewed-by: Krzysztof Kozlowski
> ---
>
> Changes since v4:
> - Return recalc 0 if clock isn't enabled in Suggested by Yadwinder Singh
> Brar.
>
It seems you didn't implement or posted same patch again :) .
> Changes since v3:
> - Add current copyright information. Suggested by Krzysztof Kozlowski
> - Do a single allocation for struct max_gen_clk. Suggested by Krzysztof
> Kozlowski
> - Add EXPORT_SYMBOL() for exported symbols. Suggested by Krzysztof Kozlowski
>
> drivers/clk/Kconfig | 3 +
> drivers/clk/Makefile | 1 +
> drivers/clk/clk-max-gen.c | 195
> ++
> drivers/clk/clk-max-gen.h | 32
> 4 files changed, 231 insertions(+)
> create mode 100644 drivers/clk/clk-max-gen.c
> create mode 100644 drivers/clk/clk-max-gen.h
>
[ .. ]
> +
> +static unsigned long max_gen_recalc_rate(struct clk_hw *hw,
> +unsigned long parent_rate)
> +{
> + return 32768;
> +}
Its still same here.
> +
> +struct clk_ops max_gen_clk_ops = {
> + .prepare= max_gen_clk_prepare,
> + .unprepare = max_gen_clk_unprepare,
> + .is_prepared= max_gen_clk_is_prepared,
> + .recalc_rate= max_gen_recalc_rate,
> +};
> +EXPORT_SYMBOL_GPL(max_gen_clk_ops);
> +
> +static struct clk *max_gen_clk_register(struct device *dev,
> + struct max_gen_clk *max_gen)
> +{
> + struct clk *clk;
> + struct clk_hw *hw = &max_gen->hw;
> +
> + clk = clk_register(dev, hw);
> + if (IS_ERR(clk))
> + return clk;
> +
> + max_gen->lookup = kzalloc(sizeof(struct clk_lookup), GFP_KERNEL);
As I suggested in other patch[1] also, its better to use
clkdev_alloc() instead of kzalloc() here.
> + if (!max_gen->lookup)
> + return ERR_PTR(-ENOMEM);
> +
> + max_gen->lookup->con_id = hw->init->name;
Also IMO, init->name should be over-written if name is provided in DT,
otherwise generic "clock-output-names" property will go futile,
perhaps it should be done before clk_register.
Regards,
Yadwinder
[1] : https://lkml.org/lkml/2014/6/27/197
> + max_gen->lookup->clk = clk;
> +
> + clkdev_add(max_gen->lookup);
> +
> + return clk;
> +}
> +
> +int max_gen_clk_probe(struct platform_device *pdev, struct regmap *regmap,
> + u32 reg, struct clk_init_data *clks_init, int num_init)
> +{
> + int i, ret;
> + struct max_gen_clk *max_gen_clks;
> + struct clk **clocks;
> + struct device *dev = &pdev->dev;
> +
> + clocks = devm_kzalloc(dev, sizeof(struct clk *) * num_init,
> GFP_KERNEL);
> + if (!clocks)
> + return -ENOMEM;
> +
> + max_gen_clks = devm_kzalloc(dev, sizeof(struct max_gen_clk)
> + * num_init, GFP_KERNEL);
> + if (!max_gen_clks)
> + return -ENOMEM;
> +
> + for (i = 0; i < num_init; i++) {
> + max_gen_clks[i].regmap = regmap;
> + max_gen_clks[i].mask = 1 << i;
> + max_gen_clks[i].reg = reg;
> + max_gen_clks[i].hw.init = &clks_init[i];
> +
> + clocks[i] = max_gen_clk_register(dev, &max_gen_clks[i]);
> + if (IS_ERR(clocks[i])) {
> + ret = PTR_ERR(clocks[i]);
> + dev_err(dev, "failed to register %s\n",
> + max_gen_clks[i].hw.init->name);
> + goto err_clocks;
> + }
> + }
> +
> + platform_set_drvdata(pdev, clocks);
> +
> + if (dev->of_node) {
> + struct clk_onecell_data *of_data;
> +
> + of_data = devm_kzalloc(dev, sizeof(*of_data), GFP_KERNEL);
> + if (!of_data) {
> + ret = -ENOMEM;
> + goto err_clocks;
> + }
> +
> + of_data->clks = clocks;
> + of_data->clk_num = num_init;
> + ret = of_clk_add_provider(dev->of_node,
> of_clk_src_onecell_get,
> + of_data);
> +
> + if (ret) {
> + dev_err(dev, "failed to register OF clock
> provider\n");
> + goto err_clocks;
> + }
> + }
> +
> + return 0;
> +
> +err_clocks:
> + for (--i; i >= 0; --i) {
> + clkdev_drop(max_gen_clks[i].lookup);
> + clk_unregister(max_gen_clks[i].hw.clk);
> + }
> +
> + return ret;
> +}
> +E
Re: [PATCHv5 0/4] iio: adc: exynos_adc: Support Exynos3250 ADC and code clean
Dear Kukjin, On 06/29/2014 08:50 PM, Jonathan Cameron wrote: > On 27/06/14 05:30, Chanwoo Choi wrote: >> Changes from v4: >> - Use 'exynos_adc_data' structure instead of 'exynos_adc_ops' structure >>and remove enum variable of ADC version >> - Fix wrong name of special clock (sclk_tsadc -> sclk_adc) >> - Add reviewed message by Naveen Krishna Chatradhi >> - Add functions for ADC clock control >> >> Changes from v3: >> - Add new 'exynos_adc_ops' structure to improve readability according to >> Tomasz Figa comment[1] >> [1] https://lkml.org/lkml/2014/4/16/238 >> - Add new 'exynos3250-adc-v2' compatible string to support Exynos3250 ADC >> - Fix wrong compaitlbe string of ADC in Exynos3250 dtsi file >> >> Changes from v2: >> - Check return value of clock function to deal with error exception >> - Fix minor coding style to improve readability >> >> Changes from v1: >> - Add new "samsung,exynos-adc-v3" compatible to support Exynos3250 ADC >> - Add a patch about DT binding documentation >> >> Chanwoo Choi (4): >>iio: adc: exynos_adc: Add exynos_adc_data structure to improve readability >>iio: adc: exynos_adc: Control special clock of ADC to support Exynos3250 >> ADC >>iio: devicetree: Add DT binding documentation for Exynos3250 ADC >>ARM: dts: Fix wrong compatible string for Exynos3250 ADC >> >> .../devicetree/bindings/arm/samsung/exynos-adc.txt | 26 +- >> arch/arm/boot/dts/exynos3250.dtsi | 4 +- >> drivers/iio/adc/exynos_adc.c | 326 >> +++-- >> 3 files changed, 268 insertions(+), 88 deletions(-) >> > I am happy with this series, but given it touches some exynos bindings, I > would > like an ack from Kukjin Kim (or according to MAINTAINERS Ben Dooks) before > taking it > all through IIO. Could you please review this patchset about exynos dtsi and bindings? Best Regards, Chanwoo Choi -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH V3 1/7] drm/exynos: Support DP CLKCON register in FIMD driver
On Friday, June 27, 2014 10:03 PM, Ajay kumar wrote:
> On Fri, Jun 27, 2014 at 6:14 PM, Andrzej Hajda wrote:
> > On 06/27/2014 01:48 PM, Ajay kumar wrote:
> >> On Fri, Jun 27, 2014 at 4:52 PM, Andrzej Hajda wrote:
> >>> +CC DT
> >>>
> >>> On 06/27/2014 12:12 PM, Ajay Kumar wrote:
> Add the missing setting for DP CLKCON register.
>
> This register is present on Exynos5 based FIMD controllers,
> and needs to be set if we are using DP.
>
> Signed-off-by: Ajay Kumar
> ---
> .../devicetree/bindings/video/samsung-fimd.txt |1 +
> drivers/gpu/drm/exynos/exynos_drm_fimd.c | 23
>
> include/video/samsung_fimd.h |4
> 3 files changed, 28 insertions(+)
[.]
> static const struct of_device_id fimd_driver_dt_match[] = {
> @@ -331,6 +341,10 @@ static void fimd_commit(struct exynos_drm_manager
> *mgr)
> if (clkdiv > 1)
> val |= VIDCON0_CLKVAL_F(clkdiv - 1) | VIDCON0_CLKDIR;
>
> + if (ctx->driver_data->has_dp_clkcon &&
> + ctx->exynos_fimd_output_type == EXYNOS_FIMD_OUTPUT_DP)
> + writel(DP_CLK_ENABLE, ctx->regs + DP_CLKCON);
> +
> writel(val, ctx->regs + VIDCON0);
> >
> > New code should not split VIDCON0 related code.It should be moved few
> > lines above or few lines below.
> Ok, for better readability.
>
> > Anyway this code should be rather placed in power related functions of
> > dp encoder, as it enables dp. The only question
> > is if DP_CLKCON update can be performed after VIDCON0 update. If yes the
> > solution of the whole problem
> I will check this.
>
> > seems to be simple:
> > - fimd should provide function fimd_set_dp_clk_gate or sth similar,
> > - this function should be called in exynos_dp_poweron/exynos_dp_poweroff.
> > I hope I have not missed anything this time.
> But, it won't look good to export a FIMD function which sets a FIMD register,
> and call it in DP driver!
> What does Inki/Jingoo have to say about this?
I agree with Ajay Kumar's opinion.
It doesn't look good to export the function to set FIMD register
and call it by DP driver.
Best regards,
Jingoo Han
>
> Regards,
> Ajay
>
[]
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Re: [PATCHv5 0/4] iio: adc: exynos_adc: Support Exynos3250 ADC and code clean
Hi Tomasz, On 06/27/2014 08:26 PM, Tomasz Figa wrote: > Hi Chanwoo, > > On 27.06.2014 06:30, Chanwoo Choi wrote: >> Changes from v4: >> - Use 'exynos_adc_data' structure instead of 'exynos_adc_ops' structure >> and remove enum variable of ADC version >> - Fix wrong name of special clock (sclk_tsadc -> sclk_adc) >> - Add reviewed message by Naveen Krishna Chatradhi >> - Add functions for ADC clock control >> >> Changes from v3: >> - Add new 'exynos_adc_ops' structure to improve readability according to >> Tomasz Figa comment[1] >> [1] https://lkml.org/lkml/2014/4/16/238 >> - Add new 'exynos3250-adc-v2' compatible string to support Exynos3250 ADC >> - Fix wrong compaitlbe string of ADC in Exynos3250 dtsi file >> >> Changes from v2: >> - Check return value of clock function to deal with error exception >> - Fix minor coding style to improve readability >> >> Changes from v1: >> - Add new "samsung,exynos-adc-v3" compatible to support Exynos3250 ADC >> - Add a patch about DT binding documentation >> >> Chanwoo Choi (4): >> iio: adc: exynos_adc: Add exynos_adc_data structure to improve readability >> iio: adc: exynos_adc: Control special clock of ADC to support Exynos3250 >> ADC >> iio: devicetree: Add DT binding documentation for Exynos3250 ADC >> ARM: dts: Fix wrong compatible string for Exynos3250 ADC >> >> .../devicetree/bindings/arm/samsung/exynos-adc.txt | 26 +- >> arch/arm/boot/dts/exynos3250.dtsi | 4 +- >> drivers/iio/adc/exynos_adc.c | 326 >> +++-- >> 3 files changed, 268 insertions(+), 88 deletions(-) >> > > For the whole series: > > Reviewed-by: Tomasz Figa Thanks for your review. Best Regards, Chanwoo Choi -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 2/2] arm: Add back maximum bank limit
Hi Laura, Am 29.06.2014 21:06, schrieb Laura Abbott: > Commit 1c2f87c22566cd057bc8cde10c37ae9da1a1bb76 > (ARM: 8025/1: Get rid of meminfo) dropped the upper bound on > the number of memory banks that can be added as there was no > technical need in the kernel. It turns out though, some bootloaders > (specifically the arndale-octa exynos boards) may pass invalid memory > information and rely on the kernel to not parse this data. This is a > bug in the bootloader but we still need to work around this. > Re-introduce a maximum bank limit per board to prevent invalid banks > from being passed to the kernel. > > Reported-by: Tushar Behera > Signed-off-by: Laura Abbott > --- > http://lists.infradead.org/pipermail/linux-arm-kernel/2014-June/265615.html Tested-by: Andreas Färber [0.00] Max banks too low, ignoring memory at 0xfbaf [0.00] Max banks too low, ignoring memory at 0xfffedbff [0.00] Max banks too low, ignoring memory at 0xffbbffd9 [0.00] Max banks too low, ignoring memory at 0xffefefef Thanks, Andreas -- SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/2] of: Split early_init_dt_scan into two parts
Currently, early_init_dt_scan validates the header, sets the
boot params, and scans for chosen/memory all in one function.
Split this up into two separate functions (validation/setting
boot params in one, scanning in another) to allow for
additional setup between boot params and scanning the memory.
Signed-off-by: Laura Abbott
---
drivers/of/fdt.c | 18 +-
include/linux/of_fdt.h | 2 ++
2 files changed, 19 insertions(+), 1 deletion(-)
diff --git a/drivers/of/fdt.c b/drivers/of/fdt.c
index c4cddf0..55bfca9 100644
--- a/drivers/of/fdt.c
+++ b/drivers/of/fdt.c
@@ -922,7 +922,7 @@ int __init __weak
early_init_dt_reserve_memory_arch(phys_addr_t base,
}
#endif
-bool __init early_init_dt_scan(void *params)
+bool __init early_init_dt_verify(void *params)
{
if (!params)
return false;
@@ -936,6 +936,12 @@ bool __init early_init_dt_scan(void *params)
return false;
}
+ return true;
+}
+
+
+void __init early_init_dt_scan_all(void)
+{
/* Retrieve various information from the /chosen node */
of_scan_flat_dt(early_init_dt_scan_chosen, boot_command_line);
@@ -944,7 +950,17 @@ bool __init early_init_dt_scan(void *params)
/* Setup memory, calling early_init_dt_add_memory_arch */
of_scan_flat_dt(early_init_dt_scan_memory, NULL);
+}
+
+bool __init early_init_dt_scan(void *params)
+{
+ bool status;
+
+ status = early_init_dt_verify(params);
+ if (!status)
+ return false;
+ early_init_dt_scan_all();
return true;
}
diff --git a/include/linux/of_fdt.h b/include/linux/of_fdt.h
index 0511789..d600993 100644
--- a/include/linux/of_fdt.h
+++ b/include/linux/of_fdt.h
@@ -73,6 +73,8 @@ extern int early_init_dt_scan_root(unsigned long node, const
char *uname,
int depth, void *data);
extern bool early_init_dt_scan(void *params);
+extern bool early_init_dt_verify(void *params);
+extern void early_init_dt_scan_all(void);
extern const char *of_flat_dt_get_machine_name(void);
extern const void *of_flat_dt_match_machine(const void *default_match,
--
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[PATCH 2/2] arm: Add back maximum bank limit
Commit 1c2f87c22566cd057bc8cde10c37ae9da1a1bb76
(ARM: 8025/1: Get rid of meminfo) dropped the upper bound on
the number of memory banks that can be added as there was no
technical need in the kernel. It turns out though, some bootloaders
(specifically the arndale-octa exynos boards) may pass invalid memory
information and rely on the kernel to not parse this data. This is a
bug in the bootloader but we still need to work around this.
Re-introduce a maximum bank limit per board to prevent invalid banks
from being passed to the kernel.
Reported-by: Tushar Behera
Signed-off-by: Laura Abbott
---
http://lists.infradead.org/pipermail/linux-arm-kernel/2014-June/265615.html
For those who did not see the discussion before
---
arch/arm/include/asm/mach/arch.h | 10 --
arch/arm/kernel/atags_parse.c| 1 +
arch/arm/kernel/devtree.c| 9 -
arch/arm/kernel/setup.c | 20
arch/arm/mach-exynos/exynos.c| 1 +
5 files changed, 38 insertions(+), 3 deletions(-)
diff --git a/arch/arm/include/asm/mach/arch.h b/arch/arm/include/asm/mach/arch.h
index 060a75e..ebcc543 100644
--- a/arch/arm/include/asm/mach/arch.h
+++ b/arch/arm/include/asm/mach/arch.h
@@ -40,6 +40,8 @@ struct machine_desc {
unsigned intvideo_start;/* start of video RAM */
unsigned intvideo_end; /* end of video RAM */
+ unsigned intbank_limit; /* maximum number of memory
+* banks to add */
unsigned char reserve_lp0 :1; /* never has lp0*/
unsigned char reserve_lp1 :1; /* never has lp1*/
unsigned char reserve_lp2 :1; /* never has lp2*/
@@ -76,6 +78,8 @@ extern const struct machine_desc __arch_info_begin[],
__arch_info_end[];
#define for_each_machine_desc(p) \
for (p = __arch_info_begin; p < __arch_info_end; p++)
+extern void set_max_bank_limit(const struct machine_desc *mdesc);
+
/*
* Set of macros to define architecture features. This is built into
* a table by the linker.
@@ -85,7 +89,8 @@ static const struct machine_desc __mach_desc_##_type \
__used\
__attribute__((__section__(".arch.info.init"))) = { \
.nr = MACH_TYPE_##_type,\
- .name = _name,
+ .name = _name,\
+ .bank_limit = 12,
#define MACHINE_END\
};
@@ -95,6 +100,7 @@ static const struct machine_desc __mach_desc_##_name \
__used\
__attribute__((__section__(".arch.info.init"))) = { \
.nr = ~0, \
- .name = _namestr,
+ .name = _namestr, \
+ .bank_limit = 12,
#endif
diff --git a/arch/arm/kernel/atags_parse.c b/arch/arm/kernel/atags_parse.c
index 7807ef5..6b01d20 100644
--- a/arch/arm/kernel/atags_parse.c
+++ b/arch/arm/kernel/atags_parse.c
@@ -204,6 +204,7 @@ setup_machine_tags(phys_addr_t __atags_pointer, unsigned
int machine_nr)
dump_machine_table(); /* does not return */
}
+ set_max_bank_limit(mdesc);
if (__atags_pointer)
tags = phys_to_virt(__atags_pointer);
else if (mdesc->atag_offset)
diff --git a/arch/arm/kernel/devtree.c b/arch/arm/kernel/devtree.c
index e94a157..04213ce 100644
--- a/arch/arm/kernel/devtree.c
+++ b/arch/arm/kernel/devtree.c
@@ -27,6 +27,10 @@
#include
#include
+void __init early_init_dt_add_memory_arch(u64 base, u64 size)
+{
+ arm_add_memory(base, size);
+}
#ifdef CONFIG_SMP
extern struct of_cpu_method __cpu_method_of_table[];
@@ -212,7 +216,7 @@ const struct machine_desc * __init
setup_machine_fdt(unsigned int dt_phys)
mdesc_best = &__mach_desc_GENERIC_DT;
#endif
- if (!dt_phys || !early_init_dt_scan(phys_to_virt(dt_phys)))
+ if (!dt_phys || !early_init_dt_verify(phys_to_virt(dt_phys)))
return NULL;
mdesc = of_flat_dt_match_machine(mdesc_best, arch_get_next_mach);
@@ -237,6 +241,9 @@ const struct machine_desc * __init
setup_machine_fdt(unsigned int dt_phys)
dump_machine_table(); /* does not return */
}
+ set_max_bank_limit(mdesc);
+ early_init_dt_scan_all();
+
/* Change machine number to match the mdesc we're using */
__machine_arch_type = mdesc->nr;
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 8a16ee5..bc796e3 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -629,11 +629,31 @@ void __init dump_machine_table(void)
/* can't use cpu_relax() here as it may require MMU setup */;
}
+static unsigned int bank_cnt;
+static unsigned int max_cnt;
+
+void set_max_bank_limit(const str
Re: [PATCHv5 0/4] iio: adc: exynos_adc: Support Exynos3250 ADC and code clean
On 27/06/14 05:30, Chanwoo Choi wrote: Changes from v4: - Use 'exynos_adc_data' structure instead of 'exynos_adc_ops' structure and remove enum variable of ADC version - Fix wrong name of special clock (sclk_tsadc -> sclk_adc) - Add reviewed message by Naveen Krishna Chatradhi - Add functions for ADC clock control Changes from v3: - Add new 'exynos_adc_ops' structure to improve readability according to Tomasz Figa comment[1] [1] https://lkml.org/lkml/2014/4/16/238 - Add new 'exynos3250-adc-v2' compatible string to support Exynos3250 ADC - Fix wrong compaitlbe string of ADC in Exynos3250 dtsi file Changes from v2: - Check return value of clock function to deal with error exception - Fix minor coding style to improve readability Changes from v1: - Add new "samsung,exynos-adc-v3" compatible to support Exynos3250 ADC - Add a patch about DT binding documentation Chanwoo Choi (4): iio: adc: exynos_adc: Add exynos_adc_data structure to improve readability iio: adc: exynos_adc: Control special clock of ADC to support Exynos3250 ADC iio: devicetree: Add DT binding documentation for Exynos3250 ADC ARM: dts: Fix wrong compatible string for Exynos3250 ADC .../devicetree/bindings/arm/samsung/exynos-adc.txt | 26 +- arch/arm/boot/dts/exynos3250.dtsi | 4 +- drivers/iio/adc/exynos_adc.c | 326 +++-- 3 files changed, 268 insertions(+), 88 deletions(-) I am happy with this series, but given it touches some exynos bindings, I would like an ack from Kukjin Kim (or according to MAINTAINERS Ben Dooks) before taking it all through IIO. Thanks, Jonathan -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv5 3/4] iio: devicetree: Add DT binding documentation for Exynos3250 ADC
On 27/06/14 05:30, Chanwoo Choi wrote:
This patch add DT binding documentation for Exynos3250 ADC IP. Exynos3250 has
special clock ('sclk_adc') for ADC which provide clock to internal ADC.
Signed-off-by: Chanwoo Choi
Acked-by: Kyungmin Park
Reviewed-by: Naveen Krishna Chatradhi
One trivial inline. As a fairly obvious extension of the existing bindings
'probably' doesn't really need a dt maintainer ack (or the 3 weeks)
---
.../devicetree/bindings/arm/samsung/exynos-adc.txt | 26 --
1 file changed, 24 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
index 5d49f2b..b87749a 100644
--- a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
+++ b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
@@ -14,14 +14,22 @@ Required properties:
for exynos4412/5250 controllers.
Must be "samsung,exynos-adc-v2" for
future controllers.
+ Must be "samsung,exynos3250-adc-v2" for
+ for controllers compatible with ADC of
for for
+ Exynos3250.
- reg:Contains ADC register address range (base
address and
length) and the address of the phy enable register.
- interrupts: Contains the interrupt information for the
timer. The
format is being dependent on which interrupt controller
the Samsung device uses.
- #io-channel-cells = <1>; As ADC has multiple outputs
-- clocks From common clock binding: handle to adc clock.
-- clock-names From common clock binding: Shall be "adc".
+- clocks From common clock bindings: handles to clocks specified
+ in "clock-names" property, in the same order.
+- clock-names From common clock bindings: list of clock input names
+ used by ADC block:
+ - "adc" : ADC bus clock
+ - "sclk_adc" : ADC special clock (only for Exynos3250
+ and compatible ADC block)
- vdd-supply VDD input supply.
Note: child nodes can be added for auto probing from device tree.
@@ -41,6 +49,20 @@ adc: adc@12D1 {
vdd-supply = <&buck5_reg>;
};
+Example: adding device info in dtsi file for Exynos3250 with additional sclk
+
+adc: adc@126C {
+ compatible = "samsung,exynos3250-adc-v2";
+ reg = <0x126C 0x100>, <0x10020718 0x4>;
+ interrupts = <0 137 0>;
+ #io-channel-cells = <1>;
+ io-channel-ranges;
+
+ clocks = <&cmu CLK_TSADC>, <&cmu CLK_SCLK_TSADC>;
+ clock-names = "adc", "sclk_adc";
+
+ vdd-supply = <&buck5_reg>;
+};
Example: Adding child nodes in dts file
--
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