Re: [PATCH v3 2/7] drm/exynos: make zpos property configurable

[Marek Szyprowski]

Hello,

On 2015-12-17 03:55, Joonyoung Shim wrote:

+Cc: Boram Park,

Hi Marek,

On 12/16/2015 09:21 PM, Marek Szyprowski wrote:

This patch adds all infrastructure to make zpos plane property
configurable from userspace.

Signed-off-by: Marek Szyprowski 
---
  drivers/gpu/drm/exynos/exynos_drm_drv.h   |  4 ++-
  drivers/gpu/drm/exynos/exynos_drm_plane.c | 51 ---
  2 files changed, 49 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.h 
b/drivers/gpu/drm/exynos/exynos_drm_drv.h
index 588b6763f9c7..f0827dbebb7d 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_drv.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_drv.h
@@ -64,6 +64,7 @@ struct exynos_drm_plane_state {
struct exynos_drm_rect src;
unsigned int h_ratio;
unsigned int v_ratio;
+   unsigned int zpos;
  };
  
  static inline struct exynos_drm_plane_state *

@@ -91,11 +92,12 @@ struct exynos_drm_plane {
  
  #define EXYNOS_DRM_PLANE_CAP_DOUBLE	(1 << 0)

  #define EXYNOS_DRM_PLANE_CAP_SCALE(1 << 1)
+#define EXYNOS_DRM_PLANE_CAP_ZPOS  (1 << 2)
  
  /*

   * Exynos DRM plane configuration structure.
   *
- * @zpos: z-position of the plane.
+ * @zpos: initial z-position of the plane.
   * @type: type of the plane (primary, cursor or overlay).
   * @pixel_formats: supported pixel formats.
   * @num_pixel_formats: number of elements in 'pixel_formats'.
diff --git a/drivers/gpu/drm/exynos/exynos_drm_plane.c 
b/drivers/gpu/drm/exynos/exynos_drm_plane.c
index fd6cb4cee01a..a2bdab836b50 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_plane.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_plane.c
@@ -124,6 +124,7 @@ static void exynos_plane_mode_set(struct 
exynos_drm_plane_state *exynos_state)
  
  static void exynos_drm_plane_reset(struct drm_plane *plane)

  {
+   struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
struct exynos_drm_plane_state *exynos_state;
  
  	if (plane->state) {

@@ -136,6 +137,7 @@ static void exynos_drm_plane_reset(struct drm_plane *plane)
  
  	exynos_state = kzalloc(sizeof(*exynos_state), GFP_KERNEL);

if (exynos_state) {
+   exynos_state->zpos = exynos_plane->config->zpos;
plane->state = _state->base;
plane->state->plane = plane;
}
@@ -153,6 +155,7 @@ exynos_drm_plane_duplicate_state(struct drm_plane *plane)
return NULL;
  
  	__drm_atomic_helper_plane_duplicate_state(plane, >base);

+   copy->zpos = exynos_state->zpos;
return >base;
  }
  
@@ -165,13 +168,53 @@ static void exynos_drm_plane_destroy_state(struct drm_plane *plane,

kfree(old_exynos_state);
  }
  
+static int exynos_drm_plane_atomic_set_property(struct drm_plane *plane,

+   struct drm_plane_state *state,
+   struct drm_property *property,
+   uint64_t val)
+{
+   struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
+   struct exynos_drm_plane_state *exynos_state =
+   to_exynos_plane_state(state);
+   struct exynos_drm_private *dev_priv = plane->dev->dev_private;
+   const struct exynos_drm_plane_config *config = exynos_plane->config;
+
+   if (property == dev_priv->plane_zpos_property &&
+   (config->capabilities & EXYNOS_DRM_PLANE_CAP_ZPOS))
+   exynos_state->zpos = val;
+   else
+   return -EINVAL;
+
+   return 0;
+}
+
+static int exynos_drm_plane_atomic_get_property(struct drm_plane *plane,
+ const struct drm_plane_state *state,
+ struct drm_property *property,
+ uint64_t *val)
+{
+   const struct exynos_drm_plane_state *exynos_state =
+   container_of(state, const struct exynos_drm_plane_state, base);
+   struct exynos_drm_private *dev_priv = plane->dev->dev_private;
+
+   if (property == dev_priv->plane_zpos_property)
+   *val = exynos_state->zpos;
+   else
+   return -EINVAL;
+
+   return 0;
+}
+
  static struct drm_plane_funcs exynos_plane_funcs = {
.update_plane   = drm_atomic_helper_update_plane,
.disable_plane  = drm_atomic_helper_disable_plane,
.destroy= drm_plane_cleanup,
+   .set_property   = drm_atomic_helper_plane_set_property,
.reset  = exynos_drm_plane_reset,
.atomic_duplicate_state = exynos_drm_plane_duplicate_state,
.atomic_destroy_state = exynos_drm_plane_destroy_state,
+   .atomic_set_property = exynos_drm_plane_atomic_set_property,
+   .atomic_get_property = exynos_drm_plane_atomic_get_property,
  };
  
  static int

@@ -267,8 +310,8 @@ static void exynos_plane_attach_zpos_property(struct 
drm_plane *plane,
  
  	prop = 

Re: [PATCH v3 5/7] drm/exynos: mixer: refactor layer setup

[Marek Szyprowski]

Hi Joonyoung,

On 2015-12-17 05:19, Joonyoung Shim wrote:

Hi Marek,

On 12/16/2015 09:21 PM, Marek Szyprowski wrote:

Properly configure blending properties of given hardware layer based on
the selected pixel format. Currently only per-pixel-based alpha is possible
when respective pixel format has been selected. Configuration of global,
per-plane alpha value, color key and background color will be added later.

This patch is heavily inspired by earlier work done by Tobias Jakobi
.

Signed-off-by: Marek Szyprowski 
---
  drivers/gpu/drm/exynos/exynos_mixer.c | 43 +++
  drivers/gpu/drm/exynos/regs-mixer.h   |  1 +
  2 files changed, 44 insertions(+)

diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c 
b/drivers/gpu/drm/exynos/exynos_mixer.c
index c572e271579e..ae7b122274ac 100644
--- a/drivers/gpu/drm/exynos/exynos_mixer.c
+++ b/drivers/gpu/drm/exynos/exynos_mixer.c
@@ -165,6 +165,16 @@ static const u8 filter_cr_horiz_tap4[] = {
70, 59, 48, 37, 27, 19, 11, 5,
  };
  
+static inline bool is_alpha_format(unsigned int pixel_format)

+{
+   switch (pixel_format) {
+   case DRM_FORMAT_ARGB:
+   return true;
+   default:
+   return false;
+   }
+}
+
  static inline u32 vp_reg_read(struct mixer_resources *res, u32 reg_id)
  {
return readl(res->vp_regs + reg_id);
@@ -294,6 +304,37 @@ static void vp_default_filter(struct mixer_resources *res)
filter_cr_horiz_tap4, sizeof(filter_cr_horiz_tap4));
  }
  
+static void mixer_cfg_gfx_blend(struct mixer_context *ctx, unsigned int win,

+   bool alpha)
+{
+   struct mixer_resources *res = >mixer_res;
+   u32 val;
+
+   val  = MXR_GRP_CFG_COLOR_KEY_DISABLE; /* no blank key */
+   if (alpha) {
+   /* blending based on pixel alpha */
+   val |= MXR_GRP_CFG_BLEND_PRE_MUL;
+   val |= MXR_GRP_CFG_PIXEL_BLEND_EN;
+   }
+   mixer_reg_writemask(res, MXR_GRAPHIC_CFG(win),
+   val, MXR_GRP_CFG_MISC_MASK);

I think the priority of plane and whether vp layer exists should be
considered for blending setting. When priority of graphic layer0 is
lowest and vp layer is not, this will blend background layer.
It was not permitted to blend background layer until current.


Currently blending is hardcoded to following configuration:
1. Order: [top] Grp1 > Grp0 > Video [bottom]
2. Per-pixel alpha blending enabled unconditionally for Grp1 layer 
(regardless

   of the selected pixel format for Grp1 layer).
3. Per-pixel alpha blending enabled for Grp0 layer when Video layer gets 
enabled

   (regardless of the selected pixel format for Grp0 layer).

It is not very intuitive and it looks hardcoded for one particular use case.
With the above patch application can configure blending for its needs.

I really see no reason for special handling of the bottom layer (like
disabling per-pixel alpha even if alpha-enabled format is selected). It is
role of application to set proper pixel format (like XRGB instead of
ARGB) if the application is not interested in alpha blending. Per-pixel
alpha blending is enabled only for formats which really support alpha.

Best regards
--
Marek Szyprowski, PhD
Samsung R Institute Poland

--
To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH] ARM: dts: Make CPU configuration more readable for exynos542x/5800

[Chanho Park]

On Fri, Dec 11, 2015 at 3:17 PM, Krzysztof Kozlowski
 wrote:
> Exynos5420 and Exynos5800 boards boot from big core (A15) but
> Exynos5420 boards choose otherwise: LITTLE core (A7) (on Exynos5422 this
> is property of the board - configurable by pulling up/down gpg2-1).
> To make user-visible CPU ordering more consistent the 'cpus' node was
> overridden by exynos5422-cpus.dtsi.
>
> However this is a little bit ugly and error-prone. Overriding the CPU
> child nodes requires to basically reverse what was done initially in
> exynos5420.dtsi.
>
> Instead, split CPU configuration entirely to separate files which should
> be included by board DTS.
>
> Suggested-by: Viresh Kumar 
> Signed-off-by: Krzysztof Kozlowski 
>
> ---
>
> Tested on Exynos5422 based Odroid XU4. Please kindly test on Exynos5420
> or Exynos5800 boards.
> ---
>  arch/arm/boot/dts/exynos5420-arndale-octa.dts |   1 +
>  arch/arm/boot/dts/exynos5420-cpus.dtsi|  92 ++
>  arch/arm/boot/dts/exynos5420-peach-pit.dts|   1 +
>  arch/arm/boot/dts/exynos5420-smdk5420.dts |   1 +
>  arch/arm/boot/dts/exynos5420.dtsi |  72 +-
>  arch/arm/boot/dts/exynos5422-cpus.dtsi| 130 
> ++
>  arch/arm/boot/dts/exynos5800-peach-pi.dts |   1 +
>  7 files changed, 170 insertions(+), 128 deletions(-)
>  create mode 100644 arch/arm/boot/dts/exynos5420-cpus.dtsi
>
> diff --git a/arch/arm/boot/dts/exynos5420-arndale-octa.dts 
> b/arch/arm/boot/dts/exynos5420-arndale-octa.dts
> index 4ecef6981d5c..365eec6f6687 100644
> --- a/arch/arm/boot/dts/exynos5420-arndale-octa.dts
> +++ b/arch/arm/boot/dts/exynos5420-arndale-octa.dts
> @@ -11,6 +11,7 @@
>
>  /dts-v1/;
>  #include "exynos5420.dtsi"
> +#include "exynos5420-cpus.dtsi"
>  #include 
>  #include 
>  #include 
> diff --git a/arch/arm/boot/dts/exynos5420-cpus.dtsi 
> b/arch/arm/boot/dts/exynos5420-cpus.dtsi
> new file mode 100644
> index ..7aaf0313274f
> --- /dev/null
> +++ b/arch/arm/boot/dts/exynos5420-cpus.dtsi
> @@ -0,0 +1,92 @@
> +/*
> + * SAMSUNG EXYNOS5420 SoC cpu device tree source
> + *
> + * Copyright (c) 2015 Samsung Electronics Co., Ltd.
> + * http://www.samsung.com
> + *
> + * This file provides desired ordering for Exynos5420 and Exynos5800
> + * boards: CPU[0123] being the A15.
> + *
> + * The Exynos5420, 5422 and 5800 actually share the same CPU configuration
> + * but particular boards choose different booting order.
> + *
> + * Exynos5420 and Exynos5800 always boot from Cortex-A15. On Exynos5422
> + * booting cluster (big or LITTLE) is chosen by IROM code by reading
> + * the gpg2-1 GPIO. By default all Exynos5422 based boards choose booting
> + * from the LITTLE: Cortex-A7.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +/ {
> +   cpus {
> +   #address-cells = <1>;
> +   #size-cells = <0>;
> +
> +   cpu0: cpu@0 {
> +   device_type = "cpu";
> +   compatible = "arm,cortex-a15";
> +   reg = <0x0>;
> +   clock-frequency = <18>;
> +   cci-control-port = <_control1>;
> +   };
> +
> +   cpu1: cpu@1 {
> +   device_type = "cpu";
> +   compatible = "arm,cortex-a15";
> +   reg = <0x1>;
> +   clock-frequency = <18>;
> +   cci-control-port = <_control1>;
> +   };
> +
> +   cpu2: cpu@2 {
> +   device_type = "cpu";
> +   compatible = "arm,cortex-a15";
> +   reg = <0x2>;
> +   clock-frequency = <18>;
> +   cci-control-port = <_control1>;
> +   };
> +
> +   cpu3: cpu@3 {
> +   device_type = "cpu";
> +   compatible = "arm,cortex-a15";
> +   reg = <0x3>;
> +   clock-frequency = <18>;
> +   cci-control-port = <_control1>;
> +   };
> +
> +   cpu4: cpu@100 {
> +   device_type = "cpu";
> +   compatible = "arm,cortex-a7";
> +   reg = <0x100>;
> +   clock-frequency = <10>;
> +   cci-control-port = <_control0>;
> +   };
> +
> +   cpu5: cpu@101 {
> +   device_type = "cpu";
> +   compatible = "arm,cortex-a7";
> +   reg = <0x101>;
> +   clock-frequency = <10>;
> +   cci-control-port = 

[PATCH v2] PM / OPP: Fix parsing of opp-microvolt and opp-microamp properties

[Bartlomiej Zolnierkiewicz]

Commit 01fb4d3c39d3 ("PM / OPP: Parse 'opp--'
bindings") broke support for parsing standard opp-microvolt and
opp-microamp properties.  Fix it by setting 'name' string to
proper value for !prop cases.

Cc: Viresh Kumar 
Cc: Lee Jones 
Cc: Rafael J. Wysocki 
Fixes: 01fb4d3c39d3 ("PM / OPP: Parse 'opp-- 'bindings")
Signed-off-by: Bartlomiej Zolnierkiewicz 
---
v2:
- rework the changes as requested by Viresh

This fixes Exynos4x12 cpufreq-dt suppport regression present in
linux-pm/linux-next tree.  Rafael, please apply.  Thank you.

 drivers/base/power/opp/core.c |4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Index: b/drivers/base/power/opp/core.c
===
--- a/drivers/base/power/opp/core.c 2015-12-17 18:57:27.358981831 +0100
+++ b/drivers/base/power/opp/core.c 2015-12-17 18:58:04.550982529 +0100
@@ -814,7 +814,7 @@ static int opp_parse_supplies(struct dev
 
if (!prop) {
/* Search for "opp-microvolt" */
-   name[13] = '\0';
+   sprintf(name, "opp-microvolt");
prop = of_find_property(opp->np, name, NULL);
 
/* Missing property isn't a problem, but an invalid entry is */
@@ -855,7 +855,7 @@ static int opp_parse_supplies(struct dev
 
if (!prop) {
/* Search for "opp-microamp" */
-   name[12] = '\0';
+   sprintf(name, "opp-microamp");
prop = of_find_property(opp->np, name, NULL);
}
 

--
To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH v11 0/19] Add Analogix Core Display Port Driver

[Heiko Stübner]

Hi Yakir,

Am Mittwoch, 16. Dezember 2015, 11:20:18 schrieb Yakir Yang:
>The Samsung Exynos eDP controller and Rockchip RK3288 eDP controller
> share the same IP, so a lot of parts can be re-used. I split the common
> code into bridge directory, then rk3288 and exynos only need to keep
> some platform code. Cause I can't find the exact IP name of exynos dp
> controller, so I decide to name dp core driver with "analogix" which I
> find in rk3288 eDP TRM

I'm really sorry for not thinking of this earlier, but I think we'll be doing 
the atomic modesetting conversion of the drm/kms driver first - see v3 series 
from Mark Yao.

Could you handle necessary changes to make it apply and work _after_ the 
atomic modesetting conversion please?


Thanks
Heiko


> But  there are still three light registers setting differents bewteen
> exynos and rk3288.
> 1. RK3288 have five special pll resigters which not indicata in exynos
>dp controller.
> 2. The address of DP_PHY_PD(dp phy power manager register) are different
>between rk3288 and exynos.
> 3. Rk3288 and exynos have different setting with AUX_HW_RETRY_CTL(dp debug
>register).
> 
> This series have been well tested on Rockchip platform with eDP panel on
> Jerry Chromebook and Display Port Monitor on RK3288 board. Also I have
> tested on Samsung Snow and Peach Pit Chromebooks, and thanks to
> Javier@Samsung help to retest the whole series on Samsung Exynos5800 Peach
> Pi Chromebook, glad to say that things works rightlly.
> 
> Thanks,
> - Yakir
> 
> 
> Changes in v11:
> - Uses tabs to fix the indentation issues in analogix_dp_core.h (Heiko)
> - Correct the title of this rockchip dp phy document(Rob)
> - Add the ack from Rob Herring
> - Rename the "analogix,need-force-hpd" to common 'force-hpd' (Rob)
> - Add the ack from Rob Herring
> - Revert parts of Gustavo Padovan's changes in commit:
>   drm/exynos: do not start enabling DP at bind() phase
>   Add dp phy poweron function in bind time.
> - Move the panel prepare from get_modes time to bind time, and move
>   the panel unprepare from bridge->disable to unbind time. (Heiko)
> 
> Changes in v10:
> - Add the ack from Rob Herring
> - Correct the ROCKCHIP_ANALOGIX_DP indentation in Kconfig to tabs here
> (Heiko) - Add the ack from Rob Herring
> - Fix the wrong macro value of GRF_EDP_REF_CLK_SEL_INTER_HIWORD_MASK
> BIT(4) -> BIT(20)
> - Remove the surplus "plat_data" check. (Heiko)
> -   switch (dp->plat_data && dp->plat_data->dev_type) {
> +   switch (dp->plat_data->dev_type) {
> 
> Changes in v9:
> - Document more details for 'ports' property.
> - Removed the unused the variable "res" in probe function. (Heiko)
> - Removed the unused head file.
> 
> Changes in v8:
> - Correct the right document path of display-timing.txt (Heiko)
> - Correct the misspell of 'from' to 'frm'. (Heiko)
> - Modify the commit subject name. (Heiko)
> - Fix the mixed spacers on macro definitions. (Heiko)
> - Remove the unnecessary empty line after clk_prepare_enable. (Heiko)
> - Remove the specific address in the example node name. (Heiko)
> 
> Changes in v7:
> - Back to use the of_property_read_bool() interfacs to provoid backward
>   compatibility of "hsync-active-high" "vsync-active-high" "interlaced"
>   to avoid -EOVERFLOW error (Krzysztof)
> - Simply the commit message. (Kishon)
> - Symmetrical enable/disbale the phy clock and power. (Kishon)
> - Simplify the commit message. (Kishon)
> 
> Changes in v6:
> - Fix the Kconfig recursive dependency (Javier)
> - Fix Peach Pit hpd property name error:
> -   hpd-gpio = < 6 0>;
> +   hpd-gpios = < 6 0>;
> 
> Changes in v5:
> - Correct the check condition of gpio_is_valid when driver try to get
>   the "hpd-gpios" DT propery. (Heiko)
> - Move the platform attach callback in the front of core driver bridge
>   attch function. Cause once platform failed at attach, core driver should
>   still failed, so no need to init connector before platform attached
> (Krzysztof) - Keep code style no changes with the previous exynos_dp_code.c
> in this patch, and update commit message about the new export symbol
> (Krzysztof) - Gather the device type patch (v4 11/16) into this one.
> (Krzysztof) - leave out the connector registration to analogix platform
> driver. (Thierry) - Resequence this patch after analogix_dp driver have
> been split
>   from exynos_dp code, and rephrase reasonable commit message, and
>   remove some controversial style (Krzysztof)
> - analogix_dp_write_byte_to_dpcd(
> - dp, DP_TEST_RESPONSE,
> + analogix_dp_write_byte_to_dpcd(dp,
> + DP_TEST_RESPONSE,
>   DP_TEST_EDID_CHECKSUM_WRITE);
> - Switch video timing type to "u32", so driver could use
> "of_property_read_u32" to get the backword timing values. Krzysztof suggest
> me that driver could use the "of_property_read_bool" to get backword timing
> values, but that interfacs would 

[PATCH v7 3/6] ARM: EXYNOS: split up exynos4 SoC specific PMU data

[Pankaj Dubey]

This patch splits up mach-exynos/pmu.c file, and moves exynos4210,
exynos4412 and exynos4212 PMU configuration data and functions handing
data into a common exynos4 SoC specific PMU file mach-exynos/exynos4-pmu.c.

Signed-off-by: Pankaj Dubey 
Reviewed-by: Krzysztof Kozlowski 
[for testing on Trats2 (Exynos4412, S2R, reboot, poweroff)]
Tested-by: Krzysztof Kozlowski 
---
 arch/arm/mach-exynos/Makefile  |   2 +-
 arch/arm/mach-exynos/exynos-pmu.h  |   3 +
 arch/arm/mach-exynos/exynos4-pmu.c | 223 +
 arch/arm/mach-exynos/pmu.c | 207 --
 4 files changed, 227 insertions(+), 208 deletions(-)
 create mode 100644 arch/arm/mach-exynos/exynos4-pmu.c

diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index e869f86..8969683 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -9,7 +9,7 @@ ccflags-$(CONFIG_ARCH_MULTIPLATFORM) += 
-I$(srctree)/$(src)/include -I$(srctree)
 
 # Core
 
-obj-$(CONFIG_ARCH_EXYNOS)  += exynos.o pmu.o exynos-smc.o firmware.o 
exynos3250-pmu.o
+obj-$(CONFIG_ARCH_EXYNOS)  += exynos.o pmu.o exynos-smc.o firmware.o 
exynos3250-pmu.o exynos4-pmu.o
 
 obj-$(CONFIG_EXYNOS_CPU_SUSPEND) += pm.o sleep.o
 obj-$(CONFIG_PM_SLEEP) += suspend.o
diff --git a/arch/arm/mach-exynos/exynos-pmu.h 
b/arch/arm/mach-exynos/exynos-pmu.h
index 5d09fa3..3d21aad 100644
--- a/arch/arm/mach-exynos/exynos-pmu.h
+++ b/arch/arm/mach-exynos/exynos-pmu.h
@@ -33,6 +33,9 @@ struct exynos_pmu_data {
 extern void __iomem *pmu_base_addr;
 /* list of all exported SoC specific data */
 extern const struct exynos_pmu_data exynos3250_pmu_data;
+extern const struct exynos_pmu_data exynos4210_pmu_data;
+extern const struct exynos_pmu_data exynos4212_pmu_data;
+extern const struct exynos_pmu_data exynos4412_pmu_data;
 
 extern void pmu_raw_writel(u32 val, u32 offset);
 extern u32 pmu_raw_readl(u32 offset);
diff --git a/arch/arm/mach-exynos/exynos4-pmu.c 
b/arch/arm/mach-exynos/exynos4-pmu.c
new file mode 100644
index 000..4b0a79e
--- /dev/null
+++ b/arch/arm/mach-exynos/exynos4-pmu.c
@@ -0,0 +1,223 @@
+/*
+ * Copyright (c) 2011-2015 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com/
+ *
+ * EXYNOS4 - CPU PMU(Power Management Unit) support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include 
+#include 
+
+#include "exynos-pmu.h"
+
+static const struct exynos_pmu_conf exynos4210_pmu_config[] = {
+   /* { .offset = offset, .val = { AFTR, LPA, SLEEP } */
+   { S5P_ARM_CORE0_LOWPWR, { 0x0, 0x0, 0x2 } },
+   { S5P_DIS_IRQ_CORE0,{ 0x0, 0x0, 0x0 } },
+   { S5P_DIS_IRQ_CENTRAL0, { 0x0, 0x0, 0x0 } },
+   { S5P_ARM_CORE1_LOWPWR, { 0x0, 0x0, 0x2 } },
+   { S5P_DIS_IRQ_CORE1,{ 0x0, 0x0, 0x0 } },
+   { S5P_DIS_IRQ_CENTRAL1, { 0x0, 0x0, 0x0 } },
+   { S5P_ARM_COMMON_LOWPWR,{ 0x0, 0x0, 0x2 } },
+   { S5P_L2_0_LOWPWR,  { 0x2, 0x2, 0x3 } },
+   { S5P_L2_1_LOWPWR,  { 0x2, 0x2, 0x3 } },
+   { S5P_CMU_ACLKSTOP_LOWPWR,  { 0x1, 0x0, 0x0 } },
+   { S5P_CMU_SCLKSTOP_LOWPWR,  { 0x1, 0x0, 0x0 } },
+   { S5P_CMU_RESET_LOWPWR, { 0x1, 0x1, 0x0 } },
+   { S5P_APLL_SYSCLK_LOWPWR,   { 0x1, 0x0, 0x0 } },
+   { S5P_MPLL_SYSCLK_LOWPWR,   { 0x1, 0x0, 0x0 } },
+   { S5P_VPLL_SYSCLK_LOWPWR,   { 0x1, 0x0, 0x0 } },
+   { S5P_EPLL_SYSCLK_LOWPWR,   { 0x1, 0x1, 0x0 } },
+   { S5P_CMU_CLKSTOP_GPS_ALIVE_LOWPWR, { 0x1, 0x1, 0x0 } },
+   { S5P_CMU_RESET_GPSALIVE_LOWPWR,{ 0x1, 0x1, 0x0 } },
+   { S5P_CMU_CLKSTOP_CAM_LOWPWR,   { 0x1, 0x1, 0x0 } },
+   { S5P_CMU_CLKSTOP_TV_LOWPWR,{ 0x1, 0x1, 0x0 } },
+   { S5P_CMU_CLKSTOP_MFC_LOWPWR,   { 0x1, 0x1, 0x0 } },
+   { S5P_CMU_CLKSTOP_G3D_LOWPWR,   { 0x1, 0x1, 0x0 } },
+   { S5P_CMU_CLKSTOP_LCD0_LOWPWR,  { 0x1, 0x1, 0x0 } },
+   { S5P_CMU_CLKSTOP_LCD1_LOWPWR,  { 0x1, 0x1, 0x0 } },
+   { S5P_CMU_CLKSTOP_MAUDIO_LOWPWR,{ 0x1, 0x1, 0x0 } },
+   { S5P_CMU_CLKSTOP_GPS_LOWPWR,   { 0x1, 0x1, 0x0 } },
+   { S5P_CMU_RESET_CAM_LOWPWR, { 0x1, 0x1, 0x0 } },
+   { S5P_CMU_RESET_TV_LOWPWR,  { 0x1, 0x1, 0x0 } },
+   { S5P_CMU_RESET_MFC_LOWPWR, { 0x1, 0x1, 0x0 } },
+   { S5P_CMU_RESET_G3D_LOWPWR, { 0x1, 0x1, 0x0 } },
+   { S5P_CMU_RESET_LCD0_LOWPWR,{ 0x1, 0x1, 0x0 } },
+   { S5P_CMU_RESET_LCD1_LOWPWR,{ 0x1, 0x1, 0x0 } },
+   { 

[PATCH v7 0/6] samsung: pmu: split up SoC specific PMU data

[Pankaj Dubey]

In this series I am splitting up SoC specific PMU configuration data into
mach-exynos folder itself, before moving all of them under
drivers/soc/samsung/. Also instead of making all changes in single patch it
has been broken into SoC specific patches to avoid large size of patch.
With this approach there will not be unwanted big churns just after
adding exynos-pmu under drivers/soc/samsung.

All these patches are just refactoring to keep minimal changes while moving
exynos-pmu driver under drivers/soc/samsung/. Support for exynos7 PMU can
be added on top of it, in such a manner that for ARM64 build, ARM related
SoC's PMU will not get compiled and thus unnecessary increasing kernel image 
size.

This series have been prepared on top of Krzysztof Kozlowski's 
next/stuff-late-not-split-per-branch branch, and it's just a rebase compared to
V6 posted and reviewed here [1]. 

[1]: https://lkml.org/lkml/2015/11/17/15

For testing entire patchset on Peach-Pi (Exynos5880) based chromebook for boot
and S2R functionality.

Tested-by: Pankaj Dubey 

For testing entire patchset on on Trats2 (Exynos4412, S2R, reboot, poweroff)
and Odroid XU3 (Exynos5422, reboot, poweroff).

Tested-by: Krzysztof Kozlowski 

Changes since v6:
 - Rebasing on top of branch provided by Krzysztof, after resolving conflicts 
   caused due to Alim's patches for adoptation of generic syscon for poweroff, 
reboot.
 - Included Tested-by tags on individual patches as per applicability.
 - Dropped patches v6 [1/9], v6 [2/9] as these are already present in above 
mentioned branch.
 - Dropped patch v6 [8/9] as after Alim's patch this patch no more required.

Changes since v5:
 - Removed extra blank line from patch 5/9 and 6/9.
 - Modified soc/samsung/Kconfig for config EXNOS_PMU. Added depends on ARM.

Changes since v4:
 - In v3 I missed to give -M flag to detect rename, which made patches hard
   to review, so resubmitting patches with rename detector flag.
 - Addressed review comments from Krzysztof.

Changes since v3:
 - Keeping intact copyright dates in existing header files.
 - Addressed review comments from Krzysztof for v3.
 - Removing static inline function from exynos-pmu.h and
   keeping them in PMU driver.
 - Added new patch (2/9) for fixing potential null pointer reference in
   exynos_sys_powerdown_conf.
 - Added new patch (8/9) for rearranging static and non-static function for
   better readability.

Changes since v2:
 - Removed Amit's Samsung id as it's no more valid.
 - Rebased on latest kgene tree.
 - Removed redundant code from regs-pmu.h

Pankaj Dubey (6):
  ARM: EXYNOS: Move pmu specific headers under "linux/soc/samsung"
  ARM: EXYNOS: split up exynos3250 SoC specific PMU data
  ARM: EXYNOS: split up exynos4 SoC specific PMU data
  ARM: EXYNOS: split up exynos5250 SoC specific PMU data
  ARM: EXYNOS: split up exynos5420 SoC specific PMU data
  drivers: soc: Add support for Exynos PMU driver

 arch/arm/mach-exynos/Kconfig   |   1 +
 arch/arm/mach-exynos/Makefile  |   2 +-
 arch/arm/mach-exynos/exynos.c  |   4 +-
 arch/arm/mach-exynos/mcpm-exynos.c |   2 +-
 arch/arm/mach-exynos/platsmp.c |   2 +-
 arch/arm/mach-exynos/pm.c  |   4 +-
 arch/arm/mach-exynos/pmu.c | 967 -
 arch/arm/mach-exynos/suspend.c |   4 +-
 drivers/soc/samsung/Kconfig|   4 +
 drivers/soc/samsung/Makefile   |   2 +
 drivers/soc/samsung/exynos-pmu.c   | 141 +++
 drivers/soc/samsung/exynos-pmu.h   |  44 +
 drivers/soc/samsung/exynos3250-pmu.c   | 175 
 drivers/soc/samsung/exynos4-pmu.c  | 223 +
 drivers/soc/samsung/exynos5250-pmu.c   | 196 +
 drivers/soc/samsung/exynos5420-pmu.c   | 280 ++
 .../linux/soc/samsung}/exynos-pmu.h|   6 +-
 .../linux/soc/samsung/exynos-regs-pmu.h|   6 +-
 18 files changed, 1080 insertions(+), 983 deletions(-)
 delete mode 100644 arch/arm/mach-exynos/pmu.c
 create mode 100644 drivers/soc/samsung/exynos-pmu.c
 create mode 100644 drivers/soc/samsung/exynos-pmu.h
 create mode 100644 drivers/soc/samsung/exynos3250-pmu.c
 create mode 100644 drivers/soc/samsung/exynos4-pmu.c
 create mode 100644 drivers/soc/samsung/exynos5250-pmu.c
 create mode 100644 drivers/soc/samsung/exynos5420-pmu.c
 rename {arch/arm/mach-exynos => include/linux/soc/samsung}/exynos-pmu.h (81%)
 rename arch/arm/mach-exynos/regs-pmu.h => 
include/linux/soc/samsung/exynos-regs-pmu.h (99%)

-- 
2.4.5

--
To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v7 5/6] ARM: EXYNOS: split up exynos5420 SoC specific PMU data

[Pankaj Dubey]

This patch splits up mach-exynos/pmu.c file, and moves exynos5420,
PMU configuration data and functions handing data into exynos5420
SoC specific PMU file mach-exynos/exynos5420-pmu.c.

Signed-off-by: Pankaj Dubey 
Reviewed-by: Krzysztof Kozlowski 
[for testing on Peach-Pi (Exynos5880)]
Tested-by: Pankaj Dubey 
---
 arch/arm/mach-exynos/Makefile |   2 +-
 arch/arm/mach-exynos/exynos-pmu.h |   1 +
 arch/arm/mach-exynos/exynos5420-pmu.c | 280 ++
 arch/arm/mach-exynos/pmu.c| 263 ---
 4 files changed, 282 insertions(+), 264 deletions(-)
 create mode 100644 arch/arm/mach-exynos/exynos5420-pmu.c

diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index bfb23a5..2d58063 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -11,7 +11,7 @@ ccflags-$(CONFIG_ARCH_MULTIPLATFORM) += 
-I$(srctree)/$(src)/include -I$(srctree)
 
 obj-$(CONFIG_ARCH_EXYNOS)  += exynos.o pmu.o exynos-smc.o firmware.o \
exynos3250-pmu.o exynos4-pmu.o \
-   exynos5250-pmu.o
+   exynos5250-pmu.o exynos5420-pmu.o
 
 obj-$(CONFIG_EXYNOS_CPU_SUSPEND) += pm.o sleep.o
 obj-$(CONFIG_PM_SLEEP) += suspend.o
diff --git a/arch/arm/mach-exynos/exynos-pmu.h 
b/arch/arm/mach-exynos/exynos-pmu.h
index 85c858d..a469e36 100644
--- a/arch/arm/mach-exynos/exynos-pmu.h
+++ b/arch/arm/mach-exynos/exynos-pmu.h
@@ -37,6 +37,7 @@ extern const struct exynos_pmu_data exynos4210_pmu_data;
 extern const struct exynos_pmu_data exynos4212_pmu_data;
 extern const struct exynos_pmu_data exynos4412_pmu_data;
 extern const struct exynos_pmu_data exynos5250_pmu_data;
+extern const struct exynos_pmu_data exynos5420_pmu_data;
 
 extern void pmu_raw_writel(u32 val, u32 offset);
 extern u32 pmu_raw_readl(u32 offset);
diff --git a/arch/arm/mach-exynos/exynos5420-pmu.c 
b/arch/arm/mach-exynos/exynos5420-pmu.c
new file mode 100644
index 000..b962fb6
--- /dev/null
+++ b/arch/arm/mach-exynos/exynos5420-pmu.c
@@ -0,0 +1,280 @@
+/*
+ * Copyright (c) 2011-2015 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com/
+ *
+ * EXYNOS5420 - CPU PMU (Power Management Unit) support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include 
+#include 
+#include 
+
+#include 
+
+#include "exynos-pmu.h"
+
+static struct exynos_pmu_conf exynos5420_pmu_config[] = {
+   /* { .offset = offset, .val = { AFTR, LPA, SLEEP } */
+   { EXYNOS5_ARM_CORE0_SYS_PWR_REG,{ 0x0, 0x0, 0x0} },
+   { EXYNOS5_DIS_IRQ_ARM_CORE0_LOCAL_SYS_PWR_REG,  { 0x0, 0x0, 0x0} },
+   { EXYNOS5_DIS_IRQ_ARM_CORE0_CENTRAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+   { EXYNOS5_ARM_CORE1_SYS_PWR_REG,{ 0x0, 0x0, 0x0} },
+   { EXYNOS5_DIS_IRQ_ARM_CORE1_LOCAL_SYS_PWR_REG,  { 0x0, 0x0, 0x0} },
+   { EXYNOS5_DIS_IRQ_ARM_CORE1_CENTRAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+   { EXYNOS5420_ARM_CORE2_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+   { EXYNOS5420_DIS_IRQ_ARM_CORE2_LOCAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+   { EXYNOS5420_DIS_IRQ_ARM_CORE2_CENTRAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+   { EXYNOS5420_ARM_CORE3_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+   { EXYNOS5420_DIS_IRQ_ARM_CORE3_LOCAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+   { EXYNOS5420_DIS_IRQ_ARM_CORE3_CENTRAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+   { EXYNOS5420_KFC_CORE0_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+   { EXYNOS5420_DIS_IRQ_KFC_CORE0_LOCAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+   { EXYNOS5420_DIS_IRQ_KFC_CORE0_CENTRAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+   { EXYNOS5420_KFC_CORE1_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+   { EXYNOS5420_DIS_IRQ_KFC_CORE1_LOCAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+   { EXYNOS5420_DIS_IRQ_KFC_CORE1_CENTRAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+   { EXYNOS5420_KFC_CORE2_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+   { EXYNOS5420_DIS_IRQ_KFC_CORE2_LOCAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+   { EXYNOS5420_DIS_IRQ_KFC_CORE2_CENTRAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+   { EXYNOS5420_KFC_CORE3_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+   { EXYNOS5420_DIS_IRQ_KFC_CORE3_LOCAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+   { EXYNOS5420_DIS_IRQ_KFC_CORE3_CENTRAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+   { EXYNOS5_ISP_ARM_SYS_PWR_REG,  { 0x1, 0x0, 0x0} },
+   { EXYNOS5_DIS_IRQ_ISP_ARM_LOCAL_SYS_PWR_REG,{ 0x1, 0x0, 0x0} },
+   { EXYNOS5_DIS_IRQ_ISP_ARM_CENTRAL_SYS_PWR_REG,  { 0x1, 0x0, 0x0} },
+   { EXYNOS5420_ARM_COMMON_SYS_PWR_REG,{ 0x0, 0x0, 0x0} },
+   { EXYNOS5420_KFC_COMMON_SYS_PWR_REG,  

[PATCH v7 2/6] ARM: EXYNOS: split up exynos3250 SoC specific PMU data

[Pankaj Dubey]

This patch splits up mach-exynos/pmu.c file, and moves exynos3250 PMU
configuration data and functions handing those data into exynos3250
SoC specific PMU file mach-exynos/exynos3250-pmu.c.

Signed-off-by: Pankaj Dubey 
Reviewed-by: Krzysztof Kozlowski 
---
 arch/arm/mach-exynos/Makefile |   2 +-
 arch/arm/mach-exynos/exynos-pmu.h |  39 +++
 arch/arm/mach-exynos/exynos.c |   2 -
 arch/arm/mach-exynos/exynos3250-pmu.c | 175 
 arch/arm/mach-exynos/pmu.c| 184 +-
 5 files changed, 219 insertions(+), 183 deletions(-)
 create mode 100644 arch/arm/mach-exynos/exynos-pmu.h
 create mode 100644 arch/arm/mach-exynos/exynos3250-pmu.c

diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index 2f30676..e869f86 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -9,7 +9,7 @@ ccflags-$(CONFIG_ARCH_MULTIPLATFORM) += 
-I$(srctree)/$(src)/include -I$(srctree)
 
 # Core
 
-obj-$(CONFIG_ARCH_EXYNOS)  += exynos.o pmu.o exynos-smc.o firmware.o
+obj-$(CONFIG_ARCH_EXYNOS)  += exynos.o pmu.o exynos-smc.o firmware.o 
exynos3250-pmu.o
 
 obj-$(CONFIG_EXYNOS_CPU_SUSPEND) += pm.o sleep.o
 obj-$(CONFIG_PM_SLEEP) += suspend.o
diff --git a/arch/arm/mach-exynos/exynos-pmu.h 
b/arch/arm/mach-exynos/exynos-pmu.h
new file mode 100644
index 000..5d09fa3
--- /dev/null
+++ b/arch/arm/mach-exynos/exynos-pmu.h
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2015 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * Header for EXYNOS PMU Driver support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __EXYNOS_PMU_H
+#define __EXYNOS_PMU_H
+
+#include 
+
+#define PMU_TABLE_END  (-1U)
+
+struct exynos_pmu_conf {
+   unsigned int offset;
+   u8 val[NUM_SYS_POWERDOWN];
+};
+
+struct exynos_pmu_data {
+   const struct exynos_pmu_conf *pmu_config;
+   const struct exynos_pmu_conf *pmu_config_extra;
+
+   void (*pmu_init)(void);
+   void (*powerdown_conf)(enum sys_powerdown);
+   void (*powerdown_conf_extra)(enum sys_powerdown);
+};
+
+extern void __iomem *pmu_base_addr;
+/* list of all exported SoC specific data */
+extern const struct exynos_pmu_data exynos3250_pmu_data;
+
+extern void pmu_raw_writel(u32 val, u32 offset);
+extern u32 pmu_raw_readl(u32 offset);
+#endif /* __EXYNOS_PMU_H */
diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index 5d68ce8..ce368c8 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -33,8 +33,6 @@
 #include "common.h"
 #include "mfc.h"
 
-void __iomem *pmu_base_addr;
-
 static struct map_desc exynos4_iodesc[] __initdata = {
{
.virtual= (unsigned long)S5P_VA_CMU,
diff --git a/arch/arm/mach-exynos/exynos3250-pmu.c 
b/arch/arm/mach-exynos/exynos3250-pmu.c
new file mode 100644
index 000..20b3ab8
--- /dev/null
+++ b/arch/arm/mach-exynos/exynos3250-pmu.c
@@ -0,0 +1,175 @@
+/*
+ * Copyright (c) 2011-2015 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com/
+ *
+ * EXYNOS3250 - CPU PMU (Power Management Unit) support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include 
+#include 
+
+#include "exynos-pmu.h"
+
+static struct exynos_pmu_conf exynos3250_pmu_config[] = {
+   /* { .offset = offset, .val = { AFTR, W-AFTR, SLEEP } */
+   { EXYNOS3_ARM_CORE0_SYS_PWR_REG,{ 0x0, 0x0, 0x2} },
+   { EXYNOS3_DIS_IRQ_ARM_CORE0_LOCAL_SYS_PWR_REG,  { 0x0, 0x0, 0x0} },
+   { EXYNOS3_DIS_IRQ_ARM_CORE0_CENTRAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+   { EXYNOS3_ARM_CORE1_SYS_PWR_REG,{ 0x0, 0x0, 0x2} },
+   { EXYNOS3_DIS_IRQ_ARM_CORE1_LOCAL_SYS_PWR_REG,  { 0x0, 0x0, 0x0} },
+   { EXYNOS3_DIS_IRQ_ARM_CORE1_CENTRAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+   { EXYNOS3_ISP_ARM_SYS_PWR_REG,  { 0x1, 0x0, 0x0} },
+   { EXYNOS3_DIS_IRQ_ISP_ARM_LOCAL_SYS_PWR_REG,{ 0x0, 0x0, 0x0} },
+   { EXYNOS3_DIS_IRQ_ISP_ARM_CENTRAL_SYS_PWR_REG,  { 0x0, 0x0, 0x0} },
+   { EXYNOS3_ARM_COMMON_SYS_PWR_REG,   { 0x0, 0x0, 0x2} },
+   { EXYNOS3_ARM_L2_SYS_PWR_REG,   { 0x0, 0x0, 0x3} },
+   { EXYNOS3_CMU_ACLKSTOP_SYS_PWR_REG, { 0x1, 0x1, 0x0} },
+   { EXYNOS3_CMU_SCLKSTOP_SYS_PWR_REG, { 0x1, 0x1, 0x0} },
+   { EXYNOS3_CMU_RESET_SYS_PWR_REG,{ 0x1, 0x1, 0x0} },
+   { EXYNOS3_DRAM_FREQ_DOWN_SYS_PWR_REG,   { 0x1, 0x1, 0x1} },
+   { EXYNOS3_DDRPHY_DLLOFF_SYS_PWR_REG,{ 0x1, 0x1, 0x1} },
+   { 

[PATCH v7 4/6] ARM: EXYNOS: split up exynos5250 SoC specific PMU data

[Pankaj Dubey]

This patch splits up mach-exynos/pmu.c file, and moves exynos5250,
PMU configuration data and functions handing data into exynos5250
SoC specific PMU file mach-exynos/exynos5250-pmu.c.

Signed-off-by: Pankaj Dubey 
Reviewed-by: Krzysztof Kozlowski 
---
 arch/arm/mach-exynos/Makefile |   4 +-
 arch/arm/mach-exynos/exynos-pmu.h |   1 +
 arch/arm/mach-exynos/exynos5250-pmu.c | 196 ++
 arch/arm/mach-exynos/pmu.c| 180 ---
 4 files changed, 200 insertions(+), 181 deletions(-)
 create mode 100644 arch/arm/mach-exynos/exynos5250-pmu.c

diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index 8969683..bfb23a5 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -9,7 +9,9 @@ ccflags-$(CONFIG_ARCH_MULTIPLATFORM) += 
-I$(srctree)/$(src)/include -I$(srctree)
 
 # Core
 
-obj-$(CONFIG_ARCH_EXYNOS)  += exynos.o pmu.o exynos-smc.o firmware.o 
exynos3250-pmu.o exynos4-pmu.o
+obj-$(CONFIG_ARCH_EXYNOS)  += exynos.o pmu.o exynos-smc.o firmware.o \
+   exynos3250-pmu.o exynos4-pmu.o \
+   exynos5250-pmu.o
 
 obj-$(CONFIG_EXYNOS_CPU_SUSPEND) += pm.o sleep.o
 obj-$(CONFIG_PM_SLEEP) += suspend.o
diff --git a/arch/arm/mach-exynos/exynos-pmu.h 
b/arch/arm/mach-exynos/exynos-pmu.h
index 3d21aad..85c858d 100644
--- a/arch/arm/mach-exynos/exynos-pmu.h
+++ b/arch/arm/mach-exynos/exynos-pmu.h
@@ -36,6 +36,7 @@ extern const struct exynos_pmu_data exynos3250_pmu_data;
 extern const struct exynos_pmu_data exynos4210_pmu_data;
 extern const struct exynos_pmu_data exynos4212_pmu_data;
 extern const struct exynos_pmu_data exynos4412_pmu_data;
+extern const struct exynos_pmu_data exynos5250_pmu_data;
 
 extern void pmu_raw_writel(u32 val, u32 offset);
 extern u32 pmu_raw_readl(u32 offset);
diff --git a/arch/arm/mach-exynos/exynos5250-pmu.c 
b/arch/arm/mach-exynos/exynos5250-pmu.c
new file mode 100644
index 000..a6d4188
--- /dev/null
+++ b/arch/arm/mach-exynos/exynos5250-pmu.c
@@ -0,0 +1,196 @@
+/*
+ * Copyright (c) 2011-2015 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com/
+ *
+ * EXYNOS5250 - CPU PMU (Power Management Unit) support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include 
+#include 
+
+#include "exynos-pmu.h"
+
+static const struct exynos_pmu_conf exynos5250_pmu_config[] = {
+   /* { .offset = offset, .val = { AFTR, LPA, SLEEP } */
+   { EXYNOS5_ARM_CORE0_SYS_PWR_REG,{ 0x0, 0x0, 0x2} },
+   { EXYNOS5_DIS_IRQ_ARM_CORE0_LOCAL_SYS_PWR_REG,  { 0x0, 0x0, 0x0} },
+   { EXYNOS5_DIS_IRQ_ARM_CORE0_CENTRAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+   { EXYNOS5_ARM_CORE1_SYS_PWR_REG,{ 0x0, 0x0, 0x2} },
+   { EXYNOS5_DIS_IRQ_ARM_CORE1_LOCAL_SYS_PWR_REG,  { 0x0, 0x0, 0x0} },
+   { EXYNOS5_DIS_IRQ_ARM_CORE1_CENTRAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+   { EXYNOS5_FSYS_ARM_SYS_PWR_REG, { 0x1, 0x0, 0x0} },
+   { EXYNOS5_DIS_IRQ_FSYS_ARM_CENTRAL_SYS_PWR_REG, { 0x1, 0x1, 0x1} },
+   { EXYNOS5_ISP_ARM_SYS_PWR_REG,  { 0x1, 0x0, 0x0} },
+   { EXYNOS5_DIS_IRQ_ISP_ARM_LOCAL_SYS_PWR_REG,{ 0x0, 0x0, 0x0} },
+   { EXYNOS5_DIS_IRQ_ISP_ARM_CENTRAL_SYS_PWR_REG,  { 0x0, 0x0, 0x0} },
+   { EXYNOS5_ARM_COMMON_SYS_PWR_REG,   { 0x0, 0x0, 0x2} },
+   { EXYNOS5_ARM_L2_SYS_PWR_REG,   { 0x3, 0x3, 0x3} },
+   { EXYNOS5_ARM_L2_OPTION,{ 0x10, 0x10, 0x0 } },
+   { EXYNOS5_CMU_ACLKSTOP_SYS_PWR_REG, { 0x1, 0x0, 0x1} },
+   { EXYNOS5_CMU_SCLKSTOP_SYS_PWR_REG, { 0x1, 0x0, 0x1} },
+   { EXYNOS5_CMU_RESET_SYS_PWR_REG,{ 0x1, 0x1, 0x0} },
+   { EXYNOS5_CMU_ACLKSTOP_SYSMEM_SYS_PWR_REG,  { 0x1, 0x0, 0x1} },
+   { EXYNOS5_CMU_SCLKSTOP_SYSMEM_SYS_PWR_REG,  { 0x1, 0x0, 0x1} },
+   { EXYNOS5_CMU_RESET_SYSMEM_SYS_PWR_REG, { 0x1, 0x1, 0x0} },
+   { EXYNOS5_DRAM_FREQ_DOWN_SYS_PWR_REG,   { 0x1, 0x1, 0x1} },
+   { EXYNOS5_DDRPHY_DLLOFF_SYS_PWR_REG,{ 0x1, 0x1, 0x1} },
+   { EXYNOS5_DDRPHY_DLLLOCK_SYS_PWR_REG,   { 0x1, 0x1, 0x1} },
+   { EXYNOS5_APLL_SYSCLK_SYS_PWR_REG,  { 0x1, 0x0, 0x0} },
+   { EXYNOS5_MPLL_SYSCLK_SYS_PWR_REG,  { 0x1, 0x0, 0x0} },
+   { EXYNOS5_VPLL_SYSCLK_SYS_PWR_REG,  { 0x1, 0x0, 0x0} },
+   { EXYNOS5_EPLL_SYSCLK_SYS_PWR_REG,  { 0x1, 0x1, 0x0} },
+   { EXYNOS5_BPLL_SYSCLK_SYS_PWR_REG,  { 0x1, 0x0, 0x0} },
+   { EXYNOS5_CPLL_SYSCLK_SYS_PWR_REG,  { 0x1, 0x0, 0x0} },
+   { EXYNOS5_MPLLUSER_SYSCLK_SYS_PWR_REG,  { 0x1, 0x0, 0x0} },
+  

[PATCH v7 1/6] ARM: EXYNOS: Move pmu specific headers under "linux/soc/samsung"

[Pankaj Dubey]

Moving Exynos PMU specific header file into "include/linux/soc/samsung"
thus updated affected files under "mach-exynos" to use new location of
these header files.

Signed-off-by: Amit Daniel Kachhap 
Signed-off-by: Pankaj Dubey 
Reviewed-by: Krzysztof Kozlowski 
[for testing on Trats2 (Exynos4412) and Odroid XU3 (Exynos5422)]
Tested-by: Krzysztof Kozlowski 
[for testing on Peach-Pi (Exynos5880)]
Tested-by: Pankaj Dubey 
---
 arch/arm/mach-exynos/exynos.c   | 2 +-
 arch/arm/mach-exynos/mcpm-exynos.c  | 2 +-
 arch/arm/mach-exynos/platsmp.c  | 2 +-
 arch/arm/mach-exynos/pm.c   | 4 ++--
 arch/arm/mach-exynos/pmu.c  | 6 +++---
 arch/arm/mach-exynos/suspend.c  | 4 ++--
 {arch/arm/mach-exynos => include/linux/soc/samsung}/exynos-pmu.h| 6 +++---
 .../regs-pmu.h => include/linux/soc/samsung/exynos-regs-pmu.h   | 6 +++---
 8 files changed, 16 insertions(+), 16 deletions(-)
 rename {arch/arm/mach-exynos => include/linux/soc/samsung}/exynos-pmu.h (81%)
 rename arch/arm/mach-exynos/regs-pmu.h => 
include/linux/soc/samsung/exynos-regs-pmu.h (99%)

diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index 4ffb90e..5d68ce8 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -20,6 +20,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 #include 
@@ -31,7 +32,6 @@
 
 #include "common.h"
 #include "mfc.h"
-#include "regs-pmu.h"
 
 void __iomem *pmu_base_addr;
 
diff --git a/arch/arm/mach-exynos/mcpm-exynos.c 
b/arch/arm/mach-exynos/mcpm-exynos.c
index 5697819..f086bf6 100644
--- a/arch/arm/mach-exynos/mcpm-exynos.c
+++ b/arch/arm/mach-exynos/mcpm-exynos.c
@@ -16,13 +16,13 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 #include 
 #include 
 #include 
 
-#include "regs-pmu.h"
 #include "common.h"
 
 #define EXYNOS5420_CPUS_PER_CLUSTER4
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index 98a2c0c..d5caf30 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -20,6 +20,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 #include 
@@ -30,7 +31,6 @@
 #include 
 
 #include "common.h"
-#include "regs-pmu.h"
 
 extern void exynos4_secondary_startup(void);
 
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index 9c1506b..b9b9186 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -18,6 +18,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 
 #include 
 #include 
@@ -29,8 +31,6 @@
 #include 
 
 #include "common.h"
-#include "exynos-pmu.h"
-#include "regs-pmu.h"
 
 static inline void __iomem *exynos_boot_vector_addr(void)
 {
diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c
index dbf9fe9..2ff1956 100644
--- a/arch/arm/mach-exynos/pmu.c
+++ b/arch/arm/mach-exynos/pmu.c
@@ -15,10 +15,10 @@
 #include 
 #include 
 
-#include 
+#include 
+#include 
 
-#include "exynos-pmu.h"
-#include "regs-pmu.h"
+#include 
 
 #define PMU_TABLE_END  (-1U)
 
diff --git a/arch/arm/mach-exynos/suspend.c b/arch/arm/mach-exynos/suspend.c
index 237653e..f216909 100644
--- a/arch/arm/mach-exynos/suspend.c
+++ b/arch/arm/mach-exynos/suspend.c
@@ -24,6 +24,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 
 #include 
 #include 
@@ -37,8 +39,6 @@
 #include 
 
 #include "common.h"
-#include "exynos-pmu.h"
-#include "regs-pmu.h"
 
 #define REG_TABLE_END (-1U)
 
diff --git a/arch/arm/mach-exynos/exynos-pmu.h 
b/include/linux/soc/samsung/exynos-pmu.h
similarity index 81%
rename from arch/arm/mach-exynos/exynos-pmu.h
rename to include/linux/soc/samsung/exynos-pmu.h
index a2ab0d5..e2e9de1 100644
--- a/arch/arm/mach-exynos/exynos-pmu.h
+++ b/include/linux/soc/samsung/exynos-pmu.h
@@ -9,8 +9,8 @@
  * published by the Free Software Foundation.
  */
 
-#ifndef __EXYNOS_PMU_H
-#define __EXYNOS_PMU_H
+#ifndef __LINUX_SOC_EXYNOS_PMU_H
+#define __LINUX_SOC_EXYNOS_PMU_H
 
 enum sys_powerdown {
SYS_AFTR,
@@ -21,4 +21,4 @@ enum sys_powerdown {
 
 extern void exynos_sys_powerdown_conf(enum sys_powerdown mode);
 
-#endif /* __EXYNOS_PMU_H */
+#endif /* __LINUX_SOC_EXYNOS_PMU_H */
diff --git a/arch/arm/mach-exynos/regs-pmu.h 
b/include/linux/soc/samsung/exynos-regs-pmu.h
similarity index 99%
rename from arch/arm/mach-exynos/regs-pmu.h
rename to include/linux/soc/samsung/exynos-regs-pmu.h
index 5e4f4c2..d30186e 100644
--- a/arch/arm/mach-exynos/regs-pmu.h
+++ b/include/linux/soc/samsung/exynos-regs-pmu.h
@@ -9,8 +9,8 @@
  * published by the Free Software Foundation.
 */
 
-#ifndef __ASM_ARCH_REGS_PMU_H
-#define __ASM_ARCH_REGS_PMU_H __FILE__
+#ifndef __LINUX_SOC_EXYNOS_REGS_PMU_H
+#define 

[PATCH v7 6/6] drivers: soc: Add support for Exynos PMU driver

[Pankaj Dubey]

This patch moves Exynos PMU driver implementation from "arm/mach-exynos"
to "drivers/soc/samsung". This driver is mainly used for setting misc
bits of register from PMU IP of Exynos SoC which will be required to
configure before Suspend/Resume. Currently all these settings are done
in "arch/arm/mach-exynos/pmu.c" but moving ahead for ARM64 based SoC
support, there is a need of this PMU driver in driver/* folder.

This driver uses existing DT binding information and there should
be no functionality change in the supported platforms.

Signed-off-by: Amit Daniel Kachhap 
Signed-off-by: Pankaj Dubey 
Reviewed-by: Krzysztof Kozlowski 
[for testing on Trats2 (Exynos4412) and Odroid XU3 (Exynos5422)]
Tested-by: Krzysztof Kozlowski 
[for testing on Peach-Pi (Exynos5880)]
Tested-by: Pankaj Dubey 
---
 arch/arm/mach-exynos/Kconfig   | 1 +
 arch/arm/mach-exynos/Makefile  | 4 +---
 drivers/soc/samsung/Kconfig| 4 
 drivers/soc/samsung/Makefile   | 2 ++
 arch/arm/mach-exynos/pmu.c => drivers/soc/samsung/exynos-pmu.c | 0
 {arch/arm/mach-exynos => drivers/soc/samsung}/exynos-pmu.h | 0
 {arch/arm/mach-exynos => drivers/soc/samsung}/exynos3250-pmu.c | 0
 {arch/arm/mach-exynos => drivers/soc/samsung}/exynos4-pmu.c| 0
 {arch/arm/mach-exynos => drivers/soc/samsung}/exynos5250-pmu.c | 0
 {arch/arm/mach-exynos => drivers/soc/samsung}/exynos5420-pmu.c | 0
 10 files changed, 8 insertions(+), 3 deletions(-)
 rename arch/arm/mach-exynos/pmu.c => drivers/soc/samsung/exynos-pmu.c (100%)
 rename {arch/arm/mach-exynos => drivers/soc/samsung}/exynos-pmu.h (100%)
 rename {arch/arm/mach-exynos => drivers/soc/samsung}/exynos3250-pmu.c (100%)
 rename {arch/arm/mach-exynos => drivers/soc/samsung}/exynos4-pmu.c (100%)
 rename {arch/arm/mach-exynos => drivers/soc/samsung}/exynos5250-pmu.c (100%)
 rename {arch/arm/mach-exynos => drivers/soc/samsung}/exynos5420-pmu.c (100%)

diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 782ed7d..57f0ba8 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -16,6 +16,7 @@ menuconfig ARCH_EXYNOS
select ARM_GIC
select COMMON_CLK_SAMSUNG
select EXYNOS_THERMAL
+   select EXYNOS_PMU
select EXYNOS_SROM
select HAVE_ARM_SCU if SMP
select HAVE_S3C2410_I2C if I2C
diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index 2d58063..34d29df 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -9,9 +9,7 @@ ccflags-$(CONFIG_ARCH_MULTIPLATFORM) += 
-I$(srctree)/$(src)/include -I$(srctree)
 
 # Core
 
-obj-$(CONFIG_ARCH_EXYNOS)  += exynos.o pmu.o exynos-smc.o firmware.o \
-   exynos3250-pmu.o exynos4-pmu.o \
-   exynos5250-pmu.o exynos5420-pmu.o
+obj-$(CONFIG_ARCH_EXYNOS)  += exynos.o exynos-smc.o firmware.o
 
 obj-$(CONFIG_EXYNOS_CPU_SUSPEND) += pm.o sleep.o
 obj-$(CONFIG_PM_SLEEP) += suspend.o
diff --git a/drivers/soc/samsung/Kconfig b/drivers/soc/samsung/Kconfig
index ea4bc2a..895f169 100644
--- a/drivers/soc/samsung/Kconfig
+++ b/drivers/soc/samsung/Kconfig
@@ -10,4 +10,8 @@ config EXYNOS_SROM
bool
depends on ARM && ARCH_EXYNOS
 
+config EXYNOS_PMU
+   bool
+   depends on ARM && ARCH_EXYNOS
+
 endmenu
diff --git a/drivers/soc/samsung/Makefile b/drivers/soc/samsung/Makefile
index 9c554d5..cef7970 100644
--- a/drivers/soc/samsung/Makefile
+++ b/drivers/soc/samsung/Makefile
@@ -1 +1,3 @@
 obj-$(CONFIG_EXYNOS_SROM)  += exynos-srom.o
+obj-$(CONFIG_EXYNOS_PMU)   += exynos-pmu.o exynos3250-pmu.o exynos4-pmu.o \
+   exynos5250-pmu.o exynos5420-pmu.o
diff --git a/arch/arm/mach-exynos/pmu.c b/drivers/soc/samsung/exynos-pmu.c
similarity index 100%
rename from arch/arm/mach-exynos/pmu.c
rename to drivers/soc/samsung/exynos-pmu.c
diff --git a/arch/arm/mach-exynos/exynos-pmu.h 
b/drivers/soc/samsung/exynos-pmu.h
similarity index 100%
rename from arch/arm/mach-exynos/exynos-pmu.h
rename to drivers/soc/samsung/exynos-pmu.h
diff --git a/arch/arm/mach-exynos/exynos3250-pmu.c 
b/drivers/soc/samsung/exynos3250-pmu.c
similarity index 100%
rename from arch/arm/mach-exynos/exynos3250-pmu.c
rename to drivers/soc/samsung/exynos3250-pmu.c
diff --git a/arch/arm/mach-exynos/exynos4-pmu.c 
b/drivers/soc/samsung/exynos4-pmu.c
similarity index 100%
rename from arch/arm/mach-exynos/exynos4-pmu.c
rename to drivers/soc/samsung/exynos4-pmu.c
diff --git a/arch/arm/mach-exynos/exynos5250-pmu.c 
b/drivers/soc/samsung/exynos5250-pmu.c
similarity index 100%
rename from arch/arm/mach-exynos/exynos5250-pmu.c
rename to drivers/soc/samsung/exynos5250-pmu.c
diff --git 

Re: [RESEND PATCH v5 0/8] Add support for Exynos SROM Controller driver

[pankaj.dubey]

Hi Krzysztof,

On Thursday 17 December 2015 10:44 AM, Krzysztof Kozlowski wrote:
> On 12.12.2015 16:43, Pankaj Dubey wrote:
>> THIS IS A RESEND OF ONCE MERGED INTO kgene/for-next AND LOST PATCHES
>>
>> Series v5 got merged in kgene/for-next but due to last moment change before 
>> pull
>> these patches were not accepted during 4.3 merge window.After that 
>> kgene/for-next
>> got rebased over 4.4-rc1 these patches got dropped into another branch and 
>> till
>> date not included to for-next.
>>
>> Since then due to minor change in "drivers/soc/", patches are not getting 
>> applied
>> cleanly so rebasing on current for-next and resending all these with fix in 
>> memory
>> mapping included.
>>
>>
>> This patch set adds support for Exynos SROM controller DT based driver.
>> Currently SROM register sets are used only during S2R, so driver
>> basically added for taking care of S2R. It will help us in removing
>> static mapping from exynos.c and other extra code handline during S2R.
>>
>> This patch set also updated exynos4 and exynos5 dtsi files for with device
>> node for srom, and added binding documentation for the same.
>>
>> First two patches are some minor cleanup in mach-exynos.
>>
>> Patchset v1 was posted here[1]
>> [1]: https://lkml.org/lkml/2015/4/29/98
>> Patchset v2 was posted here[2]
>> [2]: https://lkml.org/lkml/2015/8/24/125
>> Patchset v3 was posted here[3]
>> [3]: https://lkml.org/lkml/2015/10/13/392
>> Patchset v3 was posted here[4]
>> [4]: https://lkml.org/lkml/2015/10/19/278
>>
>> This patchset, I have tested on Peach-Pi (Exynos5880) based chromebook for 
>> boot
>> and S2R functionality.
> 
> Let me share the plan/status:

Thanks for sharing status on this.

> 1. Currently Kukjin Kim is on out of office (he told me he will be back
> on Christmas).
> 2. I asked arm-soc people to pull my requests.
> 
> 3. I applied this patchset to my branch:
> next/stuff-late-not-split-per-branch
> https://git.kernel.org/cgit/linux/kernel/git/krzk/linux.git/log/?h=next/stuff-late-not-split-per-branch
> 
> 4. This branch is not pushed to linux-next. I will sort it out if my
> previous pull requests get in. I will be out of office for Christmas so
> depending on the timing of arm-soc/Christmas/Kukjin this may or may not
> go into v4.5 (yay...).
> 

I am fine in either way. But prefer if it goes in v4.5, just to save
time in rebasing.

> 5. If it does not get into v4.5, I will rebase it and proceed further
> for v4.6.
> 
> If you have any questions, please let me know.
> 
> Best regards,
> Krzysztof
> 
> 

Thanks,
Pankaj Dubey
--
To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH v6 0/9] samsung: pmu: split up SoC specific PMU data

[pankaj.dubey]

Hi Krzysztof,

On Thursday 17 December 2015 11:01 AM, Krzysztof Kozlowski wrote:
> On 17.11.2015 15:05, Pankaj Dubey wrote:
>> In this series I am splitting up SoC specific PMU configuration data into
>> mach-exynos folder itself, before moving all of them under
>> drivers/soc/samsung/. Also instead of making all changes in single patch it
>> has been broken into SoC specific patches to avoid large size of patch.
>> With this approach there will not be unwanted big churns just after
>> adding exynos-pmu under drivers/soc/samsung.
>>
>> All these patches are just refactoring to keep minimal changes while moving
>> exynos-pmu driver under drivers/soc/samsung/. Support for exynos7 PMU can
>> be added on top of it, in such a manner that for ARM64 build, ARM related
>> SoC's PMU will not get compiled and thus unnecessary increasing kernel image 
>> size.
>>
>> These patches have been prepared on top of Kukjin Kim's for-next merged with
>> driver-samsung and on top of
>> cherry-picked change from [1].
>>
>> 1: ARM: EXYNOS: Constify local exynos_pmu_data structure
>>https://lkml.org/lkml/2015/10/28/917
>>
>> For testing entire patchset on Peach-Pi (Exynos5880) based chromebook for 
>> boot
>> and S2R functionality.
>>
>> Tested-by: Pankaj Dubey 
>>
>> For testing entire patchset on on Trats2 (Exynos4412, S2R, reboot, poweroff)
>> and Odroid XU3 (Exynos5422, reboot, poweroff).
>>
>> Tested-by: Krzysztof Kozlowski 
>>
>> Changes since v5:
>>  - Removed extra blank line from patch 5/9 and 6/9.
>>  - Modified soc/samsung/Kconfig for config EXNOS_PMU. Added depends on ARM.
>>
>> Changes since v4:
>>  - In v3 I missed to give -M flag to detect rename, which made patches hard
>>to review, so resubmitting patches with rename detector flag.
>>  - Addressed review comments from Krzysztof.
>>
>> Changes since v3:
>>  - Keeping intact copyright dates in existing header files.
>>  - Addressed review comments from Krzysztof for v3.
>>  - Removing static inline function from exynos-pmu.h and
>>keeping them in PMU driver.
>>  - Added new patch (2/9) for fixing potential null pointer reference in
>>exynos_sys_powerdown_conf.
>>  - Added new patch (8/9) for rearranging static and non-static function for
>>better readability.
>>
>> Changes since v2:
>>  - Removed Amit's Samsung id as it's no more valid.
>>  - Rebased on latest kgene tree.
>>  - Removed redundant code from regs-pmu.h
>>
>> Pankaj Dubey (9):
>>   ARM: EXYNOS: removing redundant code from regs-pmu.h
>>   ARM: EXYNOS: Fix potential NULL pointer access in
>> exynos_sys_powerdown_conf
>>   ARM: EXYNOS: Move pmu specific headers under "linux/soc/samsung"
>>   ARM: EXYNOS: split up exynos3250 SoC specific PMU data
>>   ARM: EXYNOS: split up exynos4 SoC specific PMU data
>>   ARM: EXYNOS: split up exynos5250 SoC specific PMU data
>>   ARM: EXYNOS: split up exynos5420 SoC specific PMU data
>>   ARM: EXYNOS: rearrange static and non-static functions of PMU driver
>>   drivers: soc: Add support for Exynos PMU driver
>>
> 
> I tried to apply this to my branch:
> next/stuff-late-not-split-per-branch
> https://git.kernel.org/cgit/linux/kernel/git/krzk/linux.git/log/?h=next/stuff-late-not-split-per-branch
> 
> Unfortunately it fails on:
> error: patch failed: arch/arm/mach-exynos/pmu.c:17
> error: arch/arm/mach-exynos/pmu.c: patch does not apply
> Patch failed at 0001 ARM: EXYNOS: Move pmu specific headers under
> "linux/soc/samsung"
> 
> because of syscon-reboot handlers (Alim's work).
> 
> I think I have all the dependencies already in my
> "next/stuff-late-not-split-per-branch".
> If you want to proceed now, can you rebase on top of it? Otherwise we
> could wait and rebase later (after v4.5-rc1).
> 
> 

Thanks for looking into this.

I have just posted v7 of this series after rebasing on
"next/stuff-late-not-split-per-branch". Please have a look and if all
OK, include v7 in your branch, and lets try to get this in for v4.5. For
some reason if does not go, I am OK to wait for next cycle.


Thanks,
Pankaj Dubey

> P.S. Please note that "next/stuff-late-not-split-per-branch" is not
> included in linux-next because I am not sure if I will be able to push
> it out soon.
> 
> 
> Best regards,
> Krzysztof
> 
> 
--
To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH] ARM: multi_v7_defconfig: Enable fan, sensors and audio for Odroid XU3

[Krzysztof Kozlowski]

2015-12-07 18:43 GMT+09:00 Arnd Bergmann :
> On Monday 07 December 2015 18:38:44 Krzysztof Kozlowski wrote:
>> On 07.12.2015 18:14, Arnd Bergmann wrote:
>> > On Monday 07 December 2015 09:59:54 Krzysztof Kozlowski wrote:
>> >> For Odroid XU3-family enable the:
>> >>  - PWM fan (to control the CPU fan using thermal subsystem),
>> >>  - TI INA231 sensors (provide power measurements of big.LITTLE cores,
>> >>DRAM and GPU),
>> >>  - Samsung sound (for Odroid XU3 and Snow as well).
>> >>
>> >> Signed-off-by: Krzysztof Kozlowski 
>> >>
>> >
>> > Looks good. Do you have a samsung/defconfig branch already that you
>> > can put this into, or should be pick it up into arm-soc directly?
>> >
>> > My preference is the former, but it would be a bit silly if that
>> > is the only samsung defconfig change we need.
>>
>> I had a couple of defconfig patches in my queue but I sent them last
>> week to Kukjin in pull request. He didn't pull it yet. Maybe he could
>> apply this patch after pulling?
>>
>> Anyway we can wait for a few days to sort it out. If I don't have
>> another defconfig patches then I will remind myself with applying it to
>> arm-soc.
>>
>
> Ok, sounds good.

+Cc a...@kernel.org,

I don't have any other defconfig changes in my queue, except of course
stuff which I sent in pull request. I mean the request sent initially
to Kukjin but now redirected with his ack to you guys.

If you don't mind, please apply this patch directly (with Javier's reviewed-by).

Best regards,
Krzysztof
--
To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH v2] PM / OPP: Fix parsing of opp-microvolt and opp-microamp properties

[Viresh Kumar]

On 17-12-15, 19:04, Bartlomiej Zolnierkiewicz wrote:
> Commit 01fb4d3c39d3 ("PM / OPP: Parse 'opp--'
> bindings") broke support for parsing standard opp-microvolt and
> opp-microamp properties.  Fix it by setting 'name' string to
> proper value for !prop cases.
> 
> Cc: Viresh Kumar 
> Cc: Lee Jones 
> Cc: Rafael J. Wysocki 
> Fixes: 01fb4d3c39d3 ("PM / OPP: Parse 'opp-- 'bindings")
> Signed-off-by: Bartlomiej Zolnierkiewicz 
> ---
> v2:
> - rework the changes as requested by Viresh

Acked-by: Viresh Kumar 

-- 
viresh
--
To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH v3 5/7] drm/exynos: mixer: refactor layer setup

[Joonyoung Shim]

+Cc Boram Park,

On 12/18/2015 12:54 AM, Marek Szyprowski wrote:
> Hi Joonyoung,
> 
> On 2015-12-17 05:19, Joonyoung Shim wrote:
>> Hi Marek,
>>
>> On 12/16/2015 09:21 PM, Marek Szyprowski wrote:
>>> Properly configure blending properties of given hardware layer based on
>>> the selected pixel format. Currently only per-pixel-based alpha is possible
>>> when respective pixel format has been selected. Configuration of global,
>>> per-plane alpha value, color key and background color will be added later.
>>>
>>> This patch is heavily inspired by earlier work done by Tobias Jakobi
>>> .
>>>
>>> Signed-off-by: Marek Szyprowski 
>>> ---
>>>   drivers/gpu/drm/exynos/exynos_mixer.c | 43 
>>> +++
>>>   drivers/gpu/drm/exynos/regs-mixer.h   |  1 +
>>>   2 files changed, 44 insertions(+)
>>>
>>> diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c 
>>> b/drivers/gpu/drm/exynos/exynos_mixer.c
>>> index c572e271579e..ae7b122274ac 100644
>>> --- a/drivers/gpu/drm/exynos/exynos_mixer.c
>>> +++ b/drivers/gpu/drm/exynos/exynos_mixer.c
>>> @@ -165,6 +165,16 @@ static const u8 filter_cr_horiz_tap4[] = {
>>>   70,59,48,37,27,19,11,5,
>>>   };
>>>   +static inline bool is_alpha_format(unsigned int pixel_format)
>>> +{
>>> +switch (pixel_format) {
>>> +case DRM_FORMAT_ARGB:
>>> +return true;
>>> +default:
>>> +return false;
>>> +}
>>> +}
>>> +
>>>   static inline u32 vp_reg_read(struct mixer_resources *res, u32 reg_id)
>>>   {
>>>   return readl(res->vp_regs + reg_id);
>>> @@ -294,6 +304,37 @@ static void vp_default_filter(struct mixer_resources 
>>> *res)
>>>   filter_cr_horiz_tap4, sizeof(filter_cr_horiz_tap4));
>>>   }
>>>   +static void mixer_cfg_gfx_blend(struct mixer_context *ctx, unsigned int 
>>> win,
>>> +bool alpha)
>>> +{
>>> +struct mixer_resources *res = >mixer_res;
>>> +u32 val;
>>> +
>>> +val  = MXR_GRP_CFG_COLOR_KEY_DISABLE; /* no blank key */
>>> +if (alpha) {
>>> +/* blending based on pixel alpha */
>>> +val |= MXR_GRP_CFG_BLEND_PRE_MUL;
>>> +val |= MXR_GRP_CFG_PIXEL_BLEND_EN;
>>> +}
>>> +mixer_reg_writemask(res, MXR_GRAPHIC_CFG(win),
>>> +val, MXR_GRP_CFG_MISC_MASK);
>> I think the priority of plane and whether vp layer exists should be
>> considered for blending setting. When priority of graphic layer0 is
>> lowest and vp layer is not, this will blend background layer.
>> It was not permitted to blend background layer until current.
> 
> Currently blending is hardcoded to following configuration:
> 1. Order: [top] Grp1 > Grp0 > Video [bottom]
> 2. Per-pixel alpha blending enabled unconditionally for Grp1 layer (regardless
>of the selected pixel format for Grp1 layer).
> 3. Per-pixel alpha blending enabled for Grp0 layer when Video layer gets 
> enabled
>(regardless of the selected pixel format for Grp0 layer).
> 
> It is not very intuitive and it looks hardcoded for one particular use case.
> With the above patch application can configure blending for its needs.
> 

Sure, i'm not to oppose this patch.

> I really see no reason for special handling of the bottom layer (like
> disabling per-pixel alpha even if alpha-enabled format is selected). It is
> role of application to set proper pixel format (like XRGB instead of
> ARGB) if the application is not interested in alpha blending. Per-pixel
> alpha blending is enabled only for formats which really support alpha.
> 

You mean this is role of application definitely, then it's reasonable to
me.

Thanks.
--
To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH v4 01/20] PM / devfreq: exynos: Add generic exynos bus frequency driver

[Chanwoo Choi]

Hi,

On 2015년 12월 15일 12:41, Krzysztof Kozlowski wrote:
> On 14.12.2015 15:38, Chanwoo Choi wrote:
>> This patch adds the generic exynos bus frequency driver for AMBA AXI bus
>> of sub-blocks in exynos SoC with DEVFREQ framework. The Samsung Exynos SoC
>> have the common architecture for bus between DRAM and sub-blocks in SoC.
>> This driver can support the generic bus frequency driver for Exynos SoCs.
>>
>> In devicetree, Each bus block has a bus clock, regulator, operation-point
>> and devfreq-event devices which measure the utilization of each bus block.
>>
>> Signed-off-by: Chanwoo Choi 
>> [linux.amoon: Tested on Odroid U3]
>> Tested-by: Anand Moon 
>> ---
>>  drivers/devfreq/Kconfig |  15 ++
>>  drivers/devfreq/Makefile|   1 +
>>  drivers/devfreq/exynos/Makefile |   1 +
>>  drivers/devfreq/exynos/exynos-bus.c | 449 
>> 
>>  4 files changed, 466 insertions(+)
>>  create mode 100644 drivers/devfreq/exynos/exynos-bus.c
>>
>> diff --git a/drivers/devfreq/Kconfig b/drivers/devfreq/Kconfig
>> index 64281bb2f650..55ec774f794c 100644
>> --- a/drivers/devfreq/Kconfig
>> +++ b/drivers/devfreq/Kconfig
>> @@ -66,6 +66,21 @@ config DEVFREQ_GOV_USERSPACE
>>  
>>  comment "DEVFREQ Drivers"
>>  
>> +config ARM_EXYNOS_BUS_DEVFREQ
>> +bool "ARM EXYNOS Generic Memory Bus DEVFREQ Driver"
>> +depends on ARCH_EXYNOS
>> +select DEVFREQ_GOV_SIMPLE_ONDEMAND
>> +select DEVFREQ_EVENT_EXYNOS_PPMU
>> +select PM_DEVFREQ_EVENT
>> +select PM_OPP
>> +help
>> +  This adds the common DEVFREQ driver for Exynos Memory bus. Exynos
>> +  Memory bus has one more group of memory bus (e.g, MIF and INT block).
>> +  Each memory bus group could contain many memoby bus block. It reads
>> +  PPMU counters of memory controllers by using DEVFREQ-event device
>> +  and adjusts the operating frequencies and voltages with OPP support.
>> +  This does not yet operate with optimal voltages.
>> +
>>  config ARM_EXYNOS4_BUS_DEVFREQ
>>  bool "ARM Exynos4210/4212/4412 Memory Bus DEVFREQ Driver"
>>  depends on (CPU_EXYNOS4210 || SOC_EXYNOS4212 || SOC_EXYNOS4412) && 
>> !ARCH_MULTIPLATFORM
>> diff --git a/drivers/devfreq/Makefile b/drivers/devfreq/Makefile
>> index 5134f9ee983d..375ebbb4fcfb 100644
>> --- a/drivers/devfreq/Makefile
>> +++ b/drivers/devfreq/Makefile
>> @@ -6,6 +6,7 @@ obj-$(CONFIG_DEVFREQ_GOV_POWERSAVE)  += governor_powersave.o
>>  obj-$(CONFIG_DEVFREQ_GOV_USERSPACE) += governor_userspace.o
>>  
>>  # DEVFREQ Drivers
>> +obj-$(CONFIG_ARCH_EXYNOS)   += exynos/
> 
> Why limiting it to ARCH_EXYNOS? Are there real dependencies on exynos
> mach code? Or on ARM code?

There is no dependency.

> 
> If not, then this probably should be obj-y to allow compile testing.
> Particular objects would be selected by ARM_EXYNOS_BUS_DEVFREQ.

OK. I'll alter it as obj-y.

Best Regards,
Chanwoo Choi



--
To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH v11 0/19] Add Analogix Core Display Port Driver

[Yakir Yang]

Hi Heiko,

On 12/18/2015 07:51 AM, Heiko Stübner wrote:

Hi Yakir,

Am Mittwoch, 16. Dezember 2015, 11:20:18 schrieb Yakir Yang:

The Samsung Exynos eDP controller and Rockchip RK3288 eDP controller
share the same IP, so a lot of parts can be re-used. I split the common
code into bridge directory, then rk3288 and exynos only need to keep
some platform code. Cause I can't find the exact IP name of exynos dp
controller, so I decide to name dp core driver with "analogix" which I
find in rk3288 eDP TRM

I'm really sorry for not thinking of this earlier, but I think we'll be doing
the atomic modesetting conversion of the drm/kms driver first - see v3 series
from Mark Yao.

Could you handle necessary changes to make it apply and work _after_ the
atomic modesetting conversion please?


Sure, I also want to rebase on Mark's atomic series. Would send the new 
[PATCH v11.1 01/19] out today :)


- Yakir



Thanks
Heiko



But  there are still three light registers setting differents bewteen
exynos and rk3288.
1. RK3288 have five special pll resigters which not indicata in exynos
dp controller.
2. The address of DP_PHY_PD(dp phy power manager register) are different
between rk3288 and exynos.
3. Rk3288 and exynos have different setting with AUX_HW_RETRY_CTL(dp debug
register).

This series have been well tested on Rockchip platform with eDP panel on
Jerry Chromebook and Display Port Monitor on RK3288 board. Also I have
tested on Samsung Snow and Peach Pit Chromebooks, and thanks to
Javier@Samsung help to retest the whole series on Samsung Exynos5800 Peach
Pi Chromebook, glad to say that things works rightlly.

Thanks,
- Yakir


Changes in v11:
- Uses tabs to fix the indentation issues in analogix_dp_core.h (Heiko)
- Correct the title of this rockchip dp phy document(Rob)
- Add the ack from Rob Herring
- Rename the "analogix,need-force-hpd" to common 'force-hpd' (Rob)
- Add the ack from Rob Herring
- Revert parts of Gustavo Padovan's changes in commit:
drm/exynos: do not start enabling DP at bind() phase
   Add dp phy poweron function in bind time.
- Move the panel prepare from get_modes time to bind time, and move
   the panel unprepare from bridge->disable to unbind time. (Heiko)

Changes in v10:
- Add the ack from Rob Herring
- Correct the ROCKCHIP_ANALOGIX_DP indentation in Kconfig to tabs here
(Heiko) - Add the ack from Rob Herring
- Fix the wrong macro value of GRF_EDP_REF_CLK_SEL_INTER_HIWORD_MASK
 BIT(4) -> BIT(20)
- Remove the surplus "plat_data" check. (Heiko)
-   switch (dp->plat_data && dp->plat_data->dev_type) {
+   switch (dp->plat_data->dev_type) {

Changes in v9:
- Document more details for 'ports' property.
- Removed the unused the variable "res" in probe function. (Heiko)
- Removed the unused head file.

Changes in v8:
- Correct the right document path of display-timing.txt (Heiko)
- Correct the misspell of 'from' to 'frm'. (Heiko)
- Modify the commit subject name. (Heiko)
- Fix the mixed spacers on macro definitions. (Heiko)
- Remove the unnecessary empty line after clk_prepare_enable. (Heiko)
- Remove the specific address in the example node name. (Heiko)

Changes in v7:
- Back to use the of_property_read_bool() interfacs to provoid backward
   compatibility of "hsync-active-high" "vsync-active-high" "interlaced"
   to avoid -EOVERFLOW error (Krzysztof)
- Simply the commit message. (Kishon)
- Symmetrical enable/disbale the phy clock and power. (Kishon)
- Simplify the commit message. (Kishon)

Changes in v6:
- Fix the Kconfig recursive dependency (Javier)
- Fix Peach Pit hpd property name error:
-   hpd-gpio = < 6 0>;
+   hpd-gpios = < 6 0>;

Changes in v5:
- Correct the check condition of gpio_is_valid when driver try to get
   the "hpd-gpios" DT propery. (Heiko)
- Move the platform attach callback in the front of core driver bridge
   attch function. Cause once platform failed at attach, core driver should
   still failed, so no need to init connector before platform attached
(Krzysztof) - Keep code style no changes with the previous exynos_dp_code.c
in this patch, and update commit message about the new export symbol
(Krzysztof) - Gather the device type patch (v4 11/16) into this one.
(Krzysztof) - leave out the connector registration to analogix platform
driver. (Thierry) - Resequence this patch after analogix_dp driver have
been split
   from exynos_dp code, and rephrase reasonable commit message, and
   remove some controversial style (Krzysztof)
 -  analogix_dp_write_byte_to_dpcd(
 -  dp, DP_TEST_RESPONSE,
 +  analogix_dp_write_byte_to_dpcd(dp,
 +  DP_TEST_RESPONSE,
DP_TEST_EDID_CHECKSUM_WRITE);
- Switch video timing type to "u32", so driver could use
"of_property_read_u32" to get the backword timing values. Krzysztof suggest
me that driver could use the "of_property_read_bool" to get backword timing
values, but that interfacs would 

Re: [PATCH v4 01/20] PM / devfreq: exynos: Add generic exynos bus frequency driver

[Chanwoo Choi]

On 2015년 12월 18일 09:34, Chanwoo Choi wrote:
> Hi,
> 
> On 2015년 12월 15일 12:41, Krzysztof Kozlowski wrote:
>> On 14.12.2015 15:38, Chanwoo Choi wrote:
>>> This patch adds the generic exynos bus frequency driver for AMBA AXI bus
>>> of sub-blocks in exynos SoC with DEVFREQ framework. The Samsung Exynos SoC
>>> have the common architecture for bus between DRAM and sub-blocks in SoC.
>>> This driver can support the generic bus frequency driver for Exynos SoCs.
>>>
>>> In devicetree, Each bus block has a bus clock, regulator, operation-point
>>> and devfreq-event devices which measure the utilization of each bus block.
>>>
>>> Signed-off-by: Chanwoo Choi 
>>> [linux.amoon: Tested on Odroid U3]
>>> Tested-by: Anand Moon 
>>> ---
>>>  drivers/devfreq/Kconfig |  15 ++
>>>  drivers/devfreq/Makefile|   1 +
>>>  drivers/devfreq/exynos/Makefile |   1 +
>>>  drivers/devfreq/exynos/exynos-bus.c | 449 
>>> 
>>>  4 files changed, 466 insertions(+)
>>>  create mode 100644 drivers/devfreq/exynos/exynos-bus.c
>>>
>>> diff --git a/drivers/devfreq/Kconfig b/drivers/devfreq/Kconfig
>>> index 64281bb2f650..55ec774f794c 100644
>>> --- a/drivers/devfreq/Kconfig
>>> +++ b/drivers/devfreq/Kconfig
>>> @@ -66,6 +66,21 @@ config DEVFREQ_GOV_USERSPACE
>>>  
>>>  comment "DEVFREQ Drivers"
>>>  
>>> +config ARM_EXYNOS_BUS_DEVFREQ
>>> +   bool "ARM EXYNOS Generic Memory Bus DEVFREQ Driver"
>>> +   depends on ARCH_EXYNOS
>>> +   select DEVFREQ_GOV_SIMPLE_ONDEMAND
>>> +   select DEVFREQ_EVENT_EXYNOS_PPMU
>>> +   select PM_DEVFREQ_EVENT
>>> +   select PM_OPP
>>> +   help
>>> + This adds the common DEVFREQ driver for Exynos Memory bus. Exynos
>>> + Memory bus has one more group of memory bus (e.g, MIF and INT block).
>>> + Each memory bus group could contain many memoby bus block. It reads
>>> + PPMU counters of memory controllers by using DEVFREQ-event device
>>> + and adjusts the operating frequencies and voltages with OPP support.
>>> + This does not yet operate with optimal voltages.
>>> +
>>>  config ARM_EXYNOS4_BUS_DEVFREQ
>>> bool "ARM Exynos4210/4212/4412 Memory Bus DEVFREQ Driver"
>>> depends on (CPU_EXYNOS4210 || SOC_EXYNOS4212 || SOC_EXYNOS4412) && 
>>> !ARCH_MULTIPLATFORM
>>> diff --git a/drivers/devfreq/Makefile b/drivers/devfreq/Makefile
>>> index 5134f9ee983d..375ebbb4fcfb 100644
>>> --- a/drivers/devfreq/Makefile
>>> +++ b/drivers/devfreq/Makefile
>>> @@ -6,6 +6,7 @@ obj-$(CONFIG_DEVFREQ_GOV_POWERSAVE) += governor_powersave.o
>>>  obj-$(CONFIG_DEVFREQ_GOV_USERSPACE)+= governor_userspace.o
>>>  
>>>  # DEVFREQ Drivers
>>> +obj-$(CONFIG_ARCH_EXYNOS)  += exynos/
>>
>> Why limiting it to ARCH_EXYNOS? Are there real dependencies on exynos
>> mach code? Or on ARM code?
> 
> There is no dependency.
> 
>>
>> If not, then this probably should be obj-y to allow compile testing.
>> Particular objects would be selected by ARM_EXYNOS_BUS_DEVFREQ.
> 
> OK. I'll alter it as obj-y.

As you commented, CONFIG_ARM_EXYNOS_BUS_DEVFREQ is more appropriate
without exynos/ directory as following:

+obj-$(CONFIG_ARM_EXYNOS_BUS_DEVFREQ)   += exynos-bus.o

Best Regards,
Chanwoo Choi
--
To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH v4 05/20] PM / devfreq: Add new passive governor

[Chanwoo Choi]

On 2015년 12월 14일 18:04, MyungJoo Ham wrote:
>>   
>>  This patch adds the new passive governor for DEVFREQ framework. The 
>> following
>> governors are already present and used for DVFS (Dynamic Voltage and 
>> Frequency
>> Scaling) drivers. The following governors are independently used for one 
>> device
>> driver which don't give the influence to other device drviers and also don't
>> receive the effect from other device drivers.
>> - ondemand / performance / powersave / userspace
>>
>> The passive governor depends on operation of parent driver with specific
>> governos extremely and is not able to decide the new frequency by oneself.
>> According to the decided new frequency of parent driver with governor,
>> the passive governor uses it to decide the appropriate frequency for own
>> device driver. The passive governor must need the following information
>> from device tree:
>> - the source clock and OPP tables
>> - the instance of parent device
>>
>> For exameple,
>> there are one more devfreq device drivers which need to change their source
>> clock according to their utilization on runtime. But, they share the same
>> power line (e.g., regulator). So, specific device driver is operated as 
>> parent
>> with ondemand governor and then the rest device driver with passive governor
>> is influenced by parent device.
>>
>> Suggested-by: Myungjoo Ham 
>> Signed-off-by: Chanwoo Choi 
>> [linux.amoon: Tested on Odroid U3]
>> Tested-by: Anand Moon 
>> ---
>>  drivers/devfreq/Kconfig|   9 
>>  drivers/devfreq/Makefile   |   1 +
>>  drivers/devfreq/devfreq.c  |  47 
>>  drivers/devfreq/governor_passive.c | 108 
>> +
>>  include/linux/devfreq.h|  15 ++
>>  5 files changed, 180 insertions(+)
>>  create mode 100644 drivers/devfreq/governor_passive.c
>>
>> diff --git a/drivers/devfreq/Kconfig b/drivers/devfreq/Kconfig
>> index 55ec774f794c..d03f635a93e1 100644
>> --- a/drivers/devfreq/Kconfig
>> +++ b/drivers/devfreq/Kconfig
>> @@ -64,6 +64,15 @@ config DEVFREQ_GOV_USERSPACE
>>Otherwise, the governor does not change the frequnecy
>>given at the initialization.
>>  
>> +config DEVFREQ_GOV_PASSIVE
>> +tristate "Passive"
>> +help
>> +  Sets the frequency by other governors (simple_ondemand, performance,
>> +  powersave, usersapce) of a parent devfreq device. This governor
>> +  always has the dependency on the chosen frequency from paired
>> +  governor. This governor does not change the frequency by oneself
>> +  through sysfs entry.
> 
>   Sets the frequency based on the frequency of its parent devfreq
>   device. This governor does not change the frequency by itself
>   through sysfs entries.

OK. I'll modify it.

> 
>> +
>>  comment "DEVFREQ Drivers"
>>  
>>  config ARM_EXYNOS_BUS_DEVFREQ
>> diff --git a/drivers/devfreq/Makefile b/drivers/devfreq/Makefile
>> index 375ebbb4fcfb..f81c313b4b79 100644
>> --- a/drivers/devfreq/Makefile
>> +++ b/drivers/devfreq/Makefile
> []
>> diff --git a/drivers/devfreq/devfreq.c b/drivers/devfreq/devfreq.c
>> index 984c5e9e7bdd..15e58779e4c0 100644
>> --- a/drivers/devfreq/devfreq.c
>> +++ b/drivers/devfreq/devfreq.c
>> @@ -190,6 +190,31 @@ static struct devfreq_governor 
>> *find_devfreq_governor(const char *name)
>>  
>>  /* Load monitoring helper functions for governors use */
>>  
>> +static int update_devfreq_passive(struct devfreq *devfreq, unsigned long 
>> freq)
>> +{
>> +struct devfreq *passive;
>> +unsigned long rate;
>> +int ret;
>> +
>> +list_for_each_entry(passive, >passive_dev_list, passive_node) {
>> +if (!passive->governor)
>> +continue;
>> +rate = freq;
>> +
>> +ret = passive->governor->get_target_freq(passive, );
>> +if (ret)
>> +return ret;
>> +
>> +ret = passive->profile->target(passive->dev.parent, , 0);
>> +if (ret)
>> +return ret;
>> +
>> +passive->previous_freq = rate;
>> +}
>> +
>> +return 0;
>> +}
>> +
>>  /**
>>   * update_devfreq() - Reevaluate the device and configure frequency.
>>   * @devfreq:the devfreq instance.
>> @@ -233,10 +258,18 @@ int update_devfreq(struct devfreq *devfreq)
>>  flags |= DEVFREQ_FLAG_LEAST_UPPER_BOUND; /* Use LUB */
>>  }
>>  
>> +if (!list_empty(>passive_dev_list)
>> +&& devfreq->previous_freq > freq)
>> +update_devfreq_passive(devfreq, freq);
>> +
> 
> Could you please comment somewhere appropriate
> that the dependent is going to be changed
> before its parent if the frequency is going down.
> (and after if going up)
> And state why as well.

I use the DEVFREQ_TRANSITION_NOTIFIER instead of this implementation.

> 
> And, is this viable universally?
> 
>>  err = 

Re: [PATCH v3 2/7] drm/exynos: make zpos property configurable

[Joonyoung Shim]

On 12/17/2015 10:05 PM, Marek Szyprowski wrote:
> Hello,
> 
> On 2015-12-17 03:55, Joonyoung Shim wrote:
>> +Cc: Boram Park,
>>
>> Hi Marek,
>>
>> On 12/16/2015 09:21 PM, Marek Szyprowski wrote:
>>> This patch adds all infrastructure to make zpos plane property
>>> configurable from userspace.
>>>
>>> Signed-off-by: Marek Szyprowski 
>>> ---
>>>   drivers/gpu/drm/exynos/exynos_drm_drv.h   |  4 ++-
>>>   drivers/gpu/drm/exynos/exynos_drm_plane.c | 51 
>>> ---
>>>   2 files changed, 49 insertions(+), 6 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.h 
>>> b/drivers/gpu/drm/exynos/exynos_drm_drv.h
>>> index 588b6763f9c7..f0827dbebb7d 100644
>>> --- a/drivers/gpu/drm/exynos/exynos_drm_drv.h
>>> +++ b/drivers/gpu/drm/exynos/exynos_drm_drv.h
>>> @@ -64,6 +64,7 @@ struct exynos_drm_plane_state {
>>>   struct exynos_drm_rect src;
>>>   unsigned int h_ratio;
>>>   unsigned int v_ratio;
>>> +unsigned int zpos;
>>>   };
>>> static inline struct exynos_drm_plane_state *
>>> @@ -91,11 +92,12 @@ struct exynos_drm_plane {
>>> #define EXYNOS_DRM_PLANE_CAP_DOUBLE(1 << 0)
>>>   #define EXYNOS_DRM_PLANE_CAP_SCALE(1 << 1)
>>> +#define EXYNOS_DRM_PLANE_CAP_ZPOS(1 << 2)
>>> /*
>>>* Exynos DRM plane configuration structure.
>>>*
>>> - * @zpos: z-position of the plane.
>>> + * @zpos: initial z-position of the plane.
>>>* @type: type of the plane (primary, cursor or overlay).
>>>* @pixel_formats: supported pixel formats.
>>>* @num_pixel_formats: number of elements in 'pixel_formats'.
>>> diff --git a/drivers/gpu/drm/exynos/exynos_drm_plane.c 
>>> b/drivers/gpu/drm/exynos/exynos_drm_plane.c
>>> index fd6cb4cee01a..a2bdab836b50 100644
>>> --- a/drivers/gpu/drm/exynos/exynos_drm_plane.c
>>> +++ b/drivers/gpu/drm/exynos/exynos_drm_plane.c
>>> @@ -124,6 +124,7 @@ static void exynos_plane_mode_set(struct 
>>> exynos_drm_plane_state *exynos_state)
>>> static void exynos_drm_plane_reset(struct drm_plane *plane)
>>>   {
>>> +struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
>>>   struct exynos_drm_plane_state *exynos_state;
>>> if (plane->state) {
>>> @@ -136,6 +137,7 @@ static void exynos_drm_plane_reset(struct drm_plane 
>>> *plane)
>>> exynos_state = kzalloc(sizeof(*exynos_state), GFP_KERNEL);
>>>   if (exynos_state) {
>>> +exynos_state->zpos = exynos_plane->config->zpos;
>>>   plane->state = _state->base;
>>>   plane->state->plane = plane;
>>>   }
>>> @@ -153,6 +155,7 @@ exynos_drm_plane_duplicate_state(struct drm_plane 
>>> *plane)
>>>   return NULL;
>>> __drm_atomic_helper_plane_duplicate_state(plane, >base);
>>> +copy->zpos = exynos_state->zpos;
>>>   return >base;
>>>   }
>>>   @@ -165,13 +168,53 @@ static void exynos_drm_plane_destroy_state(struct 
>>> drm_plane *plane,
>>>   kfree(old_exynos_state);
>>>   }
>>>   +static int exynos_drm_plane_atomic_set_property(struct drm_plane *plane,
>>> +struct drm_plane_state *state,
>>> +struct drm_property *property,
>>> +uint64_t val)
>>> +{
>>> +struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
>>> +struct exynos_drm_plane_state *exynos_state =
>>> +to_exynos_plane_state(state);
>>> +struct exynos_drm_private *dev_priv = plane->dev->dev_private;
>>> +const struct exynos_drm_plane_config *config = exynos_plane->config;
>>> +
>>> +if (property == dev_priv->plane_zpos_property &&
>>> +(config->capabilities & EXYNOS_DRM_PLANE_CAP_ZPOS))
>>> +exynos_state->zpos = val;
>>> +else
>>> +return -EINVAL;
>>> +
>>> +return 0;
>>> +}
>>> +
>>> +static int exynos_drm_plane_atomic_get_property(struct drm_plane *plane,
>>> +  const struct drm_plane_state *state,
>>> +  struct drm_property *property,
>>> +  uint64_t *val)
>>> +{
>>> +const struct exynos_drm_plane_state *exynos_state =
>>> +container_of(state, const struct exynos_drm_plane_state, base);
>>> +struct exynos_drm_private *dev_priv = plane->dev->dev_private;
>>> +
>>> +if (property == dev_priv->plane_zpos_property)
>>> +*val = exynos_state->zpos;
>>> +else
>>> +return -EINVAL;
>>> +
>>> +return 0;
>>> +}
>>> +
>>>   static struct drm_plane_funcs exynos_plane_funcs = {
>>>   .update_plane= drm_atomic_helper_update_plane,
>>>   .disable_plane= drm_atomic_helper_disable_plane,
>>>   .destroy= drm_plane_cleanup,
>>> +.set_property= drm_atomic_helper_plane_set_property,
>>>   .reset= exynos_drm_plane_reset,
>>>   .atomic_duplicate_state = exynos_drm_plane_duplicate_state,
>>>   .atomic_destroy_state = exynos_drm_plane_destroy_state,
>>> +.atomic_set_property = exynos_drm_plane_atomic_set_property,

Re: [PATCH v7 0/6] samsung: pmu: split up SoC specific PMU data

[Krzysztof Kozlowski]

On 18.12.2015 12:32, Pankaj Dubey wrote:
> In this series I am splitting up SoC specific PMU configuration data into
> mach-exynos folder itself, before moving all of them under
> drivers/soc/samsung/. Also instead of making all changes in single patch it
> has been broken into SoC specific patches to avoid large size of patch.
> With this approach there will not be unwanted big churns just after
> adding exynos-pmu under drivers/soc/samsung.
> 
> All these patches are just refactoring to keep minimal changes while moving
> exynos-pmu driver under drivers/soc/samsung/. Support for exynos7 PMU can
> be added on top of it, in such a manner that for ARM64 build, ARM related
> SoC's PMU will not get compiled and thus unnecessary increasing kernel image 
> size.
> 
> This series have been prepared on top of Krzysztof Kozlowski's 
> next/stuff-late-not-split-per-branch branch, and it's just a rebase compared 
> to
> V6 posted and reviewed here [1]. 
> 
> [1]: https://lkml.org/lkml/2015/11/17/15
> 
> For testing entire patchset on Peach-Pi (Exynos5880) based chromebook for boot
> and S2R functionality.
> 
> Tested-by: Pankaj Dubey 
> 
> For testing entire patchset on on Trats2 (Exynos4412, S2R, reboot, poweroff)
> and Odroid XU3 (Exynos5422, reboot, poweroff).
> 
> Tested-by: Krzysztof Kozlowski 
> 
> Changes since v6:
>  - Rebasing on top of branch provided by Krzysztof, after resolving conflicts 
>caused due to Alim's patches for adoptation of generic syscon for 
> poweroff, reboot.
>  - Included Tested-by tags on individual patches as per applicability.
>  - Dropped patches v6 [1/9], v6 [2/9] as these are already present in above 
> mentioned branch.
>  - Dropped patch v6 [8/9] as after Alim's patch this patch no more required.
> 

Patchset applied cleanly with:
1. Removal of blank lines at end of two files (they appeared in v7).
2. Removal of your tested-by. The author does not provide such tag
because it is assumed that he tested it before sending. However I left
the information about testing platform near your signed-off-by.

You can find the patches on the same branch:
https://git.kernel.org/cgit/linux/kernel/git/krzk/linux.git/log/?h=next/stuff-late-not-split-per-branch

I hope I will be able to push it out to arm-soc soon...

Best regards,
Krzysztof

--
To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html