Re: One of these things (CONFIG_HZ) is not like the others..

2013-01-21 Thread Matt Sealey
On Mon, Jan 21, 2013 at 6:09 PM, Matt Sealey m...@genesi-usa.com wrote:

[LAKML: about lack of SCHED_HRTICK because we don't use
kernel/Kconfig.hz on ARM)]

 kind of leaves ARM in the doghouse.. who knows what weirdo scheduler
 reactions are related to it not being enabled. Maybe when it is, HZ
 *would* need to be allowed to be bumped when using this code path?

Or conversely maybe this is exactly why the Samsung maintainers
decided they need HZ=200, because SCHED_HRTICK isn't being enabled and
they're experiencing some multimedia lag because of it?

-- 
Matt Sealey m...@genesi-usa.com
Product Development Analyst, Genesi USA, Inc.
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Re: [PATCH 1/2] ARM: dts: Add pinctrl node entries for Samsung Exynos4210 SoC

2012-08-16 Thread Matt Sealey
Re: samsung,pin-function samsung,pin-pud samsung,pin-drv - why can't
these be one property, why take the space to define them individually
instead of in an array of 3 values under one property name?

-- 
Matt Sealey m...@genesi-usa.com
Product Development Analyst, Genesi USA, Inc.


On Wed, Aug 15, 2012 at 3:10 PM, Thomas Abraham
thomas.abra...@linaro.org wrote:
 Add pinctrl driver nodes for the three instances of pin controllers
 in Samsung Exynos4210 SoC and add the pin group nodes available in the
 each of those three instances.

 Cc: Kukjin Kim kgene@samsung.com
 Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
 ---
  arch/arm/boot/dts/exynos4210-pinctrl.dtsi |  457 
 +
  arch/arm/boot/dts/exynos4210.dtsi |   37 +++
  2 files changed, 494 insertions(+), 0 deletions(-)
  create mode 100644 arch/arm/boot/dts/exynos4210-pinctrl.dtsi

 diff --git a/arch/arm/boot/dts/exynos4210-pinctrl.dtsi 
 b/arch/arm/boot/dts/exynos4210-pinctrl.dtsi
 new file mode 100644
 index 000..b12cf27
 --- /dev/null
 +++ b/arch/arm/boot/dts/exynos4210-pinctrl.dtsi
 @@ -0,0 +1,457 @@
 +/*
 + * Samsung's Exynos4210 SoC pin-mux and pin-config device tree source
 + *
 + * Copyright (c) 2011-2012 Samsung Electronics Co., Ltd.
 + * http://www.samsung.com
 + * Copyright (c) 2011-2012 Linaro Ltd.
 + * www.linaro.org
 + *
 + * Samsung's Exynos4210 SoC pin-mux and pin-config optiosn are listed as 
 device
 + * tree nodes are listed in this file.
 + *
 + * This program is free software; you can redistribute it and/or modify
 + * it under the terms of the GNU General Public License version 2 as
 + * published by the Free Software Foundation.
 +*/
 +
 +/ {
 +   pinctrl@1140 {
 +   uart0_data: uart0-data {
 +   samsung,pins = gpa0-0, gpa0-1;
 +   samsung,pin-function = 0x2;
 +   samsung,pin-pud = 0;
 +   samsung,pin-drv = 0;
 +   };
 +
 +   uart0_fctl: uart0-fctl {
 +   samsung,pins = gpa0-2, gpa0-3;
 +   samsung,pin-function = 2;
 +   samsung,pin-pud = 0;
 +   samsung,pin-drv = 0;
 +   };
 +
 +   uart1_data: uart1-data {
 +   samsung,pins = gpa0-4, gpa0-5;
 +   samsung,pin-function = 2;
 +   samsung,pin-pud = 0;
 +   samsung,pin-drv = 0;
 +   };
 +
 +   uart1_fctl: uart1-fctl {
 +   samsung,pins = gpa0-6, gpa0-7;
 +   samsung,pin-function = 2;
 +   samsung,pin-pud = 0;
 +   samsung,pin-drv = 0;
 +   };
 +
 +   i2c2_bus: i2c2-bus {
 +   samsung,pins = gpa0-6, gpa0-7;
 +   samsung,pin-function = 3;
 +   samsung,pin-pud = 3;
 +   samsung,pin-drv = 0;
 +   };
 +
 +   uart2_data: uart2-data {
 +   samsung,pins = gpa1-0, gpa1-1;
 +   samsung,pin-function = 2;
 +   samsung,pin-pud = 0;
 +   samsung,pin-drv = 0;
 +   };
 +
 +   uart2_fctl: uart2-fctl {
 +   samsung,pins = gpa1-2, gpa1-3;
 +   samsung,pin-function = 2;
 +   samsung,pin-pud = 0;
 +   samsung,pin-drv = 0;
 +   };
 +
 +   uart_audio_a: uart-audio-a {
 +   samsung,pins = gpa1-0, gpa1-1;
 +   samsung,pin-function = 4;
 +   samsung,pin-pud = 0;
 +   samsung,pin-drv = 0;
 +   };
 +
 +   i2c3_bus: i2c3-bus {
 +   samsung,pins = gpa1-2, gpa1-3;
 +   samsung,pin-function = 3;
 +   samsung,pin-pud = 3;
 +   samsung,pin-drv = 0;
 +   };
 +
 +   uart3_data: uart3-data {
 +   samsung,pins = gpa1-4, gpa1-5;
 +   samsung,pin-function = 2;
 +   samsung,pin-pud = 0;
 +   samsung,pin-drv = 0;
 +   };
 +
 +   uart_audio_b: uart-audio-b {
 +   samsung,pins = gpa1-4, gpa1-5;
 +   samsung,pin-function = 4;
 +   samsung,pin-pud = 0;
 +   samsung,pin-drv = 0;
 +   };
 +
 +   spi0_bus: spi0-bus {
 +   samsung,pins = gpb-0, gpb-2, gpb-3;
 +   samsung,pin-function = 2;
 +   samsung,pin-pud = 3;
 +   samsung,pin-drv = 0;
 +   };
 +
 +   i2c4_bus: i2c4-bus {
 +   samsung,pins