RE: [PATCH 6/7] pinctrl: exynos5440: add pinctrl driver for Samsung EXYNOS5440 SoC
Linus Walleij wrote: On Fri, Oct 26, 2012 at 7:55 PM, Kukjin Kim kgene@samsung.com wrote: From: Thomas Abraham thomas.abra...@linaro.org Add a new pinctrl driver for Samsung EXYNOS5440 SoC. The pin controller module in EXYNOS5440 is different from the pin controller found on other Samsung SoC. Hence, the pin controller driver for EXYNOS5440 SoC is independent of the Samsung pinctrl framework. Signed-off-by: Thomas Abraham thomas.abra...@linaro.org Cc: Linus Walleij linus.wall...@linaro.org Signed-off-by: Kukjin Kim kgene@samsung.com If I haven't ACK:ed this before here's an Acked-by: Linus Walleij linus.wall...@linaro.org Thanks for your ack. I expect this to go through the Samsung tree? Yeah, this would be sent to upstream via Samsung tree. Let me pick this up in my tree with your ack. Thanks. Best regards, Kgene. -- Kukjin Kim kgene@samsung.com, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd. -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 6/7] pinctrl: exynos5440: add pinctrl driver for Samsung EXYNOS5440 SoC
On Fri, Oct 26, 2012 at 7:55 PM, Kukjin Kim kgene@samsung.com wrote: From: Thomas Abraham thomas.abra...@linaro.org Add a new pinctrl driver for Samsung EXYNOS5440 SoC. The pin controller module in EXYNOS5440 is different from the pin controller found on other Samsung SoC. Hence, the pin controller driver for EXYNOS5440 SoC is independent of the Samsung pinctrl framework. Signed-off-by: Thomas Abraham thomas.abra...@linaro.org Cc: Linus Walleij linus.wall...@linaro.org Signed-off-by: Kukjin Kim kgene@samsung.com If I haven't ACK:ed this before here's an Acked-by: Linus Walleij linus.wall...@linaro.org I expect this to go through the Samsung tree? Yours, Linus Walleij -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 6/7] pinctrl: exynos5440: add pinctrl driver for Samsung EXYNOS5440 SoC
From: Thomas Abraham thomas.abra...@linaro.org
Add a new pinctrl driver for Samsung EXYNOS5440 SoC. The pin controller
module in EXYNOS5440 is different from the pin controller found on other
Samsung SoC. Hence, the pin controller driver for EXYNOS5440 SoC is
independent of the Samsung pinctrl framework.
Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
Cc: Linus Walleij linus.wall...@linaro.org
Signed-off-by: Kukjin Kim kgene@samsung.com
---
drivers/pinctrl/Kconfig |5 +
drivers/pinctrl/Makefile |1 +
drivers/pinctrl/pinctrl-exynos5440.c | 919 ++
3 files changed, 925 insertions(+), 0 deletions(-)
create mode 100644 drivers/pinctrl/pinctrl-exynos5440.c
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index 7bf914d..ddb201d 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -186,6 +186,11 @@ config PINCTRL_EXYNOS4
bool Pinctrl driver data for Exynos4 SoC
select PINCTRL_SAMSUNG
+config PINCTRL_EXYNOS5440
+ bool Samsung EXYNOS5440 SoC pinctrl driver
+ select PINMUX
+ select PINCONF
+
config PINCTRL_MVEBU
bool
depends on ARCH_MVEBU
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index f395ba5..476928b 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -36,6 +36,7 @@ obj-$(CONFIG_PINCTRL_U300)+= pinctrl-u300.o
obj-$(CONFIG_PINCTRL_COH901) += pinctrl-coh901.o
obj-$(CONFIG_PINCTRL_SAMSUNG) += pinctrl-samsung.o
obj-$(CONFIG_PINCTRL_EXYNOS4) += pinctrl-exynos.o
+obj-$(CONFIG_PINCTRL_EXYNOS5440) += pinctrl-exynos5440.o
obj-$(CONFIG_PINCTRL_MVEBU)+= pinctrl-mvebu.o
obj-$(CONFIG_PINCTRL_DOVE) += pinctrl-dove.o
obj-$(CONFIG_PINCTRL_KIRKWOOD) += pinctrl-kirkwood.o
diff --git a/drivers/pinctrl/pinctrl-exynos5440.c
b/drivers/pinctrl/pinctrl-exynos5440.c
new file mode 100644
index 000..b8635f6
--- /dev/null
+++ b/drivers/pinctrl/pinctrl-exynos5440.c
@@ -0,0 +1,919 @@
+/*
+ * pin-controller/pin-mux/pin-config/gpio-driver for Samsung's EXYNOS5440 SoC.
+ *
+ * Copyright (c) 2012 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include linux/module.h
+#include linux/platform_device.h
+#include linux/io.h
+#include linux/slab.h
+#include linux/err.h
+#include linux/gpio.h
+#include linux/device.h
+#include linux/pinctrl/pinctrl.h
+#include linux/pinctrl/pinmux.h
+#include linux/pinctrl/pinconf.h
+#include core.h
+
+/* EXYNOS5440 GPIO and Pinctrl register offsets */
+#define GPIO_MUX 0x00
+#define GPIO_IE0x04
+#define GPIO_INT 0x08
+#define GPIO_TYPE 0x0C
+#define GPIO_VAL 0x10
+#define GPIO_OE0x14
+#define GPIO_IN0x18
+#define GPIO_PE0x1C
+#define GPIO_PS0x20
+#define GPIO_SR0x24
+#define GPIO_DS0 0x28
+#define GPIO_DS1 0x2C
+
+#define EXYNOS5440_MAX_PINS23
+#define PIN_NAME_LENGTH10
+
+#define GROUP_SUFFIX -grp
+#define GSUFFIX_LENsizeof(GROUP_SUFFIX)
+#define FUNCTION_SUFFIX-mux
+#define FSUFFIX_LENsizeof(FUNCTION_SUFFIX)
+
+/*
+ * pin configuration type and its value are packed together into a 16-bits.
+ * The upper 8-bits represent the configuration type and the lower 8-bits
+ * hold the value of the configuration type.
+ */
+#define PINCFG_TYPE_MASK 0xFF
+#define PINCFG_VALUE_SHIFT 8
+#define PINCFG_VALUE_MASK (0xFF PINCFG_VALUE_SHIFT)
+#define PINCFG_PACK(type, value) (((value) PINCFG_VALUE_SHIFT) | type)
+#define PINCFG_UNPACK_TYPE(cfg)((cfg) PINCFG_TYPE_MASK)
+#define PINCFG_UNPACK_VALUE(cfg) (((cfg) PINCFG_VALUE_MASK) \
+ PINCFG_VALUE_SHIFT)
+
+/**
+ * enum pincfg_type - possible pin configuration types supported.
+ * @PINCFG_TYPE_PUD: Pull up/down configuration.
+ * @PINCFG_TYPE_DRV: Drive strength configuration.
+ * @PINCFG_TYPE_SKEW_RATE: Skew rate configuration.
+ * @PINCFG_TYPE_INPUT_TYPE: Pin input type configuration.
+ */
+enum pincfg_type {
+ PINCFG_TYPE_PUD,
+ PINCFG_TYPE_DRV,
+ PINCFG_TYPE_SKEW_RATE,
+ PINCFG_TYPE_INPUT_TYPE
+};
+
+/**
+ * struct exynos5440_pin_group: represent group of pins for pincfg setting.
+ * @name: name of the pin group, used to lookup the group.
+ * @pins: the pins included in this group.
+ * @num_pins: number of pins included in this group.
+ */
+struct exynos5440_pin_group {
+ const char *name;
+
[PATCH 6/7] pinctrl: exynos5440: add pinctrl driver for Samsung EXYNOS5440 SoC
From: Thomas Abraham thomas.abra...@linaro.org
Add a new pinctrl driver for Samsung EXYNOS5440 SoC. The pin controller
module in EXYNOS5440 is different from the pin controller found on other
Samsung SoC. Hence, the pin controller driver for EXYNOS5440 SoC is
independent of the Samsung pinctrl framework.
Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
Cc: Linus Walleij linus.wall...@linaro.org
Signed-off-by: Kukjin Kim kgene@samsung.com
---
drivers/pinctrl/Kconfig |5 +
drivers/pinctrl/Makefile |1 +
drivers/pinctrl/pinctrl-exynos5440.c | 919 ++
3 files changed, 925 insertions(+), 0 deletions(-)
create mode 100644 drivers/pinctrl/pinctrl-exynos5440.c
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index 7bf914d..ddb201d 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -186,6 +186,11 @@ config PINCTRL_EXYNOS4
bool Pinctrl driver data for Exynos4 SoC
select PINCTRL_SAMSUNG
+config PINCTRL_EXYNOS5440
+ bool Samsung EXYNOS5440 SoC pinctrl driver
+ select PINMUX
+ select PINCONF
+
config PINCTRL_MVEBU
bool
depends on ARCH_MVEBU
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index f395ba5..476928b 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -36,6 +36,7 @@ obj-$(CONFIG_PINCTRL_U300)+= pinctrl-u300.o
obj-$(CONFIG_PINCTRL_COH901) += pinctrl-coh901.o
obj-$(CONFIG_PINCTRL_SAMSUNG) += pinctrl-samsung.o
obj-$(CONFIG_PINCTRL_EXYNOS4) += pinctrl-exynos.o
+obj-$(CONFIG_PINCTRL_EXYNOS5440) += pinctrl-exynos5440.o
obj-$(CONFIG_PINCTRL_MVEBU)+= pinctrl-mvebu.o
obj-$(CONFIG_PINCTRL_DOVE) += pinctrl-dove.o
obj-$(CONFIG_PINCTRL_KIRKWOOD) += pinctrl-kirkwood.o
diff --git a/drivers/pinctrl/pinctrl-exynos5440.c
b/drivers/pinctrl/pinctrl-exynos5440.c
new file mode 100644
index 000..b8635f6
--- /dev/null
+++ b/drivers/pinctrl/pinctrl-exynos5440.c
@@ -0,0 +1,919 @@
+/*
+ * pin-controller/pin-mux/pin-config/gpio-driver for Samsung's EXYNOS5440 SoC.
+ *
+ * Copyright (c) 2012 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include linux/module.h
+#include linux/platform_device.h
+#include linux/io.h
+#include linux/slab.h
+#include linux/err.h
+#include linux/gpio.h
+#include linux/device.h
+#include linux/pinctrl/pinctrl.h
+#include linux/pinctrl/pinmux.h
+#include linux/pinctrl/pinconf.h
+#include core.h
+
+/* EXYNOS5440 GPIO and Pinctrl register offsets */
+#define GPIO_MUX 0x00
+#define GPIO_IE0x04
+#define GPIO_INT 0x08
+#define GPIO_TYPE 0x0C
+#define GPIO_VAL 0x10
+#define GPIO_OE0x14
+#define GPIO_IN0x18
+#define GPIO_PE0x1C
+#define GPIO_PS0x20
+#define GPIO_SR0x24
+#define GPIO_DS0 0x28
+#define GPIO_DS1 0x2C
+
+#define EXYNOS5440_MAX_PINS23
+#define PIN_NAME_LENGTH10
+
+#define GROUP_SUFFIX -grp
+#define GSUFFIX_LENsizeof(GROUP_SUFFIX)
+#define FUNCTION_SUFFIX-mux
+#define FSUFFIX_LENsizeof(FUNCTION_SUFFIX)
+
+/*
+ * pin configuration type and its value are packed together into a 16-bits.
+ * The upper 8-bits represent the configuration type and the lower 8-bits
+ * hold the value of the configuration type.
+ */
+#define PINCFG_TYPE_MASK 0xFF
+#define PINCFG_VALUE_SHIFT 8
+#define PINCFG_VALUE_MASK (0xFF PINCFG_VALUE_SHIFT)
+#define PINCFG_PACK(type, value) (((value) PINCFG_VALUE_SHIFT) | type)
+#define PINCFG_UNPACK_TYPE(cfg)((cfg) PINCFG_TYPE_MASK)
+#define PINCFG_UNPACK_VALUE(cfg) (((cfg) PINCFG_VALUE_MASK) \
+ PINCFG_VALUE_SHIFT)
+
+/**
+ * enum pincfg_type - possible pin configuration types supported.
+ * @PINCFG_TYPE_PUD: Pull up/down configuration.
+ * @PINCFG_TYPE_DRV: Drive strength configuration.
+ * @PINCFG_TYPE_SKEW_RATE: Skew rate configuration.
+ * @PINCFG_TYPE_INPUT_TYPE: Pin input type configuration.
+ */
+enum pincfg_type {
+ PINCFG_TYPE_PUD,
+ PINCFG_TYPE_DRV,
+ PINCFG_TYPE_SKEW_RATE,
+ PINCFG_TYPE_INPUT_TYPE
+};
+
+/**
+ * struct exynos5440_pin_group: represent group of pins for pincfg setting.
+ * @name: name of the pin group, used to lookup the group.
+ * @pins: the pins included in this group.
+ * @num_pins: number of pins included in this group.
+ */
+struct exynos5440_pin_group {
+ const char *name;
+
