RE: [PATCH v2 08/11] ARM: EXYNOS: add support for ARCH_EXYNOS5 and EXYNOS5250
Kyungmin Park wrote: > > Hi, > [...] > > > > +config ARCH_EXYNOS5 > > + bool "SAMSUNG EXYNOS5" > > + select HAVE_SMP > > + help > > + Samsung EXYNOS5 (Cortex-A15) SoC based systems > This config is located at choice. It means it can't build the exynos4 > and exynos5 simultaneously. I'm not sure it's acceptable for mainline. See Arnd's comments. [...] > > +obj-$(CONFIG_ARCH_EXYNOS5) += clock-exynos5.o > Where's clock-exynos5.c file in this patch?. maybe it's another patch. See 3rd patch. [...] > > +void exynos5_restart(char mode, const char *cmd) > > +{ > > + __raw_writel(0x1, EXYNOS_SWRESET); > > +} > Why new restart is required? it's same S5P_SWRESET and EXYNOS_SWRESET. > see below. It will be updated for exynos5. [...] > > > > #define S5P_SWRESETS5P_PMUREG(0x0400) > > +#define EXYNOS_SWRESET S5P_PMUREG(0x0400) > Please use just one. > See above. Thanks. Best regards, Kgene. -- Kukjin Kim , Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd. -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH v2 08/11] ARM: EXYNOS: add support for ARCH_EXYNOS5 and EXYNOS5250
Arnd Bergmann wrote: > > On Thursday 16 February 2012, Kyungmin Park wrote: > > > > > > +config ARCH_EXYNOS5 > > > + bool "SAMSUNG EXYNOS5" > > > + select HAVE_SMP > > > + help > > > + Samsung EXYNOS5 (Cortex-A15) SoC based systems > > This config is located at choice. It means it can't build the exynos4 > > and exynos5 simultaneously. I'm not sure it's acceptable for mainline. > > If we use the new common struct clk on exynos5 but not exynos4, it should > stay a "choice" for the time being and get turned into a nonexclusive > selection as soon as exynos4 moves over. > Yes, right. > If exynos4 and exynos5 end up using the same struct clk in 3.4, I would > indeed ask to do this change now. > If possible, yes. But I'm going to move common struct clk for exynos4 and exynos5 next time. Thanks. Best regards, Kgene. -- Kukjin Kim , Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd. -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 08/11] ARM: EXYNOS: add support for ARCH_EXYNOS5 and EXYNOS5250
On Thursday 16 February 2012, Kyungmin Park wrote: > > > > +config ARCH_EXYNOS5 > > + bool "SAMSUNG EXYNOS5" > > + select HAVE_SMP > > + help > > + Samsung EXYNOS5 (Cortex-A15) SoC based systems > This config is located at choice. It means it can't build the exynos4 > and exynos5 simultaneously. I'm not sure it's acceptable for mainline. If we use the new common struct clk on exynos5 but not exynos4, it should stay a "choice" for the time being and get turned into a nonexclusive selection as soon as exynos4 moves over. If exynos4 and exynos5 end up using the same struct clk in 3.4, I would indeed ask to do this change now. Arnd -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 08/11] ARM: EXYNOS: add support for ARCH_EXYNOS5 and EXYNOS5250
Hi, On 2/12/12, Kukjin Kim wrote: > This patch add the CONFIG_ARCH_EXYNOS5 and CONFIG_SOC_EXYNOS5250 > support for EXYNOS5250 SoC has two Cortex-A15 cores. Since actually, > most codes in mach-exynos/ are used commonly for EXYNOS4 and EXYNOS5 > the EXYNOS5/EXYNOS5250 has been implemented in mach-exynos/. > > Signed-off-by: Kukjin Kim > --- > arch/arm/Makefile|1 + > arch/arm/mach-exynos/Kconfig | 13 ++ > arch/arm/mach-exynos/Makefile|1 + > arch/arm/mach-exynos/common.c| 165 > -- > arch/arm/mach-exynos/common.h| 11 ++ > arch/arm/mach-exynos/include/mach/map.h | 21 +++- > arch/arm/mach-exynos/include/mach/regs-pmu.h |1 + > arch/arm/plat-s5p/Kconfig|4 +- > arch/arm/plat-samsung/include/plat/cpu.h | 10 ++ > 9 files changed, 211 insertions(+), 16 deletions(-) > > diff --git a/arch/arm/Makefile b/arch/arm/Makefile > index 1683bfb..a826ffc 100644 > --- a/arch/arm/Makefile > +++ b/arch/arm/Makefile > @@ -180,6 +180,7 @@ machine-$(CONFIG_ARCH_S5P64X0):= s5p64x0 > machine-$(CONFIG_ARCH_S5PC100) := s5pc100 > machine-$(CONFIG_ARCH_S5PV210) := s5pv210 > machine-$(CONFIG_ARCH_EXYNOS4) := exynos > +machine-$(CONFIG_ARCH_EXYNOS5) := exynos > machine-$(CONFIG_ARCH_SA1100):= sa1100 > machine-$(CONFIG_ARCH_SHARK) := shark > machine-$(CONFIG_ARCH_SHMOBILE) := shmobile > diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig > index 5d602f6..14b3460 100644 > --- a/arch/arm/mach-exynos/Kconfig > +++ b/arch/arm/mach-exynos/Kconfig > @@ -22,6 +22,12 @@ config ARCH_EXYNOS4 > help > Samsung EXYNOS4 SoCs based systems > > +config ARCH_EXYNOS5 > + bool "SAMSUNG EXYNOS5" > + select HAVE_SMP > + help > + Samsung EXYNOS5 (Cortex-A15) SoC based systems This config is located at choice. It means it can't build the exynos4 and exynos5 simultaneously. I'm not sure it's acceptable for mainline. > + > endchoice > > comment "EXYNOS SoCs" > @@ -53,6 +59,13 @@ config SOC_EXYNOS4412 > help > Enable EXYNOS4412 SoC support > > +config SOC_EXYNOS5250 > + bool "SAMSUNG EXYNOS5250" > + default y > + depends on ARCH_EXYNOS5 > + help > + Enable EXYNOS5250 SoC support > + > config EXYNOS4_MCT > bool > default y > diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile > index f8a3770..7214092 100644 > --- a/arch/arm/mach-exynos/Makefile > +++ b/arch/arm/mach-exynos/Makefile > @@ -14,6 +14,7 @@ obj-:= > > obj-$(CONFIG_ARCH_EXYNOS)+= common.o > obj-$(CONFIG_ARCH_EXYNOS4) += clock-exynos4.o > +obj-$(CONFIG_ARCH_EXYNOS5) += clock-exynos5.o Where's clock-exynos5.c file in this patch?. maybe it's another patch. > obj-$(CONFIG_CPU_EXYNOS4210) += clock-exynos4210.o > obj-$(CONFIG_SOC_EXYNOS4212) += clock-exynos4212.o > > diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c > index 8db2627..cff7313 100644 > --- a/arch/arm/mach-exynos/common.c > +++ b/arch/arm/mach-exynos/common.c > @@ -49,9 +49,12 @@ > static const char name_exynos4210[] = "EXYNOS4210"; > static const char name_exynos4212[] = "EXYNOS4212"; > static const char name_exynos4412[] = "EXYNOS4412"; > +static const char name_exynos5250[] = "EXYNOS5250"; > > static void exynos4_map_io(void); > +static void exynos5_map_io(void); > static void exynos4_init_clocks(int xtal); > +static void exynos5_init_clocks(int xtal); > static void exynos_init_uarts(struct s3c2410_uartcfg *cfg, int no); > static int exynos_init(void); > > @@ -80,6 +83,14 @@ static struct cpu_table cpu_ids[] __initdata = { > .init_uarts = exynos_init_uarts, > .init = exynos_init, > .name = name_exynos4412, > + }, { > + .idcode = EXYNOS5250_SOC_ID, > + .idmask = EXYNOS5_SOC_MASK, > + .map_io = exynos5_map_io, > + .init_clocks= exynos5_init_clocks, > + .init_uarts = exynos_init_uarts, > + .init = exynos_init, > + .name = name_exynos5250, > }, > }; > > @@ -88,10 +99,14 @@ static struct cpu_table cpu_ids[] __initdata = { > static struct map_desc exynos_iodesc[] __initdata = { > { > .virtual= (unsigned long)S5P_VA_CHIPID, > - .pfn= __phys_to_pfn(EXYNOS4_PA_CHIPID), > + .pfn= __phys_to_pfn(EXYNOS_PA_CHIPID), > .length = SZ_4K, > .type = MT_DEVICE, > - }, { > + }, > +}; > + > +static struct map_desc exynos4_iodesc[] __initdata = { > + { > .virtual= (unsigned long)S3C_VA_SYS, > .pfn= __phys
[PATCH v2 08/11] ARM: EXYNOS: add support for ARCH_EXYNOS5 and EXYNOS5250
This patch add the CONFIG_ARCH_EXYNOS5 and CONFIG_SOC_EXYNOS5250 support for EXYNOS5250 SoC has two Cortex-A15 cores. Since actually, most codes in mach-exynos/ are used commonly for EXYNOS4 and EXYNOS5 the EXYNOS5/EXYNOS5250 has been implemented in mach-exynos/. Signed-off-by: Kukjin Kim --- arch/arm/Makefile|1 + arch/arm/mach-exynos/Kconfig | 13 ++ arch/arm/mach-exynos/Makefile|1 + arch/arm/mach-exynos/common.c| 165 -- arch/arm/mach-exynos/common.h| 11 ++ arch/arm/mach-exynos/include/mach/map.h | 21 +++- arch/arm/mach-exynos/include/mach/regs-pmu.h |1 + arch/arm/plat-s5p/Kconfig|4 +- arch/arm/plat-samsung/include/plat/cpu.h | 10 ++ 9 files changed, 211 insertions(+), 16 deletions(-) diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 1683bfb..a826ffc 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -180,6 +180,7 @@ machine-$(CONFIG_ARCH_S5P64X0) := s5p64x0 machine-$(CONFIG_ARCH_S5PC100) := s5pc100 machine-$(CONFIG_ARCH_S5PV210) := s5pv210 machine-$(CONFIG_ARCH_EXYNOS4) := exynos +machine-$(CONFIG_ARCH_EXYNOS5) := exynos machine-$(CONFIG_ARCH_SA1100) := sa1100 machine-$(CONFIG_ARCH_SHARK) := shark machine-$(CONFIG_ARCH_SHMOBILE):= shmobile diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index 5d602f6..14b3460 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig @@ -22,6 +22,12 @@ config ARCH_EXYNOS4 help Samsung EXYNOS4 SoCs based systems +config ARCH_EXYNOS5 + bool "SAMSUNG EXYNOS5" + select HAVE_SMP + help + Samsung EXYNOS5 (Cortex-A15) SoC based systems + endchoice comment "EXYNOS SoCs" @@ -53,6 +59,13 @@ config SOC_EXYNOS4412 help Enable EXYNOS4412 SoC support +config SOC_EXYNOS5250 + bool "SAMSUNG EXYNOS5250" + default y + depends on ARCH_EXYNOS5 + help + Enable EXYNOS5250 SoC support + config EXYNOS4_MCT bool default y diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile index f8a3770..7214092 100644 --- a/arch/arm/mach-exynos/Makefile +++ b/arch/arm/mach-exynos/Makefile @@ -14,6 +14,7 @@ obj- := obj-$(CONFIG_ARCH_EXYNOS) += common.o obj-$(CONFIG_ARCH_EXYNOS4) += clock-exynos4.o +obj-$(CONFIG_ARCH_EXYNOS5) += clock-exynos5.o obj-$(CONFIG_CPU_EXYNOS4210) += clock-exynos4210.o obj-$(CONFIG_SOC_EXYNOS4212) += clock-exynos4212.o diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c index 8db2627..cff7313 100644 --- a/arch/arm/mach-exynos/common.c +++ b/arch/arm/mach-exynos/common.c @@ -49,9 +49,12 @@ static const char name_exynos4210[] = "EXYNOS4210"; static const char name_exynos4212[] = "EXYNOS4212"; static const char name_exynos4412[] = "EXYNOS4412"; +static const char name_exynos5250[] = "EXYNOS5250"; static void exynos4_map_io(void); +static void exynos5_map_io(void); static void exynos4_init_clocks(int xtal); +static void exynos5_init_clocks(int xtal); static void exynos_init_uarts(struct s3c2410_uartcfg *cfg, int no); static int exynos_init(void); @@ -80,6 +83,14 @@ static struct cpu_table cpu_ids[] __initdata = { .init_uarts = exynos_init_uarts, .init = exynos_init, .name = name_exynos4412, + }, { + .idcode = EXYNOS5250_SOC_ID, + .idmask = EXYNOS5_SOC_MASK, + .map_io = exynos5_map_io, + .init_clocks= exynos5_init_clocks, + .init_uarts = exynos_init_uarts, + .init = exynos_init, + .name = name_exynos5250, }, }; @@ -88,10 +99,14 @@ static struct cpu_table cpu_ids[] __initdata = { static struct map_desc exynos_iodesc[] __initdata = { { .virtual= (unsigned long)S5P_VA_CHIPID, - .pfn= __phys_to_pfn(EXYNOS4_PA_CHIPID), + .pfn= __phys_to_pfn(EXYNOS_PA_CHIPID), .length = SZ_4K, .type = MT_DEVICE, - }, { + }, +}; + +static struct map_desc exynos4_iodesc[] __initdata = { + { .virtual= (unsigned long)S3C_VA_SYS, .pfn= __phys_to_pfn(EXYNOS4_PA_SYSCON), .length = SZ_64K, @@ -141,11 +156,7 @@ static struct map_desc exynos_iodesc[] __initdata = { .pfn= __phys_to_pfn(EXYNOS4_PA_UART), .length = SZ_512K, .type = MT_DEVICE, - }, -}; - -static struct map_desc exynos4_iodesc[] __initdata = { - { + }, { .virtua