Re: [PATCHv4 3/4] iio: devicetree: Add DT binding documentation for Exynos3250 ADC
Hi Tomasz,
On 06/18/2014 05:35 PM, Tomasz Figa wrote:
> Hi Chanwoo,
>
> On 18.06.2014 04:21, Chanwoo Choi wrote:
>> This patch add DT binding documentation for Exynos3250 ADC IP. Exynos3250 has
>> special clock ('sclk_tsadc') for ADC which provide clock to internal ADC.
>>
>> Signed-off-by: Chanwoo Choi
>> Acked-by: Kyungmin Park
>> ---
>> .../devicetree/bindings/arm/samsung/exynos-adc.txt | 20
>>
>> 1 file changed, 20 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
>> b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
>> index 5d49f2b..3a5af82 100644
>> --- a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
>> +++ b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
>> @@ -14,6 +14,8 @@ Required properties:
>> for exynos4412/5250 controllers.
>> Must be "samsung,exynos-adc-v2" for
>> future controllers.
>> +Must be "samsung,exynos3250-adc-v2" for
>> +for exynos3250 controllers.
>
> You might change the last line for:
>
> for controllers compatible with ADC of Exynos3250.
>
> This is to make it also account for possible future SoCs which need
> exactly the same handling.
OK, I'll modify it as folloiwng according to your comment:
>> +Must be "samsung,exynos3250-adc-v2" for
>> +for controllers compatible with ADC of
>> Exynos3250.
>
>
>> - reg: Contains ADC register address range (base
>> address and
>> length) and the address of the phy enable register.
>> - interrupts: Contains the interrupt information for the
>> timer. The
>> @@ -21,7 +23,11 @@ Required properties:
>> the Samsung device uses.
>> - #io-channel-cells = <1>; As ADC has multiple outputs
>> - clocksFrom common clock binding: handle to adc clock.
>> +From common clock binding: handle to sclk_tsadc clock
>> +if using Exynos3250.
>
> This is not clear. It might sound like the "sclk_tsadc" clock is used on
> Exynos3250 and "adc" on remaining SoCs. I'd write this simply as:
>
>>From common clock bindings: handles to clocks specified in "clock-names"
> property, in the same order.
I'll modify it.
>
>> - clock-names From common clock binding: Shall be "adc".
>> +From common clock binding: Shall be "sclk_tsadc"
>> +if using Exynos3250.
>
> This is also not clear. I'd recommend something like:
>
>>From common clock bindings: list of clock input names used by ADC block:
> - "adc" : ADC bus clock,
> - "sclk_tsadc" : ADC special clock (only for Exynos3250 and
> compatible ADC blocks).
I'll modify it.
Best Regards,
Chanwoo Choi
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Re: [PATCHv4 3/4] iio: devicetree: Add DT binding documentation for Exynos3250 ADC
Hi Chanwoo,
On 18.06.2014 04:21, Chanwoo Choi wrote:
> This patch add DT binding documentation for Exynos3250 ADC IP. Exynos3250 has
> special clock ('sclk_tsadc') for ADC which provide clock to internal ADC.
>
> Signed-off-by: Chanwoo Choi
> Acked-by: Kyungmin Park
> ---
> .../devicetree/bindings/arm/samsung/exynos-adc.txt | 20
>
> 1 file changed, 20 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
> b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
> index 5d49f2b..3a5af82 100644
> --- a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
> +++ b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
> @@ -14,6 +14,8 @@ Required properties:
> for exynos4412/5250 controllers.
> Must be "samsung,exynos-adc-v2" for
> future controllers.
> + Must be "samsung,exynos3250-adc-v2" for
> + for exynos3250 controllers.
You might change the last line for:
for controllers compatible with ADC of Exynos3250.
This is to make it also account for possible future SoCs which need
exactly the same handling.
> - reg: Contains ADC register address range (base
> address and
> length) and the address of the phy enable register.
> - interrupts:Contains the interrupt information for the
> timer. The
> @@ -21,7 +23,11 @@ Required properties:
> the Samsung device uses.
> - #io-channel-cells = <1>; As ADC has multiple outputs
> - clocks From common clock binding: handle to adc clock.
> + From common clock binding: handle to sclk_tsadc clock
> + if using Exynos3250.
This is not clear. It might sound like the "sclk_tsadc" clock is used on
Exynos3250 and "adc" on remaining SoCs. I'd write this simply as:
>From common clock bindings: handles to clocks specified in "clock-names"
property, in the same order.
> - clock-namesFrom common clock binding: Shall be "adc".
> + From common clock binding: Shall be "sclk_tsadc"
> + if using Exynos3250.
This is also not clear. I'd recommend something like:
>From common clock bindings: list of clock input names used by ADC block:
- "adc" : ADC bus clock,
- "sclk_tsadc" : ADC special clock (only for Exynos3250 and
compatible ADC blocks).
Best regards,
Tomasz
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Re: [PATCHv4 3/4] iio: devicetree: Add DT binding documentation for Exynos3250 ADC
Hi Naveen,
On 06/18/2014 03:12 PM, Naveen Krishna Ch wrote:
> Hello Chanwoo,
>
> On 18 June 2014 07:51, Chanwoo Choi wrote:
>> This patch add DT binding documentation for Exynos3250 ADC IP. Exynos3250 has
>> special clock ('sclk_tsadc') for ADC which provide clock to internal ADC.
>>
>> Signed-off-by: Chanwoo Choi
>> Acked-by: Kyungmin Park
>
> Changes look good to me.
> Reviewed-by: Naveen Krishna Chatradhi
Thanks for your review.
Best Regards,
Chanwoo Choi
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Re: [PATCHv4 3/4] iio: devicetree: Add DT binding documentation for Exynos3250 ADC
Hello Chanwoo,
On 18 June 2014 07:51, Chanwoo Choi wrote:
> This patch add DT binding documentation for Exynos3250 ADC IP. Exynos3250 has
> special clock ('sclk_tsadc') for ADC which provide clock to internal ADC.
>
> Signed-off-by: Chanwoo Choi
> Acked-by: Kyungmin Park
Changes look good to me.
Reviewed-by: Naveen Krishna Chatradhi
> ---
> .../devicetree/bindings/arm/samsung/exynos-adc.txt | 20
>
> 1 file changed, 20 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
> b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
> index 5d49f2b..3a5af82 100644
> --- a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
> +++ b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
> @@ -14,6 +14,8 @@ Required properties:
> for exynos4412/5250 controllers.
> Must be "samsung,exynos-adc-v2" for
> future controllers.
> + Must be "samsung,exynos3250-adc-v2" for
> + for exynos3250 controllers.
> - reg: Contains ADC register address range (base address and
> length) and the address of the phy enable register.
> - interrupts: Contains the interrupt information for the timer. The
> @@ -21,7 +23,11 @@ Required properties:
> the Samsung device uses.
> - #io-channel-cells = <1>; As ADC has multiple outputs
> - clocks From common clock binding: handle to adc clock.
> + From common clock binding: handle to sclk_tsadc clock
> + if using Exynos3250.
> - clock-names From common clock binding: Shall be "adc".
> + From common clock binding: Shall be "sclk_tsadc"
> + if using Exynos3250.
> - vdd-supply VDD input supply.
>
> Note: child nodes can be added for auto probing from device tree.
> @@ -41,6 +47,20 @@ adc: adc@12D1 {
> vdd-supply = <&buck5_reg>;
> };
>
> +Example: adding device info in dtsi file for Exynos3250 with additional sclk
> +
> +adc: adc@126C {
> + compatible = "samsung,exynos3250-adc-v2";
> + reg = <0x126C 0x100>, <0x10020718 0x4>;
> + interrupts = <0 137 0>;
> + #io-channel-cells = <1>;
> + io-channel-ranges;
> +
> + clocks = <&cmu CLK_TSADC>, <&cmu CLK_SCLK_TSADC>;
> + clock-names = "adc", "sclk_adc";
> +
> + vdd-supply = <&buck5_reg>;
> +};
>
> Example: Adding child nodes in dts file
>
> --
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>
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[PATCHv4 3/4] iio: devicetree: Add DT binding documentation for Exynos3250 ADC
This patch add DT binding documentation for Exynos3250 ADC IP. Exynos3250 has
special clock ('sclk_tsadc') for ADC which provide clock to internal ADC.
Signed-off-by: Chanwoo Choi
Acked-by: Kyungmin Park
---
.../devicetree/bindings/arm/samsung/exynos-adc.txt | 20
1 file changed, 20 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
index 5d49f2b..3a5af82 100644
--- a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
+++ b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
@@ -14,6 +14,8 @@ Required properties:
for exynos4412/5250 controllers.
Must be "samsung,exynos-adc-v2" for
future controllers.
+ Must be "samsung,exynos3250-adc-v2" for
+ for exynos3250 controllers.
- reg: Contains ADC register address range (base address and
length) and the address of the phy enable register.
- interrupts: Contains the interrupt information for the timer. The
@@ -21,7 +23,11 @@ Required properties:
the Samsung device uses.
- #io-channel-cells = <1>; As ADC has multiple outputs
- clocks From common clock binding: handle to adc clock.
+ From common clock binding: handle to sclk_tsadc clock
+ if using Exynos3250.
- clock-names From common clock binding: Shall be "adc".
+ From common clock binding: Shall be "sclk_tsadc"
+ if using Exynos3250.
- vdd-supply VDD input supply.
Note: child nodes can be added for auto probing from device tree.
@@ -41,6 +47,20 @@ adc: adc@12D1 {
vdd-supply = <&buck5_reg>;
};
+Example: adding device info in dtsi file for Exynos3250 with additional sclk
+
+adc: adc@126C {
+ compatible = "samsung,exynos3250-adc-v2";
+ reg = <0x126C 0x100>, <0x10020718 0x4>;
+ interrupts = <0 137 0>;
+ #io-channel-cells = <1>;
+ io-channel-ranges;
+
+ clocks = <&cmu CLK_TSADC>, <&cmu CLK_SCLK_TSADC>;
+ clock-names = "adc", "sclk_adc";
+
+ vdd-supply = <&buck5_reg>;
+};
Example: Adding child nodes in dts file
--
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