Re: [PATCH V5] pci: exynos: split into two parts such as Synopsys part and Exynos part

2013-08-08 Thread Jingoo Han
On Thursday, August 08, 2013 2:05 AM, Bjorn Helgaas wrote:
> On Tue, Aug 6, 2013 at 10:13 PM, Jingoo Han  wrote:
> > On Wednesday, July 31, 2013 5:14 PM, Jingoo Han  wrote:
> >> Exynos PCIe IP consists of Synopsys specific part and Exynos
> >> specific part. Only core block is a Synopsys designware part;
> >> other parts are Exynos specific.
> >> Also, the Synopsys designware part can be shared with other
> >> platforms; thus, it can be split two parts such as Synopsys
> >> designware part and Exynos specific part.
> >>
> >> Signed-off-by: Jingoo Han 
> >> Cc: Pratyush Anand 
> >> Cc: Mohit KUMAR 
> >
> > Hi Bjorn Helgaas,
> >
> > There is no comment for last 2 weeks.
> > Will you accept this patch?
> 
> I don't have any problem with this, since it's really arch code.  Do
> you want me to merge it, or do you have a standard path for merging
> Exynos and/or Designware changes?

Hi Bjorn,

I want you to merge it. :)
Thank you.

Best regards,
Jingoo Han

> 
> Bjorn
> 
> In case you need it:
> 
> Acked-by: Bjorn Helgaas 
> 
> >> ---
> >> Changes since v4:
> >> - fixed section mismatch warnings
> >> - fixed sparse warnings
> >>
> >>  .../devicetree/bindings/pci/designware-pcie.txt|3 +
> >>  arch/arm/boot/dts/exynos5440.dtsi  |2 +
> >>  drivers/pci/host/Makefile  |3 +-
> >>  drivers/pci/host/pci-exynos.c  |  530 ++
> >>  drivers/pci/host/pcie-designware.c | 1011 
> >> ++--
> >>  drivers/pci/host/pcie-designware.h |   65 ++
> >>  6 files changed, 874 insertions(+), 740 deletions(-)
> >>  create mode 100644 drivers/pci/host/pci-exynos.c
> >>  create mode 100644 drivers/pci/host/pcie-designware.h
> >

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Re: [PATCH V5] pci: exynos: split into two parts such as Synopsys part and Exynos part

2013-08-07 Thread Bjorn Helgaas
On Tue, Aug 6, 2013 at 10:13 PM, Jingoo Han  wrote:
> On Wednesday, July 31, 2013 5:14 PM, Jingoo Han  wrote:
>> Exynos PCIe IP consists of Synopsys specific part and Exynos
>> specific part. Only core block is a Synopsys designware part;
>> other parts are Exynos specific.
>> Also, the Synopsys designware part can be shared with other
>> platforms; thus, it can be split two parts such as Synopsys
>> designware part and Exynos specific part.
>>
>> Signed-off-by: Jingoo Han 
>> Cc: Pratyush Anand 
>> Cc: Mohit KUMAR 
>
> Hi Bjorn Helgaas,
>
> There is no comment for last 2 weeks.
> Will you accept this patch?

I don't have any problem with this, since it's really arch code.  Do
you want me to merge it, or do you have a standard path for merging
Exynos and/or Designware changes?

Bjorn

In case you need it:

Acked-by: Bjorn Helgaas 

>> ---
>> Changes since v4:
>> - fixed section mismatch warnings
>> - fixed sparse warnings
>>
>>  .../devicetree/bindings/pci/designware-pcie.txt|3 +
>>  arch/arm/boot/dts/exynos5440.dtsi  |2 +
>>  drivers/pci/host/Makefile  |3 +-
>>  drivers/pci/host/pci-exynos.c  |  530 ++
>>  drivers/pci/host/pcie-designware.c | 1011 
>> ++--
>>  drivers/pci/host/pcie-designware.h |   65 ++
>>  6 files changed, 874 insertions(+), 740 deletions(-)
>>  create mode 100644 drivers/pci/host/pci-exynos.c
>>  create mode 100644 drivers/pci/host/pcie-designware.h
>
>
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Re: [PATCH V5] pci: exynos: split into two parts such as Synopsys part and Exynos part

2013-08-06 Thread Jingoo Han
On Wednesday, July 31, 2013 5:14 PM, Jingoo Han  wrote:
> Exynos PCIe IP consists of Synopsys specific part and Exynos
> specific part. Only core block is a Synopsys designware part;
> other parts are Exynos specific.
> Also, the Synopsys designware part can be shared with other
> platforms; thus, it can be split two parts such as Synopsys
> designware part and Exynos specific part.
> 
> Signed-off-by: Jingoo Han 
> Cc: Pratyush Anand 
> Cc: Mohit KUMAR 

Hi Bjorn Helgaas,

There is no comment for last 2 weeks.
Will you accept this patch?


Best regards,
Jingoo Han

> ---
> Changes since v4:
> - fixed section mismatch warnings
> - fixed sparse warnings
> 
>  .../devicetree/bindings/pci/designware-pcie.txt|3 +
>  arch/arm/boot/dts/exynos5440.dtsi  |2 +
>  drivers/pci/host/Makefile  |3 +-
>  drivers/pci/host/pci-exynos.c  |  530 ++
>  drivers/pci/host/pcie-designware.c | 1011 
> ++--
>  drivers/pci/host/pcie-designware.h |   65 ++
>  6 files changed, 874 insertions(+), 740 deletions(-)
>  create mode 100644 drivers/pci/host/pci-exynos.c
>  create mode 100644 drivers/pci/host/pcie-designware.h


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