Re: [PATCH] scsi: ufs-qcom: add number of lanes per direction

2018-02-26 Thread cang

On 2018-02-09 10:29, Rob Herring wrote:

On Mon, Feb 05, 2018 at 08:02:07PM +0800, Can Guo wrote:

From: Gilad Broner 

Different platforms may have different number of lanes for the UFS 
link.

Add parameter to device tree specifying how many lanes should be
configured for the UFS link. And don't print err message for clocks
that are optional, this leads to unnecessary confusion about failure.

Signed-off-by: Gilad Broner 
Signed-off-by: Subhash Jadavani 
Signed-off-by: Can Guo 

diff --git a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt 
b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt

index 5357919..4cee3f9 100644
--- a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
+++ b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
@@ -31,6 +31,9 @@ Optional properties:
  defined or a value in the array is "0" then it is 
assumed
  that the frequency is set by the parent clock or a
  fixed rate clock source.
+- lanes-per-direction:	number of lanes available per direction - 
either 1 or 2.
+			Note that it is assume same number of lanes is used both 
directions at once.


Seems reasonable until someone does not make things symmetrical. We
should design for that case.

You are right, I will make changes like using lanes-tx and lanes-rx for 
Tx/Rx links for asymmetrial senarios and upload V2 patch

+   If not specified, default is 2 lanes per direction.

 Note: If above properties are not defined it can be assumed that the 
supply

 regulators or clocks are always on.


Re: [PATCH] scsi: ufs-qcom: add number of lanes per direction

2018-02-08 Thread Rob Herring
On Mon, Feb 05, 2018 at 08:02:07PM +0800, Can Guo wrote:
> From: Gilad Broner 
> 
> Different platforms may have different number of lanes for the UFS link.
> Add parameter to device tree specifying how many lanes should be
> configured for the UFS link. And don't print err message for clocks
> that are optional, this leads to unnecessary confusion about failure.
> 
> Signed-off-by: Gilad Broner 
> Signed-off-by: Subhash Jadavani 
> Signed-off-by: Can Guo 
> 
> diff --git a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt 
> b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
> index 5357919..4cee3f9 100644
> --- a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
> +++ b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
> @@ -31,6 +31,9 @@ Optional properties:
> defined or a value in the array is "0" then it is 
> assumed
> that the frequency is set by the parent clock or a
> fixed rate clock source.
> +- lanes-per-direction:   number of lanes available per direction - 
> either 1 or 2.
> + Note that it is assume same number of lanes is used 
> both directions at once.

Seems reasonable until someone does not make things symmetrical. We 
should design for that case.

> + If not specified, default is 2 lanes per direction.
>  
>  Note: If above properties are not defined it can be assumed that the supply
>  regulators or clocks are always on.


[PATCH] scsi: ufs-qcom: add number of lanes per direction

2018-02-05 Thread Can Guo
From: Gilad Broner 

Different platforms may have different number of lanes for the UFS link.
Add parameter to device tree specifying how many lanes should be
configured for the UFS link. And don't print err message for clocks
that are optional, this leads to unnecessary confusion about failure.

Signed-off-by: Gilad Broner 
Signed-off-by: Subhash Jadavani 
Signed-off-by: Can Guo 

diff --git a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt 
b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
index 5357919..4cee3f9 100644
--- a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
+++ b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
@@ -31,6 +31,9 @@ Optional properties:
  defined or a value in the array is "0" then it is 
assumed
  that the frequency is set by the parent clock or a
  fixed rate clock source.
+- lanes-per-direction: number of lanes available per direction - either 1 or 2.
+   Note that it is assume same number of lanes is used 
both directions at once.
+   If not specified, default is 2 lanes per direction.
 
 Note: If above properties are not defined it can be assumed that the supply
 regulators or clocks are always on.
diff --git a/drivers/scsi/ufs/ufs-qcom.c b/drivers/scsi/ufs/ufs-qcom.c
index 4cdffa4..84d37e9 100644
--- a/drivers/scsi/ufs/ufs-qcom.c
+++ b/drivers/scsi/ufs/ufs-qcom.c
@@ -50,13 +50,10 @@ static int ufs_qcom_host_clk_get(struct device *dev,
int err = 0;
 
clk = devm_clk_get(dev, name);
-   if (IS_ERR(clk)) {
+   if (IS_ERR(clk))
err = PTR_ERR(clk);
-   dev_err(dev, "%s: failed to get %s err %d",
-   __func__, name, err);
-   } else {
+   else
*clk_out = clk;
-   }
 
return err;
 }
@@ -78,9 +75,11 @@ static void ufs_qcom_disable_lane_clks(struct ufs_qcom_host 
*host)
if (!host->is_lane_clks_enabled)
return;
 
-   clk_disable_unprepare(host->tx_l1_sync_clk);
+   if (host->tx_l1_sync_clk)
+   clk_disable_unprepare(host->tx_l1_sync_clk);
clk_disable_unprepare(host->tx_l0_sync_clk);
-   clk_disable_unprepare(host->rx_l1_sync_clk);
+   if (host->rx_l1_sync_clk)
+   clk_disable_unprepare(host->rx_l1_sync_clk);
clk_disable_unprepare(host->rx_l0_sync_clk);
 
host->is_lane_clks_enabled = false;
@@ -104,21 +103,21 @@ static int ufs_qcom_enable_lane_clks(struct ufs_qcom_host 
*host)
if (err)
goto disable_rx_l0;
 
-   err = ufs_qcom_host_clk_enable(dev, "rx_lane1_sync_clk",
-   host->rx_l1_sync_clk);
-   if (err)
-   goto disable_tx_l0;
+   if (host->hba->lanes_per_direction > 1) {
+   err = ufs_qcom_host_clk_enable(dev, "rx_lane1_sync_clk",
+   host->rx_l1_sync_clk);
+   if (err)
+   goto disable_tx_l0;
 
-   err = ufs_qcom_host_clk_enable(dev, "tx_lane1_sync_clk",
-   host->tx_l1_sync_clk);
-   if (err)
-   goto disable_rx_l1;
+   /* The tx lane1 clk could be muxed, hence keep this optional */
+   if (host->tx_l1_sync_clk)
+   ufs_qcom_host_clk_enable(dev, "tx_lane1_sync_clk",
+host->tx_l1_sync_clk);
+   }
 
host->is_lane_clks_enabled = true;
goto out;
 
-disable_rx_l1:
-   clk_disable_unprepare(host->rx_l1_sync_clk);
 disable_tx_l0:
clk_disable_unprepare(host->tx_l0_sync_clk);
 disable_rx_l0:
@@ -134,21 +133,34 @@ static int ufs_qcom_init_lane_clks(struct ufs_qcom_host 
*host)
 
err = ufs_qcom_host_clk_get(dev,
"rx_lane0_sync_clk", &host->rx_l0_sync_clk);
-   if (err)
+   if (err) {
+   dev_err(dev, "%s: failed to get rx_lane0_sync_clk, err %d",
+   __func__, err);
goto out;
+   }
 
err = ufs_qcom_host_clk_get(dev,
"tx_lane0_sync_clk", &host->tx_l0_sync_clk);
-   if (err)
+   if (err) {
+   dev_err(dev, "%s: failed to get tx_lane0_sync_clk, err %d",
+   __func__, err);
goto out;
+   }
 
-   err = ufs_qcom_host_clk_get(dev, "rx_lane1_sync_clk",
-   &host->rx_l1_sync_clk);
-   if (err)
-   goto out;
+   /* In case of single lane per direction, don't read lane1 clocks */
+   if (host->hba->lanes_per_direction > 1) {
+   err = ufs_qcom_host_clk_get(dev, "rx_lane1_sync_clk",
+   &host->rx_l1_sync_clk);
+   if (err) {
+   dev_err(dev, "%s: failed to get rx_lane1_sync_clk, err 
%d",
+   __func__, err);
+   goto out;
+