Re: [PATCH] ARC: update the help message for CONFIG_ARC_BUILTIN_DTB_NAME
On 8/31/24 23:50, Masahiro Yamada wrote: > On Sun, Sep 1, 2024 at 8:02 AM Vineet Gupta wrote: >> >> >> On 8/31/24 03:13, Masahiro Yamada wrote: >>> On Sat, Aug 31, 2024 at 7:10 PM Masahiro Yamada >>> wrote: >>>> Commit abe11ddea1d7 ("ARC: [plat-arcfpga]: Enabling DeviceTree for >>>> Angel4 board") changed the default built-in DTB from "skeleton" to >>>> "angel4". >>>> >>>> Commit fd1557923b2e ("ARC: [plat_arcfpga]->[plat_sim]") changed it >>>> from "angel4" to "nsim_70". >>> A typo. >>> >>> ... to "nsim_700". >>> >>> >>>> Signed-off-by: Masahiro Yamada >> Acked-by: Vineet Gupta > > Will you pick it up, or shall I do it? I don't have anything major in my queue, so please take it. Thx, -Vineet ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [PATCH] ARC: update the help message for CONFIG_ARC_BUILTIN_DTB_NAME
On 8/31/24 03:13, Masahiro Yamada wrote: > On Sat, Aug 31, 2024 at 7:10 PM Masahiro Yamada wrote: >> Commit abe11ddea1d7 ("ARC: [plat-arcfpga]: Enabling DeviceTree for >> Angel4 board") changed the default built-in DTB from "skeleton" to >> "angel4". >> >> Commit fd1557923b2e ("ARC: [plat_arcfpga]->[plat_sim]") changed it >> from "angel4" to "nsim_70". > > A typo. > > ... to "nsim_700". > > >> Signed-off-by: Masahiro Yamada Acked-by: Vineet Gupta Thx, -Vineet >> --- >> >> arch/arc/Kconfig | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig >> index fd0b0a0d4686..d01e69a29b69 100644 >> --- a/arch/arc/Kconfig >> +++ b/arch/arc/Kconfig >> @@ -553,7 +553,7 @@ config ARC_BUILTIN_DTB_NAME >> string "Built in DTB" >> help >> Set the name of the DTB to embed in the vmlinux binary >> - Leaving it blank selects the minimal "skeleton" dtb >> + Leaving it blank selects the "nsim_700" dtb. >> >> endmenu # "ARC Architecture Configuration" >> >> -- >> 2.43.0 >> > ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [PATCH cmpxchg 2/3] ARC: Emulate one-byte cmpxchg
On 8/5/24 21:28, Paul E. McKenney wrote: > On Mon, Aug 05, 2024 at 06:27:57PM -0700, Vineet Gupta wrote: >> Hi Paul, >> >> On 8/5/24 12:21, Paul E. McKenney wrote: >>> Use the new cmpxchg_emu_u8() to emulate one-byte cmpxchg() on arc. >>> >>> [ paulmck: Drop two-byte support per Arnd Bergmann feedback. ] >>> [ paulmck: Apply feedback from Naresh Kamboju. ] >>> [ paulmck: Apply kernel test robot feedback. ] >>> >>> Signed-off-by: Paul E. McKenney >>> Cc: Vineet Gupta >>> Cc: Andi Shyti >>> Cc: Andrzej Hajda >>> Cc: Arnd Bergmann >>> Cc: Palmer Dabbelt >>> Cc: >>> --- >>> arch/arc/Kconfig | 1 + >>> arch/arc/include/asm/cmpxchg.h | 33 - >>> 2 files changed, 25 insertions(+), 9 deletions(-) >>> >>> diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig >>> index fd0b0a0d4686a..163608fd49d18 100644 >>> --- a/arch/arc/Kconfig >>> +++ b/arch/arc/Kconfig >>> @@ -13,6 +13,7 @@ config ARC >>> select ARCH_HAS_SETUP_DMA_OPS >>> select ARCH_HAS_SYNC_DMA_FOR_CPU >>> select ARCH_HAS_SYNC_DMA_FOR_DEVICE >>> + select ARCH_NEED_CMPXCHG_1_EMU >>> select ARCH_SUPPORTS_ATOMIC_RMW if ARC_HAS_LLSC >>> select ARCH_32BIT_OFF_T >>> select BUILDTIME_TABLE_SORT >>> diff --git a/arch/arc/include/asm/cmpxchg.h b/arch/arc/include/asm/cmpxchg.h >>> index e138fde067dea..2102ce076f28b 100644 >>> --- a/arch/arc/include/asm/cmpxchg.h >>> +++ b/arch/arc/include/asm/cmpxchg.h >>> @@ -8,6 +8,7 @@ >>> >>> #include >>> #include >>> +#include >>> >>> #include >>> #include >>> @@ -46,6 +47,9 @@ >>> __typeof__(*(ptr)) _prev_; \ >>> \ >>> switch(sizeof((_p_))) { \ >>> + case 1: \ >>> + _prev_ = (__typeof__(*(ptr)))cmpxchg_emu_u8((volatile u8 *)_p_, >>> (uintptr_t)_o_, (uintptr_t)_n_);\ >>> + break; \ >>> case 4: \ >>> _prev_ = __cmpxchg(_p_, _o_, _n_); \ >>> break; \ >>> @@ -65,16 +69,27 @@ >>> __typeof__(*(ptr)) _prev_; \ >>> unsigned long __flags; \ >>> \ >>> - BUILD_BUG_ON(sizeof(_p_) != 4); \ >> Is this alone not sufficient: i.e. for !LLSC let the atomic op happen >> under a spin-lock for non 4 byte quantities as well. > Now that you mention it, that would be a lot simpler. > >>> + switch(sizeof((_p_))) { \ >>> + case 1: \ >>> + __flags = cmpxchg_emu_u8((volatile u8 *)_p_, (uintptr_t)_o_, >>> (uintptr_t)_n_); \ >>> + _prev_ = (__typeof__(*(ptr)))__flags; \ >>> + break; \ >>> + break; \ >> FWIW, the 2nd break seems extraneous. > And to your earlier point, the first break as well. ;-) > > How does the updated patch below look? Or did I miss your point? > > Thanx, Paul > > > > commit 96c1107797ca329fe203818cdfda2fe5f5a9a82e > Author: Paul E. McKenney > Date: Mon Mar 18 01:27:35 2024 -0700 > > ARC: Emulate one-byte cmpxchg > > Use the new cmpxchg_emu_u8() to emulate one-byte cmpxchg() on arc. > > [ paulmck: Drop two-byte support per Arnd Bergmann feedback. ] > [ paulmck: Apply feedback from Naresh Kamboju. ] > [ paulmck: Apply kernel test robot feedback. ] > [ paulmck: Apply feedback from Vineet Gupta. ] > > Signed-off-by: Paul E. McKenney > Cc: Vineet Gupta > Cc: Andi Shyti > Cc: Andrzej Hajda > Cc: Arnd Bergmann > Cc: Palmer Dabbelt > Cc: Acked-by: Vineet Gupta Thx, -Vinee
Re: [PATCH cmpxchg 2/3] ARC: Emulate one-byte cmpxchg
Hi Paul, On 8/5/24 12:21, Paul E. McKenney wrote: > Use the new cmpxchg_emu_u8() to emulate one-byte cmpxchg() on arc. > > [ paulmck: Drop two-byte support per Arnd Bergmann feedback. ] > [ paulmck: Apply feedback from Naresh Kamboju. ] > [ paulmck: Apply kernel test robot feedback. ] > > Signed-off-by: Paul E. McKenney > Cc: Vineet Gupta > Cc: Andi Shyti > Cc: Andrzej Hajda > Cc: Arnd Bergmann > Cc: Palmer Dabbelt > Cc: > --- > arch/arc/Kconfig | 1 + > arch/arc/include/asm/cmpxchg.h | 33 - > 2 files changed, 25 insertions(+), 9 deletions(-) > > diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig > index fd0b0a0d4686a..163608fd49d18 100644 > --- a/arch/arc/Kconfig > +++ b/arch/arc/Kconfig > @@ -13,6 +13,7 @@ config ARC > select ARCH_HAS_SETUP_DMA_OPS > select ARCH_HAS_SYNC_DMA_FOR_CPU > select ARCH_HAS_SYNC_DMA_FOR_DEVICE > + select ARCH_NEED_CMPXCHG_1_EMU > select ARCH_SUPPORTS_ATOMIC_RMW if ARC_HAS_LLSC > select ARCH_32BIT_OFF_T > select BUILDTIME_TABLE_SORT > diff --git a/arch/arc/include/asm/cmpxchg.h b/arch/arc/include/asm/cmpxchg.h > index e138fde067dea..2102ce076f28b 100644 > --- a/arch/arc/include/asm/cmpxchg.h > +++ b/arch/arc/include/asm/cmpxchg.h > @@ -8,6 +8,7 @@ > > #include > #include > +#include > > #include > #include > @@ -46,6 +47,9 @@ > __typeof__(*(ptr)) _prev_; \ > \ > switch(sizeof((_p_))) { \ > + case 1: \ > + _prev_ = (__typeof__(*(ptr)))cmpxchg_emu_u8((volatile u8 *)_p_, > (uintptr_t)_o_, (uintptr_t)_n_);\ > + break; \ > case 4: \ > _prev_ = __cmpxchg(_p_, _o_, _n_); \ > break; \ > @@ -65,16 +69,27 @@ > __typeof__(*(ptr)) _prev_; \ > unsigned long __flags; \ > \ > - BUILD_BUG_ON(sizeof(_p_) != 4); \ Is this alone not sufficient: i.e. for !LLSC let the atomic op happen under a spin-lock for non 4 byte quantities as well. > + switch(sizeof((_p_))) { \ > + case 1: \ > + __flags = cmpxchg_emu_u8((volatile u8 *)_p_, (uintptr_t)_o_, > (uintptr_t)_n_); \ > + _prev_ = (__typeof__(*(ptr)))__flags; \ > + break; \ > + break; \ FWIW, the 2nd break seems extraneous. > + case 4: \ > + /* \ > + * spin lock/unlock provide the needed smp_mb() \ > + * before/after \ > + */ \ > + atomic_ops_lock(__flags); \ > + _prev_ = *_p_; \ > + if (_prev_ == _o_) \ > + *_p_ = _n_; \ > + atomic_ops_unlock(__flags); \ > + break; \ > + default:\ > + BUILD_BUG();\ > + } \ > \ > - /* \ > - * spin lock/unlock provide the needed smp_mb() before/after\ > - */ \ > - atomic_ops_lock(__flags); \ > - _prev_ = *_p_; \ > - if (_prev_ == _o_) \ > - *_p_ = _n_; \ > - atomic_ops_unlock(__flags);
[GIT PULL] ARX fixes for 6.9
Hi Linus, A few fixes for ARC, please pull ! Thx, -Vineet -> The following changes since commit 39cd87c4eb2b893354f3b850f916353f2658ae6f: Linux 6.9-rc2 (2024-03-31 14:32:39 -0700) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc.git/ tags/arc-6.9-fixes for you to fetch changes up to 61231eb8113ce47991f35024f9c20810b37996bf: ARC: [plat-hsdk]: Remove misplaced interrupt-cells property (2024-04-16 10:45:57 -0700) ARC fixes for 6.9 - Incorrect VIPT aliasing assumption - Miscll build warning fixes and some typos Alexey Brodkin (1): ARC: [plat-hsdk]: Remove misplaced interrupt-cells property Bjorn Helgaas (1): ARC: Fix typos Vineet Gupta (2): ARC: Fix -Wmissing-prototypes warnings ARC: mm: fix new code about cache aliasing arch/arc/Kconfig | 1 - arch/arc/boot/Makefile | 4 ++-- arch/arc/boot/dts/axc003.dtsi | 4 ++-- arch/arc/boot/dts/hsdk.dts | 1 - arch/arc/boot/dts/vdk_axs10x_mb.dtsi | 2 +- arch/arc/include/asm/cachetype.h | 9 - arch/arc/include/asm/dsp.h | 2 +- arch/arc/include/asm/entry-compact.h | 10 +- arch/arc/include/asm/entry.h | 4 ++-- arch/arc/include/asm/irq.h | 2 +- arch/arc/include/asm/irqflags-compact.h | 2 +- arch/arc/include/asm/mmu_context.h | 2 +- arch/arc/include/asm/pgtable-bits-arcv2.h | 2 +- arch/arc/include/asm/ptrace.h | 2 +- arch/arc/include/asm/shmparam.h | 2 +- arch/arc/include/asm/smp.h | 4 ++-- arch/arc/include/asm/thread_info.h | 2 +- arch/arc/include/uapi/asm/swab.h | 2 +- arch/arc/kernel/entry-arcv2.S | 8 arch/arc/kernel/entry.S | 4 ++-- arch/arc/kernel/head.S | 2 +- arch/arc/kernel/intc-arcv2.c | 2 +- arch/arc/kernel/kprobes.c | 7 --- arch/arc/kernel/perf_event.c | 2 +- arch/arc/kernel/setup.c | 2 +- arch/arc/kernel/signal.c | 7 --- arch/arc/kernel/traps.c | 2 +- arch/arc/kernel/vmlinux.lds.S | 4 ++-- arch/arc/mm/tlb.c | 4 ++-- arch/arc/mm/tlbex.S | 8 30 files changed, 50 insertions(+), 59 deletions(-) delete mode 100644 arch/arc/include/asm/cachetype.h ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [PATCH v2] ARC: Fix typos
On 3/29/24 15:14, Bjorn Helgaas wrote: > From: Bjorn Helgaas > > Fix typos, most reported by "codespell arch/arc". Only touches comments, > no code changes. > > Signed-off-by: Bjorn Helgaas Added to ARC for-curr. Thx, -Vineet ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [PATCH 2/8] ARC: Fix typos
On 1/4/24 11:02, Bjorn Helgaas wrote: >>> diff --git a/arch/arc/kernel/signal.c b/arch/arc/kernel/signal.c >>> index 0b3bb529d246..5414d9f5c40c 100644 >>> --- a/arch/arc/kernel/signal.c >>> +++ b/arch/arc/kernel/signal.c >>> @@ -9,7 +9,7 @@ >>> * vineetg: Nov 2009 (Everything needed for TIF_RESTORE_SIGMASK) >>> * -do_signal() supports TIF_RESTORE_SIGMASK >>> * -do_signal() no loner needs oldset, required by OLD sys_sigsuspend >>> - * -sys_rt_sigsuspend() now comes from generic code, so discard arch >>> implemen >>> + * -sys_rt_sigsuspend() now comes from generic code, so discard arch >>> implement >> > Thanks again. > > Added these and a couple other ones to my local copy in case there's a > v2: Sorry this slipped thru cracks. I don't see it upstream and given some pending fixes for Linus can pick this up. So I take v1 + the fixlet below or do you have any more local changes and prefer respin/resending ? Thx, -Vineet > > diff --git a/arch/arc/include/asm/pgtable-bits-arcv2.h > b/arch/arc/include/asm/pgtable-bits-arcv2.h > index f8f85c04d7a8..8ebec1b21d24 100644 > --- a/arch/arc/include/asm/pgtable-bits-arcv2.h > +++ b/arch/arc/include/asm/pgtable-bits-arcv2.h > @@ -66,7 +66,7 @@ > * Other rules which cause the divergence from 1:1 mapping > * > * 1. Although ARC700 can do exclusive execute/write protection (meaning R > - * can be tracked independent of X/W unlike some other CPUs), still to > + * can be tracked independently of X/W unlike some other CPUs), still to > * keep things consistent with other archs: > * -Write implies Read: W => R > * -Execute implies Read: X => R > diff --git a/arch/arc/kernel/signal.c b/arch/arc/kernel/signal.c > index 5414d9f5c40c..3490d005e6d4 100644 > --- a/arch/arc/kernel/signal.c > +++ b/arch/arc/kernel/signal.c > @@ -8,15 +8,16 @@ > * > * vineetg: Nov 2009 (Everything needed for TIF_RESTORE_SIGMASK) > * -do_signal() supports TIF_RESTORE_SIGMASK > - * -do_signal() no loner needs oldset, required by OLD sys_sigsuspend > - * -sys_rt_sigsuspend() now comes from generic code, so discard arch > implement > + * -do_signal() no longer needs oldset, required by OLD sys_sigsuspend > + * -sys_rt_sigsuspend() now comes from generic code, so discard arch > + * implementation > * -sys_sigsuspend() no longer needs to fudge ptregs, hence that arg removed > * -sys_sigsuspend() no longer loops for do_signal(), sets TIF_xxx and > leaves > * the job to do_signal() > * > * vineetg: July 2009 > * -Modified Code to support the uClibc provided userland sigreturn stub > - * to avoid kernel synthesing it on user stack at runtime, costing TLB > + * to avoid kernel synthesizing it on user stack at runtime, costing TLB > * probes and Cache line flushes. > * > * vineetg: July 2009 ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: recent kernel warning
On 3/28/24 11:01, Alexey Brodkin wrote: > Hi Vineet, > > Indeed, it's incorrect placement of "#interrupt-cells" in the Ethernet > controller node. > I'll remove it and will send out a patch with the fix. And while at it please audit all the DTs in arch/arc Thx, -Vineet > > Thanks for the pointer. > > -Alexey > -------- > *From:* Vineet Gupta > *Sent:* Thursday, March 28, 2024 5:15 AM > *To:* Alexey Brodkin ; arcml > > *Subject:* recent kernel warning > > Alexey, > > Can you have someone look at the following kernel warning: > > DTC arch/arc/boot/dts/hsdk.dtb > ../arch/arc/boot/dts/hsdk.dts:207.23-235.5: Warning > (interrupt_provider): /soc/ethernet@8000: '#interrupt-cells' found, but > node is not an interrupt provider > arch/arc/boot/dts/hsdk.dtb: Warning (interrupt_map): Failed prerequisite > 'interrupt_provider' > > Thx, > -Vineet ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [PATCH 2/2] ARC: mm: fix new code about cache aliasing
On 3/28/24 06:57, Mathieu Desnoyers wrote: > On 2024-03-28 01:39, Vineet Gupta wrote: >> Manual/partial revert of 8690bbcf3b70 ("Introduce cpu_dcache_is_aliasing() >> across all architectures") >> >> Current generation of ARCv2/ARCv3 based HSxx cores are only PIPT (to software >> at least). >> >> Legacy ARC700 cpus could be VIPT aliasing (based on cache geometry and >> PAGE_SIZE) however recently that support was ripped out so VIPT aliasing >> cache is not relevant to ARC anymore. >> >> P.S. : This has been discussed a few times on lists [1] >> P.S.2: Please CC the arch maintainers and/or mailing list before adding >> such interfaces. > Because 8690bbcf3b70 was introducing a tree-wide change affecting all > architectures, I CC'd linux-a...@vger.kernel.org. I expected all > architecture maintainers to follow that list, which is relatively > low volume. Ideally yeah arch maintainers should be lurking there. > I'm sorry that you learn about this after the fact as a result. Please don't be, no harm done, the fix was easy ;-) > My intent was to use the list rather than CC about 50 additional > people/mailing lists. That is true but I don't think maintainers mind that in general. I still posit that any new interfaces to arch code should be explicitly run by them. > Of course, if VIPT aliasing is removed from ARC, removing the > config ARCH_HAS_CPU_CACHE_ALIASING and using the generic > cpu_dcache_is_aliasing() is the way to go. Feel free to add > my: > > Acked-by: Mathieu Desnoyers Thx, -Vineet ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: next: arc: defconfig - gcc-9 - mmu-arcv2.h:82:2: error: implicit declaration of function 'write_aux_reg' [-Werror=implicit-function-declaration]
On 3/25/24 23:39, Naresh Kamboju wrote: > The following arc defconfig build warnings / errors noticed on today's > Linux next-20240326 tag. > > Regressions: > * arc - defconfig - gcc-9 build failed. > > Reported-by: Linux Kernel Functional Testing > > Build log: > - > arch/arc/kernel/ptrace.c:342:16: warning: no previous prototype for > 'syscall_trace_enter' [-Wmissing-prototypes] > 342 | asmlinkage int syscall_trace_enter(struct pt_regs *regs) > |^~~ > arch/arc/kernel/kprobes.c:193:15: warning: no previous prototype for > 'arc_kprobe_handler' [-Wmissing-prototypes] > 193 | int __kprobes arc_kprobe_handler(unsigned long addr, struct > pt_regs *regs) > | ^~ > In file included from arch/arc/include/asm/mmu.h:21, > from arch/arc/include/asm/pgtable.h:14, > from include/linux/pgtable.h:6, > from include/asm-generic/io.h:1047, > from arch/arc/include/asm/io.h:232, > from include/linux/io.h:13, > from kernel/dma/coherent.c:6: > arch/arc/include/asm/mmu-arcv2.h: In function 'mmu_setup_asid': > arch/arc/include/asm/mmu-arcv2.h:82:2: error: implicit declaration of > function 'write_aux_reg' [-Werror=implicit-function-declaration] >82 | write_aux_reg(ARC_REG_PID, asid | MMU_ENABLE); > | ^ > cc1: some warnings being treated as errors Thx for the report. Fix posted for first 2 warnings [1] I can't reproduce the last warning about write_aux_reg() despite using the config from 3rd link below. -Vineet [1] http://lists.infradead.org/pipermail/linux-snps-arc/2024-March/007916.html > > Steps to reproduce: > --- > # tuxmake --runtime podman --target-arch arc --toolchain gcc-9 > --kconfig defconfig > > > Links: > - > https://qa-reports.linaro.org/lkft/linux-next-master/build/next-20240325/testrun/23149630/suite/build/test/gcc-9-defconfig/log > - > https://qa-reports.linaro.org/lkft/linux-next-master/build/next-20240325/testrun/23149630/suite/build/test/gcc-9-defconfig/history/ > - > https://storage.tuxsuite.com/public/linaro/lkft/builds/2eA2VSZdDsL0DMBBhjoauN9IVoK/ > > -- > Linaro LKFT > https://lkft.linaro.org ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
[PATCH 1/2] ARC: Fix -Wmissing-prototypes warnings
| ../arch/arc/kernel/kprobes.c:193:15: warning: no previous prototype for 'arc_kprobe_handler' [-Wmissing-prototypes] | 193 | int __kprobes arc_kprobe_handler(unsigned long addr, struct pt_regs *regs) | |../arch/arc/kernel/ptrace.c:342:16: warning: no previous prototype for 'syscall_trace_enter' [-Wmissing-prototypes] | 342 | asmlinkage int syscall_trace_enter(struct pt_regs *regs) Link: https://qa-reports.linaro.org/lkft/linux-next-master/build/next-20240325/testrun/23149630/suite/build/test/gcc-9-defconfig/log Reported-by: Linux Kernel Functional Testing Signed-off-by: Vineet Gupta --- arch/arc/include/asm/ptrace.h | 2 +- arch/arc/kernel/kprobes.c | 7 --- 2 files changed, 5 insertions(+), 4 deletions(-) diff --git a/arch/arc/include/asm/ptrace.h b/arch/arc/include/asm/ptrace.h index 00b9318e551e..cf79df0b2570 100644 --- a/arch/arc/include/asm/ptrace.h +++ b/arch/arc/include/asm/ptrace.h @@ -169,7 +169,7 @@ static inline unsigned long regs_get_register(struct pt_regs *regs, return *(unsigned long *)((unsigned long)regs + offset); } -extern int syscall_trace_entry(struct pt_regs *); +extern int syscall_trace_enter(struct pt_regs *); extern void syscall_trace_exit(struct pt_regs *); #endif /* !__ASSEMBLY__ */ diff --git a/arch/arc/kernel/kprobes.c b/arch/arc/kernel/kprobes.c index e71d64119d71..f8e2960832d9 100644 --- a/arch/arc/kernel/kprobes.c +++ b/arch/arc/kernel/kprobes.c @@ -190,7 +190,8 @@ static void __kprobes setup_singlestep(struct kprobe *p, struct pt_regs *regs) } } -int __kprobes arc_kprobe_handler(unsigned long addr, struct pt_regs *regs) +static int +__kprobes arc_kprobe_handler(unsigned long addr, struct pt_regs *regs) { struct kprobe *p; struct kprobe_ctlblk *kcb; @@ -241,8 +242,8 @@ int __kprobes arc_kprobe_handler(unsigned long addr, struct pt_regs *regs) return 0; } -static int __kprobes arc_post_kprobe_handler(unsigned long addr, -struct pt_regs *regs) +static int +__kprobes arc_post_kprobe_handler(unsigned long addr, struct pt_regs *regs) { struct kprobe *cur = kprobe_running(); struct kprobe_ctlblk *kcb = get_kprobe_ctlblk(); -- 2.34.1 ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
[PATCH 0/2] ARC minor fixes
Some fixlets for ARC. Vineet Gupta (2): ARC: Fix -Wmissing-prototypes warnings ARC: mm: fix new code about cache aliasing arch/arc/Kconfig | 1 - arch/arc/include/asm/cachetype.h | 9 - arch/arc/include/asm/ptrace.h| 2 +- arch/arc/kernel/kprobes.c| 7 --- 4 files changed, 5 insertions(+), 14 deletions(-) delete mode 100644 arch/arc/include/asm/cachetype.h -- 2.34.1 ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
[PATCH 2/2] ARC: mm: fix new code about cache aliasing
Manual/partial revert of 8690bbcf3b70 ("Introduce cpu_dcache_is_aliasing() across all architectures") Current generation of ARCv2/ARCv3 based HSxx cores are only PIPT (to software at least). Legacy ARC700 cpus could be VIPT aliasing (based on cache geometry and PAGE_SIZE) however recently that support was ripped out so VIPT aliasing cache is not relevant to ARC anymore. P.S. : This has been discussed a few times on lists [1] P.S.2: Please CC the arch maintainers and/or mailing list before adding such interfaces. [1] http://lists.infradead.org/pipermail/linux-snps-arc/2023-February/006899.html Cc: Mathieu Desnoyers Signed-off-by: Vineet Gupta --- arch/arc/Kconfig | 1 - arch/arc/include/asm/cachetype.h | 9 - 2 files changed, 10 deletions(-) delete mode 100644 arch/arc/include/asm/cachetype.h diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig index 99d2845f3feb..4092bec198be 100644 --- a/arch/arc/Kconfig +++ b/arch/arc/Kconfig @@ -6,7 +6,6 @@ config ARC def_bool y select ARC_TIMERS - select ARCH_HAS_CPU_CACHE_ALIASING select ARCH_HAS_CACHE_LINE_SIZE select ARCH_HAS_DEBUG_VM_PGTABLE select ARCH_HAS_DMA_PREP_COHERENT diff --git a/arch/arc/include/asm/cachetype.h b/arch/arc/include/asm/cachetype.h deleted file mode 100644 index 05fc7ed59712.. --- a/arch/arc/include/asm/cachetype.h +++ /dev/null @@ -1,9 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef __ASM_ARC_CACHETYPE_H -#define __ASM_ARC_CACHETYPE_H - -#include - -#define cpu_dcache_is_aliasing() true - -#endif -- 2.34.1 ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
recent kernel warning
Alexey, Can you have someone look at the following kernel warning: DTC arch/arc/boot/dts/hsdk.dtb ../arch/arc/boot/dts/hsdk.dts:207.23-235.5: Warning (interrupt_provider): /soc/ethernet@8000: '#interrupt-cells' found, but node is not an interrupt provider arch/arc/boot/dts/hsdk.dtb: Warning (interrupt_map): Failed prerequisite 'interrupt_provider' Thx, -Vineet ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [RFC v2.1 01/12] ARC: Use initializer for struct vm_unmapped_area_info
On 3/1/24 16:17, Rick Edgecombe wrote: > Future changes will need to add a new member to struct > vm_unmapped_area_info. This would cause trouble for any call site that > doesn't initialize the struct. Currently every caller sets each field > manually, so if new fields are added they will be unitialized and the core > code parsing the struct will see garbage in the new field. > > It could be possible to initialize the new field manually to 0 at each > call site. This and a couple other options were discussed, and the > consensus (see links) was that in general the best way to accomplish this > would be via static initialization with designated field initiators. > Having some struct vm_unmapped_area_info instances not zero initialized > will put those sites at risk of feeding garbage into vm_unmapped_area() if > the convention is to zero initialize the struct and any new field addition > misses a call site that initializes each field manually. > > It could be possible to leave the code mostly untouched, and just change > the line: > struct vm_unmapped_area_info info > to: > struct vm_unmapped_area_info info = {}; > > However, that would leave cleanup for the fields that are manually set > to zero, as it would no longer be required. > > So to be reduce the chance of bugs via uninitialized fields, instead > simply continue the process to initialize the struct this way tree wide. > This will zero any unspecified members. Move the field initializers to the > struct declaration when they are known at that time. Leave the fields out > that were manually initialized to zero, as this would be redundant for > designated initializers. > > Signed-off-by: Rick Edgecombe > Cc: Vineet Gupta > Cc: linux-snps-arc@lists.infradead.org > Link: https://lore.kernel.org/lkml/202402280912.33AEE7A9CF@keescook/#t > Link: > https://lore.kernel.org/lkml/j7bfvig3gew3qruouxrh7z7ehjjafrgkbcmg6tcghhfh3rhmzi@wzlcoecgy5rs/ LGTM. Acked-by: Vineet Gupta Thx, -Vineet ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [PATCH bpf-next v1] ARC: Add eBPF JIT support
+CC Bjorn On 2/13/24 18:39, Alexei Starovoitov wrote: > On Tue, Feb 13, 2024 at 5:20 AM Shahab Vahedi wrote: >> From: Shahab Vahedi >> >> This will add eBPF JIT support to the 32-bit ARCv2 processors. The >> implementation is qualified by running the BPF tests on a Synopsys HSDK >> board with "ARC HS38 v2.1c at 500 MHz" as the 4-core CPU. > ... >> Signed-off-by: Shahab Vahedi >> --- >> Documentation/admin-guide/sysctl/net.rst |1 + >> Documentation/networking/filter.rst |4 +- >> arch/arc/Kbuild |1 + >> arch/arc/Kconfig |1 + >> arch/arc/net/Makefile|6 + >> arch/arc/net/bpf_jit.h | 161 ++ >> arch/arc/net/bpf_jit_arcv2.c | 3001 ++ >> arch/arc/net/bpf_jit_core.c | 1425 ++ >> 8 files changed, 4598 insertions(+), 2 deletions(-) > This is pretty cool to see. > I'm assuming this will get reviewed and will go through arc.git tree. I'd be happy to take it via ARC tree and can review some of the arch specific bits, but I'd hope BPF folks also review it critically. Thx, -Vineet > Could you share performance numbers interpreter vs JITed ? ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
[GIT PULL] ARC fixes for 6.7
Hi Linus, Late in the cycle but we have a bunch of fixes for ARC. Please pull. Thx, -Vineet ---> The following changes since commit 33cc938e65a98f1d29d0a18403dbbee050dcad9a: Linux 6.7-rc4 (2023-12-03 18:52:56 +0900) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc.git/ tags/arc-6.7-fixes for you to fetch changes up to 9a733dc4fbeec3f6d99645b845712b035e7440cf: ARC: add hugetlb definitions (2023-12-13 19:33:10 -0800) ARC fixes for 6.7 - build error for hugetlb, sparse and smatch fixes - Removal of VIPT aliasing cache code Pavel Kozlov (1): ARC: add hugetlb definitions Vineet Gupta (5): ARC: entry: SAVE_ABI_CALLEE_REG: ISA/ABI specific helper ARC: entry: move ARCompact specific bits out of entry.h ARC: mm: retire support for aliasing VIPT D$ ARC: fix spare error ARC: fix smatch warning arch/arc/Kconfig | 5 -- arch/arc/include/asm/cacheflush.h | 43 --- arch/arc/include/asm/entry-arcv2.h | 32 + arch/arc/include/asm/entry-compact.h | 87 +- arch/arc/include/asm/entry.h | 110 ++-- arch/arc/include/asm/hugepage.h | 7 ++ arch/arc/include/asm/ptrace.h | 14 ++-- arch/arc/kernel/setup.c | 4 +- arch/arc/kernel/signal.c | 6 +- arch/arc/mm/cache.c | 136 ++- arch/arc/mm/mmap.c | 21 +- arch/arc/mm/tlb.c | 16 ++--- 12 files changed, 155 insertions(+), 326 deletions(-) ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [PATCH] ARC: add hugetlb definitions
On 12/13/23 07:07, Pavel Kozlov wrote: > From: Pavel Kozlov > > Add hugetlb definitions if THP enabled. ARC doesn't support > HugeTLB FS but it supports THP. Some kernel code such as pagemap > uses hugetlb definitions with THP. > > This patch fixes ARC build issue (HPAGE_SIZE undeclared error) with > TRANSPARENT_HUGEPAGE enabled. > > Signed-off-by: Pavel Kozlov Added to for-curr. I'll pile this will rest of patches for some linux-next soaking. Thx, -Vineet ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: arch/arc/kernel/setup.c:203 arcv2_mumbojumbo() error: uninitialized symbol 'release'.
On 11/27/23 22:22, Dan Carpenter wrote: > tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git > master > head: 2cc14f52aeb78ce3f29677c2de1f06c0e91471ab > commit: fad84e39f116035ae8d550c6020107b8ac113b45 ARC: boot log: eliminate > struct cpuinfo_arc #4: boot log per ISA > config: arc-randconfig-r071-20231128 > (https://download.01.org/0day-ci/archive/20231128/202311280906.vaiweaft-...@intel.com/config) > compiler: arceb-elf-gcc (GCC) 13.2.0 > reproduce: > (https://download.01.org/0day-ci/archive/20231128/202311280906.vaiweaft-...@intel.com/reproduce) > > If you fix the issue in a separate patch/commit (i.e. not just a new version > of > the same patch/commit), kindly add following tags > | Reported-by: kernel test robot > | Reported-by: Dan Carpenter > | Closes: https://lore.kernel.org/r/202311280906.vaiweaft-...@intel.com/ > > New smatch warnings: > arch/arc/kernel/setup.c:203 arcv2_mumbojumbo() error: uninitialized symbol > 'release'. Thx, I've posted a fix. > Old smatch warnings: > arch/arc/include/asm/thread_info.h:62 current_thread_info() error: > uninitialized symbol 'sp'. This seems like a false warning. Its a register variable and thus can't possibly be initialized. static inline __attribute_const__ struct thread_info *current_thread_info(void) { register unsigned long sp asm("sp"); return (struct thread_info *)(sp & ~(THREAD_SIZE - 1)); } ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
[PATCH 2/5] ARC: entry: move ARCompact specific bits out of entry.h
- PUSHAUX/POPAUX helpers to ARCompact entry - use gas provided "push"/pop pseudo instructions Signed-off-by: Vineet Gupta --- arch/arc/include/asm/entry-compact.h | 55 ++- arch/arc/include/asm/entry.h | 66 2 files changed, 54 insertions(+), 67 deletions(-) diff --git a/arch/arc/include/asm/entry-compact.h b/arch/arc/include/asm/entry-compact.h index 9841f1186417..92c3e9f13252 100644 --- a/arch/arc/include/asm/entry-compact.h +++ b/arch/arc/include/asm/entry-compact.h @@ -33,6 +33,59 @@ #include #include/* For THREAD_SIZE */ +/* Note on the LD/ST addr modes with addr reg wback + * + * LD.a same as LD.aw + * + * LD.areg1, [reg2, x] => Pre Incr + * Eff Addr for load = [reg2 + x] + * + * LD.ab reg1, [reg2, x] => Post Incr + * Eff Addr for load = [reg2] + */ + +.macro PUSHAX aux + lr r9, [\aux] + pushr9 +.endm + +.macro POPAX aux + pop r9 + sr r9, [\aux] +.endm + +.macro SAVE_R0_TO_R12 + pushr0 + pushr1 + pushr2 + pushr3 + pushr4 + pushr5 + pushr6 + pushr7 + pushr8 + pushr9 + pushr10 + pushr11 + pushr12 +.endm + +.macro RESTORE_R12_TO_R0 + pop r12 + pop r11 + pop r10 + pop r9 + pop r8 + pop r7 + pop r6 + pop r5 + pop r4 + pop r3 + pop r2 + pop r1 + pop r0 +.endm + .macro SAVE_ABI_CALLEE_REGS pushr13 pushr14 @@ -267,7 +320,7 @@ SWITCH_TO_KERNEL_STK - PUSH0x003\LVL\()abcd/* Dummy ECR */ + st.a0x003\LVL\()abcd, [sp, -4] /* Dummy ECR */ sub sp, sp, 8 /* skip orig_r0 (not needed) skip pt_regs->sp, already saved above */ diff --git a/arch/arc/include/asm/entry.h b/arch/arc/include/asm/entry.h index 8e4e40d2d54a..cf1ba376e992 100644 --- a/arch/arc/include/asm/entry.h +++ b/arch/arc/include/asm/entry.h @@ -21,72 +21,6 @@ #include #endif -/* Note on the LD/ST addr modes with addr reg wback - * - * LD.a same as LD.aw - * - * LD.areg1, [reg2, x] => Pre Incr - * Eff Addr for load = [reg2 + x] - * - * LD.ab reg1, [reg2, x] => Post Incr - * Eff Addr for load = [reg2] - */ - -.macro PUSH reg - st.a\reg, [sp, -4] -.endm - -.macro PUSHAX aux - lr r9, [\aux] - PUSHr9 -.endm - -.macro POP reg - ld.ab \reg, [sp, 4] -.endm - -.macro POPAX aux - POP r9 - sr r9, [\aux] -.endm - -/*-- - * Helpers to save/restore Scratch Regs: - * used by Interrupt/Exception Prologue/Epilogue - *-*/ -.macro SAVE_R0_TO_R12 - PUSHr0 - PUSHr1 - PUSHr2 - PUSHr3 - PUSHr4 - PUSHr5 - PUSHr6 - PUSHr7 - PUSHr8 - PUSHr9 - PUSHr10 - PUSHr11 - PUSHr12 -.endm - -.macro RESTORE_R12_TO_R0 - POP r12 - POP r11 - POP r10 - POP r9 - POP r8 - POP r7 - POP r6 - POP r5 - POP r4 - POP r3 - POP r2 - POP r1 - POP r0 - -.endm - /* * save user mode callee regs as struct callee_regs * - needed by fork/do_signal/unaligned-access-emulation. -- 2.34.1 ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
[PATCH 5/5] ARC: fix smatch warning
Reported-by: kernel test robot Reported-by: Dan Carpenter Closes: https://lore.kernel.org/r/202311280906.vaiweaft-...@intel.com/ Signed-off-by: Vineet Gupta --- arch/arc/kernel/setup.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/arch/arc/kernel/setup.c b/arch/arc/kernel/setup.c index 4dcf8589b708..d08a5092c2b4 100644 --- a/arch/arc/kernel/setup.c +++ b/arch/arc/kernel/setup.c @@ -153,7 +153,7 @@ static int arcv2_mumbojumbo(int c, struct cpuinfo_arc *info, char *buf, int len) { int n = 0; #ifdef CONFIG_ISA_ARCV2 - const char *release, *cpu_nm, *isa_nm = "ARCv2"; + const char *release = "", *cpu_nm = "HS38", *isa_nm = "ARCv2"; int dual_issue = 0, dual_enb = 0, mpy_opt, present; int bpu_full, bpu_cache, bpu_pred, bpu_ret_stk; char mpy_nm[16], lpb_nm[32]; @@ -172,8 +172,6 @@ static int arcv2_mumbojumbo(int c, struct cpuinfo_arc *info, char *buf, int len) * releases only update it. */ - cpu_nm = "HS38"; - if (info->arcver > 0x50 && info->arcver <= 0x53) { release = arc_hs_rel[info->arcver - 0x51].str; } else { -- 2.34.1 ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
[PATCH 3/5] ARC: mm: retire support for aliasing VIPT D$
Legacy ARC700 processors (first generation of MMU enabled ARC cores) had VIPT cached which could be configured such that they could alias. Corresponding support in kernel (with all the obnoxious cache flush overhead) was added in ARC port 10 years ago to support 1 silicon. That is long bygone and we can let it RIP. Cc: Matthew Wilcox (Oracle) Signed-off-by: Vineet Gupta --- arch/arc/Kconfig | 5 -- arch/arc/include/asm/cacheflush.h | 43 -- arch/arc/mm/cache.c | 136 ++ arch/arc/mm/mmap.c| 21 + arch/arc/mm/tlb.c | 16 ++-- 5 files changed, 14 insertions(+), 207 deletions(-) diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig index 3162db540ee9..1b0483c51cc1 100644 --- a/arch/arc/Kconfig +++ b/arch/arc/Kconfig @@ -49,7 +49,6 @@ config ARC select OF select OF_EARLY_FLATTREE select PCI_SYSCALL if PCI - select PERF_USE_VMALLOC if ARC_CACHE_VIPT_ALIASING select HAVE_ARCH_JUMP_LABEL if ISA_ARCV2 && !CPU_ENDIAN_BE32 select TRACE_IRQFLAGS_SUPPORT @@ -232,10 +231,6 @@ config ARC_CACHE_PAGES Note that Global I/D ENABLE + Per Page DISABLE works but corollary Global DISABLE + Per Page ENABLE won't work -config ARC_CACHE_VIPT_ALIASING - bool "Support VIPT Aliasing D$" - depends on ARC_HAS_DCACHE && ISA_ARCOMPACT - endif #ARC_CACHE config ARC_HAS_ICCM diff --git a/arch/arc/include/asm/cacheflush.h b/arch/arc/include/asm/cacheflush.h index bd5b1a9a0544..563af3e75f01 100644 --- a/arch/arc/include/asm/cacheflush.h +++ b/arch/arc/include/asm/cacheflush.h @@ -44,31 +44,10 @@ void dma_cache_wback(phys_addr_t start, unsigned long sz); #define flush_cache_dup_mm(mm) /* called on fork (VIVT only) */ -#ifndef CONFIG_ARC_CACHE_VIPT_ALIASING - #define flush_cache_mm(mm) /* called on munmap/exit */ #define flush_cache_range(mm, u_vstart, u_vend) #define flush_cache_page(vma, u_vaddr, pfn)/* PF handling/COW-break */ -#else /* VIPT aliasing dcache */ - -/* To clear out stale userspace mappings */ -void flush_cache_mm(struct mm_struct *mm); -void flush_cache_range(struct vm_area_struct *vma, - unsigned long start,unsigned long end); -void flush_cache_page(struct vm_area_struct *vma, - unsigned long user_addr, unsigned long page); - -/* - * To make sure that userspace mapping is flushed to memory before - * get_user_pages() uses a kernel mapping to access the page - */ -#define ARCH_HAS_FLUSH_ANON_PAGE -void flush_anon_page(struct vm_area_struct *vma, - struct page *page, unsigned long u_vaddr); - -#endif /* CONFIG_ARC_CACHE_VIPT_ALIASING */ - /* * A new pagecache page has PG_arch_1 clear - thus dcache dirty by default * This works around some PIO based drivers which don't call flush_dcache_page @@ -76,28 +55,6 @@ void flush_anon_page(struct vm_area_struct *vma, */ #define PG_dc_cleanPG_arch_1 -#define CACHE_COLORS_NUM 4 -#define CACHE_COLORS_MSK (CACHE_COLORS_NUM - 1) -#define CACHE_COLOR(addr) (((unsigned long)(addr) >> (PAGE_SHIFT)) & CACHE_COLORS_MSK) - -/* - * Simple wrapper over config option - * Bootup code ensures that hardware matches kernel configuration - */ -static inline int cache_is_vipt_aliasing(void) -{ - return IS_ENABLED(CONFIG_ARC_CACHE_VIPT_ALIASING); -} - -/* - * checks if two addresses (after page aligning) index into same cache set - */ -#define addr_not_cache_congruent(addr1, addr2) \ -({ \ - cache_is_vipt_aliasing() ? \ - (CACHE_COLOR(addr1) != CACHE_COLOR(addr2)) : 0; \ -}) - #define copy_to_user_page(vma, page, vaddr, dst, src, len) \ do { \ memcpy(dst, src, len); \ diff --git a/arch/arc/mm/cache.c b/arch/arc/mm/cache.c index f7e05c146637..9106ceac323c 100644 --- a/arch/arc/mm/cache.c +++ b/arch/arc/mm/cache.c @@ -145,10 +145,9 @@ int arc_cache_mumbojumbo(int c, char *buf, int len) p_dc->sz_k = 1 << (dbcr.sz - 1); n += scnprintf(buf + n, len - n, - "D-Cache\t\t: %uK, %dway/set, %uB Line, %s%s%s\n", + "D-Cache\t\t: %uK, %dway/set, %uB Line, %s%s\n", p_dc->sz_k, assoc, p_dc->line_len, vipt ? "VIPT" : "PIPT", - p_dc->colors > 1 ? " aliasing" : "", IS_USED_CFG(CONFIG_ARC_HAS_DCACHE)); slc_chk: @@ -703,51 +702,10 @@ static inline void arc_slc_enable(void) * Exported APIs */ -/* - * Handle cache congruency of kernel and userspace mappings
[PATCH 0/5] ARC updates
Hi, A pile of accrued changes, compile tested only. Please test. Thx, -Vineet Vineet Gupta (5): ARC: entry: SAVE_ABI_CALLEE_REG: ISA/ABI specific helper ARC: entry: move ARCompact specific bits out of entry.h ARC: mm: retire support for aliasing VIPT D$ ARC: fix spare error ARC: fix smatch warning arch/arc/Kconfig | 5 - arch/arc/include/asm/cacheflush.h| 43 - arch/arc/include/asm/entry-arcv2.h | 32 +++ arch/arc/include/asm/entry-compact.h | 87 - arch/arc/include/asm/entry.h | 110 +- arch/arc/include/asm/ptrace.h| 14 +-- arch/arc/kernel/setup.c | 4 +- arch/arc/kernel/signal.c | 6 +- arch/arc/mm/cache.c | 136 ++- arch/arc/mm/mmap.c | 21 + arch/arc/mm/tlb.c| 16 +--- 11 files changed, 148 insertions(+), 326 deletions(-) -- 2.34.1 ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
[PATCH 4/5] ARC: fix spare error
Reported-by: kernel test robot Closes: https://lore.kernel.org/oe-kbuild-all/202312082320.vdn5a9hb-...@intel.com/ Signed-off-by: Vineet Gupta --- arch/arc/kernel/signal.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arc/kernel/signal.c b/arch/arc/kernel/signal.c index 0b3bb529d246..8f6f4a542964 100644 --- a/arch/arc/kernel/signal.c +++ b/arch/arc/kernel/signal.c @@ -62,7 +62,7 @@ struct rt_sigframe { unsigned int sigret_magic; }; -static int save_arcv2_regs(struct sigcontext *mctx, struct pt_regs *regs) +static int save_arcv2_regs(struct sigcontext __user *mctx, struct pt_regs *regs) { int err = 0; #ifndef CONFIG_ISA_ARCOMPACT @@ -75,12 +75,12 @@ static int save_arcv2_regs(struct sigcontext *mctx, struct pt_regs *regs) #else v2abi.r58 = v2abi.r59 = 0; #endif - err = __copy_to_user(&mctx->v2abi, &v2abi, sizeof(v2abi)); + err = __copy_to_user(&mctx->v2abi, (void const *)&v2abi, sizeof(v2abi)); #endif return err; } -static int restore_arcv2_regs(struct sigcontext *mctx, struct pt_regs *regs) +static int restore_arcv2_regs(struct sigcontext __user *mctx, struct pt_regs *regs) { int err = 0; #ifndef CONFIG_ISA_ARCOMPACT -- 2.34.1 ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
[PATCH 1/5] ARC: entry: SAVE_ABI_CALLEE_REG: ISA/ABI specific helper
And for ARcompact variant replace the PUSH/POP macros with gas provided push/pop pseudo-instructions This allows ISA specific implementation e.g. Current ARCv2 PUSH/POP could be replaced with STD/LDL to save 2 registers at a time (w/o bothering with SP update each time) or perhaps use ENTER_S/LEAVE_S to reduce code size For ARCv3 ABI changed so callee regs are now r14-r26 (vs. r13-r25) thus would need a different implementation. Signed-off-by: Vineet Gupta --- arch/arc/include/asm/entry-arcv2.h | 32 arch/arc/include/asm/entry-compact.h | 32 arch/arc/include/asm/entry.h | 44 +++- arch/arc/include/asm/ptrace.h| 14 + 4 files changed, 76 insertions(+), 46 deletions(-) diff --git a/arch/arc/include/asm/entry-arcv2.h b/arch/arc/include/asm/entry-arcv2.h index 4d13320e0c1b..3802a2daaf86 100644 --- a/arch/arc/include/asm/entry-arcv2.h +++ b/arch/arc/include/asm/entry-arcv2.h @@ -291,4 +291,36 @@ /* M = 8-1 N = 8 */ .endm +.macro SAVE_ABI_CALLEE_REGS + pushr13 + pushr14 + pushr15 + pushr16 + pushr17 + pushr18 + pushr19 + pushr20 + pushr21 + pushr22 + pushr23 + pushr24 + pushr25 +.endm + +.macro RESTORE_ABI_CALLEE_REGS + pop r25 + pop r24 + pop r23 + pop r22 + pop r21 + pop r20 + pop r19 + pop r18 + pop r17 + pop r16 + pop r15 + pop r14 + pop r13 +.endm + #endif diff --git a/arch/arc/include/asm/entry-compact.h b/arch/arc/include/asm/entry-compact.h index a0e760eb35a8..9841f1186417 100644 --- a/arch/arc/include/asm/entry-compact.h +++ b/arch/arc/include/asm/entry-compact.h @@ -33,6 +33,38 @@ #include #include/* For THREAD_SIZE */ +.macro SAVE_ABI_CALLEE_REGS + pushr13 + pushr14 + pushr15 + pushr16 + pushr17 + pushr18 + pushr19 + pushr20 + pushr21 + pushr22 + pushr23 + pushr24 + pushr25 +.endm + +.macro RESTORE_ABI_CALLEE_REGS + pop r25 + pop r24 + pop r23 + pop r22 + pop r21 + pop r20 + pop r19 + pop r18 + pop r17 + pop r16 + pop r15 + pop r14 + pop r13 +.endm + /*-- * Switch to Kernel Mode stack if SP points to User Mode stack * diff --git a/arch/arc/include/asm/entry.h b/arch/arc/include/asm/entry.h index 49c2e090cb5c..8e4e40d2d54a 100644 --- a/arch/arc/include/asm/entry.h +++ b/arch/arc/include/asm/entry.h @@ -87,48 +87,12 @@ .endm -/*-- - * Helpers to save/restore callee-saved regs: - * used by several macros below - *-*/ -.macro SAVE_R13_TO_R25 - PUSHr13 - PUSHr14 - PUSHr15 - PUSHr16 - PUSHr17 - PUSHr18 - PUSHr19 - PUSHr20 - PUSHr21 - PUSHr22 - PUSHr23 - PUSHr24 - PUSHr25 -.endm - -.macro RESTORE_R25_TO_R13 - POP r25 - POP r24 - POP r23 - POP r22 - POP r21 - POP r20 - POP r19 - POP r18 - POP r17 - POP r16 - POP r15 - POP r14 - POP r13 -.endm - /* * save user mode callee regs as struct callee_regs * - needed by fork/do_signal/unaligned-access-emulation. */ .macro SAVE_CALLEE_SAVED_USER - SAVE_R13_TO_R25 + SAVE_ABI_CALLEE_REGS .endm /* @@ -136,18 +100,18 @@ * - could have been changed by ptrace tracer or unaligned-access fixup */ .macro RESTORE_CALLEE_SAVED_USER - RESTORE_R25_TO_R13 + RESTORE_ABI_CALLEE_REGS .endm /* * save/restore kernel mode callee regs at the time of context switch */ .macro SAVE_CALLEE_SAVED_KERNEL - SAVE_R13_TO_R25 + SAVE_ABI_CALLEE_REGS .endm .macro RESTORE_CALLEE_SAVED_KERNEL - RESTORE_R25_TO_R13 + RESTORE_ABI_CALLEE_REGS .endm /*-- diff --git a/arch/arc/include/asm/ptrace.h b/arch/arc/include/asm/ptrace.h index 4a2b30fb5a98..00b9318e551e 100644 --- a/arch/arc/include/asm/ptrace.h +++ b/arch/arc/include/asm/ptrace.h @@ -54,6 +54,10 @@ struct pt_regs { ecr_reg ecr; }; +struct callee_regs { + unsigned long r25, r24, r23, r22, r21, r20, r19, r18, r17, r16, r15, r14, r13; +}; + #define MAX_REG_OFFSET offsetof(struct pt_regs, ecr) #else @@ -92,16 +96,14 @@ struct pt_regs { unsigned long status32; }; -#define
Re: [PATCH 3/3] locking/atomic: openrisc: use generic_cmpxchg[64]_local for arch_cmpxchg[64]_local
On 10/29/23 20:41, wuqiang.matt wrote: arch_cmpxchg_relaxed: ... switch(sizeof((_p_))) { case 4: arch_cmpxchg: ... BUILD_BUG_ON(sizeof(_p_) != 4); ... _p is the address pointer, so I'm thinking it's a typo but I couldn't yet confirm. There is not much about arc processors in the web :( Hmm, indeed. This seems like a bug but it depends on the 'llock %0, [%1]' can take a 32bit address or 32bit data register. Usually it should check the size of data, but need to check with ISA manual. Vineet, can you check this suspicious bug? ARCv2 is a 32-bit ISA and LLOCK/SCOND work on 32-bit data. So the pointers will be 32-bit anyways. Is the issue that pointer/cmpxchg operation could be on a smaller data type ? For ARCv2 with CONFIG_ARC_HAS_LLSC, better add the data size checking and only permit 32bit data size. Even for 32-bit system, data should can be 64bit 'long long'. Right, makes sense. Can you send a patch ? And In the case that CONFIG_ARC_HAS_LLSC is undefined, in arch_cmpxchg: the pointer size checking is unnecessary, since it's using spinlock internally: Correct, I had the same thought. https://elixir.bootlin.com/linux/v6.6-rc7/source/arch/arc/include/asm/cmpxchg.h#L60: BUILD_BUG_ON(sizeof(_p_) != 4); \ \ /* \ * spin lock/unlock provide the needed smp_mb() before/after \ */ \ atomic_ops_lock(__flags); \ _prev_ = *_p_; \ if (_prev_ == _o_) \ *_p_ = _n_; \ atomic_ops_unlock(__flags); Can you do that fix in same patch as well ? Another question about the naming: arch_cmpxchg_relaxed() implemented if CONFIG_ARC_HAS_LLSC is configured and arch_cmpxchg() defined for the rest. Are there any reasons for difference names ? Yes the atomics API consists of _relaxed, _acquire, _release and unadorned. _relaxed is the most efficient, with rest having some extra barriers. If arch provides _relaxed, generic code can create the rest - assuming arch hardware can support the relaxed ones. That is true for LLSC. However for !LLSC, spinlock versions already have full barriers due to spinlock, so relaxed variant doesn't make sense. As I checked, Synopsys has released 64bit ARC processors (HS66/HS68), but I don't know the status of Linux kernel support. Yes there's an internal ARC64 port running but it is not ready for upstreaming yet. -Vineet
Re: [PATCH 3/3] locking/atomic: openrisc: use generic_cmpxchg[64]_local for arch_cmpxchg[64]_local
On 10/28/23 20:26, Masami Hiramatsu (Google) wrote: On Sun, 29 Oct 2023 00:40:17 +0800 "wuqiang.matt" wrote: On 2023/10/28 20:49, Masami Hiramatsu (Google) wrote: Hi Wuqiang, On Thu, 26 Oct 2023 19:05:51 +0800 "wuqiang.matt" wrote: On 2023/10/26 16:46, Arnd Bergmann wrote: On Thu, Oct 26, 2023, at 09:39, wuqiang.matt wrote: arch_cmpxchg[64]_local() are not defined for openrisc. So implement them with generci_cmpxchg[64]_local, advised by Masami Hiramatsu. Closes: https://lore.kernel.org/linux-trace-kernel/169824660459.24340.14614817132696360531.stgit@devnote2 Closes: https://lore.kernel.org/oe-kbuild-all/202310241310.ir5uukog-...@intel.com Signed-off-by: wuqiang.matt I think on architectures that have actual atomics, you generally want to define this to be the same as arch_cmpxchg() rather than the generic version. It depends on the relative cost of doing one atomic compared to an irq-disable/enable pair, but everyone else went with the former if they could. The exceptions are armv4/armv5, sparc32 and parisc, which don't have a generic cmpxchg() or similar operation. Sure, better native than the generic. I'll try to collect more insights before next move. So I will temporally remove the last change (use arch_cmpxchg_local in objpool) until these series are rewritten with arch native code, so that the next release will not break the kernel build. Ok, it's fine to me. Thank you. But this must be fixed because arch_cmpxchg_local() is required for each arch anyway. Yes. I'm working on the new update for arc/openrisc/hexagon. It would be better resolve this issue first, then consider the objpool update of using arch_cmpxchg_local. You could do the thing that sparc64 and xtensa do, which use the native cmpxchg for supported word sizes but the generic version for 1- and 2-byte swaps, but that has its own set of problems if you end up doing operations on both the entire word and a sub-unit of the same thing. Thank you for pointing out this. I'll do some research on these implementations. arc also has the LL-SC instruction but depends on the core feature, so I think we can use it. Right. The arc processor does have the CONFIG_ARC_HAS_LLSC option, but I doubt the correctness of arch_cmpxchg_relaxed and arch_cmpxchg: arch_cmpxchg_relaxed: ... switch(sizeof((_p_))) { case 4: arch_cmpxchg: ... BUILD_BUG_ON(sizeof(_p_) != 4); ... _p is the address pointer, so I'm thinking it's a typo but I couldn't yet confirm. There is not much about arc processors in the web :( Hmm, indeed. This seems like a bug but it depends on the 'llock %0, [%1]' can take a 32bit address or 32bit data register. Usually it should check the size of data, but need to check with ISA manual. Vineet, can you check this suspicious bug? ARCv2 is a 32-bit ISA and LLOCK/SCOND work on 32-bit data. So the pointers will be 32-bit anyways. Is the issue that pointer/cmpxchg operation could be on a smaller data type ? -Vineet
[GIT PULL] ARC updates for v6.6-rc1
Hi Linus, Some ARC updates for the current cycle. There could be a minor merge conflict in arch/arc/Kconfig. Thx, -Vineet -> The following changes since commit 2ccdd1b13c591d306f0401d98dedc4bdcd02b421: Linux 6.5-rc6 (2023-08-13 11:29:55 -0700) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc.git/ tags/arc-6.6-rc1 for you to fetch changes up to c40cad3b0aa47d6d0995637178fb6607ac3d45c1: ARC: boot log: fix warning (2023-08-23 22:36:19 -0700) ARC updates for v6.6 -Wmissing-prototype warning fixes - Missing compiler barrier in relaxed atomics - some uaccess simplification, declutter - Removal of massive glocal struct cpuinfo_arc from bootlog code - __switch_to consolidation (removal of inline asm variant) - use GP to cache task pointer (vs. r25) - Miscll rework of entry code Pavel Kozlov (1): ARC: atomics: Add compiler barrier to atomic operations... Rob Herring (1): arc: Explicitly include correct DT includes Vineet Gupta (22): ARC: -Wmissing-prototype warning fixes ARC: uaccess: remove arc specific out-of-line handles for -Os ARC: uaccess: use optimized generic __strnlen_user/__strncpy_from_user ARC: uaccess: elide unaliged handling if hardware supports ARCv2: memset: don't prefetch for len == 0 which happens a alot ARC: boot log: eliminate struct cpuinfo_arc #1: mm ARC: boot log: eliminate struct cpuinfo_arc #2: cache ARC: boot log: eliminate struct cpuinfo_arc #3: don't export ARC: boot log: eliminate struct cpuinfo_arc #4: boot log per ISA ARC: entry: use gp to cache task pointer (vs. r25) ARC: kernel stack: INIT_THREAD need not setup @init_stack in @ksp ARC: __switch_to: asm with dwarf ops (vs. inline asm) ARC: __switch_to: move ksp to thread_info from thread_struct ARC: entry: rework (non-functional) ARC: entry: ARcompact EV_ProtV to use r10 directly ARC: entry: EV_MachineCheck dont re-read ECR ARC: entry: Add more common chores to EXCEPTION_PROLOGUE ARC: entry: replace 8 byte OR with 4 byte BSET ARC: entry: replace 8 byte ADD.ne with 4 byte ADD2.ne ARCv2: entry: rearrange pt_regs slightly ARC: pt_regs: create seperate type for ecr ARC: boot log: fix warning arch/arc/Kconfig | 8 +- arch/arc/Makefile | 6 +- arch/arc/include/asm/arcregs.h | 99 +++--- arch/arc/include/asm/atomic-llsc.h | 6 +- arch/arc/include/asm/atomic64-arcv2.h | 6 +- arch/arc/include/asm/current.h | 2 +- arch/arc/include/asm/dwarf.h | 32 +- arch/arc/include/asm/entry-arcv2.h | 66 ++-- arch/arc/include/asm/entry-compact.h | 50 ++- arch/arc/include/asm/entry.h | 128 +++- arch/arc/include/asm/irq.h | 1 + arch/arc/include/asm/mmu.h | 2 + arch/arc/include/asm/processor.h | 7 +- arch/arc/include/asm/ptrace.h | 65 ++-- arch/arc/include/asm/setup.h | 8 +- arch/arc/include/asm/smp.h | 2 + arch/arc/include/asm/thread_info.h | 10 +- arch/arc/include/asm/uaccess.h | 21 +- arch/arc/kernel/Makefile | 9 +- arch/arc/kernel/asm-offsets.c | 14 +- arch/arc/kernel/ctx_sw.c | 112 --- arch/arc/kernel/ctx_sw_asm.S | 76 ++--- arch/arc/kernel/devtree.c | 1 + arch/arc/kernel/entry-arcv2.S | 15 - arch/arc/kernel/entry-compact.S | 19 +- arch/arc/kernel/entry.S | 70 ++--- arch/arc/kernel/intc-arcv2.c | 2 +- arch/arc/kernel/kgdb.c | 2 +- arch/arc/kernel/mcip.c | 2 - arch/arc/kernel/process.c | 17 +- arch/arc/kernel/ptrace.c | 8 +- arch/arc/kernel/setup.c | 563 -- arch/arc/kernel/signal.c | 1 + arch/arc/kernel/smp.c | 7 +- arch/arc/kernel/stacktrace.c | 1 + arch/arc/kernel/traps.c | 5 +- arch/arc/kernel/troubleshoot.c | 13 +- arch/arc/lib/memset-archs.S | 3 +- arch/arc/mm/cache.c | 179 --- arch/arc/mm/extable.c | 11 - arch/arc/mm/fault.c | 7 +- arch/arc/mm/init.c | 1 + arch/arc/mm/tlb.c | 99 +++--- arch/arc/plat-axs10x/axs10x.c | 1 - 44 files changed, 724 insertions(+), 1033 deletions(-) delete mode 100644 arch/arc/kernel/ctx_sw.c ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [PATCH] arc: Explicitly include correct DT includes
On 8/23/23 10:00, Rob Herring wrote: On Fri, Jul 14, 2023 at 11:39:49AM -0600, Rob Herring wrote: The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it as merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes. Signed-off-by: Rob Herring --- arch/arc/plat-axs10x/axs10x.c | 1 - 1 file changed, 1 deletion(-) Ping! Sorry this fell through cracks, added to for-curr now ! Thx, -Vineet ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
[PATCH v2 16/20] ARC: entry: Add more common chores to EXCEPTION_PROLOGUE
THe high level structure of most ARC exception handlers is 1. save regfile with EXCEPTION_PROLOGUE 2. setup r0: EFA (not part of pt_regs) 3. setup r1: pointer to pt_regs (SP) 4. drop down to pure kernel mode (from exception) 5. call the Linux "C" handler Remove the boiler plate code by moving #2, #3, #4 into #1. The exceptions to most exceptions are syscall Trap and Machine check which don't do some of above for various reasons, so call a newly introduced variant EXCEPTION_PROLOGUE_KEEP_AE (same as original EXCEPTION_PROLOGUE) Tested-by: Pavel Kozlov Signed-off-by: Vineet Gupta --- arch/arc/include/asm/entry-arcv2.h | 12 +++- arch/arc/include/asm/entry-compact.h | 12 +++- arch/arc/kernel/entry-arcv2.S| 15 --- arch/arc/kernel/entry-compact.S | 13 - arch/arc/kernel/entry.S | 19 ++- 5 files changed, 24 insertions(+), 47 deletions(-) diff --git a/arch/arc/include/asm/entry-arcv2.h b/arch/arc/include/asm/entry-arcv2.h index a38ed505b3de..11b48ab39154 100644 --- a/arch/arc/include/asm/entry-arcv2.h +++ b/arch/arc/include/asm/entry-arcv2.h @@ -75,7 +75,7 @@ .endm /**/ -.macro EXCEPTION_PROLOGUE +.macro EXCEPTION_PROLOGUE_KEEP_AE ; Before jumping to Exception Vector, hardware micro-ops did following: ; 1. SP auto-switched to kernel mode stack @@ -104,6 +104,16 @@ ; OUTPUT: r10 has ECR expected by EV_Trap .endm +.macro EXCEPTION_PROLOGUE + + EXCEPTION_PROLOGUE_KEEP_AE ; return ECR in r10 + + lr r0, [efa] + mov r1, sp + + FAKE_RET_FROM_EXCPN ; clobbers r9 +.endm + /* * This macro saves the registers manually which would normally be autosaved * by hardware on taken interrupts. It is used by diff --git a/arch/arc/include/asm/entry-compact.h b/arch/arc/include/asm/entry-compact.h index 4e2ae82779ed..a0e760eb35a8 100644 --- a/arch/arc/include/asm/entry-compact.h +++ b/arch/arc/include/asm/entry-compact.h @@ -140,7 +140,7 @@ * * After this it is safe to call the "C" handlers *-*/ -.macro EXCEPTION_PROLOGUE +.macro EXCEPTION_PROLOGUE_KEEP_AE /* Need at least 1 reg to code the early exception prologue */ PROLOG_FREEUP_REG r9, @ex_saved_reg1 @@ -179,6 +179,16 @@ ; OUTPUT: r10 has ECR expected by EV_Trap .endm +.macro EXCEPTION_PROLOGUE + + EXCEPTION_PROLOGUE_KEEP_AE ; return ECR in r10 + + lr r0, [efa] + mov r1, sp + + FAKE_RET_FROM_EXCPN ; clobbers r9 +.endm + /*-- * Restore all registers used by system call or Exceptions * SP should always be pointing to the next free stack element diff --git a/arch/arc/kernel/entry-arcv2.S b/arch/arc/kernel/entry-arcv2.S index a7e6a2174187..2e49c81c8086 100644 --- a/arch/arc/kernel/entry-arcv2.S +++ b/arch/arc/kernel/entry-arcv2.S @@ -125,11 +125,6 @@ ENTRY(mem_service) EXCEPTION_PROLOGUE - lr r0, [efa] - mov r1, sp - - FAKE_RET_FROM_EXCPN - bl do_memory_error b ret_from_exception END(mem_service) @@ -138,11 +133,6 @@ ENTRY(EV_Misaligned) EXCEPTION_PROLOGUE - lr r0, [efa] ; Faulting Data address - mov r1, sp - - FAKE_RET_FROM_EXCPN - SAVE_CALLEE_SAVED_USER mov r2, sp ; callee_regs @@ -163,11 +153,6 @@ ENTRY(EV_TLBProtV) EXCEPTION_PROLOGUE - lr r0, [efa] ; Faulting Data address - mov r1, sp ; pt_regs - - FAKE_RET_FROM_EXCPN - mov blink, ret_from_exception b do_page_fault diff --git a/arch/arc/kernel/entry-compact.S b/arch/arc/kernel/entry-compact.S index 77f0090554c5..774c03cc1d1a 100644 --- a/arch/arc/kernel/entry-compact.S +++ b/arch/arc/kernel/entry-compact.S @@ -256,16 +256,6 @@ ENTRY(EV_TLBProtV) EXCEPTION_PROLOGUE ; ECR returned in r10 - lr r0, [efa] ; Faulting Data address (not part of pt_regs saved above) - - ; Exception auto-disables further Intr/exceptions. - ; Re-enable them by pretending to return from exception - ; (so rest of handler executes in pure K mode) - - FAKE_RET_FROM_EXCPN - - mov r1, sp; Handle to pt_regs - ;-- (5) Type of Protection Violation? -- ; ; ProtV Hardware Exception is triggered for Access Faults of 2 types @@ -301,9 +291,6 @@ END(EV_TLBProtV) ENTRY(call_do_page_fault) EXCEPTION_PROLOGUE - lr r0, [efa] ; Faulting Data address - mov r1, sp - FAKE_RET_FROM_EXCPN mov blink, ret_from_exception b do_page_fault diff --git a/arch/arc/kernel/entry.S b/arch/arc/kernel/entry.S index 46582fbebcf2..
Re: [PATCH 16/20] ARC: entry: Add more common chores to EXCEPTION_PROLOGUE
On 8/18/23 05:56, pavel.koz...@synopsys.com wrote: Hi Vineet, Subject: [PATCH 16/20] ARC: entry: Add more common chores to EXCEPTION_PROLOGUE THe high level structure of most ARC exception handlers is 1. save regfile with EXCEPTION_PROLOGUE 2. setup r0: EFA (not part of pt_regs) 3. setup r1: pointer to pt_regs (SP) 4. drop down to pure kernel mode (from exception) 5. call the Linux "C" handler Remove the boiler plate code by moving #2, #3, #4 into #1. The exceptions to most exceptions are syscall Trap and Machine check which don't do some of above for various reasons, so call a newly introduced variant EXCEPTION_PROLOGUE_KEEP_AE (same as original EXCEPTION_PROLOGUE) I'm observing the ARC700 (nSIM) system freeze after this patch. ... f000.serial: ttyS0 at MMIO 0xf000 (irq = 24, base_baud = 3125000) is a 16550A printk: console [ttyS0] enabled printk: console [ttyS0] enabled printk: bootconsole [uart8250] disabled printk: bootconsole [uart8250] disabled NET: Registered PF_PACKET protocol family NET: Registered PF_KEY protocol family clk: Disabling unused clocks Freeing unused kernel image (initmem) memory: 2856K This architecture does not have kernel memory protection. Run /init as init process @@ -128,11 +123,6 @@ ENTRY(EV_PrivilegeV) EXCEPTION_PROLOGUE - lr r0, [efa] - mov r1, sp - - FAKE_RET_FROM_EXCPN - bl do_privilege_fault b ret_from_exception The same update is also required for the call_do_page_fault wrapper for ARcompact. Indeed I missed that part. -Vineet ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [PATCH 20/20] ARC: pt_regs: create seperate type for ecr
On 8/17/23 05:09, pavel.koz...@synopsys.com wrote: Hi Vineet, I'm testing your updates and ran into the same build issue reported by the build robot. http://lists.infradead.org/pipermail/linux-snps-arc/2023-August/007522.html #define MAX_REG_OFFSET offsetof(struct pt_regs, event) This change causes a build issue for ARC700, as the event field has been removed and the MAX_REG_OFFSET macro hasn't been updated. I've posted v2 for 3 patches. Please reapply/retest the whole series. Thx, -Vineet ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
[PATCH v2 20/20] ARC: pt_regs: create seperate type for ecr
Reduces duplication in each ISA specific pt_regs Tested-by: kernel test robot Closes: https://lore.kernel.org/oe-kbuild-all/202308151342.roq9urvv-...@intel.com Signed-off-by: Vineet Gupta --- arch/arc/include/asm/ptrace.h | 47 +- arch/arc/kernel/asm-offsets.c | 2 +- arch/arc/kernel/kgdb.c | 2 +- arch/arc/kernel/ptrace.c | 4 +-- arch/arc/kernel/traps.c| 4 +-- arch/arc/kernel/troubleshoot.c | 13 +- arch/arc/mm/fault.c| 6 ++--- 7 files changed, 33 insertions(+), 45 deletions(-) diff --git a/arch/arc/include/asm/ptrace.h b/arch/arc/include/asm/ptrace.h index 3a054b695f28..4a2b30fb5a98 100644 --- a/arch/arc/include/asm/ptrace.h +++ b/arch/arc/include/asm/ptrace.h @@ -12,6 +12,17 @@ #ifndef __ASSEMBLY__ +typedef union { + struct { +#ifdef CONFIG_CPU_BIG_ENDIAN + unsigned long state:8, vec:8, cause:8, param:8; +#else + unsigned long param:8, cause:8, vec:8, state:8; +#endif + }; + unsigned long full; +} ecr_reg; + /* THE pt_regs: Defines how regs are saved during entry into kernel */ #ifdef CONFIG_ISA_ARCOMPACT @@ -40,21 +51,10 @@ struct pt_regs { * Last word used by Linux for extra state mgmt (syscall-restart) * For interrupts, use artificial ECR values to note current prio-level */ - union { - struct { -#ifdef CONFIG_CPU_BIG_ENDIAN - unsigned long state:8, ecr_vec:8, - ecr_cause:8, ecr_param:8; -#else - unsigned long ecr_param:8, ecr_cause:8, - ecr_vec:8, state:8; -#endif - }; - unsigned long event; - }; + ecr_reg ecr; }; -#define MAX_REG_OFFSET offsetof(struct pt_regs, event) +#define MAX_REG_OFFSET offsetof(struct pt_regs, ecr) #else @@ -62,18 +62,7 @@ struct pt_regs { unsigned long orig_r0; - union { - struct { -#ifdef CONFIG_CPU_BIG_ENDIAN - unsigned long state:8, ecr_vec:8, - ecr_cause:8, ecr_param:8; -#else - unsigned long ecr_param:8, ecr_cause:8, - ecr_vec:8, state:8; -#endif - }; - unsigned long event; - }; + ecr_reg ecr;/* Exception Cause Reg */ unsigned long bta; /* erbta */ @@ -131,13 +120,13 @@ struct callee_regs { /* return 1 if PC in delay slot */ #define delay_mode(regs) ((regs->status32 & STATUS_DE_MASK) == STATUS_DE_MASK) -#define in_syscall(regs)((regs->ecr_vec == ECR_V_TRAP) && !regs->ecr_param) -#define in_brkpt_trap(regs) ((regs->ecr_vec == ECR_V_TRAP) && regs->ecr_param) +#define in_syscall(regs)((regs->ecr.vec == ECR_V_TRAP) && !regs->ecr.param) +#define in_brkpt_trap(regs) ((regs->ecr.vec == ECR_V_TRAP) && regs->ecr.param) #define STATE_SCALL_RESTARTED 0x01 -#define syscall_wont_restart(reg) (reg->state |= STATE_SCALL_RESTARTED) -#define syscall_restartable(reg) !(reg->state & STATE_SCALL_RESTARTED) +#define syscall_wont_restart(regs) (regs->ecr.state |= STATE_SCALL_RESTARTED) +#define syscall_restartable(regs) !(regs->ecr.state & STATE_SCALL_RESTARTED) #define current_pt_regs() \ ({ \ diff --git a/arch/arc/kernel/asm-offsets.c b/arch/arc/kernel/asm-offsets.c index 478768c88f46..f77deb799175 100644 --- a/arch/arc/kernel/asm-offsets.c +++ b/arch/arc/kernel/asm-offsets.c @@ -46,7 +46,7 @@ int main(void) BLANK(); DEFINE(PT_status32, offsetof(struct pt_regs, status32)); - DEFINE(PT_event, offsetof(struct pt_regs, event)); + DEFINE(PT_event, offsetof(struct pt_regs, ecr)); DEFINE(PT_bta, offsetof(struct pt_regs, bta)); DEFINE(PT_sp, offsetof(struct pt_regs, sp)); DEFINE(PT_r0, offsetof(struct pt_regs, r0)); diff --git a/arch/arc/kernel/kgdb.c b/arch/arc/kernel/kgdb.c index 345a554c..4f2b5951454f 100644 --- a/arch/arc/kernel/kgdb.c +++ b/arch/arc/kernel/kgdb.c @@ -175,7 +175,7 @@ void kgdb_trap(struct pt_regs *regs) * with trap_s 4 (compiled) breakpoints, continuation needs to * start after the breakpoint. */ - if (regs->ecr_param == 3) + if (regs->ecr.param == 3) instruction_pointer(regs) -= BREAK_INSTR_SIZE; kgdb_handle_exception(1, SIGTRAP, 0, regs); diff --git a/arch/arc/kernel/ptrace.c b/arch/arc/kernel/ptrace.c index 14ea7406f5cd..e0c233c178b1 100644 --- a/arch/arc/kernel/ptrace.c +++ b/arch/arc/kernel/ptrace.c @@ -46,7 +46,7 @@ static const struct pt_regs_offset regoffset_table[] = { REG_OFFSET_NAME(r0), REG_OFFSET_NAME(sp), REG_OFFSET_NAME(orig_r0), - REG
[PATCH v2 08/20] ARC: boot log: eliminate struct cpuinfo_arc #4: boot log per ISA
- boot log now clearly per ISA - global struct cpuinfo_arc[] elimiated - local struct struct arcinfo kept for passing info between functions Tested-by: kernel test robot Closes: https://lore.kernel.org/oe-kbuild-all/202308162101.ve5jbg80-...@intel.com Signed-off-by: Vineet Gupta --- arch/arc/include/asm/arcregs.h | 33 +- arch/arc/include/asm/setup.h | 4 +- arch/arc/kernel/setup.c| 560 +++-- arch/arc/mm/cache.c| 10 +- arch/arc/mm/tlb.c | 4 +- 5 files changed, 268 insertions(+), 343 deletions(-) diff --git a/arch/arc/include/asm/arcregs.h b/arch/arc/include/asm/arcregs.h index 160ee3fab1bd..4b13f60fe7ca 100644 --- a/arch/arc/include/asm/arcregs.h +++ b/arch/arc/include/asm/arcregs.h @@ -23,7 +23,7 @@ #define ARC_REG_ICCM_BUILD 0x78/* ICCM size (common) */ #define ARC_REG_XY_MEM_BCR 0x79 #define ARC_REG_MAC_BCR0x7a -#define ARC_REG_MUL_BCR0x7b +#define ARC_REG_MPY_BCR0x7b #define ARC_REG_SWAP_BCR 0x7c #define ARC_REG_NORM_BCR 0x7d #define ARC_REG_MIXMAX_BCR 0x7e @@ -177,7 +177,7 @@ struct bcr_isa_arcv2 { #endif }; -struct bcr_uarch_build_arcv2 { +struct bcr_uarch_build { #ifdef CONFIG_CPU_BIG_ENDIAN unsigned int pad:8, prod:8, maj:8, min:8; #else @@ -355,35 +355,6 @@ struct bcr_generic { #endif }; -/* - *** - * Generic structures to hold build configuration used at runtime - */ - -struct cpuinfo_arc_bpu { - unsigned int ver, full, num_cache, num_pred, ret_stk; -}; - -struct cpuinfo_arc_ccm { - unsigned int base_addr, sz; -}; - -struct cpuinfo_arc { - struct cpuinfo_arc_bpu bpu; - struct bcr_identity core; - struct bcr_isa_arcv2 isa; - const char *release, *name; - unsigned int vec_base; - struct cpuinfo_arc_ccm iccm, dccm; - struct { - unsigned int swap:1, norm:1, minmax:1, barrel:1, crc:1, swape:1, pad1:2, -fpu_sp:1, fpu_dp:1, dual:1, dual_enb:1, pad2:4, -ap_num:4, ap_full:1, smart:1, rtt:1, pad3:1, -timer0:1, timer1:1, rtc:1, gfrc:1, pad4:4; - } extn; - struct bcr_mpy extn_mpy; -}; - static inline int is_isa_arcv2(void) { return IS_ENABLED(CONFIG_ISA_ARCV2); diff --git a/arch/arc/include/asm/setup.h b/arch/arc/include/asm/setup.h index 4c0bacd0ff5c..1c6db599e1fc 100644 --- a/arch/arc/include/asm/setup.h +++ b/arch/arc/include/asm/setup.h @@ -35,10 +35,10 @@ long __init arc_get_mem_sz(void); #define IS_AVAIL3(v, v2, s)IS_AVAIL1(v, s), IS_AVAIL1(v, IS_DISABLED_RUN(v2)) extern void arc_mmu_init(void); -extern char *arc_mmu_mumbojumbo(int cpu_id, char *buf, int len); +extern int arc_mmu_mumbojumbo(int cpu_id, char *buf, int len); extern void arc_cache_init(void); -extern char *arc_cache_mumbojumbo(int cpu_id, char *buf, int len); +extern int arc_cache_mumbojumbo(int cpu_id, char *buf, int len); extern void __init handle_uboot_args(void); diff --git a/arch/arc/kernel/setup.c b/arch/arc/kernel/setup.c index 3ea834941c1f..0aa49308d792 100644 --- a/arch/arc/kernel/setup.c +++ b/arch/arc/kernel/setup.c @@ -29,6 +29,7 @@ #include #include #include +#include #define FIX_PTR(x) __asm__ __volatile__(";" : "+r"(x)) @@ -43,19 +44,22 @@ const struct machine_desc *machine_desc; struct task_struct *_current_task[NR_CPUS];/* For stack switching */ -struct cpuinfo_arc cpuinfo_arc700[NR_CPUS]; +struct cpuinfo_arc { + int arcver; + unsigned int t0:1, t1:1; + struct { + unsigned long base; + unsigned int sz; + } iccm, dccm; +}; + +#ifdef CONFIG_ISA_ARCV2 -static const struct id_to_str arc_legacy_rel[] = { +static const struct id_to_str arc_hs_rel[] = { /* ID.ARCVER, Release */ -#ifdef CONFIG_ISA_ARCOMPACT - { 0x34, "R4.10"}, - { 0x35, "R4.11"}, -#else { 0x51, "R2.0" }, { 0x52, "R2.1" }, { 0x53, "R3.0" }, -#endif - { 0x00, NULL } }; static const struct id_to_str arc_hs_ver54_rel[] = { @@ -66,320 +70,294 @@ static const struct id_to_str arc_hs_ver54_rel[] = { { 3, "R4.00a"}, { 0xFF,NULL } }; +#endif -static void read_decode_ccm_bcr(struct cpuinfo_arc *cpu) +static int +arcompact_mumbojumbo(int c, struct cpuinfo_arc *info, char *buf, int len) { - if (is_isa_arcompact()) { - struct bcr_iccm_arcompact iccm; - struct bcr_dccm_arcompact dccm; + int n = 0; +#ifdef CONFIG_ISA_ARCOMPACT + char *cpu_nm, *isa_nm = "ARCompact"; + struct bcr_fp_arcompact fpu_sp, fpu_dp; + int atomic = 0, be, present; + int bpu_full, bpu_cac
[PATCH v2 05/20] ARC: boot log: eliminate struct cpuinfo_arc #1: mm
This is first step in eliminating struct cpuinfo_arc[NR_CPUS] Back when we had just ARCompact ISA, the idea was to read/bit-fiddle the BCRs once and and cache decoded information in a global struct ready to use. With ARCv2 it was modified to contained abstract / ISA agnostic information. However with ARCv3 there 's too much disparity to abstract in common structures. So drop the entire decode once and store paradigm. Afterall there's only 2 users of this machinery anyways: boot printing and cat /proc/cpuinfo. None is performance critical to warrant locking away resident memory per cpu. This patch is first step in that direction - decouples struct cpuinfo_arc_mmu from global struct cpuinfo_arc - mmu code still has a trimmed down static version of struct cpuinfo_arc_mmu to cache information needed in performance critical code such as tlb flush routines - folds read_decode_mmu_bcr() into arc_mmu_mumbojumbo() - setup_processor() directly calls arc_mmu_init() and not via arc_cpu_init() Tested-by: kernel test robot Closes: https://lore.kernel.org/oe-kbuild-all/202308151213.qkzpmiyz-...@intel.com/ Signed-off-by: Vineet Gupta --- arch/arc/include/asm/arcregs.h | 27 +++--- arch/arc/include/asm/setup.h | 1 - arch/arc/kernel/setup.c| 4 +- arch/arc/mm/tlb.c | 93 +- 4 files changed, 58 insertions(+), 67 deletions(-) diff --git a/arch/arc/include/asm/arcregs.h b/arch/arc/include/asm/arcregs.h index 2162023195c5..af00cbe9b850 100644 --- a/arch/arc/include/asm/arcregs.h +++ b/arch/arc/include/asm/arcregs.h @@ -185,6 +185,27 @@ struct bcr_uarch_build_arcv2 { #endif }; +struct bcr_mmu_3 { +#ifdef CONFIG_CPU_BIG_ENDIAN + unsigned int ver:8, ways:4, sets:4, res:3, sasid:1, pg_sz:4, +u_itlb:4, u_dtlb:4; +#else + unsigned int u_dtlb:4, u_itlb:4, pg_sz:4, sasid:1, res:3, sets:4, +ways:4, ver:8; +#endif +}; + +struct bcr_mmu_4 { +#ifdef CONFIG_CPU_BIG_ENDIAN + unsigned int ver:8, sasid:1, sz1:4, sz0:4, res:2, pae:1, +n_ways:2, n_entry:2, n_super:2, u_itlb:3, u_dtlb:3; +#else + /* DTLB ITLB JESJE JA */ + unsigned int u_dtlb:3, u_itlb:3, n_super:2, n_entry:2, n_ways:2, +pae:1, res:2, sz0:4, sz1:4, sasid:1, ver:8; +#endif +}; + struct bcr_mpy { #ifdef CONFIG_CPU_BIG_ENDIAN unsigned int pad:8, x1616:8, dsp:4, cycles:2, type:2, ver:8; @@ -307,11 +328,6 @@ struct bcr_generic { * Generic structures to hold build configuration used at runtime */ -struct cpuinfo_arc_mmu { - unsigned int ver:4, pg_sz_k:8, s_pg_sz_m:8, pad:10, sasid:1, pae:1; - unsigned int sets:12, ways:4, u_dtlb:8, u_itlb:8; -}; - struct cpuinfo_arc_cache { unsigned int sz_k:14, line_len:8, assoc:4, alias:1, vipt:1, pad:4; }; @@ -326,7 +342,6 @@ struct cpuinfo_arc_ccm { struct cpuinfo_arc { struct cpuinfo_arc_cache icache, dcache, slc; - struct cpuinfo_arc_mmu mmu; struct cpuinfo_arc_bpu bpu; struct bcr_identity core; struct bcr_isa_arcv2 isa; diff --git a/arch/arc/include/asm/setup.h b/arch/arc/include/asm/setup.h index 374138832c5a..76443f198778 100644 --- a/arch/arc/include/asm/setup.h +++ b/arch/arc/include/asm/setup.h @@ -36,7 +36,6 @@ long __init arc_get_mem_sz(void); extern void arc_mmu_init(void); extern char *arc_mmu_mumbojumbo(int cpu_id, char *buf, int len); -extern void read_decode_mmu_bcr(void); extern void arc_cache_init(void); extern char *arc_cache_mumbojumbo(int cpu_id, char *buf, int len); diff --git a/arch/arc/kernel/setup.c b/arch/arc/kernel/setup.c index 41f07b3e594e..094461540f8a 100644 --- a/arch/arc/kernel/setup.c +++ b/arch/arc/kernel/setup.c @@ -186,7 +186,6 @@ static void read_arc_build_cfg_regs(void) /* Read CCM BCRs for boot reporting even if not enabled in Kconfig */ read_decode_ccm_bcr(cpu); - read_decode_mmu_bcr(); read_decode_cache_bcr(); if (is_isa_arcompact()) { @@ -256,7 +255,7 @@ static void read_arc_build_cfg_regs(void) cpu->isa.be = IS_ENABLED(CONFIG_CPU_BIG_ENDIAN); /* there's no direct way to distinguish 750 vs. 770 */ - if (unlikely(cpu->core.family < 0x34 || cpu->mmu.ver < 3)) + if (unlikely(cpu->core.family < 0x34)) cpu->name = "ARC750"; } else { cpu->isa = isa; @@ -463,6 +462,7 @@ void setup_processor(void) arc_init_IRQ(); pr_info("%s", arc_cpu_mumbojumbo(cpu_id, str, sizeof(str))); + pr_info("%s", arc_mmu_mumbojumbo(cpu_id, str, sizeof(str))); arc_mmu_init(); arc_cache_init(); diff --git a/arch/arc/mm/tlb.c b/arch/arc/mm/tlb.c index 2a3105a682c3..861cabe81e87 100644 --- a/arch/arc/mm/tlb.c +++ b/arch/arc/mm/tlb.c @@ -18,7 +18,9 @@ /* A co
Re: {standard input}:1727: Error: operand out of range (-132 is not between -128 and 127)
+CC Alexey and Claudiu On 8/15/23 09:35, Paul E. McKenney wrote: On Tue, Aug 15, 2023 at 07:34:04AM +, Liu, Yujie wrote: Hi Paul, On Fri, 2023-08-11 at 08:41 -0700, Paul E. McKenney wrote: On Fri, Aug 11, 2023 at 01:02:12PM +0800, kernel test robot wrote: tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master head: 25aa0bebba72b318e71fe205bfd1236550cc9534 commit: a6889becb05394255c80b62103677e3b095726a9 refscale: Add tests using SLAB_TYPESAFE_BY_RCU date: 7 months ago config: arc-randconfig-r006-20230811 (https://download.01.org/0day-ci/archive/20230811/202308111233.rbf5c0jd-...@intel.com/config) compiler: arceb-elf-gcc (GCC) 12.3.0 reproduce: (https://download.01.org/0day-ci/archive/20230811/202308111233.rbf5c0jd-...@intel.com/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags Reported-by: kernel test robot Closes: https://lore.kernel.org/oe-kbuild-all/202308111233.rbf5c0jd-...@intel.com/ All errors (new ones prefixed by >>): {standard input}: Assembler messages: {standard input}:1727: Error: operand out of range (-132 is not between -128 and 127) I am not seeing any inline assembly in that patch, so I have to suspect a bug in arch code or the compiler backend for arc. Or is there something that I am missing here? We looked into this case a little bit. The assembler error popped up when building kernel/rcu/refscale.o $make W=1 --keep-going CROSS_COMPILE=arceb-elf- ARCH=arc kernel/rcu/refscale.o ... CC [M] kernel/rcu/refscale.o {standard input}: Assembler messages: {standard input}:1727: Error: operand out of range (-132 is not between -128 and 127) make[3]: *** [scripts/Makefile.build:252: kernel/rcu/refscale.o] Error 1 make[2]: *** [scripts/Makefile.build:504: kernel/rcu] Error 2 make[2]: Target 'kernel/rcu/refscale.o' not remade because of errors. make[1]: *** [scripts/Makefile.build:504: kernel] Error 2 make[1]: Target 'kernel/rcu/refscale.o' not remade because of errors. make: *** [Makefile:2008: .] Error 2 make: Target 'kernel/rcu/refscale.o' not remade because of errors. We did some assembly and disassembly tricks: 1721 .L334: 1722 ld_sr0,[r14,52] ;15 1723 brgt r0, r19, @.L335 1724 ld_sr0,[r13,120];15 1725 breq_s r0, 0, @.L337 1726 jl [r17] 1727 brne_s r0, 0, @.L337<--- 1728 mov_s r2,20 ;3 1729 mov_s r1,0;3 1730 mov_s r0,sp ;4 1731 jl [r20] 1732 mov_s r1,0;3 1733 mov_s r0,sp ;4 1734 jl @init_wait_entry 1735 .align 2 This assembly instruction at line 1727 points to the code in main_func, but main_func is not touched by commit a6889becb053. d6e: 860dld_sr0,[r14,0x34] d70: 0b59 a002 brlt.nt r19,r0,-168 ;cc8 return arch_atomic_read(v); d74: 851eld_sr0,[r13,0x78] wait_event(main_wq, d76: e842breq_s r0,0,-124 ;cf8 d78: 2022 0440 jl [r17] d7c: e8bebrne_s r0,0,124;df8 <-- d7e: da14mov_s r2,0x14 d80: 702cmov_s r1,0 d82: 4083mov_s r0,sp d84: 2022 0500 jl [r20] d88: 702cmov_s r1,0 d8a: 4083mov_s r0,sp d8c: 2022 0f80 jl 0 We also tried on the parent commit 3c6496c86e48. It builds fine without that assembler error, and corresponding disassembly is: afe: 860dld_sr0,[r14,0x34] b00: 0b5d a002 brlt.nt r19,r0,-164 ;a5c return arch_atomic_read(v); b04: 8518ld_sr0,[r13,0x60] wait_event(main_wq, b06: e844breq_s r0,0,-120 ;a8c b08: 2022 0440 jl [r17] b0c: e8c0brne_s r0,0,-128 ;a8c <-- b0e: da14mov_s r2,0x14 b10: 702cmov_s r1,0 b12: 4083mov_s r0,sp b14: 2022 0500 jl [r20] b18: 702cmov_s r1,0 b1a: 4083mov_s r0,sp b1c: 2022 0f80 jl 0 b24: 724cmov_s r2,2 b26: 4183mov_s r1,sp b28: 40c3 mov_s r0,0 b2e: 2022 0f80 jl 0 We are also not sure if this is a bug in arch code or compiler side. Here we provide above info for your reference. Thank you for looking into this and getting back to me. I added the ARC maintainer and list on CC. Thanx, Paul ___ linux-snps-arc mailin
Re: [PATCH] ARC: avoid unwanted gcc optimizations in atomic operations
On 8/15/23 08:11, pavel.koz...@synopsys.com wrote: From: Pavel Kozlov Notify a compiler about write operations and prevent unwanted optimizations. Add the "memory" clobber to the clobber list. An obvious problem with unwanted compiler optimizations appeared after the cpumask optimization commit 596ff4a09b89 ("cpumask: re-introduce constant-sized cpumask optimizations"). After this commit the SMP kernels for ARC no longer loads because of failed assert in the percpu allocator initialization routine: percpu: BUG: failure at mm/percpu.c:2981/pcpu_build_alloc_info()! The write operation performed by the scond instruction in the atomic inline asm code is not properly passed to the compiler. The compiler cannot correctly optimize a nested loop that runs through the cpumask in the pcpu_build_alloc_info() function. Add the "memory" clobber to fix this. Link:https://github.com/foss-for-synopsys-dwc-arc-processors/linux/issues/135 Cc: # v6.3+ Signed-off-by: Pavel Kozlov Acked-by: Vineet Gupta Fixes: b64be6836993c431e ("ARC: atomics: implement relaxed variants") Before that commit, atomic ops could elide memory clobber because the trailing smp_mb() did that anyways. However after that commit, the smp_mb() was optional for relaxed variants and thus needs clobber. ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
[PATCH 18/20] ARC: entry: replace 8 byte ADD.ne with 4 byte ADD2.ne
ARCv2 current 07e0 : 7e0: 2482 3c01 sub sp,sp,112 7e4: 1c28 3006 std r0r1,[sp,40] 7e8: 1c30 3086 std r2r3,[sp,48] 7ec: 1c38 3106 std r4r5,[sp,56] 7f0: 1c40 3186 std r6r7,[sp,64] 7f4: 1c48 3206 std r8r9,[sp,72] 7f8: 1c50 3286 std r10r11,[sp,80] 7fc: 1c58 37c0 st blink,[sp,88] 800: 1c0c 36c0 st fp,[sp,12] 804: 1c18 3680 st gp,[sp,24] 808: 1c10 3780 st r30,[sp,16] 80c: 1c14 3300 st r12,[sp,20] 810: 226a 1340 lr r10,[aux_user_sp] 814: 22ca 1702 mov.ne r10,sp 818: 22c0 1f82 0070 add.ne r10,r10,0x70 ^ With fix 07b4 : 7b4: 2482 3c01 sub sp,sp,112 7b8: 1c28 3006 std r0r1,[sp,40] 7bc: 1c30 3086 std r2r3,[sp,48] 7c0: 1c38 3106 std r4r5,[sp,56] 7c4: 1c40 3186 std r6r7,[sp,64] 7c8: 1c48 3206 std r8r9,[sp,72] 7cc: 1c50 3286 std r10r11,[sp,80] 7d0: 1c58 37c0 st blink,[sp,88] 7d4: 1c0c 36c0 st fp,[sp,12] 7d8: 1c18 3680 st gp,[sp,24] 7dc: 1c10 3780 st r30,[sp,16] 7e0: 1c14 3300 st r12,[sp,20] 7e4: 226a 1340 lr r10,[aux_user_sp] 7e8: 22ca 1702 mov.ne r10,sp 7ec: 22d5 1722 add2.ne r10,r10,0x1c Signed-off-by: Vineet Gupta --- arch/arc/include/asm/entry-arcv2.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arc/include/asm/entry-arcv2.h b/arch/arc/include/asm/entry-arcv2.h index f7c9b3915d10..a030eae93d35 100644 --- a/arch/arc/include/asm/entry-arcv2.h +++ b/arch/arc/include/asm/entry-arcv2.h @@ -167,7 +167,7 @@ ; ISA requires ADD.nz to have same dest and src reg operands mov.nz r10, sp - add.nz r10, r10, SZ_PT_REGS; K mode SP + add2.nz r10, r10, SZ_PT_REGS/4 ; K mode SP st r10, [sp, PT_sp]; SP (pt_regs->sp) -- 2.34.1 ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
[PATCH 14/20] ARC: entry: ARcompact EV_ProtV to use r10 directly
Signed-off-by: Vineet Gupta --- arch/arc/kernel/entry-compact.S | 6 ++ 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/arch/arc/kernel/entry-compact.S b/arch/arc/kernel/entry-compact.S index 5cb0cd7e4eab..77f0090554c5 100644 --- a/arch/arc/kernel/entry-compact.S +++ b/arch/arc/kernel/entry-compact.S @@ -254,9 +254,8 @@ END(handle_interrupt_level1) ENTRY(EV_TLBProtV) - EXCEPTION_PROLOGUE + EXCEPTION_PROLOGUE ; ECR returned in r10 - mov r2, r10 ; ECR set into r10 already lr r0, [efa] ; Faulting Data address (not part of pt_regs saved above) ; Exception auto-disables further Intr/exceptions. @@ -273,8 +272,7 @@ ENTRY(EV_TLBProtV) ; -Access Violation : 00_23_(00|01|02|03)_00 ;x r w r+w ; -Unaligned Access : 00_23_04_00 - ; - bbit1 r2, ECR_C_BIT_PROTV_MISALIG_DATA, 4f + bbit1 r10, ECR_C_BIT_PROTV_MISALIG_DATA, 4f ;= (6a) Access Violation Processing bl do_page_fault -- 2.34.1 ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
[PATCH 08/20] ARC: boot log: eliminate struct cpuinfo_arc #4: boot log per ISA
- boot log now clearly per ISA - global struct cpuinfo_arc[] elimiated - local struct struct arcinfo kept for passing info between functions Signed-off-by: Vineet Gupta --- arch/arc/include/asm/arcregs.h | 33 +- arch/arc/include/asm/setup.h | 4 +- arch/arc/kernel/setup.c| 560 +++-- arch/arc/mm/cache.c| 10 +- arch/arc/mm/tlb.c | 4 +- 5 files changed, 268 insertions(+), 343 deletions(-) diff --git a/arch/arc/include/asm/arcregs.h b/arch/arc/include/asm/arcregs.h index 160ee3fab1bd..4b13f60fe7ca 100644 --- a/arch/arc/include/asm/arcregs.h +++ b/arch/arc/include/asm/arcregs.h @@ -23,7 +23,7 @@ #define ARC_REG_ICCM_BUILD 0x78/* ICCM size (common) */ #define ARC_REG_XY_MEM_BCR 0x79 #define ARC_REG_MAC_BCR0x7a -#define ARC_REG_MUL_BCR0x7b +#define ARC_REG_MPY_BCR0x7b #define ARC_REG_SWAP_BCR 0x7c #define ARC_REG_NORM_BCR 0x7d #define ARC_REG_MIXMAX_BCR 0x7e @@ -177,7 +177,7 @@ struct bcr_isa_arcv2 { #endif }; -struct bcr_uarch_build_arcv2 { +struct bcr_uarch_build { #ifdef CONFIG_CPU_BIG_ENDIAN unsigned int pad:8, prod:8, maj:8, min:8; #else @@ -355,35 +355,6 @@ struct bcr_generic { #endif }; -/* - *** - * Generic structures to hold build configuration used at runtime - */ - -struct cpuinfo_arc_bpu { - unsigned int ver, full, num_cache, num_pred, ret_stk; -}; - -struct cpuinfo_arc_ccm { - unsigned int base_addr, sz; -}; - -struct cpuinfo_arc { - struct cpuinfo_arc_bpu bpu; - struct bcr_identity core; - struct bcr_isa_arcv2 isa; - const char *release, *name; - unsigned int vec_base; - struct cpuinfo_arc_ccm iccm, dccm; - struct { - unsigned int swap:1, norm:1, minmax:1, barrel:1, crc:1, swape:1, pad1:2, -fpu_sp:1, fpu_dp:1, dual:1, dual_enb:1, pad2:4, -ap_num:4, ap_full:1, smart:1, rtt:1, pad3:1, -timer0:1, timer1:1, rtc:1, gfrc:1, pad4:4; - } extn; - struct bcr_mpy extn_mpy; -}; - static inline int is_isa_arcv2(void) { return IS_ENABLED(CONFIG_ISA_ARCV2); diff --git a/arch/arc/include/asm/setup.h b/arch/arc/include/asm/setup.h index 4c0bacd0ff5c..1c6db599e1fc 100644 --- a/arch/arc/include/asm/setup.h +++ b/arch/arc/include/asm/setup.h @@ -35,10 +35,10 @@ long __init arc_get_mem_sz(void); #define IS_AVAIL3(v, v2, s)IS_AVAIL1(v, s), IS_AVAIL1(v, IS_DISABLED_RUN(v2)) extern void arc_mmu_init(void); -extern char *arc_mmu_mumbojumbo(int cpu_id, char *buf, int len); +extern int arc_mmu_mumbojumbo(int cpu_id, char *buf, int len); extern void arc_cache_init(void); -extern char *arc_cache_mumbojumbo(int cpu_id, char *buf, int len); +extern int arc_cache_mumbojumbo(int cpu_id, char *buf, int len); extern void __init handle_uboot_args(void); diff --git a/arch/arc/kernel/setup.c b/arch/arc/kernel/setup.c index 3ea834941c1f..8749fcc8cfe3 100644 --- a/arch/arc/kernel/setup.c +++ b/arch/arc/kernel/setup.c @@ -29,6 +29,7 @@ #include #include #include +#include #define FIX_PTR(x) __asm__ __volatile__(";" : "+r"(x)) @@ -43,19 +44,22 @@ const struct machine_desc *machine_desc; struct task_struct *_current_task[NR_CPUS];/* For stack switching */ -struct cpuinfo_arc cpuinfo_arc700[NR_CPUS]; +struct cpuinfo_arc { + int arcver; + unsigned int t0:1, t1:1; + struct { + unsigned long base; + unsigned int sz; + } iccm, dccm; +}; + +#ifdef CONFIG_ISA_ARCV2 -static const struct id_to_str arc_legacy_rel[] = { +static const struct id_to_str arc_hs_rel[] = { /* ID.ARCVER, Release */ -#ifdef CONFIG_ISA_ARCOMPACT - { 0x34, "R4.10"}, - { 0x35, "R4.11"}, -#else { 0x51, "R2.0" }, { 0x52, "R2.1" }, { 0x53, "R3.0" }, -#endif - { 0x00, NULL } }; static const struct id_to_str arc_hs_ver54_rel[] = { @@ -66,320 +70,294 @@ static const struct id_to_str arc_hs_ver54_rel[] = { { 3, "R4.00a"}, { 0xFF,NULL } }; +#endif -static void read_decode_ccm_bcr(struct cpuinfo_arc *cpu) +static int +arcompact_mumbojumbo(int c, struct cpuinfo_arc *info, char *buf, int len) { - if (is_isa_arcompact()) { - struct bcr_iccm_arcompact iccm; - struct bcr_dccm_arcompact dccm; + int n = 0; +#ifdef CONFIG_ISA_ARCOMPACT + char *cpu_nm, *isa_nm = "ARCompact"; + struct bcr_fp_arcompact fpu_sp, fpu_dp; + int atomic = 0, be, present; + int bpu_full, bpu_cache, bpu_pred; + struct bcr_bpu_arcompact bpu; + struct bcr_iccm_arcompact iccm; + struct bcr_dccm_arcompact
[PATCH 20/20] ARC: pt_regs: create seperate type for ecr
Reduces duplication in each ISA specific pt_regs Signed-off-by: Vineet Gupta --- arch/arc/include/asm/ptrace.h | 45 +- arch/arc/kernel/asm-offsets.c | 2 +- arch/arc/kernel/kgdb.c | 2 +- arch/arc/kernel/ptrace.c | 4 +-- arch/arc/kernel/traps.c| 4 +-- arch/arc/kernel/troubleshoot.c | 13 +- arch/arc/mm/fault.c| 6 ++--- 7 files changed, 32 insertions(+), 44 deletions(-) diff --git a/arch/arc/include/asm/ptrace.h b/arch/arc/include/asm/ptrace.h index 3a054b695f28..724e3fe31ed5 100644 --- a/arch/arc/include/asm/ptrace.h +++ b/arch/arc/include/asm/ptrace.h @@ -12,6 +12,17 @@ #ifndef __ASSEMBLY__ +typedef union { + struct { +#ifdef CONFIG_CPU_BIG_ENDIAN + unsigned long state:8, vec:8, cause:8, param:8; +#else + unsigned long param:8, cause:8, vec:8, state:8; +#endif + }; + unsigned long full; +} ecr_reg; + /* THE pt_regs: Defines how regs are saved during entry into kernel */ #ifdef CONFIG_ISA_ARCOMPACT @@ -40,18 +51,7 @@ struct pt_regs { * Last word used by Linux for extra state mgmt (syscall-restart) * For interrupts, use artificial ECR values to note current prio-level */ - union { - struct { -#ifdef CONFIG_CPU_BIG_ENDIAN - unsigned long state:8, ecr_vec:8, - ecr_cause:8, ecr_param:8; -#else - unsigned long ecr_param:8, ecr_cause:8, - ecr_vec:8, state:8; -#endif - }; - unsigned long event; - }; + ecr_reg ecr; }; #define MAX_REG_OFFSET offsetof(struct pt_regs, event) @@ -62,18 +62,7 @@ struct pt_regs { unsigned long orig_r0; - union { - struct { -#ifdef CONFIG_CPU_BIG_ENDIAN - unsigned long state:8, ecr_vec:8, - ecr_cause:8, ecr_param:8; -#else - unsigned long ecr_param:8, ecr_cause:8, - ecr_vec:8, state:8; -#endif - }; - unsigned long event; - }; + ecr_reg ecr;/* Exception Cause Reg */ unsigned long bta; /* erbta */ @@ -131,13 +120,13 @@ struct callee_regs { /* return 1 if PC in delay slot */ #define delay_mode(regs) ((regs->status32 & STATUS_DE_MASK) == STATUS_DE_MASK) -#define in_syscall(regs)((regs->ecr_vec == ECR_V_TRAP) && !regs->ecr_param) -#define in_brkpt_trap(regs) ((regs->ecr_vec == ECR_V_TRAP) && regs->ecr_param) +#define in_syscall(regs)((regs->ecr.vec == ECR_V_TRAP) && !regs->ecr.param) +#define in_brkpt_trap(regs) ((regs->ecr.vec == ECR_V_TRAP) && regs->ecr.param) #define STATE_SCALL_RESTARTED 0x01 -#define syscall_wont_restart(reg) (reg->state |= STATE_SCALL_RESTARTED) -#define syscall_restartable(reg) !(reg->state & STATE_SCALL_RESTARTED) +#define syscall_wont_restart(regs) (regs->ecr.state |= STATE_SCALL_RESTARTED) +#define syscall_restartable(regs) !(regs->ecr.state & STATE_SCALL_RESTARTED) #define current_pt_regs() \ ({ \ diff --git a/arch/arc/kernel/asm-offsets.c b/arch/arc/kernel/asm-offsets.c index 478768c88f46..f77deb799175 100644 --- a/arch/arc/kernel/asm-offsets.c +++ b/arch/arc/kernel/asm-offsets.c @@ -46,7 +46,7 @@ int main(void) BLANK(); DEFINE(PT_status32, offsetof(struct pt_regs, status32)); - DEFINE(PT_event, offsetof(struct pt_regs, event)); + DEFINE(PT_event, offsetof(struct pt_regs, ecr)); DEFINE(PT_bta, offsetof(struct pt_regs, bta)); DEFINE(PT_sp, offsetof(struct pt_regs, sp)); DEFINE(PT_r0, offsetof(struct pt_regs, r0)); diff --git a/arch/arc/kernel/kgdb.c b/arch/arc/kernel/kgdb.c index 345a554c..4f2b5951454f 100644 --- a/arch/arc/kernel/kgdb.c +++ b/arch/arc/kernel/kgdb.c @@ -175,7 +175,7 @@ void kgdb_trap(struct pt_regs *regs) * with trap_s 4 (compiled) breakpoints, continuation needs to * start after the breakpoint. */ - if (regs->ecr_param == 3) + if (regs->ecr.param == 3) instruction_pointer(regs) -= BREAK_INSTR_SIZE; kgdb_handle_exception(1, SIGTRAP, 0, regs); diff --git a/arch/arc/kernel/ptrace.c b/arch/arc/kernel/ptrace.c index 14ea7406f5cd..e0c233c178b1 100644 --- a/arch/arc/kernel/ptrace.c +++ b/arch/arc/kernel/ptrace.c @@ -46,7 +46,7 @@ static const struct pt_regs_offset regoffset_table[] = { REG_OFFSET_NAME(r0), REG_OFFSET_NAME(sp), REG_OFFSET_NAME(orig_r0), - REG_OFFSET_NAME(event), + REG_OFFSET_NAME(ecr), REG_OFFSET_END, }; @@ -54,7 +54,7 @@ static const struct pt_regs_offset regoffset_table[] = {
[PATCH 05/20] ARC: boot log: eliminate struct cpuinfo_arc #1: mm
This is first step in eliminating struct cpuinfo_arc[NR_CPUS] Back when we had just ARCompact ISA, the idea was to read/bit-fiddle the BCRs once and and cache decoded information in a global struct ready to use. With ARCv2 it was modified to contained abstract / ISA agnostic information. However with ARCv3 there 's too much disparity to abstract in common structures. So drop the entire decode once and store paradigm. Afterall there's only 2 users of this machinery anyways: boot printing and cat /proc/cpuinfo. None is performance critical to warrant locking away resident memory per cpu. This patch is first step in that direction - decouples struct cpuinfo_arc_mmu from global struct cpuinfo_arc - mmu code still has a trimmed down static version of struct cpuinfo_arc_mmu to cache information needed in performance critical code such as tlb flush routines - folds read_decode_mmu_bcr() into arc_mmu_mumbojumbo() - setup_processor() directly calls arc_mmu_init() and not via arc_cpu_init() Signed-off-by: Vineet Gupta --- arch/arc/include/asm/arcregs.h | 27 +++--- arch/arc/include/asm/setup.h | 1 - arch/arc/kernel/setup.c| 4 +- arch/arc/mm/tlb.c | 92 +- 4 files changed, 57 insertions(+), 67 deletions(-) diff --git a/arch/arc/include/asm/arcregs.h b/arch/arc/include/asm/arcregs.h index 2162023195c5..af00cbe9b850 100644 --- a/arch/arc/include/asm/arcregs.h +++ b/arch/arc/include/asm/arcregs.h @@ -185,6 +185,27 @@ struct bcr_uarch_build_arcv2 { #endif }; +struct bcr_mmu_3 { +#ifdef CONFIG_CPU_BIG_ENDIAN + unsigned int ver:8, ways:4, sets:4, res:3, sasid:1, pg_sz:4, +u_itlb:4, u_dtlb:4; +#else + unsigned int u_dtlb:4, u_itlb:4, pg_sz:4, sasid:1, res:3, sets:4, +ways:4, ver:8; +#endif +}; + +struct bcr_mmu_4 { +#ifdef CONFIG_CPU_BIG_ENDIAN + unsigned int ver:8, sasid:1, sz1:4, sz0:4, res:2, pae:1, +n_ways:2, n_entry:2, n_super:2, u_itlb:3, u_dtlb:3; +#else + /* DTLB ITLB JESJE JA */ + unsigned int u_dtlb:3, u_itlb:3, n_super:2, n_entry:2, n_ways:2, +pae:1, res:2, sz0:4, sz1:4, sasid:1, ver:8; +#endif +}; + struct bcr_mpy { #ifdef CONFIG_CPU_BIG_ENDIAN unsigned int pad:8, x1616:8, dsp:4, cycles:2, type:2, ver:8; @@ -307,11 +328,6 @@ struct bcr_generic { * Generic structures to hold build configuration used at runtime */ -struct cpuinfo_arc_mmu { - unsigned int ver:4, pg_sz_k:8, s_pg_sz_m:8, pad:10, sasid:1, pae:1; - unsigned int sets:12, ways:4, u_dtlb:8, u_itlb:8; -}; - struct cpuinfo_arc_cache { unsigned int sz_k:14, line_len:8, assoc:4, alias:1, vipt:1, pad:4; }; @@ -326,7 +342,6 @@ struct cpuinfo_arc_ccm { struct cpuinfo_arc { struct cpuinfo_arc_cache icache, dcache, slc; - struct cpuinfo_arc_mmu mmu; struct cpuinfo_arc_bpu bpu; struct bcr_identity core; struct bcr_isa_arcv2 isa; diff --git a/arch/arc/include/asm/setup.h b/arch/arc/include/asm/setup.h index 374138832c5a..76443f198778 100644 --- a/arch/arc/include/asm/setup.h +++ b/arch/arc/include/asm/setup.h @@ -36,7 +36,6 @@ long __init arc_get_mem_sz(void); extern void arc_mmu_init(void); extern char *arc_mmu_mumbojumbo(int cpu_id, char *buf, int len); -extern void read_decode_mmu_bcr(void); extern void arc_cache_init(void); extern char *arc_cache_mumbojumbo(int cpu_id, char *buf, int len); diff --git a/arch/arc/kernel/setup.c b/arch/arc/kernel/setup.c index 41f07b3e594e..094461540f8a 100644 --- a/arch/arc/kernel/setup.c +++ b/arch/arc/kernel/setup.c @@ -186,7 +186,6 @@ static void read_arc_build_cfg_regs(void) /* Read CCM BCRs for boot reporting even if not enabled in Kconfig */ read_decode_ccm_bcr(cpu); - read_decode_mmu_bcr(); read_decode_cache_bcr(); if (is_isa_arcompact()) { @@ -256,7 +255,7 @@ static void read_arc_build_cfg_regs(void) cpu->isa.be = IS_ENABLED(CONFIG_CPU_BIG_ENDIAN); /* there's no direct way to distinguish 750 vs. 770 */ - if (unlikely(cpu->core.family < 0x34 || cpu->mmu.ver < 3)) + if (unlikely(cpu->core.family < 0x34)) cpu->name = "ARC750"; } else { cpu->isa = isa; @@ -463,6 +462,7 @@ void setup_processor(void) arc_init_IRQ(); pr_info("%s", arc_cpu_mumbojumbo(cpu_id, str, sizeof(str))); + pr_info("%s", arc_mmu_mumbojumbo(cpu_id, str, sizeof(str))); arc_mmu_init(); arc_cache_init(); diff --git a/arch/arc/mm/tlb.c b/arch/arc/mm/tlb.c index 2a3105a682c3..17e32c707367 100644 --- a/arch/arc/mm/tlb.c +++ b/arch/arc/mm/tlb.c @@ -18,7 +18,9 @@ /* A copy of the ASID from the PID reg is kept in asid_cache */ DEFINE_PER_CPU(unsigned int, asid_cache) = MM_
[PATCH 17/20] ARC: entry: replace 8 byte OR with 4 byte BSET
FAKE_RET_FROM_EXCEPTION drops down to pure kernel mode. It currently has an 8 byte instruction which can be replaced with 4 byte BSET This is applicable to both ARCv2 and ARCv3 entr code. ARCv2 current 0804 : ... 874: 216a 1280 lr r9,[status32] 878: 2146 1809 bic r9,r9,0x20 87c: 2105 1f89 8000 or r9,r9,0x8000 ^ 884: 2029 8240 kflag r9 ARCv2 after -- 07e0 : ... 850: 216a 1280 lr r9,[status32] 854: 2150 1149 bclrr9,r9,0x5 858: 214f 17c9 bsetr9,r9,0x1f 85c: 2029 8240 kflag r9 Signed-off-by: Vineet Gupta --- arch/arc/include/asm/entry-arcv2.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arc/include/asm/entry-arcv2.h b/arch/arc/include/asm/entry-arcv2.h index 11b48ab39154..f7c9b3915d10 100644 --- a/arch/arc/include/asm/entry-arcv2.h +++ b/arch/arc/include/asm/entry-arcv2.h @@ -274,8 +274,8 @@ .macro FAKE_RET_FROM_EXCPN lr r9, [status32] - bic r9, r9, STATUS_AE_MASK - or r9, r9, STATUS_IE_MASK + bclrr9, r9, STATUS_AE_BIT + bsetr9, r9, STATUS_IE_BIT kflag r9 .endm -- 2.34.1 ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
[PATCH 13/20] ARC: entry: rework (non-functional)
- comments update - rename syscall_trace_entry - use PT_xxx in entry code Signed-off-by: Vineet Gupta --- arch/arc/include/asm/entry-arcv2.h | 23 -- arch/arc/include/asm/entry-compact.h | 3 +- arch/arc/include/asm/ptrace.h| 2 +- arch/arc/kernel/asm-offsets.c| 1 + arch/arc/kernel/entry.S | 45 +--- arch/arc/kernel/ptrace.c | 2 +- 6 files changed, 39 insertions(+), 37 deletions(-) diff --git a/arch/arc/include/asm/entry-arcv2.h b/arch/arc/include/asm/entry-arcv2.h index 858742feab71..a38ed505b3de 100644 --- a/arch/arc/include/asm/entry-arcv2.h +++ b/arch/arc/include/asm/entry-arcv2.h @@ -48,14 +48,18 @@ /**/ .macro INTERRUPT_PROLOGUE - ; (A) Before jumping to Interrupt Vector, hardware micro-ops did following: + ; Before jumping to Interrupt Vector, hardware micro-ops did following: ; 1. SP auto-switched to kernel mode stack ; 2. STATUS32.Z flag set if in U mode at time of interrupt (U:1,K:0) ; 3. Auto save: (mandatory) Push PC and STAT32 on stack ; hardware does even if CONFIG_ARC_IRQ_NO_AUTOSAVE - ; 4. Auto save: (optional) r0-r11, blink, LPE,LPS,LPC, JLI,LDI,EI + ; 4a. Auto save: (optional) r0-r11, blink, LPE,LPS,LPC, JLI,LDI,EI ; - ; (B) Manually saved some regs: r12,r30, sp,fp,gp, ACCL pair + ; Now + ; 4b. If Auto-save (optional) not enabled in hw, manually save them + ; 5. Manually save: r12,r30, sp,fp,gp, ACCL pair + ; + ; At the end, SP points to pt_regs #ifdef CONFIG_ARC_IRQ_NO_AUTOSAVE ; carve pt_regs on stack (case #3), PC/STAT32 already on stack @@ -73,13 +77,14 @@ /**/ .macro EXCEPTION_PROLOGUE - ; (A) Before jumping to Exception Vector, hardware micro-ops did following: + ; Before jumping to Exception Vector, hardware micro-ops did following: ; 1. SP auto-switched to kernel mode stack ; 2. STATUS32.Z flag set if in U mode at time of exception (U:1,K:0) ; - ; (B) Manually save the complete reg file below + ; Now manually save rest of reg file + ; At the end, SP points to pt_regs - sub sp, sp, SZ_PT_REGS ; carve pt_regs + sub sp, sp, SZ_PT_REGS ; carve space for pt_regs ; _HARD saves r10 clobbered by _SOFT as scratch hence comes first @@ -136,8 +141,8 @@ ST2 gp, fp, PT_r26 ; gp (r26), fp (r27) - st r12, [sp, PT_sp + 4] - st r30, [sp, PT_sp + 8] + st r12, [sp, PT_r12] + st r30, [sp, PT_r30] ; Saving pt_regs->sp correctly requires some extra work due to the way ; Auto stack switch works @@ -244,7 +249,7 @@ btstr0, STATUS_U_BIT; Z flag set if K, used in restoring SP - ld r10, [sp, PT_event + 4] + ld r10, [sp, PT_bta] sr r10, [erbta] LD2 r10, r11, PT_ret diff --git a/arch/arc/include/asm/entry-compact.h b/arch/arc/include/asm/entry-compact.h index e3383e1cb040..4e2ae82779ed 100644 --- a/arch/arc/include/asm/entry-compact.h +++ b/arch/arc/include/asm/entry-compact.h @@ -170,12 +170,13 @@ PUSHAX erbta lr r10, [ecr] - st r10, [sp, PT_event]/* EV_Trap expects r10 to have ECR */ + st r10, [sp, PT_event] #ifdef CONFIG_ARC_CURR_IN_REG /* gp already saved on stack: now load with "current" */ GET_CURR_TASK_ON_CPU gp #endif + ; OUTPUT: r10 has ECR expected by EV_Trap .endm /*-- diff --git a/arch/arc/include/asm/ptrace.h b/arch/arc/include/asm/ptrace.h index e9798f46cdc4..2bf8ea96ea21 100644 --- a/arch/arc/include/asm/ptrace.h +++ b/arch/arc/include/asm/ptrace.h @@ -75,7 +75,7 @@ struct pt_regs { unsigned long event; }; - unsigned long bta; /* bta_l1, bta_l2, erbta */ + unsigned long bta; /* erbta */ unsigned long r26; /* gp */ unsigned long fp; diff --git a/arch/arc/kernel/asm-offsets.c b/arch/arc/kernel/asm-offsets.c index 5b47d09b925e..e46688975868 100644 --- a/arch/arc/kernel/asm-offsets.c +++ b/arch/arc/kernel/asm-offsets.c @@ -47,6 +47,7 @@ int main(void) DEFINE(PT_status32, offsetof(struct pt_regs, status32)); DEFINE(PT_event, offsetof(struct pt_regs, event)); + DEFINE(PT_bta, offsetof(struct pt_regs, bta)); DEFINE(PT_sp, offsetof(struct pt_regs, sp)); DEFINE(PT_r0, offsetof(struct pt_regs, r0)); DEFINE(PT_r1, offsetof(struct pt_regs, r1)); diff --git a/arch/arc/kernel/entry.S b/arch/arc/kernel/entry.S index cd26e0fa5044..f291fc8476d7 100644 --- a/arch/arc/kernel/entry.S +++ b/arch/arc/k
[PATCH 19/20] ARCv2: entry: rearrange pt_regs slightly
Instead of r26,fp,sp,r12,r30 order as fp,r30,r12,r26,sp - keeps SP at well known position (right abive hardware autosave) - r26,r12 saved specifically for ARCv2 (and not in ARCv3) kept closer for easy ifdef'ry later Signed-off-by: Vineet Gupta --- arch/arc/include/asm/entry-arcv2.h | 12 ++-- arch/arc/include/asm/ptrace.h | 9 + arch/arc/kernel/asm-offsets.c | 7 --- 3 files changed, 15 insertions(+), 13 deletions(-) diff --git a/arch/arc/include/asm/entry-arcv2.h b/arch/arc/include/asm/entry-arcv2.h index a030eae93d35..4d13320e0c1b 100644 --- a/arch/arc/include/asm/entry-arcv2.h +++ b/arch/arc/include/asm/entry-arcv2.h @@ -149,10 +149,10 @@ */ .macro __SAVE_REGFILE_SOFT - ST2 gp, fp, PT_r26 ; gp (r26), fp (r27) - - st r12, [sp, PT_r12] + st fp, [sp, PT_fp]; r27 st r30, [sp, PT_r30] + st r12, [sp, PT_r12] + st r26, [sp, PT_r26] ; gp ; Saving pt_regs->sp correctly requires some extra work due to the way ; Auto stack switch works @@ -187,10 +187,10 @@ /**/ .macro __RESTORE_REGFILE_SOFT - LD2 gp, fp, PT_r26 ; gp (r26), fp (r27) - - ld r12, [sp, PT_r12] + ld fp, [sp, PT_fp] ld r30, [sp, PT_r30] + ld r12, [sp, PT_r12] + ld r26, [sp, PT_r26] ; Restore SP (into AUX_USER_SP) only if returning to U mode ; - for K mode, it will be implicitly restored as stack is unwound diff --git a/arch/arc/include/asm/ptrace.h b/arch/arc/include/asm/ptrace.h index 2bf8ea96ea21..3a054b695f28 100644 --- a/arch/arc/include/asm/ptrace.h +++ b/arch/arc/include/asm/ptrace.h @@ -77,11 +77,10 @@ struct pt_regs { unsigned long bta; /* erbta */ - unsigned long r26; /* gp */ unsigned long fp; - unsigned long sp; /* user/kernel sp depending on where we came from */ - - unsigned long r12, r30; + unsigned long r30; + unsigned long r12; + unsigned long r26; /* gp */ #ifdef CONFIG_ARC_HAS_ACCL_REGS unsigned long r58, r59; /* ACCL/ACCH used by FPU / DSP MPY */ @@ -90,6 +89,8 @@ struct pt_regs { unsigned long DSP_CTRL; #endif + unsigned long sp; /* user/kernel sp depending on entry */ + /*--- Below list auto saved by h/w ---*/ unsigned long r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11; diff --git a/arch/arc/kernel/asm-offsets.c b/arch/arc/kernel/asm-offsets.c index e46688975868..478768c88f46 100644 --- a/arch/arc/kernel/asm-offsets.c +++ b/arch/arc/kernel/asm-offsets.c @@ -62,11 +62,9 @@ int main(void) DEFINE(PT_r26, offsetof(struct pt_regs, r26)); DEFINE(PT_ret, offsetof(struct pt_regs, ret)); DEFINE(PT_blink, offsetof(struct pt_regs, blink)); + OFFSET(PT_fp, pt_regs, fp); DEFINE(PT_lpe, offsetof(struct pt_regs, lp_end)); DEFINE(PT_lpc, offsetof(struct pt_regs, lp_count)); - DEFINE(SZ_CALLEE_REGS, sizeof(struct callee_regs)); - DEFINE(SZ_PT_REGS, sizeof(struct pt_regs)); - #ifdef CONFIG_ISA_ARCV2 OFFSET(PT_r12, pt_regs, r12); OFFSET(PT_r30, pt_regs, r30); @@ -79,5 +77,8 @@ int main(void) OFFSET(PT_DSP_CTRL, pt_regs, DSP_CTRL); #endif + DEFINE(SZ_CALLEE_REGS, sizeof(struct callee_regs)); + DEFINE(SZ_PT_REGS, sizeof(struct pt_regs)); + return 0; } -- 2.34.1 ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
[PATCH 00/20] ARC updates
Hi, This is a pile of miscll improvements/updates sitting in one of my local trees. Given the recent warning fix, we coudl also push them out. @Alexey, @Shahab: care to give these a spin on hsdk (and test ARC700 build/boot on nSIM if possible). Thx, -Vineet Vineet Gupta (20): ARC: uaccess: remove arc specific out-of-line handles for -Os ARC: uaccess: use optimized generic __strnlen_user/__strncpy_from_user ARC: uaccess: elide unaliged handling if hardware supports ARCv2: memset: don't prefetch for len == 0 which happens a alot ARC: boot log: eliminate struct cpuinfo_arc #1: mm ARC: boot log: eliminate struct cpuinfo_arc #2: cache ARC: boot log: eliminate struct cpuinfo_arc #3: don't export ARC: boot log: eliminate struct cpuinfo_arc #4: boot log per ISA ARC: entry: use gp to cache task pointer (vs. r25) ARC: kernel stack: INIT_THREAD need not setup @init_stack in @ksp ARC: __switch_to: asm with dwarf ops (vs. inline asm) ARC: __switch_to: move ksp to thread_info from thread_struct ARC: entry: rework (non-functional) ARC: entry: ARcompact EV_ProtV to use r10 directly ARC: entry: EV_MachineCheck dont re-read ECR ARC: entry: Add more common chores to EXCEPTION_PROLOGUE ARC: entry: replace 8 byte OR with 4 byte BSET ARC: entry: replace 8 byte ADD.ne with 4 byte ADD2.ne ARCv2: entry: rearrange pt_regs slightly ARC: pt_regs: create seperate type for ecr arch/arc/Kconfig | 8 +- arch/arc/Makefile| 6 +- arch/arc/include/asm/arcregs.h | 99 ++--- arch/arc/include/asm/current.h | 2 +- arch/arc/include/asm/dwarf.h | 32 +- arch/arc/include/asm/entry-arcv2.h | 66 ++-- arch/arc/include/asm/entry-compact.h | 50 ++- arch/arc/include/asm/entry.h | 107 ++--- arch/arc/include/asm/processor.h | 7 +- arch/arc/include/asm/ptrace.h| 62 ++- arch/arc/include/asm/setup.h | 6 +- arch/arc/include/asm/thread_info.h | 10 +- arch/arc/include/asm/uaccess.h | 21 +- arch/arc/kernel/Makefile | 9 +- arch/arc/kernel/asm-offsets.c| 14 +- arch/arc/kernel/ctx_sw.c | 112 -- arch/arc/kernel/ctx_sw_asm.S | 76 ++-- arch/arc/kernel/entry-arcv2.S| 15 - arch/arc/kernel/entry-compact.S | 16 +- arch/arc/kernel/entry.S | 70 ++-- arch/arc/kernel/kgdb.c | 2 +- arch/arc/kernel/mcip.c | 2 - arch/arc/kernel/process.c| 17 +- arch/arc/kernel/ptrace.c | 8 +- arch/arc/kernel/setup.c | 561 --- arch/arc/kernel/traps.c | 4 +- arch/arc/kernel/troubleshoot.c | 13 +- arch/arc/lib/memset-archs.S | 3 +- arch/arc/mm/cache.c | 171 +++- arch/arc/mm/extable.c| 11 - arch/arc/mm/fault.c | 6 +- arch/arc/mm/tlb.c| 94 ++--- 32 files changed, 667 insertions(+), 1013 deletions(-) delete mode 100644 arch/arc/kernel/ctx_sw.c -- 2.34.1 ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
[PATCH 09/20] ARC: entry: use gp to cache task pointer (vs. r25)
The motivation is eventual ABI considerations for ARCv3 but even without it this change us worthwhile as diffstat reduces 100 net lines r25 is a callee saved register, normally not saved by entry code in pt_regs. However because of its usage in CONFIG_ARC_CURR_IN_REG it needs to be. This in turn requires a whole bunch of special casing when we need to access r25. Then there is distinction between user mode r25 vs. kernel mode r25 - hence distinct SAVE_CALLEE_SAVED_{USER,KERNEL} Instead use gp which is a scratch register and thus saved already in entry code. This cleans things up significantly and much nocer on eyes: - SAVE_CALLEE_SAVED_{USER,KERNEL} are now exactly same - no special user_r25 slot in pt_reggs Note that typical global asm registers are callee-saved (r25), but gp is not callee-saved thus needs additional -ffixed- toggle Signed-off-by: Vineet Gupta --- arch/arc/Kconfig | 6 +- arch/arc/Makefile| 6 +- arch/arc/include/asm/current.h | 2 +- arch/arc/include/asm/entry-arcv2.h | 17 ++--- arch/arc/include/asm/entry-compact.h | 35 +++-- arch/arc/include/asm/entry.h | 107 --- arch/arc/include/asm/ptrace.h| 6 +- arch/arc/kernel/asm-offsets.c| 2 - arch/arc/kernel/ctx_sw.c | 13 +--- arch/arc/kernel/ctx_sw_asm.S | 2 +- arch/arc/kernel/entry.S | 3 +- arch/arc/kernel/process.c| 11 --- arch/arc/kernel/ptrace.c | 2 - 13 files changed, 58 insertions(+), 154 deletions(-) diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig index 47b4acc7d0c9..c92bacc1ff4c 100644 --- a/arch/arc/Kconfig +++ b/arch/arc/Kconfig @@ -492,11 +492,11 @@ config ARC_KVADDR_SIZE kernel-user gutter) config ARC_CURR_IN_REG - bool "Dedicate Register r25 for current_task pointer" + bool "cache current task pointer in gp" default y help - This reserved Register R25 to point to Current Task in - kernel mode. This saves memory access for each such access + This reserves gp register to point to Current Task in + kernel mode eliding memory access for each access config ARC_EMUL_UNALIGNED diff --git a/arch/arc/Makefile b/arch/arc/Makefile index 329400a1c355..2390dd042e36 100644 --- a/arch/arc/Makefile +++ b/arch/arc/Makefile @@ -28,14 +28,14 @@ cflags-y+= $(tune-mcpu-def-y) endif endif - ifdef CONFIG_ARC_CURR_IN_REG # For a global register definition, make sure it gets passed to every file # We had a customer reported bug where some code built in kernel was NOT using -# any kernel headers, and missing the r25 global register +# any kernel headers, and missing the global register # Can't do unconditionally because of recursive include issues # due to LINUXINCLUDE += -include $(srctree)/arch/arc/include/asm/current.h +cflags-y += -ffixed-gp endif cflags-y += -fsection-anchors @@ -67,7 +67,7 @@ cflags-$(CONFIG_ARC_DW2_UNWIND) += -fasynchronous-unwind-tables $(cfi) # small data is default for elf32 tool-chain. If not usable, disable it # This also allows repurposing GP as scratch reg to gcc reg allocator disable_small_data := y -cflags-$(disable_small_data) += -mno-sdata -fcall-used-gp +cflags-$(disable_small_data) += -mno-sdata cflags-$(CONFIG_CPU_BIG_ENDIAN)+= -mbig-endian ldflags-$(CONFIG_CPU_BIG_ENDIAN) += -EB diff --git a/arch/arc/include/asm/current.h b/arch/arc/include/asm/current.h index 9b9bdd3e6538..06be89f6f2f0 100644 --- a/arch/arc/include/asm/current.h +++ b/arch/arc/include/asm/current.h @@ -13,7 +13,7 @@ #ifdef CONFIG_ARC_CURR_IN_REG -register struct task_struct *curr_arc asm("r25"); +register struct task_struct *curr_arc asm("gp"); #define current (curr_arc) #else diff --git a/arch/arc/include/asm/entry-arcv2.h b/arch/arc/include/asm/entry-arcv2.h index 0ff4c0610561..858742feab71 100644 --- a/arch/arc/include/asm/entry-arcv2.h +++ b/arch/arc/include/asm/entry-arcv2.h @@ -18,7 +18,6 @@ * | orig_r0 | * | event/ECR| * | bta | - * | user_r25 | * | gp | * | fp | * | sp | @@ -56,7 +55,7 @@ ; hardware does even if CONFIG_ARC_IRQ_NO_AUTOSAVE ; 4. Auto save: (optional) r0-r11, blink, LPE,LPS,LPC, JLI,LDI,EI ; - ; (B) Manually saved some regs: r12,r25,r30, sp,fp,gp, ACCL pair + ; (B) Manually saved some regs: r12,r30, sp,fp,gp, ACCL pair #ifdef CONFIG_ARC_IRQ_NO_AUTOSAVE ; carve pt_regs on stack (case #3), PC/STAT32 already on stack @@ -157,17 +156,17 @@ st r10, [sp, PT_sp]; SP (pt_regs->sp) -#ifdef
[PATCH 15/20] ARC: entry: EV_MachineCheck dont re-read ECR
Signed-off-by: Vineet Gupta --- arch/arc/kernel/entry.S | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/arch/arc/kernel/entry.S b/arch/arc/kernel/entry.S index f291fc8476d7..46582fbebcf2 100644 --- a/arch/arc/kernel/entry.S +++ b/arch/arc/kernel/entry.S @@ -95,16 +95,15 @@ END(instr_service) ENTRY(EV_MachineCheck) - EXCEPTION_PROLOGUE + EXCEPTION_PROLOGUE ; ECR returned in r10 - lr r2, [ecr] lr r0, [efa] mov r1, sp ; MC excpetions disable MMU ARC_MMU_REENABLE r3 - lsr r3, r2, 8 + lsr r3, r10, 8 bmskr3, r3, 7 brner3, ECR_C_MCHK_DUP_TLB, 1f -- 2.34.1 ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
[PATCH 07/20] ARC: boot log: eliminate struct cpuinfo_arc #3: don't export
Signed-off-by: Vineet Gupta --- arch/arc/include/asm/arcregs.h | 2 -- arch/arc/kernel/mcip.c | 2 -- 2 files changed, 4 deletions(-) diff --git a/arch/arc/include/asm/arcregs.h b/arch/arc/include/asm/arcregs.h index cb1ad1bb4ece..160ee3fab1bd 100644 --- a/arch/arc/include/asm/arcregs.h +++ b/arch/arc/include/asm/arcregs.h @@ -384,8 +384,6 @@ struct cpuinfo_arc { struct bcr_mpy extn_mpy; }; -extern struct cpuinfo_arc cpuinfo_arc700[]; - static inline int is_isa_arcv2(void) { return IS_ENABLED(CONFIG_ISA_ARCV2); diff --git a/arch/arc/kernel/mcip.c b/arch/arc/kernel/mcip.c index f9fdb557c263..55373ca0d28b 100644 --- a/arch/arc/kernel/mcip.c +++ b/arch/arc/kernel/mcip.c @@ -165,8 +165,6 @@ static void mcip_probe_n_setup(void) IS_AVAIL1(mp.idu, "IDU "), IS_AVAIL1(mp.dbg, "DEBUG "), IS_AVAIL1(mp.gfrc, "GFRC")); - - cpuinfo_arc700[0].extn.gfrc = mp.gfrc; } struct plat_smp_ops plat_smp_ops = { -- 2.34.1 ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
[PATCH 11/20] ARC: __switch_to: asm with dwarf ops (vs. inline asm)
__switch_to() is final step of context switch, swapping kernel modes stack (and callee regs) of outgoing task with next task. It is also the starting point of stack unwinging of a sleeping task and captures SP, FP, BLINK and the corresponding dwarf info. Back when dinosaurs still roamed around, ARC gas didn't support CFI pseudo ops and gcc was responsible for generating dwarf info. Thus it had to be written in "C" with inline asm to do the hand crafting of stack. The function prologue (and crucial saving of blink etc) was still gcc generated but not visible in code. Likewise dwarf info was missing. Now with modern tools, we can make things more obvious by writing the code in asm and adding approproate dwarf cfi pseudo ops. This is mostly non functional change, except for slight chnages to asm - ARCompact doesn't support MOV_S fp, sp, so we use MOV Signed-off-by: Vineet Gupta --- arch/arc/include/asm/dwarf.h | 32 +++ arch/arc/kernel/Makefile | 9 +-- arch/arc/kernel/ctx_sw.c | 103 --- arch/arc/kernel/ctx_sw_asm.S | 72 +--- 4 files changed, 61 insertions(+), 155 deletions(-) delete mode 100644 arch/arc/kernel/ctx_sw.c diff --git a/arch/arc/include/asm/dwarf.h b/arch/arc/include/asm/dwarf.h index 5f4de05bd4ee..a0d5ebe1bc3f 100644 --- a/arch/arc/include/asm/dwarf.h +++ b/arch/arc/include/asm/dwarf.h @@ -10,23 +10,31 @@ #ifdef ARC_DW2_UNWIND_AS_CFI -#define CFI_STARTPROC .cfi_startproc -#define CFI_ENDPROC.cfi_endproc -#define CFI_DEF_CFA.cfi_def_cfa -#define CFI_REGISTER .cfi_register -#define CFI_REL_OFFSET .cfi_rel_offset -#define CFI_UNDEFINED .cfi_undefined +#define CFI_STARTPROC .cfi_startproc +#define CFI_ENDPROC.cfi_endproc +#define CFI_DEF_CFA.cfi_def_cfa +#define CFI_DEF_CFA_OFFSET .cfi_def_cfa_offset +#define CFI_DEF_CFA_REGISTER .cfi_def_cfa_register +#define CFI_OFFSET .cfi_offset +#define CFI_REL_OFFSET .cfi_rel_offset +#define CFI_REGISTER .cfi_register +#define CFI_RESTORE.cfi_restore +#define CFI_UNDEFINED .cfi_undefined #else #define CFI_IGNORE # -#define CFI_STARTPROC CFI_IGNORE -#define CFI_ENDPROCCFI_IGNORE -#define CFI_DEF_CFACFI_IGNORE -#define CFI_REGISTER CFI_IGNORE -#define CFI_REL_OFFSET CFI_IGNORE -#define CFI_UNDEFINED CFI_IGNORE +#define CFI_STARTPROC CFI_IGNORE +#define CFI_ENDPROCCFI_IGNORE +#define CFI_DEF_CFACFI_IGNORE +#define CFI_DEF_CFA_OFFSET CFI_IGNORE +#define CFI_DEF_CFA_REGISTER CFI_IGNORE +#define CFI_OFFSET CFI_IGNORE +#define CFI_REL_OFFSET CFI_IGNORE +#define CFI_REGISTER CFI_IGNORE +#define CFI_RESTORECFI_IGNORE +#define CFI_UNDEFINED CFI_IGNORE #endif /* !ARC_DW2_UNWIND_AS_CFI */ diff --git a/arch/arc/kernel/Makefile b/arch/arc/kernel/Makefile index 0723d888ac44..95fbf9364c67 100644 --- a/arch/arc/kernel/Makefile +++ b/arch/arc/kernel/Makefile @@ -5,6 +5,8 @@ obj-y := head.o arcksyms.o setup.o irq.o reset.o ptrace.o process.o devtree.o obj-y += signal.o traps.o sys.o troubleshoot.o stacktrace.o disasm.o +obj-y += ctx_sw_asm.o + obj-$(CONFIG_ISA_ARCOMPACT)+= entry-compact.o intc-compact.o obj-$(CONFIG_ISA_ARCV2)+= entry-arcv2.o intc-arcv2.o @@ -24,11 +26,4 @@ ifdef CONFIG_ISA_ARCOMPACT CFLAGS_fpu.o += -mdpfp endif -ifdef CONFIG_ARC_DW2_UNWIND -CFLAGS_ctx_sw.o += -fno-omit-frame-pointer -obj-y += ctx_sw.o -else -obj-y += ctx_sw_asm.o -endif - extra-y := vmlinux.lds diff --git a/arch/arc/kernel/ctx_sw.c b/arch/arc/kernel/ctx_sw.c deleted file mode 100644 index 40d89440b7e4.. --- a/arch/arc/kernel/ctx_sw.c +++ /dev/null @@ -1,103 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com) - * - * Vineetg: Aug 2009 - * -"C" version of lowest level context switch asm macro called by schedular - * gcc doesn't generate the dward CFI info for hand written asm, hence can't - * backtrace out of it (e.g. tasks sleeping in kernel). - * So we cheat a bit by writing almost similar code in inline-asm. - * -This is a hacky way of doing things, but there is no other simple way. - * I don't want/intend to extend unwinding code to understand raw asm - */ - -#include -#include -#include - -#define KSP_WORD_OFF ((TASK_THREAD + THREAD_KSP) / 4) - -struct task_struct *__sched -__switch_to(struct task_struct *prev_task, struct task_struct *next_task) -{ - unsigned int tmp; - unsigned int prev = (unsigned int)prev_task; - unsigned int next = (unsigned int)next_task; - - __asm__ __volatile__( - /* FP/BLINK save generated by gcc (standard function prologue */ - "st.ar13, [sp, -4] \n\t" - "st.ar14, [s
[PATCH 16/20] ARC: entry: Add more common chores to EXCEPTION_PROLOGUE
THe high level structure of most ARC exception handlers is 1. save regfile with EXCEPTION_PROLOGUE 2. setup r0: EFA (not part of pt_regs) 3. setup r1: pointer to pt_regs (SP) 4. drop down to pure kernel mode (from exception) 5. call the Linux "C" handler Remove the boiler plate code by moving #2, #3, #4 into #1. The exceptions to most exceptions are syscall Trap and Machine check which don't do some of above for various reasons, so call a newly introduced variant EXCEPTION_PROLOGUE_KEEP_AE (same as original EXCEPTION_PROLOGUE) Signed-off-by: Vineet Gupta --- arch/arc/include/asm/entry-arcv2.h | 12 +++- arch/arc/include/asm/entry-compact.h | 12 +++- arch/arc/kernel/entry-arcv2.S| 15 --- arch/arc/kernel/entry-compact.S | 10 -- arch/arc/kernel/entry.S | 19 ++- 5 files changed, 24 insertions(+), 44 deletions(-) diff --git a/arch/arc/include/asm/entry-arcv2.h b/arch/arc/include/asm/entry-arcv2.h index a38ed505b3de..11b48ab39154 100644 --- a/arch/arc/include/asm/entry-arcv2.h +++ b/arch/arc/include/asm/entry-arcv2.h @@ -75,7 +75,7 @@ .endm /**/ -.macro EXCEPTION_PROLOGUE +.macro EXCEPTION_PROLOGUE_KEEP_AE ; Before jumping to Exception Vector, hardware micro-ops did following: ; 1. SP auto-switched to kernel mode stack @@ -104,6 +104,16 @@ ; OUTPUT: r10 has ECR expected by EV_Trap .endm +.macro EXCEPTION_PROLOGUE + + EXCEPTION_PROLOGUE_KEEP_AE ; return ECR in r10 + + lr r0, [efa] + mov r1, sp + + FAKE_RET_FROM_EXCPN ; clobbers r9 +.endm + /* * This macro saves the registers manually which would normally be autosaved * by hardware on taken interrupts. It is used by diff --git a/arch/arc/include/asm/entry-compact.h b/arch/arc/include/asm/entry-compact.h index 4e2ae82779ed..a0e760eb35a8 100644 --- a/arch/arc/include/asm/entry-compact.h +++ b/arch/arc/include/asm/entry-compact.h @@ -140,7 +140,7 @@ * * After this it is safe to call the "C" handlers *-*/ -.macro EXCEPTION_PROLOGUE +.macro EXCEPTION_PROLOGUE_KEEP_AE /* Need at least 1 reg to code the early exception prologue */ PROLOG_FREEUP_REG r9, @ex_saved_reg1 @@ -179,6 +179,16 @@ ; OUTPUT: r10 has ECR expected by EV_Trap .endm +.macro EXCEPTION_PROLOGUE + + EXCEPTION_PROLOGUE_KEEP_AE ; return ECR in r10 + + lr r0, [efa] + mov r1, sp + + FAKE_RET_FROM_EXCPN ; clobbers r9 +.endm + /*-- * Restore all registers used by system call or Exceptions * SP should always be pointing to the next free stack element diff --git a/arch/arc/kernel/entry-arcv2.S b/arch/arc/kernel/entry-arcv2.S index a7e6a2174187..2e49c81c8086 100644 --- a/arch/arc/kernel/entry-arcv2.S +++ b/arch/arc/kernel/entry-arcv2.S @@ -125,11 +125,6 @@ ENTRY(mem_service) EXCEPTION_PROLOGUE - lr r0, [efa] - mov r1, sp - - FAKE_RET_FROM_EXCPN - bl do_memory_error b ret_from_exception END(mem_service) @@ -138,11 +133,6 @@ ENTRY(EV_Misaligned) EXCEPTION_PROLOGUE - lr r0, [efa] ; Faulting Data address - mov r1, sp - - FAKE_RET_FROM_EXCPN - SAVE_CALLEE_SAVED_USER mov r2, sp ; callee_regs @@ -163,11 +153,6 @@ ENTRY(EV_TLBProtV) EXCEPTION_PROLOGUE - lr r0, [efa] ; Faulting Data address - mov r1, sp ; pt_regs - - FAKE_RET_FROM_EXCPN - mov blink, ret_from_exception b do_page_fault diff --git a/arch/arc/kernel/entry-compact.S b/arch/arc/kernel/entry-compact.S index 77f0090554c5..c218285cff87 100644 --- a/arch/arc/kernel/entry-compact.S +++ b/arch/arc/kernel/entry-compact.S @@ -256,16 +256,6 @@ ENTRY(EV_TLBProtV) EXCEPTION_PROLOGUE ; ECR returned in r10 - lr r0, [efa] ; Faulting Data address (not part of pt_regs saved above) - - ; Exception auto-disables further Intr/exceptions. - ; Re-enable them by pretending to return from exception - ; (so rest of handler executes in pure K mode) - - FAKE_RET_FROM_EXCPN - - mov r1, sp; Handle to pt_regs - ;-- (5) Type of Protection Violation? -- ; ; ProtV Hardware Exception is triggered for Access Faults of 2 types diff --git a/arch/arc/kernel/entry.S b/arch/arc/kernel/entry.S index 46582fbebcf2..089f6680518f 100644 --- a/arch/arc/kernel/entry.S +++ b/arch/arc/kernel/entry.S @@ -80,11 +80,6 @@ ENTRY(instr_service) EXCEPTION_PROLOGUE - lr r0, [efa] - mov r1, sp - - FAKE_RET_FROM_EXCPN - bl do_insterror_or_kprobe b ret_from_exc
[PATCH 06/20] ARC: boot log: eliminate struct cpuinfo_arc #2: cache
Signed-off-by: Vineet Gupta --- arch/arc/include/asm/arcregs.h | 37 ++- arch/arc/include/asm/setup.h | 1 - arch/arc/kernel/setup.c| 3 +- arch/arc/mm/cache.c| 171 - 4 files changed, 97 insertions(+), 115 deletions(-) diff --git a/arch/arc/include/asm/arcregs.h b/arch/arc/include/asm/arcregs.h index af00cbe9b850..cb1ad1bb4ece 100644 --- a/arch/arc/include/asm/arcregs.h +++ b/arch/arc/include/asm/arcregs.h @@ -206,6 +206,38 @@ struct bcr_mmu_4 { #endif }; +struct bcr_cache { +#ifdef CONFIG_CPU_BIG_ENDIAN + unsigned int pad:12, line_len:4, sz:4, config:4, ver:8; +#else + unsigned int ver:8, config:4, sz:4, line_len:4, pad:12; +#endif +}; + +struct bcr_slc_cfg { +#ifdef CONFIG_CPU_BIG_ENDIAN + unsigned int pad:24, way:2, lsz:2, sz:4; +#else + unsigned int sz:4, lsz:2, way:2, pad:24; +#endif +}; + +struct bcr_clust_cfg { +#ifdef CONFIG_CPU_BIG_ENDIAN + unsigned int pad:7, c:1, num_entries:8, num_cores:8, ver:8; +#else + unsigned int ver:8, num_cores:8, num_entries:8, c:1, pad:7; +#endif +}; + +struct bcr_volatile { +#ifdef CONFIG_CPU_BIG_ENDIAN + unsigned int start:4, limit:4, pad:22, order:1, disable:1; +#else + unsigned int disable:1, order:1, pad:22, limit:4, start:4; +#endif +}; + struct bcr_mpy { #ifdef CONFIG_CPU_BIG_ENDIAN unsigned int pad:8, x1616:8, dsp:4, cycles:2, type:2, ver:8; @@ -328,10 +360,6 @@ struct bcr_generic { * Generic structures to hold build configuration used at runtime */ -struct cpuinfo_arc_cache { - unsigned int sz_k:14, line_len:8, assoc:4, alias:1, vipt:1, pad:4; -}; - struct cpuinfo_arc_bpu { unsigned int ver, full, num_cache, num_pred, ret_stk; }; @@ -341,7 +369,6 @@ struct cpuinfo_arc_ccm { }; struct cpuinfo_arc { - struct cpuinfo_arc_cache icache, dcache, slc; struct cpuinfo_arc_bpu bpu; struct bcr_identity core; struct bcr_isa_arcv2 isa; diff --git a/arch/arc/include/asm/setup.h b/arch/arc/include/asm/setup.h index 76443f198778..4c0bacd0ff5c 100644 --- a/arch/arc/include/asm/setup.h +++ b/arch/arc/include/asm/setup.h @@ -39,7 +39,6 @@ extern char *arc_mmu_mumbojumbo(int cpu_id, char *buf, int len); extern void arc_cache_init(void); extern char *arc_cache_mumbojumbo(int cpu_id, char *buf, int len); -extern void read_decode_cache_bcr(void); extern void __init handle_uboot_args(void); diff --git a/arch/arc/kernel/setup.c b/arch/arc/kernel/setup.c index 094461540f8a..3ea834941c1f 100644 --- a/arch/arc/kernel/setup.c +++ b/arch/arc/kernel/setup.c @@ -186,8 +186,6 @@ static void read_arc_build_cfg_regs(void) /* Read CCM BCRs for boot reporting even if not enabled in Kconfig */ read_decode_ccm_bcr(cpu); - read_decode_cache_bcr(); - if (is_isa_arcompact()) { struct bcr_fp_arcompact sp, dp; struct bcr_bpu_arcompact bpu; @@ -463,6 +461,7 @@ void setup_processor(void) pr_info("%s", arc_cpu_mumbojumbo(cpu_id, str, sizeof(str))); pr_info("%s", arc_mmu_mumbojumbo(cpu_id, str, sizeof(str))); + pr_info("%s", arc_cache_mumbojumbo(cpu_id, str, sizeof(str))); arc_mmu_init(); arc_cache_init(); diff --git a/arch/arc/mm/cache.c b/arch/arc/mm/cache.c index bdaa4aa40947..7197bb845a40 100644 --- a/arch/arc/mm/cache.c +++ b/arch/arc/mm/cache.c @@ -28,6 +28,10 @@ int slc_enable = 1, ioc_enable = 1; unsigned long perip_base = ARC_UNCACHED_ADDR_SPACE; /* legacy value for boot */ unsigned long perip_end = 0x; /* legacy value */ +static struct cpuinfo_arc_cache { + unsigned int sz_k, line_len, colors; +} ic_info, dc_info, slc_info; + void (*_cache_line_loop_ic_fn)(phys_addr_t paddr, unsigned long vaddr, unsigned long sz, const int op, const int full_page); @@ -35,78 +39,24 @@ void (*__dma_cache_wback_inv)(phys_addr_t start, unsigned long sz); void (*__dma_cache_inv)(phys_addr_t start, unsigned long sz); void (*__dma_cache_wback)(phys_addr_t start, unsigned long sz); -char *arc_cache_mumbojumbo(int c, char *buf, int len) +static char *read_decode_cache_bcr_arcv2(int c, char *buf, int len) { - int n = 0; - struct cpuinfo_arc_cache *p; - -#define PR_CACHE(p, cfg, str) \ - if (!(p)->line_len) \ - n += scnprintf(buf + n, len - n, str"\t\t: N/A\n"); \ - else\ - n += scnprintf(buf + n, len - n,\ - str"\t\t: %uK, %dway/set, %uB Line, %s%s%s\n", \ - (p)->sz_k, (p)->assoc, (p)->line_len, \ - (p)->vipt ? "VIPT" : "PIPT",\ - (p)-
[PATCH 04/20] ARCv2: memset: don't prefetch for len == 0 which happens a alot
This avoids potential "bleeding" when size == 0 as cache line would be dirtied (and possibly fetched from other cores) and due to the same reaons more optimal too. Signed-off-by: Vineet Gupta --- arch/arc/lib/memset-archs.S | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arc/lib/memset-archs.S b/arch/arc/lib/memset-archs.S index d2e09fece5bc..d0a5cec4cdca 100644 --- a/arch/arc/lib/memset-archs.S +++ b/arch/arc/lib/memset-archs.S @@ -36,12 +36,13 @@ #endif ENTRY_CFI(memset) - PREFETCHW_INSTR r0, 0 ; Prefetch the first write location mov.f 0, r2 ;;; if size is zero jz.d[blink] mov r3, r0 ; don't clobber ret val + PREFETCHW_INSTR r0, 0 ; Prefetch the first write location + ;;; if length < 8 brls.d.nt r2, 8, .Lsmallchunk mov.f lp_count,r2 -- 2.34.1 ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
[PATCH 03/20] ARC: uaccess: elide unaliged handling if hardware supports
Signed-off-by: Vineet Gupta --- arch/arc/include/asm/uaccess.h | 10 ++ 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/arch/arc/include/asm/uaccess.h b/arch/arc/include/asm/uaccess.h index d2da159bb80a..1e8809ea000a 100644 --- a/arch/arc/include/asm/uaccess.h +++ b/arch/arc/include/asm/uaccess.h @@ -146,8 +146,9 @@ raw_copy_from_user(void *to, const void __user *from, unsigned long n) if (n == 0) return 0; - /* unaligned */ - if (((unsigned long)to & 0x3) || ((unsigned long)from & 0x3)) { + /* fallback for unaligned access when hardware doesn't support */ + if (!IS_ENABLED(CONFIG_ARC_USE_UNALIGNED_MEM_ACCESS) && +(((unsigned long)to & 0x3) || ((unsigned long)from & 0x3))) { unsigned char tmp; @@ -373,8 +374,9 @@ raw_copy_to_user(void __user *to, const void *from, unsigned long n) if (n == 0) return 0; - /* unaligned */ - if (((unsigned long)to & 0x3) || ((unsigned long)from & 0x3)) { + /* fallback for unaligned access when hardware doesn't support */ + if (!IS_ENABLED(CONFIG_ARC_USE_UNALIGNED_MEM_ACCESS) && +(((unsigned long)to & 0x3) || ((unsigned long)from & 0x3))) { unsigned char tmp; -- 2.34.1 ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
[PATCH 12/20] ARC: __switch_to: move ksp to thread_info from thread_struct
task's arch specific bits are carried in 2 places - embedded thread_struct in task_struct - associated thread_info (hoisted in task's stack page) and syntactically: (thread_info *)(task_struct->stack) ksp (dynamic kernel stack top) currently lives in thread_struct but given its deep location in task struct likely to cache miss when accessed from __switch_to(). Moving it to thread_info would be more efficient given proximity to frequently accessed items such as preempt_count thus very likely to be in cache, specially in schedular code. Note however that currently tsk.thread.ksp takes 1 memory access (off of tsk pointer) while new code tsk->stack.ksp would take 2, but likely to be in cache. Moreover if task is current the 2nd reference can be elided and instead derived from SP as (SP & ~(THREAD_SIZE - 1)) All of this also makes __switch_to() code simpler and we can see the 2 ways of retirving ksp (descrobed above) in new code. Signed-off-by: Vineet Gupta --- arch/arc/include/asm/processor.h | 3 +-- arch/arc/include/asm/thread_info.h | 10 +- arch/arc/kernel/asm-offsets.c | 2 +- arch/arc/kernel/ctx_sw_asm.S | 22 ++ arch/arc/kernel/process.c | 6 +++--- 5 files changed, 20 insertions(+), 23 deletions(-) diff --git a/arch/arc/include/asm/processor.h b/arch/arc/include/asm/processor.h index 82ddc929d6e7..d606658e2fe7 100644 --- a/arch/arc/include/asm/processor.h +++ b/arch/arc/include/asm/processor.h @@ -22,7 +22,6 @@ * struct thread_info */ struct thread_struct { - unsigned long ksp; /* kernel mode stack pointer */ unsigned long callee_reg; /* pointer to callee regs */ unsigned long fault_address;/* dbls as brkpt holder as well */ #ifdef CONFIG_ARC_DSP_SAVE_RESTORE_REGS @@ -54,7 +53,7 @@ struct task_struct; * Where about of Task's sp, fp, blink when it was last seen in kernel mode. * Look in process.c for details of kernel stack layout */ -#define TSK_K_ESP(tsk) (tsk->thread.ksp) +#define TSK_K_ESP(tsk) (task_thread_info(tsk)->ksp) #define TSK_K_REG(tsk, off)(*((unsigned long *)(TSK_K_ESP(tsk) + \ sizeof(struct callee_regs) + off))) diff --git a/arch/arc/include/asm/thread_info.h b/arch/arc/include/asm/thread_info.h index 6ba7fe417095..4c530cf131f3 100644 --- a/arch/arc/include/asm/thread_info.h +++ b/arch/arc/include/asm/thread_info.h @@ -37,16 +37,16 @@ */ struct thread_info { unsigned long flags;/* low level flags */ + unsigned long ksp; /* kernel mode stack top in __switch_to */ int preempt_count; /* 0 => preemptable, <0 => BUG */ - struct task_struct *task; /* main task structure */ - __u32 cpu; /* current CPU */ + int cpu;/* current CPU */ unsigned long thr_ptr; /* TLS ptr */ + struct task_struct *task; /* main task structure */ }; /* - * macros/functions for gaining access to the thread information structure - * - * preempt_count needs to be 1 initially, until the scheduler is functional. + * initilaize thread_info for any @tsk + * - this is not related to init_task per se */ #define INIT_THREAD_INFO(tsk) \ { \ diff --git a/arch/arc/kernel/asm-offsets.c b/arch/arc/kernel/asm-offsets.c index 37324fd9a72f..5b47d09b925e 100644 --- a/arch/arc/kernel/asm-offsets.c +++ b/arch/arc/kernel/asm-offsets.c @@ -20,13 +20,13 @@ int main(void) BLANK(); - DEFINE(THREAD_KSP, offsetof(struct thread_struct, ksp)); DEFINE(THREAD_CALLEE_REG, offsetof(struct thread_struct, callee_reg)); DEFINE(THREAD_FAULT_ADDR, offsetof(struct thread_struct, fault_address)); BLANK(); + DEFINE(THREAD_INFO_KSP, offsetof(struct thread_info, ksp)); DEFINE(THREAD_INFO_FLAGS, offsetof(struct thread_info, flags)); DEFINE(THREAD_INFO_PREEMPT_COUNT, offsetof(struct thread_info, preempt_count)); diff --git a/arch/arc/kernel/ctx_sw_asm.S b/arch/arc/kernel/ctx_sw_asm.S index 59d779004e64..48e1f21976ed 100644 --- a/arch/arc/kernel/ctx_sw_asm.S +++ b/arch/arc/kernel/ctx_sw_asm.S @@ -11,8 +11,6 @@ #include/* For the SAVE_* macros */ #include -#define KSP_WORD_OFF ((TASK_THREAD + THREAD_KSP) / 4) - ; IN ; - r0: prev task (also current) ; - r1: next task @@ -37,19 +35,19 @@ ENTRY_CFI(__switch_to) /* kernel mode callee regs of @prev */ SAVE_CALLEE_SAVED_KERNEL - /* save final SP to @prev->thread.ksp */ -#if KSP_WORD_OFF <= 255 - st.as sp, [r0, KSP_WORD_OFF] -#else - /* Workaround for NR_CPUS=4k as ST.as can only take s9 offset */ - add2r10, r0, KSP_WORD_OFF - st sp, [r10] -#endif + /* +* save final SP to @prev->
[PATCH 02/20] ARC: uaccess: use optimized generic __strnlen_user/__strncpy_from_user
The existing ARC variants have 2 issues - Use ZOL which may not be present in forthcoming architecture - Byte loop based vs. generic version which is word loop based Signed-off-by: Vineet Gupta --- arch/arc/Kconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig index 96cf8720bb93..47b4acc7d0c9 100644 --- a/arch/arc/Kconfig +++ b/arch/arc/Kconfig @@ -26,6 +26,8 @@ config ARC select GENERIC_PENDING_IRQ if SMP select GENERIC_SCHED_CLOCK select GENERIC_SMP_IDLE_THREAD + select GENERIC_STRNCPY_FROM_USER if MMU + select GENERIC_STRNLEN_USER if MMU select HAVE_ARCH_KGDB select HAVE_ARCH_TRACEHOOK select HAVE_ARCH_TRANSPARENT_HUGEPAGE if ARC_MMU_V4 -- 2.34.1 ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
[PATCH 10/20] ARC: kernel stack: INIT_THREAD need not setup @init_stack in @ksp
There are 2 pointers to kernel mode stack of a task - task_struct.stack: base address of stack page (max possible stack top) - thread_info.ksp : runtime stack top in __switch_to INIT_THREAD was setting up ksp to stack base which was not really needed - it would get overwritten with dynamic value on first call to __switch_to when init is switched out for the very first time. - generic code already does init_task.stack = init_stack and ARC code uses that to retrieve task's stack base. Signed-off-by: Vineet Gupta --- arch/arc/include/asm/processor.h | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/arch/arc/include/asm/processor.h b/arch/arc/include/asm/processor.h index fb844fce1ab6..82ddc929d6e7 100644 --- a/arch/arc/include/asm/processor.h +++ b/arch/arc/include/asm/processor.h @@ -33,9 +33,7 @@ struct thread_struct { #endif }; -#define INIT_THREAD { \ - .ksp = sizeof(init_stack) + (unsigned long) init_stack, \ -} +#define INIT_THREAD { } /* Forward declaration, a strange C thing */ struct task_struct; -- 2.34.1 ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
[PATCH 01/20] ARC: uaccess: remove arc specific out-of-line handles for -Os
Everything is now out-of-line in lib/usercopy.c Signed-off-by: Vineet Gupta --- arch/arc/include/asm/uaccess.h | 11 ++- arch/arc/mm/extable.c | 11 --- 2 files changed, 2 insertions(+), 20 deletions(-) diff --git a/arch/arc/include/asm/uaccess.h b/arch/arc/include/asm/uaccess.h index 99712471c96a..d2da159bb80a 100644 --- a/arch/arc/include/asm/uaccess.h +++ b/arch/arc/include/asm/uaccess.h @@ -584,7 +584,7 @@ raw_copy_to_user(void __user *to, const void *from, unsigned long n) return res; } -static inline unsigned long __arc_clear_user(void __user *to, unsigned long n) +static inline unsigned long __clear_user(void __user *to, unsigned long n) { long res = n; unsigned char *d_char = to; @@ -626,17 +626,10 @@ static inline unsigned long __arc_clear_user(void __user *to, unsigned long n) return res; } -#ifndef CONFIG_CC_OPTIMIZE_FOR_SIZE - #define INLINE_COPY_TO_USER #define INLINE_COPY_FROM_USER -#define __clear_user(d, n) __arc_clear_user(d, n) -#else -extern unsigned long arc_clear_user_noinline(void __user *to, - unsigned long n); -#define __clear_user(d, n) arc_clear_user_noinline(d, n) -#endif +#define __clear_user __clear_user #include diff --git a/arch/arc/mm/extable.c b/arch/arc/mm/extable.c index 4e14c4244ea2..88fa3a4d4906 100644 --- a/arch/arc/mm/extable.c +++ b/arch/arc/mm/extable.c @@ -22,14 +22,3 @@ int fixup_exception(struct pt_regs *regs) return 0; } - -#ifdef CONFIG_CC_OPTIMIZE_FOR_SIZE - -unsigned long arc_clear_user_noinline(void __user *to, - unsigned long n) -{ - return __arc_clear_user(to, n); -} -EXPORT_SYMBOL(arc_clear_user_noinline); - -#endif -- 2.34.1 ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [PATCH] ARC: -Wmissing-prototype warning fixes
On 8/13/23 12:18, Arnd Bergmann wrote: On Sun, Aug 13, 2023, at 21:16, Vineet Gupta wrote: Anrd reported [1] new compiler warnings due to -Wmissing-protype. These are for non static functions mostly used in asm code hence not exported already. Fix this by adding the prototypes. [1] https://lore.kernel.org/lkml/20230810141947.1236730-1-a...@kernel.org Signed-off-by: Vineet Gupta Looks good to me, Reviewed-by: Arnd Bergmann Thx, Arnd. Added to for-curr. -Vineet ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [PATCH] ARC: mm: retire support for aliasing VIPT D$
On 8/14/23 12:38, Andrew Morton wrote: On Sun, 13 Aug 2023 12:25:43 -0700 Vineet Gupta wrote: Legacy ARC700 processors (first generation of MMU enabled ARC cores) has VIPT cached which could be configured such that they could alias. I added the VIPT aliasing support, with all the cache flush overhead to support all but 1 silicon. That is long bygone and we can remove the complexity and maintenance burden of that unneeded code. This also helps streamline support for new features such as generic folio work. This of course messes up Matthew's "arc: implement the new page table range API". Are you or Matthew up for redoing that patch? Alternatively, can you redo this patch on top of Matthew's patch (ie, against mm-unstable or linux-next)? Yeah I'll let Matthew's code get merged and redo mine once that is upstream to avoid conflicts in transition. Thx, -Vineet ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
[PATCH] ARC: mm: retire support for aliasing VIPT D$
Legacy ARC700 processors (first generation of MMU enabled ARC cores) has VIPT cached which could be configured such that they could alias. I added the VIPT aliasing support, with all the cache flush overhead to support all but 1 silicon. That is long bygone and we can remove the complexity and maintenance burden of that unneeded code. This also helps streamline support for new features such as generic folio work. Signed-off-by: Vineet Gupta --- arch/arc/Kconfig | 5 -- arch/arc/include/asm/cacheflush.h | 43 -- arch/arc/mm/cache.c | 125 ++ arch/arc/mm/mmap.c| 21 + arch/arc/mm/tlb.c | 17 ++-- 5 files changed, 14 insertions(+), 197 deletions(-) diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig index 96cf8720bb93..a03da8391430 100644 --- a/arch/arc/Kconfig +++ b/arch/arc/Kconfig @@ -46,7 +46,6 @@ config ARC select OF select OF_EARLY_FLATTREE select PCI_SYSCALL if PCI - select PERF_USE_VMALLOC if ARC_CACHE_VIPT_ALIASING select HAVE_ARCH_JUMP_LABEL if ISA_ARCV2 && !CPU_ENDIAN_BE32 select TRACE_IRQFLAGS_SUPPORT @@ -229,10 +228,6 @@ config ARC_CACHE_PAGES Note that Global I/D ENABLE + Per Page DISABLE works but corollary Global DISABLE + Per Page ENABLE won't work -config ARC_CACHE_VIPT_ALIASING - bool "Support VIPT Aliasing D$" - depends on ARC_HAS_DCACHE && ISA_ARCOMPACT - endif #ARC_CACHE config ARC_HAS_ICCM diff --git a/arch/arc/include/asm/cacheflush.h b/arch/arc/include/asm/cacheflush.h index e201b4b1655a..077340ba641c 100644 --- a/arch/arc/include/asm/cacheflush.h +++ b/arch/arc/include/asm/cacheflush.h @@ -50,31 +50,10 @@ void dma_cache_wback(phys_addr_t start, unsigned long sz); #define flush_cache_dup_mm(mm) /* called on fork (VIVT only) */ -#ifndef CONFIG_ARC_CACHE_VIPT_ALIASING - #define flush_cache_mm(mm) /* called on munmap/exit */ #define flush_cache_range(mm, u_vstart, u_vend) #define flush_cache_page(vma, u_vaddr, pfn)/* PF handling/COW-break */ -#else /* VIPT aliasing dcache */ - -/* To clear out stale userspace mappings */ -void flush_cache_mm(struct mm_struct *mm); -void flush_cache_range(struct vm_area_struct *vma, - unsigned long start,unsigned long end); -void flush_cache_page(struct vm_area_struct *vma, - unsigned long user_addr, unsigned long page); - -/* - * To make sure that userspace mapping is flushed to memory before - * get_user_pages() uses a kernel mapping to access the page - */ -#define ARCH_HAS_FLUSH_ANON_PAGE -void flush_anon_page(struct vm_area_struct *vma, - struct page *page, unsigned long u_vaddr); - -#endif /* CONFIG_ARC_CACHE_VIPT_ALIASING */ - /* * A new pagecache page has PG_arch_1 clear - thus dcache dirty by default * This works around some PIO based drivers which don't call flush_dcache_page @@ -82,28 +61,6 @@ void flush_anon_page(struct vm_area_struct *vma, */ #define PG_dc_cleanPG_arch_1 -#define CACHE_COLORS_NUM 4 -#define CACHE_COLORS_MSK (CACHE_COLORS_NUM - 1) -#define CACHE_COLOR(addr) (((unsigned long)(addr) >> (PAGE_SHIFT)) & CACHE_COLORS_MSK) - -/* - * Simple wrapper over config option - * Bootup code ensures that hardware matches kernel configuration - */ -static inline int cache_is_vipt_aliasing(void) -{ - return IS_ENABLED(CONFIG_ARC_CACHE_VIPT_ALIASING); -} - -/* - * checks if two addresses (after page aligning) index into same cache set - */ -#define addr_not_cache_congruent(addr1, addr2) \ -({ \ - cache_is_vipt_aliasing() ? \ - (CACHE_COLOR(addr1) != CACHE_COLOR(addr2)) : 0; \ -}) - #define copy_to_user_page(vma, page, vaddr, dst, src, len) \ do { \ memcpy(dst, src, len); \ diff --git a/arch/arc/mm/cache.c b/arch/arc/mm/cache.c index bdaa4aa40947..e78c3070b517 100644 --- a/arch/arc/mm/cache.c +++ b/arch/arc/mm/cache.c @@ -45,10 +45,9 @@ char *arc_cache_mumbojumbo(int c, char *buf, int len) n += scnprintf(buf + n, len - n, str"\t\t: N/A\n"); \ else\ n += scnprintf(buf + n, len - n,\ - str"\t\t: %uK, %dway/set, %uB Line, %s%s%s\n", \ + str"\t\t: %uK, %dway/set, %uB Line, %s%s\n",\ (p)->sz_k, (p)->assoc, (p)->line_len, \ (p)->vipt ? "VIPT" : "PIPT",\ - (p)->alias ? " aliasi
[PATCH] ARC: -Wmissing-prototype warning fixes
Anrd reported [1] new compiler warnings due to -Wmissing-protype. These are for non static functions mostly used in asm code hence not exported already. Fix this by adding the prototypes. [1] https://lore.kernel.org/lkml/20230810141947.1236730-1-a...@kernel.org Signed-off-by: Vineet Gupta --- arch/arc/include/asm/entry.h | 21 + arch/arc/include/asm/irq.h| 1 + arch/arc/include/asm/mmu.h| 2 ++ arch/arc/include/asm/ptrace.h | 3 +++ arch/arc/include/asm/setup.h | 2 ++ arch/arc/include/asm/smp.h| 2 ++ arch/arc/kernel/ctx_sw.c | 2 +- arch/arc/kernel/devtree.c | 1 + arch/arc/kernel/intc-arcv2.c | 2 +- arch/arc/kernel/signal.c | 1 + arch/arc/kernel/smp.c | 7 --- arch/arc/kernel/stacktrace.c | 1 + arch/arc/kernel/traps.c | 1 + arch/arc/mm/cache.c | 8 arch/arc/mm/fault.c | 1 + arch/arc/mm/init.c| 1 + arch/arc/mm/tlb.c | 2 +- 17 files changed, 48 insertions(+), 10 deletions(-) diff --git a/arch/arc/include/asm/entry.h b/arch/arc/include/asm/entry.h index fcdd59d77f42..2980bc9b7653 100644 --- a/arch/arc/include/asm/entry.h +++ b/arch/arc/include/asm/entry.h @@ -13,6 +13,8 @@ #include /* For VMALLOC_START */ #include +#ifdef __ASSEMBLY__ + #ifdef CONFIG_ISA_ARCOMPACT #include /* ISA specific bits */ #else @@ -295,4 +297,23 @@ #endif /* CONFIG_ARC_CURR_IN_REG */ +#else /* !__ASSEMBLY__ */ + +extern void do_signal(struct pt_regs *); +extern void do_notify_resume(struct pt_regs *); +extern int do_privilege_fault(unsigned long, struct pt_regs *); +extern int do_extension_fault(unsigned long, struct pt_regs *); +extern int insterror_is_error(unsigned long, struct pt_regs *); +extern int do_memory_error(unsigned long, struct pt_regs *); +extern int trap_is_brkpt(unsigned long, struct pt_regs *); +extern int do_misaligned_error(unsigned long, struct pt_regs *); +extern int do_trap5_error(unsigned long, struct pt_regs *); +extern int do_misaligned_access(unsigned long, struct pt_regs *, struct callee_regs *); +extern void do_machine_check_fault(unsigned long, struct pt_regs *); +extern void do_non_swi_trap(unsigned long, struct pt_regs *); +extern void do_insterror_or_kprobe(unsigned long, struct pt_regs *); +extern void do_page_fault(unsigned long, struct pt_regs *); + +#endif + #endif /* __ASM_ARC_ENTRY_H */ diff --git a/arch/arc/include/asm/irq.h b/arch/arc/include/asm/irq.h index 0309cb405cfb..c574712ad865 100644 --- a/arch/arc/include/asm/irq.h +++ b/arch/arc/include/asm/irq.h @@ -25,5 +25,6 @@ #include extern void arc_init_IRQ(void); +extern void arch_do_IRQ(unsigned int, struct pt_regs *); #endif diff --git a/arch/arc/include/asm/mmu.h b/arch/arc/include/asm/mmu.h index ca427c30f70e..9febf5bc3de6 100644 --- a/arch/arc/include/asm/mmu.h +++ b/arch/arc/include/asm/mmu.h @@ -14,6 +14,8 @@ typedef struct { unsigned long asid[NR_CPUS];/* 8 bit MMU PID + Generation cycle */ } mm_context_t; +extern void do_tlb_overlap_fault(unsigned long, unsigned long, struct pt_regs *); + #endif #include diff --git a/arch/arc/include/asm/ptrace.h b/arch/arc/include/asm/ptrace.h index 5869a74c0db2..cf90fcd2a628 100644 --- a/arch/arc/include/asm/ptrace.h +++ b/arch/arc/include/asm/ptrace.h @@ -181,6 +181,9 @@ static inline unsigned long regs_get_register(struct pt_regs *regs, return *(unsigned long *)((unsigned long)regs + offset); } +extern int syscall_trace_entry(struct pt_regs *); +extern void syscall_trace_exit(struct pt_regs *); + #endif /* !__ASSEMBLY__ */ #endif /* __ASM_PTRACE_H */ diff --git a/arch/arc/include/asm/setup.h b/arch/arc/include/asm/setup.h index 028a8cf76206..374138832c5a 100644 --- a/arch/arc/include/asm/setup.h +++ b/arch/arc/include/asm/setup.h @@ -42,4 +42,6 @@ extern void arc_cache_init(void); extern char *arc_cache_mumbojumbo(int cpu_id, char *buf, int len); extern void read_decode_cache_bcr(void); +extern void __init handle_uboot_args(void); + #endif /* __ASMARC_SETUP_H */ diff --git a/arch/arc/include/asm/smp.h b/arch/arc/include/asm/smp.h index d856491606ac..e0913f52c2cd 100644 --- a/arch/arc/include/asm/smp.h +++ b/arch/arc/include/asm/smp.h @@ -29,6 +29,8 @@ extern void arch_send_call_function_ipi_mask(const struct cpumask *mask); extern void __init smp_init_cpus(void); extern void first_lines_of_secondary(void); extern const char *arc_platform_smp_cpuinfo(void); +extern void arc_platform_smp_wait_to_boot(int); +extern void start_kernel_secondary(void); /* * API expected BY platform smp code (FROM arch smp code) diff --git a/arch/arc/kernel/ctx_sw.c b/arch/arc/kernel/ctx_sw.c index 1a76f2d6f694..bf16f777a0bc 100644 --- a/arch/arc/kernel/ctx_sw.c +++ b/arch/arc/kernel/ctx_sw.c @@ -12,7 +12,7 @@ */ #include -#include +#include #include #define KSP_WORD_OFF ((TASK_THREAD + THREAD_KSP) / 4) diff --git a/arch/arc/kernel/devtree.c b/arch/arc/kernel/devtree.c index
Re: [PATCH 16/17] [RFC] arch: turn -Wmissing-prototypes off conditionally
On 8/10/23 19:33, Guo Ren wrote: Thx, Arnd, I will clean them up for the csky part. Likewise, I'll clean up ARC errors this weekend ! It seems most of therm are in the category you mentioned. Non static but only used by asm code. Thx, -Vineet ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [PATCH 13/21] arc: dma-mapping: skip invalidating before bidirectional DMA
CC Shahab On 3/27/23 17:43, Arnd Bergmann wrote: From: Arnd Bergmann Some architectures that need to invalidate buffers after bidirectional DMA because of speculative prefetching only do a simpler writeback before that DMA, while architectures that don't need to do the second invalidate tend to have a combined writeback+invalidate before the DMA. arc is one of the architectures that does both, which seems unnecessary. Change it to behave like arm/arm64/xtensa instead, and use just a writeback before the DMA when we do the invalidate afterwards. Signed-off-by: Arnd Bergmann Reviewed-by: Vineet Gupta Shahab can you give this a spin on hsdk - run glibc testsuite over ssh and make sure nothing strange happens. Thx, -Vineet ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [PATCH v2 06/30] arc: Implement the new page table range API
On 2/27/23 09:57, Matthew Wilcox (Oracle) wrote: Add set_ptes(), update_mmu_cache_range(), flush_dcache_folio() and flush_icache_pages(). Change the PG_dc_clean flag from being per-page to per-folio (which means it cannot always be set as we don't know that all pages in this folio were cleaned). Enhance the internal flush routines to take the number of pages to flush. Signed-off-by: Matthew Wilcox (Oracle) Cc: Vineet Gupta Cc: linux-snps-arc@lists.infradead.org --- arch/arc/include/asm/cacheflush.h | 7 +- arch/arc/include/asm/pgtable-bits-arcv2.h | 20 +++-- arch/arc/mm/cache.c | 61 -- arch/arc/mm/tlb.c | 18 +++-- You need to split ARC and ARM into separate patches. Also it'd be best to drop all the VIPT aliasing bits for ARC, they are a needless maintenance burden. I can send a patch which you could carry in your tree for easier logistics. -Vineet arch/arm/include/asm/cacheflush.h | 24 +++--- arch/arm/include/asm/pgtable.h| 5 +- arch/arm/include/asm/tlbflush.h | 13 +-- arch/arm/mm/copypage-v4mc.c | 5 +- arch/arm/mm/copypage-v6.c | 5 +- arch/arm/mm/copypage-xscale.c | 5 +- arch/arm/mm/dma-mapping.c | 24 +++--- arch/arm/mm/fault-armv.c | 14 ++-- arch/arm/mm/flush.c | 99 ++- arch/arm/mm/mm.h | 2 +- arch/arm/mm/mmu.c | 14 +++- 15 files changed, 193 insertions(+), 123 deletions(-) diff --git a/arch/arc/include/asm/cacheflush.h b/arch/arc/include/asm/cacheflush.h index e201b4b1655a..04f65f588510 100644 --- a/arch/arc/include/asm/cacheflush.h +++ b/arch/arc/include/asm/cacheflush.h @@ -25,17 +25,20 @@ * in update_mmu_cache() */ #define flush_icache_page(vma, page) +#define flush_icache_pages(vma, page, nr) void flush_cache_all(void); void flush_icache_range(unsigned long kstart, unsigned long kend); void __sync_icache_dcache(phys_addr_t paddr, unsigned long vaddr, int len); -void __inv_icache_page(phys_addr_t paddr, unsigned long vaddr); -void __flush_dcache_page(phys_addr_t paddr, unsigned long vaddr); +void __inv_icache_pages(phys_addr_t paddr, unsigned long vaddr, unsigned nr); +void __flush_dcache_pages(phys_addr_t paddr, unsigned long vaddr, unsigned nr); #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1 void flush_dcache_page(struct page *page); +void flush_dcache_folio(struct folio *folio); +#define flush_dcache_folio flush_dcache_folio void dma_cache_wback_inv(phys_addr_t start, unsigned long sz); void dma_cache_inv(phys_addr_t start, unsigned long sz); diff --git a/arch/arc/include/asm/pgtable-bits-arcv2.h b/arch/arc/include/asm/pgtable-bits-arcv2.h index 6e9f8ca6d6a1..4a1b2ce204c6 100644 --- a/arch/arc/include/asm/pgtable-bits-arcv2.h +++ b/arch/arc/include/asm/pgtable-bits-arcv2.h @@ -100,14 +100,24 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) return __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot)); } -static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, - pte_t *ptep, pte_t pteval) +static inline void set_ptes(struct mm_struct *mm, unsigned long addr, + pte_t *ptep, pte_t pte, unsigned int nr) { - set_pte(ptep, pteval); + for (;;) { + set_pte(ptep, pte); + if (--nr == 0) + break; + ptep++; + pte_val(pte) += PAGE_SIZE; + } } +#define set_pte_at(mm, addr, ptep, pte) set_ptes(mm, addr, ptep, pte, 1) -void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, - pte_t *ptep); +void update_mmu_cache_range(struct vm_area_struct *vma, unsigned long address, + pte_t *ptep, unsigned int nr); + +#define update_mmu_cache(vma, addr, ptep) \ + update_mmu_cache_range(vma, addr, ptep, 1) /* * Encode/decode swap entries and swap PTEs. Swap PTEs are all PTEs that diff --git a/arch/arc/mm/cache.c b/arch/arc/mm/cache.c index 55c6de138eae..3c16ee942a5c 100644 --- a/arch/arc/mm/cache.c +++ b/arch/arc/mm/cache.c @@ -752,17 +752,17 @@ static inline void arc_slc_enable(void) * There's a corollary case, where kernel READs from a userspace mapped page. * If the U-mapping is not congruent to K-mapping, former needs flushing. */ -void flush_dcache_page(struct page *page) +void flush_dcache_folio(struct folio *folio) { struct address_space *mapping; if (!cache_is_vipt_aliasing()) { - clear_bit(PG_dc_clean, &page->flags); + clear_bit(PG_dc_clean, &folio->flags); return; } /* don't handle anon pages here */ - mapping = page_mapping_file(page); + mapping = folio_flus
Re: How many colours does the ARC cache have?
On 2/10/23 09:06, Matthew Wilcox wrote: I see a discrepancy here ... arch/arc/include/asm/shmparam.h: /* Handle upto 2 cache bins */ #define SHMLBA (2 * PAGE_SIZE) arch/arc/include/asm/cacheflush.h: #define CACHE_COLORS_NUM4 The initial aliasing dcache support assumed 2 colors but was later bumped to 4, w/o making the adjustment in shmparam.h (there are some other problems with the arc cache flushing code; The VIPT aliasing config (which is pretty much dead and unused) or regular parts ? I'm working on patches to address them, but those are things I understand a little better. I know nothing about the ARC architecture itself) Legacy ARC700 cpus had VIPT D$. The cache size was configurable by Soc builder and the specific geometry could yield an aliasing configuration (e.g. standard page size 8K, 4 way set associative D$: so D$ > 32K were aliasing and needed CONFIG_ARC_CACHE_VIPT_ALIASING). Although there was ever only 1 customer who taped out an aliasing cache config. The newer ARC HS cores have PIPT D$ and thus don't need the aliasing support. FWIW we could rip out all the VIPT aliasing code as I don't think it is needed anymore. @Alexey can you confirm ? -Vineet ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Pavel steping up for ARC glibc maintenance
Hi Carlos, I'd like to introduce Pavel who intends to step up to maintain ARC glibc port and do periodic wiki updates and such. I've pointed him to links [1] and [2]. To begin with can he be granted wiki edit access and subsequently also approve his write access to glibc sourceware repo. Thx, -Vineet [1] https://sourceware.org/glibc/wiki/MAINTAINERS#Becoming_a_maintainer_.28developer.29 [2] https://sourceware.org/glibc/wiki/MAINTAINERS#AccountsOnSourceware ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [PATCH] bit_spinlock: Include
On 1/8/23 11:04, Christophe JAILLET wrote: In an attempt to simplify some includes in , it appeared, when compiling fs/ecryptfs/dentry.c, that was relying on other includes to get the definition of cpu_relax(). (see [1]) It broke on arc. It its just ARC that broke, maybe we can do something there ? Include in to fix the issue. This will help remove some un-needed includes from . [1]: https://lore.kernel.org/all/202301082130.lxmj5qkd-...@intel.com/ Signed-off-by: Christophe JAILLET --- Not sure who to send this to. get_maintainer.pl is of no help, and the file is untouched from a too long time. Greg? Dan? Any pointer? --- include/linux/bit_spinlock.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/linux/bit_spinlock.h b/include/linux/bit_spinlock.h index bbc4730a6505..d0fd2a7afca2 100644 --- a/include/linux/bit_spinlock.h +++ b/include/linux/bit_spinlock.h @@ -2,6 +2,7 @@ #ifndef __LINUX_BIT_SPINLOCK_H #define __LINUX_BIT_SPINLOCK_H +#include #include #include #include ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [PATCH v3 2/2] ARC: update definitions in elf/elf.h
On 11/27/22 09:38, Shahab Vahedi via Libc-alpha wrote: While porting ARCv2 to elfutils [1], it was brought up that the necessary changes to the project's libelf/elf.h must come from glibc, because they sync it from glibc [2]. Therefore, this patch is to update ARC entries in elf/elf.h. The majority of the update is about adding new definitions, specially for the relocations. However, there is one rename, one deletion, and one change: - R_ARC_JUMP_SLOT renamed to R_ARC_JMP_SLOT to match binutils. - R_ARC_B26 removed because it is unused and deprecated. - R_ARC_TLS_DTPOFF_S9 changed from 0x4a to the correct value 0x49. Finally, a specific SHT class for ARC has been added to glibcelf.py. Else, it would result in a collision: _register_elf_h(Sht, ranges=True, File "/src/glibc/scripts/glibcelf.py", line x, in _register_elf_h raise ValueError('duplicate value {}: {}, {}'.format( ValueError: duplicate value 1879048193: SHT_ARC_ATTRIBUTES, SHT_X86_64_UNWIND [1] https://sourceware.org/pipermail/elfutils-devel/2022q4/005530.html [2] https://sourceware.org/pipermail/elfutils-devel/2022q4/005548.html No regression has been observed after applying this patch. Below follows the result: UNSUPPORTED: crypt/cert UNSUPPORTED: elf/tst-audit22 FAIL: elf/tst-audit25a FAIL: elf/tst-audit25b FAIL: elf/tst-bz15311 FAIL: elf/tst-bz28937 FAIL: elf/tst-dlmopen4 UNSUPPORTED: elf/tst-dlopen-self-container UNSUPPORTED: elf/tst-dlopen-tlsmodid-container UNSUPPORTED: elf/tst-glibc-hwcaps-prepend-cache UNSUPPORTED: elf/tst-ldconfig-bad-aux-cache UNSUPPORTED: elf/tst-ldconfig-ld_so_conf-update UNSUPPORTED: elf/tst-pldd UNSUPPORTED: elf/tst-preload-pthread-libc XPASS: elf/tst-protected1a XPASS: elf/tst-protected1b FAIL: elf/tst-tls-allocation-failure-static-patched FAIL: elf/tst-tls1 FAIL: elf/tst-tls3 FAIL: elf/tst-tlsalign-extern UNSUPPORTED: elf/tst-valgrind-smoke UNSUPPORTED: grp/tst-initgroups1 UNSUPPORTED: grp/tst-initgroups2 UNSUPPORTED: io/tst-getcwd-smallbuff UNSUPPORTED: locale/tst-localedef-path-norm FAIL: localedata/sort-test UNSUPPORTED: localedata/tst-localedef-hardlinks FAIL: malloc/tst-malloc-thread-fail-malloc-check FAIL: malloc/tst-malloc_info-malloc-check UNSUPPORTED: math/test-fesetexcept-traps UNSUPPORTED: math/test-fexcept-traps UNSUPPORTED: math/test-nearbyint-except UNSUPPORTED: math/test-nearbyint-except-2 UNSUPPORTED: misc/tst-adjtimex UNSUPPORTED: misc/tst-clock_adjtime FAIL: misc/tst-misalign-clone FAIL: misc/tst-misalign-clone-internal UNSUPPORTED: misc/tst-ntp_adjtime UNSUPPORTED: misc/tst-pkey UNSUPPORTED: misc/tst-rseq UNSUPPORTED: misc/tst-rseq-disable UNSUPPORTED: misc/tst-syslog UNSUPPORTED: misc/tst-ttyname FAIL: nptl/test-cond-printers FAIL: nptl/test-condattr-printers FAIL: nptl/test-mutex-printers FAIL: nptl/test-mutexattr-printers FAIL: nptl/test-rwlock-printers FAIL: nptl/test-rwlockattr-printers UNSUPPORTED: nptl/tst-pthread-gdb-attach UNSUPPORTED: nptl/tst-pthread-gdb-attach-static UNSUPPORTED: nptl/tst-pthread-getattr UNSUPPORTED: nptl/tst-rseq-nptl UNSUPPORTED: nss/tst-nss-compat1 UNSUPPORTED: nss/tst-nss-db-endgrent UNSUPPORTED: nss/tst-nss-db-endpwent UNSUPPORTED: nss/tst-nss-files-hosts-long UNSUPPORTED: nss/tst-nss-gai-actions UNSUPPORTED: nss/tst-nss-test3 UNSUPPORTED: nss/tst-reload1 UNSUPPORTED: nss/tst-reload2 UNSUPPORTED: posix/bug-ga2 UNSUPPORTED: posix/bug-ga2-mem FAIL: posix/globtest UNSUPPORTED: posix/tst-vfork3 UNSUPPORTED: posix/tst-vfork3-mem UNSUPPORTED: resolv/mtrace-tst-leaks2 UNSUPPORTED: resolv/tst-leaks2 UNSUPPORTED: resolv/tst-resolv-ai_idn UNSUPPORTED: resolv/tst-resolv-ai_idn-latin1 UNSUPPORTED: resolv/tst-resolv-res_init UNSUPPORTED: resolv/tst-resolv-res_init-thread UNSUPPORTED: rt/tst-bz28213 UNSUPPORTED: rt/tst-mqueue1 UNSUPPORTED: rt/tst-mqueue10 UNSUPPORTED: rt/tst-mqueue2 UNSUPPORTED: rt/tst-mqueue3 UNSUPPORTED: rt/tst-mqueue4 UNSUPPORTED: rt/tst-mqueue5 UNSUPPORTED: rt/tst-mqueue6 UNSUPPORTED: rt/tst-mqueue8 UNSUPPORTED: rt/tst-mqueue8x UNSUPPORTED: rt/tst-mqueue9 UNSUPPORTED: stdlib/test-bz22786 UNSUPPORTED: stdlib/tst-system UNSUPPORTED: string/test-bcopy UNSUPPORTED: string/test-memmove UNSUPPORTED: string/tst-memmove-overflow UNSUPPORTED: string/tst-strerror UNSUPPORTED: string/tst-strsignal UNSUPPORTED: time/tst-clock_settime UNSUPPORTED: time/tst-settimeofday Summary of test results: 21 FAIL 4184 PASS 69 UNSUPPORTED 16 XFAIL 2 XPASS Signed-off-by: Shahab Vahedi --- Committed ! Thx, -Vineet ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [PATCH v3 1/2] scripts: Add "|" operator support to glibcpp's parsing
On 11/27/22 10:21, Florian Weimer via Libc-alpha wrote: * Shahab Vahedi: From the tests point of view, this is a necessary step for another patch [1] and allows parsing macros such as "#define A | B". Without it, a few tests [2] choke when the other patch [1] is applied: /src/glibc/scripts/../elf/elf.h:4167: error: uninterpretable macro token sequence: ( EF_ARC_MACH_MSK | EF_ARC_OSABI_MSK ) Traceback (most recent call last): File "/src/glibc/elf/tst-glibcelf.py", line 23, in import glibcelf File "/src/glibc/scripts/glibcelf.py", line 226, in _elf_h = _parse_elf_h() ^^ File "/src/glibc/scripts/glibcelf.py", line 223, in _parse_elf_h raise IOError('parse error in elf.h') OSError: parse error in elf.h [1] ARC: update definitions in elf/elf.h https://sourceware.org/pipermail/libc-alpha/2022-November/143503.html [2] tst-glibcelf, tst-relro-ldso, and tst-relro-libc Signed-off-by: Shahab Vahedi This okay and can go in separately, thanks. Reviewed-by: Florian Weimer Committed ! Thx, -Vineet ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [PATCH v2] ARC: update definitions in elf/elf.h
On 11/21/22 06:30, Adhemerval Zanella Netto wrote: On 21/11/22 10:06, Shahab Vahedi via Libc-alpha wrote: While porting ARCv2 to elfutils [1], it was brought up that the necessary changes to the project's libelf/elf.h must come from glibc, because they sync it from glibc [2]. Therefore, this patch is to update ARC entries in elf/elf.h. The majority of the update is about adding new definitions, specially for the relocations. However, there is one rename, one deletion, and one change: - R_ARC_JUMP_SLOT renamed to R_ARC_JMP_SLOT to match binutils. - R_ARC_B26 removed because it is unused and deprecated. - R_ARC_TLS_DTPOFF_S9 changed from 0x4a to the correct value 0x49. [1] https://sourceware.org/pipermail/elfutils-devel/2022q4/005530.html [2] https://sourceware.org/pipermail/elfutils-devel/2022q4/005548.html Signed-off-by: Shahab Vahedi We discussed this briefly on glibc patchwork review meeting [1], and if does not trigger any regression it ok to arch maintainers to handle such changes. Shahab as a process followup, can you run the full glibc testsuite w/ and w/o this change and post the results summary here. It should be easy to do this with hsdk dev board. It can also help find fill the the glibc testing log for arc for the upcoming release ;-) as 2.36 [1] seems untested. -Vineet [1] https://sourceware.org/glibc/wiki/Release/2.36 ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [PATCH] ARC: update definitions in elf/elf.h
On 11/18/22 05:15, Shahab Vahedi wrote: While porting ARCv2 to elfutils [1], it was brought up that the necessary changes to the project's libelf/elf.h must come from glibc, because they sync it from glibc [2]. Therefore, this patch is to update ARC entries in elf/elf.h. The majority of the update is about adding new definitions, specially for the relocations. However, there is one rename, one deletion, and one change: For completeness: And some cosmetic changes to uppercase hex digits. - R_ARC_JUMP_SLOT renamed to R_ARC_JMP_SLOT to match binutils. - R_ARC_B26 removed because it is unused and deprecated. - R_ARC_TLS_DTPOFF_S9 changed from 0x4a to the correct value 0x49. Technically this would be an ABI change, but is currently not being used in glibc at all (and I doubt anything outside glibc would use it anyways) so this should be non-controversial. [1] https://sourceware.org/pipermail/elfutils-devel/2022q4/005530.html [2] https://sourceware.org/pipermail/elfutils-devel/2022q4/005548.html Signed-off-by: Shahab Vahedi --- elf/elf.h | 30 +- 1 file changed, 25 insertions(+), 5 deletions(-) diff --git a/elf/elf.h b/elf/elf.h index 920e6891e6..dfe5f79036 100644 --- a/elf/elf.h +++ b/elf/elf.h @@ -4160,13 +4160,23 @@ enum #define R_LARCH_GNU_VTENTRY 58 +/* ARC specific declarations. */ + +/* Processor specific flags for the Ehdr e_flags field. */ +#define EF_ARC_MACH_MSK0x00ff +#define EF_ARC_OSABI_MSK0x0f00 +#define EF_ARC_ALL_MSK (EF_ARC_MACH_MSK | EF_ARC_OSABI_MSK) + +/* Processor specific values for the Shdr sh_type field. */ +#define SHT_ARC_ATTRIBUTES (SHT_LOPROC + 1) /* ARC attributes section. */ + /* ARCompact/ARCv2 specific relocs. */ #define R_ARC_NONE0x0 #define R_ARC_8 0x1 #define R_ARC_16 0x2 #define R_ARC_24 0x3 #define R_ARC_32 0x4 -#define R_ARC_B26 0x5 + #define R_ARC_B22_PCREL 0x6 #define R_ARC_H30 0x7 #define R_ARC_N8 0x8 @@ -4206,16 +4216,23 @@ enum #define R_ARC_SECTOFF_ME_20x2A #define R_ARC_SECTOFF_1 0x2B #define R_ARC_SECTOFF_2 0x2C +#define R_ARC_SDA_12 0x2D +#define R_ARC_SDA16_ST20x30 +#define R_ARC_32_PCREL 0x31 OK. #define R_ARC_PC320x32 #define R_ARC_GOTPC32 0x33 #define R_ARC_PLT32 0x34 #define R_ARC_COPY0x35 #define R_ARC_GLOB_DAT0x36 -#define R_ARC_JUMP_SLOT0x37 +#define R_ARC_JMP_SLOT 0x37 Did you build glibc with this change ? There are references to old definition. git grep R_ARC_JUMP_SLOT sysdeps/arc/dl-machine.h:199: type) == R_ARC_JUMP_SLOT \ sysdeps/arc/dl-machine.h:206:#define ELF_MACHINE_JMP_SLOT R_ARC_JUMP_SLOT sysdeps/arc/dl-machine.h:277: case R_ARC_JUMP_SLOT: sysdeps/arc/dl-machine.h:337: if (r_type == R_ARC_JUMP_SLOT) #define R_ARC_RELATIVE0x38 #define R_ARC_GOTOFF 0x39 #define R_ARC_GOTPC 0x3A #define R_ARC_GOT32 0x3B +#define R_ARC_S21W_PCREL_PLT 0x3C +#define R_ARC_S25H_PCREL_PLT 0x3D + +#define R_ARC_JLI_SECTOFF 0x3F OK. #define R_ARC_TLS_DTPMOD 0x42 #define R_ARC_TLS_DTPOFF 0x43 @@ -4224,9 +4241,12 @@ enum #define R_ARC_TLS_GD_LD 0x46 #define R_ARC_TLS_GD_CALL 0x47 #define R_ARC_TLS_IE_GOT 0x48 -#define R_ARC_TLS_DTPOFF_S90x4a -#define R_ARC_TLS_LE_S90x4a -#define R_ARC_TLS_LE_320x4b +#define R_ARC_TLS_DTPOFF_S90x49 Value change, but not used currently so no ABI implications. +#define R_ARC_TLS_LE_S90x4A cosmetic. OK +#define R_ARC_TLS_LE_320x4B Ditto. +#define R_ARC_S25W_PCREL_PLT 0x4C +#define R_ARC_S21H_PCREL_PLT 0x4D +#define R_ARC_NPS_CMEM16 0x4E OK. ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
[GIT PULL] ARC updates for 6.1
Hi Linus, Please pull some fixes for ARC. Thx, -Vineet -> The following changes since commit 9abf2313adc1ca1b6180c508c25f22f9395cc780: Linux 6.1-rc1 (2022-10-16 15:36:24 -0700) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc.git/ tags/arc-6.1-fixes for you to fetch changes up to 4fd9df10cb7a9289fbd22d669f9f98164d95a1ce: ARC: mm: fix leakage of memory allocated for PTE (2022-10-17 16:32:12 -0700) ARC updates for 6.1 - Fix for Page Table mem leak - defconfig updates - Miscll other updates Amadeusz Sławiński (1): ARC: bitops: Change __fls to return unsigned long Jilin Yuan (1): ARC: Fix comment typo Lukas Bulwahn (1): arc: update config files Pavel Kozlov (1): ARC: mm: fix leakage of memory allocated for PTE Randy Dunlap (1): arc: iounmap() arg is volatile Serge Semin (1): arc: dts: Harmonize EHCI/OHCI DT nodes name Zhang Jiaming (1): ARC: Fix comment typo arch/arc/boot/dts/axc003.dtsi | 4 ++-- arch/arc/boot/dts/axc003_idu.dtsi | 4 ++-- arch/arc/boot/dts/axs10x_mb.dtsi | 4 ++-- arch/arc/boot/dts/hsdk.dts | 4 ++-- arch/arc/boot/dts/vdk_axs10x_mb.dtsi | 2 +- arch/arc/configs/axs101_defconfig | 4 arch/arc/configs/axs103_defconfig | 4 arch/arc/configs/axs103_smp_defconfig | 4 arch/arc/configs/haps_hs_defconfig | 1 - arch/arc/configs/haps_hs_smp_defconfig | 1 - arch/arc/configs/hsdk_defconfig | 1 - arch/arc/configs/nsim_700_defconfig | 1 - arch/arc/configs/nsimosci_defconfig | 1 - arch/arc/configs/nsimosci_hs_defconfig | 1 - arch/arc/configs/nsimosci_hs_smp_defconfig | 6 +- arch/arc/configs/tb10x_defconfig | 7 +-- arch/arc/configs/vdk_hs38_defconfig | 3 --- arch/arc/configs/vdk_hs38_smp_defconfig | 1 - arch/arc/include/asm/bitops.h | 4 ++-- arch/arc/include/asm/entry-compact.h | 2 +- arch/arc/include/asm/io.h | 2 +- arch/arc/include/asm/pgtable-levels.h | 2 +- arch/arc/kernel/smp.c | 2 +- arch/arc/mm/cache.c | 4 ++-- arch/arc/mm/ioremap.c | 2 +- 25 files changed, 20 insertions(+), 51 deletions(-) ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [PATCH] ARC: mm: fix leakage of memory allocated for PTE
On 10/17/22 09:11, pavel.koz...@synopsys.com wrote: From: Pavel Kozlov Since commit d9820ff ("ARC: mm: switch pgtable_t back to struct page *") a memory leakage problem occurs. Memory allocated for page table entries not released during process termination. This issue can be reproduced by a small program that allocates a large amount of memory. After several runs, you'll see that the amount of free memory has reduced and will continue to reduce after each run. All ARC CPUs are effected by this issue. The issue was introduced since the kernel stable release v5.15-rc1. As described in commit d9820ff after switch pgtable_t back to struct page *, a pointer to "struct page" and appropriate functions are used to allocate and free a memory page for PTEs, but the pmd_pgtable macro hasn't changed and returns the direct virtual address from the PMD (PGD) entry. Than this address used as a parameter in the __pte_free() and as a result this function couldn't release memory page allocated for PTEs. Fix this issue by changing the pmd_pgtable macro and returning pointer to struct page. Good catch. Curious how did you find it. KMEMCHECK or some such or just oom. Fixes: d9820ff76f95 ("ARC: mm: switch pgtable_t back to struct page *") Signed-off-by: Pavel Kozlov Cc: Vineet Gupta Cc: Mike Rapoport Cc: # 4.15.x You meant 5.15.x Added to for-curr. Thx, -Vineet --- arch/arc/include/asm/pgtable-levels.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arc/include/asm/pgtable-levels.h b/arch/arc/include/asm/pgtable-levels.h index 64ca25d199be..ef68758b69f7 100644 --- a/arch/arc/include/asm/pgtable-levels.h +++ b/arch/arc/include/asm/pgtable-levels.h @@ -161,7 +161,7 @@ #define pmd_pfn(pmd) ((pmd_val(pmd) & PAGE_MASK) >> PAGE_SHIFT) #define pmd_page(pmd) virt_to_page(pmd_page_vaddr(pmd)) #define set_pmd(pmdp, pmd)(*(pmdp) = pmd) -#define pmd_pgtable(pmd) ((pgtable_t) pmd_page_vaddr(pmd)) +#define pmd_pgtable(pmd) ((pgtable_t) pmd_page(pmd)) /* * 4th level paging: pte ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [PATCH] arc: update config files
On 9/29/22 03:14, Lukas Bulwahn wrote: Clean up config files by: - removing configs that were deleted in the past - removing configs not in tree and without recently pending patches - adding new configs that are replacements for old configs in the file For some detailed information, see Link. Link:https://lore.kernel.org/kernel-janitors/20220929090645.1389-1-lukas.bulw...@gmail.com/ Signed-off-by: Lukas Bulwahn Thx for the fix. Added to for-curr. -Vineet ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [PATCH v3 4/4] arc: Use generic dump_stack_print_cmdline() implementation
On 8/8/22 06:09, Helge Deller wrote: The process program name and command line is now shown in generic code in dump_stack_print_info(), so drop the arc-specific implementation. Signed-off-by: Helge Deller But that info printing was added back in 2018 by e36df28f532f882. I don't think arc is using show_regs_print_info -> dump_stack_print_info yet. Or is there a different code path now which calls here ? --- arch/arc/kernel/troubleshoot.c | 24 1 file changed, 24 deletions(-) diff --git a/arch/arc/kernel/troubleshoot.c b/arch/arc/kernel/troubleshoot.c index 7654c2e42dc0..9807e590ee55 100644 --- a/arch/arc/kernel/troubleshoot.c +++ b/arch/arc/kernel/troubleshoot.c @@ -51,29 +51,6 @@ static void print_regs_callee(struct callee_regs *regs) regs->r24, regs->r25); } -static void print_task_path_n_nm(struct task_struct *tsk) -{ - char *path_nm = NULL; - struct mm_struct *mm; - struct file *exe_file; - char buf[ARC_PATH_MAX]; - - mm = get_task_mm(tsk); - if (!mm) - goto done; - - exe_file = get_mm_exe_file(mm); - mmput(mm); - - if (exe_file) { - path_nm = file_path(exe_file, buf, ARC_PATH_MAX-1); - fput(exe_file); - } - -done: - pr_info("Path: %s\n", !IS_ERR(path_nm) ? path_nm : "?"); -} - static void show_faulting_vma(unsigned long address) { struct vm_area_struct *vma; @@ -176,7 +153,6 @@ void show_regs(struct pt_regs *regs) */ preempt_enable(); Maybe we remove preempt* as well now (perhaps as a follow up patch) since that was added by f731a8e89f8c78 "ARC: show_regs: lockdep: re-enable preemption" where show_regs -> print_task_path_n_nm -> mmput was triggering lockdep splat which is supposedly removed. - print_task_path_n_nm(tsk); show_regs_print_info(KERN_INFO); show_ecr_verbose(regs); -- 2.37.1 ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [PATCH v2] arc: iounmap() arg is volatile
On 10/9/22 19:28, Randy Dunlap wrote: Add 'volatile' to iounmap()'s argument to prevent build warnings. This make it the same as other major architectures. Placates these warnings: (12 such warnings) ../drivers/video/fbdev/riva/fbdev.c: In function 'rivafb_probe': ../drivers/video/fbdev/riva/fbdev.c:2067:42: error: passing argument 1 of 'iounmap' discards 'volatile' qualifier from pointer target type [-Werror=discarded-qualifiers] 2067 | iounmap(default_par->riva.PRAMIN); Fixes: 1162b0701b14b ("ARC: I/O and DMA Mappings") Signed-off-by: Randy Dunlap Cc: Vineet Gupta Cc:linux-snps-arc@lists.infradead.org Cc: Arnd Bergmann Thx for the fix. On for-curr. -Vineet ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [linux-next:master] BUILD REGRESSION 2a2aa3f05338270aecbe2492fda910d6c17e0102
On 7/5/22 23:49, Dan Carpenter wrote: [ trimmed massive CC list (see below) ] What's going on with all the arch/arc build breakage on linux-next? regards, dan carpenter To: kernel test robot Cc: Andrew Morton , virtualizat...@lists.linux-foundation.org, usbb2k-api-...@nongnu.org, tipc-discuss...@lists.sourceforge.net, target-de...@vger.kernel.org, sound-open-firmw...@alsa-project.org, samba-techni...@lists.samba.org, rds-de...@oss.oracle.com, patc...@opensource.cirrus.com, osmocom-net-g...@lists.osmocom.org, openipmi-develo...@lists.sourceforge.net, nvd...@lists.linux.dev, n...@lists.linux.dev, netfilter-de...@vger.kernel.org, net...@vger.kernel.org, mjpeg-us...@lists.sourceforge.net, megaraidlinux@broadcom.com, linuxppc-...@lists.ozlabs.org, linux1394-de...@lists.sourceforge.net, linux-...@vger.kernel.org, linux-w...@vger.kernel.org, linux-wirel...@vger.kernel.org, linux-watch...@vger.kernel.org, linux-...@vger.kernel.org, linux-unio...@vger.kernel.org, linux-te...@vger.kernel.org, linux-st...@st-md-mailman.stormreply.com, linux-stag...@lists.linux.dev, linux-ser...@vger.kernel.org, linux-s...@vger.kernel.org, linux-s...@vger.kernel.org, linux-samsung-...@vger.kernel.org, linux-rockc...@lists.infradead.org, linux-renesas-...@vger.kernel.org, linux-r...@vger.kernel.org, linux-r...@vger.kernel.org, linux...@vger.kernel.org, linux-...@lists.infradead.org, linux-perf-us...@vger.kernel.org, linux-...@vger.kernel.org, linux-parp...@lists.infradead.org, linux-par...@vger.kernel.org, linux-o...@vger.kernel.org, linux-...@lists.01.org, linux-...@lists.infradead.org, linux-...@vger.kernel.org, linux...@kvack.org, linux-media...@lists.infradead.org, linux-me...@vger.kernel.org, linux-l...@vger.kernel.org, linux-integr...@vger.kernel.org, linux-in...@vger.kernel.org, linux-...@vger.kernel.org, linux-...@vger.kernel.org, linux-hw...@vger.kernel.org, linux-fsde...@vger.kernel.org, linux-f...@vger.kernel.org, linux-fb...@vger.kernel.org, linux-e...@vger.kernel.org, linux-...@vger.kernel.org, linux-...@vger.kernel.org, linux-cry...@vger.kernel.org, linux-...@vger.kernel.org, linux-c...@vger.kernel.org, linux-...@vger.kernel.org, linux-bt...@vger.kernel.org, linux-blueto...@vger.kernel.org, linux-bl...@vger.kernel.org, linux-bca...@vger.kernel.org, linux-arm-...@vger.kernel.org, linux-arm-ker...@lists.infradead.org, linux-amlo...@lists.infradead.org, linaro-mm-...@lists.linaro.org, legousb-de...@lists.sourceforge.net, k...@vger.kernel.org, keyri...@vger.kernel.org, isdn4li...@listserv.isdn4linux.de, io...@lists.linux.dev, io...@lists.linux-foundation.org, intel-wired-...@lists.osuosl.org, dri-de...@lists.freedesktop.org, dm-de...@redhat.com, devicet...@vger.kernel.org, d...@openvswitch.org, d...@vger.kernel.org, da...@lists.linux.dev, coret...@netfilter.org, cgro...@vger.kernel.org, ceph-de...@vger.kernel.org, appar...@lists.ubuntu.com, amd-...@lists.freedesktop.org, alsa-de...@alsa-project.org, accessrunner-gene...@lists.sourceforge.net linux-snps-arc is not there, does one need to subscribe to these ? On Wed, Jul 06, 2022 at 07:41:36AM +0800, kernel test robot wrote: tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master branch HEAD: 2a2aa3f05338270aecbe2492fda910d6c17e0102 Add linux-next specific files for 20220705 Error/Warning reports: https://lore.kernel.org/linux-doc/202207051821.3f0erisl-...@intel.com Error/Warning: (recently discovered and may have been fixed) Documentation/PCI/endpoint/pci-vntb-function.rst:82: WARNING: Unexpected indentation. Documentation/PCI/endpoint/pci-vntb-howto.rst:131: WARNING: Title underline too short. drivers/pci/endpoint/functions/pci-epf-vntb.c:975:5: warning: no previous prototype for 'pci_read' [-Wmissing-prototypes] drivers/pci/endpoint/functions/pci-epf-vntb.c:984:5: warning: no previous prototype for 'pci_write' [-Wmissing-prototypes] Unverified Error/Warning (likely false positive, please contact us if interested): block/partitions/efi.c:223:1: internal compiler error: in arc_ifcvt, at config/arc/arc.c:9637 block/sed-opal.c:427:1: internal compiler error: in arc_ifcvt, at config/arc/arc.c:9637 crypto/asymmetric_keys/pkcs7_verify.c:311:1: internal compiler error: in arc_ifcvt, at config/arc/arc.c:9637 drivers/ata/libata-core.c:2802:1: internal compiler error: in arc_ifcvt, at config/arc/arc.c:9637 drivers/ata/libata-eh.c:2842:1: internal compiler error: in arc_ifcvt, at config/arc/arc.c:9637 drivers/ata/sata_dwc_460ex.c:691:1: internal compiler error: in arc_ifcvt, at config/arc/arc.c:9637 drivers/base/power/runtime.c:1570:1: inter
Re: [PATCH RESEND v9 1/5] arc: dts: Harmonize EHCI/OHCI DT nodes name
On 6/24/22 07:16, Serge Semin wrote: In accordance with the Generic EHCI/OHCI bindings the corresponding node name is suppose to comply with the Generic USB HCD DT schema, which requires the USB nodes to have the name acceptable by the regexp: "^usb(@.*)?" . Make sure the "generic-ehci" and "generic-ohci"-compatible nodes are correctly named. Signed-off-by: Serge Semin Acked-by: Alexey Brodkin Acked-by: Krzysztof Kozlowski This slipped thru cracks. Now on for-curr. Thx, -Vineet ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [PATCH] ARC:mm:Fix syntax errors in comments
On 6/23/22 00:56, Bagas Sanjaya wrote: In an ideal world yes. But sometimes maintainer complain to break whitespacxe fixes and such into independent fix. Also as someone said later in the thread, for somebody just getting into kernel and figuring out patch submission etc this could be a perfect dry run and helps improve the code anyways. Seems like you missed the point that it's OK to have typofixes while doing other real changes (like refactoring) in the same patch. No I did not. Quoting from [1]: My opinion is that trivial patches like this are fine as a starting point for new contributors, which is why I acked the previous patch from you guys. However, if we start getting two of these every week it just adds more maintenance burden than it's worth. I tend to agree with the last sentence of above quote. Let's pretend that I'm the tree maintainer. Besides reviewing real change patches, I get flooded by these similar minor cleanup patches that I need to review. Some (but not all) these patches have issues (say subject or description error) that are repeated. "Repeated" is the key - First time I'd politely tell them to DTRT but will just ignore if things continue. Lazily speaking, I'd like to privately notice the submitter about the situation, and I withhold these for now. Funny that you say this: ever since this got posted I now see 3 patches for typo fixes :-) But it is something in maintainers purview and for now i'm ok. Thx, -Vineet ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [PATCH] ARC:kernel:Fix typos in comments
On 6/22/22 00:52, Jilin Yuan wrote: Delete the redundant word 'call'. Signed-off-by: Jilin Yuan --- arch/arc/kernel/smp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arc/kernel/smp.c b/arch/arc/kernel/smp.c index d947473f1e6d..6c22a53711e9 100644 --- a/arch/arc/kernel/smp.c +++ b/arch/arc/kernel/smp.c @@ -393,7 +393,7 @@ irqreturn_t do_IPI(int irq, void *dev_id) * API called by platform code to hookup arch-common ISR to their IPI IRQ * * Note: If IPI is provided by platform (vs. say ARC MCIP), their intc setup/map - * function needs to call call irq_set_percpu_devid() for IPI IRQ, otherwise + * function needs to call irq_set_percpu_devid() for IPI IRQ, otherwise * request_percpu_irq() below will fail */ static DEFINE_PER_CPU(int, ipi_dev); I'd prefer to have this is the other fix in a single change. No point increasing commits for trivial things. -Vineet ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [PATCH] ARC:mm:Fix syntax errors in comments
On 6/22/22 01:30, Bagas Sanjaya wrote: - * If the U-mapping is not congruent to to K-mapping, former needs flushing. + * If the U-mapping is not congruent to K-mapping, former needs flushing. */ void flush_dcache_page(struct page *page) { The patch is OK, but its subject is wrong. Right. The patch above isn't fixing any syntax errors, but rather minor cleanup. The subject should have been "Remove duplicate 'to' in the flush_dcache_page() comment". I'd just say "ARC: mm: fix typos" I think that this kind of cleanup patches (typofixes) are best done as part of **actual** work on the code in question (for example refactoring or fixing build errors). In an ideal world yes. But sometimes maintainer complain to break whitespacxe fixes and such into independent fix. Also as someone said later in the thread, for somebody just getting into kernel and figuring out patch submission etc this could be a perfect dry run and helps improve the code anyways. -Vineet ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [PATCH] ARC: Fix comment typo
On 5/7/22 20:02, Jason Wang wrote: Remove one of the repeated 'call' in comment line 396. Signed-off-by: Jason Wang Thx for the fix. Added to for-curr -Vineet ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [PATCH] ARC: Fix syntax errors in comments
On 6/3/22 06:01, Xiang wangx wrote: Delete the redundant word 'to'. Delete the redundant word 'since'. Signed-off-by: Xiang wangx Thx for the fix. Added to for-curr -Vineet ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [PATCH 1/2] ARC: bitops: Change __fls to return unsigned long
Hi, On 5/25/22 07:48, Amadeusz Sławiński wrote: As per asm-generic definition and other architectures __fls should return unsigned long. No functional change is expected as return value should fit in unsigned long. Signed-off-by: Amadeusz Sławiński Applied to for-curr. Thx, -Vineet ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [PATCH v3] mm: Avoid unnecessary page fault retires on shared memory types
On 5/24/22 16:45, Peter Xu wrote: I observed that for each of the shared file-backed page faults, we're very likely to retry one more time for the 1st write fault upon no page. It's because we'll need to release the mmap lock for dirty rate limit purpose with balance_dirty_pages_ratelimited() (in fault_dirty_shared_page()). Then after that throttling we return VM_FAULT_RETRY. We did that probably because VM_FAULT_RETRY is the only way we can return to the fault handler at that time telling it we've released the mmap lock. However that's not ideal because it's very likely the fault does not need to be retried at all since the pgtable was well installed before the throttling, so the next continuous fault (including taking mmap read lock, walk the pgtable, etc.) could be in most cases unnecessary. It's not only slowing down page faults for shared file-backed, but also add more mmap lock contention which is in most cases not needed at all. To observe this, one could try to write to some shmem page and look at "pgfault" value in /proc/vmstat, then we should expect 2 counts for each shmem write simply because we retried, and vm event "pgfault" will capture that. To make it more efficient, add a new VM_FAULT_COMPLETED return code just to show that we've completed the whole fault and released the lock. It's also a hint that we should very possibly not need another fault immediately on this page because we've just completed it. This patch provides a ~12% perf boost on my aarch64 test VM with a simple program sequentially dirtying 400MB shmem file being mmap()ed and these are the time it needs: Before: 650.980 ms (+-1.94%) After: 569.396 ms (+-1.38%) I believe it could help more than that. We need some special care on GUP and the s390 pgfault handler (for gmap code before returning from pgfault), the rest changes in the page fault handlers should be relatively straightforward. Another thing to mention is that mm_account_fault() does take this new fault as a generic fault to be accounted, unlike VM_FAULT_RETRY. I explicitly didn't touch hmm_vma_fault() and break_ksm() because they do not handle VM_FAULT_RETRY even with existing code, so I'm literally keeping them as-is. Signed-off-by: Peter Xu --- v3: - Rebase to akpm/mm-unstable - Copy arch maintainers --- arch/arc/mm/fault.c | 4 Acked-by: Vineet Gupta Thx, -Vineet ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
[GIT PULL] ARC changes for 5.19-rc1
Hi Linus, Please pull. Thx, -Vineet ---> The following changes since commit af2d861d4cd2a4da5137f795ee3509e6f944a25b: Linux 5.18-rc4 (2022-04-24 14:51:22 -0700) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc.git/ tags/arc-5.19-rc1 for you to fetch changes up to 6aa98f6217861889523e38b0141c8c71b2ef8a83: ARC: bpf: define uapi for BPF_PROG_TYPE_PERF_EVENT program type (2022-04-26 09:35:28 -0700) ARC changes for 5.19-rc1 - Basic eBPF support (Sergey) Sergey Matyukevich (4): ARC: enable HAVE_REGS_AND_STACK_ACCESS_API feature ARC: implement syscall tracepoints ARC: disasm: handle ARCv2 case in kprobe get/set functions ARC: bpf: define uapi for BPF_PROG_TYPE_PERF_EVENT program type arch/arc/Kconfig | 2 + arch/arc/include/asm/perf_event.h | 4 + arch/arc/include/asm/ptrace.h | 27 ++ arch/arc/include/asm/syscall.h | 2 + arch/arc/include/asm/thread_info.h | 5 +- arch/arc/include/uapi/asm/bpf_perf_event.h | 9 ++ arch/arc/kernel/disasm.c | 64 - arch/arc/kernel/entry.S | 12 +-- arch/arc/kernel/ptrace.c | 140 - 9 files changed, 253 insertions(+), 12 deletions(-) create mode 100644 arch/arc/include/uapi/asm/bpf_perf_event.h ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [vgupta-arc:for-next 3/4] arch/arc/kernel/disasm.c:494:23: error: 'struct pt_regs' has no member named 'gp'; did you mean 'fp'?
On 4/26/22 00:31, Sergey Matyukevich wrote: I have just sent a fixup for this snafu: https://lore.kernel.org/linux-snps-arc/20220426072447.125975-1-geoma...@gmail.com/T/#u IIUC, you have not yet sent a pull-request for next release. So probably it makes sense to squash this commit with b08a66fb680018b6 ("ARC: disasm: handle ARCv2 case in kprobe get/set functions"). Yes this is merge-window stuff so will go in next cycle. I've added a fixup and push for-next. Thx, -Vineet ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
[GIT PULL] ARC fixes for 5.18-rc4
Hi Linus, Please pull. Thx, -Vineet -> The following changes since commit ce522ba9ef7e2d9fb22a39eb3371c0c64e2a433e: Linux 5.18-rc2 (2022-04-10 14:21:36 -1000) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc.git/ tags/arc-5.18-rc4 for you to fetch changes up to c6ed4d84a2c49de7d6f490144cca7b4a4831fb6e: ARC: remove redundant READ_ONCE() in cmpxchg loop (2022-04-18 14:47:05 -0700) ARC fixes for 5.18-rc4 - Assorted fixes Bang Li (1): ARC: remove redundant READ_ONCE() in cmpxchg loop Christophe JAILLET (1): ARC: Remove a redundant memset() Julia Lawall (1): ARC: fix typos in comments Krzysztof Kozlowski (1): ARC: dts: align SPI NOR node name with dtschema Rolf Eike Beer (1): arc: drop definitions of pgd_index() and pgd_offset{, _k}() entirely Sergey Matyukevich (2): ARC: entry: fix syscall_trace_exit argument ARC: atomic: cleanup atomic-llsc definitions arch/arc/boot/dts/hsdk.dts | 2 +- arch/arc/include/asm/atomic-llsc.h | 32 arch/arc/include/asm/pgtable-levels.h | 3 --- arch/arc/kernel/disasm.c | 3 +-- arch/arc/kernel/entry.S | 1 + arch/arc/kernel/signal.c | 2 +- arch/arc/kernel/smp.c | 4 ++-- arch/arc/kernel/unaligned.c | 2 +- arch/arc/mm/cache.c | 2 +- 9 files changed, 24 insertions(+), 27 deletions(-) ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [PATCH 1/2] ARC: atomic: cleanup atomic-llsc definitions
On 2/22/22 06:05, Sergey Matyukevich wrote: From: Sergey Matyukevich Remove redundant c_op macro argument. Only asm_op is needed to define atomic operations using llock/scond. Signed-off-by: Sergey Matyukevich Applied. Thx, -Vineet ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [PATCH] arc: drop definitions of pgd_index() and pgd_offset{, _k}() entirely
On 3/28/22 01:15, Rolf Eike Beer wrote: They were in and have been removed from there in 974b9b2c68f ("mm: consolidate pte_index() and pte_offset_*() definitions") in favor of the generic version. But that missed that the same definitons also existed in , where they were (inadvertently?) introduced in fe6cb7b043b6 ("ARC: mm: disintegrate pgtable.h into levels and flags"). Fixes: 974b9b2c68f ("mm: consolidate pte_index() and pte_offset_*() definitions") Fixes: fe6cb7b043b6 ("ARC: mm: disintegrate pgtable.h into levels and flags") Signed-off-by: Rolf Eike Beer Indeed I missed the upstream change when doing the rework for paging levels. Applied ! Thx, -Vineet ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [PATCH] ARC: dts: align SPI NOR node name with dtschema
On 4/7/22 07:33, Krzysztof Kozlowski wrote: The node names should be generic and SPI NOR dtschema expects "flash". Signed-off-by: Krzysztof Kozlowski Applied. Thx, -Vineet ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [PATCH] ARC: Remove a redundant memset()
On 3/22/22 12:49, Christophe JAILLET wrote: disasm_instr() already call memset(0) on its 2nd argument, so there is no need to clear it explicitly before calling this function. Remove the redundant memset(). Signed-off-by: Christophe JAILLET Applied. Thx, -Vineet ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [PATCH] ARC: fix typos in comments
On 3/18/22 03:37, Julia Lawall wrote: Various spelling mistakes in comments. Detected with the help of Coccinelle. Signed-off-by: Julia Lawall Applied. Thx, -Vineet ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [PATCH] ARC: remove redundant READ_ONCE() in cmpxchg loop
On 3/18/22 19:03, Bang Li wrote: This patch reverts commit 7082a29c22ac ("ARC: use ACCESS_ONCE in cmpxchg loop"). It is not necessary to use READ_ONCE() because cmpxchg contains barrier. We can get it from commit d57f727264f1 ("ARC: add compiler barrier to LLSC based cmpxchg"). Signed-off-by: Bang Li Indeed this is not needed. However have you checked the code with and/wo this change to see if it builds the same. -Vineet --- arch/arc/kernel/smp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arc/kernel/smp.c b/arch/arc/kernel/smp.c index 78e6d069b1c1..56c23f3e1309 100644 --- a/arch/arc/kernel/smp.c +++ b/arch/arc/kernel/smp.c @@ -274,7 +274,7 @@ static void ipi_send_msg_one(int cpu, enum ipi_msg_type msg) * and read back old value */ do { - new = old = READ_ONCE(*ipi_data_ptr); + new = old = *ipi_data_ptr; new |= 1U << msg; } while (cmpxchg(ipi_data_ptr, old, new) != old); ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [PATCH v2 2/4] ARC: entry: fix syscall_trace_exit argument
On 4/14/22 01:17, Sergey Matyukevich wrote: From: Sergey Matyukevich Function syscall_trace_exit expects pointer to pt_regs. However r0 is also used to keep syscall return value. Restore pointer to pt_regs before calling syscall_trace_exit. Signed-off-by: Sergey Matyukevich This is independent fix and worth stable backport, So I'll apply it to for-curr, rest of the pile goes for next release. -Vineet ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [PATCH v2 0/4] ARC: add missing bits for better BPF support
On 4/14/22 01:17, Sergey Matyukevich wrote: Hi Vineet and all, Here is the second revision of the patch series implementing the following two features for ARC: - HAVE_REGS_AND_STACK_ACCESS_API - HAVE_SYSCALL_TRACEPOINTS Adding these features enables more BPF programs for ARC kernels, including KPROBE, TRACEPOINT, PERF_EVENT program types. Regards, Sergey Applied ! Thx, -Vineet v1 -> v2: - drop path with uapi for BPF_PROG_TYPE_PERF_EVENT program type: send it via bpf mailing list - add patch with ARCv2 changes for kprobe disasm Sergey Matyukevich (4): ARC: enable HAVE_REGS_AND_STACK_ACCESS_API feature ARC: entry: fix syscall_trace_exit argument ARC: implement syscall tracepoints ARC: disasm: handle ARCv2 case in kprobe get/set functions arch/arc/Kconfig | 2 + arch/arc/include/asm/ptrace.h | 27 ++ arch/arc/include/asm/syscall.h | 2 + arch/arc/include/asm/thread_info.h | 5 +- arch/arc/kernel/disasm.c | 64 - arch/arc/kernel/entry.S| 13 +-- arch/arc/kernel/ptrace.c | 140 - 7 files changed, 241 insertions(+), 12 deletions(-) ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [RFC PATCH 00/13] ARC: handle the lack of ZOL support
Thx for doing this. I think the series mixes a few things not related to ZOL removal - the changelog for removal of -Os specific code seems incorrect etc. Let me repost with slight more cleanups. -Vineet On 2/22/22 06:14, Sergey Matyukevich wrote: From: Sergey Matyukevich Hi Vineet and all, This patch series continues to prepare arch/arc for the upcoming ARCv3 support. ARCv3 does not support zero-overhead-loop (ZOL). So this patch series provides a set of changes that make ZOL support optional. The patch series is based on top of Linux 5.17-rc5. It has been tested with enabled CONFIG_ARC_LACKS_ZOL option on ARCv2 HSDK hardware as well as on nSIM simulator for ARCv2. I fixed typos, updated Vineet's email address, and slightly modified several commit messages. Otherwise this patch series is the first chunk of ARCv3 bring-up changes by Vineet, available at Synopsys github: see github.com/foss-for-synopsys-dwc-arc-processors/linux Regards, Sergey Vineet Gupta (13): ARC: uaccess: elide unaliged handling if hardware supports ARC: Kconfig: introduce option to disable ZOL ARC: uaccess: drop CC_OPTIMIZE_FOR_SIZE ARC: uaccess: elide ZOL, use double load/stores ARCv2: memset: don't prefetch for len == 0 which happens a lot ARCv2: memset: elide unaligned handling if hardware supports ARCv2: memset: rewrite using double load/stores ARC: string: use generic C code if no ZOL support ARC: delay: elide ZOL ARC: checksum: elide ZOL ARC: head: elide ZOL ARC: build: inhibit ZOL generation by compiler ARC: pt_regs: handle the case when ZOL is not supported arch/arc/Kconfig | 10 ++ arch/arc/Makefile | 3 + arch/arc/include/asm/asm-macro-dbnz-emul.h | 12 ++ arch/arc/include/asm/asm-macro-dbnz.h | 8 ++ arch/arc/include/asm/asm-macro-ll64-emul.h | 31 + arch/arc/include/asm/asm-macro-ll64.h | 20 +++ arch/arc/include/asm/assembler.h | 41 ++ arch/arc/include/asm/checksum.h| 58 +++- arch/arc/include/asm/delay.h | 16 +++ arch/arc/include/asm/entry-arcv2.h | 4 + arch/arc/include/asm/entry.h | 2 + arch/arc/include/asm/ptrace.h | 4 +- arch/arc/include/asm/string.h | 15 ++- arch/arc/include/asm/uaccess.h | 29 ++-- arch/arc/kernel/arcksyms.c | 2 + arch/arc/kernel/asm-offsets.c | 2 + arch/arc/kernel/disasm.c | 2 + arch/arc/kernel/head.S | 8 +- arch/arc/kernel/intc-arcv2.c | 2 + arch/arc/kernel/kgdb.c | 4 + arch/arc/kernel/process.c | 2 + arch/arc/kernel/ptrace.c | 12 ++ arch/arc/kernel/signal.c | 8 ++ arch/arc/kernel/troubleshoot.c | 3 + arch/arc/kernel/unaligned.c| 2 + arch/arc/kernel/vmlinux.lds.S | 2 +- arch/arc/lib/Makefile | 6 + arch/arc/lib/memset-archs.S| 147 + arch/arc/lib/uaccess.S | 144 arch/arc/mm/extable.c | 11 -- 30 files changed, 493 insertions(+), 117 deletions(-) create mode 100644 arch/arc/include/asm/asm-macro-dbnz-emul.h create mode 100644 arch/arc/include/asm/asm-macro-dbnz.h create mode 100644 arch/arc/include/asm/asm-macro-ll64-emul.h create mode 100644 arch/arc/include/asm/asm-macro-ll64.h create mode 100644 arch/arc/include/asm/assembler.h create mode 100644 arch/arc/lib/uaccess.S ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [RFC PATCH 0/3] arc: remove CONFIG_SET_FS
IIUC it makes sense to drop this patch series from your for-next branch. These changes have been superseded by generic approach posted by Arnd Bergmann, see: https://lore.kernel.org/linux-arch/CAHk-=whXYWoP6of7js=f4zov62on97mnfrsvrwhy75wogm6...@mail.gmail.com/T/#t I tested patches by Arnd on ARC700/ARCHS platforms, so far so good. Yep I've been following that thread and have dropped your ARC patchset. Thx for testing. You can reply to Arnd with a Tested-by: < your-name> #arc -Vineet ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [RFC PATCH 0/3] arc: remove CONFIG_SET_FS
On 2/1/22 06:55, Sergey Matyukevich wrote: Hi all, This patch series removes SET_FS support for arc. Sergey Matyukevich (3): arc: use BUILD_BUG for invalid sizes in get_user/put_user arc: provide __{get,put}_kernel_nofault arc: remove set_fs() arch/arc/Kconfig | 1 - arch/arc/include/asm/segment.h | 20 - arch/arc/include/asm/thread_info.h | 3 -- arch/arc/include/asm/uaccess.h | 48 -- 4 files changed, 32 insertions(+), 40 deletions(-) delete mode 100644 arch/arc/include/asm/segment.h Nit - in future please use uppercase "ARC" for prefixing patches. Added to for-next. Thx, -Vineet ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc