Re: [linux-sunxi] [PATCH 3/7] ARM: dt: sun4i: Add A10 SPI controller nodes

2014-02-22 Thread Runzhong Yi
Hi,

Excuse me, could you tell me to which branch is this patch for ? How
is the maturity of device tree support? Do i still need .fex file?

Thank you very much.

 Jhon Yi

2014-02-23 5:35 GMT+08:00 Maxime Ripard :
> The A10 has 4 SPI controllers that are now supported. Add them in the DT.
>
> Signed-off-by: Maxime Ripard 
> ---
>  arch/arm/boot/dts/sun4i-a10.dtsi | 44 
> 
>  1 file changed, 44 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi 
> b/arch/arm/boot/dts/sun4i-a10.dtsi
> index f6f41d6..157bc09 100644
> --- a/arch/arm/boot/dts/sun4i-a10.dtsi
> +++ b/arch/arm/boot/dts/sun4i-a10.dtsi
> @@ -339,6 +339,28 @@
> #size-cells = <1>;
> ranges;
>
> +   spi0: spi@01c05000 {
> +   compatible = "allwinner,sun4i-a10-spi";
> +   reg = <0x01c05000 0x1000>;
> +   interrupts = <10>;
> +   clocks = <&ahb_gates 20>, <&spi0_clk>;
> +   clock-names = "ahb", "mod";
> +   status = "disabled";
> +   #address-cells = <1>;
> +   #size-cells = <0>;
> +   };
> +
> +   spi1: spi@01c06000 {
> +   compatible = "allwinner,sun4i-a10-spi";
> +   reg = <0x01c06000 0x1000>;
> +   interrupts = <11>;
> +   clocks = <&ahb_gates 21>, <&spi1_clk>;
> +   clock-names = "ahb", "mod";
> +   status = "disabled";
> +   #address-cells = <1>;
> +   #size-cells = <0>;
> +   };
> +
> emac: ethernet@01c0b000 {
> compatible = "allwinner,sun4i-a10-emac";
> reg = <0x01c0b000 0x1000>;
> @@ -355,6 +377,28 @@
> #size-cells = <0>;
> };
>
> +   spi2: spi@01c17000 {
> +   compatible = "allwinner,sun4i-a10-spi";
> +   reg = <0x01c17000 0x1000>;
> +   interrupts = <12>;
> +   clocks = <&ahb_gates 22>, <&spi2_clk>;
> +   clock-names = "ahb", "mod";
> +   status = "disabled";
> +   #address-cells = <1>;
> +   #size-cells = <0>;
> +   };
> +
> +   spi3: spi@01c1f000 {
> +   compatible = "allwinner,sun4i-a10-spi";
> +   reg = <0x01c1f000 0x1000>;
> +   interrupts = <50>;
> +   clocks = <&ahb_gates 23>, <&spi3_clk>;
> +   clock-names = "ahb", "mod";
> +   status = "disabled";
> +   #address-cells = <1>;
> +   #size-cells = <0>;
> +   };
> +
> intc: interrupt-controller@01c20400 {
> compatible = "allwinner,sun4i-ic";
> reg = <0x01c20400 0x400>;
> --
> 1.9.0
>
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[linux-sunxi] Re: [PATCH 1/7] spi: sunxi: Add Allwinner A10 SPI controller driver

2014-02-22 Thread Mark Brown
On Sat, Feb 22, 2014 at 10:35:53PM +0100, Maxime Ripard wrote:
> The older Allwinner SoCs (A10, A13, A10s and A20) all have the same SPI
> controller.

Applied, thanks.  Please differentiate between these two devices in the
subject line when sending patches for example by using "sun6i" and
"sun4i".


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[linux-sunxi] Re: how to flash android in NAND without phonixsuite ..

2014-02-22 Thread Patrick Wood
You're missing the boot partition.  Read this:  
http://www.cubieforums.net/index.php/topic,511.0.html
And this:  http://cubieforums.net/index.php?topic=511.msg2408#msg2408

On Thursday, February 20, 2014 1:00:08 AM UTC-5, Puneet B wrote:
>
> Hi all,
>
> I am using A20 humming bird board.
>
> i want to boot android from NAND.
>
> i booted android from sd card successfully.
>
> i want to know boot0 and boot1 , is it common for all A20 board.
>
> and to which sector i need to flash this.
>
> Regards
> Punith
>

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Re: [linux-sunxi] Re: A20 + OV5640 (parallel) issues

2014-02-22 Thread jonsm...@gmail.com
On Fri, Feb 21, 2014 at 9:51 AM, Ivan Kozic  wrote:
> Hmm, I think what you've sent is not an app, but a support file for V4L.
> Either way, I can tell what the issue is:

It is the camera support library that Allwinner has supplied

jonsmirl@terra:/work/cubietruck-android$ ls
android42/device/softwinner/common/hardware/camera -1
Android.mk
BufferListManager.cpp
BufferListManager.h
CallbackNotifier.cpp
CallbackNotifier.h
CameraDebug.h
CameraHardware2.cpp
CameraHardware2.h
CameraHardware.cpp
CameraHardware.h
CCameraConfig.cpp
CCameraConfig.h
HALCameraFactory.cpp
HALCameraFactory.h
OSAL_Mutex.c
OSAL_Mutex.h
OSAL_Queue.c
OSAL_Queue.h
PreviewWindow.cpp
PreviewWindow.h
V4L2CameraDevice2.cpp
V4L2CameraDevice2.h
V4L2CameraDevice.cpp
V4L2CameraDevice.h
jonsmirl@terra:/work/cubietruck-android$

>
> So, V4L2CameraDevice::captureThread is probably called somehow before
> V4L2CameraDevice::startDevice in the main app. startDevice needs to be
> called first and initialize the V4L buffers - from what I see in the current
> A20 driver - you only need to do S_FMT followed by QUERYBUF and then QBUF
> ioctls. This is a bit dirty, but quick and should work.
>
> When V4L2CameraDevice::captureThread is started it basically checks whether
> the buffer is ready to be dequeued with v4l2WaitCameraReady, and then tries
> to dequeue a buffer with getPreviewFrame, and fails.
>
> Something in this pipeline is not correct. I cannot look more into the code
> now, but it's quite strange how select() in v4l2WaitCameraReady() passes and
> then yet DQBUF fails. This is a bit puzzling for me.
>
> Please take a look at the following file:
> https://github.com/allwinner-ics/lichee_linux-3.0/blob/master/drivers/media/video/sun4i_csi/test/app_test_ok.c
>
> It has the correct way of how you should use the OV5640 driver - S_FMT,
> QUERYBUF and QBUF are done in main_test() - you also have a loop there which
> calls read_frame(), where DQBUF is performed.
> Check the way V4L is used in this app against your app - I'm pretty sure you
> have an error somewhere.
>
> Regarding the AML8726 kernel - I don't know where you've found ov5640
> driver, but I cannot find it in the tar archive.
>
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Re: [linux-sunxi] Converting S3C code to sunxi code

2014-02-22 Thread Olliver Schinagl

On 02/21/14 22:05, Almo Nito wrote:

Can Someone please help converting the following code into sunxi code:

#define GTP_RST_PORTS5PV210_GPJ3(6)
#define GTP_INT_PORTS5PV210_GPH1(3)
#define GTP_INT_IRQ gpio_to_irq(GTP_INT_PORT)
#define GTP_INT_CFG S3C_GPIO_SFN(0xF)

#define GTP_GPIO_AS_INPUT(pin)  do{\
 gpio_direction_input(pin);\
 s3c_gpio_setpull(pin,
S3C_GPIO_PULL_NONE);\
 }while(0)
#define GTP_GPIO_AS_INT(pin)do{\
 GTP_GPIO_AS_INPUT(pin);\
 s3c_gpio_cfgpin(pin,
GTP_INT_CFG);\
 }while(0)
#define GTP_GPIO_GET_VALUE(pin) gpio_get_value(pin)
#define GTP_GPIO_OUTPUT(pin,level)  gpio_direction_output(pin,level)
#define GTP_GPIO_REQUEST(pin, label)gpio_request(pin, label)
#define GTP_GPIO_FREE(pin)  gpio_free(pin)
#define GTP_IRQ_TAB {IRQ_TYPE_EDGE_RISING,
IRQ_TYPE_EDGE_FALLING, IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_HIGH}


This would be very very helpful for me

https://github.com/oliv3r/u-boot-sunxi/blob/8dde68488f9c9b62f41a9cb1a6403660c80a3f60/arch/arm/include/asm/arch-sunxi/gpio.h

this is how it's handled in u-boot.

not quite sure what youa re after though ...

oliver


Thank you very much



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[linux-sunxi] Re: [RFC 0/3] ahci_platform: drop support for a bunch of obsolete platform device types

2014-02-22 Thread Tejun Heo
On Sat, Feb 22, 2014 at 05:22:52PM +0100, Hans de Goede wrote:
> Hi Tejun, Marek,
> 
> This series, which is to be applied on top of my ahci_platform restructering
> series,  mostly speaks for itself.
> 
> I've some doubts about the 2nd patch, which removes the imx53-ahci platform
> device support from ahci_platform.c. I'm pretty sure this is obsolete and
> replaced by Marek's ahci_imx.c work, but not 100%, which is why this series
> is marked as RFC. Marek can you confirm that the code the 2nd patch removes
> is inded dead code?
> 
> Tejun, if Marek confirms this is indeed dead code feel free to apply this
> despite the RFC marking.

Applied 1-3 to libata/for-3.15.

Thanks.

-- 
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[linux-sunxi] Re: [RFC 0/3] ahci_platform: drop support for a bunch of obsolete platform device types

2014-02-22 Thread Marek Vasut
On Saturday, February 22, 2014 at 05:22:52 PM, Hans de Goede wrote:
> Hi Tejun, Marek,
> 
> This series, which is to be applied on top of my ahci_platform
> restructering series,  mostly speaks for itself.
> 
> I've some doubts about the 2nd patch, which removes the imx53-ahci platform
> device support from ahci_platform.c. I'm pretty sure this is obsolete and
> replaced by Marek's ahci_imx.c work, but not 100%, which is why this series
> is marked as RFC. Marek can you confirm that the code the 2nd patch removes
> is inded dead code?

I can confirm that with your sunxi 15-patch patchset + these three patches , 
the 
SATA port still works on i.MX53 DENX M53EVK board. The behavior from the user's 
point of view is unchanged.

> Tejun, if Marek confirms this is indeed dead code feel free to apply this
> despite the RFC marking.
> 
> Thanks & Regards,
> 
> Hans

Best regards,
Marek Vasut

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[linux-sunxi] Re: [PATCH v7 13/15] ARM: sun4i: dt: Remove grouping + simple-bus compatible for regulators

2014-02-22 Thread Maxime Ripard
Hi,

On Sat, Feb 22, 2014 at 04:53:42PM +0100, Hans de Goede wrote:
> According to Documentation/devicetree/bindings/regulator/regulator.txt
> regulator nodes should not be placed under 'simple-bus'.
> 
> Mark Rutland also explains about it at:
> http://www.spinics.net/lists/linux-usb/msg101497.html
> 
> Signed-off-by: Hans de Goede 

Applied in my sunxi/dt-for-3.15 branch.

Thanks!
Maxime

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[linux-sunxi] [PATCH 5/7] ARM: dt: sun5i: Add A13 SPI controller nodes

2014-02-22 Thread Maxime Ripard
The A13 has 3 SPI controllers compatible with the one found in the A10. Add
them in the DT.

Signed-off-by: Maxime Ripard 
---
 arch/arm/boot/dts/sun5i-a13.dtsi | 33 +
 1 file changed, 33 insertions(+)

diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi
index 24cd86cb..7102d12 100644
--- a/arch/arm/boot/dts/sun5i-a13.dtsi
+++ b/arch/arm/boot/dts/sun5i-a13.dtsi
@@ -298,6 +298,39 @@
#size-cells = <1>;
ranges;
 
+   spi0: spi@01c05000 {
+   compatible = "allwinner,sun4i-a10-spi";
+   reg = <0x01c05000 0x1000>;
+   interrupts = <10>;
+   clocks = <&ahb_gates 20>, <&spi0_clk>;
+   clock-names = "ahb", "mod";
+   status = "disabled";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
+
+   spi1: spi@01c06000 {
+   compatible = "allwinner,sun4i-a10-spi";
+   reg = <0x01c06000 0x1000>;
+   interrupts = <11>;
+   clocks = <&ahb_gates 21>, <&spi1_clk>;
+   clock-names = "ahb", "mod";
+   status = "disabled";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
+
+   spi2: spi@01c17000 {
+   compatible = "allwinner,sun4i-a10-spi";
+   reg = <0x01c17000 0x1000>;
+   interrupts = <12>;
+   clocks = <&ahb_gates 22>, <&spi2_clk>;
+   clock-names = "ahb", "mod";
+   status = "disabled";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
+
intc: interrupt-controller@01c20400 {
compatible = "allwinner,sun4i-ic";
reg = <0x01c20400 0x400>;
-- 
1.9.0

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[linux-sunxi] [PATCH 2/7] ARM: dt: sun7i: Add A20 SPI controller nodes

2014-02-22 Thread Maxime Ripard
The A20 has 4 SPI controllers compatible with the one found in the A10. Add
them in the DT.

Signed-off-by: Maxime Ripard 
---
 arch/arm/boot/dts/sun7i-a20.dtsi | 44 
 1 file changed, 44 insertions(+)

diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index d00fbf8..0f0ee58 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -401,6 +401,28 @@
#size-cells = <1>;
ranges;
 
+   spi0: spi@01c05000 {
+   compatible = "allwinner,sun4i-a10-spi";
+   reg = <0x01c05000 0x1000>;
+   interrupts = <0 10 4>;
+   clocks = <&ahb_gates 20>, <&spi0_clk>;
+   clock-names = "ahb", "mod";
+   status = "disabled";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
+
+   spi1: spi@01c06000 {
+   compatible = "allwinner,sun4i-a10-spi";
+   reg = <0x01c06000 0x1000>;
+   interrupts = <0 11 4>;
+   clocks = <&ahb_gates 21>, <&spi1_clk>;
+   clock-names = "ahb", "mod";
+   status = "disabled";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
+
emac: ethernet@01c0b000 {
compatible = "allwinner,sun4i-a10-emac";
reg = <0x01c0b000 0x1000>;
@@ -417,6 +439,28 @@
#size-cells = <0>;
};
 
+   spi2: spi@01c17000 {
+   compatible = "allwinner,sun4i-a10-spi";
+   reg = <0x01c17000 0x1000>;
+   interrupts = <0 12 4>;
+   clocks = <&ahb_gates 22>, <&spi2_clk>;
+   clock-names = "ahb", "mod";
+   status = "disabled";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
+
+   spi3: spi@01c1f000 {
+   compatible = "allwinner,sun4i-a10-spi";
+   reg = <0x01c1f000 0x1000>;
+   interrupts = <0 50 4>;
+   clocks = <&ahb_gates 23>, <&spi3_clk>;
+   clock-names = "ahb", "mod";
+   status = "disabled";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
+
pio: pinctrl@01c20800 {
compatible = "allwinner,sun7i-a20-pinctrl";
reg = <0x01c20800 0x400>;
-- 
1.9.0

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[linux-sunxi] [PATCH 7/7] ARM: dts: sun7i: Enable the SPI controllers of the A20-olinuxino-micro

2014-02-22 Thread Maxime Ripard
The A20-Olinuxino-micro has two SPI bus exposed on its UEXT connectors, enable
them.

Signed-off-by: Maxime Ripard 
---
 arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | 17 +
 1 file changed, 17 insertions(+)

diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts 
b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
index b02a796..9d98316 100644
--- a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
+++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
@@ -18,7 +18,24 @@
model = "Olimex A20-Olinuxino Micro";
compatible = "olimex,a20-olinuxino-micro", "allwinner,sun7i-a20";
 
+   aliases {
+   spi0 = &spi1;
+   spi1 = &spi2;
+   };
+
soc@01c0 {
+   spi1: spi@01c06000 {
+   pinctrl-names = "default";
+   pinctrl-0 = <&spi1_pins_a>;
+   status = "okay";
+   };
+
+   spi2: spi@01c17000 {
+   pinctrl-names = "default";
+   pinctrl-0 = <&spi2_pins_a>;
+   status = "okay";
+   };
+
pinctrl@01c20800 {
led_pins_olinuxino: led_pins@0 {
allwinner,pins = "PH2";
-- 
1.9.0

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[linux-sunxi] [PATCH 0/7] Add Allwinner A10 SPI Controller Driver

2014-02-22 Thread Maxime Ripard
Hi,

This patchset brings support for the SPI controller found in the
Allwinner A10 and derived SoCs.

Even though the controller supports DMA, the driver only supports PIO
mode for now. This driver will be used to bring up and test DMA on the
SoC, so support for the DMA will come eventually.

It doesn't support transfer larger than the FIFO size (64 bytes) for
now, It's one of the things that will be fixed whenever we will have
DMA support.

Thanks!
Maxime

Maxime Ripard (7):
  spi: sunxi: Add Allwinner A10 SPI controller driver
  ARM: dt: sun7i: Add A20 SPI controller nodes
  ARM: dt: sun4i: Add A10 SPI controller nodes
  ARM: dt: sun5i: Add A10s SPI controller nodes
  ARM: dt: sun5i: Add A13 SPI controller nodes
  ARM: dt: sun7i: Add SPI muxing options
  ARM: dts: sun7i: Enable the SPI controllers of the A20-olinuxino-micro

 .../devicetree/bindings/spi/spi-sun4i.txt  |  24 ++
 arch/arm/boot/dts/sun4i-a10.dtsi   |  44 ++
 arch/arm/boot/dts/sun5i-a10s.dtsi  |  33 ++
 arch/arm/boot/dts/sun5i-a13.dtsi   |  33 ++
 arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts|  17 +
 arch/arm/boot/dts/sun7i-a20.dtsi   |  58 +++
 drivers/spi/Kconfig|   6 +
 drivers/spi/Makefile   |   1 +
 drivers/spi/spi-sun4i.c| 477 +
 9 files changed, 693 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/spi/spi-sun4i.txt
 create mode 100644 drivers/spi/spi-sun4i.c

-- 
1.9.0

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[linux-sunxi] [PATCH 4/7] ARM: dt: sun5i: Add A10s SPI controller nodes

2014-02-22 Thread Maxime Ripard
The A10s has 3 SPI controllers compatible with the one found in the A10. Add
them in the DT.

Signed-off-by: Maxime Ripard 
---
 arch/arm/boot/dts/sun5i-a10s.dtsi | 33 +
 1 file changed, 33 insertions(+)

diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi 
b/arch/arm/boot/dts/sun5i-a10s.dtsi
index df90a29..b2cb5dc 100644
--- a/arch/arm/boot/dts/sun5i-a10s.dtsi
+++ b/arch/arm/boot/dts/sun5i-a10s.dtsi
@@ -300,6 +300,28 @@
#size-cells = <1>;
ranges;
 
+   spi0: spi@01c05000 {
+   compatible = "allwinner,sun4i-a10-spi";
+   reg = <0x01c05000 0x1000>;
+   interrupts = <10>;
+   clocks = <&ahb_gates 20>, <&spi0_clk>;
+   clock-names = "ahb", "mod";
+   status = "disabled";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
+
+   spi1: spi@01c06000 {
+   compatible = "allwinner,sun4i-a10-spi";
+   reg = <0x01c06000 0x1000>;
+   interrupts = <11>;
+   clocks = <&ahb_gates 21>, <&spi1_clk>;
+   clock-names = "ahb", "mod";
+   status = "disabled";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
+
emac: ethernet@01c0b000 {
compatible = "allwinner,sun4i-a10-emac";
reg = <0x01c0b000 0x1000>;
@@ -316,6 +338,17 @@
#size-cells = <0>;
};
 
+   spi2: spi@01c17000 {
+   compatible = "allwinner,sun4i-a10-spi";
+   reg = <0x01c17000 0x1000>;
+   interrupts = <12>;
+   clocks = <&ahb_gates 22>, <&spi2_clk>;
+   clock-names = "ahb", "mod";
+   status = "disabled";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
+
intc: interrupt-controller@01c20400 {
compatible = "allwinner,sun4i-ic";
reg = <0x01c20400 0x400>;
-- 
1.9.0

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[linux-sunxi] [PATCH 6/7] ARM: dt: sun7i: Add SPI muxing options

2014-02-22 Thread Maxime Ripard
Signed-off-by: Maxime Ripard 
---
 arch/arm/boot/dts/sun7i-a20.dtsi | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index 0f0ee58..6161fd8 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -571,6 +571,20 @@
allwinner,drive = <3>;
allwinner,pull = <0>;
};
+
+   spi1_pins_a: spi1@0 {
+   allwinner,pins = "PI16", "PI17", "PI18", "PI19";
+   allwinner,function = "spi1";
+   allwinner,drive = <0>;
+   allwinner,pull = <0>;
+   };
+
+   spi2_pins_a: spi2@0 {
+   allwinner,pins = "PC19", "PC20", "PC21", "PC22";
+   allwinner,function = "spi2";
+   allwinner,drive = <0>;
+   allwinner,pull = <0>;
+   };
};
 
timer@01c20c00 {
-- 
1.9.0

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[linux-sunxi] [PATCH 3/7] ARM: dt: sun4i: Add A10 SPI controller nodes

2014-02-22 Thread Maxime Ripard
The A10 has 4 SPI controllers that are now supported. Add them in the DT.

Signed-off-by: Maxime Ripard 
---
 arch/arm/boot/dts/sun4i-a10.dtsi | 44 
 1 file changed, 44 insertions(+)

diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index f6f41d6..157bc09 100644
--- a/arch/arm/boot/dts/sun4i-a10.dtsi
+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
@@ -339,6 +339,28 @@
#size-cells = <1>;
ranges;
 
+   spi0: spi@01c05000 {
+   compatible = "allwinner,sun4i-a10-spi";
+   reg = <0x01c05000 0x1000>;
+   interrupts = <10>;
+   clocks = <&ahb_gates 20>, <&spi0_clk>;
+   clock-names = "ahb", "mod";
+   status = "disabled";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
+
+   spi1: spi@01c06000 {
+   compatible = "allwinner,sun4i-a10-spi";
+   reg = <0x01c06000 0x1000>;
+   interrupts = <11>;
+   clocks = <&ahb_gates 21>, <&spi1_clk>;
+   clock-names = "ahb", "mod";
+   status = "disabled";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
+
emac: ethernet@01c0b000 {
compatible = "allwinner,sun4i-a10-emac";
reg = <0x01c0b000 0x1000>;
@@ -355,6 +377,28 @@
#size-cells = <0>;
};
 
+   spi2: spi@01c17000 {
+   compatible = "allwinner,sun4i-a10-spi";
+   reg = <0x01c17000 0x1000>;
+   interrupts = <12>;
+   clocks = <&ahb_gates 22>, <&spi2_clk>;
+   clock-names = "ahb", "mod";
+   status = "disabled";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
+
+   spi3: spi@01c1f000 {
+   compatible = "allwinner,sun4i-a10-spi";
+   reg = <0x01c1f000 0x1000>;
+   interrupts = <50>;
+   clocks = <&ahb_gates 23>, <&spi3_clk>;
+   clock-names = "ahb", "mod";
+   status = "disabled";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
+
intc: interrupt-controller@01c20400 {
compatible = "allwinner,sun4i-ic";
reg = <0x01c20400 0x400>;
-- 
1.9.0

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[linux-sunxi] [PATCH 1/7] spi: sunxi: Add Allwinner A10 SPI controller driver

2014-02-22 Thread Maxime Ripard
The older Allwinner SoCs (A10, A13, A10s and A20) all have the same SPI
controller.

Unfortunately, this SPI controller, even though quite similar, is significantly
different from the recently supported A31 SPI controller (different registers
offset, split/merged registers, etc.). Supporting both controllers in a single
driver would be unreasonable, hence the addition of a new driver.

Like its more recent counterpart, it supports DMA, but the driver only does PIO
until we have a dmaengine driver for this platform.

Signed-off-by: Maxime Ripard 
---
 .../devicetree/bindings/spi/spi-sun4i.txt  |  24 ++
 drivers/spi/Kconfig|   6 +
 drivers/spi/Makefile   |   1 +
 drivers/spi/spi-sun4i.c| 477 +
 4 files changed, 508 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/spi/spi-sun4i.txt
 create mode 100644 drivers/spi/spi-sun4i.c

diff --git a/Documentation/devicetree/bindings/spi/spi-sun4i.txt 
b/Documentation/devicetree/bindings/spi/spi-sun4i.txt
new file mode 100644
index 000..de827f5
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/spi-sun4i.txt
@@ -0,0 +1,24 @@
+Allwinner A10 SPI controller
+
+Required properties:
+- compatible: Should be "allwinner,sun4-a10-spi".
+- reg: Should contain register location and length.
+- interrupts: Should contain interrupt.
+- clocks: phandle to the clocks feeding the SPI controller. Two are
+  needed:
+  - "ahb": the gated AHB parent clock
+  - "mod": the parent module clock
+- clock-names: Must contain the clock names described just above
+
+Example:
+
+spi1: spi@01c06000 {
+   compatible = "allwinner,sun4i-a10-spi";
+   reg = <0x01c06000 0x1000>;
+   interrupts = <11>;
+   clocks = <&ahb_gates 21>, <&spi1_clk>;
+   clock-names = "ahb", "mod";
+   status = "disabled";
+   #address-cells = <1>;
+   #size-cells = <0>;
+};
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index af1a875..e9f40ff 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -446,6 +446,12 @@ config SPI_SIRF
help
  SPI driver for CSR SiRFprimaII SoCs
 
+config SPI_SUN4I
+   tristate "Allwinner A10 SoCs SPI controller"
+   depends on ARCH_SUNXI || COMPILE_TEST
+   help
+ SPI driver for Allwinner sun4i, sun5i and sun7i SoCs
+
 config SPI_SUN6I
tristate "Allwinner A31 SPI controller"
depends on ARCH_SUNXI || COMPILE_TEST
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 13b6ccf..65f4993 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -70,6 +70,7 @@ obj-$(CONFIG_SPI_SH_HSPI) += spi-sh-hspi.o
 obj-$(CONFIG_SPI_SH_MSIOF) += spi-sh-msiof.o
 obj-$(CONFIG_SPI_SH_SCI)   += spi-sh-sci.o
 obj-$(CONFIG_SPI_SIRF) += spi-sirf.o
+obj-$(CONFIG_SPI_SUN4I)+= spi-sun4i.o
 obj-$(CONFIG_SPI_SUN6I)+= spi-sun6i.o
 obj-$(CONFIG_SPI_TEGRA114) += spi-tegra114.o
 obj-$(CONFIG_SPI_TEGRA20_SFLASH)   += spi-tegra20-sflash.o
diff --git a/drivers/spi/spi-sun4i.c b/drivers/spi/spi-sun4i.c
new file mode 100644
index 000..3f82705
--- /dev/null
+++ b/drivers/spi/spi-sun4i.c
@@ -0,0 +1,477 @@
+/*
+ * Copyright (C) 2012 - 2014 Allwinner Tech
+ * Pan Nan 
+ *
+ * Copyright (C) 2014 Maxime Ripard
+ * Maxime Ripard 
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#define SUN4I_FIFO_DEPTH   64
+
+#define SUN4I_RXDATA_REG   0x00
+
+#define SUN4I_TXDATA_REG   0x04
+
+#define SUN4I_CTL_REG  0x08
+#define SUN4I_CTL_ENABLE   BIT(0)
+#define SUN4I_CTL_MASTER   BIT(1)
+#define SUN4I_CTL_CPHA BIT(2)
+#define SUN4I_CTL_CPOL BIT(3)
+#define SUN4I_CTL_CS_ACTIVE_LOWBIT(4)
+#define SUN4I_CTL_LMTF BIT(6)
+#define SUN4I_CTL_TF_RST   BIT(8)
+#define SUN4I_CTL_RF_RST   BIT(9)
+#define SUN4I_CTL_XCH  BIT(10)
+#define SUN4I_CTL_CS_MASK  0x3000
+#define SUN4I_CTL_CS(cs)   (((cs) << 12) & 
SUN4I_CTL_CS_MASK)
+#define SUN4I_CTL_DHB  BIT(15)
+#define SUN4I_CTL_CS_MANUALBIT(16)
+#define SUN4I_CTL_CS_LEVEL BIT(17)
+#define SUN4I_CTL_TP   BIT(18)
+
+#define SUN4I_INT_CTL_REG  0x0c
+#define SUN4I_INT_CTL_TC   BIT(16)
+
+#define SUN4I_INT_STA_REG   

Re: [linux-sunxi] Fedora 19 update causes bootloader to fail?

2014-02-22 Thread Oliver Schinagl

"False alarm"

I should have cheked it out first; After mounting my SD card in the 
desktop, I noticed the boot partition had a new kernel and everything 
was overwritten. ./select-board.sh fixed it, so no biggie.


Is it an idea to remove /dev/mmcblk0p1 from fstab?

oliver

On 02/22/14 20:58, Oliver Schinagl wrote:

Hey all,

concider this potentially more a dump of my log. I've spent the last 6!!
hours doing a yum update; and after rebooting, I got spewed this.
Appearantly the yum update has overwritten. I haven't even looked at the
log yet; But it looks like something got updated that wasn't supposed to
be ;) Is there anything to prevent this for a common user to have it happen?

Olliver

[23004.163205] Restarting system.
[23005.242007] [hotplug]: try to kill cpu:1 failed!

U-Boot SPL 2013.10-rc2-00118-gbf62731 (Oct 13 2013 - 11:53:07)
Board: Cubietruck
DRAM: 2048 MiB
CPU: 96000Hz, AXI/AHB/APB: 3/2/2
spl: not an uImage at 1600


U-Boot 2013.10-rc2-00118-gbf62731 (Oct 13 2013 - 11:53:07) Allwinner
Technology

CPU:   Allwinner A20 (SUN7I)
Board: Cubietruck
I2C:   ready
DRAM:  2 GiB
MMC:   SUNXI SD/MMC: 0
In:serial
Out:   serial
Err:   serial
Net:   emac
Hit any key to stop autoboot:  0
256 bytes read in 9 ms (27.3 KiB/s)
Loaded environment from uEnv.txt
19282 bytes read in 9 ms (2 MiB/s)
Jumping to boot.scr
## Executing script at 4400
Welcome to a-b-c 0.56.

Using defaults for sun4i-a10-cubieboard.dtb, but will not load dtb
during startup.
Will scan for kernels on mmc, using ext2 filesystems with bootm

Starting menu init

Using kernel k2 (3.12.9-201.fc19.armv7hl).
Auto-booting 3.12.9-201.fc19.armv7hl in 3 seconds. Type ^C to abort then
run menu for help.
   3 2 1...
5064952 bytes read in 273 ms (17.7 MiB/s)
11865694 bytes read in 603 ms (18.8 MiB/s)
bootargs are ro rootwait rhgb quiet
root=UUID=33de6a91-2289-4ec7-9703-2b03a9d51725 console=ttyS0,115200
## Booting kernel from Legacy Image at 4030 ...
 Image Name:   3.12.9-201.fc19.armv7hl
 Created:  2014-02-22  18:53:35 UTC
 Image Type:   ARM Linux Kernel Image (uncompressed)
 Data Size:5064888 Bytes = 4.8 MiB
 Load Address: 8000
 Entry Point:  8000
 Verifying Checksum ... OK
## Loading init Ramdisk from Legacy Image at 4160 ...
 Image Name:   initramfs
 Created:  2014-02-22  18:53:38 UTC
 Image Type:   ARM Linux RAMDisk Image (uncompressed)
 Data Size:11865630 Bytes = 11.3 MiB
 Load Address: 
 Entry Point:  
 Verifying Checksum ... OK
ERROR: Did not find a cmdline Flattened Device Tree
Could not find a valid device tree
bootargs are ro rootwait rhgb quiet
root=UUID=33de6a91-2289-4ec7-9703-2b03a9d51725 console=ttyS0,115200
## Booting kernel from Legacy Image at 4030 ...
 Image Name:   3.12.9-201.fc19.armv7hl
 Created:  2014-02-22  18:53:35 UTC
 Image Type:   ARM Linux Kernel Image (uncompressed)
 Data Size:5064888 Bytes = 4.8 MiB
 Load Address: 8000
 Entry Point:  8000
 Verifying Checksum ... OK
## Loading init Ramdisk from Legacy Image at 4160 ...
 Image Name:   initramfs
 Created:  2014-02-22  18:53:38 UTC
 Image Type:   ARM Linux RAMDisk Image (uncompressed)
 Data Size:11865630 Bytes = 11.3 MiB
 Load Address: 
 Entry Point:  
 Verifying Checksum ... OK
ERROR: Did not find a cmdline Flattened Device Tree
Could not find a valid device tree
bootargs are ro rootwait rhgb quiet
root=UUID=33de6a91-2289-4ec7-9703-2b03a9d51725 console=ttyS0,115200
## Booting kernel from Legacy Image at 4030 ...
 Image Name:   3.12.9-201.fc19.armv7hl
 Created:  2014-02-22  18:53:35 UTC
 Image Type:   ARM Linux Kernel Image (uncompressed)
 Data Size:5064888 Bytes = 4.8 MiB
 Load Address: 8000
 Entry Point:  8000
 Verifying Checksum ... OK
## Loading init Ramdisk from Legacy Image at 4160 ...
 Image Name:   initramfs
 Created:  2014-02-22  18:53:38 UTC
 Image Type:   ARM Linux RAMDisk Image (uncompressed)
 Data Size:11865630 Bytes = 11.3 MiB
 Load Address: 
 Entry Point:  
 Verifying Checksum ... OK
ERROR: Did not find a cmdline Flattened Device Tree
Could not find a valid device tree
bootargs are ro rootwait rhgb quiet
root=UUID=33de6a91-2289-4ec7-9703-2b03a9d51725 console=ttyS0,115200
## Booting kernel from Legacy Image at 4030 ...
 Image Name:   3.12.9-201.fc19.armv7hl
 Created:  2014-02-22  18:53:35 UTC
 Image Type:   ARM Linux Kernel Image (uncompressed)
 Data Size:5064888 Bytes = 4.8 MiB
 Load Address: 8000
 Entry Point:  8000
 Verifying Checksum ... OK
## Loading init Ramdisk from Legacy Image at 4160 ...
 Image Name:   initramfs
 Created:  2014-02-22  18:53:38 UTC
 Image Type:   ARM Linux RAMDisk Image (uncompressed)
 Data Size:11865630 Bytes = 11.3 MiB
 Load Address: 000

[linux-sunxi] Re: [PATCH v7 07/15] ARM: sunxi: Add support for Allwinner SUNXi SoCs sata to ahci_platform

2014-02-22 Thread Tejun Heo
On Sat, Feb 22, 2014 at 04:53:36PM +0100, Hans de Goede wrote:
...
> +static int ahci_sunxi_phy_init(struct device *dev, void __iomem *reg_base)
> +{
> + u32 reg_val;
> + int timeout;
> +
> + /* This magic is from the original code */
> + writel(0, reg_base + AHCI_RWCR);
> + mdelay(5);
> +
> + sunxi_setbits(reg_base + AHCI_PHYCS1R, BIT(19));
> + sunxi_clrsetbits(reg_base + AHCI_PHYCS0R,
> +  (0x7 << 24),
> +  (0x5 << 24) | BIT(23) | BIT(18));
> + sunxi_clrsetbits(reg_base + AHCI_PHYCS1R,
> +  (0x3 << 16) | (0x1f << 8) | (0x3 << 6),
> +  (0x2 << 16) | (0x6 << 8) | (0x2 << 6));
> + sunxi_setbits(reg_base + AHCI_PHYCS1R, BIT(28) | BIT(15));
> + sunxi_clrbits(reg_base + AHCI_PHYCS1R, BIT(19));
> + sunxi_clrsetbits(reg_base + AHCI_PHYCS0R,
> +  (0x7 << 20), (0x3 << 20));
> + sunxi_clrsetbits(reg_base + AHCI_PHYCS2R,
> +  (0x1f << 5), (0x19 << 5));
> + mdelay(5);

Please use msleep() instead.  This is called with full process
context.  mdelay() is almost always wrong.  Even if the hardware is
broken enough to require millisec level breather, the better thing to
do would be using threaded handler and using msleep(), not mdelay().

Thanks.

-- 
tejun

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[linux-sunxi] Re: [PATCH v7 00/15] ahci: library-ise ahci_platform, add sunxi driver and cleanup imx driver

2014-02-22 Thread Tejun Heo
On Sat, Feb 22, 2014 at 05:26:48PM +0100, Hans de Goede wrote:
> Tejun, can you please add patches 1-12 to your ata tree for 3.15 ?

Applied 1-12 to libata/for-3.15 with comment format slightly updated.

Thanks.

-- 
tejun

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[linux-sunxi] Fedora 19 update causes bootloader to fail?

2014-02-22 Thread Oliver Schinagl

Hey all,

concider this potentially more a dump of my log. I've spent the last 6!! 
hours doing a yum update; and after rebooting, I got spewed this. 
Appearantly the yum update has overwritten. I haven't even looked at the 
log yet; But it looks like something got updated that wasn't supposed to 
be ;) Is there anything to prevent this for a common user to have it happen?


Olliver

[23004.163205] Restarting system.
[23005.242007] [hotplug]: try to kill cpu:1 failed!

U-Boot SPL 2013.10-rc2-00118-gbf62731 (Oct 13 2013 - 11:53:07)
Board: Cubietruck
DRAM: 2048 MiB
CPU: 96000Hz, AXI/AHB/APB: 3/2/2
spl: not an uImage at 1600


U-Boot 2013.10-rc2-00118-gbf62731 (Oct 13 2013 - 11:53:07) Allwinner 
Technology


CPU:   Allwinner A20 (SUN7I)
Board: Cubietruck
I2C:   ready
DRAM:  2 GiB
MMC:   SUNXI SD/MMC: 0
In:serial
Out:   serial
Err:   serial
Net:   emac
Hit any key to stop autoboot:  0
256 bytes read in 9 ms (27.3 KiB/s)
Loaded environment from uEnv.txt
19282 bytes read in 9 ms (2 MiB/s)
Jumping to boot.scr
## Executing script at 4400
Welcome to a-b-c 0.56.

Using defaults for sun4i-a10-cubieboard.dtb, but will not load dtb 
during startup.

Will scan for kernels on mmc, using ext2 filesystems with bootm

Starting menu init

Using kernel k2 (3.12.9-201.fc19.armv7hl).
Auto-booting 3.12.9-201.fc19.armv7hl in 3 seconds. Type ^C to abort then 
run menu for help.

 3 2 1...
5064952 bytes read in 273 ms (17.7 MiB/s)
11865694 bytes read in 603 ms (18.8 MiB/s)
bootargs are ro rootwait rhgb quiet 
root=UUID=33de6a91-2289-4ec7-9703-2b03a9d51725 console=ttyS0,115200

## Booting kernel from Legacy Image at 4030 ...
   Image Name:   3.12.9-201.fc19.armv7hl
   Created:  2014-02-22  18:53:35 UTC
   Image Type:   ARM Linux Kernel Image (uncompressed)
   Data Size:5064888 Bytes = 4.8 MiB
   Load Address: 8000
   Entry Point:  8000
   Verifying Checksum ... OK
## Loading init Ramdisk from Legacy Image at 4160 ...
   Image Name:   initramfs
   Created:  2014-02-22  18:53:38 UTC
   Image Type:   ARM Linux RAMDisk Image (uncompressed)
   Data Size:11865630 Bytes = 11.3 MiB
   Load Address: 
   Entry Point:  
   Verifying Checksum ... OK
ERROR: Did not find a cmdline Flattened Device Tree
Could not find a valid device tree
bootargs are ro rootwait rhgb quiet 
root=UUID=33de6a91-2289-4ec7-9703-2b03a9d51725 console=ttyS0,115200

## Booting kernel from Legacy Image at 4030 ...
   Image Name:   3.12.9-201.fc19.armv7hl
   Created:  2014-02-22  18:53:35 UTC
   Image Type:   ARM Linux Kernel Image (uncompressed)
   Data Size:5064888 Bytes = 4.8 MiB
   Load Address: 8000
   Entry Point:  8000
   Verifying Checksum ... OK
## Loading init Ramdisk from Legacy Image at 4160 ...
   Image Name:   initramfs
   Created:  2014-02-22  18:53:38 UTC
   Image Type:   ARM Linux RAMDisk Image (uncompressed)
   Data Size:11865630 Bytes = 11.3 MiB
   Load Address: 
   Entry Point:  
   Verifying Checksum ... OK
ERROR: Did not find a cmdline Flattened Device Tree
Could not find a valid device tree
bootargs are ro rootwait rhgb quiet 
root=UUID=33de6a91-2289-4ec7-9703-2b03a9d51725 console=ttyS0,115200

## Booting kernel from Legacy Image at 4030 ...
   Image Name:   3.12.9-201.fc19.armv7hl
   Created:  2014-02-22  18:53:35 UTC
   Image Type:   ARM Linux Kernel Image (uncompressed)
   Data Size:5064888 Bytes = 4.8 MiB
   Load Address: 8000
   Entry Point:  8000
   Verifying Checksum ... OK
## Loading init Ramdisk from Legacy Image at 4160 ...
   Image Name:   initramfs
   Created:  2014-02-22  18:53:38 UTC
   Image Type:   ARM Linux RAMDisk Image (uncompressed)
   Data Size:11865630 Bytes = 11.3 MiB
   Load Address: 
   Entry Point:  
   Verifying Checksum ... OK
ERROR: Did not find a cmdline Flattened Device Tree
Could not find a valid device tree
bootargs are ro rootwait rhgb quiet 
root=UUID=33de6a91-2289-4ec7-9703-2b03a9d51725 console=ttyS0,115200

## Booting kernel from Legacy Image at 4030 ...
   Image Name:   3.12.9-201.fc19.armv7hl
   Created:  2014-02-22  18:53:35 UTC
   Image Type:   ARM Linux Kernel Image (uncompressed)
   Data Size:5064888 Bytes = 4.8 MiB
   Load Address: 8000
   Entry Point:  8000
   Verifying Checksum ... OK
## Loading init Ramdisk from Legacy Image at 4160 ...
   Image Name:   initramfs
   Created:  2014-02-22  18:53:38 UTC
   Image Type:   ARM Linux RAMDisk Image (uncompressed)
   Data Size:11865630 Bytes = 11.3 MiB
   Load Address: 
   Entry Point:  
   Verifying Checksum ... OK
ERROR: Did not find a cmdline Flattened Device Tree
Could not find a valid device tree
The last operation failed.

a-b-c main menu
---
clist: for a list of known board configurations.
klist: for a list of kernels.
dtblist: for a list of dtbs.
showdefs: for current defaults.
single: for single user target on boot.
rescue: for rescue tar

[linux-sunxi] Re: [PATCH v6 17/18] ARM: sun4i: dt: Add ahci / sata support

2014-02-22 Thread Hans de Goede
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1

Hi,

On 02/22/2014 06:15 PM, Maxime Ripard wrote:
> On Sat, Feb 22, 2014 at 11:09:25AM +0100, Hans de Goede wrote:
>> Hi Maxime,
>> 
>> On 02/21/2014 07:15 PM, Maxime Ripard wrote:
>>> Hi Hans,
>>> 
>>> On Wed, Feb 19, 2014 at 01:01:59PM +0100, Hans de Goede wrote:
 From: Oliver Schinagl 
 
 This patch adds sunxi sata support to A10 boards that have such a 
 connector. Some boards also feature a regulator via a GPIO and support for 
 this is also added.
 
 Signed-off-by: Olliver Schinagl  Signed-off-by: Hans 
 de Goede  --- arch/arm/boot/dts/sun4i-a10-a1000.dts   
|  4  arch/arm/boot/dts/sun4i-a10-cubieboard.dts |  6 + 
 arch/arm/boot/dts/sun4i-a10.dtsi   |  8 +++ 
 arch/arm/boot/dts/sunxi-ahci-reg.dtsi  | 36 
 ++ 4 files changed, 54 insertions(+) create 
 mode 100644 arch/arm/boot/dts/sunxi-ahci-reg.dtsi
 
 diff --git a/arch/arm/boot/dts/sun4i-a10-a1000.dts 
 b/arch/arm/boot/dts/sun4i-a10-a1000.dts index cbd2e13..d6ec839 100644 --- 
 a/arch/arm/boot/dts/sun4i-a10-a1000.dts +++ 
 b/arch/arm/boot/dts/sun4i-a10-a1000.dts @@ -35,6 +35,10 @@ }; };
 
 +  ahci: sata@01c18000 { + status = "okay"; +  
 }; + pinctrl@01c20800 { emac_power_pin_a1000: emac_power_pin@0 { 
 allwinner,pins = "PH15"; diff --git 
 a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts 
 b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts index b139ee6..6df237d8 
 100644 --- a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts +++ 
 b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts @@ -12,6 +12,7 @@
 
 /dts-v1/; /include/ "sun4i-a10.dtsi" +/include/ "sunxi-ahci-reg.dtsi"
 
 / { model = "Cubietech Cubieboard"; @@ -33,6 +34,11 @@ }; };
 
 +  ahci: sata@01c18000 { + target-supply = 
 <®_ahci_5v>; +   status = "okay"; +  }; 
 + pinctrl@01c20800 { led_pins_cubieboard: led_pins@0 { allwinner,pins = 
 "PH20", "PH21"; diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi 
 b/arch/arm/boot/dts/sun4i-a10.dtsi index 336dbec..454077a 100644 --- 
 a/arch/arm/boot/dts/sun4i-a10.dtsi +++ b/arch/arm/boot/dts/sun4i-a10.dtsi 
 @@ -338,6 +338,14 @@ #size-cells = <0>; };
 
 +  ahci: sata@01c18000 { + compatible = 
 "allwinner,sun4i-a10-ahci"; +  reg = <0x01c18000 
 0x1000>; +interrupts = <56>; +
 clocks = <&pll6 0>, <&ahb_gates 25>; +  status = 
 "disabled"; +  }; + intc: interrupt-controller@01c20400 { 
 compatible = "allwinner,sun4i-ic"; reg = <0x01c20400 0x400>; diff --git 
 a/arch/arm/boot/dts/sunxi-ahci-reg.dtsi 
 b/arch/arm/boot/dts/sunxi-ahci-reg.dtsi new file mode 100644 index 
 000..7072af1 --- /dev/null +++ b/arch/arm/boot/dts/sunxi-ahci-reg.dtsi 
 @@ -0,0 +1,36 @@ +/* + * sunxi boards sata target power supply common code
>>> 
>>> 
>>> Since IIRC we have pretty much the same needs for the USB, can't we just 
>>> drop the SATA specific mention and use it as the common DTSI for the usual 
>>> regulators?
>> 
>> On most boards with sata, there will also be 1 or 2 usb regulators, so we 
>> need differently named regulator nodes for all 3 of ahci, usb1 and usb2 
>> vbus. On some boards how ever we may only need the usb regulators.
> 
> Yes, obviously...
> 
>> So if you look in my current personal sunxi-devel tree you will see separate 
>> dtsi files for both ahci and usb regulators,
> 
> And this is precisely what I don't understand. Why do you *need* different 
> DTSI files. If there's common regulators, that are used on most boards, fine, 
> create a common regulators files. But why do you have to create a DTSI to 
> define only one regulator.
> 
>> another advantage of having these separate is that the gpio controlling the 
>> regulator can be pre-populated with the reference design gpio which is used 
>> in most boards, so that the ahci specific code in the dts becomes only the 
>> ahci: sata@... node.
> 
> I understand very well the advantages of what having a reference regulators 
> bring. What I don't understand is the benefits of having "topics" regulators 
> DTSI.

Ok, so let me try to explain:

With topics regulator files, the ahci bits look something like this
for a board using the reference design gpio:

/include/ "sunxi-ahci-reg.dtsi"

...

ahci: sata@01c18000 {
target-supply = <®_ahci_5v>;
status = "okay";
};

If we put all regulators in one file, then the ahci regulator cannot
be enabled (so it will have status = "disabled) by default since most
boards don't have it, so things would change into:

/include/ "sunxi-common-regulators.dtsi"

...

ahci: sata@01c18000 {
ta

[linux-sunxi] Re: [PATCH v6 17/18] ARM: sun4i: dt: Add ahci / sata support

2014-02-22 Thread Maxime Ripard
On Sat, Feb 22, 2014 at 11:09:25AM +0100, Hans de Goede wrote:
> Hi Maxime,
> 
> On 02/21/2014 07:15 PM, Maxime Ripard wrote:
> >Hi Hans,
> >
> >On Wed, Feb 19, 2014 at 01:01:59PM +0100, Hans de Goede wrote:
> >>From: Oliver Schinagl 
> >>
> >>This patch adds sunxi sata support to A10 boards that have such a connector.
> >>Some boards also feature a regulator via a GPIO and support for this is also
> >>added.
> >>
> >>Signed-off-by: Olliver Schinagl 
> >>Signed-off-by: Hans de Goede 
> >>---
> >>  arch/arm/boot/dts/sun4i-a10-a1000.dts  |  4 
> >>  arch/arm/boot/dts/sun4i-a10-cubieboard.dts |  6 +
> >>  arch/arm/boot/dts/sun4i-a10.dtsi   |  8 +++
> >>  arch/arm/boot/dts/sunxi-ahci-reg.dtsi  | 36 
> >> ++
> >>  4 files changed, 54 insertions(+)
> >>  create mode 100644 arch/arm/boot/dts/sunxi-ahci-reg.dtsi
> >>
> >>diff --git a/arch/arm/boot/dts/sun4i-a10-a1000.dts 
> >>b/arch/arm/boot/dts/sun4i-a10-a1000.dts
> >>index cbd2e13..d6ec839 100644
> >>--- a/arch/arm/boot/dts/sun4i-a10-a1000.dts
> >>+++ b/arch/arm/boot/dts/sun4i-a10-a1000.dts
> >>@@ -35,6 +35,10 @@
> >>};
> >>};
> >>
> >>+   ahci: sata@01c18000 {
> >>+   status = "okay";
> >>+   };
> >>+
> >>pinctrl@01c20800 {
> >>emac_power_pin_a1000: emac_power_pin@0 {
> >>allwinner,pins = "PH15";
> >>diff --git a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts 
> >>b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
> >>index b139ee6..6df237d8 100644
> >>--- a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
> >>+++ b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
> >>@@ -12,6 +12,7 @@
> >>
> >>  /dts-v1/;
> >>  /include/ "sun4i-a10.dtsi"
> >>+/include/ "sunxi-ahci-reg.dtsi"
> >>
> >>  / {
> >>model = "Cubietech Cubieboard";
> >>@@ -33,6 +34,11 @@
> >>};
> >>};
> >>
> >>+   ahci: sata@01c18000 {
> >>+   target-supply = <®_ahci_5v>;
> >>+   status = "okay";
> >>+   };
> >>+
> >>pinctrl@01c20800 {
> >>led_pins_cubieboard: led_pins@0 {
> >>allwinner,pins = "PH20", "PH21";
> >>diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi 
> >>b/arch/arm/boot/dts/sun4i-a10.dtsi
> >>index 336dbec..454077a 100644
> >>--- a/arch/arm/boot/dts/sun4i-a10.dtsi
> >>+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
> >>@@ -338,6 +338,14 @@
> >>#size-cells = <0>;
> >>};
> >>
> >>+   ahci: sata@01c18000 {
> >>+   compatible = "allwinner,sun4i-a10-ahci";
> >>+   reg = <0x01c18000 0x1000>;
> >>+   interrupts = <56>;
> >>+   clocks = <&pll6 0>, <&ahb_gates 25>;
> >>+   status = "disabled";
> >>+   };
> >>+
> >>intc: interrupt-controller@01c20400 {
> >>compatible = "allwinner,sun4i-ic";
> >>reg = <0x01c20400 0x400>;
> >>diff --git a/arch/arm/boot/dts/sunxi-ahci-reg.dtsi 
> >>b/arch/arm/boot/dts/sunxi-ahci-reg.dtsi
> >>new file mode 100644
> >>index 000..7072af1
> >>--- /dev/null
> >>+++ b/arch/arm/boot/dts/sunxi-ahci-reg.dtsi
> >>@@ -0,0 +1,36 @@
> >>+/*
> >>+ * sunxi boards sata target power supply common code
> >
> >
> >Since IIRC we have pretty much the same needs for the USB, can't we
> >just drop the SATA specific mention and use it as the common DTSI for
> >the usual regulators?
> 
> On most boards with sata, there will also be 1 or 2 usb regulators,
> so we need differently named regulator nodes for all 3 of ahci,
> usb1 and usb2 vbus. On some boards how ever we may only need the
> usb regulators.

Yes, obviously...

> So if you look in my current personal sunxi-devel tree you will see
> separate dtsi files for both ahci and usb regulators,

And this is precisely what I don't understand. Why do you *need*
different DTSI files. If there's common regulators, that are used on
most boards, fine, create a common regulators files. But why do you
have to create a DTSI to define only one regulator.

> another advantage of having these separate is that the gpio controlling
> the regulator can be pre-populated with the reference design gpio which
> is used in most boards, so that the ahci specific code in the dts
> becomes only the ahci: sata@... node.

I understand very well the advantages of what having a reference
regulators bring. What I don't understand is the benefits of having
"topics" regulators DTSI.

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com


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[linux-sunxi] [PATCH v7 00/15] ahci: library-ise ahci_platform, add sunxi driver and cleanup imx driver

2014-02-22 Thread Hans de Goede


Hi all,

Here is v7 of my patchset for adding ahci-sunxi support. This is hopefully
the final final version of this set :)

Note I'm going on vacation for a week starting Monday, so if I'm not responding
that is why. Tejun if you feel some small cleanups are still necessary and
you don't want to wait for me to get back feel free to squash in any cleanups
you deem necessary.

This has been tested with Allwinner A10, Allwinner A20 and Freeware imx6x SoCs,
including suspend / resume. Note that the ahci_imx driver now also has imx53
sata support, it would be good if someone could test that with this series.


History:

v1, by Olliver Schinagl:
This was using the approach of having a platform device which probe method
creates a new child platform device which gets driven by ahci_platform.c,
as done by ahci_imx.c .

v2, by Hans de Goede:
Stand-alone platform driver based on Olliver's work

v3, by Hans de Goede:
patch-series, with 4 different parts
a) Make ahci_platform.c more generic, handle more then 1 clk, target pwr
   regulator
b) New ahci-sunxi code only populating ahci_platform_data, passed to
   ahci_platform.c to of_device_id matching.
c) Refactor ahci-imx code to work the same as the new ahci-sunxi code, this
   is the reason why v3 is an RFC, I'm waiting for the wandboard I ordered to
   arrive so that I can actually test this.
d) dts bindings for the sunxi ahci parts

v4, by Hans de Goede:
patch-series, with 5 different parts:
a) Make ahci_platform.c more generic, handle more then 1 clk, target pwr
   regulator
b) Turn parts of ahci_platform.c into a library for use by other drivers
c) New ahci-sunxi driver using the ahci_platform.c library functionality
d) Refactor ahci-imx code to work the same as the new ahci-sunxi code
e) dts bindings for the sunxi ahci parts

v5:
v4 + the following changes:
1) fsl,imx6q driver is now tested
2) fixed suspend / resume on fsl,imx6q
3) Modifed devicetree node naming to match dt spec
4) Reworked the busy waiting code in the sunxi-phy handling as suggested by
   Russell King

v6:
v5 rebased on top of 3.14-rc3 + the following changes
1) Added Roger Quadros' generic phy support series
2) Added a "ARM: sun4i: dt: Remove grouping + simple-bus for regulators" dts
   patch

v7:
v6 + the following changes:
1) Addressed all Tejun's review remarks:
  * Added function header comments to all exported ahci_platform functions
  * Added comments in some other places
  * Removed use of 2 empty lines to separate functions in some cases
  * Use devres to automatically call ahci_platform_put_resources on
get_resource failure, probe failure and regular device remove
2) Dropped patches to move ahci_host_priv struct declaration to include/linux,
  this was a left-over from v3 and is no longer necessary
3) Updated Roger's "ata: ahci_platform: Manage SATA PHY" patch:
  * Update function header comments for the changes this makes
  * Drop the Kconfig PHY requires hack, my patch for the phy-core to always be
built-in has been queued in Greg KH's tree, so this is no longer necessary.
4) Dropped Roger's "ata: ahci_platform: Add 'struct device' argument to 
ahci_platform_put_resources()"
  patch, ahci_platform_put_resources already has a device argument as result
  of it being changed into a devres release function

Tejun, can you please add patches 1-12 to your ata tree for 3.15 ?

Maxime, can you please add patch 13-15 to your dts tree for 3.15 ?

Thanks & Regards,

Hans

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[linux-sunxi] [RFC 2/3] ahci_platform: Drop support for imx53-ahci platform device type

2014-02-22 Thread Hans de Goede
Since the 3.13 release the ahci_imx driver has proper devicetree enabled
support for ahci on imx53 and that is used instead of the old board file
created imx53-ahci platform device.

Note this patch also complete drops the id-table, an id-table is not needed
for a single id platform driver, the name field in the driver struct suffices.

And the code already has an explicit "MODULE_ALIAS("platform:ahci");" so the
id-table is not needed for that either.

Cc: Marek Vasut 
Signed-off-by: Hans de Goede 
---
 drivers/ata/ahci_platform.c | 46 ++---
 1 file changed, 6 insertions(+), 40 deletions(-)

diff --git a/drivers/ata/ahci_platform.c b/drivers/ata/ahci_platform.c
index 9fb99cf..d48ca8a 100644
--- a/drivers/ata/ahci_platform.c
+++ b/drivers/ata/ahci_platform.c
@@ -29,49 +29,17 @@
 
 static void ahci_host_stop(struct ata_host *host);
 
-enum ahci_type {
-   AHCI,   /* standard platform ahci */
-   IMX53_AHCI, /* ahci on i.mx53 */
-};
-
-static struct platform_device_id ahci_devtype[] = {
-   {
-   .name = "ahci",
-   .driver_data = AHCI,
-   }, {
-   .name = "imx53-ahci",
-   .driver_data = IMX53_AHCI,
-   }, {
-   /* sentinel */
-   }
-};
-MODULE_DEVICE_TABLE(platform, ahci_devtype);
-
 struct ata_port_operations ahci_platform_ops = {
.inherits   = &ahci_ops,
.host_stop  = ahci_host_stop,
 };
 EXPORT_SYMBOL_GPL(ahci_platform_ops);
 
-static struct ata_port_operations ahci_platform_retry_srst_ops = {
-   .inherits   = &ahci_pmp_retry_srst_ops,
-   .host_stop  = ahci_host_stop,
-};
-
-static const struct ata_port_info ahci_port_info[] = {
-   /* by features */
-   [AHCI] = {
-   .flags  = AHCI_FLAG_COMMON,
-   .pio_mask   = ATA_PIO4,
-   .udma_mask  = ATA_UDMA6,
-   .port_ops   = &ahci_platform_ops,
-   },
-   [IMX53_AHCI] = {
-   .flags  = AHCI_FLAG_COMMON,
-   .pio_mask   = ATA_PIO4,
-   .udma_mask  = ATA_UDMA6,
-   .port_ops   = &ahci_platform_retry_srst_ops,
-   },
+static const struct ata_port_info ahci_port_info = {
+   .flags  = AHCI_FLAG_COMMON,
+   .pio_mask   = ATA_PIO4,
+   .udma_mask  = ATA_UDMA6,
+   .port_ops   = &ahci_platform_ops,
 };
 
 static struct scsi_host_template ahci_platform_sht = {
@@ -436,7 +404,6 @@ static int ahci_probe(struct platform_device *pdev)
 {
struct device *dev = &pdev->dev;
struct ahci_platform_data *pdata = dev_get_platdata(dev);
-   const struct platform_device_id *id = platform_get_device_id(pdev);
const struct ata_port_info *pi_template;
struct ahci_host_priv *hpriv;
int rc;
@@ -464,7 +431,7 @@ static int ahci_probe(struct platform_device *pdev)
if (pdata && pdata->ata_port_info)
pi_template = pdata->ata_port_info;
else
-   pi_template = &ahci_port_info[id ? id->driver_data : 0];
+   pi_template = &ahci_port_info;
 
rc = ahci_platform_init_host(pdev, hpriv, pi_template,
 pdata ? pdata->force_port_map : 0,
@@ -670,7 +637,6 @@ static struct platform_driver ahci_driver = {
.of_match_table = ahci_of_match,
.pm = &ahci_pm_ops,
},
-   .id_table   = ahci_devtype,
 };
 module_platform_driver(ahci_driver);
 
-- 
1.9.0

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[linux-sunxi] [RFC 0/3] ahci_platform: drop support for a bunch of obsolete platform device types

2014-02-22 Thread Hans de Goede
Hi Tejun, Marek,

This series, which is to be applied on top of my ahci_platform restructering
series,  mostly speaks for itself.

I've some doubts about the 2nd patch, which removes the imx53-ahci platform
device support from ahci_platform.c. I'm pretty sure this is obsolete and
replaced by Marek's ahci_imx.c work, but not 100%, which is why this series
is marked as RFC. Marek can you confirm that the code the 2nd patch removes
is inded dead code?

Tejun, if Marek confirms this is indeed dead code feel free to apply this
despite the RFC marking.

Thanks & Regards,

Hans

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[linux-sunxi] [RFC 1/3] ahci_platform: Drop support for ahci-strict platform device type

2014-02-22 Thread Hans de Goede
I've done a grep over the entire kernel tree and nothing is using this
(anymore?).

Signed-off-by: Hans de Goede 
---
 drivers/ata/ahci_platform.c | 11 ---
 1 file changed, 11 deletions(-)

diff --git a/drivers/ata/ahci_platform.c b/drivers/ata/ahci_platform.c
index 75698a4..9fb99cf 100644
--- a/drivers/ata/ahci_platform.c
+++ b/drivers/ata/ahci_platform.c
@@ -32,7 +32,6 @@ static void ahci_host_stop(struct ata_host *host);
 enum ahci_type {
AHCI,   /* standard platform ahci */
IMX53_AHCI, /* ahci on i.mx53 */
-   STRICT_AHCI,/* delayed DMA engine start */
 };
 
 static struct platform_device_id ahci_devtype[] = {
@@ -43,9 +42,6 @@ static struct platform_device_id ahci_devtype[] = {
.name = "imx53-ahci",
.driver_data = IMX53_AHCI,
}, {
-   .name = "strict-ahci",
-   .driver_data = STRICT_AHCI,
-   }, {
/* sentinel */
}
 };
@@ -76,13 +72,6 @@ static const struct ata_port_info ahci_port_info[] = {
.udma_mask  = ATA_UDMA6,
.port_ops   = &ahci_platform_retry_srst_ops,
},
-   [STRICT_AHCI] = {
-   AHCI_HFLAGS (AHCI_HFLAG_DELAY_ENGINE),
-   .flags  = AHCI_FLAG_COMMON,
-   .pio_mask   = ATA_PIO4,
-   .udma_mask  = ATA_UDMA6,
-   .port_ops   = &ahci_platform_ops,
-   },
 };
 
 static struct scsi_host_template ahci_platform_sht = {
-- 
1.9.0

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[linux-sunxi] [RFC 3/3] ahci_platform: Drop unused ahci_platform_data members

2014-02-22 Thread Hans de Goede
These members are not used anywhere, and in the future we want
ahci_platform_data to go away entirely so there is no reason to keep these
around.

Signed-off-by: Hans de Goede 
---
 drivers/ata/ahci_platform.c   | 10 +-
 include/linux/ahci_platform.h |  3 ---
 2 files changed, 1 insertion(+), 12 deletions(-)

diff --git a/drivers/ata/ahci_platform.c b/drivers/ata/ahci_platform.c
index d48ca8a..c04e1a9 100644
--- a/drivers/ata/ahci_platform.c
+++ b/drivers/ata/ahci_platform.c
@@ -404,7 +404,6 @@ static int ahci_probe(struct platform_device *pdev)
 {
struct device *dev = &pdev->dev;
struct ahci_platform_data *pdata = dev_get_platdata(dev);
-   const struct ata_port_info *pi_template;
struct ahci_host_priv *hpriv;
int rc;
 
@@ -428,14 +427,7 @@ static int ahci_probe(struct platform_device *pdev)
goto disable_resources;
}
 
-   if (pdata && pdata->ata_port_info)
-   pi_template = pdata->ata_port_info;
-   else
-   pi_template = &ahci_port_info;
-
-   rc = ahci_platform_init_host(pdev, hpriv, pi_template,
-pdata ? pdata->force_port_map : 0,
-pdata ? pdata->mask_port_map  : 0);
+   rc = ahci_platform_init_host(pdev, hpriv, &ahci_port_info, 0, 0);
if (rc)
goto pdata_exit;
 
diff --git a/include/linux/ahci_platform.h b/include/linux/ahci_platform.h
index 542f268..1f16d50 100644
--- a/include/linux/ahci_platform.h
+++ b/include/linux/ahci_platform.h
@@ -33,9 +33,6 @@ struct ahci_platform_data {
void (*exit)(struct device *dev);
int (*suspend)(struct device *dev);
int (*resume)(struct device *dev);
-   const struct ata_port_info *ata_port_info;
-   unsigned int force_port_map;
-   unsigned int mask_port_map;
 };
 
 int ahci_platform_enable_clks(struct ahci_host_priv *hpriv);
-- 
1.9.0

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[linux-sunxi] [PATCH v7 14/15] ARM: sun4i: dt: Add ahci / sata support

2014-02-22 Thread Hans de Goede
From: Oliver Schinagl 

This patch adds sunxi sata support to A10 boards that have such a connector.
Some boards also feature a regulator via a GPIO and support for this is also
added.

Signed-off-by: Olliver Schinagl 
Signed-off-by: Hans de Goede 
---
 arch/arm/boot/dts/sun4i-a10-a1000.dts  |  4 
 arch/arm/boot/dts/sun4i-a10-cubieboard.dts |  6 +
 arch/arm/boot/dts/sun4i-a10.dtsi   |  8 +++
 arch/arm/boot/dts/sunxi-ahci-reg.dtsi  | 36 ++
 4 files changed, 54 insertions(+)
 create mode 100644 arch/arm/boot/dts/sunxi-ahci-reg.dtsi

diff --git a/arch/arm/boot/dts/sun4i-a10-a1000.dts 
b/arch/arm/boot/dts/sun4i-a10-a1000.dts
index cbd2e13..d6ec839 100644
--- a/arch/arm/boot/dts/sun4i-a10-a1000.dts
+++ b/arch/arm/boot/dts/sun4i-a10-a1000.dts
@@ -35,6 +35,10 @@
};
};
 
+   ahci: sata@01c18000 {
+   status = "okay";
+   };
+
pinctrl@01c20800 {
emac_power_pin_a1000: emac_power_pin@0 {
allwinner,pins = "PH15";
diff --git a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts 
b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
index b139ee6..6df237d8 100644
--- a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
+++ b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
@@ -12,6 +12,7 @@
 
 /dts-v1/;
 /include/ "sun4i-a10.dtsi"
+/include/ "sunxi-ahci-reg.dtsi"
 
 / {
model = "Cubietech Cubieboard";
@@ -33,6 +34,11 @@
};
};
 
+   ahci: sata@01c18000 {
+   target-supply = <®_ahci_5v>;
+   status = "okay";
+   };
+
pinctrl@01c20800 {
led_pins_cubieboard: led_pins@0 {
allwinner,pins = "PH20", "PH21";
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index 336dbec..454077a 100644
--- a/arch/arm/boot/dts/sun4i-a10.dtsi
+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
@@ -338,6 +338,14 @@
#size-cells = <0>;
};
 
+   ahci: sata@01c18000 {
+   compatible = "allwinner,sun4i-a10-ahci";
+   reg = <0x01c18000 0x1000>;
+   interrupts = <56>;
+   clocks = <&pll6 0>, <&ahb_gates 25>;
+   status = "disabled";
+   };
+
intc: interrupt-controller@01c20400 {
compatible = "allwinner,sun4i-ic";
reg = <0x01c20400 0x400>;
diff --git a/arch/arm/boot/dts/sunxi-ahci-reg.dtsi 
b/arch/arm/boot/dts/sunxi-ahci-reg.dtsi
new file mode 100644
index 000..7072af1
--- /dev/null
+++ b/arch/arm/boot/dts/sunxi-ahci-reg.dtsi
@@ -0,0 +1,36 @@
+/*
+ * sunxi boards sata target power supply common code
+ *
+ * Copyright 2014 - Hans de Goede 
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/ {
+   soc@01c0 {
+   pio: pinctrl@01c20800 {
+   ahci_pwr_pin_a: ahci_pwr_pin@0 {
+   allwinner,pins = "PB8";
+   allwinner,function = "gpio_out";
+   allwinner,drive = <0>;
+   allwinner,pull = <0>;
+   };
+   };
+   };
+
+   reg_ahci_5v: ahci-5v {
+   compatible = "regulator-fixed";
+   pinctrl-names = "default";
+   pinctrl-0 = <&ahci_pwr_pin_a>;
+   regulator-name = "ahci-5v";
+   regulator-min-microvolt = <500>;
+   regulator-max-microvolt = <500>;
+   enable-active-high;
+   gpio = <&pio 1 8 0>;
+   };
+};
-- 
1.9.0

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[linux-sunxi] [PATCH v7 15/15] ARM: sun7i: dt: Add ahci / sata support

2014-02-22 Thread Hans de Goede
This patch adds sunxi sata support to A20 boards that have such a connector.
Some boards also feature a regulator via a GPIO and support for this is also
added.

Signed-off-by: Olliver Schinagl 
Signed-off-by: Hans de Goede 
---
 arch/arm/boot/dts/sun7i-a20-cubieboard2.dts |  6 ++
 arch/arm/boot/dts/sun7i-a20-cubietruck.dts  | 18 ++
 arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts |  6 ++
 arch/arm/boot/dts/sun7i-a20.dtsi|  8 
 4 files changed, 38 insertions(+)

diff --git a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts 
b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
index 7bf4935..07823c2 100644
--- a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
+++ b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
@@ -13,12 +13,18 @@
 
 /dts-v1/;
 /include/ "sun7i-a20.dtsi"
+/include/ "sunxi-ahci-reg.dtsi"
 
 / {
model = "Cubietech Cubieboard2";
compatible = "cubietech,cubieboard2", "allwinner,sun7i-a20";
 
soc@01c0 {
+   ahci: sata@01c18000 {
+   target-supply = <®_ahci_5v>;
+   status = "okay";
+   };
+
pinctrl@01c20800 {
led_pins_cubieboard2: led_pins@0 {
allwinner,pins = "PH20", "PH21";
diff --git a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts 
b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
index 025ce52..403bd2e 100644
--- a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
+++ b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
@@ -13,13 +13,26 @@
 
 /dts-v1/;
 /include/ "sun7i-a20.dtsi"
+/include/ "sunxi-ahci-reg.dtsi"
 
 / {
model = "Cubietech Cubietruck";
compatible = "cubietech,cubietruck", "allwinner,sun7i-a20";
 
soc@01c0 {
+   ahci: sata@01c18000 {
+   target-supply = <®_ahci_5v>;
+   status = "okay";
+   };
+
pinctrl@01c20800 {
+   ahci_pwr_pin_cubietruck: ahci_pwr_pin@1 {
+   allwinner,pins = "PH12";
+   allwinner,function = "gpio_out";
+   allwinner,drive = <0>;
+   allwinner,pull = <0>;
+   };
+
led_pins_cubietruck: led_pins@0 {
allwinner,pins = "PH7", "PH11", "PH20", "PH21";
allwinner,function = "gpio_out";
@@ -90,4 +103,9 @@
gpios = <&pio 7 7 0>;
};
};
+
+   reg_ahci_5v: ahci-5v {
+   pinctrl-0 = <&ahci_pwr_pin_cubietruck>;
+   gpio = <&pio 7 12 0>;
+   };
 };
diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts 
b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
index b02a796..d5c6799 100644
--- a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
+++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
@@ -13,12 +13,18 @@
 
 /dts-v1/;
 /include/ "sun7i-a20.dtsi"
+/include/ "sunxi-ahci-reg.dtsi"
 
 / {
model = "Olimex A20-Olinuxino Micro";
compatible = "olimex,a20-olinuxino-micro", "allwinner,sun7i-a20";
 
soc@01c0 {
+   ahci: sata@01c18000 {
+   target-supply = <®_ahci_5v>;
+   status = "okay";
+   };
+
pinctrl@01c20800 {
led_pins_olinuxino: led_pins@0 {
allwinner,pins = "PH2";
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index daaafd0..3385994 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -392,6 +392,14 @@
#size-cells = <0>;
};
 
+   ahci: sata@01c18000 {
+   compatible = "allwinner,sun4i-a10-ahci";
+   reg = <0x01c18000 0x1000>;
+   interrupts = <0 56 4>;
+   clocks = <&pll6 0>, <&ahb_gates 25>;
+   status = "disabled";
+   };
+
pio: pinctrl@01c20800 {
compatible = "allwinner,sun7i-a20-pinctrl";
reg = <0x01c20800 0x400>;
-- 
1.9.0

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[linux-sunxi] [PATCH v7 12/15] ata: ahci_platform: runtime resume the device before use

2014-02-22 Thread Hans de Goede
From: Roger Quadros 

On OMAP platforms the device needs to be runtime resumed before
it can be accessed. The OMAP HWMOD framework takes care of
enabling the module and its resources based on the
device's runtime PM state.

In this patch we runtime resume during .probe() and runtime suspend
after .remove().

We also update the runtime PM state during .resume().

CC: Balaji T K 
Signed-off-by: Roger Quadros 
Signed-off-by: Hans de Goede 
---
 drivers/ata/ahci.h  |  1 +
 drivers/ata/ahci_platform.c | 15 +++
 2 files changed, 16 insertions(+)

diff --git a/drivers/ata/ahci.h b/drivers/ata/ahci.h
index 3ab7ac9..51af275 100644
--- a/drivers/ata/ahci.h
+++ b/drivers/ata/ahci.h
@@ -324,6 +324,7 @@ struct ahci_host_priv {
u32 em_loc; /* enclosure management location */
u32 em_buf_sz;  /* EM buffer size in byte */
u32 em_msg_type;/* EM message type */
+   boolgot_runtime_pm; /* Did we do pm_runtime_get? */
struct clk  *clks[AHCI_MAX_CLKS]; /* Optional */
struct regulator*target_pwr;/* Optional */
struct phy  *phy;   /* If platform uses phy */
diff --git a/drivers/ata/ahci_platform.c b/drivers/ata/ahci_platform.c
index 99d38c1..75698a4 100644
--- a/drivers/ata/ahci_platform.c
+++ b/drivers/ata/ahci_platform.c
@@ -24,6 +24,7 @@
 #include 
 #include 
 #include 
+#include 
 #include "ahci.h"
 
 static void ahci_host_stop(struct ata_host *host);
@@ -229,6 +230,11 @@ static void ahci_platform_put_resources(struct device 
*dev, void *res)
struct ahci_host_priv *hpriv = res;
int c;
 
+   if (hpriv->got_runtime_pm) {
+   pm_runtime_put_sync(dev);
+   pm_runtime_disable(dev);
+   }
+
for (c = 0; c < AHCI_MAX_CLKS && hpriv->clks[c]; c++)
clk_put(hpriv->clks[c]);
 }
@@ -326,6 +332,10 @@ struct ahci_host_priv *ahci_platform_get_resources(
}
}
 
+   pm_runtime_enable(dev);
+   pm_runtime_get_sync(dev);
+   hpriv->got_runtime_pm = true;
+
devres_remove_group(dev, NULL);
return hpriv;
 
@@ -635,6 +645,11 @@ int ahci_platform_resume(struct device *dev)
if (rc)
goto disable_resources;
 
+   /* We resumed so update PM runtime state */
+   pm_runtime_disable(dev);
+   pm_runtime_set_active(dev);
+   pm_runtime_enable(dev);
+
return 0;
 
 disable_resources:
-- 
1.9.0

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[linux-sunxi] [PATCH v7 11/15] ata: ahci_platform: Manage SATA PHY

2014-02-22 Thread Hans de Goede
From: Roger Quadros 

Some platforms have a PHY hooked up to the
SATA controller. The PHY needs to be initialized
and powered up for SATA to work. We do that
using the PHY framework.

CC: Balaji T K 
Signed-off-by: Roger Quadros 
Signed-off-by: Hans de Goede 
---
 drivers/ata/ahci.h  |  2 ++
 drivers/ata/ahci_platform.c | 47 +++--
 2 files changed, 47 insertions(+), 2 deletions(-)

diff --git a/drivers/ata/ahci.h b/drivers/ata/ahci.h
index bf8100c..3ab7ac9 100644
--- a/drivers/ata/ahci.h
+++ b/drivers/ata/ahci.h
@@ -37,6 +37,7 @@
 
 #include 
 #include 
+#include 
 #include 
 
 /* Enclosure Management Control */
@@ -325,6 +326,7 @@ struct ahci_host_priv {
u32 em_msg_type;/* EM message type */
struct clk  *clks[AHCI_MAX_CLKS]; /* Optional */
struct regulator*target_pwr;/* Optional */
+   struct phy  *phy;   /* If platform uses phy */
void*plat_data; /* Other platform data */
/*
 * Optional ahci_start_engine override, if not set this gets set to the
diff --git a/drivers/ata/ahci_platform.c b/drivers/ata/ahci_platform.c
index d7e55ba..99d38c1 100644
--- a/drivers/ata/ahci_platform.c
+++ b/drivers/ata/ahci_platform.c
@@ -23,6 +23,7 @@
 #include 
 #include 
 #include 
+#include 
 #include "ahci.h"
 
 static void ahci_host_stop(struct ata_host *host);
@@ -147,6 +148,7 @@ EXPORT_SYMBOL_GPL(ahci_platform_disable_clks);
  * the following order:
  * 1) Regulator
  * 2) Clocks (through ahci_platform_enable_clks)
+ * 3) Phy
  *
  * If resource enabling fails at any point the previous enabled
  * resources are disabled in reverse order.
@@ -171,8 +173,23 @@ int ahci_platform_enable_resources(struct ahci_host_priv 
*hpriv)
if (rc)
goto disable_regulator;
 
+   if (hpriv->phy) {
+   rc = phy_init(hpriv->phy);
+   if (rc)
+   goto disable_clks;
+
+   rc = phy_power_on(hpriv->phy);
+   if (rc) {
+   phy_exit(hpriv->phy);
+   goto disable_clks;
+   }
+   }
+
return 0;
 
+disable_clks:
+   ahci_platform_disable_clks(hpriv);
+
 disable_regulator:
if (hpriv->target_pwr)
regulator_disable(hpriv->target_pwr);
@@ -186,14 +203,20 @@ EXPORT_SYMBOL_GPL(ahci_platform_enable_resources);
  *
  * This function disables all ahci_platform managed resources in
  * the following order:
- * 1) Clocks (through ahci_platform_disable_clks)
- * 2) Regulator
+ * 1) Phy
+ * 2) Clocks (through ahci_platform_disable_clks)
+ * 3) Regulator
  *
  * LOCKING:
  * None.
  */
 void ahci_platform_disable_resources(struct ahci_host_priv *hpriv)
 {
+   if (hpriv->phy) {
+   phy_power_off(hpriv->phy);
+   phy_exit(hpriv->phy);
+   }
+
ahci_platform_disable_clks(hpriv);
 
if (hpriv->target_pwr)
@@ -222,6 +245,7 @@ static void ahci_platform_put_resources(struct device *dev, 
void *res)
  * 2) regulator for controlling the targets power (optional)
  * 3) 0 - AHCI_MAX_CLKS clocks, as specified in the devs devicetree node,
  *or for non devicetree enabled platforms a single clock
+ * 4) phy (optional)
  *
  * LOCKING:
  * None.
@@ -283,6 +307,25 @@ struct ahci_host_priv *ahci_platform_get_resources(
hpriv->clks[i] = clk;
}
 
+   hpriv->phy = devm_phy_get(dev, "sata-phy");
+   if (IS_ERR(hpriv->phy)) {
+   rc = PTR_ERR(hpriv->phy);
+   switch (rc) {
+   case -ENODEV:
+   case -ENOSYS:
+   /* continue normally */
+   hpriv->phy = NULL;
+   break;
+
+   case -EPROBE_DEFER:
+   goto err_out;
+
+   default:
+   dev_err(dev, "couldn't get sata-phy\n");
+   goto err_out;
+   }
+   }
+
devres_remove_group(dev, NULL);
return hpriv;
 
-- 
1.9.0

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[linux-sunxi] [PATCH v7 08/15] ahci-imx: Port to library-ised ahci_platform

2014-02-22 Thread Hans de Goede
This avoids the ugliness of creating a nested platform device from probe.

While moving it around anyways, move the mk6q phy init code from probe
to imx_sata_enable, as the phy needs to be re-initialized on resume too,
otherwise the drive won't be recognized after resume.

Tested on a wandboard i.mx6 quad.

Signed-off-by: Hans de Goede 
---
 .../devicetree/bindings/ata/ahci-platform.txt  |   9 +-
 drivers/ata/ahci_imx.c | 331 -
 2 files changed, 134 insertions(+), 206 deletions(-)

diff --git a/Documentation/devicetree/bindings/ata/ahci-platform.txt 
b/Documentation/devicetree/bindings/ata/ahci-platform.txt
index 499bfed..d86e854 100644
--- a/Documentation/devicetree/bindings/ata/ahci-platform.txt
+++ b/Documentation/devicetree/bindings/ata/ahci-platform.txt
@@ -5,8 +5,9 @@ Each SATA controller should have its own node.
 
 Required properties:
 - compatible: compatible list, one of "snps,spear-ahci",
-  "snps,exynos5440-ahci", "ibm,476gtr-ahci", or
-  "allwinner,sun4i-a10-ahci"
+  "snps,exynos5440-ahci", "ibm,476gtr-ahci",
+  "allwinner,sun4i-a10-ahci", "fsl,imx53-ahci" or
+  "fsl,imx6q-ahci"
 - interrupts: 
 - reg   : 
 
@@ -15,6 +16,10 @@ Optional properties:
 - clocks: a list of phandle + clock specifier pairs
 - target-supply : regulator for SATA target power
 
+"fsl,imx53-ahci", "fsl,imx6q-ahci" required properties:
+- clocks: must contain the sata, sata_ref and ahb clocks
+- clock-names   : must contain "ahb" for the ahb clock
+
 Examples:
 sata@ffe08000 {
compatible = "snps,spear-ahci";
diff --git a/drivers/ata/ahci_imx.c b/drivers/ata/ahci_imx.c
index dd4d6f7..3cb5d69 100644
--- a/drivers/ata/ahci_imx.c
+++ b/drivers/ata/ahci_imx.c
@@ -42,13 +42,7 @@ enum ahci_imx_type {
 struct imx_ahci_priv {
struct platform_device *ahci_pdev;
enum ahci_imx_type type;
-
-   /* i.MX53 clock */
-   struct clk *sata_gate_clk;
-   /* Common clock */
-   struct clk *sata_ref_clk;
struct clk *ahb_clk;
-
struct regmap *gpr;
bool no_device;
bool first_time;
@@ -58,28 +52,52 @@ static int ahci_imx_hotplug;
 module_param_named(hotplug, ahci_imx_hotplug, int, 0644);
 MODULE_PARM_DESC(hotplug, "AHCI IMX hot-plug support (0=Don't support, 
1=support)");
 
-static int imx_sata_clock_enable(struct device *dev)
+static void ahci_imx_host_stop(struct ata_host *host);
+
+static int imx_sata_enable(struct ahci_host_priv *hpriv)
 {
-   struct imx_ahci_priv *imxpriv = dev_get_drvdata(dev->parent);
+   struct imx_ahci_priv *imxpriv = hpriv->plat_data;
int ret;
 
-   if (imxpriv->type == AHCI_IMX53) {
-   ret = clk_prepare_enable(imxpriv->sata_gate_clk);
-   if (ret < 0) {
-   dev_err(dev, "prepare-enable sata_gate clock err:%d\n",
-   ret);
+   if (imxpriv->no_device)
+   return 0;
+
+   if (hpriv->target_pwr) {
+   ret = regulator_enable(hpriv->target_pwr);
+   if (ret)
return ret;
-   }
}
 
-   ret = clk_prepare_enable(imxpriv->sata_ref_clk);
-   if (ret < 0) {
-   dev_err(dev, "prepare-enable sata_ref clock err:%d\n",
-   ret);
-   goto clk_err;
-   }
+   ret = ahci_platform_enable_clks(hpriv);
+   if (ret < 0)
+   goto disable_regulator;
 
if (imxpriv->type == AHCI_IMX6Q) {
+   /*
+* set PHY Paremeters, two steps to configure the GPR13,
+* one write for rest of parameters, mask of first write
+* is 0x07ff, and the other one write for setting
+* the mpll_clk_en.
+*/
+   regmap_update_bits(imxpriv->gpr, IOMUXC_GPR13,
+  IMX6Q_GPR13_SATA_RX_EQ_VAL_MASK |
+  IMX6Q_GPR13_SATA_RX_LOS_LVL_MASK |
+  IMX6Q_GPR13_SATA_RX_DPLL_MODE_MASK |
+  IMX6Q_GPR13_SATA_SPD_MODE_MASK |
+  IMX6Q_GPR13_SATA_MPLL_SS_EN |
+  IMX6Q_GPR13_SATA_TX_ATTEN_MASK |
+  IMX6Q_GPR13_SATA_TX_BOOST_MASK |
+  IMX6Q_GPR13_SATA_TX_LVL_MASK |
+  IMX6Q_GPR13_SATA_MPLL_CLK_EN |
+  IMX6Q_GPR13_SATA_TX_EDGE_RATE,
+  IMX6Q_GPR13_SATA_RX_EQ_VAL_3_0_DB |
+  IMX6Q_GPR13_SATA_RX_LOS_LVL_SATA2M |
+  IMX6Q_GPR13_SATA_RX_DPLL_MODE_2P_4F |
+  IMX6Q_GPR13_SATA_SPD_MODE_3P0G |
+

[linux-sunxi] [PATCH v7 13/15] ARM: sun4i: dt: Remove grouping + simple-bus compatible for regulators

2014-02-22 Thread Hans de Goede
According to Documentation/devicetree/bindings/regulator/regulator.txt
regulator nodes should not be placed under 'simple-bus'.

Mark Rutland also explains about it at:
http://www.spinics.net/lists/linux-usb/msg101497.html

Signed-off-by: Hans de Goede 
---
 arch/arm/boot/dts/sun4i-a10-a1000.dts | 22 +-
 arch/arm/boot/dts/sun4i-a10-hackberry.dts | 18 +++---
 2 files changed, 16 insertions(+), 24 deletions(-)

diff --git a/arch/arm/boot/dts/sun4i-a10-a1000.dts 
b/arch/arm/boot/dts/sun4i-a10-a1000.dts
index d4b081d..cbd2e13 100644
--- a/arch/arm/boot/dts/sun4i-a10-a1000.dts
+++ b/arch/arm/boot/dts/sun4i-a10-a1000.dts
@@ -80,18 +80,14 @@
};
};
 
-   regulators {
-   compatible = "simple-bus";
-
-   reg_emac_3v3: emac-3v3 {
-   compatible = "regulator-fixed";
-   pinctrl-names = "default";
-   pinctrl-0 = <&emac_power_pin_a1000>;
-   regulator-name = "emac-3v3";
-   regulator-min-microvolt = <330>;
-   regulator-max-microvolt = <330>;
-   enable-active-high;
-   gpio = <&pio 7 15 0>;
-   };
+   reg_emac_3v3: emac-3v3 {
+   compatible = "regulator-fixed";
+   pinctrl-names = "default";
+   pinctrl-0 = <&emac_power_pin_a1000>;
+   regulator-name = "emac-3v3";
+   regulator-min-microvolt = <330>;
+   regulator-max-microvolt = <330>;
+   enable-active-high;
+   gpio = <&pio 7 15 0>;
};
 };
diff --git a/arch/arm/boot/dts/sun4i-a10-hackberry.dts 
b/arch/arm/boot/dts/sun4i-a10-hackberry.dts
index 3a1595f..6692d336 100644
--- a/arch/arm/boot/dts/sun4i-a10-hackberry.dts
+++ b/arch/arm/boot/dts/sun4i-a10-hackberry.dts
@@ -54,16 +54,12 @@
};
};
 
-   regulators {
-   compatible = "simple-bus";
-
-   reg_emac_3v3: emac-3v3 {
-   compatible = "regulator-fixed";
-   regulator-name = "emac-3v3";
-   regulator-min-microvolt = <330>;
-   regulator-max-microvolt = <330>;
-   enable-active-high;
-   gpio = <&pio 7 19 0>;
-   };
+   reg_emac_3v3: emac-3v3 {
+   compatible = "regulator-fixed";
+   regulator-name = "emac-3v3";
+   regulator-min-microvolt = <330>;
+   regulator-max-microvolt = <330>;
+   enable-active-high;
+   gpio = <&pio 7 19 0>;
};
 };
-- 
1.9.0

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[linux-sunxi] [PATCH v7 10/15] ata: ahci_platform: Update DT compatible list

2014-02-22 Thread Hans de Goede
From: Roger Quadros 

The ahci_platform driver supports "snps,dwc-ahci".
Add this to the DT binding information.

Signed-off-by: Roger Quadros 
Reviewed-by: Bartlomiej Zolnierkiewicz 
Signed-off-by: Hans de Goede 
---
 Documentation/devicetree/bindings/ata/ahci-platform.txt | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/ata/ahci-platform.txt 
b/Documentation/devicetree/bindings/ata/ahci-platform.txt
index d86e854..48b285f 100644
--- a/Documentation/devicetree/bindings/ata/ahci-platform.txt
+++ b/Documentation/devicetree/bindings/ata/ahci-platform.txt
@@ -6,8 +6,8 @@ Each SATA controller should have its own node.
 Required properties:
 - compatible: compatible list, one of "snps,spear-ahci",
   "snps,exynos5440-ahci", "ibm,476gtr-ahci",
-  "allwinner,sun4i-a10-ahci", "fsl,imx53-ahci" or
-  "fsl,imx6q-ahci"
+  "allwinner,sun4i-a10-ahci", "fsl,imx53-ahci"
+  "fsl,imx6q-ahci" or "snps,dwc-ahci"
 - interrupts: 
 - reg   : 
 
-- 
1.9.0

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[linux-sunxi] [PATCH v7 04/15] ahci-platform: Add enable_ / disable_resources helper functions

2014-02-22 Thread Hans de Goede
Signed-off-by: Hans de Goede 
---
 drivers/ata/ahci_platform.c   | 112 --
 include/linux/ahci_platform.h |   2 +
 2 files changed, 77 insertions(+), 37 deletions(-)

diff --git a/drivers/ata/ahci_platform.c b/drivers/ata/ahci_platform.c
index 907c076..6ebbc17 100644
--- a/drivers/ata/ahci_platform.c
+++ b/drivers/ata/ahci_platform.c
@@ -139,6 +139,68 @@ void ahci_platform_disable_clks(struct ahci_host_priv 
*hpriv)
 }
 EXPORT_SYMBOL_GPL(ahci_platform_disable_clks);
 
+/**
+ * ahci_platform_enable_resources - Enable platform resources
+ * @hpriv: host private area to store config values
+ *
+ * This function enables all ahci_platform managed resources in
+ * the following order:
+ * 1) Regulator
+ * 2) Clocks (through ahci_platform_enable_clks)
+ *
+ * If resource enabling fails at any point the previous enabled
+ * resources are disabled in reverse order.
+ *
+ * LOCKING:
+ * None.
+ *
+ * RETURNS:
+ * 0 on success otherwise a negative error code
+ */
+int ahci_platform_enable_resources(struct ahci_host_priv *hpriv)
+{
+   int rc;
+
+   if (hpriv->target_pwr) {
+   rc = regulator_enable(hpriv->target_pwr);
+   if (rc)
+   return rc;
+   }
+
+   rc = ahci_platform_enable_clks(hpriv);
+   if (rc)
+   goto disable_regulator;
+
+   return 0;
+
+disable_regulator:
+   if (hpriv->target_pwr)
+   regulator_disable(hpriv->target_pwr);
+   return rc;
+}
+EXPORT_SYMBOL_GPL(ahci_platform_enable_resources);
+
+/**
+ * ahci_platform_disable_resources - Disable platform resources
+ * @hpriv: host private area to store config values
+ *
+ * This function disables all ahci_platform managed resources in
+ * the following order:
+ * 1) Clocks (through ahci_platform_disable_clks)
+ * 2) Regulator
+ *
+ * LOCKING:
+ * None.
+ */
+void ahci_platform_disable_resources(struct ahci_host_priv *hpriv)
+{
+   ahci_platform_disable_clks(hpriv);
+
+   if (hpriv->target_pwr)
+   regulator_disable(hpriv->target_pwr);
+}
+EXPORT_SYMBOL_GPL(ahci_platform_disable_resources);
+
 static void ahci_put_clks(struct ahci_host_priv *hpriv)
 {
int c;
@@ -221,15 +283,9 @@ static int ahci_probe(struct platform_device *pdev)
hpriv->clks[i] = clk;
}
 
-   if (hpriv->target_pwr) {
-   rc = regulator_enable(hpriv->target_pwr);
-   if (rc)
-   goto free_clk;
-   }
-
-   rc = ahci_enable_clks(dev, hpriv);
+   rc = ahci_platform_enable_resources(hpriv);
if (rc)
-   goto disable_regulator;
+   goto free_clk;
 
/*
 * Some platforms might need to prepare for mmio region access,
@@ -240,7 +296,7 @@ static int ahci_probe(struct platform_device *pdev)
if (pdata && pdata->init) {
rc = pdata->init(dev, hpriv->mmio);
if (rc)
-   goto disable_unprepare_clk;
+   goto disable_resources;
}
 
ahci_save_initial_config(dev, hpriv,
@@ -310,11 +366,8 @@ static int ahci_probe(struct platform_device *pdev)
 pdata_exit:
if (pdata && pdata->exit)
pdata->exit(dev);
-disable_unprepare_clk:
-   ahci_disable_clks(hpriv);
-disable_regulator:
-   if (hpriv->target_pwr)
-   regulator_disable(hpriv->target_pwr);
+disable_resources:
+   ahci_platform_disable_resources(hpriv);
 free_clk:
ahci_put_clks(hpriv);
return rc;
@@ -329,11 +382,8 @@ static void ahci_host_stop(struct ata_host *host)
if (pdata && pdata->exit)
pdata->exit(dev);
 
-   ahci_disable_clks(hpriv);
+   ahci_platform_disable_resources(hpriv);
ahci_put_clks(hpriv);
-
-   if (hpriv->target_pwr)
-   regulator_disable(hpriv->target_pwr);
 }
 
 #ifdef CONFIG_PM_SLEEP
@@ -368,10 +418,7 @@ static int ahci_suspend(struct device *dev)
if (pdata && pdata->suspend)
return pdata->suspend(dev);
 
-   ahci_disable_clks(hpriv);
-
-   if (hpriv->target_pwr)
-   regulator_disable(hpriv->target_pwr);
+   ahci_platform_disable_resources(hpriv);
 
return 0;
 }
@@ -383,26 +430,20 @@ static int ahci_resume(struct device *dev)
struct ahci_host_priv *hpriv = host->private_data;
int rc;
 
-   if (hpriv->target_pwr) {
-   rc = regulator_enable(hpriv->target_pwr);
-   if (rc)
-   return rc;
-   }
-
-   rc = ahci_enable_clks(dev, hpriv);
+   rc = ahci_platform_enable_resources(hpriv);
if (rc)
-   goto disable_regulator;
+   return rc;
 
if (pdata && pdata->resume) {
rc = pdata->resume(dev);
if (rc)
-   goto disable_unprepare_clk;
+   

[linux-sunxi] [PATCH v7 05/15] ahci-platform: "Library-ise" ahci_probe functionality

2014-02-22 Thread Hans de Goede
ahci_probe consists of 3 steps:
1) Get resources (get mmio, clks, regulator)
2) Enable resources, handled by ahci_platform_enable_resouces
3) The more or less standard ahci-host controller init sequence

This commit refactors step 1 and 3 into separate functions, so the platform
drivers for AHCI implementations which need a specific order in step 2,
and / or need to do some custom register poking at some time, can re-use
ahci-platform.c code without needing to copy and paste it.

Note that ahci_platform_init_host's prototype takes the 3 non function
members of ahci_platform_data as arguments, the idea is that drivers using
the new exported utility functions will not use ahci_platform_data at all,
and hopefully in the future ahci_platform_data can go away entirely.

Signed-off-by: Hans de Goede 
---
 drivers/ata/ahci_platform.c   | 195 --
 include/linux/ahci_platform.h |  14 +++
 2 files changed, 144 insertions(+), 65 deletions(-)

diff --git a/drivers/ata/ahci_platform.c b/drivers/ata/ahci_platform.c
index 6ebbc17..7f3f2ac 100644
--- a/drivers/ata/ahci_platform.c
+++ b/drivers/ata/ahci_platform.c
@@ -201,64 +201,64 @@ void ahci_platform_disable_resources(struct 
ahci_host_priv *hpriv)
 }
 EXPORT_SYMBOL_GPL(ahci_platform_disable_resources);
 
-static void ahci_put_clks(struct ahci_host_priv *hpriv)
+static void ahci_platform_put_resources(struct device *dev, void *res)
 {
+   struct ahci_host_priv *hpriv = res;
int c;
 
for (c = 0; c < AHCI_MAX_CLKS && hpriv->clks[c]; c++)
clk_put(hpriv->clks[c]);
 }
 
-static int ahci_probe(struct platform_device *pdev)
+/**
+ * ahci_platform_get_resources - Get platform resources
+ * @pdev: platform device to get resources for
+ *
+ * This function allocates an ahci_host_priv struct, and gets the
+ * following resources, storing a reference to them inside the returned
+ * struct:
+ *
+ * 1) mmio registers (IORESOURCE_MEM 0, mandatory)
+ * 2) regulator for controlling the targets power (optional)
+ * 3) 0 - AHCI_MAX_CLKS clocks, as specified in the devs devicetree node,
+ *or for non devicetree enabled platforms a single clock
+ *
+ * LOCKING:
+ * None.
+ *
+ * RETURNS:
+ * The allocated ahci_host_priv on success, otherwise an ERR_PTR value
+ */
+struct ahci_host_priv *ahci_platform_get_resources(
+   struct platform_device *pdev)
 {
struct device *dev = &pdev->dev;
-   struct ahci_platform_data *pdata = dev_get_platdata(dev);
-   const struct platform_device_id *id = platform_get_device_id(pdev);
-   struct ata_port_info pi = ahci_port_info[id ? id->driver_data : 0];
-   const struct ata_port_info *ppi[] = { &pi, NULL };
struct ahci_host_priv *hpriv;
-   struct ata_host *host;
-   struct resource *mem;
struct clk *clk;
-   int irq;
-   int n_ports;
-   int i;
-   int rc;
+   int i, rc = -ENOMEM;
 
-   mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-   if (!mem) {
-   dev_err(dev, "no mmio space\n");
-   return -EINVAL;
-   }
+   if (!devres_open_group(dev, NULL, GFP_KERNEL))
+   return ERR_PTR(-ENOMEM);
 
-   irq = platform_get_irq(pdev, 0);
-   if (irq <= 0) {
-   dev_err(dev, "no irq\n");
-   return -EINVAL;
-   }
+   hpriv = devres_alloc(ahci_platform_put_resources, sizeof(*hpriv),
+GFP_KERNEL);
+   if (!hpriv)
+   goto err_out;
 
-   if (pdata && pdata->ata_port_info)
-   pi = *pdata->ata_port_info;
+   devres_add(dev, hpriv);
 
-   hpriv = devm_kzalloc(dev, sizeof(*hpriv), GFP_KERNEL);
-   if (!hpriv) {
-   dev_err(dev, "can't alloc ahci_host_priv\n");
-   return -ENOMEM;
-   }
-
-   hpriv->flags |= (unsigned long)pi.private_data;
-
-   hpriv->mmio = devm_ioremap(dev, mem->start, resource_size(mem));
+   hpriv->mmio = devm_ioremap_resource(dev,
+ platform_get_resource(pdev, IORESOURCE_MEM, 0));
if (!hpriv->mmio) {
-   dev_err(dev, "can't map %pR\n", mem);
-   return -ENOMEM;
+   dev_err(dev, "no mmio space\n");
+   goto err_out;
}
 
hpriv->target_pwr = devm_regulator_get_optional(dev, "target");
if (IS_ERR(hpriv->target_pwr)) {
rc = PTR_ERR(hpriv->target_pwr);
if (rc == -EPROBE_DEFER)
-   return -EPROBE_DEFER;
+   goto err_out;
hpriv->target_pwr = NULL;
}
 
@@ -277,33 +277,62 @@ static int ahci_probe(struct platform_device *pdev)
if (IS_ERR(clk)) {
rc = PTR_ERR(clk);
if (rc == -EPROBE_DEFER)
-   goto free_clk;
+   goto err_out;
  

[linux-sunxi] [PATCH v7 02/15] ahci-platform: Add support for devices with more then 1 clock

2014-02-22 Thread Hans de Goede
The allwinner-sun4i AHCI controller needs 2 clocks to be enabled and the
imx AHCI controller needs 3 clocks to be enabled.

Signed-off-by: Hans de Goede 
---
 .../devicetree/bindings/ata/ahci-platform.txt  |   1 +
 drivers/ata/ahci.h |   3 +-
 drivers/ata/ahci_platform.c| 119 -
 include/linux/ahci_platform.h  |   4 +
 4 files changed, 99 insertions(+), 28 deletions(-)

diff --git a/Documentation/devicetree/bindings/ata/ahci-platform.txt 
b/Documentation/devicetree/bindings/ata/ahci-platform.txt
index 89de156..3ced07d 100644
--- a/Documentation/devicetree/bindings/ata/ahci-platform.txt
+++ b/Documentation/devicetree/bindings/ata/ahci-platform.txt
@@ -10,6 +10,7 @@ Required properties:
 
 Optional properties:
 - dma-coherent  : Present if dma operations are coherent
+- clocks: a list of phandle + clock specifier pairs
 
 Example:
 sata@ffe08000 {
diff --git a/drivers/ata/ahci.h b/drivers/ata/ahci.h
index 64d1a99..c12862b 100644
--- a/drivers/ata/ahci.h
+++ b/drivers/ata/ahci.h
@@ -51,6 +51,7 @@
 
 enum {
AHCI_MAX_PORTS  = 32,
+   AHCI_MAX_CLKS   = 3,
AHCI_MAX_SG = 168, /* hardware max is 64K */
AHCI_DMA_BOUNDARY   = 0x,
AHCI_MAX_CMDS   = 32,
@@ -321,7 +322,7 @@ struct ahci_host_priv {
u32 em_loc; /* enclosure management location */
u32 em_buf_sz;  /* EM buffer size in byte */
u32 em_msg_type;/* EM message type */
-   struct clk  *clk;   /* Only for platforms 
supporting clk */
+   struct clk  *clks[AHCI_MAX_CLKS]; /* Optional */
void*plat_data; /* Other platform data */
/*
 * Optional ahci_start_engine override, if not set this gets set to the
diff --git a/drivers/ata/ahci_platform.c b/drivers/ata/ahci_platform.c
index 4b231ba..609975d 100644
--- a/drivers/ata/ahci_platform.c
+++ b/drivers/ata/ahci_platform.c
@@ -87,6 +87,66 @@ static struct scsi_host_template ahci_platform_sht = {
AHCI_SHT("ahci_platform"),
 };
 
+/**
+ * ahci_platform_enable_clks - Enable platform clocks
+ * @hpriv: host private area to store config values
+ *
+ * This function enables all the clks found in hpriv->clks, starting
+ * at index 0. If any clk fails to enable it disables all the clks
+ * already enabled in reverse order, and then returns an error.
+ *
+ * LOCKING:
+ * None.
+ *
+ * RETURNS:
+ * 0 on success otherwise a negative error code
+ */
+int ahci_platform_enable_clks(struct ahci_host_priv *hpriv)
+{
+   int c, rc;
+
+   for (c = 0; c < AHCI_MAX_CLKS && hpriv->clks[c]; c++) {
+   rc = clk_prepare_enable(hpriv->clks[c]);
+   if (rc)
+   goto disable_unprepare_clk;
+   }
+   return 0;
+
+disable_unprepare_clk:
+   while (--c >= 0)
+   clk_disable_unprepare(hpriv->clks[c]);
+   return rc;
+}
+EXPORT_SYMBOL_GPL(ahci_platform_enable_clks);
+
+/**
+ * ahci_platform_disable_clks - Disable platform clocks
+ * @hpriv: host private area to store config values
+ *
+ * This function disables all the clks found in hpriv->clks, in reverse
+ * order of ahci_platform_enable_clks (starting at the end of the array).
+ *
+ * LOCKING:
+ * None.
+ */
+void ahci_platform_disable_clks(struct ahci_host_priv *hpriv)
+{
+   int c;
+
+   for (c = AHCI_MAX_CLKS - 1; c >= 0; c--)
+   if (hpriv->clks[c])
+   clk_disable_unprepare(hpriv->clks[c]);
+}
+EXPORT_SYMBOL_GPL(ahci_platform_disable_clks);
+
+static void ahci_put_clks(struct ahci_host_priv *hpriv)
+{
+   int c;
+
+   for (c = 0; c < AHCI_MAX_CLKS && hpriv->clks[c]; c++)
+   clk_put(hpriv->clks[c]);
+}
+
 static int ahci_probe(struct platform_device *pdev)
 {
struct device *dev = &pdev->dev;
@@ -97,6 +157,7 @@ static int ahci_probe(struct platform_device *pdev)
struct ahci_host_priv *hpriv;
struct ata_host *host;
struct resource *mem;
+   struct clk *clk;
int irq;
int n_ports;
int i;
@@ -131,17 +192,31 @@ static int ahci_probe(struct platform_device *pdev)
return -ENOMEM;
}
 
-   hpriv->clk = clk_get(dev, NULL);
-   if (IS_ERR(hpriv->clk)) {
-   dev_err(dev, "can't get clock\n");
-   } else {
-   rc = clk_prepare_enable(hpriv->clk);
-   if (rc) {
-   dev_err(dev, "clock prepare enable failed");
-   goto free_clk;
+   for (i = 0; i < AHCI_MAX_CLKS; i++) {
+   /*
+* For now we must use clk_get(dev, NULL) for the first clock,
+* because some platforms (da850, spear13xx) are not yet
+   

[linux-sunxi] [PATCH v7 03/15] ahci-platform: Add support for an optional regulator for sata-target power

2014-02-22 Thread Hans de Goede
Signed-off-by: Hans de Goede 
---
 .../devicetree/bindings/ata/ahci-platform.txt  |  1 +
 drivers/ata/ahci.h |  2 ++
 drivers/ata/ahci_platform.c| 36 --
 3 files changed, 37 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/ata/ahci-platform.txt 
b/Documentation/devicetree/bindings/ata/ahci-platform.txt
index 3ced07d..1ac807f 100644
--- a/Documentation/devicetree/bindings/ata/ahci-platform.txt
+++ b/Documentation/devicetree/bindings/ata/ahci-platform.txt
@@ -11,6 +11,7 @@ Required properties:
 Optional properties:
 - dma-coherent  : Present if dma operations are coherent
 - clocks: a list of phandle + clock specifier pairs
+- target-supply : regulator for SATA target power
 
 Example:
 sata@ffe08000 {
diff --git a/drivers/ata/ahci.h b/drivers/ata/ahci.h
index c12862b..bf8100c 100644
--- a/drivers/ata/ahci.h
+++ b/drivers/ata/ahci.h
@@ -37,6 +37,7 @@
 
 #include 
 #include 
+#include 
 
 /* Enclosure Management Control */
 #define EM_CTRL_MSG_TYPE  0x000f
@@ -323,6 +324,7 @@ struct ahci_host_priv {
u32 em_buf_sz;  /* EM buffer size in byte */
u32 em_msg_type;/* EM message type */
struct clk  *clks[AHCI_MAX_CLKS]; /* Optional */
+   struct regulator*target_pwr;/* Optional */
void*plat_data; /* Other platform data */
/*
 * Optional ahci_start_engine override, if not set this gets set to the
diff --git a/drivers/ata/ahci_platform.c b/drivers/ata/ahci_platform.c
index 609975d..907c076 100644
--- a/drivers/ata/ahci_platform.c
+++ b/drivers/ata/ahci_platform.c
@@ -192,6 +192,14 @@ static int ahci_probe(struct platform_device *pdev)
return -ENOMEM;
}
 
+   hpriv->target_pwr = devm_regulator_get_optional(dev, "target");
+   if (IS_ERR(hpriv->target_pwr)) {
+   rc = PTR_ERR(hpriv->target_pwr);
+   if (rc == -EPROBE_DEFER)
+   return -EPROBE_DEFER;
+   hpriv->target_pwr = NULL;
+   }
+
for (i = 0; i < AHCI_MAX_CLKS; i++) {
/*
 * For now we must use clk_get(dev, NULL) for the first clock,
@@ -213,9 +221,15 @@ static int ahci_probe(struct platform_device *pdev)
hpriv->clks[i] = clk;
}
 
+   if (hpriv->target_pwr) {
+   rc = regulator_enable(hpriv->target_pwr);
+   if (rc)
+   goto free_clk;
+   }
+
rc = ahci_enable_clks(dev, hpriv);
if (rc)
-   goto free_clk;
+   goto disable_regulator;
 
/*
 * Some platforms might need to prepare for mmio region access,
@@ -298,6 +312,9 @@ pdata_exit:
pdata->exit(dev);
 disable_unprepare_clk:
ahci_disable_clks(hpriv);
+disable_regulator:
+   if (hpriv->target_pwr)
+   regulator_disable(hpriv->target_pwr);
 free_clk:
ahci_put_clks(hpriv);
return rc;
@@ -314,6 +331,9 @@ static void ahci_host_stop(struct ata_host *host)
 
ahci_disable_clks(hpriv);
ahci_put_clks(hpriv);
+
+   if (hpriv->target_pwr)
+   regulator_disable(hpriv->target_pwr);
 }
 
 #ifdef CONFIG_PM_SLEEP
@@ -350,6 +370,9 @@ static int ahci_suspend(struct device *dev)
 
ahci_disable_clks(hpriv);
 
+   if (hpriv->target_pwr)
+   regulator_disable(hpriv->target_pwr);
+
return 0;
 }
 
@@ -360,9 +383,15 @@ static int ahci_resume(struct device *dev)
struct ahci_host_priv *hpriv = host->private_data;
int rc;
 
+   if (hpriv->target_pwr) {
+   rc = regulator_enable(hpriv->target_pwr);
+   if (rc)
+   return rc;
+   }
+
rc = ahci_enable_clks(dev, hpriv);
if (rc)
-   return rc;
+   goto disable_regulator;
 
if (pdata && pdata->resume) {
rc = pdata->resume(dev);
@@ -384,6 +413,9 @@ static int ahci_resume(struct device *dev)
 
 disable_unprepare_clk:
ahci_disable_clks(hpriv);
+disable_regulator:
+   if (hpriv->target_pwr)
+   regulator_disable(hpriv->target_pwr);
 
return rc;
 }
-- 
1.9.0

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[linux-sunxi] [PATCH v7 09/15] ata: ahci_platform: Add DT compatible for Synopsis DWC AHCI controller

2014-02-22 Thread Hans de Goede
From: Roger Quadros 

Add compatible string "snps,dwc-ahci", which should be used
for Synopsis Designware SATA cores. e.g. on TI OMAP5 and DRA7 platforms.

Signed-off-by: Roger Quadros 
Reviewed-by: Bartlomiej Zolnierkiewicz 
Signed-off-by: Hans de Goede 
---
 drivers/ata/ahci_platform.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/ata/ahci_platform.c b/drivers/ata/ahci_platform.c
index bdadec1..d7e55ba 100644
--- a/drivers/ata/ahci_platform.c
+++ b/drivers/ata/ahci_platform.c
@@ -609,6 +609,7 @@ static const struct of_device_id ahci_of_match[] = {
{ .compatible = "snps,spear-ahci", },
{ .compatible = "snps,exynos5440-ahci", },
{ .compatible = "ibm,476gtr-ahci", },
+   { .compatible = "snps,dwc-ahci", },
{},
 };
 MODULE_DEVICE_TABLE(of, ahci_of_match);
-- 
1.9.0

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[linux-sunxi] [PATCH v7 06/15] ahci-platform: "Library-ise" suspend / resume functionality

2014-02-22 Thread Hans de Goede
Split suspend / resume code into host suspend / resume functionality and
resource enable / disabling phases, and export the new suspend_ / resume_host
functions.

Signed-off-by: Hans de Goede 
---
 drivers/ata/ahci_platform.c   | 109 --
 include/linux/ahci_platform.h |   5 ++
 2 files changed, 99 insertions(+), 15 deletions(-)

diff --git a/drivers/ata/ahci_platform.c b/drivers/ata/ahci_platform.c
index 7f3f2ac..bdadec1 100644
--- a/drivers/ata/ahci_platform.c
+++ b/drivers/ata/ahci_platform.c
@@ -452,14 +452,26 @@ static void ahci_host_stop(struct ata_host *host)
 }
 
 #ifdef CONFIG_PM_SLEEP
-static int ahci_suspend(struct device *dev)
+/**
+ * ahci_platform_suspend_host - Suspend an ahci-platform host
+ * @dev: device pointer for the host
+ *
+ * This function does all the usual steps needed to suspend an
+ * ahci-platform host, note any necessary resources (ie clks, phy, etc.)
+ * must be disabled after calling this.
+ *
+ * LOCKING:
+ * None.
+ *
+ * RETURNS:
+ * 0 on success otherwise a negative error code
+ */
+int ahci_platform_suspend_host(struct device *dev)
 {
-   struct ahci_platform_data *pdata = dev_get_platdata(dev);
struct ata_host *host = dev_get_drvdata(dev);
struct ahci_host_priv *hpriv = host->private_data;
void __iomem *mmio = hpriv->mmio;
u32 ctl;
-   int rc;
 
if (hpriv->flags & AHCI_HFLAG_NO_SUSPEND) {
dev_err(dev, "firmware update required for suspend/resume\n");
@@ -476,7 +488,64 @@ static int ahci_suspend(struct device *dev)
writel(ctl, mmio + HOST_CTL);
readl(mmio + HOST_CTL); /* flush */
 
-   rc = ata_host_suspend(host, PMSG_SUSPEND);
+   return ata_host_suspend(host, PMSG_SUSPEND);
+}
+EXPORT_SYMBOL_GPL(ahci_platform_suspend_host);
+
+/**
+ * ahci_platform_resume_host - Resume an ahci-platform host
+ * @dev: device pointer for the host
+ *
+ * This function does all the usual steps needed to resume an
+ * ahci-platform host, note any necessary resources (ie clks, phy, etc.)
+ * must be initialized / enabled before calling this.
+ *
+ * LOCKING:
+ * None.
+ *
+ * RETURNS:
+ * 0 on success otherwise a negative error code
+ */
+int ahci_platform_resume_host(struct device *dev)
+{
+   struct ata_host *host = dev_get_drvdata(dev);
+   int rc;
+
+   if (dev->power.power_state.event == PM_EVENT_SUSPEND) {
+   rc = ahci_reset_controller(host);
+   if (rc)
+   return rc;
+
+   ahci_init_controller(host);
+   }
+
+   ata_host_resume(host);
+
+   return 0;
+}
+EXPORT_SYMBOL_GPL(ahci_platform_resume_host);
+
+/**
+ * ahci_platform_suspend - Suspend an ahci-platform device
+ * @dev: the platform device to suspend
+ *
+ * This function suspends the host associated with the device, followed
+ * by disabling all the resources of the device.
+ *
+ * LOCKING:
+ * None.
+ *
+ * RETURNS:
+ * 0 on success otherwise a negative error code
+ */
+int ahci_platform_suspend(struct device *dev)
+{
+   struct ahci_platform_data *pdata = dev_get_platdata(dev);
+   struct ata_host *host = dev_get_drvdata(dev);
+   struct ahci_host_priv *hpriv = host->private_data;
+   int rc;
+
+   rc = ahci_platform_suspend_host(dev);
if (rc)
return rc;
 
@@ -487,8 +556,22 @@ static int ahci_suspend(struct device *dev)
 
return 0;
 }
+EXPORT_SYMBOL_GPL(ahci_platform_suspend);
 
-static int ahci_resume(struct device *dev)
+/**
+ * ahci_platform_resume - Resume an ahci-platform device
+ * @dev: the platform device to resume
+ *
+ * This function enables all the resources of the device followed by
+ * resuming the host associated with the device.
+ *
+ * LOCKING:
+ * None.
+ *
+ * RETURNS:
+ * 0 on success otherwise a negative error code
+ */
+int ahci_platform_resume(struct device *dev)
 {
struct ahci_platform_data *pdata = dev_get_platdata(dev);
struct ata_host *host = dev_get_drvdata(dev);
@@ -505,15 +588,9 @@ static int ahci_resume(struct device *dev)
goto disable_resources;
}
 
-   if (dev->power.power_state.event == PM_EVENT_SUSPEND) {
-   rc = ahci_reset_controller(host);
-   if (rc)
-   goto disable_resources;
-
-   ahci_init_controller(host);
-   }
-
-   ata_host_resume(host);
+   rc = ahci_platform_resume_host(dev);
+   if (rc)
+   goto disable_resources;
 
return 0;
 
@@ -522,9 +599,11 @@ disable_resources:
 
return rc;
 }
+EXPORT_SYMBOL_GPL(ahci_platform_resume);
 #endif
 
-static SIMPLE_DEV_PM_OPS(ahci_pm_ops, ahci_suspend, ahci_resume);
+static SIMPLE_DEV_PM_OPS(ahci_pm_ops, ahci_platform_suspend,
+ahci_platform_resume);
 
 static const struct of_devi

[linux-sunxi] [PATCH v7 07/15] ARM: sunxi: Add support for Allwinner SUNXi SoCs sata to ahci_platform

2014-02-22 Thread Hans de Goede
From: Olliver Schinagl 

This patch adds support for the ahci sata controler found on Allwinner A10
and A20 SoCs to the ahci_platform driver.

Orignally written by Olliver Schinagl using the approach of having a platform
device which probe method creates a new child platform device which gets
driven by ahci_platform.c, as done by ahci_imx.c .

Refactored by Hans de Goede to add most of the non sunxi specific functionality
to ahci_platform.c and use a platform_data pointer from of_device_id for the
sunxi specific bits.

Signed-off-by: Olliver Schinagl 
Signed-off-by: Hans de Goede 
---
 .../devicetree/bindings/ata/ahci-platform.txt  |  15 +-
 drivers/ata/Kconfig|   9 +
 drivers/ata/Makefile   |   1 +
 drivers/ata/ahci_sunxi.c   | 249 +
 4 files changed, 271 insertions(+), 3 deletions(-)
 create mode 100644 drivers/ata/ahci_sunxi.c

diff --git a/Documentation/devicetree/bindings/ata/ahci-platform.txt 
b/Documentation/devicetree/bindings/ata/ahci-platform.txt
index 1ac807f..499bfed 100644
--- a/Documentation/devicetree/bindings/ata/ahci-platform.txt
+++ b/Documentation/devicetree/bindings/ata/ahci-platform.txt
@@ -4,7 +4,9 @@ SATA nodes are defined to describe on-chip Serial ATA 
controllers.
 Each SATA controller should have its own node.
 
 Required properties:
-- compatible: compatible list, contains "snps,spear-ahci"
+- compatible: compatible list, one of "snps,spear-ahci",
+  "snps,exynos5440-ahci", "ibm,476gtr-ahci", or
+  "allwinner,sun4i-a10-ahci"
 - interrupts: 
 - reg   : 
 
@@ -13,10 +15,17 @@ Optional properties:
 - clocks: a list of phandle + clock specifier pairs
 - target-supply : regulator for SATA target power
 
-Example:
+Examples:
 sata@ffe08000 {
compatible = "snps,spear-ahci";
reg = <0xffe08000 0x1000>;
interrupts = <115>;
-
 };
+
+   ahci: sata@01c18000 {
+   compatible = "allwinner,sun4i-a10-ahci";
+   reg = <0x01c18000 0x1000>;
+   interrupts = <56>;
+   clocks = <&pll6 0>, <&ahb_gates 25>;
+   target-supply = <®_ahci_5v>;
+   };
diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
index 4e73772..cc67cc0 100644
--- a/drivers/ata/Kconfig
+++ b/drivers/ata/Kconfig
@@ -106,6 +106,15 @@ config AHCI_IMX
 
  If unsure, say N.
 
+config AHCI_SUNXI
+   tristate "Allwinner sunxi AHCI SATA support"
+   depends on ARCH_SUNXI && SATA_AHCI_PLATFORM
+   help
+ This option enables support for the Allwinner sunxi SoC's
+ onboard AHCI SATA.
+
+ If unsure, say N.
+
 config SATA_FSL
tristate "Freescale 3.0Gbps SATA support"
depends on FSL_SOC
diff --git a/drivers/ata/Makefile b/drivers/ata/Makefile
index 46518c6..246050b 100644
--- a/drivers/ata/Makefile
+++ b/drivers/ata/Makefile
@@ -11,6 +11,7 @@ obj-$(CONFIG_SATA_SIL24)  += sata_sil24.o
 obj-$(CONFIG_SATA_DWC) += sata_dwc_460ex.o
 obj-$(CONFIG_SATA_HIGHBANK)+= sata_highbank.o libahci.o
 obj-$(CONFIG_AHCI_IMX) += ahci_imx.o
+obj-$(CONFIG_AHCI_SUNXI)   += ahci_sunxi.o
 
 # SFF w/ custom DMA
 obj-$(CONFIG_PDC_ADMA) += pdc_adma.o
diff --git a/drivers/ata/ahci_sunxi.c b/drivers/ata/ahci_sunxi.c
new file mode 100644
index 000..001f7dfc
--- /dev/null
+++ b/drivers/ata/ahci_sunxi.c
@@ -0,0 +1,249 @@
+/*
+ * Allwinner sunxi AHCI SATA platform driver
+ * Copyright 2013 Olliver Schinagl 
+ * Copyright 2014 Hans de Goede 
+ *
+ * based on the AHCI SATA platform driver by Jeff Garzik and Anton Vorontsov
+ * Based on code from Allwinner Technology Co., Ltd. ,
+ * Daniel Wang 
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "ahci.h"
+
+#define AHCI_BISTAFR 0x00a0
+#define AHCI_BISTCR 0x00a4
+#define AHCI_BISTFCTR 0x00a8
+#define AHCI_BISTSR 0x00ac
+#define AHCI_BISTDECR 0x00b0
+#define AHCI_DIAGNR0 0x00b4
+#define AHCI_DIAGNR1 0x00b8
+#define AHCI_OOBR 0x00bc
+#define AHCI_PHYCS0R 0x00c0
+#define AHCI_PHYCS1R 0x00c4
+#define AHCI_PHYCS2R 0x00c8
+#define AHCI_TIMER1MS 0x00e0
+#define AHCI_GPARAM1R 0x00e8
+#define AHCI_GPARAM2R 0x00ec
+#define AHCI_PPARAMR 0x00f0
+#define AHCI_TESTR 0x00f4
+#define AHCI_VERSIONR 0x00f8
+#define AHCI_IDR 0x00fc
+#define AHCI_RWCR 0x00fc
+#define AHCI_P0DMACR 0x0170
+#define AHCI_P0PHYCR 0x0178
+#define A

[linux-sunxi]

2014-02-22 Thread Hans de Goede
Hi all,

Here is v7 of my patchset for adding ahci-sunxi support. This is hopefully
the final final version of this set :)

Note I'm going on vacation for a week starting Monday, so if I'm not responding
that is why. Tejun if you feel some small cleanups are still necessary and
you don't want to wait for me to get back feel free to squash in any cleanups
you deem necessary.

This has been tested with Allwinner A10, Allwinner A20 and Freeware imx6x SoCs,
including suspend / resume. Note that the ahci_imx driver now also has imx53
sata support, it would be good if someone could test that with this series.


History:

v1, by Olliver Schinagl:
This was using the approach of having a platform device which probe method
creates a new child platform device which gets driven by ahci_platform.c,
as done by ahci_imx.c .

v2, by Hans de Goede:
Stand-alone platform driver based on Olliver's work

v3, by Hans de Goede:
patch-series, with 4 different parts
a) Make ahci_platform.c more generic, handle more then 1 clk, target pwr
   regulator
b) New ahci-sunxi code only populating ahci_platform_data, passed to
   ahci_platform.c to of_device_id matching.
c) Refactor ahci-imx code to work the same as the new ahci-sunxi code, this
   is the reason why v3 is an RFC, I'm waiting for the wandboard I ordered to
   arrive so that I can actually test this.
d) dts bindings for the sunxi ahci parts

v4, by Hans de Goede:
patch-series, with 5 different parts:
a) Make ahci_platform.c more generic, handle more then 1 clk, target pwr
   regulator
b) Turn parts of ahci_platform.c into a library for use by other drivers
c) New ahci-sunxi driver using the ahci_platform.c library functionality
d) Refactor ahci-imx code to work the same as the new ahci-sunxi code
e) dts bindings for the sunxi ahci parts

v5:
v4 + the following changes:
1) fsl,imx6q driver is now tested
2) fixed suspend / resume on fsl,imx6q
3) Modifed devicetree node naming to match dt spec
4) Reworked the busy waiting code in the sunxi-phy handling as suggested by
   Russell King

v6:
v5 rebased on top of 3.14-rc3 + the following changes
1) Added Roger Quadros' generic phy support series
2) Added a "ARM: sun4i: dt: Remove grouping + simple-bus for regulators" dts
   patch

v7:
v6 + the following changes:
1) Addressed all Tejun's review remarks:
  * Added function header comments to all exported ahci_platform functions
  * Added comments in some other places
  * Removed use of 2 empty lines to separate functions in some cases
  * Use devres to automatically call ahci_platform_put_resources on
get_resource failure, probe failure and regular device remove
2) Dropped patches to move ahci_host_priv struct declaration to include/linux,
  this was a left-over from v3 and is no longer necessary
3) Updated Roger's "ata: ahci_platform: Manage SATA PHY" patch:
  * Update function header comments for the changes this makes
  * Drop the Kconfig PHY requires hack, my patch for the phy-core to always be
built-in has been queued in Greg KH's tree, so this is no longer necessary.
4) Dropped Roger's "ata: ahci_platform: Add 'struct device' argument to 
ahci_platform_put_resources()"
  patch, ahci_platform_put_resources already has a device argument as result
  of it being changed into a devres release function

Tejun, can you please add patches 1-12 to your ata tree for 3.15 ?

Maxime, can you please add patch 13-15 to your dts tree for 3.15 ?

Thanks & Regards,

Hans

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[linux-sunxi] [PATCH v7 01/15] libahci: Allow drivers to override start_engine

2014-02-22 Thread Hans de Goede
Allwinner A10 and A20 ARM SoCs have an AHCI sata controller which needs a
special register to be poked before starting the DMA engine.

This register gets reset on an ahci_stop_engine call, so there is no other
place then ahci_start_engine where this poking can be done.

This commit allows drivers to override ahci_start_engine behavior for use by
the Allwinner AHCI driver (and potentially other drivers in the future).

Signed-off-by: Hans de Goede 
---
 drivers/ata/ahci.c  |  6 --
 drivers/ata/ahci.h  |  6 ++
 drivers/ata/libahci.c   | 26 +++---
 drivers/ata/sata_highbank.c |  3 ++-
 4 files changed, 31 insertions(+), 10 deletions(-)

diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index dc2756f..eda68b4 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -564,6 +564,7 @@ static int ahci_vt8251_hardreset(struct ata_link *link, 
unsigned int *class,
 unsigned long deadline)
 {
struct ata_port *ap = link->ap;
+   struct ahci_host_priv *hpriv = ap->host->private_data;
bool online;
int rc;
 
@@ -574,7 +575,7 @@ static int ahci_vt8251_hardreset(struct ata_link *link, 
unsigned int *class,
rc = sata_link_hardreset(link, sata_ehc_deb_timing(&link->eh_context),
 deadline, &online, NULL);
 
-   ahci_start_engine(ap);
+   hpriv->start_engine(ap);
 
DPRINTK("EXIT, rc=%d, class=%u\n", rc, *class);
 
@@ -589,6 +590,7 @@ static int ahci_p5wdh_hardreset(struct ata_link *link, 
unsigned int *class,
 {
struct ata_port *ap = link->ap;
struct ahci_port_priv *pp = ap->private_data;
+   struct ahci_host_priv *hpriv = ap->host->private_data;
u8 *d2h_fis = pp->rx_fis + RX_FIS_D2H_REG;
struct ata_taskfile tf;
bool online;
@@ -604,7 +606,7 @@ static int ahci_p5wdh_hardreset(struct ata_link *link, 
unsigned int *class,
rc = sata_link_hardreset(link, sata_ehc_deb_timing(&link->eh_context),
 deadline, &online, NULL);
 
-   ahci_start_engine(ap);
+   hpriv->start_engine(ap);
 
/* The pseudo configuration device on SIMG4726 attached to
 * ASUS P5W-DH Deluxe doesn't send signature FIS after
diff --git a/drivers/ata/ahci.h b/drivers/ata/ahci.h
index 2289efd..64d1a99 100644
--- a/drivers/ata/ahci.h
+++ b/drivers/ata/ahci.h
@@ -323,6 +323,12 @@ struct ahci_host_priv {
u32 em_msg_type;/* EM message type */
struct clk  *clk;   /* Only for platforms 
supporting clk */
void*plat_data; /* Other platform data */
+   /*
+* Optional ahci_start_engine override, if not set this gets set to the
+* default ahci_start_engine during ahci_save_initial_config, this can
+* be overridden anytime before the host is activated.
+*/
+   void(*start_engine)(struct ata_port *ap);
 };
 
 extern int ahci_ignore_sss;
diff --git a/drivers/ata/libahci.c b/drivers/ata/libahci.c
index 36605ab..f839bb3 100644
--- a/drivers/ata/libahci.c
+++ b/drivers/ata/libahci.c
@@ -394,6 +394,9 @@ static ssize_t ahci_show_em_supported(struct device *dev,
  *
  * If inconsistent, config values are fixed up by this function.
  *
+ * If it is not set already this function sets hpriv->start_engine to
+ * ahci_start_engine.
+ *
  * LOCKING:
  * None.
  */
@@ -500,6 +503,9 @@ void ahci_save_initial_config(struct device *dev,
hpriv->cap = cap;
hpriv->cap2 = cap2;
hpriv->port_map = port_map;
+
+   if (!hpriv->start_engine)
+   hpriv->start_engine = ahci_start_engine;
 }
 EXPORT_SYMBOL_GPL(ahci_save_initial_config);
 
@@ -766,7 +772,7 @@ static void ahci_start_port(struct ata_port *ap)
 
/* enable DMA */
if (!(hpriv->flags & AHCI_HFLAG_DELAY_ENGINE))
-   ahci_start_engine(ap);
+   hpriv->start_engine(ap);
 
/* turn on LEDs */
if (ap->flags & ATA_FLAG_EM) {
@@ -1234,7 +1240,7 @@ int ahci_kick_engine(struct ata_port *ap)
 
/* restart engine */
  out_restart:
-   ahci_start_engine(ap);
+   hpriv->start_engine(ap);
return rc;
 }
 EXPORT_SYMBOL_GPL(ahci_kick_engine);
@@ -1426,6 +1432,7 @@ static int ahci_hardreset(struct ata_link *link, unsigned 
int *class,
const unsigned long *timing = sata_ehc_deb_timing(&link->eh_context);
struct ata_port *ap = link->ap;
struct ahci_port_priv *pp = ap->private_data;
+   struct ahci_host_priv *hpriv = ap->host->private_data;
u8 *d2h_fis = pp->rx_fis + RX_FIS_D2H_REG;
struct ata_taskfile tf;
bool online;
@@ -1443,7 +1450,7 @@ static int ahci_hardreset(struct ata_link *link, unsigned 
int *class,
rc = sata_link_hardreset(link, timing, deadline, &online,
 ahci_check_ready);
 
-   ahci_start_engine(ap);
+ 

[linux-sunxi] Re: [PATCH v7 4/8] ARM: sunxi: Add driver for SD/MMC hosts found on Allwinner sunxi SoCs

2014-02-22 Thread Hans de Goede

Hi,

On 02/22/2014 09:31 AM, Maxime Ripard wrote:




This should be before the registration. Otherwise, you're racy.


Nope, we only need this to get the data on sunxi_mmc_remove,
everywhere else the data is found through the mmc-host struct.


Still, if anyone makes a following patch using the platform_device
for some reason, we will have a race condition, without any way to
notice it.

Plus, you're doing all the other bits of initialization of your
structures much earlier, why not be consistent and having all of
them at the same place?


Most platform drivers I've worked on do platform_set_drvdata as late
as possible, so that the drvdata does not get set and never cleared
in error paths.


You don't actually have to clear it,


Erm, yes and no, you used to have to manually clear it, so as to not
leave a dangling pointer in there, which may confuse things later.

But since a few kernel releases, the driver core will explicitly
clear it on probe failure, since many many drivers got this wrong.
I know this because I wrote the driver core patch doing the clearing :)

So in drivers which used to get it right, you will see the
platform_set_drvdata call quite late and it being so late
in the sunxi-mmc.c driver is old habits dying hard.

But you're right that this is no longer needed, still I see little
reason to move it up, but if you really want it to be moved up,
I'm fine with that.


and some frameworks actually require you to call dev_set_drvdata before 
registration, so that
statement looks quite odd to me.


And the proper thing to do when using those frameworks was to
manually clear drvdata again on probe failure. Anyways this is
all handled in the driver core now, so this whole discussion
is moot anyways. I was merely trying to explain where my
preference for doing the dev_set_drvdata call as late as
possible comes from.

Regards,

Hans

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[linux-sunxi] Re: [PATCH v6 17/18] ARM: sun4i: dt: Add ahci / sata support

2014-02-22 Thread Hans de Goede

Hi Maxime,

On 02/21/2014 07:15 PM, Maxime Ripard wrote:

Hi Hans,

On Wed, Feb 19, 2014 at 01:01:59PM +0100, Hans de Goede wrote:

From: Oliver Schinagl 

This patch adds sunxi sata support to A10 boards that have such a connector.
Some boards also feature a regulator via a GPIO and support for this is also
added.

Signed-off-by: Olliver Schinagl 
Signed-off-by: Hans de Goede 
---
  arch/arm/boot/dts/sun4i-a10-a1000.dts  |  4 
  arch/arm/boot/dts/sun4i-a10-cubieboard.dts |  6 +
  arch/arm/boot/dts/sun4i-a10.dtsi   |  8 +++
  arch/arm/boot/dts/sunxi-ahci-reg.dtsi  | 36 ++
  4 files changed, 54 insertions(+)
  create mode 100644 arch/arm/boot/dts/sunxi-ahci-reg.dtsi

diff --git a/arch/arm/boot/dts/sun4i-a10-a1000.dts 
b/arch/arm/boot/dts/sun4i-a10-a1000.dts
index cbd2e13..d6ec839 100644
--- a/arch/arm/boot/dts/sun4i-a10-a1000.dts
+++ b/arch/arm/boot/dts/sun4i-a10-a1000.dts
@@ -35,6 +35,10 @@
};
};

+   ahci: sata@01c18000 {
+   status = "okay";
+   };
+
pinctrl@01c20800 {
emac_power_pin_a1000: emac_power_pin@0 {
allwinner,pins = "PH15";
diff --git a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts 
b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
index b139ee6..6df237d8 100644
--- a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
+++ b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
@@ -12,6 +12,7 @@

  /dts-v1/;
  /include/ "sun4i-a10.dtsi"
+/include/ "sunxi-ahci-reg.dtsi"

  / {
model = "Cubietech Cubieboard";
@@ -33,6 +34,11 @@
};
};

+   ahci: sata@01c18000 {
+   target-supply = <®_ahci_5v>;
+   status = "okay";
+   };
+
pinctrl@01c20800 {
led_pins_cubieboard: led_pins@0 {
allwinner,pins = "PH20", "PH21";
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index 336dbec..454077a 100644
--- a/arch/arm/boot/dts/sun4i-a10.dtsi
+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
@@ -338,6 +338,14 @@
#size-cells = <0>;
};

+   ahci: sata@01c18000 {
+   compatible = "allwinner,sun4i-a10-ahci";
+   reg = <0x01c18000 0x1000>;
+   interrupts = <56>;
+   clocks = <&pll6 0>, <&ahb_gates 25>;
+   status = "disabled";
+   };
+
intc: interrupt-controller@01c20400 {
compatible = "allwinner,sun4i-ic";
reg = <0x01c20400 0x400>;
diff --git a/arch/arm/boot/dts/sunxi-ahci-reg.dtsi 
b/arch/arm/boot/dts/sunxi-ahci-reg.dtsi
new file mode 100644
index 000..7072af1
--- /dev/null
+++ b/arch/arm/boot/dts/sunxi-ahci-reg.dtsi
@@ -0,0 +1,36 @@
+/*
+ * sunxi boards sata target power supply common code



Since IIRC we have pretty much the same needs for the USB, can't we
just drop the SATA specific mention and use it as the common DTSI for
the usual regulators?


On most boards with sata, there will also be 1 or 2 usb regulators,
so we need differently named regulator nodes for all 3 of ahci,
usb1 and usb2 vbus. On some boards how ever we may only need the
usb regulators. So if you look in my current personal sunxi-devel
tree you will see separate dtsi files for both ahci and usb regulators,
another advantage of having these separate is that the gpio controlling
the regulator can be pre-populated with the reference design gpio which
is used in most boards, so that the ahci specific code in the dts
becomes only the ahci: sata@... node.

Regards,

Hans

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[linux-sunxi] Re: [PATCH v7 8/8] ARM: sunxi: Add documentation for driver for SD/MMC hosts found on Allwinner sunxi SoCs

2014-02-22 Thread Maxime Ripard
Hi David,

On Sat, Feb 22, 2014 at 08:32:03AM +0100, David Lanzendörfer wrote:
> > Ditto. Plus, this is not a mod0 clock.
> Yes it is! But maybe the formulation hasn't been clear enough...

Technically, it's not, it has this phase controls features a mod0
clock doesn't have.

> > You never talked about the clock-names property, and which clocks
> > were supposed to be provided.
>
> Yes I did? But I expanded the text a little bit further...

I can't see any reference to the fact that clock-names should be set,
and what values should it hold.

Something like that:
https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt#n11

> > > + interrupts = <0 32 4>;
> > > + bus-width = <4>;
> > And you never talked about bus-width either.
> I can throw in a line for refering to the mmc slot gpio lib docs.

Yes, that would be great :)

> > Isn't the cd-gpios property requested too?
> I can refer to the docs there as well if you like... :-)

That would be great too :)

Thanks!
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com


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[linux-sunxi] Re: [PATCH v7 4/8] ARM: sunxi: Add driver for SD/MMC hosts found on Allwinner sunxi SoCs

2014-02-22 Thread Maxime Ripard
Hi Hans,

(As a side note, your mailer just did something nasty with the
wrapping which made the code snippets totally unreadable. I'm going to
drop them.)

On Wed, Feb 19, 2014 at 01:14:58PM +0100, Hans de Goede wrote:
>  +wmb(); /* Ensure idma_des hit main mem before we start the 
>  idmac */
> >>> 
> >>> wmb ensure the proper ordering of the instructions, not flushing
> >>> the caches like what your comment implies.
> >> 
> >> Since I put that comment there, allow me to explain. A modern ARM
> >> cpu core has 2 or more units handling stores. One for regular
> >> memory stores, and one for io-mem stores. Regular mem stores can
> >> be re-ordered, io stores cannot. Normally there is no "syncing"
> >> between the 2 store units. Cache flushing is not an issue here
> >> since the memory holding the descriptors for the idma controller
> >> is allocated cache coherent, which on arm means it is not cached.
> >> 
> >> What is an issue here is the io-store starting the idmac hitting
> >> the io-mem before the descriptors hit the main-mem, the wmb()
> >> ensures this does not happen.
> > 
> > To expand a bit, my point was not that it was functionnally
> > wrong. Since you put a barrier in there, and that it resides in a
> > cache coherent section, we're fine.
> > 
> > My point was that the comment itself was misleading.
> 
> Well as explained above, the purpose of the wmb is to ensure that
> the descriptors hit main memory, before the following writel (in the
> caller of this function) starts the controller. So I don't see
> exactly how the comment is wrong.
> 
> If you've a better wording for the comment, suggestions are welcome.

Your first reply was great :)

But if you feel like it enough, fine.

[ codeless snip..] 

> >>> I'd rather put it at a debug loglevel.
> >> 
> >> Erm, this only happens if something is seriously wrong.
> > 
> > Still. Something would be seriously wrong in the MMC
> > driver/controller. You don't want to bloat the whole kernel logs
> > with the dump of your registers just because the MMC is
> > failing. This is of no interest to anyone but someone that would
> > actually try to debug what's wrong.
> 
> This is not a complete register dump, this writes a single line to
> the kernel log saying that an io error happened, and printing the
> error flags set in the status register. We cannot be much shorter
> then this without simply not notifying the user that an io error has
> happened, and not notifying the user is wrong IMHO.

Ok.

>  +/* And put it back in reset */
>  +sunxi_mmc_exit_host(host);
> >>> 
> >>> Hu? If it's in reset, how can it generate some IRQs?
> >> 
> >> Yes, that is why we do the whole dance of init controller, get
> >> irq, disable irq, drop it back in reset (until the mmc subsys
> >> does a power on of the mmc card / sdio dev).
> >> 
> >> Sometime the controller asserts the irq in reset for some reason,
> >> so without the dance as soon as we do the devm_request_irq we get
> >> an irq, and worse, not only do we get an irq, we cannot clear it
> >> since writing to the interrupt status register does not work when
> >> the controller is in reset, so we get stuck re-entering the irq
> >> handler.
> > 
> > Hmmm, I see. It probably deserves some commenting here too then.
> 
> This call is the mirror of the sunxi_mmc_init_host a few lines
> higher, which has this comment:
> 
> /* Make sure the controller is in a sane state before enabling irqs */
> 
> Which attempts to explain why we do the init controller, claim irq,
> disable irq, put controller back in reset sequence. Again suggestions
> for a better comment are welcome.

And again, the second part of your first reply was great :)

>  +ret = mmc_add_host(mmc); 
>  +if (ret)
>  +goto error_free_dma;
>  +
>  +dev_info(&pdev->dev, "base:0x%p irq:%u\n", host->reg_base, 
>  host->irq);
>  +platform_set_drvdata(pdev, mmc);
> >>> 
> >>> This should be before the registration. Otherwise, you're racy.
> >> 
> >> Nope, we only need this to get the data on sunxi_mmc_remove,
> >> everywhere else the data is found through the mmc-host struct.
> > 
> > Still, if anyone makes a following patch using the platform_device
> > for some reason, we will have a race condition, without any way to
> > notice it.
> > 
> > Plus, you're doing all the other bits of initialization of your
> > structures much earlier, why not be consistent and having all of
> > them at the same place?
> 
> Most platform drivers I've worked on do platform_set_drvdata as late
> as possible, so that the drvdata does not get set and never cleared
> in error paths.

You don't actually have to clear it, and some frameworks actually
require you to call dev_set_drvdata before registration, so that
statement looks quite odd to me.

Thanks!
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com


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