Re: [linux-sunxi] Re: Help adding I2C child node
On Wed, Sep 24, 2014 at 04:27:02PM +0100, bruce bushby wrote: > Quick update in case it help somebody else. > > Big thank you to selsinork for some valuable tips and pointers. > > As it turns out, you don't need a DTS entry to add an I2C child > node/device. I removed my DTS child node entries in case they were > breaking things, booted the board and then manually added the device > and kernel driver. > > Although my driver still doesn't work, I am able to see the debug > messages which is great. > > > Shell session: First I confirm I can see and query the I2C device > using i2ctools, then instantiate the device and then load the > module...which fails, but at least explains where it's failing. > > # lsmod > Module Size Used byNot tainted > # > # > # > # i2cdetect -y 0 > 0 1 2 3 4 5 6 7 8 9 a b c d e f > 00: -- -- -- -- -- -- -- -- -- -- -- -- -- > 10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- > 20: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- > 30: -- -- -- -- 34 -- -- -- -- -- -- -- -- -- -- -- > 40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- > 50: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- > 60: -- -- -- -- -- -- -- -- -- 69 -- -- -- -- -- -- > 70: -- -- -- -- -- -- -- 77 > # > # > # > # i2cget -y 0 0x69 0x75 > 0x71 > # > # > # > # echo mpu9250 0x69 > /sys/bus/i2c/devices/i2c-0/new_device > [ 55.362493] i2c i2c-0: new_device: Instantiated device mpu9250 at 0x69 > # > # modprobe inv-mpu-iio > [ 77.347200] inv-mpu-iio 0-0069: Unable to read axis_map_x > [ 77.352699] i2c i2c-0: inv_mpu_probe failed -22 > [ 77.357254] inv-mpu-iio: probe of 0-0069 failed with error -5 > # Without having the code, it's hard to say, but it definitely looks like you're missing some DT properties (and hence, have to create a node for your device). Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com signature.asc Description: Digital signature
Re: [linux-sunxi] Re: Help adding I2C child node
Make sure other devices didn't occupy the I2C bus exclusively. This is what
happened on
my Cubieboard2 when I trying to add a mma8451. It didn't work until I
removed the HDMI
module which used the same I2C bus. I'm not clear about the details.
On Wed, Sep 24, 2014 at 11:27 PM, bruce bushby
wrote:
> Quick update in case it help somebody else.
>
> Big thank you to selsinork for some valuable tips and pointers.
>
> As it turns out, you don't need a DTS entry to add an I2C child
> node/device. I removed my DTS child node entries in case they were
> breaking things, booted the board and then manually added the device
> and kernel driver.
>
> Although my driver still doesn't work, I am able to see the debug
> messages which is great.
>
>
> Shell session: First I confirm I can see and query the I2C device
> using i2ctools, then instantiate the device and then load the
> module...which fails, but at least explains where it's failing.
>
> # lsmod
> Module Size Used byNot tainted
> #
> #
> #
> # i2cdetect -y 0
> 0 1 2 3 4 5 6 7 8 9 a b c d e f
> 00: -- -- -- -- -- -- -- -- -- -- -- -- --
> 10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
> 20: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
> 30: -- -- -- -- 34 -- -- -- -- -- -- -- -- -- -- --
> 40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
> 50: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
> 60: -- -- -- -- -- -- -- -- -- 69 -- -- -- -- -- --
> 70: -- -- -- -- -- -- -- 77
> #
> #
> #
> # i2cget -y 0 0x69 0x75
> 0x71
> #
> #
> #
> # echo mpu9250 0x69 > /sys/bus/i2c/devices/i2c-0/new_device
> [ 55.362493] i2c i2c-0: new_device: Instantiated device mpu9250 at 0x69
> #
> # modprobe inv-mpu-iio
> [ 77.347200] inv-mpu-iio 0-0069: Unable to read axis_map_x
> [ 77.352699] i2c i2c-0: inv_mpu_probe failed -22
> [ 77.357254] inv-mpu-iio: probe of 0-0069 failed with error -5
> #
>
>
>
>
> Bruce
>
>
>
>
>
> On Sat, Sep 20, 2014 at 2:54 PM, bruce bushby
> wrote:
> > Hi
> >
> > As a hobby I've been playing with an Olimex A20-SOM and trying to
> > attach a Drotek Invensense MPU9250 break out board.
> >
> > So far my uboot is working and I can boot my build via dhcp + nfs. I
> > added the "i2ctools" to the build and I'm able to run "i2cdetect -y 0"
> > and I can see my devices on i2c0
> >
> > #
> > # i2cdetect -y 0
> > 0 1 2 3 4 5 6 7 8 9 a b c d e f
> > 00: -- -- -- -- -- -- -- -- -- -- -- -- --
> > 10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
> > 20: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
> > 30: -- -- -- -- 34 -- -- -- -- -- -- -- -- -- -- --
> > 40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
> > 50: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
> > 60: -- -- -- -- -- -- -- -- -- 69 -- -- -- -- -- --
> > 70: -- -- -- -- -- -- -- 77
> > #
> >
> >
> > The drotek breakout board:
> > http://www.drotek.fr/shop/en/home/466-imu-10dof-mpu9250-ms5611.html
> >
> > includes ms5611 altimeter which is why you see address "0x34"
> >
> >
> > A very kind Daniel Baluta provided a patched version of the "inv_mpu"
> > drivers enabling them to compile for the 3.16+ kernels. (rather then
> > 3.4)
> >
> > Now I have a module (inv_mpu_iio) that loadsbut it is not
> > associated with my i2c0 "0x69" device, nor has it created any /sys
> > device files:
> >
> > #
> > # lsmod
> > Module Size Used byNot tainted
> > inv_mpu_iio62968 0
> > #
> > # dmesg | grep inv
> > [1.187348] i2c i2c-0: client [inv_mpu_iio] registered with bus id
> 0-0069
> > [ 22.452739] i2c-core: driver [inv_mpu_iio] registered
> > #
> >
> >
> > First question: Does my DTS child node look ok?
> >
> >
> > i2c0: i2c@01c2ac00 {
> > pinctrl-names = "default";
> > pinctrl-0 = <&i2c0_pins_a>;
> > status = "okay";
> >
> > mpu@69 {
> > compatible = "inv_mpu_iio";
> > reg = <0x69>;
> > };
> > };
> >
> >
> > Something has worked because I can cat this file:
> > # cat /sys/devices/soc@01c0/1c2ac00.i2c/i2c-0/0-0069/name
> > inv_mpu_iio
> > #
> >
> > This is the driver I am using:
> > https://github.com/BruceBushby/inv_mpu
> >
> >
> > "inv_mpu_core.c" ...contains the probe function:
> >
> > static int inv_mpu_probe(struct i2c_client *client,
> > const struct i2c_device_id *id)
> > {
> > struct inv_mpu_state *st;
> > struct iio_dev *indio_dev;
> > int result, err;
> > pr_debug("Invensense MPU probe started.\n");
> >
> >
> >
> >
> > Sadly I don't see any "module debug" messages.even though I've
> > enabled various DEBUG in my kernel config:
> >
> >
> > CONFIG_I2C_DEBUG_CORE=y
> > CONFIG_I2C_DEBUG_ALGO=y
> > CONFIG_I2C_DEBUG_BUS=y
> > CONFIG_DYNAMIC_DEBUG=y
> > CONFIG_DEBUG_INFO=y
> > CONFIG_DEBUG_KERNEL=y
> >
> >
> >
> >
> > Any ideas?
> >
> >
> >
> > Thanks
> > Bruce
>
> --
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[linux-sunxi] Re: [PATCH 1/7] clk: sunxi: Add post clk divider for factor clocks
Hi Maxime, Emilio,
On Tue, Sep 16, 2014 at 11:57 PM, Maxime Ripard
wrote:
> Hi Emilio,
>
> On Sat, Sep 13, 2014 at 11:43:46AM -0300, Emilio López wrote:
>> Hi,
>>
>> El 06/09/14 a las 07:47, Chen-Yu Tsai escibió:
>> >Some factor clocks, mostly PLLs, have an extra fixed divider just before
>> >the clock output. Add an option to the factor clk driver config data to
>> >specify this divider.
>> >
>> >Signed-off-by: Chen-Yu Tsai
>> >---
>> > drivers/clk/sunxi/clk-factors.c | 3 +++
>> > drivers/clk/sunxi/clk-factors.h | 1 +
>> > 2 files changed, 4 insertions(+)
>> >
>> >diff --git a/drivers/clk/sunxi/clk-factors.c
>> >b/drivers/clk/sunxi/clk-factors.c
>> >index 2057c8a..435111d 100644
>> >--- a/drivers/clk/sunxi/clk-factors.c
>> >+++ b/drivers/clk/sunxi/clk-factors.c
>> >@@ -64,6 +64,9 @@ static unsigned long clk_factors_recalc_rate(struct
>> >clk_hw *hw,
>> > /* Calculate the rate */
>> > rate = (parent_rate * (n + config->n_start) * (k + 1) >> p) / (m + 1);
>> >
>> >+if (config->post_div)
>> >+rate /= config->post_div;
>> >+
>> > return rate;
>> > }
>> >
>> >diff --git a/drivers/clk/sunxi/clk-factors.h
>> >b/drivers/clk/sunxi/clk-factors.h
>> >index d2d0efa..ce70c65 100644
>> >--- a/drivers/clk/sunxi/clk-factors.h
>> >+++ b/drivers/clk/sunxi/clk-factors.h
>> >@@ -16,6 +16,7 @@ struct clk_factors_config {
>> > u8 pshift;
>> > u8 pwidth;
>> > u8 n_start;
>> >+u8 post_div;
>> > };
>> >
>> > struct clk_factors {
>> >
>>
>> For the record, I liked your solution on[1] more, as it's in line
>> with what we're doing on the other sunxi platforms, instead of
>> adding features in factors to cover for some cases. But it's your
>> and Maxime's call, as I haven't written any of the sun6i code so
>> far.
>
> No, you still wrote most of the clock support, so your opinion is
> always valuable (and valued).
>
> Thing is, unlike what was done in the sun4i driver where there was a
> "real" technical issue that was preventing us from using only
> fixed-factor, we're not in such a case in sun6i (and later,
> apparently).
>
> PLL6 has only one output, which is then directly multiplied by
> fixed-factors, without any (pre|post)-dividers for any of them.
>
> That means that following what you did for the sun4i would just
> register 3 "dumbs" fixed-factors, that we couldn't reference from DT,
> or through a cryptic index (which is not even documented in our
> bindings).
>
> I'd be fine either way, I just prefer the solution that has less code
> and is more explicit.
What's the verdict on this series?
ChenYu
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[linux-sunxi] Re: Help adding I2C child node
Quick update in case it help somebody else.
Big thank you to selsinork for some valuable tips and pointers.
As it turns out, you don't need a DTS entry to add an I2C child
node/device. I removed my DTS child node entries in case they were
breaking things, booted the board and then manually added the device
and kernel driver.
Although my driver still doesn't work, I am able to see the debug
messages which is great.
Shell session: First I confirm I can see and query the I2C device
using i2ctools, then instantiate the device and then load the
module...which fails, but at least explains where it's failing.
# lsmod
Module Size Used byNot tainted
#
#
#
# i2cdetect -y 0
0 1 2 3 4 5 6 7 8 9 a b c d e f
00: -- -- -- -- -- -- -- -- -- -- -- -- --
10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
20: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
30: -- -- -- -- 34 -- -- -- -- -- -- -- -- -- -- --
40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
50: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
60: -- -- -- -- -- -- -- -- -- 69 -- -- -- -- -- --
70: -- -- -- -- -- -- -- 77
#
#
#
# i2cget -y 0 0x69 0x75
0x71
#
#
#
# echo mpu9250 0x69 > /sys/bus/i2c/devices/i2c-0/new_device
[ 55.362493] i2c i2c-0: new_device: Instantiated device mpu9250 at 0x69
#
# modprobe inv-mpu-iio
[ 77.347200] inv-mpu-iio 0-0069: Unable to read axis_map_x
[ 77.352699] i2c i2c-0: inv_mpu_probe failed -22
[ 77.357254] inv-mpu-iio: probe of 0-0069 failed with error -5
#
Bruce
On Sat, Sep 20, 2014 at 2:54 PM, bruce bushby wrote:
> Hi
>
> As a hobby I've been playing with an Olimex A20-SOM and trying to
> attach a Drotek Invensense MPU9250 break out board.
>
> So far my uboot is working and I can boot my build via dhcp + nfs. I
> added the "i2ctools" to the build and I'm able to run "i2cdetect -y 0"
> and I can see my devices on i2c0
>
> #
> # i2cdetect -y 0
> 0 1 2 3 4 5 6 7 8 9 a b c d e f
> 00: -- -- -- -- -- -- -- -- -- -- -- -- --
> 10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
> 20: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
> 30: -- -- -- -- 34 -- -- -- -- -- -- -- -- -- -- --
> 40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
> 50: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
> 60: -- -- -- -- -- -- -- -- -- 69 -- -- -- -- -- --
> 70: -- -- -- -- -- -- -- 77
> #
>
>
> The drotek breakout board:
> http://www.drotek.fr/shop/en/home/466-imu-10dof-mpu9250-ms5611.html
>
> includes ms5611 altimeter which is why you see address "0x34"
>
>
> A very kind Daniel Baluta provided a patched version of the "inv_mpu"
> drivers enabling them to compile for the 3.16+ kernels. (rather then
> 3.4)
>
> Now I have a module (inv_mpu_iio) that loadsbut it is not
> associated with my i2c0 "0x69" device, nor has it created any /sys
> device files:
>
> #
> # lsmod
> Module Size Used byNot tainted
> inv_mpu_iio62968 0
> #
> # dmesg | grep inv
> [1.187348] i2c i2c-0: client [inv_mpu_iio] registered with bus id 0-0069
> [ 22.452739] i2c-core: driver [inv_mpu_iio] registered
> #
>
>
> First question: Does my DTS child node look ok?
>
>
> i2c0: i2c@01c2ac00 {
> pinctrl-names = "default";
> pinctrl-0 = <&i2c0_pins_a>;
> status = "okay";
>
> mpu@69 {
> compatible = "inv_mpu_iio";
> reg = <0x69>;
> };
> };
>
>
> Something has worked because I can cat this file:
> # cat /sys/devices/soc@01c0/1c2ac00.i2c/i2c-0/0-0069/name
> inv_mpu_iio
> #
>
> This is the driver I am using:
> https://github.com/BruceBushby/inv_mpu
>
>
> "inv_mpu_core.c" ...contains the probe function:
>
> static int inv_mpu_probe(struct i2c_client *client,
> const struct i2c_device_id *id)
> {
> struct inv_mpu_state *st;
> struct iio_dev *indio_dev;
> int result, err;
> pr_debug("Invensense MPU probe started.\n");
>
>
>
>
> Sadly I don't see any "module debug" messages.even though I've
> enabled various DEBUG in my kernel config:
>
>
> CONFIG_I2C_DEBUG_CORE=y
> CONFIG_I2C_DEBUG_ALGO=y
> CONFIG_I2C_DEBUG_BUS=y
> CONFIG_DYNAMIC_DEBUG=y
> CONFIG_DEBUG_INFO=y
> CONFIG_DEBUG_KERNEL=y
>
>
>
>
> Any ideas?
>
>
>
> Thanks
> Bruce
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Re: [linux-sunxi] [sunxi-boards] Olinuxino A10s fix dcdc3
On Wed, Sep 24, 2014 at 03:58:01PM +0200, Michal Suchanek wrote: > dcdc3 on Olinuxino A10s rev A is used for DDR memory power supply and > must be 1.5V > > The board locks up when initializing AXP if this voltage is set to 1.2V > as is done in the current fex. > > Signed-off-by: Michal Suchanek Pushed. Luc Verhaegen. -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
Re: [linux-sunxi] Re: [PATCH] u-boot-sunxi: boards:sunxi: Drop redundant dram file
On Thu, Sep 25, 2014 at 12:23:08AM +1000, Julian Calaby wrote: > Hi Luc, > > Unless upstream doesn't like it, (if that's even a possibility) I > think all the changes needed now are to the u-boot section of the NDH. > If nobody beats me to it, I'll try to get something up tomorrow. > > Thanks, It is our own branch in our own tree, i doubt that all of this will go upstream any time real soon. :) Luc Verhaegen. -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
Re: [linux-sunxi] Re: [PATCH] u-boot-sunxi: boards:sunxi: Drop redundant dram file
Hi Luc, On Thu, Sep 25, 2014 at 12:16 AM, Luc Verhaegen wrote: > On Thu, Sep 25, 2014 at 12:14:50AM +1000, Julian Calaby wrote: >> Hi, >> >> Thanks! >> >> I was planning to produce a set of patches to stuff it into >> sunxi-tools, but this works too. >> >> Thanks, >> >> -- >> Julian Calaby > > Further patches are always welcome ;) Unless upstream doesn't like it, (if that's even a possibility) I think all the changes needed now are to the u-boot section of the NDH. If nobody beats me to it, I'll try to get something up tomorrow. Thanks, -- Julian Calaby Email: julian.cal...@gmail.com Profile: http://www.google.com/profiles/julian.calaby/ -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
Re: [linux-sunxi] Re: [PATCH] u-boot-sunxi: boards:sunxi: Drop redundant dram file
On Thu, Sep 25, 2014 at 12:14:50AM +1000, Julian Calaby wrote: > Hi, > > Thanks! > > I was planning to produce a set of patches to stuff it into > sunxi-tools, but this works too. > > Thanks, > > -- > Julian Calaby Further patches are always welcome ;) Luc Verhaegen. -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
Re: [linux-sunxi] Re: [PATCH] u-boot-sunxi: boards:sunxi: Drop redundant dram file
Hi, On Thu, Sep 25, 2014 at 12:07 AM, Luc Verhaegen wrote: > On Mon, Sep 22, 2014 at 12:08:58AM +1000, Julian Calaby wrote: >> Hi Luc, >> >> On Sat, Sep 20, 2014 at 12:38 AM, Julian Calaby >> wrote: >> > Hi Luc, >> > >> > On Sat, Sep 20, 2014 at 12:13 AM, Luc Verhaegen wrote: >> >> On Sat, Sep 20, 2014 at 12:04:10AM +1000, Julian Calaby wrote: >> >>> Hi Luc, >> >>> >> >>> The original goal was to have it be part of an online tool that >> >>> unskilled users could upload memdumps to and it'd turn them into well >> >>> formed patches. >> >>> >> >>> I'll see what I can do about making it more generally useful. >> >>> >> >>> Thanks, >> >> >> >> Ah, such a tool would be rather undesirable today. We need a full device >> >> page on top of fex and meminfo. >> > >> > Fair enough. >> > >> >> A bash/python/perl/whatever rewrite that users could run during NDH >> >> would be the ideal solution. If not, you will be required to run this >> >> tool every once in a while. Heck, if even i, after looking, managed to >> >> overlook this one. >> > >> > I'll try to make that happen. >> >> Challenge accepted. >> >> Attached is a first attempt at this. It: >> 1. Finds all the dram files >> 2. Rips out the parameters >> 3. Converts any hexadecimal numbers to decimal >> 4. Concatenates them into a line per file >> 5. Runs uniq over them >> 6. Prints out a list of sets of identical dram files. >> >> I tend to use a lot of piping and a "while read" pattern when writing >> bash scripts so some might find it's formatting a little weird. >> >> It expects to be run in the top level of a u-boot source tree or >> somewhere above that. (E.g. top level of sunxi-bsp's tree) and expects >> find, sed, grep, sort and uniq to be available. >> >> It assumes that all files have the same set of parameters (i.e. we >> never omit any parameters which are 0) and is robust enough to cope >> with any new parameters we might add, providing that all files are >> updated to have them. I could update it to remove this assumption. I >> could also add some code to make and git-add any changes required to >> remove the duplicates it finds. >> >> I'm not sure which tree this should end up in, so I haven't prepared a >> patch yet. >> >> Thanks, >> >> -- >> Julian Calaby >> >> Email: julian.cal...@gmail.com >> Profile: http://www.google.com/profiles/julian.calaby/ > > It works, so i quickly pushed this up, as this has been long overdue :) > > https://github.com/linux-sunxi/u-boot-sunxi/blob/sunxi/scripts/sunxi_dram_duplicates_find.sh Thanks! I was planning to produce a set of patches to stuff it into sunxi-tools, but this works too. Thanks, -- Julian Calaby Email: julian.cal...@gmail.com Profile: http://www.google.com/profiles/julian.calaby/ -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
Re: [linux-sunxi] Re: [PATCH] u-boot-sunxi: boards:sunxi: Drop redundant dram file
On Mon, Sep 22, 2014 at 12:08:58AM +1000, Julian Calaby wrote: > Hi Luc, > > On Sat, Sep 20, 2014 at 12:38 AM, Julian Calaby > wrote: > > Hi Luc, > > > > On Sat, Sep 20, 2014 at 12:13 AM, Luc Verhaegen wrote: > >> On Sat, Sep 20, 2014 at 12:04:10AM +1000, Julian Calaby wrote: > >>> Hi Luc, > >>> > >>> The original goal was to have it be part of an online tool that > >>> unskilled users could upload memdumps to and it'd turn them into well > >>> formed patches. > >>> > >>> I'll see what I can do about making it more generally useful. > >>> > >>> Thanks, > >> > >> Ah, such a tool would be rather undesirable today. We need a full device > >> page on top of fex and meminfo. > > > > Fair enough. > > > >> A bash/python/perl/whatever rewrite that users could run during NDH > >> would be the ideal solution. If not, you will be required to run this > >> tool every once in a while. Heck, if even i, after looking, managed to > >> overlook this one. > > > > I'll try to make that happen. > > Challenge accepted. > > Attached is a first attempt at this. It: > 1. Finds all the dram files > 2. Rips out the parameters > 3. Converts any hexadecimal numbers to decimal > 4. Concatenates them into a line per file > 5. Runs uniq over them > 6. Prints out a list of sets of identical dram files. > > I tend to use a lot of piping and a "while read" pattern when writing > bash scripts so some might find it's formatting a little weird. > > It expects to be run in the top level of a u-boot source tree or > somewhere above that. (E.g. top level of sunxi-bsp's tree) and expects > find, sed, grep, sort and uniq to be available. > > It assumes that all files have the same set of parameters (i.e. we > never omit any parameters which are 0) and is robust enough to cope > with any new parameters we might add, providing that all files are > updated to have them. I could update it to remove this assumption. I > could also add some code to make and git-add any changes required to > remove the duplicates it finds. > > I'm not sure which tree this should end up in, so I haven't prepared a > patch yet. > > Thanks, > > -- > Julian Calaby > > Email: julian.cal...@gmail.com > Profile: http://www.google.com/profiles/julian.calaby/ It works, so i quickly pushed this up, as this has been long overdue :) https://github.com/linux-sunxi/u-boot-sunxi/blob/sunxi/scripts/sunxi_dram_duplicates_find.sh Luc Verhaegen. -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] [sunxi-boards] Olinuxino A10s fix dcdc3
dcdc3 on Olinuxino A10s rev A is used for DDR memory power supply and must be 1.5V The board locks up when initializing AXP if this voltage is set to 1.2V as is done in the current fex. Signed-off-by: Michal Suchanek --- sys_config/a10s/a10s-olinuxino-m-lcd10.fex |2 +- sys_config/a10s/a10s-olinuxino-m-lcd7.fex |2 +- sys_config/a10s/a10s-olinuxino-m.fex |2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/sys_config/a10s/a10s-olinuxino-m-lcd10.fex b/sys_config/a10s/a10s-olinuxino-m-lcd10.fex index 3d9ce69..4d1ceb8 100644 --- a/sys_config/a10s/a10s-olinuxino-m-lcd10.fex +++ b/sys_config/a10s/a10s-olinuxino-m-lcd10.fex @@ -5,7 +5,7 @@ machine = "A10s-OLinuXino-MICRO" [target] boot_clock = 1008 dcdc2_vol = 1400 -dcdc3_vol = 1200 +dcdc3_vol = 1500 ldo2_vol = 3000 ldo3_vol = 3300 ldo4_vol = 3300 diff --git a/sys_config/a10s/a10s-olinuxino-m-lcd7.fex b/sys_config/a10s/a10s-olinuxino-m-lcd7.fex index d8f69c3..dca3a27 100644 --- a/sys_config/a10s/a10s-olinuxino-m-lcd7.fex +++ b/sys_config/a10s/a10s-olinuxino-m-lcd7.fex @@ -5,7 +5,7 @@ machine = "A10s-OLinuXino-MICRO" [target] boot_clock = 1008 dcdc2_vol = 1400 -dcdc3_vol = 1200 +dcdc3_vol = 1500 ldo2_vol = 3000 ldo3_vol = 3300 ldo4_vol = 3300 diff --git a/sys_config/a10s/a10s-olinuxino-m.fex b/sys_config/a10s/a10s-olinuxino-m.fex index 9cdd343..e78b61f 100644 --- a/sys_config/a10s/a10s-olinuxino-m.fex +++ b/sys_config/a10s/a10s-olinuxino-m.fex @@ -5,7 +5,7 @@ machine = "A10s-OLinuXino-MICRO" [target] boot_clock = 1008 dcdc2_vol = 1400 -dcdc3_vol = 1200 +dcdc3_vol = 1500 ldo2_vol = 3000 ldo3_vol = 3300 ldo4_vol = 3300 -- 1.7.10.4 -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] Re: [PATCH 0/6] ARM: sunxi: Add basic support for Allwinner A80 SoC
On Wed, Sep 24, 2014 at 06:40:42PM +0800, Chen-Yu Tsai wrote: > Hi, > > On Wed, Sep 24, 2014 at 2:41 PM, Maxime Ripard > wrote: > > Hi Chen-Yu, > > > > On Sun, Sep 21, 2014 at 10:58:07PM +0800, Chen-Yu Tsai wrote: > >> Hi everyone, > >> > >> This patch series adds very basic support for Allwinner's A80 SoC, > >> a big.LITTLE architecture with 4 Cortex-A7s and 4 Cortex-A15s. > >> > >> Development is done on the A80 Optimus Board, the defacto development > >> board for the A80, with the accompanying SDK as a reference. > >> > >> So far I've been unable to get the board to boot from MMC, or > >> using Android fastboot. I'm using Allwinner's FEL mode to load > >> the bootloader and kernel+dtb image over USB. Notes on my attempts > >> can be found here: http://linux-sunxi.org/User:Wens#A80_Optimus > > > > It looks very nice, thanks a lot. You'll find a minor comments inline. > > > > One thing I forgot to ask you about when doing the A23, and that would > > nice to do is to update the documentation we have in > > Documentation/arm/sunxi/README with the A23 and A80 infos you've been > > able to gather. > > I'll add the A80 datasheet in v2, and do a separate series for A23, A31, > and A31s docs. Ah, yes, the A31 and A31s didn't have links to the user manuals... Thanks! Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com signature.asc Description: Digital signature
Re: [linux-sunxi] Re: [PATCH 3/6] ARM: dts: sunxi: Add Allwinner A80 dtsi
Hi Chen-Yu, > > Thanks for the tip. Before I send v2, I do have a question. I'm using > > ranges = <0 0 0 0x2000>; > > in the clocks and soc node to avoid having to use 64bit values for all > addresses and sizes. Would this be undesirable, even bad practice maybe? We did something like that for all the internal registers too as they are all under 4GB. In our case the use of a range really makes sens because the hardware addresses were configurable. You don't have such requirement so I can't say if it is a bad practice. From my point of view it seems sensible but I am not an DT expert. Grégory -- Gregory Clement, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
Re: [linux-sunxi] Re: [PATCH 3/6] ARM: dts: sunxi: Add Allwinner A80 dtsi
On Wed, Sep 24, 2014 at 3:18 PM, Gregory CLEMENT
wrote:
> Hi Chen-Yu,
>
>
+
+ memory {
+ reg = <0x2000 0x4000>;
>>>
>>> Usually, what we put there was the maximum amount of RAM that can be
>>> handled by the SoC. I think that it can go above 1GB
>>
>> With LPAE, it can handle 8GB. But the DT won't take 64bit values.
>> I'm not sure how to get it in. I'll look around for examples.
>
> You can have a look on what we did for Armada XP:
>
> arch/arm/boot/dts/armada-370-xp.dtsi
> arch/arm/boot/dts/armada-xp.dtsi
> arch/arm/boot/dts/armada-xp-gp.dts
>
> I created a skeleton64.dtsi for this case
Thanks for the tip. Before I send v2, I do have a question. I'm using
ranges = <0 0 0 0x2000>;
in the clocks and soc node to avoid having to use 64bit values for all
addresses and sizes. Would this be undesirable, even bad practice maybe?
http://linux-sunxi.org/A80/Memory_map is a document I pieced together
from Allwinner's SDK header files. AFAIK only the memory goes above
the 4GB limit. All peripherals are under 512 MB, 256MB even.
Thanks
ChenYu
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[linux-sunxi] Re: [PATCH 0/6] ARM: sunxi: Add basic support for Allwinner A80 SoC
Hi, On Wed, Sep 24, 2014 at 2:41 PM, Maxime Ripard wrote: > Hi Chen-Yu, > > On Sun, Sep 21, 2014 at 10:58:07PM +0800, Chen-Yu Tsai wrote: >> Hi everyone, >> >> This patch series adds very basic support for Allwinner's A80 SoC, >> a big.LITTLE architecture with 4 Cortex-A7s and 4 Cortex-A15s. >> >> Development is done on the A80 Optimus Board, the defacto development >> board for the A80, with the accompanying SDK as a reference. >> >> So far I've been unable to get the board to boot from MMC, or >> using Android fastboot. I'm using Allwinner's FEL mode to load >> the bootloader and kernel+dtb image over USB. Notes on my attempts >> can be found here: http://linux-sunxi.org/User:Wens#A80_Optimus > > It looks very nice, thanks a lot. You'll find a minor comments inline. > > One thing I forgot to ask you about when doing the A23, and that would > nice to do is to update the documentation we have in > Documentation/arm/sunxi/README with the A23 and A80 infos you've been > able to gather. I'll add the A80 datasheet in v2, and do a separate series for A23, A31, and A31s docs. Thanks ChenYu -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] [PATCH v2 05/10] ARM: sun6i: Add clock support
This patch adds the basic clocks support for the Allwinner A31 (sun6i)
processor. This code will not been compiled until the build is hooked
up in a later patch. It has been split out to keep the patches manageable.
This includes changes from the following commits from u-boot-sunxi:
a92051b ARM: sunxi: Add sun6i clock controller structure
1f72c6f ARM: sun6i: Setup the UART0 clocks
5f2e712 ARM: sunxi: Enable pll6 by default on all models
2be2f2a ARM: sunxi-mmc: Add mmc support for sun6i / A31
12e1633 ARM: sun6i: Add initial clock setup for SPL
1a9c9c6 ARM: sunxi: Split clock code into common, sun4i and sun6i code
0b194ee ARM: sun6i: Properly setup the PLL LDO in clock_init_safe
b54c626 sunxi: avoid sr32 for APB1 clock setup.
68fe29c sunxi: remove magic numbers from clock_get_pll{5,6}
c89867d sunxi: clocks: clock_get_pll5 prototype and coding style
501ab1e ARM: sunxi: Fix sun6i PLL6 settings
37f669b ARM: sunxi: Fix macro names for mmc and uart reset offsets
61de1e6 ARM: sunxi: Correct comment for MBUS1 register in sun6i clock
definitions
Signed-off-by: Maxime Ripard
Signed-off-by: Ian Campbell
Signed-off-by: Hans de Goede
[w...@csie.org: styling fixes reported by checkpatch.pl]
[w...@csie.org: drop unsupported SPL code block and unused gpio.h header]
Signed-off-by: Chen-Yu Tsai
Cc: Tom Cubie
---
arch/arm/cpu/armv7/sunxi/Makefile | 1 +
arch/arm/cpu/armv7/sunxi/clock_sun6i.c| 70 +
arch/arm/include/asm/arch-sunxi/clock.h | 4 +
arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 205 ++
4 files changed, 280 insertions(+)
create mode 100644 arch/arm/cpu/armv7/sunxi/clock_sun6i.c
create mode 100644 arch/arm/include/asm/arch-sunxi/clock_sun6i.h
diff --git a/arch/arm/cpu/armv7/sunxi/Makefile
b/arch/arm/cpu/armv7/sunxi/Makefile
index f0473d2..2a42dca 100644
--- a/arch/arm/cpu/armv7/sunxi/Makefile
+++ b/arch/arm/cpu/armv7/sunxi/Makefile
@@ -14,6 +14,7 @@ obj-y += pinmux.o
obj-$(CONFIG_SUN6I)+= prcm.o
obj-$(CONFIG_SUN4I)+= clock_sun4i.o
obj-$(CONFIG_SUN5I)+= clock_sun4i.o
+obj-$(CONFIG_SUN6I)+= clock_sun6i.o
obj-$(CONFIG_SUN7I)+= clock_sun4i.o
ifndef CONFIG_SPL_BUILD
diff --git a/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
b/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
new file mode 100644
index 000..8387b93
--- /dev/null
+++ b/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
@@ -0,0 +1,70 @@
+/*
+ * sun6i specific clock code
+ *
+ * (C) Copyright 2007-2012
+ * Allwinner Technology Co., Ltd.
+ * Tom Cubie
+ *
+ * (C) Copyright 2013 Luke Kenneth Casson Leighton
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+
+void clock_init_uart(void)
+{
+ struct sunxi_ccm_reg *const ccm =
+ (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+
+ /* uart clock source is apb2 */
+ writel(APB2_CLK_SRC_OSC24M|
+ APB2_CLK_RATE_N_1|
+ APB2_CLK_RATE_M(1),
+ &ccm->apb2_div);
+
+ /* open the clock for uart */
+ setbits_le32(&ccm->apb2_gate,
+CLK_GATE_OPEN << (APB2_GATE_UART_SHIFT +
+ CONFIG_CONS_INDEX - 1));
+
+ /* deassert uart reset */
+ setbits_le32(&ccm->apb2_reset_cfg,
+1 << (APB2_RESET_UART_SHIFT +
+ CONFIG_CONS_INDEX - 1));
+
+ /* Dup with clock_init_safe(), drop once sun6i SPL support lands */
+ writel(PLL6_CFG_DEFAULT, &ccm->pll6_cfg);
+}
+
+int clock_twi_onoff(int port, int state)
+{
+ struct sunxi_ccm_reg *const ccm =
+ (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+
+ if (port > 3)
+ return -1;
+
+ /* set the apb clock gate for twi */
+ if (state)
+ setbits_le32(&ccm->apb2_gate,
+CLK_GATE_OPEN << (APB2_GATE_TWI_SHIFT+port));
+ else
+ clrbits_le32(&ccm->apb2_gate,
+CLK_GATE_OPEN << (APB2_GATE_TWI_SHIFT+port));
+
+ return 0;
+}
+
+unsigned int clock_get_pll6(void)
+{
+ struct sunxi_ccm_reg *const ccm =
+ (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+ uint32_t rval = readl(&ccm->pll6_cfg);
+ int n = ((rval & CCM_PLL6_CTRL_N_MASK) >> CCM_PLL6_CTRL_N_SHIFT) + 1;
+ int k = ((rval & CCM_PLL6_CTRL_K_MASK) >> CCM_PLL6_CTRL_K_SHIFT) + 1;
+ return 2400 * n * k / 2;
+}
diff --git a/arch/arm/include/asm/arch-sunxi/clock.h
b/arch/arm/include/asm/arch-sunxi/clock.h
index 5669f39..8f5d860 100644
--- a/arch/arm/include/asm/arch-sunxi/clock.h
+++ b/arch/arm/include/asm/arch-sunxi/clock.h
@@ -15,7 +15,11 @@
#define CLK_GATE_CLOSE 0x0
/* clock control module regs definition */
+#ifdef CONFIG_SUN6I
+#include
+#else
#include
+#endif
#ifndef __ASSEMBLY__
int clock_init(void);
diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
new file mode 100644
index 00
[linux-sunxi] [PATCH v2 00/10] ARM: sunxi: Add basic support for Allwinner A31 (sun6i)
Hi everyone, This is v2 of the A31 support series. This series add basic (UART and MMC) support for Allwinner's A31 SoC. The patches, excluding the first one, were cherry-picked from u-boot-sunxi. Due to the difference between u-boot mainline and u-boot-sunxi, some patches were rearranged or squashed to better fit the current state of u-boot, and not introduce any build breaks. It follows Ian's initial merge method of sun7i support: introducing various components first, then enabling them in the last commit. I tried to keep the commits separate, thus retaining the original author and Signed-off-bys. Patch 1 updates the current UART pinmuxing code to use macros for pull-up values. This is for existing platforms, but is included as it would conflict with patch 7. Patch 2 adds a wrapper around "func(USB, usb, 0)" in BOOT_TARGET_DEVICES to deal with breakage when USB support is not enabled. Patch 3 adds memory addresses for some hardware blocks new in sun6i. Patch 4 adds support for the new PRCM (power reset and clock management) block, which also contains PLL bias voltage control. Patch 5 adds support for the clock module. This patch is a bunch of different sun6i related patches on the clock code, from when sun6i support was introduced to u-boot-sunxi, up to its current form. This is done to avoid various conflicts and needlessly introducing then removing macros. Patch 6 adds mmc support on sun6i. Patch 7 adds uart0 pin macros. Patch 8 adds uart0 muxing on sun6i. Patch 9 enables sun6i support. Patch 10 adds a defconfig for the Colombus board, which is an A31 evaluation board. Changes since v1: - Added macros for sun6i uart pinmuxes (patch 7) - Use gpio macros when muxing uarts (patch 1, 8) - Clarify what is enabled in PRCM (patch 4) - Dropped old comments in commit message from Hans (patch 4) - Use setbits helpers in PRCM code (patch 4) - Drop SPL code block from clock code (patch 5) - Make mmc code use fifo in register structure definition, and add reserved area to adjust for sun6i's different fifo address (patch 6) - Rewrite patch 9 commit message to reflect what is supported - Split out Colombus board defconfig into separate patch (patch 10) Cheers ChenYu Chen-Yu Tsai (5): ARM: sunxi: Use macro values for setting UART GPIO pull-ups ARM: sunxi: Fix build break when CONFIG_USB_EHCI is not defined ARM: sun6i: Add clock support ARM: sun6i: Define UART0 pins for A31 ARM: sun6i: Add Colombus board defconfig Hans de Goede (1): ARM: sunxi-mmc: Add mmc support for sun6i / A31 Maxime Ripard (2): ARM: sun6i: Setup the A31 UART0 muxing ARM: sunxi: Add basic A31 support Oliver Schinagl (2): ARM: sun6i: Add base address for the new controllers in A31 ARM: sun6i: Add support for the power reset control module found on the A31 arch/arm/Kconfig | 3 + arch/arm/cpu/armv7/sunxi/Makefile | 2 + arch/arm/cpu/armv7/sunxi/board.c | 10 +- arch/arm/cpu/armv7/sunxi/clock_sun6i.c| 70 arch/arm/cpu/armv7/sunxi/cpu_info.c | 2 + arch/arm/cpu/armv7/sunxi/prcm.c | 33 arch/arm/include/asm/arch-sunxi/clock.h | 4 + arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 205 ++ arch/arm/include/asm/arch-sunxi/cpu.h | 9 + arch/arm/include/asm/arch-sunxi/gpio.h| 3 + arch/arm/include/asm/arch-sunxi/mmc.h | 5 +- arch/arm/include/asm/arch-sunxi/prcm.h| 238 ++ board/sunxi/Kconfig | 10 +- configs/Colombus_defconfig| 4 + drivers/mmc/sunxi_mmc.c | 11 +- include/configs/sun6i.h | 26 +++ include/configs/sunxi-common.h| 8 +- 17 files changed, 633 insertions(+), 10 deletions(-) create mode 100644 arch/arm/cpu/armv7/sunxi/clock_sun6i.c create mode 100644 arch/arm/cpu/armv7/sunxi/prcm.c create mode 100644 arch/arm/include/asm/arch-sunxi/clock_sun6i.h create mode 100644 arch/arm/include/asm/arch-sunxi/prcm.h create mode 100644 configs/Colombus_defconfig create mode 100644 include/configs/sun6i.h -- 2.1.0 -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] [PATCH v2 10/10] ARM: sun6i: Add Colombus board defconfig
The Colombus board is an A31 evaluation board from WITS Technology. Signed-off-by: Chen-Yu Tsai --- configs/Colombus_defconfig | 4 1 file changed, 4 insertions(+) create mode 100644 configs/Colombus_defconfig diff --git a/configs/Colombus_defconfig b/configs/Colombus_defconfig new file mode 100644 index 000..16800de --- /dev/null +++ b/configs/Colombus_defconfig @@ -0,0 +1,4 @@ +CONFIG_SYS_EXTRA_OPTIONS="COLOMBUS" +CONFIG_ARM=y +CONFIG_TARGET_SUN6I=y +CONFIG_FDTFILE="sun6i-a31-colombus.dtb" -- 2.1.0 -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] [PATCH v2 01/10] ARM: sunxi: Use macro values for setting UART GPIO pull-ups
We have already defined macros for pull-up/down values in the GPIO header. Use them instead of magic numbers when configuring the UART pins. Signed-off-by: Chen-Yu Tsai --- arch/arm/cpu/armv7/sunxi/board.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c index f2cedbb..95a74c5 100644 --- a/arch/arm/cpu/armv7/sunxi/board.c +++ b/arch/arm/cpu/armv7/sunxi/board.c @@ -53,15 +53,15 @@ int gpio_init(void) #if CONFIG_CONS_INDEX == 1 && (defined(CONFIG_SUN4I) || defined(CONFIG_SUN7I)) sunxi_gpio_set_cfgpin(SUNXI_GPB(22), SUN4I_GPB22_UART0_TX); sunxi_gpio_set_cfgpin(SUNXI_GPB(23), SUN4I_GPB23_UART0_RX); - sunxi_gpio_set_pull(SUNXI_GPB(23), 1); + sunxi_gpio_set_pull(SUNXI_GPB(23), SUNXI_GPIO_PULL_UP); #elif CONFIG_CONS_INDEX == 1 && defined(CONFIG_SUN5I) sunxi_gpio_set_cfgpin(SUNXI_GPB(19), SUN5I_GPB19_UART0_TX); sunxi_gpio_set_cfgpin(SUNXI_GPB(20), SUN5I_GPB20_UART0_RX); - sunxi_gpio_set_pull(SUNXI_GPB(20), 1); + sunxi_gpio_set_pull(SUNXI_GPB(20), SUNXI_GPIO_PULL_UP); #elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_SUN5I) sunxi_gpio_set_cfgpin(SUNXI_GPG(3), SUN5I_GPG3_UART1_TX); sunxi_gpio_set_cfgpin(SUNXI_GPG(4), SUN5I_GPG4_UART1_RX); - sunxi_gpio_set_pull(SUNXI_GPG(4), 1); + sunxi_gpio_set_pull(SUNXI_GPG(4), SUNXI_GPIO_PULL_UP); #else #error Unsupported console port number. Please fix pin mux settings in board.c #endif -- 2.1.0 -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] [PATCH v2 02/10] ARM: sunxi: Fix build break when CONFIG_USB_EHCI is not defined
BOOT_TARGET_DEVICES includes USB unconditionally. This breaks when CONFIG_CMD_USB is not defined. Use a secondary macro to conditionally include it when CONFIG_EHCI is enabled, as we do for CONFIG_AHCI. Signed-off-by: Chen-Yu Tsai Acked-by: Ian Campbell --- include/configs/sunxi-common.h | 8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 1d947d7..a31656e 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -233,10 +233,16 @@ #define BOOT_TARGET_DEVICES_SCSI(func) #endif +#ifdef CONFIG_USB_EHCI +#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0) +#else +#define BOOT_TARGET_DEVICES_USB(func) +#endif + #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) \ BOOT_TARGET_DEVICES_SCSI(func) \ - func(USB, usb, 0) \ + BOOT_TARGET_DEVICES_USB(func) \ func(PXE, pxe, na) \ func(DHCP, dhcp, na) -- 2.1.0 -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] [PATCH v2 06/10] ARM: sunxi-mmc: Add mmc support for sun6i / A31
From: Hans de Goede
The mmc hardware on sun6i has an extra reset control that needs to
be de-asserted prior to usage. Also the FIFO address is different.
Signed-off-by: Hans de Goede
[w...@csie.org: use setbits_le32 for reset control, drop obsolete changes,
rewrite different FIFO address handling, add commit message]
Signed-off-by: Chen-Yu Tsai
---
arch/arm/include/asm/arch-sunxi/mmc.h | 5 -
drivers/mmc/sunxi_mmc.c | 11 +++
2 files changed, 11 insertions(+), 5 deletions(-)
diff --git a/arch/arm/include/asm/arch-sunxi/mmc.h
b/arch/arm/include/asm/arch-sunxi/mmc.h
index 53196e3..6a31184 100644
--- a/arch/arm/include/asm/arch-sunxi/mmc.h
+++ b/arch/arm/include/asm/arch-sunxi/mmc.h
@@ -43,7 +43,10 @@ struct sunxi_mmc {
u32 chda; /* 0x90 */
u32 cbda; /* 0x94 */
u32 res1[26];
- u32 fifo; /* 0x100 FIFO access address */
+#if defined(CONFIG_SUN6I)
+ u32 res2[64];
+#endif
+ u32 fifo; /* 0x100 (0x200 on sun6i) FIFO access address */
};
#define SUNXI_MMC_CLK_POWERSAVE(0x1 << 17)
diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
index d4e574f..1982988 100644
--- a/drivers/mmc/sunxi_mmc.c
+++ b/drivers/mmc/sunxi_mmc.c
@@ -19,7 +19,6 @@
struct sunxi_mmc_host {
unsigned mmc_no;
uint32_t *mclkreg;
- unsigned database;
unsigned fatal_err;
unsigned mod_clk;
struct sunxi_mmc *reg;
@@ -57,7 +56,6 @@ static int mmc_resource_init(int sdc_no)
printf("Wrong mmc number %d\n", sdc_no);
return -1;
}
- mmchost->database = (unsigned int)mmchost->reg + 0x100;
mmchost->mmc_no = sdc_no;
return 0;
@@ -75,6 +73,11 @@ static int mmc_clk_io_on(int sdc_no)
/* config ahb clock */
setbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_MMC(sdc_no));
+#if defined(CONFIG_SUN6I)
+ /* unassert reset */
+ setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_RESET_OFFSET_MMC(sdc_no));
+#endif
+
/* config mod clock */
pll_clk = clock_get_pll6();
/* should be close to 100 MHz but no more, so round up */
@@ -194,9 +197,9 @@ static int mmc_trans_data_by_cpu(struct mmc *mmc, struct
mmc_data *data)
}
if (reading)
- buff[i] = readl(mmchost->database);
+ buff[i] = readl(&mmchost->reg->fifo);
else
- writel(buff[i], mmchost->database);
+ writel(buff[i], &mmchost->reg->fifo);
}
return 0;
--
2.1.0
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[linux-sunxi] [PATCH v2 07/10] ARM: sun6i: Define UART0 pins for A31
UART0 is the default debug/console UART on the A31.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/include/asm/arch-sunxi/gpio.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h
b/arch/arm/include/asm/arch-sunxi/gpio.h
index f7f3d8c..ba7e69b 100644
--- a/arch/arm/include/asm/arch-sunxi/gpio.h
+++ b/arch/arm/include/asm/arch-sunxi/gpio.h
@@ -132,6 +132,9 @@ enum sunxi_gpio_number {
#define SUN4I_GPH22_SDC1 5
+#define SUN6I_GPH20_UART0_TX 2
+#define SUN6I_GPH21_UART0_RX 2
+
#define SUN4I_GPI4_SDC32
/* GPIO pin pull-up/down config */
--
2.1.0
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[linux-sunxi] [PATCH v2 04/10] ARM: sun6i: Add support for the power reset control module found on the A31
From: Oliver Schinagl
The A31 has a new module called PRCM, or Power, Reset Control Module.
This module controls clocks and resets for RTC block modules, and also
PLL biasing in the main clock module.
This patch adds the register definitions, and also enables the clocks
and resets for the RTC block PIO (pin controller) and P2WI (push-pull
2 wire interface) which is used to talk to the PMIC.
Signed-off-by: Oliver Schinagl
Signed-off-by: Hans de Goede
[w...@csie.org: spacing fixes reported by checkpatch.pl]
[w...@csie.org: Use setbits helper in PRCM init function]
[w...@csie.org: rephrase commit message to explain what the hardware
supports and what we actually enable]
Signed-off-by: Chen-Yu Tsai
---
arch/arm/cpu/armv7/sunxi/Makefile | 1 +
arch/arm/cpu/armv7/sunxi/prcm.c| 33 +
arch/arm/include/asm/arch-sunxi/prcm.h | 238 +
3 files changed, 272 insertions(+)
create mode 100644 arch/arm/cpu/armv7/sunxi/prcm.c
create mode 100644 arch/arm/include/asm/arch-sunxi/prcm.h
diff --git a/arch/arm/cpu/armv7/sunxi/Makefile
b/arch/arm/cpu/armv7/sunxi/Makefile
index e9721b2..f0473d2 100644
--- a/arch/arm/cpu/armv7/sunxi/Makefile
+++ b/arch/arm/cpu/armv7/sunxi/Makefile
@@ -11,6 +11,7 @@ obj-y += timer.o
obj-y += board.o
obj-y += clock.o
obj-y += pinmux.o
+obj-$(CONFIG_SUN6I)+= prcm.o
obj-$(CONFIG_SUN4I)+= clock_sun4i.o
obj-$(CONFIG_SUN5I)+= clock_sun4i.o
obj-$(CONFIG_SUN7I)+= clock_sun4i.o
diff --git a/arch/arm/cpu/armv7/sunxi/prcm.c b/arch/arm/cpu/armv7/sunxi/prcm.c
new file mode 100644
index 000..7b3ee89
--- /dev/null
+++ b/arch/arm/cpu/armv7/sunxi/prcm.c
@@ -0,0 +1,33 @@
+/*
+ * Sunxi A31 Power Management Unit
+ *
+ * (C) Copyright 2013 Oliver Schinagl
+ * http://linux-sunxi.org
+ *
+ * Based on sun6i sources and earlier U-Boot Allwinner A10 SPL work
+ *
+ * (C) Copyright 2006-2013
+ * Allwinner Technology Co., Ltd.
+ * Berg Xing
+ * Tom Cubie
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+void prcm_init_apb0(void)
+{
+ struct sunxi_prcm_reg *prcm =
+ (struct sunxi_prcm_reg *)SUNXI_PRCM_BASE;
+
+ setbits_le32(&prcm->apb0_gate, PRCM_APB0_GATE_P2WI |
+ PRCM_APB0_GATE_PIO);
+ setbits_le32(&prcm->apb0_reset, PRCM_APB0_RESET_P2WI |
+ PRCM_APB0_RESET_PIO);
+}
diff --git a/arch/arm/include/asm/arch-sunxi/prcm.h
b/arch/arm/include/asm/arch-sunxi/prcm.h
new file mode 100644
index 000..1b40f09
--- /dev/null
+++ b/arch/arm/include/asm/arch-sunxi/prcm.h
@@ -0,0 +1,238 @@
+/*
+ * Sunxi A31 Power Management Unit register definition.
+ *
+ * (C) Copyright 2013 Oliver Schinagl
+ * http://linux-sunxi.org
+ * Allwinner Technology Co., Ltd.
+ * Berg Xing
+ * Tom Cubie
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef _SUNXI_PRCM_H
+#define _SUNXI_PRCM_H
+
+#define __PRCM_CPUS_CFG_PRE(n) (((n) & 0x3) << 4)
+#define PRCM_CPUS_CFG_PRE_MASK __PRCM_CPUS_CFG_PRE(0x3)
+#define __PRCM_CPUS_CFG_PRE_DIV(n) (((n) >> 1) - 1)
+#define PRCM_CPUS_CFG_PRE_DIV(n) \
+ __PRCM_CPUS_CFG_PRE(__PRCM_CPUS_CFG_CLK_PRE(n))
+#define __PRCM_CPUS_CFG_POST(n) (((n) & 0x1f) << 8)
+#define PRCM_CPUS_CFG_POST_MASK __PRCM_CPUS_CFG_POST(0x1f)
+#define __PRCM_CPUS_CFG_POST_DIV(n) ((n) - 1)
+#define PRCM_CPUS_CFG_POST_DIV(n) \
+ __PRCM_CPUS_CFG_POST_DIV(__PRCM_CPUS_CFG_POST_DIV(n))
+#define __PRCM_CPUS_CFG_CLK_SRC(n) (((n) & 0x3) << 16)
+#define PRCM_CPUS_CFG_CLK_SRC_MASK __PRCM_CPUS_CFG_CLK_SRC(0x3)
+#define __PRCM_CPUS_CFG_CLK_SRC_LOSC 0x0
+#define __PRCM_CPUS_CFG_CLK_SRC_HOSC 0x1
+#define __PRCM_CPUS_CFG_CLK_SRC_PLL6 0x2
+#define __PRCM_CPUS_CFG_CLK_SRC_PDIV 0x3
+#define PRCM_CPUS_CFG_CLK_SRC_LOSC \
+ __PRCM_CPUS_CFG_CLK_SRC(__PRCM_CPUS_CFG_CLK_SRC_LOSC)
+#define PRCM_CPUS_CFG_CLK_SRC_HOSC \
+ __PRCM_CPUS_CFG_CLK_SRC(__PRCM_CPUS_CFG_CLK_SRC_HOSC)
+#define PRCM_CPUS_CFG_CLK_SRC_PLL6 \
+ __PRCM_CPUS_CFG_CLK_SRC(__PRCM_CPUS_CFG_CLK_SRC_PLL6)
+#define PRCM_CPUS_CFG_CLK_SRC_PDIV \
+ __PRCM_CPUS_CFG_CLK_SRC(__PRCM_CPUS_CFG_CLK_SRC_PDIV)
+
+#define __PRCM_APB0_RATIO(n) (((n) & 0x3) << 0)
+#define PRCM_APB0_RATIO_DIV_MASK __PRCM_APB0_RATIO_DIV(0x3)
+#define __PRCM_APB0_RATIO_DIV(n) (((n) >> 1) - 1)
+#define PRCM_APB0_RATIO_DIV(n) \
+ __PRCM_APB0_RATIO(__PRCM_APB0_RATIO_DIV(n))
+
+#define PRCM_CPU_CFG_NEON_CLK_EN (0x1 << 0)
+#define PRCM_CPU_CFG_CPU_CLK_EN (0x1 << 1)
+
+#define PRCM_APB0_GATE_PIO (0x1 << 0)
+#define PRCM_APB0_GATE_IR (0x1 << 1)
+#define PRCM_APB0_GATE_TIMER01 (0x1 << 2)
+#define PRCM_APB0_GATE_P2WI (0x1 << 3)
+#define PRCM_APB0_GATE_UART (0x1 << 4)
+#define PRCM_APB0_GATE_1WIRE (0x1 << 5)
+#define PRCM_APB0_GATE_I2C (0x1 << 6)
+
+#define PRCM_APB0_RESET_PIO (0x1 << 0)
+#define PRCM_APB0_RESET_IR (0x1 << 1)
+#define PRCM_APB0_RESET_TIMER01 (0x1 << 2)
+#define PRCM_APB0_RESET_P2WI (0x1 << 3)
+#define PRCM_APB0_RESE
[linux-sunxi] [PATCH v2 08/10] ARM: sun6i: Setup the A31 UART0 muxing
From: Maxime Ripard Signed-off-by: Maxime Ripard Signed-off-by: Hans de Goede [w...@csie.org: commit message was "ARM: sunxi: Setup the A31 UART0 muxing"] [w...@csie.org: reorder #ifs by SUN?I] [w...@csie.org: replace magic numbers with GPIO definitions] Signed-off-by: Chen-Yu Tsai --- arch/arm/cpu/armv7/sunxi/board.c | 4 1 file changed, 4 insertions(+) diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c index 95a74c5..b6d63db 100644 --- a/arch/arm/cpu/armv7/sunxi/board.c +++ b/arch/arm/cpu/armv7/sunxi/board.c @@ -58,6 +58,10 @@ int gpio_init(void) sunxi_gpio_set_cfgpin(SUNXI_GPB(19), SUN5I_GPB19_UART0_TX); sunxi_gpio_set_cfgpin(SUNXI_GPB(20), SUN5I_GPB20_UART0_RX); sunxi_gpio_set_pull(SUNXI_GPB(20), SUNXI_GPIO_PULL_UP); +#elif CONFIG_CONS_INDEX == 1 && defined(CONFIG_SUN6I) + sunxi_gpio_set_cfgpin(SUNXI_GPH(20), SUN6I_GPH20_UART0_TX); + sunxi_gpio_set_cfgpin(SUNXI_GPH(21), SUN6I_GPH21_UART0_RX); + sunxi_gpio_set_pull(SUNXI_GPH(21), SUNXI_GPIO_PULL_UP); #elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_SUN5I) sunxi_gpio_set_cfgpin(SUNXI_GPG(3), SUN5I_GPG3_UART1_TX); sunxi_gpio_set_cfgpin(SUNXI_GPG(4), SUN5I_GPG4_UART1_RX); -- 2.1.0 -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] [PATCH v2 09/10] ARM: sunxi: Add basic A31 support
From: Maxime Ripard
Add a new sun6i machine that supports UART and MMC.
Signed-off-by: Maxime Ripard
Signed-off-by: Hans de Goede
[w...@csie.org: use SPDX labels, adapt to Kconfig system, drop ifdef
around mmc and smp code, drop MACH_TYPE]
Signed-off-by: Chen-Yu Tsai
---
arch/arm/Kconfig| 3 +++
arch/arm/cpu/armv7/sunxi/cpu_info.c | 2 ++
board/sunxi/Kconfig | 10 +-
include/configs/sun6i.h | 26 ++
4 files changed, 40 insertions(+), 1 deletion(-)
create mode 100644 include/configs/sun6i.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 22f0f09..bfbe6f1 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -439,6 +439,9 @@ config TARGET_SUN4I
config TARGET_SUN5I
bool "Support sun5i"
+config TARGET_SUN6I
+ bool "Support sun6i"
+
config TARGET_SUN7I
bool "Support sun7i"
diff --git a/arch/arm/cpu/armv7/sunxi/cpu_info.c
b/arch/arm/cpu/armv7/sunxi/cpu_info.c
index 5cf35ac..40c4e13 100644
--- a/arch/arm/cpu/armv7/sunxi/cpu_info.c
+++ b/arch/arm/cpu/armv7/sunxi/cpu_info.c
@@ -23,6 +23,8 @@ int print_cpuinfo(void)
case 7: puts("CPU: Allwinner A10s (SUN5I)\n"); break;
default: puts("CPU: Allwinner A1X (SUN5I)\n");
}
+#elif defined CONFIG_SUN6I
+ puts("CPU: Allwinner A31 (SUN6I)\n");
#elif defined CONFIG_SUN7I
puts("CPU: Allwinner A20 (SUN7I)\n");
#else
diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig
index 7bdf958..c78750e 100644
--- a/board/sunxi/Kconfig
+++ b/board/sunxi/Kconfig
@@ -14,6 +14,14 @@ config SYS_CONFIG_NAME
endif
+if TARGET_SUN6I
+
+config SYS_CONFIG_NAME
+ string
+ default "sun6i"
+
+endif
+
if TARGET_SUN7I
config SYS_CONFIG_NAME
@@ -22,7 +30,7 @@ config SYS_CONFIG_NAME
endif
-if TARGET_SUN4I || TARGET_SUN5I || TARGET_SUN7I
+if TARGET_SUN4I || TARGET_SUN5I || TARGET_SUN6I || TARGET_SUN7I
config SYS_CPU
string
diff --git a/include/configs/sun6i.h b/include/configs/sun6i.h
new file mode 100644
index 000..93a1d96
--- /dev/null
+++ b/include/configs/sun6i.h
@@ -0,0 +1,26 @@
+/*
+ * (C) Copyright 2012-2013 Henrik Nordstrom
+ * (C) Copyright 2013 Luke Kenneth Casson Leighton
+ * (C) Copyright 2013 Maxime Ripard
+ *
+ * Configuration settings for the Allwinner A31 (sun6i) CPU
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * A31 specific configuration
+ */
+#define CONFIG_SUN6I /* sun6i SoC generation */
+
+#define CONFIG_SYS_PROMPT "sun6i# "
+
+/*
+ * Include common sunxi configuration where most the settings are
+ */
+#include
+
+#endif /* __CONFIG_H */
--
2.1.0
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[linux-sunxi] [PATCH v2 03/10] ARM: sun6i: Add base address for the new controllers in A31
From: Oliver Schinagl A31 has several new and changed memory address. This patch adds them. Signed-off-by: Oliver Schinagl Signed-off-by: Hans de Goede Signed-off-by: Chen-Yu Tsai Acked-by: Ian Campbell --- arch/arm/include/asm/arch-sunxi/cpu.h | 9 + 1 file changed, 9 insertions(+) diff --git a/arch/arm/include/asm/arch-sunxi/cpu.h b/arch/arm/include/asm/arch-sunxi/cpu.h index a987e51d..313e6c8 100644 --- a/arch/arm/include/asm/arch-sunxi/cpu.h +++ b/arch/arm/include/asm/arch-sunxi/cpu.h @@ -95,6 +95,11 @@ #define SUNXI_MALI400_BASE 0x01c4 #define SUNXI_GMAC_BASE0x01c5 +#define SUNXI_DRAM_COM_BASE0x01c62000 +#define SUNXI_DRAM_CTL_BASE0x01c63000 +#define SUNXI_DRAM_PHY_CH1_BASE0x01c65000 +#define SUNXI_DRAM_PHY_CH2_BASE0x01c66000 + /* module sram */ #define SUNXI_SRAM_C_BASE 0x01d0 @@ -105,6 +110,10 @@ #define SUNXI_MP_BASE 0x01e8 #define SUNXI_AVG_BASE 0x01ea +#define SUNXI_PRCM_BASE0x01f01400 +#define SUNXI_R_PIO_BASE 0x01f02c00 +#define SUNXI_P2WI_BASE0x01f03400 + /* CoreSight Debug Module */ #define SUNXI_CSDM_BASE0x3f50 -- 2.1.0 -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
Re: [linux-sunxi] Re: [PATCH 3/6] ARM: dts: sunxi: Add Allwinner A80 dtsi
On Wed, Sep 24, 2014 at 3:18 PM, Gregory CLEMENT
wrote:
> Hi Chen-Yu,
>
>
+
+ memory {
+ reg = <0x2000 0x4000>;
>>>
>>> Usually, what we put there was the maximum amount of RAM that can be
>>> handled by the SoC. I think that it can go above 1GB
>>
>> With LPAE, it can handle 8GB. But the DT won't take 64bit values.
>> I'm not sure how to get it in. I'll look around for examples.
>
> You can have a look on what we did for Armada XP:
>
> arch/arm/boot/dts/armada-370-xp.dtsi
> arch/arm/boot/dts/armada-xp.dtsi
> arch/arm/boot/dts/armada-xp-gp.dts
>
> I created a skeleton64.dtsi for this case
Thanks! I was wondering what that was for.
ChenYu
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Re: [linux-sunxi] Re: [PATCH 3/6] ARM: dts: sunxi: Add Allwinner A80 dtsi
Hi Chen-Yu,
>>> +
>>> + memory {
>>> + reg = <0x2000 0x4000>;
>>
>> Usually, what we put there was the maximum amount of RAM that can be
>> handled by the SoC. I think that it can go above 1GB
>
> With LPAE, it can handle 8GB. But the DT won't take 64bit values.
> I'm not sure how to get it in. I'll look around for examples.
You can have a look on what we did for Armada XP:
arch/arm/boot/dts/armada-370-xp.dtsi
arch/arm/boot/dts/armada-xp.dtsi
arch/arm/boot/dts/armada-xp-gp.dts
I created a skeleton64.dtsi for this case
Gregory
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Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
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Re: [linux-sunxi] Re: [PATCH 3/6] ARM: dts: sunxi: Add Allwinner A80 dtsi
On Wed, Sep 24, 2014 at 2:37 PM, Maxime Ripard
wrote:
> Hi,
>
> Thanks, a lot for your patches :)
>
> On Sun, Sep 21, 2014 at 10:58:10PM +0800, Chen-Yu Tsai wrote:
>> The Allwinner A80 is a new multi-purpose SoC with 4 Cortex-A7 and
>> 4 Cortex-A15 cores in a big.LITTLE architecture, and a 64-core
>> PowerVR G6230 GPU.
>>
>> Signed-off-by: Chen-Yu Tsai
>> ---
>> arch/arm/boot/dts/sun9i-a80.dtsi | 280
>> +++
>> 1 file changed, 280 insertions(+)
>> create mode 100644 arch/arm/boot/dts/sun9i-a80.dtsi
>>
>> diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi
>> b/arch/arm/boot/dts/sun9i-a80.dtsi
>> new file mode 100644
>> index 000..f23ea59
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/sun9i-a80.dtsi
>> @@ -0,0 +1,280 @@
>> +/*
>> + * Copyright 2014 Chen-Yu Tsai
>> + *
>> + * Chen-Yu Tsai
>> + *
>> + * This file is dual-licensed: you can use it either under the terms
>> + * of the GPL or the X11 license, at your option. Note that this dual
>> + * licensing only applies to this file, and not this project as a
>> + * whole.
>> + *
>> + * a) This library is free software; you can redistribute it and/or
>> + * modify it under the terms of the GNU General Public License as
>> + * published by the Free Software Foundation; either version 2 of the
>> + * License, or (at your option) any later version.
>> + *
>> + * This library is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> + * GNU General Public License for more details.
>> + *
>> + * You should have received a copy of the GNU General Public
>> + * License along with this library; if not, write to the Free
>> + * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
>> + * MA 02110-1301 USA
>> + *
>> + * Or, alternatively,
>> + *
>> + * b) Permission is hereby granted, free of charge, to any person
>> + * obtaining a copy of this software and associated documentation
>> + * files (the "Software"), to deal in the Software without
>> + * restriction, including without limitation the rights to use,
>> + * copy, modify, merge, publish, distribute, sublicense, and/or
>> + * sell copies of the Software, and to permit persons to whom the
>> + * Software is furnished to do so, subject to the following
>> + * conditions:
>> + *
>> + * The above copyright notice and this permission notice shall be
>> + * included in all copies or substantial portions of the Software.
>> + *
>> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
>> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
>> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
>> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
>> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
>> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
>> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
>> + * OTHER DEALINGS IN THE SOFTWARE.
>> + */
>> +
>> +/include/ "skeleton.dtsi"
>> +
>> +/ {
>> + interrupt-parent = <&gic>;
>> +
>> + aliases {
>> + serial0 = &uart0;
>> + serial1 = &uart1;
>> + serial2 = &uart2;
>> + serial3 = &uart3;
>> + serial4 = &uart4;
>> + serial5 = &uart5;
>> + serial6 = &r_uart;
>> + };
>> +
>> + cpu-map {
>> + cluster0 {
>> + core0 {
>> + cpu = <&cpu0>;
>> + };
>> + core1 {
>> + cpu = <&cpu1>;
>> + };
>> + core2 {
>> + cpu = <&cpu2>;
>> + };
>> + core3 {
>> + cpu = <&cpu3>;
>> + };
>
> Having separation lines between the cores here would be nice.
OK.
>> + };
>> +
>> + cluster1 {
>> + core0 {
>> + cpu = <&cpu4>;
>> + };
>> + core1 {
>> + cpu = <&cpu5>;
>> + };
>> + core2 {
>> + cpu = <&cpu6>;
>> + };
>> + core3 {
>> + cpu = <&cpu7>;
>> + };
>> + };
>> + };
>> +
>> + cpus {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + cpu0: cpu@0 {
>> + compatible = "arm,cortex-a7";
>> + device_type = "cpu";
>> + reg = <0x0>;
>> + };
>> +
>> + cpu1: cpu@1 {
>> + compatible = "arm,c
