[linux-sunxi] Re: [A20] RTC & 32k crystal
On Wednesday, July 1, 2015 at 7:21:52 PM UTC+10, Ivan Kozic wrote: > > Hi Steven, > > See my comments below. > > On Monday, June 29, 2015 at 9:28:17 PM UTC+2, Steven Saunderson wrote: >> >> Hi Ivan, >> >> Thanks fo all your work here. I'll try to remove the caps from my >> Cubieboard2 tonight and see if that makes any difference. >> > > Awaiting for results :) > Hi Ivan, This is all Cubieboard2 specific. I removed the caps and the RTC then lost about 3 seconds per minute (was 2 seconds per minute). I fitted some 22pf caps and it's back to losing about 2 seconds per minute. The DC reading on each leg of the crystal is about 0.66V. As before reading the LOSC_CTRL_REG gives me 0x2009 whereas other A20 boards return 0x0009. The odd thing is that If I short the crystal the RTC gains about 6 seconds per minute and reading LOSC_CTRL_REG gives me 0x0009. The RTCs in my other boards (CubieTruck, Orange Pi) work properly. Maybe I've wrecked the RTC on the CB2. The DS1307 modules I've fitted to my Raspberry Pis work well. I'd say the CB2 RTC is a lost cause. Cheers, Steven -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] [RFC] ARM: dts: sunxi: Add regulators and board-specific operating points for LeMaker BananaPi
sun7i-a20-bananapi.dts doesn't contain regulator nodes for the AXP209 PMU driver, so add them to allow for voltage-scaling with cpufreq-dt. With the regulators enabled, we can define board-specific operating points. The defined CPU voltages are more conservative (based on the values used by the vendor), so they should be more failsafe across all boards of this kind out there. I'm posting this as RFC as I would like to make a few more remarks and raise questions along the way (plus, I'm anything but an experienced developer, so a a critical review might help). I checked the regulator definitions against the schematics released by LeMaker. I also compared that to the DT and schematics of Cubiboard 2 and Cubietruck. Of course, I also tested the patch on the actual hardware and it works fine for me. The CPU voltages are slightly higher than those set in sun7i-a20.dtsi and even though they work well for me, I thought it might be safer to use the more conservative values used by LeMaker in their old fex file. Would you agree? Besides, it it ok to have this in one patch or should it be splitted in two (one for the regulators and one for the opp)? Did I miss something important? Signed-off-by: Timo Sigurdsson --- arch/arm/boot/dts/sun7i-a20-bananapi.dts | 47 +--- 1 file changed, 43 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/sun7i-a20-bananapi.dts b/arch/arm/boot/dts/sun7i-a20-bananapi.dts index 9f7b472..2bcbb0e 100644 --- a/arch/arm/boot/dts/sun7i-a20-bananapi.dts +++ b/arch/arm/boot/dts/sun7i-a20-bananapi.dts @@ -92,6 +92,22 @@ status = "okay"; }; +&cpu0 { + cpu-supply = <®_dcdc2>; + operating-points = < + /* kHzuV */ + 1008000 145 + 96 1425000 + 912000 1425000 + 864000 135 + 72 125 + 528000 115 + 312000 110 + 144000 105 + >; + cooling-max-level = <7>; +}; + &ehci0 { status = "okay"; }; @@ -119,13 +135,9 @@ status = "okay"; axp209: pmic@34 { - compatible = "x-powers,axp209"; reg = <0x34>; interrupt-parent = <&nmi_intc>; interrupts = <0 IRQ_TYPE_LEVEL_LOW>; - - interrupt-controller; - #interrupt-cells = <1>; }; }; @@ -182,6 +194,33 @@ }; }; +#include "axp209.dtsi" + +®_dcdc2 { + regulator-always-on; + regulator-min-microvolt = <105>; + regulator-max-microvolt = <145>; + regulator-name = "vdd-cpu"; +}; + +®_dcdc3 { + regulator-always-on; + regulator-min-microvolt = <100>; + regulator-max-microvolt = <140>; + regulator-name = "vdd-int-dll"; +}; + +®_ldo1 { + regulator-name = "vdd-rtc"; +}; + +®_ldo2 { + regulator-always-on; + regulator-min-microvolt = <300>; + regulator-max-microvolt = <300>; + regulator-name = "avcc"; +}; + ®_usb1_vbus { status = "okay"; }; -- 2.1.4 -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] [PATCH v8] dma: sun4i: Add support for the DMA engine on sun[457]i SoCs
From: Emilio López This patch adds support for the DMA engine present on Allwinner A10, A13, A10S and A20 SoCs. This engine has two kinds of channels: normal and dedicated. The main difference is in the mode of operation; while a single normal channel may be operating at any given time, dedicated channels may operate simultaneously provided there is no overlap of source or destination. Hardware documentation can be found on A10 User Manual (section 12), A13 User Manual (section 14) and A20 User Manual (section 1.12) Signed-off-by: Emilio López Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- Changes from v7: * Rebased on top of v4.2-rc2 * Switched to using the direction given as _prep* parameter instead of the one in the structure * Marked the of_device_id struct const Changes from v6: * Prefixed DDMA and NDMA defines by sun4i to avoid conflicts * Fixed copy alignment value * Removed choose optimal buswidth computation function * Reworked the default settings for the RAM when doing a cyclic case in order to return an error if the device configuration is not right * Checked for tx_status state pointer * Added a generic definition for common bits and registers between normal and dedicated DMA * Reworked configuration register computation to have less cases to handle * Added a comment on the half transfer interrupt usage for cyclic transfers Changes from v5: * Rebased on 4.1-rc1 Changes from v4: * Fix for interrupt triggering after freeing a dma-channel, this fixed the problems with jack * Adjust to recent kernel dma API changes Changes from v3: * Drop threaded IRQ to get lower latency * Drop chancnt * Fix crash on first use when using a DMA-aware bootloader (eg., one that supports NAND) Changes from v2: * Faster memcpy * Quicker cyclic transfers * Address some stylistic and locking comments from Maxime * probably some more stuff I'm forgetting Changes from v1: * address comments from Chen-Yu and Maxime * fix issue converting bus width * switch to using a threaded IRQ instead of a tasklet on recommendation from Maxime * fix issue setting magic timing parameter for SPI transfers * fix an issue with list handling reported by the kbuild 0-DAY robot (thanks!) * drop a lot of unused #define * probably some more stuff I'm forgetting --- .../devicetree/bindings/dma/sun4i-dma.txt | 46 + drivers/dma/Kconfig| 11 + drivers/dma/Makefile |1 + drivers/dma/sun4i-dma.c| 1288 4 files changed, 1346 insertions(+) create mode 100644 Documentation/devicetree/bindings/dma/sun4i-dma.txt create mode 100644 drivers/dma/sun4i-dma.c diff --git a/Documentation/devicetree/bindings/dma/sun4i-dma.txt b/Documentation/devicetree/bindings/dma/sun4i-dma.txt new file mode 100644 index ..f1634a27a830 --- /dev/null +++ b/Documentation/devicetree/bindings/dma/sun4i-dma.txt @@ -0,0 +1,46 @@ +Allwinner A10 DMA Controller + +This driver follows the generic DMA bindings defined in dma.txt. + +Required properties: + +- compatible: Must be "allwinner,sun4i-a10-dma" +- reg: Should contain the registers base address and length +- interrupts: Should contain a reference to the interrupt used by this device +- clocks: Should contain a reference to the parent AHB clock +- #dma-cells : Should be 2, first cell denoting normal or dedicated dma, + second cell holding the request line number. + +Example: + dma: dma-controller@01c02000 { + compatible = "allwinner,sun4i-a10-dma"; + reg = <0x01c02000 0x1000>; + interrupts = <27>; + clocks = <&ahb_gates 6>; + #dma-cells = <2>; + }; + +Clients: + +DMA clients connected to the Allwinner A10 DMA controller must use the +format described in the dma.txt file, using a three-cell specifier for +each channel: a phandle plus two integer cells. +The three cells in order are: + +1. A phandle pointing to the DMA controller. +2. Whether it is using normal (0) or dedicated (1) channels +3. The port ID as specified in the datasheet + +Example: + spi2: spi@01c17000 { + compatible = "allwinner,sun4i-a10-spi"; + reg = <0x01c17000 0x1000>; + interrupts = <0 12 4>; + clocks = <&ahb_gates 22>, <&spi2_clk>; + clock-names = "ahb", "mod"; + dmas = <&dma 1 29>, <&dma 1 28>; + dma-names = "rx", "tx"; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig index 88d474b78076..fa6d09fe7d0c 100644 --- a/drivers/dma/Kconfig +++ b/drivers/dma/Kconfig @@ -425,6 +425,17 @@ config XILINX_VDMA channels, Memory Mapped to Stream (MM2S) and Stream to Memory Mapped (S2MM) for the d